opcodes/ChangeLog

   1 2005-04-14  Nick Clifton  <nickc@redhat.com>
   2
   3         * po/fi.po: New translation: Finnish.
   4         * configure.in (ALL_LINGUAS): Add fi.
   5         * configure: Regenerate.
   6
   7 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * Makefile.am (NO_WERROR): Define.
  10         * configure.in: Invoke AM_BINUTILS_WARNINGS.
  11         * Makefile.in: Regenerate.
  12         * aclocal.m4: Regenerate.
  13         * configure: Regenerate.
  14
  15 2005-04-04  Nick Clifton  <nickc@redhat.com>
  16
  17         * fr30-asm.c: Regenerate.
  18         * frv-asm.c: Regenerate.
  19         * iq2000-asm.c: Regenerate.
  20         * m32r-asm.c: Regenerate.
  21         * openrisc-asm.c: Regenerate.
  22
  23 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  24
  25         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
  26         visible operands in Intel mode. The first operand of monitor is
  27         %rax in 64-bit mode.
  28
  29 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  30
  31         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
  32         easier future additions.
  33
  34 2005-03-31  Jerome Guitton  <guitton@gnat.com>
  35
  36         * configure.in: Check for basename.
  37         * configure: Regenerate.
  38         * config.in: Ditto.
  39
  40 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         * i386-dis.c (SEG_Fixup): New.
  43         (Sv): New.
  44         (dis386): Use "Sv" for 0x8c and 0x8e.
  45
  46 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  47             Nick Clifton  <nickc@redhat.com>
  48
  49         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
  50         function entry mask addresses.
  51         (entry_addr_occupied_slots): New variable: The number of occupied
  52         elements in entry_addr.
  53         (entry_addr_total_slots): New variable: The total number of
  54         elements in entry_addr.
  55         (parse_disassembler_options): New function.  Fills in the entry_addr
  56         array.
  57         (free_entry_array): New function.  Release the memory used by the
  58         entry addr array.  Suppressed because there is no way to call it.
  59         (is_function_entry): Check if a given address is a function's
  60         start address by looking at supplied entry mask addresses and
  61         symbol information, if available.
  62         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
  63
  64 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
  65
  66         * cris-dis.c (print_with_operands): Use ~31L for long instead
  67         of ~31.
  68
  69 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
  70
  71         * mmix-opc.c (O): Revert the last change.
  72         (Z): Likewise.
  73
  74 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
  77         (Z): Likewise.
  78
  79 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  80
  81         * mmix-opc.c (O, Z): Force expression as unsigned long.
  82
  83 2005-03-18  Nick Clifton  <nickc@redhat.com>
  84
  85         * ip2k-asm.c: Regenerate.
  86         * op/opcodes.pot: Regenerate.
  87
  88 2005-03-16  Nick Clifton  <nickc@redhat.com>
  89             Ben Elliston  <bje@au.ibm.com>
  90
  91         * configure.in (werror): New switch: Add -Werror to the
  92         compiler command line.  Enabled by default.  Disable via
  93         --disable-werror.
  94         * configure: Regenerate.
  95
  96 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  97
  98         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  99         BOOKE.
 100
 101 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 102
 103         * po/es.po: Commit new Spanish translation.
 104
 105         * po/fr.po: Commit new French translation.
 106
 107 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 108
 109         * vax-dis.c: Fix spelling error
 110         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 111         of just "Entry mask: < r1 ... >"
 112
 113 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 114
 115         * arm-dis.c (arm_opcodes): Document %E and %V.
 116         Add entries for v6T2 ARM instructions:
 117         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 118         (print_insn_arm): Add support for %E and %V.
 119         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 120
 121 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 122             Alan Modra  <amodra@bigpond.net.au>
 123
 124         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 125         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 126         (SPRG_MASK): Delete.
 127         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 128         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 129         mfsprg4..7 after msprg and consolidate.
 130
 131 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 132
 133         * vax-dis.c (entry_mask_bit): New array.
 134         (print_insn_vax): Decode function entry mask.
 135
 136 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 137
 138         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 139
 140 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 141
 142         * po/opcodes.pot: Regenerate.
 143
 144 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 145
 146         * arc-dis.c (a4_decoding_class): New enum.
 147         (dsmOneArcInst): Use the enum values for the decoding class.
 148         Remove redundant case in the switch for decodingClass value 11.
 149
 150 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 151
 152         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 153         accesses.
 154         (OP_C): Consider lock prefix in non-64-bit modes.
 155
 156 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 157
 158         * cris-dis.c (format_hex): Remove ineffective warning fix.
 159         * crx-dis.c (make_instruction): Warning fix.
 160         * frv-asm.c: Regenerate.
 161
 162 2005-02-23  Nick Clifton  <nickc@redhat.com>
 163
 164         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 165         read_memory.
 166
 167         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 168
 169         * crx-dis.c (make_instruction): Move argument structure into inner
 170         scope and ensure that all of its fields are initialised before
 171         they are used.
 172
 173         * fr30-asm.c: Regenerate.
 174         * fr30-dis.c: Regenerate.
 175         * frv-asm.c: Regenerate.
 176         * frv-dis.c: Regenerate.
 177         * ip2k-asm.c: Regenerate.
 178         * ip2k-dis.c: Regenerate.
 179         * iq2000-asm.c: Regenerate.
 180         * iq2000-dis.c: Regenerate.
 181         * m32r-asm.c: Regenerate.
 182         * m32r-dis.c: Regenerate.
 183         * openrisc-asm.c: Regenerate.
 184         * openrisc-dis.c: Regenerate.
 185         * xstormy16-asm.c: Regenerate.
 186         * xstormy16-dis.c: Regenerate.
 187
 188 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 189
 190         * arc-ext.c: Warning fixes.
 191         * arc-ext.h: Likewise.
 192         * cgen-opc.c: Likewise.
 193         * ia64-gen.c: Likewise.
 194         * maxq-dis.c: Likewise.
 195         * ns32k-dis.c: Likewise.
 196         * w65-dis.c: Likewise.
 197         * ia64-asmtab.c: Regenerate.
 198
 199 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 200
 201         * fr30-desc.c: Regenerate.
 202         * fr30-desc.h: Regenerate.
 203         * fr30-opc.c: Regenerate.
 204         * fr30-opc.h: Regenerate.
 205         * frv-desc.c: Regenerate.
 206         * frv-desc.h: Regenerate.
 207         * frv-opc.c: Regenerate.
 208         * frv-opc.h: Regenerate.
 209         * ip2k-desc.c: Regenerate.
 210         * ip2k-desc.h: Regenerate.
 211         * ip2k-opc.c: Regenerate.
 212         * ip2k-opc.h: Regenerate.
 213         * iq2000-desc.c: Regenerate.
 214         * iq2000-desc.h: Regenerate.
 215         * iq2000-opc.c: Regenerate.
 216         * iq2000-opc.h: Regenerate.
 217         * m32r-desc.c: Regenerate.
 218         * m32r-desc.h: Regenerate.
 219         * m32r-opc.c: Regenerate.
 220         * m32r-opc.h: Regenerate.
 221         * m32r-opinst.c: Regenerate.
 222         * openrisc-desc.c: Regenerate.
 223         * openrisc-desc.h: Regenerate.
 224         * openrisc-opc.c: Regenerate.
 225         * openrisc-opc.h: Regenerate.
 226         * xstormy16-desc.c: Regenerate.
 227         * xstormy16-desc.h: Regenerate.
 228         * xstormy16-opc.c: Regenerate.
 229         * xstormy16-opc.h: Regenerate.
 230
 231 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 232
 233         * Makefile.am: Run "make dep-am"
 234         * Makefile.in: Regenerate.
 235
 236 2005-02-15  Nick Clifton  <nickc@redhat.com>
 237
 238         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 239         compile time warnings.
 240         (print_keyword): Likewise.
 241         (default_print_insn): Likewise.
 242
 243         * fr30-desc.c: Regenerated.
 244         * fr30-desc.h: Regenerated.
 245         * fr30-dis.c: Regenerated.
 246         * fr30-opc.c: Regenerated.
 247         * fr30-opc.h: Regenerated.
 248         * frv-desc.c: Regenerated.
 249         * frv-dis.c: Regenerated.
 250         * frv-opc.c: Regenerated.
 251         * ip2k-asm.c: Regenerated.
 252         * ip2k-desc.c: Regenerated.
 253         * ip2k-desc.h: Regenerated.
 254         * ip2k-dis.c: Regenerated.
 255         * ip2k-opc.c: Regenerated.
 256         * ip2k-opc.h: Regenerated.
 257         * iq2000-desc.c: Regenerated.
 258         * iq2000-dis.c: Regenerated.
 259         * iq2000-opc.c: Regenerated.
 260         * m32r-asm.c: Regenerated.
 261         * m32r-desc.c: Regenerated.
 262         * m32r-desc.h: Regenerated.
 263         * m32r-dis.c: Regenerated.
 264         * m32r-opc.c: Regenerated.
 265         * m32r-opc.h: Regenerated.
 266         * m32r-opinst.c: Regenerated.
 267         * openrisc-desc.c: Regenerated.
 268         * openrisc-desc.h: Regenerated.
 269         * openrisc-dis.c: Regenerated.
 270         * openrisc-opc.c: Regenerated.
 271         * openrisc-opc.h: Regenerated.
 272         * xstormy16-desc.c: Regenerated.
 273         * xstormy16-desc.h: Regenerated.
 274         * xstormy16-dis.c: Regenerated.
 275         * xstormy16-opc.c: Regenerated.
 276         * xstormy16-opc.h: Regenerated.
 277
 278 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 279
 280         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 281         address.
 282
 283 2005-02-11  Nick Clifton  <nickc@redhat.com>
 284
 285         * iq2000-asm.c: Regenerate.
 286
 287         * frv-dis.c: Regenerate.
 288
 289 2005-02-07  Jim Blandy  <jimb@redhat.com>
 290
 291         * Makefile.am (CGEN): Load guile.scm before calling the main
 292         application script.
 293         * Makefile.in: Regenerated.
 294         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 295         Simply pass the cgen-opc.scm path to ${cgen} as its first
 296         argument; ${cgen} itself now contains the '-s', or whatever is
 297         appropriate for the Scheme being used.
 298
 299 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 300
 301         * configure: Regenerate to track ../gettext.m4.
 302
 303 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 304
 305         * ia64-gen.c (NELEMS): Define.
 306         (shrink): Generate alias with missing second predicate register when
 307         opcode has two outputs and these are both predicates.
 308         * ia64-opc-i.c (FULL17): Define.
 309         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 310         here to generate output template.
 311         (TBITCM, TNATCM): Undefine after use.
 312         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 313         first input. Add ld16 aliases without ar.csd as second output. Add
 314         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 315         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 316         ar.ccv as third/fourth inputs. Consolidate through...
 317         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 318         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 319         * ia64-asmtab.c: Regenerate.
 320
 321 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 322
 323         * configure: Regenerate to track ../gettext.m4 change.
 324
 325 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 326
 327         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 328         * frv-asm.c: Rebuilt.
 329         * frv-desc.c: Rebuilt.
 330         * frv-desc.h: Rebuilt.
 331         * frv-dis.c: Rebuilt.
 332         * frv-ibld.c: Rebuilt.
 333         * frv-opc.c: Rebuilt.
 334         * frv-opc.h: Rebuilt.
 335
 336 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 337
 338         * configure: Regenerate, ../gettext.m4 was updated.
 339
 340 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 341
 342         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 343         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 344         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 345         * mips-dis.c: Ditto.
 346
 347 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 348
 349         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 350
 351 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 352
 353         * mips-dis.c (no_aliases): New disassembly option flag.
 354         (set_default_mips_dis_options): Init no_aliases to zero.
 355         (parse_mips_dis_option): Handle no-aliases option.
 356         (print_insn_mips): Ignore table entries that are aliases
 357         if no_aliases is set.
 358         (print_insn_mips16): Ditto.
 359         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 360         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 361         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 362         * mips16-opc.c (mips16_opcodes): Ditto.
 363
 364 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 365
 366         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 367         (inheritance diagram): Add missing edge.
 368         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 369         easier for the testsuite.
 370         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 371         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 372         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 373         arch_sh2a_or_sh4_up child.
 374         (sh_table): Do renaming as above.
 375         Correct comment for ldc.l for gas testsuite to read.
 376         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 377         Correct comments for movy.w and movy.l for gas testsuite to read.
 378         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 379
 380 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 381
 382         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 383
 384 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 385
 386         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 387
 388 2005-01-10  Andreas Schwab  <schwab@suse.de>
 389
 390         * disassemble.c (disassemble_init_for_target) <case
 391         bfd_arch_ia64>: Set skip_zeroes to 16.
 392         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 393
 394 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 395
 396         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 397
 398 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 399
 400         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 401         memory references. Convert avr_operand() to C90 formatting.
 402
 403 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 404
 405         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 406
 407 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 408
 409         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 410         (no_op_insn): Initialize array with instructions that have no
 411         operands.
 412         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 413
 414 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 415
 416         * arm-dis.c: Correct top-level comment.
 417
 418 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 419
 420         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 421         architecuture defining the insn.
 422         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 423         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 424         field.
 425         Also include opcode/arm.h.
 426         * Makefile.am (arm-dis.lo): Update dependency list.
 427         * Makefile.in: Regenerate.
 428
 429 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 430
 431         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 432         reflect the change to the short immediate syntax.
 433
 434 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 435
 436         * or32-opc.c (debug): Warning fix.
 437         * po/POTFILES.in: Regenerate.
 438
 439         * maxq-dis.c: Formatting.
 440         (print_insn): Warning fix.
 441
 442 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 443
 444         * arm-dis.c (WORD_ADDRESS): Define.
 445         (print_insn): Use it.  Correct big-endian end-of-section handling.
 446
 447 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 448             Vineet Sharma      <vineets@noida.hcltech.com>
 449
 450         * maxq-dis.c: New file.
 451         * disassemble.c (ARCH_maxq): Define.
 452         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 453         instructions..
 454         * configure.in: Add case for bfd_maxq_arch.
 455         * configure: Regenerate.
 456         * Makefile.am: Add support for maxq-dis.c
 457         * Makefile.in: Regenerate.
 458         * aclocal.m4: Regenerate.
 459
 460 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 461
 462         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 463         mode.
 464         * crx-dis.c: Likewise.
 465
 466 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 467
 468         Generally, handle CRISv32.
 469         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 470         (struct cris_disasm_data): New type.
 471         (format_reg, format_hex, cris_constraint, print_flags)
 472         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 473         callers changed.
 474         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 475         (print_insn_crisv32_without_register_prefix)
 476         (print_insn_crisv10_v32_with_register_prefix)
 477         (print_insn_crisv10_v32_without_register_prefix)
 478         (cris_parse_disassembler_options): New functions.
 479         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 480         parameter.  All callers changed.
 481         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 482         failure.
 483         (cris_constraint) <case 'Y', 'U'>: New cases.
 484         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 485         for constraint 'n'.
 486         (print_with_operands) <case 'Y'>: New case.
 487         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 488         <case 'N', 'Y', 'Q'>: New cases.
 489         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 490         (print_insn_cris_with_register_prefix)
 491         (print_insn_cris_without_register_prefix): Call
 492         cris_parse_disassembler_options.
 493         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 494         for CRISv32 and the size of immediate operands.  New v32-only
 495         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 496         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 497         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 498         Change brp to be v3..v10.
 499         (cris_support_regs): New vector.
 500         (cris_opcodes): Update head comment.  New format characters '[',
 501         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 502         Add new opcodes for v32 and adjust existing opcodes to accommodate
 503         differences to earlier variants.
 504         (cris_cond15s): New vector.
 505
 506 2004-11-04 Jan Beulich <jbeulich@novell.com>
 507
 508         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 509         (indirEb): Remove.
 510         (Mp): Use f_mode rather than none at all.
 511         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 512         replaces what previously was x_mode; x_mode now means 128-bit SSE
 513         operands.
 514         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 515         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 516         pinsrw's second operand is Edqw.
 517         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 518         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 519         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 520         mode when an operand size override is present or always suffixing.
 521         More instructions will need to be added to this group.
 522         (putop): Handle new macro chars 'C' (short/long suffix selector),
 523         'I' (Intel mode override for following macro char), and 'J' (for
 524         adding the 'l' prefix to far branches in AT&T mode). When an
 525         alternative was specified in the template, honor macro character when
 526         specified for Intel mode.
 527         (OP_E): Handle new *_mode values. Correct pointer specifications for
 528         memory operands. Consolidate output of index register.
 529         (OP_G): Handle new *_mode values.
 530         (OP_I): Handle const_1_mode.
 531         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 532         respective opcode prefix bits have been consumed.
 533         (OP_EM, OP_EX): Provide some default handling for generating pointer
 534         specifications.
 535
 536 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 537
 538         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 539         COP_INST macro.
 540
 541 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 542
 543         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 544         (getregliststring): Support HI/LO and user registers.
 545         * crx-opc.c (crx_instruction): Update data structure according to the
 546         rearrangement done in CRX opcode header file.
 547         (crx_regtab):  Likewise.
 548         (crx_optab):  Likewise.
 549         (crx_instruction): Reorder load/stor instructions, remove unsupported
 550         formats.
 551         support new Co-Processor instruction 'cpi'.
 552
 553 2004-10-27  Nick Clifton  <nickc@redhat.com>
 554
 555         * opcodes/iq2000-asm.c: Regenerate.
 556         * opcodes/iq2000-desc.c: Regenerate.
 557         * opcodes/iq2000-desc.h: Regenerate.
 558         * opcodes/iq2000-dis.c: Regenerate.
 559         * opcodes/iq2000-ibld.c: Regenerate.
 560         * opcodes/iq2000-opc.c: Regenerate.
 561         * opcodes/iq2000-opc.h: Regenerate.
 562
 563 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 564
 565         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 566         us4, us5 (respectively).
 567         Remove unsupported 'popa' instruction.
 568         Reverse operands order in store co-processor instructions.
 569
 570 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 571
 572         * Makefile.am: Run "make dep-am"
 573         * Makefile.in: Regenerate.
 574
 575 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 576
 577         * xtensa-dis.c: Use ISO C90 formatting.
 578
 579 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 580
 581         * ppc-opc.c: Revert 2004-09-09 change.
 582
 583 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 584
 585         * xtensa-dis.c (state_names): Delete.
 586         (fetch_data): Use xtensa_isa_maxlength.
 587         (print_xtensa_operand): Replace operand parameter with opcode/operand
 588         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 589         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 590         instruction bundles.  Use xmalloc instead of malloc.
 591
 592 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 593
 594         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 595         initializers.
 596
 597 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 598
 599         * crx-opc.c (crx_instruction): Support Co-processor insns.
 600         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 601         (getregliststring): Change function to use the above enum.
 602         (print_arg): Handle CO-Processor insns.
 603         (crx_cinvs): Add 'b' option to invalidate the branch-target
 604         cache.
 605
 606 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 607
 608         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 609         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 610         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 611         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 612         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 613
 614 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 615
 616         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 617         rather than add it.
 618
 619 2004-09-30  Paul Brook  <paul@codesourcery.com>
 620
 621         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 622         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 623
 624 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 625
 626         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 627         (CONFIG_STATUS_DEPENDENCIES): New.
 628         (Makefile): Removed.
 629         (config.status): Likewise.
 630         * Makefile.in: Regenerated.
 631
 632 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 633
 634         * Makefile.am: Run "make dep-am".
 635         * Makefile.in: Regenerate.
 636         * aclocal.m4: Regenerate.
 637         * configure: Regenerate.
 638         * po/POTFILES.in: Regenerate.
 639         * po/opcodes.pot: Regenerate.
 640
 641 2004-09-11  Andreas Schwab  <schwab@suse.de>
 642
 643         * configure: Rebuild.
 644
 645 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 646
 647         * ppc-opc.c (L): Make this field not optional.
 648
 649 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 650
 651         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 652         Fix parameter to 'm[t|f]csr' insns.
 653
 654 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 655
 656         * configure.in: Autoupdate to autoconf 2.59.
 657         * aclocal.m4: Rebuild with aclocal 1.4p6.
 658         * configure: Rebuild with autoconf 2.59.
 659         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 660         bfd changes for autoconf 2.59 on the way).
 661         * config.in: Rebuild with autoheader 2.59.
 662
 663 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 664
 665         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 666
 667 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 668
 669         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 670         (GRPPADLCK2): New define.
 671         (twobyte_has_modrm): True for 0xA6.
 672         (grps): GRPPADLCK2 for opcode 0xA6.
 673
 674 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 675
 676         Introduce SH2a support.
 677         * sh-opc.h (arch_sh2a_base): Renumber.
 678         (arch_sh2a_nofpu_base): Remove.
 679         (arch_sh_base_mask): Adjust.
 680         (arch_opann_mask): New.
 681         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 682         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 683         (sh_table): Adjust whitespace.
 684         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 685         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 686         instruction list throughout.
 687         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 688         of arch_sh2a in instruction list throughout.
 689         (arch_sh2e_up): Accomodate above changes.
 690         (arch_sh2_up): Ditto.
 691         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 692         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 693         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 694         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 695         * sh-opc.h (arch_sh2a_nofpu): New.
 696         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 697         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 698         instruction.
 699         2004-01-20  DJ Delorie  <dj@redhat.com>
 700         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 701         2003-12-29  DJ Delorie  <dj@redhat.com>
 702         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 703         sh_opcode_info, sh_table): Add sh2a support.
 704         (arch_op32): New, to tag 32-bit opcodes.
 705         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 706         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 707         * sh-opc.h (arch_sh2a): Add.
 708         * sh-dis.c (arch_sh2a): Handle.
 709         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 710
 711 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 712
 713         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 714
 715 2004-07-22  Nick Clifton  <nickc@redhat.com>
 716
 717         PR/280
 718         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 719         insns - this is done by objdump itself.
 720         * h8500-dis.c (print_insn_h8500): Likewise.
 721
 722 2004-07-21  Jan Beulich <jbeulich@novell.com>
 723
 724         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 725         regardless of address size prefix in effect.
 726         (ptr_reg): Size or address registers does not depend on rex64, but
 727         on the presence of an address size override.
 728         (OP_MMX): Use rex.x only for xmm registers.
 729         (OP_EM): Use rex.z only for xmm registers.
 730
 731 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 732
 733         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 734         move/branch operations to the bottom so that VR5400 multimedia
 735         instructions take precedence in disassembly.
 736
 737 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 738
 739         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 740         ISA-specific "break" encoding.
 741
 742 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 743
 744         * arm-opc.h: Fix typo in comment.
 745
 746 2004-07-11  Andreas Schwab  <schwab@suse.de>
 747
 748         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 749
 750 2004-07-09  Andreas Schwab  <schwab@suse.de>
 751
 752         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 753
 754 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 755
 756         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 757         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 758         (crx-dis.lo): New target.
 759         (crx-opc.lo): Likewise.
 760         * Makefile.in: Regenerate.
 761         * configure.in: Handle bfd_crx_arch.
 762         * configure: Regenerate.
 763         * crx-dis.c: New file.
 764         * crx-opc.c: New file.
 765         * disassemble.c (ARCH_crx): Define.
 766         (disassembler): Handle ARCH_crx.
 767
 768 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 769
 770         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 771         * ia64-asmtab.c: Regnerate.
 772
 773 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 774
 775         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 776         (extract_fxm): Don't test dialect.
 777         (XFXFXM_MASK): Include the power4 bit.
 778         (XFXM): Add p4 param.
 779         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 780
 781 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 782
 783         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 784         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 785
 786 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 787
 788         * ppc-opc.c (BH, XLBH_MASK): Define.
 789         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 790
 791 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 792
 793         * i386-dis.c (x_mode): Comment.
 794         (two_source_ops): File scope.
 795         (float_mem): Correct fisttpll and fistpll.
 796         (float_mem_mode): New table.
 797         (dofloat): Use it.
 798         (OP_E): Correct intel mode PTR output.
 799         (ptr_reg): Use open_char and close_char.
 800         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 801         operands.  Set two_source_ops.
 802
 803 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 804
 805         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 806         instead of _raw_size.
 807
 808 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 809
 810         * ia64-gen.c (in_iclass): Handle more postinc st
 811         and ld variants.
 812         * ia64-asmtab.c: Rebuilt.
 813
 814 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 815
 816         * s390-opc.txt: Correct architecture mask for some opcodes.
 817         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 818         in the esa mode as well.
 819
 820 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 821
 822         * sh-dis.c (target_arch): Make unsigned.
 823         (print_insn_sh): Replace (most of) switch with a call to
 824         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 825         * sh-opc.h: Redefine architecture flags values.
 826         Add sh3-nommu architecture.
 827         Reorganise <arch>_up macros so they make more visual sense.
 828         (SH_MERGE_ARCH_SET): Define new macro.
 829         (SH_VALID_BASE_ARCH_SET): Likewise.
 830         (SH_VALID_MMU_ARCH_SET): Likewise.
 831         (SH_VALID_CO_ARCH_SET): Likewise.
 832         (SH_VALID_ARCH_SET): Likewise.
 833         (SH_MERGE_ARCH_SET_VALID): Likewise.
 834         (SH_ARCH_SET_HAS_FPU): Likewise.
 835         (SH_ARCH_SET_HAS_DSP): Likewise.
 836         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 837         (sh_get_arch_from_bfd_mach): Add prototype.
 838         (sh_get_arch_up_from_bfd_mach): Likewise.
 839         (sh_get_bfd_mach_from_arch_set): Likewise.
 840         (sh_merge_bfd_arc): Likewise.
 841
 842 2004-05-24  Peter Barada  <peter@the-baradas.com>
 843
 844         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 845         into new match_insn_m68k function.  Loop over canidate
 846         matches and select first that completely matches.
 847         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 848         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 849         to verify addressing for MAC/EMAC.
 850         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 851         reigster halves since 'fpu' and 'spl' look misleading.
 852         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 853         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 854         first, tighten up match masks.
 855         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 856         'size' from special case code in print_insn_m68k to
 857         determine decode size of insns.
 858
 859 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 860
 861         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 862         well as when -mpower4.
 863
 864 2004-05-13  Nick Clifton  <nickc@redhat.com>
 865
 866         * po/fr.po: Updated French translation.
 867
 868 2004-05-05  Peter Barada  <peter@the-baradas.com>
 869
 870         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 871         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 872         * m68k-op.c: Switch from ColdFire chips to core variants.
 873
 874 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 875
 876         PR 147.
 877         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 878
 879 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 880
 881         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 882         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 883
 884 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 885
 886         * sh-dis.c (print_insn_sh): Print the value in constant pool
 887         as a symbol if it looks like a symbol.
 888
 889 2004-04-22  Peter Barada <peter@the-baradas.com>
 890
 891         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 892         appropriate ColdFire architectures.
 893         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 894         mask addressing.
 895         Add EMAC instructions, fix MAC instructions. Remove
 896         macmw/macml/msacmw/msacml instructions since mask addressing now
 897         supported.
 898
 899 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 900
 901         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 902         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 903         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 904         macro.  Adjust all users.
 905
 906 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 907
 908         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 909         separately.
 910
 911 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 912
 913         * m32r-asm.c: Regenerate.
 914
 915 2004-03-29  Stan Shebs  <shebs@apple.com>
 916
 917         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 918         used.
 919
 920 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 921
 922         * aclocal.m4: Regenerate.
 923         * config.in: Regenerate.
 924         * configure: Regenerate.
 925         * po/POTFILES.in: Regenerate.
 926         * po/opcodes.pot: Regenerate.
 927
 928 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 929
 930         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 931         PPC_OPERANDS_GPR_0.
 932         * ppc-opc.c (RA0): Define.
 933         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 934         (RAOPT): Rename from RAO.  Update all uses.
 935         (powerpc_opcodes): Use RA0 as appropriate.
 936
 937 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 938
 939         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 940
 941 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 942
 943         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 944
 945 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 946
 947         * i386-dis.c (GRPPLOCK): Delete.
 948         (grps): Delete GRPPLOCK entry.
 949
 950 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 951
 952         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 953         (M, Mp): Use OP_M.
 954         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 955         (GRPPADLCK): Define.
 956         (dis386): Use NOP_Fixup on "nop".
 957         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 958         (twobyte_has_modrm): Set for 0xa7.
 959         (padlock_table): Delete.  Move to..
 960         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 961         and clflush.
 962         (print_insn): Revert PADLOCK_SPECIAL code.
 963         (OP_E): Delete sfence, lfence, mfence checks.
 964
 965 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 966
 967         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 968         (INVLPG_Fixup): New function.
 969         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 970
 971 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 972
 973         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 974         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 975         (padlock_table): New struct with PadLock instructions.
 976         (print_insn): Handle PADLOCK_SPECIAL.
 977
 978 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 979
 980         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 981         (OP_E): Twiddle clflush to sfence here.
 982
 983 2004-03-08  Nick Clifton  <nickc@redhat.com>
 984
 985         * po/de.po: Updated German translation.
 986
 987 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 988
 989         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 990         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 991         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 992         accordingly.
 993
 994 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 995
 996         * frv-asm.c: Regenerate.
 997         * frv-desc.c: Regenerate.
 998         * frv-desc.h: Regenerate.
 999         * frv-dis.c: Regenerate.
1000         * frv-ibld.c: Regenerate.
1001         * frv-opc.c: Regenerate.
1002         * frv-opc.h: Regenerate.
1003
1004 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1005
1006         * frv-desc.c, frv-opc.c: Regenerate.
1007
1008 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1009
1010         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1011
1012 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1013
1014         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1015         Also correct mistake in the comment.
1016
1017 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1018
1019         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1020         ensure that double registers have even numbers.
1021         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1022         that reserved instruction 0xfffd does not decode the same
1023         as 0xfdfd (ftrv).
1024         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1025         REG_N refers to a double register.
1026         Add REG_N_B01 nibble type and use it instead of REG_NM
1027         in ftrv.
1028         Adjust the bit patterns in a few comments.
1029
1030 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1031
1032         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1033
1034 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1035
1036         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1037
1038 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1039
1040         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1041
1042 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1043
1044         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1045         mtivor32, mtivor33, mtivor34.
1046
1047 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1048
1049         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1050
1051 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1052
1053         * arm-opc.h Maverick accumulator register opcode fixes.
1054
1055 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1056
1057         * m32r-dis.c: Regenerate.
1058
1059 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1060
1061         * sh-opc.h (sh_table): "fsrra", not "fssra".
1062
1063 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1064
1065         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1066         contraints.
1067
1068 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1069
1070         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1071
1072 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1073
1074         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1075         1.  Don't print scale factor on AT&T mode when index missing.
1076
1077 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1078
1079         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1080         when loaded into XR registers.
1081
1082 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1083
1084         * frv-desc.h: Regenerate.
1085         * frv-desc.c: Regenerate.
1086         * frv-opc.c: Regenerate.
1087
1088 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1089
1090         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1091
1092 2004-01-09  Paul Brook  <paul@codesourcery.com>
1093
1094         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1095         specific opcodes.
1096
1097 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1098
1099         * Makefile.am (libopcodes_la_DEPENDENCIES)
1100         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1101         comment about the problem.
1102         * Makefile.in: Regenerate.
1103
1104 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1105
1106         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1107         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1108         cut&paste errors in shifting/truncating numerical operands.
1109         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1110         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1111         (parse_uslo16): Likewise.
1112         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1113         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1114         (parse_s12): Likewise.
1115         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1116         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1117         (parse_uslo16): Likewise.
1118         (parse_uhi16): Parse gothi and gotfuncdeschi.
1119         (parse_d12): Parse got12 and gotfuncdesc12.
1120         (parse_s12): Likewise.
1121
1122 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1123
1124         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1125         instruction which looks similar to an 'rla' instruction.
1126
1127 For older changes see ChangeLog-0203
1128 \f
1129 Local Variables:
1130 mode: change-log
1131 left-margin: 8
1132 fill-column: 74
1133 version-control: never
1134 End: