opcodes/aarch64-asm-2.c

   1 /* This file is automatically generated by aarch64-gen.  Do not edit!  */
   2 /* Copyright (C) 2012-2014 Free Software Foundation, Inc.
   3    Contributed by ARM Ltd.
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; see the file COPYING3. If not,
  19    see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "sysdep.h"
  22 #include "aarch64-asm.h"
  23
  24
  25 const aarch64_opcode *
  26 aarch64_find_real_opcode (const aarch64_opcode *opcode)
  27 {
  28   /* Use the index as the key to locate the real opcode.  */
  29   int key = opcode - aarch64_opcode_table;
  30   int value;
  31   switch (key)
  32     {
  33     case 3:     /* ngc */
  34       value = 2;        /* --> sbc.  */
  35       break;
  36     case 5:     /* ngcs */
  37       value = 4;        /* --> sbcs.  */
  38       break;
  39     case 8:     /* cmn */
  40       value = 7;        /* --> adds.  */
  41       break;
  42     case 11:    /* cmp */
  43       value = 10;       /* --> subs.  */
  44       break;
  45     case 13:    /* mov */
  46       value = 12;       /* --> add.  */
  47       break;
  48     case 15:    /* cmn */
  49       value = 14;       /* --> adds.  */
  50       break;
  51     case 18:    /* cmp */
  52       value = 17;       /* --> subs.  */
  53       break;
  54     case 21:    /* cmn */
  55       value = 20;       /* --> adds.  */
  56       break;
  57     case 23:    /* neg */
  58       value = 22;       /* --> sub.  */
  59       break;
  60     case 26:    /* negs */
  61     case 25:    /* cmp */
  62       value = 24;       /* --> subs.  */
  63       break;
  64     case 139:   /* mov */
  65       value = 138;      /* --> umov.  */
  66       break;
  67     case 141:   /* mov */
  68       value = 140;      /* --> ins.  */
  69       break;
  70     case 143:   /* mov */
  71       value = 142;      /* --> ins.  */
  72       break;
  73     case 204:   /* mvn */
  74       value = 203;      /* --> not.  */
  75       break;
  76     case 259:   /* mov */
  77       value = 258;      /* --> orr.  */
  78       break;
  79     case 314:   /* sxtl */
  80       value = 313;      /* --> sshll.  */
  81       break;
  82     case 316:   /* sxtl2 */
  83       value = 315;      /* --> sshll2.  */
  84       break;
  85     case 336:   /* uxtl */
  86       value = 335;      /* --> ushll.  */
  87       break;
  88     case 338:   /* uxtl2 */
  89       value = 337;      /* --> ushll2.  */
  90       break;
  91     case 431:   /* mov */
  92       value = 430;      /* --> dup.  */
  93       break;
  94     case 498:   /* sxtw */
  95     case 497:   /* sxth */
  96     case 496:   /* sxtb */
  97     case 499:   /* asr */
  98     case 495:   /* sbfx */
  99     case 494:   /* sbfiz */
 100       value = 493;      /* --> sbfm.  */
 101       break;
 102     case 502:   /* bfxil */
 103     case 501:   /* bfi */
 104       value = 500;      /* --> bfm.  */
 105       break;
 106     case 507:   /* uxth */
 107     case 506:   /* uxtb */
 108     case 509:   /* lsr */
 109     case 508:   /* lsl */
 110     case 505:   /* ubfx */
 111     case 504:   /* ubfiz */
 112       value = 503;      /* --> ubfm.  */
 113       break;
 114     case 527:   /* cset */
 115     case 526:   /* cinc */
 116       value = 525;      /* --> csinc.  */
 117       break;
 118     case 530:   /* csetm */
 119     case 529:   /* cinv */
 120       value = 528;      /* --> csinv.  */
 121       break;
 122     case 532:   /* cneg */
 123       value = 531;      /* --> csneg.  */
 124       break;
 125     case 557:   /* lsl */
 126       value = 556;      /* --> lslv.  */
 127       break;
 128     case 559:   /* lsr */
 129       value = 558;      /* --> lsrv.  */
 130       break;
 131     case 561:   /* asr */
 132       value = 560;      /* --> asrv.  */
 133       break;
 134     case 563:   /* ror */
 135       value = 562;      /* --> rorv.  */
 136       break;
 137     case 573:   /* mul */
 138       value = 572;      /* --> madd.  */
 139       break;
 140     case 575:   /* mneg */
 141       value = 574;      /* --> msub.  */
 142       break;
 143     case 577:   /* smull */
 144       value = 576;      /* --> smaddl.  */
 145       break;
 146     case 579:   /* smnegl */
 147       value = 578;      /* --> smsubl.  */
 148       break;
 149     case 582:   /* umull */
 150       value = 581;      /* --> umaddl.  */
 151       break;
 152     case 584:   /* umnegl */
 153       value = 583;      /* --> umsubl.  */
 154       break;
 155     case 595:   /* ror */
 156       value = 594;      /* --> extr.  */
 157       break;
 158     case 695:   /* strb */
 159       value = 693;      /* --> sturb.  */
 160       break;
 161     case 696:   /* ldrb */
 162       value = 694;      /* --> ldurb.  */
 163       break;
 164     case 698:   /* ldrsb */
 165       value = 697;      /* --> ldursb.  */
 166       break;
 167     case 701:   /* str */
 168       value = 699;      /* --> stur.  */
 169       break;
 170     case 702:   /* ldr */
 171       value = 700;      /* --> ldur.  */
 172       break;
 173     case 705:   /* strh */
 174       value = 703;      /* --> sturh.  */
 175       break;
 176     case 706:   /* ldrh */
 177       value = 704;      /* --> ldurh.  */
 178       break;
 179     case 708:   /* ldrsh */
 180       value = 707;      /* --> ldursh.  */
 181       break;
 182     case 711:   /* str */
 183       value = 709;      /* --> stur.  */
 184       break;
 185     case 712:   /* ldr */
 186       value = 710;      /* --> ldur.  */
 187       break;
 188     case 714:   /* ldrsw */
 189       value = 713;      /* --> ldursw.  */
 190       break;
 191     case 716:   /* prfm */
 192       value = 715;      /* --> prfum.  */
 193       break;
 194     case 758:   /* bic */
 195       value = 757;      /* --> and.  */
 196       break;
 197     case 760:   /* mov */
 198       value = 759;      /* --> orr.  */
 199       break;
 200     case 763:   /* tst */
 201       value = 762;      /* --> ands.  */
 202       break;
 203     case 768:   /* uxtw */
 204     case 767:   /* mov */
 205       value = 766;      /* --> orr.  */
 206       break;
 207     case 770:   /* mvn */
 208       value = 769;      /* --> orn.  */
 209       break;
 210     case 774:   /* tst */
 211       value = 773;      /* --> ands.  */
 212       break;
 213     case 777:   /* mov */
 214       value = 776;      /* --> movn.  */
 215       break;
 216     case 779:   /* mov */
 217       value = 778;      /* --> movz.  */
 218       break;
 219     case 790:   /* sevl */
 220     case 789:   /* sev */
 221     case 788:   /* wfi */
 222     case 787:   /* wfe */
 223     case 786:   /* yield */
 224     case 785:   /* nop */
 225       value = 784;      /* --> hint.  */
 226       break;
 227     case 799:   /* tlbi */
 228     case 798:   /* ic */
 229     case 797:   /* dc */
 230     case 796:   /* at */
 231       value = 795;      /* --> sys.  */
 232       break;
 233     default: return NULL;
 234     }
 235
 236   return aarch64_opcode_table + value;
 237 }
 238
 239 const char*
 240 aarch64_insert_operand (const aarch64_operand *self,
 241                            const aarch64_opnd_info *info,
 242                            aarch64_insn *code, const aarch64_inst *inst)
 243 {
 244   /* Use the index as the key.  */
 245   int key = self - aarch64_operands;
 246   switch (key)
 247     {
 248     case 1:
 249     case 2:
 250     case 3:
 251     case 4:
 252     case 5:
 253     case 6:
 254     case 7:
 255     case 8:
 256     case 9:
 257     case 10:
 258     case 13:
 259     case 14:
 260     case 15:
 261     case 16:
 262     case 18:
 263     case 19:
 264     case 20:
 265     case 21:
 266     case 22:
 267     case 23:
 268     case 24:
 269     case 25:
 270     case 26:
 271     case 34:
 272     case 35:
 273       return aarch64_ins_regno (self, info, code, inst);
 274     case 11:
 275       return aarch64_ins_reg_extended (self, info, code, inst);
 276     case 12:
 277       return aarch64_ins_reg_shifted (self, info, code, inst);
 278     case 17:
 279       return aarch64_ins_ft (self, info, code, inst);
 280     case 27:
 281     case 28:
 282     case 29:
 283       return aarch64_ins_reglane (self, info, code, inst);
 284     case 30:
 285       return aarch64_ins_reglist (self, info, code, inst);
 286     case 31:
 287       return aarch64_ins_ldst_reglist (self, info, code, inst);
 288     case 32:
 289       return aarch64_ins_ldst_reglist_r (self, info, code, inst);
 290     case 33:
 291       return aarch64_ins_ldst_elemlist (self, info, code, inst);
 292     case 36:
 293     case 45:
 294     case 46:
 295     case 47:
 296     case 48:
 297     case 49:
 298     case 50:
 299     case 51:
 300     case 52:
 301     case 53:
 302     case 54:
 303     case 55:
 304     case 56:
 305     case 57:
 306     case 66:
 307     case 67:
 308     case 68:
 309     case 69:
 310       return aarch64_ins_imm (self, info, code, inst);
 311     case 37:
 312     case 38:
 313       return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
 314     case 39:
 315     case 40:
 316     case 41:
 317       return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
 318     case 58:
 319       return aarch64_ins_limm (self, info, code, inst);
 320     case 59:
 321       return aarch64_ins_aimm (self, info, code, inst);
 322     case 60:
 323       return aarch64_ins_imm_half (self, info, code, inst);
 324     case 61:
 325       return aarch64_ins_fbits (self, info, code, inst);
 326     case 63:
 327     case 64:
 328       return aarch64_ins_cond (self, info, code, inst);
 329     case 70:
 330     case 76:
 331       return aarch64_ins_addr_simple (self, info, code, inst);
 332     case 71:
 333       return aarch64_ins_addr_regoff (self, info, code, inst);
 334     case 72:
 335     case 73:
 336     case 74:
 337       return aarch64_ins_addr_simm (self, info, code, inst);
 338     case 75:
 339       return aarch64_ins_addr_uimm12 (self, info, code, inst);
 340     case 77:
 341       return aarch64_ins_simd_addr_post (self, info, code, inst);
 342     case 78:
 343       return aarch64_ins_sysreg (self, info, code, inst);
 344     case 79:
 345       return aarch64_ins_pstatefield (self, info, code, inst);
 346     case 80:
 347     case 81:
 348     case 82:
 349     case 83:
 350       return aarch64_ins_sysins_op (self, info, code, inst);
 351     case 84:
 352     case 85:
 353       return aarch64_ins_barrier (self, info, code, inst);
 354     case 86:
 355       return aarch64_ins_prfop (self, info, code, inst);
 356     default: assert (0); abort ();
 357     }
 358 }