[AARCH64] Remove Load/Store register (unscaled immediate) alias.
[deliverable/binutils-gdb.git] / opcodes / aarch64-asm-2.c
1 /* This file is automatically generated by aarch64-gen. Do not edit! */
2 /* Copyright (C) 2012-2015 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21 #include "sysdep.h"
22 #include "aarch64-asm.h"
23
24
25 const aarch64_opcode *
26 aarch64_find_real_opcode (const aarch64_opcode *opcode)
27 {
28 /* Use the index as the key to locate the real opcode. */
29 int key = opcode - aarch64_opcode_table;
30 int value;
31 switch (key)
32 {
33 case 3: /* ngc */
34 value = 2; /* --> sbc. */
35 break;
36 case 5: /* ngcs */
37 value = 4; /* --> sbcs. */
38 break;
39 case 8: /* cmn */
40 value = 7; /* --> adds. */
41 break;
42 case 11: /* cmp */
43 value = 10; /* --> subs. */
44 break;
45 case 13: /* mov */
46 value = 12; /* --> add. */
47 break;
48 case 15: /* cmn */
49 value = 14; /* --> adds. */
50 break;
51 case 18: /* cmp */
52 value = 17; /* --> subs. */
53 break;
54 case 21: /* cmn */
55 value = 20; /* --> adds. */
56 break;
57 case 23: /* neg */
58 value = 22; /* --> sub. */
59 break;
60 case 26: /* negs */
61 case 25: /* cmp */
62 value = 24; /* --> subs. */
63 break;
64 case 139: /* mov */
65 value = 138; /* --> umov. */
66 break;
67 case 141: /* mov */
68 value = 140; /* --> ins. */
69 break;
70 case 143: /* mov */
71 value = 142; /* --> ins. */
72 break;
73 case 204: /* mvn */
74 value = 203; /* --> not. */
75 break;
76 case 259: /* mov */
77 value = 258; /* --> orr. */
78 break;
79 case 314: /* sxtl */
80 value = 313; /* --> sshll. */
81 break;
82 case 316: /* sxtl2 */
83 value = 315; /* --> sshll2. */
84 break;
85 case 336: /* uxtl */
86 value = 335; /* --> ushll. */
87 break;
88 case 338: /* uxtl2 */
89 value = 337; /* --> ushll2. */
90 break;
91 case 431: /* mov */
92 value = 430; /* --> dup. */
93 break;
94 case 498: /* sxtw */
95 case 497: /* sxth */
96 case 496: /* sxtb */
97 case 499: /* asr */
98 case 495: /* sbfx */
99 case 494: /* sbfiz */
100 value = 493; /* --> sbfm. */
101 break;
102 case 502: /* bfxil */
103 case 501: /* bfi */
104 value = 500; /* --> bfm. */
105 break;
106 case 507: /* uxth */
107 case 506: /* uxtb */
108 case 509: /* lsr */
109 case 508: /* lsl */
110 case 505: /* ubfx */
111 case 504: /* ubfiz */
112 value = 503; /* --> ubfm. */
113 break;
114 case 527: /* cset */
115 case 526: /* cinc */
116 value = 525; /* --> csinc. */
117 break;
118 case 530: /* csetm */
119 case 529: /* cinv */
120 value = 528; /* --> csinv. */
121 break;
122 case 532: /* cneg */
123 value = 531; /* --> csneg. */
124 break;
125 case 557: /* lsl */
126 value = 556; /* --> lslv. */
127 break;
128 case 559: /* lsr */
129 value = 558; /* --> lsrv. */
130 break;
131 case 561: /* asr */
132 value = 560; /* --> asrv. */
133 break;
134 case 563: /* ror */
135 value = 562; /* --> rorv. */
136 break;
137 case 573: /* mul */
138 value = 572; /* --> madd. */
139 break;
140 case 575: /* mneg */
141 value = 574; /* --> msub. */
142 break;
143 case 577: /* smull */
144 value = 576; /* --> smaddl. */
145 break;
146 case 579: /* smnegl */
147 value = 578; /* --> smsubl. */
148 break;
149 case 582: /* umull */
150 value = 581; /* --> umaddl. */
151 break;
152 case 584: /* umnegl */
153 value = 583; /* --> umsubl. */
154 break;
155 case 595: /* ror */
156 value = 594; /* --> extr. */
157 break;
158 case 746: /* bic */
159 value = 745; /* --> and. */
160 break;
161 case 748: /* mov */
162 value = 747; /* --> orr. */
163 break;
164 case 751: /* tst */
165 value = 750; /* --> ands. */
166 break;
167 case 756: /* uxtw */
168 case 755: /* mov */
169 value = 754; /* --> orr. */
170 break;
171 case 758: /* mvn */
172 value = 757; /* --> orn. */
173 break;
174 case 762: /* tst */
175 value = 761; /* --> ands. */
176 break;
177 case 888: /* staddb */
178 value = 792; /* --> ldaddb. */
179 break;
180 case 889: /* staddh */
181 value = 793; /* --> ldaddh. */
182 break;
183 case 890: /* stadd */
184 value = 794; /* --> ldadd. */
185 break;
186 case 891: /* staddlb */
187 value = 796; /* --> ldaddlb. */
188 break;
189 case 892: /* staddlh */
190 value = 799; /* --> ldaddlh. */
191 break;
192 case 893: /* staddl */
193 value = 802; /* --> ldaddl. */
194 break;
195 case 894: /* stclrb */
196 value = 804; /* --> ldclrb. */
197 break;
198 case 895: /* stclrh */
199 value = 805; /* --> ldclrh. */
200 break;
201 case 896: /* stclr */
202 value = 806; /* --> ldclr. */
203 break;
204 case 897: /* stclrlb */
205 value = 808; /* --> ldclrlb. */
206 break;
207 case 898: /* stclrlh */
208 value = 811; /* --> ldclrlh. */
209 break;
210 case 899: /* stclrl */
211 value = 814; /* --> ldclrl. */
212 break;
213 case 900: /* steorb */
214 value = 816; /* --> ldeorb. */
215 break;
216 case 901: /* steorh */
217 value = 817; /* --> ldeorh. */
218 break;
219 case 902: /* steor */
220 value = 818; /* --> ldeor. */
221 break;
222 case 903: /* steorlb */
223 value = 820; /* --> ldeorlb. */
224 break;
225 case 904: /* steorlh */
226 value = 823; /* --> ldeorlh. */
227 break;
228 case 905: /* steorl */
229 value = 826; /* --> ldeorl. */
230 break;
231 case 906: /* stsetb */
232 value = 828; /* --> ldsetb. */
233 break;
234 case 907: /* stseth */
235 value = 829; /* --> ldseth. */
236 break;
237 case 908: /* stset */
238 value = 830; /* --> ldset. */
239 break;
240 case 909: /* stsetlb */
241 value = 832; /* --> ldsetlb. */
242 break;
243 case 910: /* stsetlh */
244 value = 835; /* --> ldsetlh. */
245 break;
246 case 911: /* stsetl */
247 value = 838; /* --> ldsetl. */
248 break;
249 case 912: /* stsmaxb */
250 value = 840; /* --> ldsmaxb. */
251 break;
252 case 913: /* stsmaxh */
253 value = 841; /* --> ldsmaxh. */
254 break;
255 case 914: /* stsmax */
256 value = 842; /* --> ldsmax. */
257 break;
258 case 915: /* stsmaxlb */
259 value = 844; /* --> ldsmaxlb. */
260 break;
261 case 916: /* stsmaxlh */
262 value = 847; /* --> ldsmaxlh. */
263 break;
264 case 917: /* stsmaxl */
265 value = 850; /* --> ldsmaxl. */
266 break;
267 case 918: /* stsminb */
268 value = 852; /* --> ldsminb. */
269 break;
270 case 919: /* stsminh */
271 value = 853; /* --> ldsminh. */
272 break;
273 case 920: /* stsmin */
274 value = 854; /* --> ldsmin. */
275 break;
276 case 921: /* stsminlb */
277 value = 856; /* --> ldsminlb. */
278 break;
279 case 922: /* stsminlh */
280 value = 859; /* --> ldsminlh. */
281 break;
282 case 923: /* stsminl */
283 value = 862; /* --> ldsminl. */
284 break;
285 case 924: /* stumaxb */
286 value = 864; /* --> ldumaxb. */
287 break;
288 case 925: /* stumaxh */
289 value = 865; /* --> ldumaxh. */
290 break;
291 case 926: /* stumax */
292 value = 866; /* --> ldumax. */
293 break;
294 case 927: /* stumaxlb */
295 value = 868; /* --> ldumaxlb. */
296 break;
297 case 928: /* stumaxlh */
298 value = 871; /* --> ldumaxlh. */
299 break;
300 case 929: /* stumaxl */
301 value = 874; /* --> ldumaxl. */
302 break;
303 case 930: /* stuminb */
304 value = 876; /* --> lduminb. */
305 break;
306 case 931: /* stuminh */
307 value = 877; /* --> lduminh. */
308 break;
309 case 932: /* stumin */
310 value = 878; /* --> ldumin. */
311 break;
312 case 933: /* stuminlb */
313 value = 880; /* --> lduminlb. */
314 break;
315 case 934: /* stuminlh */
316 value = 883; /* --> lduminlh. */
317 break;
318 case 935: /* stuminl */
319 value = 886; /* --> lduminl. */
320 break;
321 case 937: /* mov */
322 value = 936; /* --> movn. */
323 break;
324 case 939: /* mov */
325 value = 938; /* --> movz. */
326 break;
327 case 950: /* sevl */
328 case 949: /* sev */
329 case 948: /* wfi */
330 case 947: /* wfe */
331 case 946: /* yield */
332 case 945: /* nop */
333 value = 944; /* --> hint. */
334 break;
335 case 959: /* tlbi */
336 case 958: /* ic */
337 case 957: /* dc */
338 case 956: /* at */
339 value = 955; /* --> sys. */
340 break;
341 default: return NULL;
342 }
343
344 return aarch64_opcode_table + value;
345 }
346
347 const char*
348 aarch64_insert_operand (const aarch64_operand *self,
349 const aarch64_opnd_info *info,
350 aarch64_insn *code, const aarch64_inst *inst)
351 {
352 /* Use the index as the key. */
353 int key = self - aarch64_operands;
354 switch (key)
355 {
356 case 1:
357 case 2:
358 case 3:
359 case 4:
360 case 5:
361 case 6:
362 case 7:
363 case 8:
364 case 9:
365 case 10:
366 case 14:
367 case 15:
368 case 16:
369 case 17:
370 case 19:
371 case 20:
372 case 21:
373 case 22:
374 case 23:
375 case 24:
376 case 25:
377 case 26:
378 case 27:
379 case 35:
380 case 36:
381 return aarch64_ins_regno (self, info, code, inst);
382 case 12:
383 return aarch64_ins_reg_extended (self, info, code, inst);
384 case 13:
385 return aarch64_ins_reg_shifted (self, info, code, inst);
386 case 18:
387 return aarch64_ins_ft (self, info, code, inst);
388 case 28:
389 case 29:
390 case 30:
391 return aarch64_ins_reglane (self, info, code, inst);
392 case 31:
393 return aarch64_ins_reglist (self, info, code, inst);
394 case 32:
395 return aarch64_ins_ldst_reglist (self, info, code, inst);
396 case 33:
397 return aarch64_ins_ldst_reglist_r (self, info, code, inst);
398 case 34:
399 return aarch64_ins_ldst_elemlist (self, info, code, inst);
400 case 37:
401 case 46:
402 case 47:
403 case 48:
404 case 49:
405 case 50:
406 case 51:
407 case 52:
408 case 53:
409 case 54:
410 case 55:
411 case 56:
412 case 57:
413 case 58:
414 case 67:
415 case 68:
416 case 69:
417 case 70:
418 return aarch64_ins_imm (self, info, code, inst);
419 case 38:
420 case 39:
421 return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
422 case 40:
423 case 41:
424 case 42:
425 return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
426 case 59:
427 return aarch64_ins_limm (self, info, code, inst);
428 case 60:
429 return aarch64_ins_aimm (self, info, code, inst);
430 case 61:
431 return aarch64_ins_imm_half (self, info, code, inst);
432 case 62:
433 return aarch64_ins_fbits (self, info, code, inst);
434 case 64:
435 case 65:
436 return aarch64_ins_cond (self, info, code, inst);
437 case 71:
438 case 77:
439 return aarch64_ins_addr_simple (self, info, code, inst);
440 case 72:
441 return aarch64_ins_addr_regoff (self, info, code, inst);
442 case 73:
443 case 74:
444 case 75:
445 return aarch64_ins_addr_simm (self, info, code, inst);
446 case 76:
447 return aarch64_ins_addr_uimm12 (self, info, code, inst);
448 case 78:
449 return aarch64_ins_simd_addr_post (self, info, code, inst);
450 case 79:
451 return aarch64_ins_sysreg (self, info, code, inst);
452 case 80:
453 return aarch64_ins_pstatefield (self, info, code, inst);
454 case 81:
455 case 82:
456 case 83:
457 case 84:
458 return aarch64_ins_sysins_op (self, info, code, inst);
459 case 85:
460 case 86:
461 return aarch64_ins_barrier (self, info, code, inst);
462 case 87:
463 return aarch64_ins_prfop (self, info, code, inst);
464 default: assert (0); abort ();
465 }
466 }
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