1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
29 /* FIXME: This shouldn't be done here */
31 #include "elf/internal.h"
34 static char *arm_conditional
[] =
35 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
36 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
38 static char *arm_regnames
[] =
39 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
40 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
42 static char *arm_fp_const
[] =
43 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
45 static char *arm_shift
[] =
46 {"lsl", "lsr", "asr", "ror"};
48 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
52 arm_decode_shift (given
, func
, stream
)
57 func (stream
, "%s", arm_regnames
[given
& 0xf]);
58 if ((given
& 0xff0) != 0)
60 if ((given
& 0x10) == 0)
62 int amount
= (given
& 0xf80) >> 7;
63 int shift
= (given
& 0x60) >> 5;
68 func (stream
, ", rrx");
73 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
76 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
77 arm_regnames
[(given
& 0xf00) >> 8]);
81 /* Print one instruction from PC on INFO->STREAM.
82 Return the size of the instruction (always 4 on ARM). */
85 print_insn_arm (pc
, info
, given
)
87 struct disassemble_info
*info
;
90 struct arm_opcode
* insn
;
91 void * stream
= info
->stream
;
92 fprintf_ftype func
= info
->fprintf_func
;
94 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
96 if ((given
& insn
->mask
) == insn
->value
)
100 for (c
= insn
->assembler
; *c
; c
++)
111 if (((given
& 0x000f0000) == 0x000f0000)
112 && ((given
& 0x02000000) == 0))
114 int offset
= given
& 0xfff;
116 func (stream
, "[pc");
118 if (given
& 0x01000000)
120 if ((given
& 0x00800000) == 0)
124 func (stream
, ", #%x]", offset
);
128 /* Cope with the possibility of write-back being used.
129 Probably a very dangerous thing for the programmer
130 to do, but who are we to argue ? */
131 if (given
& 0x00200000)
137 func (stream
, "], #%x", offset
);
139 offset
= pc
+ 8; /* ie ignore the offset */
142 func (stream
, "\t; ");
143 info
->print_address_func (offset
, info
);
148 arm_regnames
[(given
>> 16) & 0xf]);
149 if ((given
& 0x01000000) != 0)
151 if ((given
& 0x02000000) == 0)
153 int offset
= given
& 0xfff;
155 func (stream
, ", %s#%d",
156 (((given
& 0x00800000) == 0)
157 ? "-" : ""), offset
);
161 func (stream
, ", %s",
162 (((given
& 0x00800000) == 0)
164 arm_decode_shift (given
, func
, stream
);
168 ((given
& 0x00200000) != 0) ? "!" : "");
172 if ((given
& 0x02000000) == 0)
174 int offset
= given
& 0xfff;
176 func (stream
, "], %s#%d",
177 (((given
& 0x00800000) == 0)
178 ? "-" : ""), offset
);
184 func (stream
, "], %s",
185 (((given
& 0x00800000) == 0)
187 arm_decode_shift (given
, func
, stream
);
194 if ((given
& 0x004f0000) == 0x004f0000)
196 /* PC relative with immediate offset */
197 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
198 if ((given
& 0x00800000) == 0)
200 (*info
->print_address_func
)
201 (offset
+ pc
+ 8, info
);
206 arm_regnames
[(given
>> 16) & 0xf]);
207 if ((given
& 0x01000000) != 0)
210 if ((given
& 0x00400000) == 0x00400000)
213 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
215 func (stream
, ", %s#%d",
216 (((given
& 0x00800000) == 0)
217 ? "-" : ""), offset
);
222 func (stream
, ", %s%s",
223 (((given
& 0x00800000) == 0)
225 arm_regnames
[given
& 0xf]);
229 ((given
& 0x00200000) != 0) ? "!" : "");
234 if ((given
& 0x00400000) == 0x00400000)
237 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
239 func (stream
, "], %s#%d",
240 (((given
& 0x00800000) == 0)
241 ? "-" : ""), offset
);
248 func (stream
, "], %s%s",
249 (((given
& 0x00800000) == 0)
251 arm_regnames
[given
& 0xf]);
258 (*info
->print_address_func
)
259 (BDISP (given
) * 4 + pc
+ 8, info
);
264 arm_conditional
[(given
>> 28) & 0xf]);
273 for (reg
= 0; reg
< 16; reg
++)
274 if ((given
& (1 << reg
)) != 0)
279 func (stream
, "%s", arm_regnames
[reg
]);
286 if ((given
& 0x02000000) != 0)
288 int rotate
= (given
& 0xf00) >> 7;
289 int immed
= (given
& 0xff);
291 ((immed
<< (32 - rotate
))
292 | (immed
>> rotate
)) & 0xffffffff);
295 arm_decode_shift (given
, func
, stream
);
299 if ((given
& 0x0000f000) == 0x0000f000)
304 if ((given
& 0x01200000) == 0x00200000)
309 if ((given
& 0x00000020) == 0x00000020)
316 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
317 if ((given
& 0x01000000) != 0)
319 int offset
= given
& 0xff;
321 func (stream
, ", %s#%d]%s",
322 ((given
& 0x00800000) == 0 ? "-" : ""),
324 ((given
& 0x00200000) != 0 ? "!" : ""));
330 int offset
= given
& 0xff;
332 func (stream
, "], %s#%d",
333 ((given
& 0x00800000) == 0 ? "-" : ""),
341 switch (given
& 0x00090000)
344 func (stream
, "_???");
347 func (stream
, "_all");
350 func (stream
, "_ctl");
353 func (stream
, "_flg");
359 switch (given
& 0x00408000)
376 switch (given
& 0x00080080)
388 func (stream
, _("<illegal precision>"));
393 switch (given
& 0x00408000)
410 switch (given
& 0x60)
426 case '0': case '1': case '2': case '3': case '4':
427 case '5': case '6': case '7': case '8': case '9':
429 int bitstart
= *c
++ - '0';
431 while (*c
>= '0' && *c
<= '9')
432 bitstart
= (bitstart
* 10) + *c
++ - '0';
438 while (*c
>= '0' && *c
<= '9')
439 bitend
= (bitend
* 10) + *c
++ - '0';
447 reg
= given
>> bitstart
;
448 reg
&= (2 << (bitend
- bitstart
)) - 1;
449 func (stream
, "%s", arm_regnames
[reg
]);
455 reg
= given
>> bitstart
;
456 reg
&= (2 << (bitend
- bitstart
)) - 1;
457 func (stream
, "%d", reg
);
463 reg
= given
>> bitstart
;
464 reg
&= (2 << (bitend
- bitstart
)) - 1;
465 func (stream
, "0x%08x", reg
);
471 reg
= given
>> bitstart
;
472 reg
&= (2 << (bitend
- bitstart
)) - 1;
475 arm_fp_const
[reg
& 7]);
477 func (stream
, "f%d", reg
);
486 if ((given
& (1 << bitstart
)) == 0)
487 func (stream
, "%c", *c
);
491 if ((given
& (1 << bitstart
)) != 0)
492 func (stream
, "%c", *c
);
496 if ((given
& (1 << bitstart
)) != 0)
497 func (stream
, "%c", *c
++);
499 func (stream
, "%c", *++c
);
512 func (stream
, "%c", *c
);
520 /* Print one instruction from PC on INFO->STREAM.
521 Return the size of the instruction. */
524 print_insn_thumb (pc
, info
, given
)
526 struct disassemble_info
*info
;
529 struct thumb_opcode
*insn
;
530 void *stream
= info
->stream
;
531 fprintf_ftype func
= info
->fprintf_func
;
533 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
535 if ((given
& insn
->mask
) == insn
->value
)
537 char *c
= insn
->assembler
;
539 /* Special processing for Thumb 2 instruction BL sequence: */
540 if (!*c
) /* check for empty (not NULL) assembler string */
542 info
->bytes_per_chunk
= 4;
543 info
->bytes_per_line
= 4;
545 func (stream
, "%04x\tbl\t", given
& 0xffff);
546 (*info
->print_address_func
)
547 (BDISP23 (given
) * 2 + pc
+ 4, info
);
552 info
->bytes_per_chunk
= 2;
553 info
->bytes_per_line
= 4;
556 func (stream
, "%04x\t", given
);
572 reg
= (given
>> 3) & 0x7;
573 if (given
& (1 << 6))
575 func (stream
, "%s", arm_regnames
[reg
]);
583 if (given
& (1 << 7))
585 func (stream
, "%s", arm_regnames
[reg
]);
591 arm_conditional
[(given
>> 8) & 0xf]);
595 if (given
& (1 << 8))
599 if (*c
== 'O' && (given
& (1 << 8)))
607 /* It would be nice if we could spot
608 ranges, and generate the rS-rE format: */
609 for (reg
= 0; (reg
< 8); reg
++)
610 if ((given
& (1 << reg
)) != 0)
615 func (stream
, "%s", arm_regnames
[reg
]);
638 case '0': case '1': case '2': case '3': case '4':
639 case '5': case '6': case '7': case '8': case '9':
641 int bitstart
= *c
++ - '0';
643 while (*c
>= '0' && *c
<= '9')
644 bitstart
= (bitstart
* 10) + *c
++ - '0';
652 while (*c
>= '0' && *c
<= '9')
653 bitend
= (bitend
* 10) + *c
++ - '0';
656 reg
= given
>> bitstart
;
657 reg
&= (2 << (bitend
- bitstart
)) - 1;
661 func (stream
, "%s", arm_regnames
[reg
]);
665 func (stream
, "%d", reg
);
669 func (stream
, "%d", reg
<< 1);
673 func (stream
, "%d", reg
<< 2);
677 /* PC-relative address -- the bottom two
678 bits of the address are dropped before
680 info
->print_address_func
681 (((pc
+ 4) & ~3) + (reg
<< 2), info
);
685 func (stream
, "0x%04x", reg
);
689 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
690 func (stream
, "%d", reg
);
694 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
695 (*info
->print_address_func
)
696 (reg
* 2 + pc
+ 4, info
);
707 if ((given
& (1 << bitstart
)) != 0)
708 func (stream
, "%c", *c
);
713 if ((given
& (1 << bitstart
)) != 0)
714 func (stream
, "%c", *c
++);
716 func (stream
, "%c", *++c
);
730 func (stream
, "%c", *c
);
741 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
744 print_insn_big_arm (pc
, info
)
746 struct disassemble_info
*info
;
751 coff_symbol_type
*cs
;
756 if (info
->symbols
!= NULL
)
758 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
760 cs
= coffsymbol (*info
->symbols
);
761 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
762 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
763 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
764 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
765 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
768 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
770 es
= *(elf_symbol_type
**)(info
->symbols
);
771 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
776 info
->bytes_per_chunk
= 4;
777 info
->display_endian
= BFD_ENDIAN_BIG
;
779 /* Always fetch word aligned values. */
781 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
784 (*info
->memory_error_func
) (status
, pc
, info
);
792 given
= (b
[2] << 8) | b
[3];
794 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
797 info
->memory_error_func (status
, pc
+ 4, info
);
801 given
|= (b
[0] << 24) | (b
[1] << 16);
805 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
810 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
815 status
= print_insn_thumb (pc
, info
, given
);
819 status
= print_insn_arm (pc
, info
, given
);
826 print_insn_little_arm (pc
, info
)
828 struct disassemble_info
* info
;
833 coff_symbol_type
*cs
;
838 if (info
->symbols
!= NULL
)
840 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
842 cs
= coffsymbol (*info
->symbols
);
843 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
844 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
845 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
846 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
847 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
850 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
852 es
= *(elf_symbol_type
**)(info
->symbols
);
853 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
858 info
->bytes_per_chunk
= 4;
859 info
->display_endian
= BFD_ENDIAN_LITTLE
;
861 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
862 if (status
!= 0 && is_thumb
)
864 info
->bytes_per_chunk
= 2;
866 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
871 (*info
->memory_error_func
) (status
, pc
, info
);
875 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
879 status
= print_insn_thumb (pc
, info
, given
);
883 status
= print_insn_arm (pc
, info
, given
);
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