1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
29 /* FIXME: This shouldn't be done here */
31 #include "elf/internal.h"
34 static char *arm_conditional
[] =
35 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
36 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
38 static char *arm_regnames_raw
[] =
39 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
40 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"};
42 static char *arm_regnames_standard
[] =
43 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};
46 static char *arm_regnames_apcs
[] =
47 {"a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4",
48 "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc"};
50 /* Choose which register name set to use. */
51 static char **arm_regnames
= arm_regnames_standard
;
53 static char *arm_fp_const
[] =
54 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
56 static char *arm_shift
[] =
57 {"lsl", "lsr", "asr", "ror"};
59 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
63 arm_decode_shift (given
, func
, stream
)
68 func (stream
, "%s", arm_regnames
[given
& 0xf]);
69 if ((given
& 0xff0) != 0)
71 if ((given
& 0x10) == 0)
73 int amount
= (given
& 0xf80) >> 7;
74 int shift
= (given
& 0x60) >> 5;
79 func (stream
, ", rrx");
84 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
87 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
88 arm_regnames
[(given
& 0xf00) >> 8]);
92 /* Print one instruction from PC on INFO->STREAM.
93 Return the size of the instruction (always 4 on ARM). */
96 print_insn_arm (pc
, info
, given
)
98 struct disassemble_info
*info
;
101 struct arm_opcode
* insn
;
102 void * stream
= info
->stream
;
103 fprintf_ftype func
= info
->fprintf_func
;
105 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
107 if ((given
& insn
->mask
) == insn
->value
)
111 for (c
= insn
->assembler
; *c
; c
++)
122 if (((given
& 0x000f0000) == 0x000f0000)
123 && ((given
& 0x02000000) == 0))
125 int offset
= given
& 0xfff;
127 func (stream
, "[pc");
129 if (given
& 0x01000000)
131 if ((given
& 0x00800000) == 0)
135 func (stream
, ", #%x]", offset
);
139 /* Cope with the possibility of write-back being used.
140 Probably a very dangerous thing for the programmer
141 to do, but who are we to argue ? */
142 if (given
& 0x00200000)
148 func (stream
, "], #%x", offset
);
150 offset
= pc
+ 8; /* ie ignore the offset */
153 func (stream
, "\t; ");
154 info
->print_address_func (offset
, info
);
159 arm_regnames
[(given
>> 16) & 0xf]);
160 if ((given
& 0x01000000) != 0)
162 if ((given
& 0x02000000) == 0)
164 int offset
= given
& 0xfff;
166 func (stream
, ", %s#%d",
167 (((given
& 0x00800000) == 0)
168 ? "-" : ""), offset
);
172 func (stream
, ", %s",
173 (((given
& 0x00800000) == 0)
175 arm_decode_shift (given
, func
, stream
);
179 ((given
& 0x00200000) != 0) ? "!" : "");
183 if ((given
& 0x02000000) == 0)
185 int offset
= given
& 0xfff;
187 func (stream
, "], %s#%d",
188 (((given
& 0x00800000) == 0)
189 ? "-" : ""), offset
);
195 func (stream
, "], %s",
196 (((given
& 0x00800000) == 0)
198 arm_decode_shift (given
, func
, stream
);
205 if ((given
& 0x004f0000) == 0x004f0000)
207 /* PC relative with immediate offset */
208 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
210 if ((given
& 0x00800000) == 0)
213 func (stream
, "[pc, #%x]\t; ", offset
);
215 (*info
->print_address_func
)
216 (offset
+ pc
+ 8, info
);
221 arm_regnames
[(given
>> 16) & 0xf]);
222 if ((given
& 0x01000000) != 0)
225 if ((given
& 0x00400000) == 0x00400000)
228 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
230 func (stream
, ", %s#%d",
231 (((given
& 0x00800000) == 0)
232 ? "-" : ""), offset
);
237 func (stream
, ", %s%s",
238 (((given
& 0x00800000) == 0)
240 arm_regnames
[given
& 0xf]);
244 ((given
& 0x00200000) != 0) ? "!" : "");
249 if ((given
& 0x00400000) == 0x00400000)
252 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
254 func (stream
, "], %s#%d",
255 (((given
& 0x00800000) == 0)
256 ? "-" : ""), offset
);
263 func (stream
, "], %s%s",
264 (((given
& 0x00800000) == 0)
266 arm_regnames
[given
& 0xf]);
273 (*info
->print_address_func
)
274 (BDISP (given
) * 4 + pc
+ 8, info
);
279 arm_conditional
[(given
>> 28) & 0xf]);
288 for (reg
= 0; reg
< 16; reg
++)
289 if ((given
& (1 << reg
)) != 0)
294 func (stream
, "%s", arm_regnames
[reg
]);
301 if ((given
& 0x02000000) != 0)
303 int rotate
= (given
& 0xf00) >> 7;
304 int immed
= (given
& 0xff);
306 ((immed
<< (32 - rotate
))
307 | (immed
>> rotate
)) & 0xffffffff);
310 arm_decode_shift (given
, func
, stream
);
314 if ((given
& 0x0000f000) == 0x0000f000)
319 if ((given
& 0x01200000) == 0x00200000)
324 if ((given
& 0x00000020) == 0x00000020)
331 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
332 if ((given
& 0x01000000) != 0)
334 int offset
= given
& 0xff;
336 func (stream
, ", %s#%d]%s",
337 ((given
& 0x00800000) == 0 ? "-" : ""),
339 ((given
& 0x00200000) != 0 ? "!" : ""));
345 int offset
= given
& 0xff;
347 func (stream
, "], %s#%d",
348 ((given
& 0x00800000) == 0 ? "-" : ""),
356 switch (given
& 0x00090000)
359 func (stream
, "_???");
362 func (stream
, "_all");
365 func (stream
, "_ctl");
368 func (stream
, "_flg");
374 switch (given
& 0x00408000)
391 switch (given
& 0x00080080)
403 func (stream
, _("<illegal precision>"));
408 switch (given
& 0x00408000)
425 switch (given
& 0x60)
441 case '0': case '1': case '2': case '3': case '4':
442 case '5': case '6': case '7': case '8': case '9':
444 int bitstart
= *c
++ - '0';
446 while (*c
>= '0' && *c
<= '9')
447 bitstart
= (bitstart
* 10) + *c
++ - '0';
453 while (*c
>= '0' && *c
<= '9')
454 bitend
= (bitend
* 10) + *c
++ - '0';
462 reg
= given
>> bitstart
;
463 reg
&= (2 << (bitend
- bitstart
)) - 1;
464 func (stream
, "%s", arm_regnames
[reg
]);
470 reg
= given
>> bitstart
;
471 reg
&= (2 << (bitend
- bitstart
)) - 1;
472 func (stream
, "%d", reg
);
478 reg
= given
>> bitstart
;
479 reg
&= (2 << (bitend
- bitstart
)) - 1;
480 func (stream
, "0x%08x", reg
);
486 reg
= given
>> bitstart
;
487 reg
&= (2 << (bitend
- bitstart
)) - 1;
490 arm_fp_const
[reg
& 7]);
492 func (stream
, "f%d", reg
);
501 if ((given
& (1 << bitstart
)) == 0)
502 func (stream
, "%c", *c
);
506 if ((given
& (1 << bitstart
)) != 0)
507 func (stream
, "%c", *c
);
511 if ((given
& (1 << bitstart
)) != 0)
512 func (stream
, "%c", *c
++);
514 func (stream
, "%c", *++c
);
527 func (stream
, "%c", *c
);
535 /* Print one instruction from PC on INFO->STREAM.
536 Return the size of the instruction. */
539 print_insn_thumb (pc
, info
, given
)
541 struct disassemble_info
*info
;
544 struct thumb_opcode
*insn
;
545 void *stream
= info
->stream
;
546 fprintf_ftype func
= info
->fprintf_func
;
548 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
550 if ((given
& insn
->mask
) == insn
->value
)
552 char *c
= insn
->assembler
;
554 /* Special processing for Thumb 2 instruction BL sequence: */
555 if (!*c
) /* check for empty (not NULL) assembler string */
557 info
->bytes_per_chunk
= 4;
558 info
->bytes_per_line
= 4;
560 func (stream
, "%04x\tbl\t", given
& 0xffff);
561 (*info
->print_address_func
)
562 (BDISP23 (given
) * 2 + pc
+ 4, info
);
567 info
->bytes_per_chunk
= 2;
568 info
->bytes_per_line
= 4;
571 func (stream
, "%04x\t", given
);
587 reg
= (given
>> 3) & 0x7;
588 if (given
& (1 << 6))
590 func (stream
, "%s", arm_regnames
[reg
]);
598 if (given
& (1 << 7))
600 func (stream
, "%s", arm_regnames
[reg
]);
606 arm_conditional
[(given
>> 8) & 0xf]);
610 if (given
& (1 << 8))
614 if (*c
== 'O' && (given
& (1 << 8)))
622 /* It would be nice if we could spot
623 ranges, and generate the rS-rE format: */
624 for (reg
= 0; (reg
< 8); reg
++)
625 if ((given
& (1 << reg
)) != 0)
630 func (stream
, "%s", arm_regnames
[reg
]);
653 case '0': case '1': case '2': case '3': case '4':
654 case '5': case '6': case '7': case '8': case '9':
656 int bitstart
= *c
++ - '0';
658 while (*c
>= '0' && *c
<= '9')
659 bitstart
= (bitstart
* 10) + *c
++ - '0';
667 while (*c
>= '0' && *c
<= '9')
668 bitend
= (bitend
* 10) + *c
++ - '0';
671 reg
= given
>> bitstart
;
672 reg
&= (2 << (bitend
- bitstart
)) - 1;
676 func (stream
, "%s", arm_regnames
[reg
]);
680 func (stream
, "%d", reg
);
684 func (stream
, "%d", reg
<< 1);
688 func (stream
, "%d", reg
<< 2);
692 /* PC-relative address -- the bottom two
693 bits of the address are dropped before
695 info
->print_address_func
696 (((pc
+ 4) & ~3) + (reg
<< 2), info
);
700 func (stream
, "0x%04x", reg
);
704 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
705 func (stream
, "%d", reg
);
709 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
710 (*info
->print_address_func
)
711 (reg
* 2 + pc
+ 4, info
);
722 if ((given
& (1 << bitstart
)) != 0)
723 func (stream
, "%c", *c
);
728 if ((given
& (1 << bitstart
)) != 0)
729 func (stream
, "%c", *c
++);
731 func (stream
, "%c", *++c
);
745 func (stream
, "%c", *c
);
756 /* Select a different register name set.
757 Returns true if the name set selected is the APCS name set. */
759 arm_toggle_regnames ()
761 if (arm_regnames
== arm_regnames_standard
)
762 arm_regnames
= arm_regnames_apcs
;
764 arm_regnames
= arm_regnames_standard
;
766 return arm_regnames
== arm_regnames_apcs
;
770 parse_disassembler_options (options
)
776 if (strncmp (options
, "reg-names-", 10) == 0)
780 if (strcmp (options
, "std") == 0)
781 arm_regnames
= arm_regnames_standard
;
782 else if (strcmp (options
, "apcs") == 0)
783 arm_regnames
= arm_regnames_apcs
;
784 else if (strcmp (options
, "raw") == 0)
785 arm_regnames
= arm_regnames_raw
;
787 fprintf (stderr
, "Unrecognised register name set: %s\n", options
);
790 fprintf (stderr
, "Unrecognised disassembler option: %s\n", options
);
795 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
798 print_insn_big_arm (pc
, info
)
800 struct disassemble_info
*info
;
805 coff_symbol_type
*cs
;
809 if (info
->disassembler_options
)
811 parse_disassembler_options (info
->disassembler_options
);
813 /* To avoid repeated parsing of this option, we remove it here. */
814 info
->disassembler_options
= NULL
;
818 if (info
->symbols
!= NULL
)
820 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
822 cs
= coffsymbol (*info
->symbols
);
823 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
824 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
825 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
826 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
827 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
830 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
832 es
= *(elf_symbol_type
**)(info
->symbols
);
833 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
838 info
->bytes_per_chunk
= 4;
839 info
->display_endian
= BFD_ENDIAN_BIG
;
841 /* Always fetch word aligned values. */
843 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
846 (*info
->memory_error_func
) (status
, pc
, info
);
854 given
= (b
[2] << 8) | b
[3];
856 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
859 info
->memory_error_func (status
, pc
+ 4, info
);
863 given
|= (b
[0] << 24) | (b
[1] << 16);
867 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
872 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
877 status
= print_insn_thumb (pc
, info
, given
);
881 status
= print_insn_arm (pc
, info
, given
);
888 print_insn_little_arm (pc
, info
)
890 struct disassemble_info
* info
;
895 coff_symbol_type
*cs
;
899 if (info
->disassembler_options
)
901 parse_disassembler_options (info
->disassembler_options
);
903 /* To avoid repeated parsing of this option, we remove it here. */
904 info
->disassembler_options
= NULL
;
908 if (info
->symbols
!= NULL
)
910 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
912 cs
= coffsymbol (*info
->symbols
);
913 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
914 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
915 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
916 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
917 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
920 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
922 es
= *(elf_symbol_type
**)(info
->symbols
);
923 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
928 info
->bytes_per_chunk
= 4;
929 info
->display_endian
= BFD_ENDIAN_LITTLE
;
931 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
932 if (status
!= 0 && is_thumb
)
934 info
->bytes_per_chunk
= 2;
936 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
941 (*info
->memory_error_func
) (status
, pc
, info
);
945 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
949 status
= print_insn_thumb (pc
, info
, given
);
953 status
= print_insn_arm (pc
, info
, given
);
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