1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 This file is used to generate @arch@-asm.c.
6 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and GDB, the GNU debugger.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 #include "@arch@-opc.h"
31 /* ??? The layout of this stuff is still work in progress.
32 For speed in assembly/disassembly, we use inline functions. That of course
33 will only work for GCC. When this stuff is finished, we can decide whether
34 to keep the inline functions (and only get the performance increase when
35 compiled with GCC), or switch to macros, or use something else.
38 static const char *parse_insn_normal
39 PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *));
40 static void insert_insn_normal
41 PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *));
43 /* Default insertion routine.
45 SHIFT is negative for left shifts, positive for right shifts.
46 All bits of VALUE to be inserted must be valid as we don't handle
47 signed vs unsigned shifts.
49 ATTRS is a mask of the boolean attributes. We don't need any at the
50 moment, but for consistency with extract_normal we have them. */
52 /* FIXME: This duplicates functionality with bfd's howto table and
53 bfd_install_relocation. */
54 /* FIXME: For architectures where insns can be representable as ints,
55 store insn in `field' struct and add registers, etc. while parsing. */
57 static CGEN_INLINE void
58 insert_normal (value, attrs, start, length, shift, total_length, buffer)
61 int start, length, shift, total_length;
66 #if 0 /*def CGEN_INT_INSN*/
67 *buffer |= ((value & ((1 << length) - 1))
68 << (total_length - (start + length)));
73 x = *(unsigned char *) buffer;
76 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
77 x = bfd_getb16 (buffer);
79 x = bfd_getl16 (buffer);
82 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
83 x = bfd_getb32 (buffer);
85 x = bfd_getl32 (buffer);
96 x |= ((value & ((1 << length) - 1))
97 << (total_length - (start + length)));
105 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
106 bfd_putb16 (x, buffer);
108 bfd_putl16 (x, buffer);
111 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
112 bfd_putb32 (x, buffer);
114 bfd_putl32 (x, buffer);
122 /* -- assembler routines inserted here */
124 /* Default insn parser.
126 The syntax string is scanned and operands are parsed and stored in FIELDS.
127 Relocs are queued as we go via other callbacks.
129 ??? Note that this is currently an all-or-nothing parser. If we fail to
130 parse the instruction, we return 0 and the caller will start over from
131 the beginning. Backtracking will be necessary in parsing subexpressions,
132 but that can be handled there. Not handling backtracking here may get
133 expensive in the case of the m68k. Deal with later.
135 Returns NULL for success, an error message for failure.
139 parse_insn_normal (insn, strp, fields)
140 const CGEN_INSN *insn;
144 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
145 const char *str = *strp;
148 const unsigned char *syn;
149 #ifdef CGEN_MNEMONIC_OPERANDS
153 /* For now we assume the mnemonic is first (there are no leading operands).
154 We can parse it without needing to set up operand parsing. */
155 p = CGEN_INSN_MNEMONIC (insn);
156 while (*p && *p == *str)
158 if (*p || (*str && !isspace (*str)))
159 return "unrecognized instruction";
162 cgen_init_parse_operand ();
163 #ifdef CGEN_MNEMONIC_OPERANDS
167 /* We don't check for (*str != '\0') here because we want to parse
168 any trailing fake arguments in the syntax string. */
169 syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
170 /* Mnemonics come first for now, ensure valid string. */
171 if (! CGEN_SYNTAX_MNEMONIC_P (*syn))
176 /* Non operand chars must match exactly. */
177 /* FIXME: Need to better handle whitespace. */
178 if (CGEN_SYNTAX_CHAR_P (*syn))
180 if (*str == CGEN_SYNTAX_CHAR (*syn))
182 #ifdef CGEN_MNEMONIC_OPERANDS
191 /* Syntax char didn't match. Can't be this insn. */
192 /* FIXME: would like to return "expected char `c'" */
193 return "syntax error";
198 /* We have an operand of some sort. */
199 errmsg = @arch@_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn),
204 /* Done with this operand, continue with next one. */
208 /* If we're at the end of the syntax string, we're done. */
211 /* FIXME: For the moment we assume a valid `str' can only contain
212 blanks now. IE: We needn't try again with a longer version of
213 the insn and it is assumed that longer versions of insns appear
214 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
215 while (isspace (*str))
219 return "junk at end of line"; /* FIXME: would like to include `str' */
224 /* We couldn't parse it. */
225 return "unrecognized instruction";
228 /* Default insn builder (insert handler).
229 The instruction is recorded in target byte order. */
232 insert_insn_normal (insn, fields, buffer)
233 const CGEN_INSN *insn;
237 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
239 const unsigned char *syn;
242 value = CGEN_INSN_VALUE (insn);
244 /* If we're recording insns as numbers (rather than a string of bytes),
245 target byte order handling is deferred until later. */
247 #define min(a,b) ((a) < (b) ? (a) : (b))
248 #if 0 /*def CGEN_INT_INSN*/
251 switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields)))
257 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
258 bfd_putb16 (value, (char *) buffer);
260 bfd_putl16 (value, (char *) buffer);
263 if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
264 bfd_putb32 (value, (char *) buffer);
266 bfd_putl32 (value, (char *) buffer);
273 /* ??? Rather than scanning the syntax string again, we could store
274 in `fields' a null terminated list of the fields that are present. */
276 for (syn = CGEN_SYNTAX_STRING (syntax); *syn != '\0'; ++syn)
278 if (CGEN_SYNTAX_CHAR_P (*syn))
281 @arch@_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, buffer);
286 This routine is called for each instruction to be assembled.
287 STR points to the insn to be assembled.
288 We assume all necessary tables have been initialized.
289 The result is a pointer to the insn's entry in the opcode table,
290 or NULL if an error occured (an error message will have already been
294 @arch@_cgen_assemble_insn (str, fields, buf, errmsg)
301 CGEN_INSN_LIST *ilist;
303 /* Skip leading white space. */
304 while (isspace (*str))
307 /* The instructions are stored in hashed lists.
308 Get the first in the list. */
309 ilist = CGEN_ASM_LOOKUP_INSN (str);
311 /* Keep looking until we find a match. */
314 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
316 const CGEN_INSN *insn = ilist->insn;
318 #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
319 /* Is this insn supported by the selected cpu? */
320 if (! @arch@_cgen_insn_supported (insn))
324 #if 1 /* FIXME: wip */
325 /* If the RELAX attribute is set, this is an insn that shouldn't be
326 chosen immediately. Instead, it is used during assembler/linker
327 relaxation if possible. */
328 if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
334 /* Record a default length for the insn. This will get set to the
335 correct value while parsing. */
337 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
339 /* ??? The extent to which moving the parse and insert handlers into
340 this function (thus removing the function call) will speed things up
341 is unclear. The simplicity and flexibility of the current scheme is
342 appropriate for now. One could have the best of both worlds with
343 inline functions but of course that would only work for gcc. Since
344 we're machine generating some code we could do that here too. Maybe
346 if (! (*CGEN_PARSE_FN (insn)) (insn, &str, fields))
348 (*CGEN_INSERT_FN (insn)) (insn, fields, buf);
349 /* It is up to the caller to actually output the insn and any
354 /* Try the next entry. */
357 /* FIXME: We can return a better error message than this.
358 Need to track why it failed and pick the right one. */
360 static char errbuf[100];
361 sprintf (errbuf, "bad instruction `%.50s%s'",
362 start, strlen (start) > 50 ? "..." : "");
368 #if 0 /* This calls back to GAS which we can't do without care. */
370 /* Record each member of OPVALS in the assembler's symbol table.
371 This lets GAS parse registers for us.
372 ??? Interesting idea but not currently used. */
374 /* Record each member of OPVALS in the assembler's symbol table.
375 FIXME: Not currently used. */
378 @arch@_cgen_asm_hash_keywords (opvals)
379 CGEN_KEYWORD *opvals;
381 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
382 const CGEN_KEYWORD_ENTRY *ke;
384 while ((ke = cgen_keyword_search_next (&search)) != NULL)
386 #if 0 /* Unnecessary, should be done in the search routine. */
387 if (! @arch@_cgen_opval_supported (ke))
390 cgen_asm_record_register (ke->name, ke->value);