3dad64bc3c49c9fc454f2fe895e5b2401b85a413
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25
26 #ifdef ARCH_all
27 #define ARCH_alpha
28 #define ARCH_arc
29 #define ARCH_arm
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_epiphany
39 #define ARCH_fr30
40 #define ARCH_frv
41 #define ARCH_h8300
42 #define ARCH_h8500
43 #define ARCH_hppa
44 #define ARCH_i370
45 #define ARCH_i386
46 #define ARCH_i860
47 #define ARCH_i960
48 #define ARCH_ia64
49 #define ARCH_ip2k
50 #define ARCH_iq2000
51 #define ARCH_lm32
52 #define ARCH_m32c
53 #define ARCH_m32r
54 #define ARCH_m68hc11
55 #define ARCH_m68hc12
56 #define ARCH_m68k
57 #define ARCH_m88k
58 #define ARCH_mcore
59 #define ARCH_mep
60 #define ARCH_microblaze
61 #define ARCH_mips
62 #define ARCH_mmix
63 #define ARCH_mn10200
64 #define ARCH_mn10300
65 #define ARCH_moxie
66 #define ARCH_mt
67 #define ARCH_msp430
68 #define ARCH_ns32k
69 #define ARCH_openrisc
70 #define ARCH_or32
71 #define ARCH_pdp11
72 #define ARCH_pj
73 #define ARCH_powerpc
74 #define ARCH_rs6000
75 #define ARCH_rl78
76 #define ARCH_rx
77 #define ARCH_s390
78 #define ARCH_score
79 #define ARCH_sh
80 #define ARCH_sparc
81 #define ARCH_spu
82 #define ARCH_tic30
83 #define ARCH_tic4x
84 #define ARCH_tic54x
85 #define ARCH_tic6x
86 #define ARCH_tic80
87 #define ARCH_tilegx
88 #define ARCH_tilepro
89 #define ARCH_v850
90 #define ARCH_vax
91 #define ARCH_w65
92 #define ARCH_xstormy16
93 #define ARCH_xc16x
94 #define ARCH_xgate
95 #define ARCH_xtensa
96 #define ARCH_z80
97 #define ARCH_z8k
98 #define INCLUDE_SHMEDIA
99 #endif
100
101 #ifdef ARCH_m32c
102 #include "m32c-desc.h"
103 #endif
104
105 disassembler_ftype
106 disassembler (abfd)
107 bfd *abfd;
108 {
109 enum bfd_architecture a = bfd_get_arch (abfd);
110 disassembler_ftype disassemble;
111
112 switch (a)
113 {
114 /* If you add a case to this table, also add it to the
115 ARCH_all definition right above this function. */
116 #ifdef ARCH_alpha
117 case bfd_arch_alpha:
118 disassemble = print_insn_alpha;
119 break;
120 #endif
121 #ifdef ARCH_arc
122 case bfd_arch_arc:
123 disassemble = arc_get_disassembler (abfd);
124 break;
125 #endif
126 #ifdef ARCH_arm
127 case bfd_arch_arm:
128 if (bfd_big_endian (abfd))
129 disassemble = print_insn_big_arm;
130 else
131 disassemble = print_insn_little_arm;
132 break;
133 #endif
134 #ifdef ARCH_avr
135 case bfd_arch_avr:
136 disassemble = print_insn_avr;
137 break;
138 #endif
139 #ifdef ARCH_bfin
140 case bfd_arch_bfin:
141 disassemble = print_insn_bfin;
142 break;
143 #endif
144 #ifdef ARCH_cr16
145 case bfd_arch_cr16:
146 disassemble = print_insn_cr16;
147 break;
148 #endif
149 #ifdef ARCH_cris
150 case bfd_arch_cris:
151 disassemble = cris_get_disassembler (abfd);
152 break;
153 #endif
154 #ifdef ARCH_crx
155 case bfd_arch_crx:
156 disassemble = print_insn_crx;
157 break;
158 #endif
159 #ifdef ARCH_d10v
160 case bfd_arch_d10v:
161 disassemble = print_insn_d10v;
162 break;
163 #endif
164 #ifdef ARCH_d30v
165 case bfd_arch_d30v:
166 disassemble = print_insn_d30v;
167 break;
168 #endif
169 #ifdef ARCH_dlx
170 case bfd_arch_dlx:
171 /* As far as I know we only handle big-endian DLX objects. */
172 disassemble = print_insn_dlx;
173 break;
174 #endif
175 #ifdef ARCH_h8300
176 case bfd_arch_h8300:
177 if (bfd_get_mach (abfd) == bfd_mach_h8300h
178 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
179 disassemble = print_insn_h8300h;
180 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
181 || bfd_get_mach (abfd) == bfd_mach_h8300sn
182 || bfd_get_mach (abfd) == bfd_mach_h8300sx
183 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
184 disassemble = print_insn_h8300s;
185 else
186 disassemble = print_insn_h8300;
187 break;
188 #endif
189 #ifdef ARCH_h8500
190 case bfd_arch_h8500:
191 disassemble = print_insn_h8500;
192 break;
193 #endif
194 #ifdef ARCH_hppa
195 case bfd_arch_hppa:
196 disassemble = print_insn_hppa;
197 break;
198 #endif
199 #ifdef ARCH_i370
200 case bfd_arch_i370:
201 disassemble = print_insn_i370;
202 break;
203 #endif
204 #ifdef ARCH_i386
205 case bfd_arch_i386:
206 case bfd_arch_l1om:
207 case bfd_arch_k1om:
208 disassemble = print_insn_i386;
209 break;
210 #endif
211 #ifdef ARCH_i860
212 case bfd_arch_i860:
213 disassemble = print_insn_i860;
214 break;
215 #endif
216 #ifdef ARCH_i960
217 case bfd_arch_i960:
218 disassemble = print_insn_i960;
219 break;
220 #endif
221 #ifdef ARCH_ia64
222 case bfd_arch_ia64:
223 disassemble = print_insn_ia64;
224 break;
225 #endif
226 #ifdef ARCH_ip2k
227 case bfd_arch_ip2k:
228 disassemble = print_insn_ip2k;
229 break;
230 #endif
231 #ifdef ARCH_epiphany
232 case bfd_arch_epiphany:
233 disassemble = print_insn_epiphany;
234 break;
235 #endif
236 #ifdef ARCH_fr30
237 case bfd_arch_fr30:
238 disassemble = print_insn_fr30;
239 break;
240 #endif
241 #ifdef ARCH_lm32
242 case bfd_arch_lm32:
243 disassemble = print_insn_lm32;
244 break;
245 #endif
246 #ifdef ARCH_m32r
247 case bfd_arch_m32r:
248 disassemble = print_insn_m32r;
249 break;
250 #endif
251 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
252 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
253 case bfd_arch_m68hc11:
254 disassemble = print_insn_m68hc11;
255 break;
256 case bfd_arch_m68hc12:
257 disassemble = print_insn_m68hc12;
258 break;
259 case bfd_arch_m9s12x:
260 disassemble = print_insn_m9s12x;
261 break;
262 case bfd_arch_m9s12xg:
263 disassemble = print_insn_m9s12xg;
264 break;
265 #endif
266 #ifdef ARCH_m68k
267 case bfd_arch_m68k:
268 disassemble = print_insn_m68k;
269 break;
270 #endif
271 #ifdef ARCH_m88k
272 case bfd_arch_m88k:
273 disassemble = print_insn_m88k;
274 break;
275 #endif
276 #ifdef ARCH_mt
277 case bfd_arch_mt:
278 disassemble = print_insn_mt;
279 break;
280 #endif
281 #ifdef ARCH_microblaze
282 case bfd_arch_microblaze:
283 disassemble = print_insn_microblaze;
284 break;
285 #endif
286 #ifdef ARCH_msp430
287 case bfd_arch_msp430:
288 disassemble = print_insn_msp430;
289 break;
290 #endif
291 #ifdef ARCH_ns32k
292 case bfd_arch_ns32k:
293 disassemble = print_insn_ns32k;
294 break;
295 #endif
296 #ifdef ARCH_mcore
297 case bfd_arch_mcore:
298 disassemble = print_insn_mcore;
299 break;
300 #endif
301 #ifdef ARCH_mep
302 case bfd_arch_mep:
303 disassemble = print_insn_mep;
304 break;
305 #endif
306 #ifdef ARCH_mips
307 case bfd_arch_mips:
308 if (bfd_big_endian (abfd))
309 disassemble = print_insn_big_mips;
310 else
311 disassemble = print_insn_little_mips;
312 break;
313 #endif
314 #ifdef ARCH_mmix
315 case bfd_arch_mmix:
316 disassemble = print_insn_mmix;
317 break;
318 #endif
319 #ifdef ARCH_mn10200
320 case bfd_arch_mn10200:
321 disassemble = print_insn_mn10200;
322 break;
323 #endif
324 #ifdef ARCH_mn10300
325 case bfd_arch_mn10300:
326 disassemble = print_insn_mn10300;
327 break;
328 #endif
329 #ifdef ARCH_openrisc
330 case bfd_arch_openrisc:
331 disassemble = print_insn_openrisc;
332 break;
333 #endif
334 #ifdef ARCH_or32
335 case bfd_arch_or32:
336 if (bfd_big_endian (abfd))
337 disassemble = print_insn_big_or32;
338 else
339 disassemble = print_insn_little_or32;
340 break;
341 #endif
342 #ifdef ARCH_pdp11
343 case bfd_arch_pdp11:
344 disassemble = print_insn_pdp11;
345 break;
346 #endif
347 #ifdef ARCH_pj
348 case bfd_arch_pj:
349 disassemble = print_insn_pj;
350 break;
351 #endif
352 #ifdef ARCH_powerpc
353 case bfd_arch_powerpc:
354 if (bfd_big_endian (abfd))
355 disassemble = print_insn_big_powerpc;
356 else
357 disassemble = print_insn_little_powerpc;
358 break;
359 #endif
360 #ifdef ARCH_rs6000
361 case bfd_arch_rs6000:
362 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
363 disassemble = print_insn_big_powerpc;
364 else
365 disassemble = print_insn_rs6000;
366 break;
367 #endif
368 #ifdef ARCH_rl78
369 case bfd_arch_rl78:
370 disassemble = print_insn_rl78;
371 break;
372 #endif
373 #ifdef ARCH_rx
374 case bfd_arch_rx:
375 disassemble = print_insn_rx;
376 break;
377 #endif
378 #ifdef ARCH_s390
379 case bfd_arch_s390:
380 disassemble = print_insn_s390;
381 break;
382 #endif
383 #ifdef ARCH_score
384 case bfd_arch_score:
385 if (bfd_big_endian (abfd))
386 disassemble = print_insn_big_score;
387 else
388 disassemble = print_insn_little_score;
389 break;
390 #endif
391 #ifdef ARCH_sh
392 case bfd_arch_sh:
393 disassemble = print_insn_sh;
394 break;
395 #endif
396 #ifdef ARCH_sparc
397 case bfd_arch_sparc:
398 disassemble = print_insn_sparc;
399 break;
400 #endif
401 #ifdef ARCH_spu
402 case bfd_arch_spu:
403 disassemble = print_insn_spu;
404 break;
405 #endif
406 #ifdef ARCH_tic30
407 case bfd_arch_tic30:
408 disassemble = print_insn_tic30;
409 break;
410 #endif
411 #ifdef ARCH_tic4x
412 case bfd_arch_tic4x:
413 disassemble = print_insn_tic4x;
414 break;
415 #endif
416 #ifdef ARCH_tic54x
417 case bfd_arch_tic54x:
418 disassemble = print_insn_tic54x;
419 break;
420 #endif
421 #ifdef ARCH_tic6x
422 case bfd_arch_tic6x:
423 disassemble = print_insn_tic6x;
424 break;
425 #endif
426 #ifdef ARCH_tic80
427 case bfd_arch_tic80:
428 disassemble = print_insn_tic80;
429 break;
430 #endif
431 #ifdef ARCH_v850
432 case bfd_arch_v850:
433 disassemble = print_insn_v850;
434 break;
435 #endif
436 #ifdef ARCH_w65
437 case bfd_arch_w65:
438 disassemble = print_insn_w65;
439 break;
440 #endif
441 #ifdef ARCH_xgate
442 case bfd_arch_xgate:
443 disassemble = print_insn_xgate;
444 break;
445 #endif
446 #ifdef ARCH_xstormy16
447 case bfd_arch_xstormy16:
448 disassemble = print_insn_xstormy16;
449 break;
450 #endif
451 #ifdef ARCH_xc16x
452 case bfd_arch_xc16x:
453 disassemble = print_insn_xc16x;
454 break;
455 #endif
456 #ifdef ARCH_xtensa
457 case bfd_arch_xtensa:
458 disassemble = print_insn_xtensa;
459 break;
460 #endif
461 #ifdef ARCH_z80
462 case bfd_arch_z80:
463 disassemble = print_insn_z80;
464 break;
465 #endif
466 #ifdef ARCH_z8k
467 case bfd_arch_z8k:
468 if (bfd_get_mach(abfd) == bfd_mach_z8001)
469 disassemble = print_insn_z8001;
470 else
471 disassemble = print_insn_z8002;
472 break;
473 #endif
474 #ifdef ARCH_vax
475 case bfd_arch_vax:
476 disassemble = print_insn_vax;
477 break;
478 #endif
479 #ifdef ARCH_frv
480 case bfd_arch_frv:
481 disassemble = print_insn_frv;
482 break;
483 #endif
484 #ifdef ARCH_moxie
485 case bfd_arch_moxie:
486 disassemble = print_insn_moxie;
487 break;
488 #endif
489 #ifdef ARCH_iq2000
490 case bfd_arch_iq2000:
491 disassemble = print_insn_iq2000;
492 break;
493 #endif
494 #ifdef ARCH_m32c
495 case bfd_arch_m32c:
496 disassemble = print_insn_m32c;
497 break;
498 #endif
499 #ifdef ARCH_tilegx
500 case bfd_arch_tilegx:
501 disassemble = print_insn_tilegx;
502 break;
503 #endif
504 #ifdef ARCH_tilepro
505 case bfd_arch_tilepro:
506 disassemble = print_insn_tilepro;
507 break;
508 #endif
509 default:
510 return 0;
511 }
512 return disassemble;
513 }
514
515 void
516 disassembler_usage (stream)
517 FILE * stream ATTRIBUTE_UNUSED;
518 {
519 #ifdef ARCH_arm
520 print_arm_disassembler_options (stream);
521 #endif
522 #ifdef ARCH_mips
523 print_mips_disassembler_options (stream);
524 #endif
525 #ifdef ARCH_powerpc
526 print_ppc_disassembler_options (stream);
527 #endif
528 #ifdef ARCH_i386
529 print_i386_disassembler_options (stream);
530 #endif
531 #ifdef ARCH_s390
532 print_s390_disassembler_options (stream);
533 #endif
534
535 return;
536 }
537
538 void
539 disassemble_init_for_target (struct disassemble_info * info)
540 {
541 if (info == NULL)
542 return;
543
544 switch (info->arch)
545 {
546 #ifdef ARCH_arm
547 case bfd_arch_arm:
548 info->symbol_is_valid = arm_symbol_is_valid;
549 info->disassembler_needs_relocs = TRUE;
550 break;
551 #endif
552 #ifdef ARCH_ia64
553 case bfd_arch_ia64:
554 info->skip_zeroes = 16;
555 break;
556 #endif
557 #ifdef ARCH_tic4x
558 case bfd_arch_tic4x:
559 info->skip_zeroes = 32;
560 break;
561 #endif
562 #ifdef ARCH_mep
563 case bfd_arch_mep:
564 info->skip_zeroes = 256;
565 info->skip_zeroes_at_end = 0;
566 break;
567 #endif
568 #ifdef ARCH_m32c
569 case bfd_arch_m32c:
570 /* This processor in fact is little endian. The value set here
571 reflects the way opcodes are written in the cgen description. */
572 info->endian = BFD_ENDIAN_BIG;
573 if (! info->insn_sets)
574 {
575 info->insn_sets = cgen_bitset_create (ISA_MAX);
576 if (info->mach == bfd_mach_m16c)
577 cgen_bitset_set (info->insn_sets, ISA_M16C);
578 else
579 cgen_bitset_set (info->insn_sets, ISA_M32C);
580 }
581 break;
582 #endif
583 #ifdef ARCH_powerpc
584 case bfd_arch_powerpc:
585 #endif
586 #ifdef ARCH_rs6000
587 case bfd_arch_rs6000:
588 #endif
589 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
590 disassemble_init_powerpc (info);
591 break;
592 #endif
593 default:
594 break;
595 }
596 }
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