Fix formatting of most recent entry.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "dis-asm.h"
24
25 #ifdef ARCH_all
26 #define ARCH_alpha
27 #define ARCH_arc
28 #define ARCH_arm
29 #define ARCH_avr
30 #define ARCH_bfin
31 #define ARCH_cr16
32 #define ARCH_cris
33 #define ARCH_crx
34 #define ARCH_d10v
35 #define ARCH_d30v
36 #define ARCH_dlx
37 #define ARCH_fr30
38 #define ARCH_frv
39 #define ARCH_h8300
40 #define ARCH_h8500
41 #define ARCH_hppa
42 #define ARCH_i370
43 #define ARCH_i386
44 #define ARCH_i860
45 #define ARCH_i960
46 #define ARCH_ia64
47 #define ARCH_ip2k
48 #define ARCH_iq2000
49 #define ARCH_m32c
50 #define ARCH_m32r
51 #define ARCH_m68hc11
52 #define ARCH_m68hc12
53 #define ARCH_m68k
54 #define ARCH_m88k
55 #define ARCH_maxq
56 #define ARCH_mcore
57 #define ARCH_mep
58 #define ARCH_mips
59 #define ARCH_mmix
60 #define ARCH_mn10200
61 #define ARCH_mn10300
62 #define ARCH_mt
63 #define ARCH_msp430
64 #define ARCH_ns32k
65 #define ARCH_openrisc
66 #define ARCH_or32
67 #define ARCH_pdp11
68 #define ARCH_pj
69 #define ARCH_powerpc
70 #define ARCH_rs6000
71 #define ARCH_s390
72 #define ARCH_score
73 #define ARCH_sh
74 #define ARCH_sparc
75 #define ARCH_spu
76 #define ARCH_tic30
77 #define ARCH_tic4x
78 #define ARCH_tic54x
79 #define ARCH_tic80
80 #define ARCH_v850
81 #define ARCH_vax
82 #define ARCH_w65
83 #define ARCH_xstormy16
84 #define ARCH_xc16x
85 #define ARCH_xtensa
86 #define ARCH_z80
87 #define ARCH_z8k
88 #define INCLUDE_SHMEDIA
89 #endif
90
91 #ifdef ARCH_m32c
92 #include "m32c-desc.h"
93 #endif
94
95 disassembler_ftype
96 disassembler (abfd)
97 bfd *abfd;
98 {
99 enum bfd_architecture a = bfd_get_arch (abfd);
100 disassembler_ftype disassemble;
101
102 switch (a)
103 {
104 /* If you add a case to this table, also add it to the
105 ARCH_all definition right above this function. */
106 #ifdef ARCH_alpha
107 case bfd_arch_alpha:
108 disassemble = print_insn_alpha;
109 break;
110 #endif
111 #ifdef ARCH_arc
112 case bfd_arch_arc:
113 {
114 disassemble = arc_get_disassembler (abfd);
115 break;
116 }
117 #endif
118 #ifdef ARCH_arm
119 case bfd_arch_arm:
120 if (bfd_big_endian (abfd))
121 disassemble = print_insn_big_arm;
122 else
123 disassemble = print_insn_little_arm;
124 break;
125 #endif
126 #ifdef ARCH_avr
127 case bfd_arch_avr:
128 disassemble = print_insn_avr;
129 break;
130 #endif
131 #ifdef ARCH_bfin
132 case bfd_arch_bfin:
133 disassemble = print_insn_bfin;
134 break;
135 #endif
136 #ifdef ARCH_cr16
137 case bfd_arch_cr16:
138 disassemble = print_insn_cr16;
139 break;
140 #endif
141 #ifdef ARCH_cris
142 case bfd_arch_cris:
143 disassemble = cris_get_disassembler (abfd);
144 break;
145 #endif
146 #ifdef ARCH_crx
147 case bfd_arch_crx:
148 disassemble = print_insn_crx;
149 break;
150 #endif
151 #ifdef ARCH_d10v
152 case bfd_arch_d10v:
153 disassemble = print_insn_d10v;
154 break;
155 #endif
156 #ifdef ARCH_d30v
157 case bfd_arch_d30v:
158 disassemble = print_insn_d30v;
159 break;
160 #endif
161 #ifdef ARCH_dlx
162 case bfd_arch_dlx:
163 /* As far as I know we only handle big-endian DLX objects. */
164 disassemble = print_insn_dlx;
165 break;
166 #endif
167 #ifdef ARCH_h8300
168 case bfd_arch_h8300:
169 if (bfd_get_mach (abfd) == bfd_mach_h8300h
170 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
171 disassemble = print_insn_h8300h;
172 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
173 || bfd_get_mach (abfd) == bfd_mach_h8300sn
174 || bfd_get_mach (abfd) == bfd_mach_h8300sx
175 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
176 disassemble = print_insn_h8300s;
177 else
178 disassemble = print_insn_h8300;
179 break;
180 #endif
181 #ifdef ARCH_h8500
182 case bfd_arch_h8500:
183 disassemble = print_insn_h8500;
184 break;
185 #endif
186 #ifdef ARCH_hppa
187 case bfd_arch_hppa:
188 disassemble = print_insn_hppa;
189 break;
190 #endif
191 #ifdef ARCH_i370
192 case bfd_arch_i370:
193 disassemble = print_insn_i370;
194 break;
195 #endif
196 #ifdef ARCH_i386
197 case bfd_arch_i386:
198 disassemble = print_insn_i386;
199 break;
200 #endif
201 #ifdef ARCH_i860
202 case bfd_arch_i860:
203 disassemble = print_insn_i860;
204 break;
205 #endif
206 #ifdef ARCH_i960
207 case bfd_arch_i960:
208 disassemble = print_insn_i960;
209 break;
210 #endif
211 #ifdef ARCH_ia64
212 case bfd_arch_ia64:
213 disassemble = print_insn_ia64;
214 break;
215 #endif
216 #ifdef ARCH_ip2k
217 case bfd_arch_ip2k:
218 disassemble = print_insn_ip2k;
219 break;
220 #endif
221 #ifdef ARCH_fr30
222 case bfd_arch_fr30:
223 disassemble = print_insn_fr30;
224 break;
225 #endif
226 #ifdef ARCH_m32r
227 case bfd_arch_m32r:
228 disassemble = print_insn_m32r;
229 break;
230 #endif
231 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
232 case bfd_arch_m68hc11:
233 disassemble = print_insn_m68hc11;
234 break;
235 case bfd_arch_m68hc12:
236 disassemble = print_insn_m68hc12;
237 break;
238 #endif
239 #ifdef ARCH_m68k
240 case bfd_arch_m68k:
241 disassemble = print_insn_m68k;
242 break;
243 #endif
244 #ifdef ARCH_m88k
245 case bfd_arch_m88k:
246 disassemble = print_insn_m88k;
247 break;
248 #endif
249 #ifdef ARCH_maxq
250 case bfd_arch_maxq:
251 disassemble = print_insn_maxq_little;
252 break;
253 #endif
254 #ifdef ARCH_mt
255 case bfd_arch_mt:
256 disassemble = print_insn_mt;
257 break;
258 #endif
259 #ifdef ARCH_msp430
260 case bfd_arch_msp430:
261 disassemble = print_insn_msp430;
262 break;
263 #endif
264 #ifdef ARCH_ns32k
265 case bfd_arch_ns32k:
266 disassemble = print_insn_ns32k;
267 break;
268 #endif
269 #ifdef ARCH_mcore
270 case bfd_arch_mcore:
271 disassemble = print_insn_mcore;
272 break;
273 #endif
274 #ifdef ARCH_mep
275 case bfd_arch_mep:
276 disassemble = print_insn_mep;
277 break;
278 #endif
279 #ifdef ARCH_mips
280 case bfd_arch_mips:
281 if (bfd_big_endian (abfd))
282 disassemble = print_insn_big_mips;
283 else
284 disassemble = print_insn_little_mips;
285 break;
286 #endif
287 #ifdef ARCH_mmix
288 case bfd_arch_mmix:
289 disassemble = print_insn_mmix;
290 break;
291 #endif
292 #ifdef ARCH_mn10200
293 case bfd_arch_mn10200:
294 disassemble = print_insn_mn10200;
295 break;
296 #endif
297 #ifdef ARCH_mn10300
298 case bfd_arch_mn10300:
299 disassemble = print_insn_mn10300;
300 break;
301 #endif
302 #ifdef ARCH_openrisc
303 case bfd_arch_openrisc:
304 disassemble = print_insn_openrisc;
305 break;
306 #endif
307 #ifdef ARCH_or32
308 case bfd_arch_or32:
309 if (bfd_big_endian (abfd))
310 disassemble = print_insn_big_or32;
311 else
312 disassemble = print_insn_little_or32;
313 break;
314 #endif
315 #ifdef ARCH_pdp11
316 case bfd_arch_pdp11:
317 disassemble = print_insn_pdp11;
318 break;
319 #endif
320 #ifdef ARCH_pj
321 case bfd_arch_pj:
322 disassemble = print_insn_pj;
323 break;
324 #endif
325 #ifdef ARCH_powerpc
326 case bfd_arch_powerpc:
327 if (bfd_big_endian (abfd))
328 disassemble = print_insn_big_powerpc;
329 else
330 disassemble = print_insn_little_powerpc;
331 break;
332 #endif
333 #ifdef ARCH_rs6000
334 case bfd_arch_rs6000:
335 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
336 disassemble = print_insn_big_powerpc;
337 else
338 disassemble = print_insn_rs6000;
339 break;
340 #endif
341 #ifdef ARCH_s390
342 case bfd_arch_s390:
343 disassemble = print_insn_s390;
344 break;
345 #endif
346 #ifdef ARCH_score
347 case bfd_arch_score:
348 if (bfd_big_endian (abfd))
349 disassemble = print_insn_big_score;
350 else
351 disassemble = print_insn_little_score;
352 break;
353 #endif
354 #ifdef ARCH_sh
355 case bfd_arch_sh:
356 disassemble = print_insn_sh;
357 break;
358 #endif
359 #ifdef ARCH_sparc
360 case bfd_arch_sparc:
361 disassemble = print_insn_sparc;
362 break;
363 #endif
364 #ifdef ARCH_spu
365 case bfd_arch_spu:
366 disassemble = print_insn_spu;
367 break;
368 #endif
369 #ifdef ARCH_tic30
370 case bfd_arch_tic30:
371 disassemble = print_insn_tic30;
372 break;
373 #endif
374 #ifdef ARCH_tic4x
375 case bfd_arch_tic4x:
376 disassemble = print_insn_tic4x;
377 break;
378 #endif
379 #ifdef ARCH_tic54x
380 case bfd_arch_tic54x:
381 disassemble = print_insn_tic54x;
382 break;
383 #endif
384 #ifdef ARCH_tic80
385 case bfd_arch_tic80:
386 disassemble = print_insn_tic80;
387 break;
388 #endif
389 #ifdef ARCH_v850
390 case bfd_arch_v850:
391 disassemble = print_insn_v850;
392 break;
393 #endif
394 #ifdef ARCH_w65
395 case bfd_arch_w65:
396 disassemble = print_insn_w65;
397 break;
398 #endif
399 #ifdef ARCH_xstormy16
400 case bfd_arch_xstormy16:
401 disassemble = print_insn_xstormy16;
402 break;
403 #endif
404 #ifdef ARCH_xc16x
405 case bfd_arch_xc16x:
406 disassemble = print_insn_xc16x;
407 break;
408 #endif
409 #ifdef ARCH_xtensa
410 case bfd_arch_xtensa:
411 disassemble = print_insn_xtensa;
412 break;
413 #endif
414 #ifdef ARCH_z80
415 case bfd_arch_z80:
416 disassemble = print_insn_z80;
417 break;
418 #endif
419 #ifdef ARCH_z8k
420 case bfd_arch_z8k:
421 if (bfd_get_mach(abfd) == bfd_mach_z8001)
422 disassemble = print_insn_z8001;
423 else
424 disassemble = print_insn_z8002;
425 break;
426 #endif
427 #ifdef ARCH_vax
428 case bfd_arch_vax:
429 disassemble = print_insn_vax;
430 break;
431 #endif
432 #ifdef ARCH_frv
433 case bfd_arch_frv:
434 disassemble = print_insn_frv;
435 break;
436 #endif
437 #ifdef ARCH_iq2000
438 case bfd_arch_iq2000:
439 disassemble = print_insn_iq2000;
440 break;
441 #endif
442 #ifdef ARCH_m32c
443 case bfd_arch_m32c:
444 disassemble = print_insn_m32c;
445 break;
446 #endif
447 default:
448 return 0;
449 }
450 return disassemble;
451 }
452
453 void
454 disassembler_usage (stream)
455 FILE * stream ATTRIBUTE_UNUSED;
456 {
457 #ifdef ARCH_arm
458 print_arm_disassembler_options (stream);
459 #endif
460 #ifdef ARCH_mips
461 print_mips_disassembler_options (stream);
462 #endif
463 #ifdef ARCH_powerpc
464 print_ppc_disassembler_options (stream);
465 #endif
466 #ifdef ARCH_i386
467 print_i386_disassembler_options (stream);
468 #endif
469
470 return;
471 }
472
473 void
474 disassemble_init_for_target (struct disassemble_info * info)
475 {
476 if (info == NULL)
477 return;
478
479 switch (info->arch)
480 {
481 #ifdef ARCH_arm
482 case bfd_arch_arm:
483 info->symbol_is_valid = arm_symbol_is_valid;
484 info->disassembler_needs_relocs = TRUE;
485 break;
486 #endif
487 #ifdef ARCH_ia64
488 case bfd_arch_ia64:
489 info->skip_zeroes = 16;
490 break;
491 #endif
492 #ifdef ARCH_tic4x
493 case bfd_arch_tic4x:
494 info->skip_zeroes = 32;
495 break;
496 #endif
497 #ifdef ARCH_mep
498 case bfd_arch_mep:
499 info->skip_zeroes = 256;
500 info->skip_zeroes_at_end = 0;
501 break;
502 #endif
503 #ifdef ARCH_m32c
504 case bfd_arch_m32c:
505 info->endian = BFD_ENDIAN_BIG;
506 if (! info->insn_sets)
507 {
508 info->insn_sets = cgen_bitset_create (ISA_MAX);
509 if (info->mach == bfd_mach_m16c)
510 cgen_bitset_set (info->insn_sets, ISA_M16C);
511 else
512 cgen_bitset_set (info->insn_sets, ISA_M32C);
513 }
514 break;
515 #endif
516 default:
517 break;
518 }
519 }
This page took 0.046863 seconds and 4 git commands to generate.