1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS USED TO GENERATE fr30-dis.c.
6 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and GDB, the GNU debugger.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software Foundation, Inc.,
22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
35 #define INLINE __inline__
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 /* Used by the ifield rtx function. */
44 #define FLD(f) (fields->f)
46 static int extract_normal
47 PARAMS ((CGEN_OPCODE_DESC
, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
,
48 unsigned int, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, bfd_vma
, long *));
50 static void print_normal
51 PARAMS ((CGEN_OPCODE_DESC
, PTR
, long, unsigned int, bfd_vma
, int));
52 static void print_address
53 PARAMS ((CGEN_OPCODE_DESC
, PTR
, bfd_vma
, unsigned int, bfd_vma
, int));
54 static void print_keyword
55 PARAMS ((CGEN_OPCODE_DESC
, PTR
, CGEN_KEYWORD
*, long, unsigned int));
56 static int extract_insn_normal
57 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*, CGEN_EXTRACT_INFO
*,
58 CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
));
59 static void print_insn_normal
60 PARAMS ((CGEN_OPCODE_DESC
, PTR
, const CGEN_INSN
*, CGEN_FIELDS
*,
62 static int print_insn
PARAMS ((CGEN_OPCODE_DESC
, bfd_vma
,
63 disassemble_info
*, char *, int));
64 static int default_print_insn
65 PARAMS ((CGEN_OPCODE_DESC
, bfd_vma
, disassemble_info
*));
67 /* -- disassembler routines inserted here */
71 print_register_list (dis_info
, value
, offset
)
76 disassemble_info
*info
= dis_info
;
81 (*info
->fprintf_func
) (info
->stream
, "r%i", index
+ offset
);
83 for (index
= 1; index
<= 7; ++index
)
87 (*info
->fprintf_func
) (info
->stream
, ",r%i", index
+ offset
);
92 print_hi_register_list (od
, dis_info
, value
, attrs
, pc
, length
)
100 print_register_list (dis_info
, value
, 8);
104 print_low_register_list (od
, dis_info
, value
, attrs
, pc
, length
)
112 print_register_list (dis_info
, value
, 0);
117 /* Main entry point for operand extraction.
119 This function is basically just a big switch statement. Earlier versions
120 used tables to look up the function to use, but
121 - if the table contains both assembler and disassembler functions then
122 the disassembler contains much of the assembler and vice-versa,
123 - there's a lot of inlining possibilities as things grow,
124 - using a switch statement avoids the function call overhead.
126 This function could be moved into `print_insn_normal', but keeping it
127 separate makes clear the interface between `print_insn_normal' and each of
132 fr30_cgen_extract_operand (od
, opindex
, ex_info
, insn_value
, fields
, pc
)
135 CGEN_EXTRACT_INFO
*ex_info
;
136 CGEN_INSN_INT insn_value
;
137 CGEN_FIELDS
* fields
;
141 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
145 case FR30_OPERAND_RI
:
146 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 12, 4, 16, total_length
, pc
, & fields
->f_Ri
);
148 case FR30_OPERAND_RJ
:
149 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 4, 16, total_length
, pc
, & fields
->f_Rj
);
151 case FR30_OPERAND_RIC
:
152 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 16, 12, 4, 16, total_length
, pc
, & fields
->f_Ric
);
154 case FR30_OPERAND_RJC
:
155 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 16, 8, 4, 16, total_length
, pc
, & fields
->f_Rjc
);
157 case FR30_OPERAND_CRI
:
158 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 16, 12, 4, 16, total_length
, pc
, & fields
->f_CRi
);
160 case FR30_OPERAND_CRJ
:
161 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 16, 8, 4, 16, total_length
, pc
, & fields
->f_CRj
);
163 case FR30_OPERAND_RS1
:
164 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 4, 16, total_length
, pc
, & fields
->f_Rs1
);
166 case FR30_OPERAND_RS2
:
167 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 12, 4, 16, total_length
, pc
, & fields
->f_Rs2
);
169 case FR30_OPERAND_R13
:
170 length
= extract_normal (od
, ex_info
, insn_value
, 0, 0, 0, 0, 0, total_length
, pc
, & fields
->f_nil
);
172 case FR30_OPERAND_R14
:
173 length
= extract_normal (od
, ex_info
, insn_value
, 0, 0, 0, 0, 0, total_length
, pc
, & fields
->f_nil
);
175 case FR30_OPERAND_R15
:
176 length
= extract_normal (od
, ex_info
, insn_value
, 0, 0, 0, 0, 0, total_length
, pc
, & fields
->f_nil
);
178 case FR30_OPERAND_PS
:
179 length
= extract_normal (od
, ex_info
, insn_value
, 0, 0, 0, 0, 0, total_length
, pc
, & fields
->f_nil
);
181 case FR30_OPERAND_U4
:
182 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 4, 16, total_length
, pc
, & fields
->f_u4
);
184 case FR30_OPERAND_U4C
:
185 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 12, 4, 16, total_length
, pc
, & fields
->f_u4c
);
187 case FR30_OPERAND_M4
:
190 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 4, 16, total_length
, pc
, & value
);
191 value
= ((value
) | ((! (15))));
192 fields
->f_m4
= value
;
195 case FR30_OPERAND_U8
:
196 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & fields
->f_u8
);
198 case FR30_OPERAND_I8
:
199 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 4, 8, 16, total_length
, pc
, & fields
->f_i8
);
201 case FR30_OPERAND_UDISP6
:
204 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 4, 16, total_length
, pc
, & value
);
205 value
= ((value
) << (2));
206 fields
->f_udisp6
= value
;
209 case FR30_OPERAND_DISP8
:
210 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 0, 4, 8, 16, total_length
, pc
, & fields
->f_disp8
);
212 case FR30_OPERAND_DISP9
:
215 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 0, 4, 8, 16, total_length
, pc
, & value
);
216 value
= ((value
) << (1));
217 fields
->f_disp9
= value
;
220 case FR30_OPERAND_DISP10
:
223 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 0, 4, 8, 16, total_length
, pc
, & value
);
224 value
= ((value
) << (2));
225 fields
->f_disp10
= value
;
228 case FR30_OPERAND_S10
:
231 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 0, 8, 8, 16, total_length
, pc
, & value
);
232 value
= ((value
) << (2));
233 fields
->f_s10
= value
;
236 case FR30_OPERAND_U10
:
239 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & value
);
240 value
= ((value
) << (2));
241 fields
->f_u10
= value
;
244 case FR30_OPERAND_I32
:
245 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGN_OPT
)|(1<<CGEN_OPERAND_UNSIGNED
), 16, 0, 32, 32, total_length
, pc
, & fields
->f_i32
);
247 case FR30_OPERAND_I20
:
249 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
)|(1<<CGEN_OPERAND_VIRTUAL
), 0, 8, 4, 16, total_length
, pc
, & fields
->f_i20_4
);
250 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
)|(1<<CGEN_OPERAND_VIRTUAL
), 16, 0, 16, 16, total_length
, pc
, & fields
->f_i20_16
);
252 FLD (f_i20
) = ((((FLD (f_i20_4
)) << (16))) | (FLD (f_i20_16
)));
256 case FR30_OPERAND_LABEL9
:
259 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
)|(1<<CGEN_OPERAND_SIGNED
), 0, 8, 8, 16, total_length
, pc
, & value
);
260 value
= ((((value
) << (1))) + (((pc
) + (2))));
261 fields
->f_rel9
= value
;
264 case FR30_OPERAND_DIR8
:
265 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & fields
->f_dir8
);
267 case FR30_OPERAND_DIR9
:
270 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & value
);
271 value
= ((value
) << (1));
272 fields
->f_dir9
= value
;
275 case FR30_OPERAND_DIR10
:
278 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & value
);
279 value
= ((value
) << (2));
280 fields
->f_dir10
= value
;
283 case FR30_OPERAND_LABEL12
:
286 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
)|(1<<CGEN_OPERAND_SIGNED
), 0, 5, 11, 16, total_length
, pc
, & value
);
287 value
= ((((value
) << (1))) + (((pc
) & (-2))));
288 fields
->f_rel12
= value
;
291 case FR30_OPERAND_REGLIST_LOW
:
292 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & fields
->f_reglist_low
);
294 case FR30_OPERAND_REGLIST_HI
:
295 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 8, 8, 16, total_length
, pc
, & fields
->f_reglist_hi
);
297 case FR30_OPERAND_CC
:
298 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 0, 4, 4, 16, total_length
, pc
, & fields
->f_cc
);
300 case FR30_OPERAND_CCC
:
301 length
= extract_normal (od
, ex_info
, insn_value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 16, 0, 8, 16, total_length
, pc
, & fields
->f_ccc
);
305 /* xgettext:c-format */
306 fprintf (stderr
, _("Unrecognized field %d while decoding insn.\n"),
314 /* Main entry point for printing operands.
316 This function is basically just a big switch statement. Earlier versions
317 used tables to look up the function to use, but
318 - if the table contains both assembler and disassembler functions then
319 the disassembler contains much of the assembler and vice-versa,
320 - there's a lot of inlining possibilities as things grow,
321 - using a switch statement avoids the function call overhead.
323 This function could be moved into `print_insn_normal', but keeping it
324 separate makes clear the interface between `print_insn_normal' and each of
329 fr30_cgen_print_operand (od
, opindex
, info
, fields
, attrs
, pc
, length
)
332 disassemble_info
* info
;
333 CGEN_FIELDS
* fields
;
340 case FR30_OPERAND_RI
:
341 print_keyword (od
, info
, & fr30_cgen_opval_h_gr
, fields
->f_Ri
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
343 case FR30_OPERAND_RJ
:
344 print_keyword (od
, info
, & fr30_cgen_opval_h_gr
, fields
->f_Rj
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
346 case FR30_OPERAND_RIC
:
347 print_keyword (od
, info
, & fr30_cgen_opval_h_gr
, fields
->f_Ric
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
349 case FR30_OPERAND_RJC
:
350 print_keyword (od
, info
, & fr30_cgen_opval_h_gr
, fields
->f_Rjc
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
352 case FR30_OPERAND_CRI
:
353 print_keyword (od
, info
, & fr30_cgen_opval_h_cr
, fields
->f_CRi
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
355 case FR30_OPERAND_CRJ
:
356 print_keyword (od
, info
, & fr30_cgen_opval_h_cr
, fields
->f_CRj
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
358 case FR30_OPERAND_RS1
:
359 print_keyword (od
, info
, & fr30_cgen_opval_h_dr
, fields
->f_Rs1
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
361 case FR30_OPERAND_RS2
:
362 print_keyword (od
, info
, & fr30_cgen_opval_h_dr
, fields
->f_Rs2
, 0|(1<<CGEN_OPERAND_UNSIGNED
));
364 case FR30_OPERAND_R13
:
365 print_keyword (od
, info
, & fr30_cgen_opval_h_r13
, fields
->f_nil
, 0);
367 case FR30_OPERAND_R14
:
368 print_keyword (od
, info
, & fr30_cgen_opval_h_r14
, fields
->f_nil
, 0);
370 case FR30_OPERAND_R15
:
371 print_keyword (od
, info
, & fr30_cgen_opval_h_r15
, fields
->f_nil
, 0);
373 case FR30_OPERAND_PS
:
374 print_keyword (od
, info
, & fr30_cgen_opval_h_ps
, fields
->f_nil
, 0);
376 case FR30_OPERAND_U4
:
377 print_normal (od
, info
, fields
->f_u4
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
379 case FR30_OPERAND_U4C
:
380 print_normal (od
, info
, fields
->f_u4c
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
382 case FR30_OPERAND_M4
:
383 print_normal (od
, info
, fields
->f_m4
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
385 case FR30_OPERAND_U8
:
386 print_normal (od
, info
, fields
->f_u8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
388 case FR30_OPERAND_I8
:
389 print_normal (od
, info
, fields
->f_i8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
391 case FR30_OPERAND_UDISP6
:
392 print_normal (od
, info
, fields
->f_udisp6
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
394 case FR30_OPERAND_DISP8
:
395 print_normal (od
, info
, fields
->f_disp8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
397 case FR30_OPERAND_DISP9
:
398 print_normal (od
, info
, fields
->f_disp9
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
400 case FR30_OPERAND_DISP10
:
401 print_normal (od
, info
, fields
->f_disp10
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
403 case FR30_OPERAND_S10
:
404 print_normal (od
, info
, fields
->f_s10
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
406 case FR30_OPERAND_U10
:
407 print_normal (od
, info
, fields
->f_u10
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
409 case FR30_OPERAND_I32
:
410 print_normal (od
, info
, fields
->f_i32
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGN_OPT
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
412 case FR30_OPERAND_I20
:
413 print_normal (od
, info
, fields
->f_i20
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
)|(1<<CGEN_OPERAND_VIRTUAL
), pc
, length
);
415 case FR30_OPERAND_LABEL9
:
416 print_address (od
, info
, fields
->f_rel9
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
418 case FR30_OPERAND_DIR8
:
419 print_normal (od
, info
, fields
->f_dir8
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
421 case FR30_OPERAND_DIR9
:
422 print_normal (od
, info
, fields
->f_dir9
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
424 case FR30_OPERAND_DIR10
:
425 print_normal (od
, info
, fields
->f_dir10
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
427 case FR30_OPERAND_LABEL12
:
428 print_address (od
, info
, fields
->f_rel12
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
)|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
430 case FR30_OPERAND_REGLIST_LOW
:
431 print_low_register_list (od
, info
, fields
->f_reglist_low
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
433 case FR30_OPERAND_REGLIST_HI
:
434 print_hi_register_list (od
, info
, fields
->f_reglist_hi
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
436 case FR30_OPERAND_CC
:
437 print_normal (od
, info
, fields
->f_cc
, 0|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
439 case FR30_OPERAND_CCC
:
440 print_normal (od
, info
, fields
->f_ccc
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), pc
, length
);
444 /* xgettext:c-format */
445 fprintf (stderr
, _("Unrecognized field %d while printing insn.\n"),
451 cgen_extract_fn
* const fr30_cgen_extract_handlers
[] =
457 cgen_print_fn
* const fr30_cgen_print_handlers
[] =
465 fr30_cgen_init_dis (od
)
471 #if ! CGEN_INT_INSN_P
473 /* Subroutine of extract_normal.
474 Ensure sufficient bytes are cached in EX_INFO.
475 OFFSET is the offset in bytes from the start of the insn of the value.
476 BYTES is the length of the needed value.
477 Returns 1 for success, 0 for failure. */
480 fill_cache (od
, ex_info
, offset
, bytes
, pc
)
482 CGEN_EXTRACT_INFO
*ex_info
;
486 /* It's doubtful that the middle part has already been fetched so
487 we don't optimize that case. kiss. */
489 disassemble_info
*info
= (disassemble_info
*) ex_info
->dis_info
;
491 /* First do a quick check. */
492 mask
= (1 << bytes
) - 1;
493 if (((ex_info
->valid
>> offset
) & mask
) == mask
)
496 /* Search for the first byte we need to read. */
497 for (mask
= 1 << offset
; bytes
> 0; --bytes
, ++offset
, mask
<<= 1)
498 if (! (mask
& ex_info
->valid
))
506 status
= (*info
->read_memory_func
)
507 (pc
, ex_info
->insn_bytes
+ offset
, bytes
, info
);
511 (*info
->memory_error_func
) (status
, pc
, info
);
515 ex_info
->valid
|= ((1 << bytes
) - 1) << offset
;
521 /* Subroutine of extract_normal. */
524 extract_1 (od
, ex_info
, start
, length
, word_length
, bufp
, pc
)
526 CGEN_EXTRACT_INFO
*ex_info
;
527 int start
,length
,word_length
;
531 unsigned long x
,mask
;
533 int big_p
= CGEN_OPCODE_INSN_ENDIAN (od
) == CGEN_ENDIAN_BIG
;
542 x
= bfd_getb16 (bufp
);
544 x
= bfd_getl16 (bufp
);
547 /* ??? This may need reworking as these cases don't necessarily
548 want the first byte and the last two bytes handled like this. */
550 x
= (bufp
[0] << 16) | bfd_getb16 (bufp
+ 1);
552 x
= bfd_getl16 (bufp
) | (bufp
[2] << 16);
556 x
= bfd_getb32 (bufp
);
558 x
= bfd_getl32 (bufp
);
564 /* Written this way to avoid undefined behaviour. */
565 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
566 if (CGEN_INSN_LSB0_P
)
567 shift
= (start
+ 1) - length
;
569 shift
= (word_length
- (start
+ length
));
570 return (x
>> shift
) & mask
;
573 #endif /* ! CGEN_INT_INSN_P */
575 /* Default extraction routine.
577 INSN_VALUE is the first CGEN_BASE_INSN_SIZE bits of the insn in host order,
578 or sometimes less for cases like the m32r where the base insn size is 32
579 but some insns are 16 bits.
580 ATTRS is a mask of the boolean attributes. We only need `UNSIGNED',
581 but for generality we take a bitmask of all of them.
582 WORD_OFFSET is the offset in bits from the start of the insn of the value.
583 WORD_LENGTH is the length of the word in bits in which the value resides.
584 START is the starting bit number in the word, architecture origin.
585 LENGTH is the length of VALUE in bits.
586 TOTAL_LENGTH is the total length of the insn in bits.
588 Returns 1 for success, 0 for failure. */
590 /* ??? The return code isn't properly used. wip. */
592 /* ??? This doesn't handle bfd_vma's. Create another function when
596 extract_normal (od
, ex_info
, insn_value
, attrs
, word_offset
, start
, length
,
597 word_length
, total_length
, pc
, valuep
)
599 CGEN_EXTRACT_INFO
*ex_info
;
600 CGEN_INSN_INT insn_value
;
602 unsigned int word_offset
, start
, length
, word_length
, total_length
;
608 /* If LENGTH is zero, this operand doesn't contribute to the value
609 so give it a standard value of zero. */
620 if (word_length
> 32)
623 /* For architectures with insns smaller than the insn-base-bitsize,
624 word_length may be too big. */
625 #if CGEN_MIN_INSN_BITSIZE < CGEN_BASE_INSN_BITSIZE
627 && word_length
> total_length
)
628 word_length
= total_length
;
631 /* Does the value reside in INSN_VALUE? */
633 if (word_offset
== 0)
635 /* Written this way to avoid undefined behaviour. */
636 CGEN_INSN_INT mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
638 if (CGEN_INSN_LSB0_P
)
639 value
= insn_value
>> ((start
+ 1) - length
);
641 value
= insn_value
>> (word_length
- (start
+ length
));
644 if (! (attrs
& CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED
))
645 && (value
& (1L << (length
- 1))))
649 #if ! CGEN_INT_INSN_P
653 unsigned char *bufp
= ex_info
->insn_bytes
+ word_offset
/ 8;
655 if (word_length
> 32)
658 if (fill_cache (od
, ex_info
, word_offset
/ 8, word_length
/ 8, pc
) == 0)
661 value
= extract_1 (od
, ex_info
, start
, length
, word_length
, bufp
, pc
);
664 #endif /* ! CGEN_INT_INSN_P */
671 /* Default print handler. */
674 print_normal (od
, dis_info
, value
, attrs
, pc
, length
)
682 disassemble_info
*info
= (disassemble_info
*) dis_info
;
684 #ifdef CGEN_PRINT_NORMAL
685 CGEN_PRINT_NORMAL (od
, info
, value
, attrs
, pc
, length
);
688 /* Print the operand as directed by the attributes. */
689 if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SEM_ONLY
))
690 ; /* nothing to do */
691 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_UNSIGNED
))
692 (*info
->fprintf_func
) (info
->stream
, "0x%lx", value
);
694 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
697 /* Default address handler. */
700 print_address (od
, dis_info
, value
, attrs
, pc
, length
)
708 disassemble_info
*info
= (disassemble_info
*) dis_info
;
710 #ifdef CGEN_PRINT_ADDRESS
711 CGEN_PRINT_ADDRESS (od
, info
, value
, attrs
, pc
, length
);
714 /* Print the operand as directed by the attributes. */
715 if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SEM_ONLY
))
716 ; /* nothing to do */
717 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_PCREL_ADDR
))
718 (*info
->print_address_func
) (value
, info
);
719 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_ABS_ADDR
))
720 (*info
->print_address_func
) (value
, info
);
721 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_UNSIGNED
))
722 (*info
->fprintf_func
) (info
->stream
, "0x%lx", (long) value
);
724 (*info
->fprintf_func
) (info
->stream
, "%ld", (long) value
);
727 /* Keyword print handler. */
730 print_keyword (od
, dis_info
, keyword_table
, value
, attrs
)
733 CGEN_KEYWORD
*keyword_table
;
737 disassemble_info
*info
= (disassemble_info
*) dis_info
;
738 const CGEN_KEYWORD_ENTRY
*ke
;
740 ke
= cgen_keyword_lookup_value (keyword_table
, value
);
742 (*info
->fprintf_func
) (info
->stream
, "%s", ke
->name
);
744 (*info
->fprintf_func
) (info
->stream
, "???");
747 /* Default insn extractor.
749 INSN_VALUE is the first CGEN_BASE_INSN_SIZE bytes, translated to host order.
750 The extracted fields are stored in FIELDS.
751 EX_INFO is used to handle reading variable length insns.
752 Return the length of the insn in bits, or 0 if no match,
753 or -1 if an error occurs fetching data (memory_error_func will have
757 extract_insn_normal (od
, insn
, ex_info
, insn_value
, fields
, pc
)
759 const CGEN_INSN
*insn
;
760 CGEN_EXTRACT_INFO
*ex_info
;
761 CGEN_INSN_INT insn_value
;
765 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
766 const unsigned char *syn
;
768 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
770 CGEN_INIT_EXTRACT (od
);
772 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
776 if (CGEN_SYNTAX_CHAR_P (*syn
))
779 length
= fr30_cgen_extract_operand (od
, CGEN_SYNTAX_FIELD (*syn
),
780 ex_info
, insn_value
, fields
, pc
);
785 /* We recognized and successfully extracted this insn. */
786 return CGEN_INSN_BITSIZE (insn
);
789 /* Default insn printer.
791 DIS_INFO is defined as `PTR' so the disassembler needn't know anything
792 about disassemble_info. */
795 print_insn_normal (od
, dis_info
, insn
, fields
, pc
, length
)
798 const CGEN_INSN
*insn
;
803 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
804 disassemble_info
*info
= (disassemble_info
*) dis_info
;
805 const unsigned char *syn
;
807 CGEN_INIT_PRINT (od
);
809 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
811 if (CGEN_SYNTAX_MNEMONIC_P (*syn
))
813 (*info
->fprintf_func
) (info
->stream
, "%s", CGEN_INSN_MNEMONIC (insn
));
816 if (CGEN_SYNTAX_CHAR_P (*syn
))
818 (*info
->fprintf_func
) (info
->stream
, "%c", CGEN_SYNTAX_CHAR (*syn
));
822 /* We have an operand. */
823 fr30_cgen_print_operand (od
, CGEN_SYNTAX_FIELD (*syn
), info
,
824 fields
, CGEN_INSN_ATTRS (insn
), pc
, length
);
828 /* Utility to print an insn.
829 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
830 The result is the size of the insn in bytes or zero for an unknown insn
831 or -1 if an error occurs fetching data (memory_error_func will have
835 print_insn (od
, pc
, info
, buf
, buflen
)
838 disassemble_info
*info
;
842 unsigned long insn_value
;
843 const CGEN_INSN_LIST
*insn_list
;
844 CGEN_EXTRACT_INFO ex_info
;
846 ex_info
.dis_info
= info
;
847 ex_info
.valid
= (1 << CGEN_BASE_INSN_SIZE
) - 1;
848 ex_info
.insn_bytes
= buf
;
856 insn_value
= info
->endian
== BFD_ENDIAN_BIG
? bfd_getb16 (buf
) : bfd_getl16 (buf
);
859 insn_value
= info
->endian
== BFD_ENDIAN_BIG
? bfd_getb32 (buf
) : bfd_getl32 (buf
);
865 /* The instructions are stored in hash lists.
866 Pick the first one and keep trying until we find the right one. */
868 insn_list
= CGEN_DIS_LOOKUP_INSN (od
, buf
, insn_value
);
869 while (insn_list
!= NULL
)
871 const CGEN_INSN
*insn
= insn_list
->insn
;
875 #if 0 /* not needed as insn shouldn't be in hash lists if not supported */
876 /* Supported by this cpu? */
877 if (! fr30_cgen_insn_supported (od
, insn
))
881 /* Basic bit mask must be correct. */
882 /* ??? May wish to allow target to defer this check until the extract
884 if ((insn_value
& CGEN_INSN_BASE_MASK (insn
))
885 == CGEN_INSN_BASE_VALUE (insn
))
887 /* Printing is handled in two passes. The first pass parses the
888 machine insn and extracts the fields. The second pass prints
891 length
= (*CGEN_EXTRACT_FN (insn
)) (od
, insn
, &ex_info
, insn_value
,
893 /* length < 0 -> error */
898 (*CGEN_PRINT_FN (insn
)) (od
, info
, insn
, &fields
, pc
, length
);
899 /* length is in bits, result is in bytes */
904 insn_list
= CGEN_DIS_NEXT_INSN (insn_list
);
910 /* Default value for CGEN_PRINT_INSN.
911 The result is the size of the insn in bytes or zero for an unknown insn
912 or -1 if an error occured fetching bytes. */
914 #ifndef CGEN_PRINT_INSN
915 #define CGEN_PRINT_INSN default_print_insn
919 default_print_insn (od
, pc
, info
)
922 disassemble_info
*info
;
924 char buf
[CGEN_MAX_INSN_SIZE
];
927 /* Read the base part of the insn. */
929 status
= (*info
->read_memory_func
) (pc
, buf
, CGEN_BASE_INSN_SIZE
, info
);
932 (*info
->memory_error_func
) (status
, pc
, info
);
936 return print_insn (od
, pc
, info
, buf
, CGEN_BASE_INSN_SIZE
);
940 Print one instruction from PC on INFO->STREAM.
941 Return the size of the instruction (in bytes). */
944 print_insn_fr30 (pc
, info
)
946 disassemble_info
*info
;
949 static CGEN_OPCODE_DESC od
= 0;
950 int mach
= info
->mach
;
951 int big_p
= info
->endian
== BFD_ENDIAN_BIG
;
953 /* If we haven't initialized yet, initialize the opcode table. */
956 od
= fr30_cgen_opcode_open (mach
,
959 : CGEN_ENDIAN_LITTLE
);
960 fr30_cgen_init_dis (od
);
962 /* If we've switched cpu's, re-initialize. */
963 /* ??? Perhaps we should use BFD_ENDIAN. */
964 else if (mach
!= CGEN_OPCODE_MACH (od
)
965 || (CGEN_OPCODE_ENDIAN (od
)
966 != (big_p
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE
)))
968 cgen_set_cpu (od
, mach
, big_p
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE
);
971 /* We try to have as much common code as possible.
972 But at this point some targets need to take over. */
973 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
974 but if not possible try to move this hook elsewhere rather than
976 length
= CGEN_PRINT_INSN (od
, pc
, info
);
982 (*info
->fprintf_func
) (info
->stream
, UNKNOWN_INSN_MSG
);
983 return CGEN_DEFAULT_INSN_SIZE
;