opcodes/fr30-ibld.c

   1 /* Instruction building/extraction support for fr30. -*- C -*-
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
   4 - the resultant file is machine generated, cgen-ibld.in isn't
   5
   6 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   7
   8 This file is part of the GNU Binutils and GDB, the GNU debugger.
   9
  10 This program is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 2, or (at your option)
  13 any later version.
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with this program; if not, write to the Free Software Foundation, Inc.,
  22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  25    Keep that in mind.  */
  26
  27 #include "sysdep.h"
  28 #include <stdio.h>
  29 #include "ansidecl.h"
  30 #include "dis-asm.h"
  31 #include "bfd.h"
  32 #include "symcat.h"
  33 #include "fr30-desc.h"
  34 #include "fr30-opc.h"
  35 #include "opintl.h"
  36
  37 #undef min
  38 #define min(a,b) ((a) < (b) ? (a) : (b))
  39 #undef max
  40 #define max(a,b) ((a) > (b) ? (a) : (b))
  41
  42 /* Used by the ifield rtx function.  */
  43 #define FLD(f) (fields->f)
  44
  45 static const char * insert_normal
  46      PARAMS ((CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  47               unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR));
  48 static const char * insert_insn_normal
  49      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *,
  50               CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
  51 static int extract_normal
  52      PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  53               unsigned int, unsigned int, unsigned int, unsigned int,
  54               unsigned int, unsigned int, bfd_vma, long *));
  55 static int extract_insn_normal
  56      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  57               CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma));
  58 #if CGEN_INT_INSN_P
  59 static void put_insn_int_value
  60      PARAMS ((CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT));
  61 #endif
  62 static CGEN_INLINE int fill_cache
  63      PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma));
  64 static CGEN_INLINE long extract_1
  65      PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *,
  66               bfd_vma));
  67 static CGEN_INLINE void insert_1
  68      PARAMS ((CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *));
  69 const char * fr30_cgen_insert_operand
  70      PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
  71 int fr30_cgen_extract_operand
  72      PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *,
  73               bfd_vma));
  74 int fr30_cgen_get_int_operand
  75      PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
  76 bfd_vma fr30_cgen_get_vma_operand
  77      PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
  78 void fr30_cgen_set_int_operand
  79      PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int));
  80 void fr30_cgen_set_vma_operand
  81      PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma));
  82
  83 \f
  84 /* Operand insertion.  */
  85
  86 #if ! CGEN_INT_INSN_P
  87
  88 /* Subroutine of insert_normal.  */
  89
  90 static CGEN_INLINE void
  91 insert_1 (cd, value, start, length, word_length, bufp)
  92      CGEN_CPU_DESC cd;
  93      unsigned long value;
  94      int start,length,word_length;
  95      unsigned char *bufp;
  96 {
  97   unsigned long x,mask;
  98   int shift;
  99   int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
 100
 101   x = bfd_get_bits (bufp, word_length, big_p);
 102
 103   /* Written this way to avoid undefined behaviour.  */
 104   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 105   if (CGEN_INSN_LSB0_P)
 106     shift = (start + 1) - length;
 107   else
 108     shift = (word_length - (start + length));
 109   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 110
 111   bfd_put_bits ((bfd_vma) x, bufp, word_length, big_p);
 112 }
 113
 114 #endif /* ! CGEN_INT_INSN_P */
 115
 116 /* Default insertion routine.
 117
 118    ATTRS is a mask of the boolean attributes.
 119    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 120    WORD_LENGTH is the length of the word in bits in which the value resides.
 121    START is the starting bit number in the word, architecture origin.
 122    LENGTH is the length of VALUE in bits.
 123    TOTAL_LENGTH is the total length of the insn in bits.
 124
 125    The result is an error message or NULL if success.  */
 126
 127 /* ??? This duplicates functionality with bfd's howto table and
 128    bfd_install_relocation.  */
 129 /* ??? This doesn't handle bfd_vma's.  Create another function when
 130    necessary.  */
 131
 132 static const char *
 133 insert_normal (cd, value, attrs, word_offset, start, length, word_length,
 134                total_length, buffer)
 135      CGEN_CPU_DESC cd;
 136      long value;
 137      unsigned int attrs;
 138      unsigned int word_offset, start, length, word_length, total_length;
 139      CGEN_INSN_BYTES_PTR buffer;
 140 {
 141   static char errbuf[100];
 142   /* Written this way to avoid undefined behaviour.  */
 143   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 144
 145   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 146   if (length == 0)
 147     return NULL;
 148
 149 #if 0
 150   if (CGEN_INT_INSN_P
 151       && word_offset != 0)
 152     abort ();
 153 #endif
 154
 155   if (word_length > 32)
 156     abort ();
 157
 158   /* For architectures with insns smaller than the base-insn-bitsize,
 159      word_length may be too big.  */
 160   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 161     {
 162       if (word_offset == 0
 163           && word_length > total_length)
 164         word_length = total_length;
 165     }
 166
 167   /* Ensure VALUE will fit.  */
 168   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
 169     {
 170       long minval = - (1L << (length - 1));
 171       unsigned long maxval = mask;
 172
 173       if ((value > 0 && (unsigned long) value > maxval)
 174           || value < minval)
 175         {
 176           /* xgettext:c-format */
 177           sprintf (errbuf,
 178                    _("operand out of range (%ld not between %ld and %lu)"),
 179                    value, minval, maxval);
 180           return errbuf;
 181         }
 182     }
 183   else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
 184     {
 185       unsigned long maxval = mask;
 186
 187       if ((unsigned long) value > maxval)
 188         {
 189           /* xgettext:c-format */
 190           sprintf (errbuf,
 191                    _("operand out of range (%lu not between 0 and %lu)"),
 192                    value, maxval);
 193           return errbuf;
 194         }
 195     }
 196   else
 197     {
 198       if (! cgen_signed_overflow_ok_p (cd))
 199         {
 200           long minval = - (1L << (length - 1));
 201           long maxval =   (1L << (length - 1)) - 1;
 202
 203           if (value < minval || value > maxval)
 204             {
 205               sprintf
 206                 /* xgettext:c-format */
 207                 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 208                  value, minval, maxval);
 209               return errbuf;
 210             }
 211         }
 212     }
 213
 214 #if CGEN_INT_INSN_P
 215
 216   {
 217     int shift;
 218
 219     if (CGEN_INSN_LSB0_P)
 220       shift = (word_offset + start + 1) - length;
 221     else
 222       shift = total_length - (word_offset + start + length);
 223     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 224   }
 225
 226 #else /* ! CGEN_INT_INSN_P */
 227
 228   {
 229     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
 230
 231     insert_1 (cd, value, start, length, word_length, bufp);
 232   }
 233
 234 #endif /* ! CGEN_INT_INSN_P */
 235
 236   return NULL;
 237 }
 238
 239 /* Default insn builder (insert handler).
 240    The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
 241    that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
 242    recorded in host byte order, otherwise BUFFER is an array of bytes
 243    and the value is recorded in target byte order).
 244    The result is an error message or NULL if success.  */
 245
 246 static const char *
 247 insert_insn_normal (cd, insn, fields, buffer, pc)
 248      CGEN_CPU_DESC cd;
 249      const CGEN_INSN * insn;
 250      CGEN_FIELDS * fields;
 251      CGEN_INSN_BYTES_PTR buffer;
 252      bfd_vma pc;
 253 {
 254   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 255   unsigned long value;
 256   const CGEN_SYNTAX_CHAR_TYPE * syn;
 257
 258   CGEN_INIT_INSERT (cd);
 259   value = CGEN_INSN_BASE_VALUE (insn);
 260
 261   /* If we're recording insns as numbers (rather than a string of bytes),
 262      target byte order handling is deferred until later.  */
 263
 264 #if CGEN_INT_INSN_P
 265
 266   put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
 267                       CGEN_FIELDS_BITSIZE (fields), value);
 268
 269 #else
 270
 271   cgen_put_insn_value (cd, buffer, min (cd->base_insn_bitsize,
 272                                         (unsigned) CGEN_FIELDS_BITSIZE (fields)),
 273                        value);
 274
 275 #endif /* ! CGEN_INT_INSN_P */
 276
 277   /* ??? It would be better to scan the format's fields.
 278      Still need to be able to insert a value based on the operand though;
 279      e.g. storing a branch displacement that got resolved later.
 280      Needs more thought first.  */
 281
 282   for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
 283     {
 284       const char *errmsg;
 285
 286       if (CGEN_SYNTAX_CHAR_P (* syn))
 287         continue;
 288
 289       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 290                                        fields, buffer, pc);
 291       if (errmsg)
 292         return errmsg;
 293     }
 294
 295   return NULL;
 296 }
 297
 298 #if CGEN_INT_INSN_P
 299 /* Cover function to store an insn value into an integral insn.  Must go here
 300  because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
 301
 302 static void
 303 put_insn_int_value (cd, buf, length, insn_length, value)
 304      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 305      CGEN_INSN_BYTES_PTR buf;
 306      int length;
 307      int insn_length;
 308      CGEN_INSN_INT value;
 309 {
 310   /* For architectures with insns smaller than the base-insn-bitsize,
 311      length may be too big.  */
 312   if (length > insn_length)
 313     *buf = value;
 314   else
 315     {
 316       int shift = insn_length - length;
 317       /* Written this way to avoid undefined behaviour.  */
 318       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
 319       *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
 320     }
 321 }
 322 #endif
 323 \f
 324 /* Operand extraction.  */
 325
 326 #if ! CGEN_INT_INSN_P
 327
 328 /* Subroutine of extract_normal.
 329    Ensure sufficient bytes are cached in EX_INFO.
 330    OFFSET is the offset in bytes from the start of the insn of the value.
 331    BYTES is the length of the needed value.
 332    Returns 1 for success, 0 for failure.  */
 333
 334 static CGEN_INLINE int
 335 fill_cache (cd, ex_info, offset, bytes, pc)
 336      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 337      CGEN_EXTRACT_INFO *ex_info;
 338      int offset, bytes;
 339      bfd_vma pc;
 340 {
 341   /* It's doubtful that the middle part has already been fetched so
 342      we don't optimize that case.  kiss.  */
 343   unsigned int mask;
 344   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
 345
 346   /* First do a quick check.  */
 347   mask = (1 << bytes) - 1;
 348   if (((ex_info->valid >> offset) & mask) == mask)
 349     return 1;
 350
 351   /* Search for the first byte we need to read.  */
 352   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
 353     if (! (mask & ex_info->valid))
 354       break;
 355
 356   if (bytes)
 357     {
 358       int status;
 359
 360       pc += offset;
 361       status = (*info->read_memory_func)
 362         (pc, ex_info->insn_bytes + offset, bytes, info);
 363
 364       if (status != 0)
 365         {
 366           (*info->memory_error_func) (status, pc, info);
 367           return 0;
 368         }
 369
 370       ex_info->valid |= ((1 << bytes) - 1) << offset;
 371     }
 372
 373   return 1;
 374 }
 375
 376 /* Subroutine of extract_normal.  */
 377
 378 static CGEN_INLINE long
 379 extract_1 (cd, ex_info, start, length, word_length, bufp, pc)
 380      CGEN_CPU_DESC cd;
 381      CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED;
 382      int start,length,word_length;
 383      unsigned char *bufp;
 384      bfd_vma pc ATTRIBUTE_UNUSED;
 385 {
 386   unsigned long x;
 387   int shift;
 388   int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
 389
 390   x = bfd_get_bits (bufp, word_length, big_p);
 391
 392   if (CGEN_INSN_LSB0_P)
 393     shift = (start + 1) - length;
 394   else
 395     shift = (word_length - (start + length));
 396   return x >> shift;
 397 }
 398
 399 #endif /* ! CGEN_INT_INSN_P */
 400
 401 /* Default extraction routine.
 402
 403    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
 404    or sometimes less for cases like the m32r where the base insn size is 32
 405    but some insns are 16 bits.
 406    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
 407    but for generality we take a bitmask of all of them.
 408    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 409    WORD_LENGTH is the length of the word in bits in which the value resides.
 410    START is the starting bit number in the word, architecture origin.
 411    LENGTH is the length of VALUE in bits.
 412    TOTAL_LENGTH is the total length of the insn in bits.
 413
 414    Returns 1 for success, 0 for failure.  */
 415
 416 /* ??? The return code isn't properly used.  wip.  */
 417
 418 /* ??? This doesn't handle bfd_vma's.  Create another function when
 419    necessary.  */
 420
 421 static int
 422 extract_normal (cd, ex_info, insn_value, attrs, word_offset, start, length,
 423                 word_length, total_length, pc, valuep)
 424      CGEN_CPU_DESC cd;
 425 #if ! CGEN_INT_INSN_P
 426      CGEN_EXTRACT_INFO *ex_info;
 427 #else
 428      CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED;
 429 #endif
 430      CGEN_INSN_INT insn_value;
 431      unsigned int attrs;
 432      unsigned int word_offset, start, length, word_length, total_length;
 433 #if ! CGEN_INT_INSN_P
 434      bfd_vma pc;
 435 #else
 436      bfd_vma pc ATTRIBUTE_UNUSED;
 437 #endif
 438      long *valuep;
 439 {
 440   long value, mask;
 441
 442   /* If LENGTH is zero, this operand doesn't contribute to the value
 443      so give it a standard value of zero.  */
 444   if (length == 0)
 445     {
 446       *valuep = 0;
 447       return 1;
 448     }
 449
 450 #if 0
 451   if (CGEN_INT_INSN_P
 452       && word_offset != 0)
 453     abort ();
 454 #endif
 455
 456   if (word_length > 32)
 457     abort ();
 458
 459   /* For architectures with insns smaller than the insn-base-bitsize,
 460      word_length may be too big.  */
 461   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 462     {
 463       if (word_offset == 0
 464           && word_length > total_length)
 465         word_length = total_length;
 466     }
 467
 468   /* Does the value reside in INSN_VALUE, and at the right alignment?  */
 469
 470   if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
 471     {
 472       if (CGEN_INSN_LSB0_P)
 473         value = insn_value >> ((word_offset + start + 1) - length);
 474       else
 475         value = insn_value >> (total_length - ( word_offset + start + length));
 476     }
 477
 478 #if ! CGEN_INT_INSN_P
 479
 480   else
 481     {
 482       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
 483
 484       if (word_length > 32)
 485         abort ();
 486
 487       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
 488         return 0;
 489
 490       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
 491     }
 492
 493 #endif /* ! CGEN_INT_INSN_P */
 494
 495   /* Written this way to avoid undefined behaviour.  */
 496   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 497
 498   value &= mask;
 499   /* sign extend? */
 500   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
 501       && (value & (1L << (length - 1))))
 502     value |= ~mask;
 503
 504   *valuep = value;
 505
 506   return 1;
 507 }
 508
 509 /* Default insn extractor.
 510
 511    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
 512    The extracted fields are stored in FIELDS.
 513    EX_INFO is used to handle reading variable length insns.
 514    Return the length of the insn in bits, or 0 if no match,
 515    or -1 if an error occurs fetching data (memory_error_func will have
 516    been called).  */
 517
 518 static int
 519 extract_insn_normal (cd, insn, ex_info, insn_value, fields, pc)
 520      CGEN_CPU_DESC cd;
 521      const CGEN_INSN *insn;
 522      CGEN_EXTRACT_INFO *ex_info;
 523      CGEN_INSN_INT insn_value;
 524      CGEN_FIELDS *fields;
 525      bfd_vma pc;
 526 {
 527   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 528   const CGEN_SYNTAX_CHAR_TYPE *syn;
 529
 530   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 531
 532   CGEN_INIT_EXTRACT (cd);
 533
 534   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 535     {
 536       int length;
 537
 538       if (CGEN_SYNTAX_CHAR_P (*syn))
 539         continue;
 540
 541       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 542                                         ex_info, insn_value, fields, pc);
 543       if (length <= 0)
 544         return length;
 545     }
 546
 547   /* We recognized and successfully extracted this insn.  */
 548   return CGEN_INSN_BITSIZE (insn);
 549 }
 550 \f
 551 /* machine generated code added here */
 552
 553 /* Main entry point for operand insertion.
 554
 555    This function is basically just a big switch statement.  Earlier versions
 556    used tables to look up the function to use, but
 557    - if the table contains both assembler and disassembler functions then
 558      the disassembler contains much of the assembler and vice-versa,
 559    - there's a lot of inlining possibilities as things grow,
 560    - using a switch statement avoids the function call overhead.
 561
 562    This function could be moved into `parse_insn_normal', but keeping it
 563    separate makes clear the interface between `parse_insn_normal' and each of
 564    the handlers.  It's also needed by GAS to insert operands that couldn't be
 565    resolved during parsing.
 566 */
 567
 568 const char *
 569 fr30_cgen_insert_operand (cd, opindex, fields, buffer, pc)
 570      CGEN_CPU_DESC cd;
 571      int opindex;
 572      CGEN_FIELDS * fields;
 573      CGEN_INSN_BYTES_PTR buffer;
 574      bfd_vma pc;
 575 {
 576   const char * errmsg = NULL;
 577   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 578
 579   switch (opindex)
 580     {
 581     case FR30_OPERAND_CRI :
 582       errmsg = insert_normal (cd, fields->f_CRi, 0, 16, 12, 4, 16, total_length, buffer);
 583       break;
 584     case FR30_OPERAND_CRJ :
 585       errmsg = insert_normal (cd, fields->f_CRj, 0, 16, 8, 4, 16, total_length, buffer);
 586       break;
 587     case FR30_OPERAND_R13 :
 588       break;
 589     case FR30_OPERAND_R14 :
 590       break;
 591     case FR30_OPERAND_R15 :
 592       break;
 593     case FR30_OPERAND_RI :
 594       errmsg = insert_normal (cd, fields->f_Ri, 0, 0, 12, 4, 16, total_length, buffer);
 595       break;
 596     case FR30_OPERAND_RIC :
 597       errmsg = insert_normal (cd, fields->f_Ric, 0, 16, 12, 4, 16, total_length, buffer);
 598       break;
 599     case FR30_OPERAND_RJ :
 600       errmsg = insert_normal (cd, fields->f_Rj, 0, 0, 8, 4, 16, total_length, buffer);
 601       break;
 602     case FR30_OPERAND_RJC :
 603       errmsg = insert_normal (cd, fields->f_Rjc, 0, 16, 8, 4, 16, total_length, buffer);
 604       break;
 605     case FR30_OPERAND_RS1 :
 606       errmsg = insert_normal (cd, fields->f_Rs1, 0, 0, 8, 4, 16, total_length, buffer);
 607       break;
 608     case FR30_OPERAND_RS2 :
 609       errmsg = insert_normal (cd, fields->f_Rs2, 0, 0, 12, 4, 16, total_length, buffer);
 610       break;
 611     case FR30_OPERAND_CC :
 612       errmsg = insert_normal (cd, fields->f_cc, 0, 0, 4, 4, 16, total_length, buffer);
 613       break;
 614     case FR30_OPERAND_CCC :
 615       errmsg = insert_normal (cd, fields->f_ccc, 0, 16, 0, 8, 16, total_length, buffer);
 616       break;
 617     case FR30_OPERAND_DIR10 :
 618       {
 619         long value = fields->f_dir10;
 620         value = ((unsigned int) (value) >> (2));
 621         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 622       }
 623       break;
 624     case FR30_OPERAND_DIR8 :
 625       errmsg = insert_normal (cd, fields->f_dir8, 0, 0, 8, 8, 16, total_length, buffer);
 626       break;
 627     case FR30_OPERAND_DIR9 :
 628       {
 629         long value = fields->f_dir9;
 630         value = ((unsigned int) (value) >> (1));
 631         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 632       }
 633       break;
 634     case FR30_OPERAND_DISP10 :
 635       {
 636         long value = fields->f_disp10;
 637         value = ((int) (value) >> (2));
 638         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 639       }
 640       break;
 641     case FR30_OPERAND_DISP8 :
 642       errmsg = insert_normal (cd, fields->f_disp8, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 643       break;
 644     case FR30_OPERAND_DISP9 :
 645       {
 646         long value = fields->f_disp9;
 647         value = ((int) (value) >> (1));
 648         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 649       }
 650       break;
 651     case FR30_OPERAND_I20 :
 652       {
 653 {
 654   FLD (f_i20_4) = ((unsigned int) (FLD (f_i20)) >> (16));
 655   FLD (f_i20_16) = ((FLD (f_i20)) & (65535));
 656 }
 657         errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer);
 658         if (errmsg)
 659           break;
 660         errmsg = insert_normal (cd, fields->f_i20_16, 0, 16, 0, 16, 16, total_length, buffer);
 661         if (errmsg)
 662           break;
 663       }
 664       break;
 665     case FR30_OPERAND_I32 :
 666       errmsg = insert_normal (cd, fields->f_i32, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, buffer);
 667       break;
 668     case FR30_OPERAND_I8 :
 669       errmsg = insert_normal (cd, fields->f_i8, 0, 0, 4, 8, 16, total_length, buffer);
 670       break;
 671     case FR30_OPERAND_LABEL12 :
 672       {
 673         long value = fields->f_rel12;
 674         value = ((int) (((value) - (((pc) + (2))))) >> (1));
 675         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, buffer);
 676       }
 677       break;
 678     case FR30_OPERAND_LABEL9 :
 679       {
 680         long value = fields->f_rel9;
 681         value = ((int) (((value) - (((pc) + (2))))) >> (1));
 682         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, buffer);
 683       }
 684       break;
 685     case FR30_OPERAND_M4 :
 686       {
 687         long value = fields->f_m4;
 688         value = ((value) & (15));
 689         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 690       }
 691       break;
 692     case FR30_OPERAND_PS :
 693       break;
 694     case FR30_OPERAND_REGLIST_HI_LD :
 695       errmsg = insert_normal (cd, fields->f_reglist_hi_ld, 0, 0, 8, 8, 16, total_length, buffer);
 696       break;
 697     case FR30_OPERAND_REGLIST_HI_ST :
 698       errmsg = insert_normal (cd, fields->f_reglist_hi_st, 0, 0, 8, 8, 16, total_length, buffer);
 699       break;
 700     case FR30_OPERAND_REGLIST_LOW_LD :
 701       errmsg = insert_normal (cd, fields->f_reglist_low_ld, 0, 0, 8, 8, 16, total_length, buffer);
 702       break;
 703     case FR30_OPERAND_REGLIST_LOW_ST :
 704       errmsg = insert_normal (cd, fields->f_reglist_low_st, 0, 0, 8, 8, 16, total_length, buffer);
 705       break;
 706     case FR30_OPERAND_S10 :
 707       {
 708         long value = fields->f_s10;
 709         value = ((int) (value) >> (2));
 710         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, buffer);
 711       }
 712       break;
 713     case FR30_OPERAND_U10 :
 714       {
 715         long value = fields->f_u10;
 716         value = ((unsigned int) (value) >> (2));
 717         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 718       }
 719       break;
 720     case FR30_OPERAND_U4 :
 721       errmsg = insert_normal (cd, fields->f_u4, 0, 0, 8, 4, 16, total_length, buffer);
 722       break;
 723     case FR30_OPERAND_U4C :
 724       errmsg = insert_normal (cd, fields->f_u4c, 0, 0, 12, 4, 16, total_length, buffer);
 725       break;
 726     case FR30_OPERAND_U8 :
 727       errmsg = insert_normal (cd, fields->f_u8, 0, 0, 8, 8, 16, total_length, buffer);
 728       break;
 729     case FR30_OPERAND_UDISP6 :
 730       {
 731         long value = fields->f_udisp6;
 732         value = ((unsigned int) (value) >> (2));
 733         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 734       }
 735       break;
 736
 737     default :
 738       /* xgettext:c-format */
 739       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
 740                opindex);
 741       abort ();
 742   }
 743
 744   return errmsg;
 745 }
 746
 747 /* Main entry point for operand extraction.
 748    The result is <= 0 for error, >0 for success.
 749    ??? Actual values aren't well defined right now.
 750
 751    This function is basically just a big switch statement.  Earlier versions
 752    used tables to look up the function to use, but
 753    - if the table contains both assembler and disassembler functions then
 754      the disassembler contains much of the assembler and vice-versa,
 755    - there's a lot of inlining possibilities as things grow,
 756    - using a switch statement avoids the function call overhead.
 757
 758    This function could be moved into `print_insn_normal', but keeping it
 759    separate makes clear the interface between `print_insn_normal' and each of
 760    the handlers.
 761 */
 762
 763 int
 764 fr30_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc)
 765      CGEN_CPU_DESC cd;
 766      int opindex;
 767      CGEN_EXTRACT_INFO *ex_info;
 768      CGEN_INSN_INT insn_value;
 769      CGEN_FIELDS * fields;
 770      bfd_vma pc;
 771 {
 772   /* Assume success (for those operands that are nops).  */
 773   int length = 1;
 774   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 775
 776   switch (opindex)
 777     {
 778     case FR30_OPERAND_CRI :
 779       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_CRi);
 780       break;
 781     case FR30_OPERAND_CRJ :
 782       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_CRj);
 783       break;
 784     case FR30_OPERAND_R13 :
 785       break;
 786     case FR30_OPERAND_R14 :
 787       break;
 788     case FR30_OPERAND_R15 :
 789       break;
 790     case FR30_OPERAND_RI :
 791       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Ri);
 792       break;
 793     case FR30_OPERAND_RIC :
 794       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_Ric);
 795       break;
 796     case FR30_OPERAND_RJ :
 797       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rj);
 798       break;
 799     case FR30_OPERAND_RJC :
 800       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_Rjc);
 801       break;
 802     case FR30_OPERAND_RS1 :
 803       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rs1);
 804       break;
 805     case FR30_OPERAND_RS2 :
 806       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Rs2);
 807       break;
 808     case FR30_OPERAND_CC :
 809       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 16, total_length, pc, & fields->f_cc);
 810       break;
 811     case FR30_OPERAND_CCC :
 812       length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 8, 16, total_length, pc, & fields->f_ccc);
 813       break;
 814     case FR30_OPERAND_DIR10 :
 815       {
 816         long value;
 817         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 818         value = ((value) << (2));
 819         fields->f_dir10 = value;
 820       }
 821       break;
 822     case FR30_OPERAND_DIR8 :
 823       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_dir8);
 824       break;
 825     case FR30_OPERAND_DIR9 :
 826       {
 827         long value;
 828         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 829         value = ((value) << (1));
 830         fields->f_dir9 = value;
 831       }
 832       break;
 833     case FR30_OPERAND_DISP10 :
 834       {
 835         long value;
 836         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 837         value = ((value) << (2));
 838         fields->f_disp10 = value;
 839       }
 840       break;
 841     case FR30_OPERAND_DISP8 :
 842       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & fields->f_disp8);
 843       break;
 844     case FR30_OPERAND_DISP9 :
 845       {
 846         long value;
 847         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 848         value = ((value) << (1));
 849         fields->f_disp9 = value;
 850       }
 851       break;
 852     case FR30_OPERAND_I20 :
 853       {
 854         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_i20_4);
 855         if (length <= 0) break;
 856         length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 16, 16, total_length, pc, & fields->f_i20_16);
 857         if (length <= 0) break;
 858 {
 859   FLD (f_i20) = ((((FLD (f_i20_4)) << (16))) | (FLD (f_i20_16)));
 860 }
 861       }
 862       break;
 863     case FR30_OPERAND_I32 :
 864       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, pc, & fields->f_i32);
 865       break;
 866     case FR30_OPERAND_I8 :
 867       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 16, total_length, pc, & fields->f_i8);
 868       break;
 869     case FR30_OPERAND_LABEL12 :
 870       {
 871         long value;
 872         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
 873         value = ((((value) << (1))) + (((pc) + (2))));
 874         fields->f_rel12 = value;
 875       }
 876       break;
 877     case FR30_OPERAND_LABEL9 :
 878       {
 879         long value;
 880         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
 881         value = ((((value) << (1))) + (((pc) + (2))));
 882         fields->f_rel9 = value;
 883       }
 884       break;
 885     case FR30_OPERAND_M4 :
 886       {
 887         long value;
 888         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 889         value = ((value) | (((-1) << (4))));
 890         fields->f_m4 = value;
 891       }
 892       break;
 893     case FR30_OPERAND_PS :
 894       break;
 895     case FR30_OPERAND_REGLIST_HI_LD :
 896       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_ld);
 897       break;
 898     case FR30_OPERAND_REGLIST_HI_ST :
 899       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_st);
 900       break;
 901     case FR30_OPERAND_REGLIST_LOW_LD :
 902       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_ld);
 903       break;
 904     case FR30_OPERAND_REGLIST_LOW_ST :
 905       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_st);
 906       break;
 907     case FR30_OPERAND_S10 :
 908       {
 909         long value;
 910         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
 911         value = ((value) << (2));
 912         fields->f_s10 = value;
 913       }
 914       break;
 915     case FR30_OPERAND_U10 :
 916       {
 917         long value;
 918         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 919         value = ((value) << (2));
 920         fields->f_u10 = value;
 921       }
 922       break;
 923     case FR30_OPERAND_U4 :
 924       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_u4);
 925       break;
 926     case FR30_OPERAND_U4C :
 927       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_u4c);
 928       break;
 929     case FR30_OPERAND_U8 :
 930       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_u8);
 931       break;
 932     case FR30_OPERAND_UDISP6 :
 933       {
 934         long value;
 935         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 936         value = ((value) << (2));
 937         fields->f_udisp6 = value;
 938       }
 939       break;
 940
 941     default :
 942       /* xgettext:c-format */
 943       fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
 944                opindex);
 945       abort ();
 946     }
 947
 948   return length;
 949 }
 950
 951 cgen_insert_fn * const fr30_cgen_insert_handlers[] =
 952 {
 953   insert_insn_normal,
 954 };
 955
 956 cgen_extract_fn * const fr30_cgen_extract_handlers[] =
 957 {
 958   extract_insn_normal,
 959 };
 960
 961 /* Getting values from cgen_fields is handled by a collection of functions.
 962    They are distinguished by the type of the VALUE argument they return.
 963    TODO: floating point, inlining support, remove cases where result type
 964    not appropriate.  */
 965
 966 int
 967 fr30_cgen_get_int_operand (cd, opindex, fields)
 968      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 969      int opindex;
 970      const CGEN_FIELDS * fields;
 971 {
 972   int value;
 973
 974   switch (opindex)
 975     {
 976     case FR30_OPERAND_CRI :
 977       value = fields->f_CRi;
 978       break;
 979     case FR30_OPERAND_CRJ :
 980       value = fields->f_CRj;
 981       break;
 982     case FR30_OPERAND_R13 :
 983       value = 0;
 984       break;
 985     case FR30_OPERAND_R14 :
 986       value = 0;
 987       break;
 988     case FR30_OPERAND_R15 :
 989       value = 0;
 990       break;
 991     case FR30_OPERAND_RI :
 992       value = fields->f_Ri;
 993       break;
 994     case FR30_OPERAND_RIC :
 995       value = fields->f_Ric;
 996       break;
 997     case FR30_OPERAND_RJ :
 998       value = fields->f_Rj;
 999       break;
1000     case FR30_OPERAND_RJC :
1001       value = fields->f_Rjc;
1002       break;
1003     case FR30_OPERAND_RS1 :
1004       value = fields->f_Rs1;
1005       break;
1006     case FR30_OPERAND_RS2 :
1007       value = fields->f_Rs2;
1008       break;
1009     case FR30_OPERAND_CC :
1010       value = fields->f_cc;
1011       break;
1012     case FR30_OPERAND_CCC :
1013       value = fields->f_ccc;
1014       break;
1015     case FR30_OPERAND_DIR10 :
1016       value = fields->f_dir10;
1017       break;
1018     case FR30_OPERAND_DIR8 :
1019       value = fields->f_dir8;
1020       break;
1021     case FR30_OPERAND_DIR9 :
1022       value = fields->f_dir9;
1023       break;
1024     case FR30_OPERAND_DISP10 :
1025       value = fields->f_disp10;
1026       break;
1027     case FR30_OPERAND_DISP8 :
1028       value = fields->f_disp8;
1029       break;
1030     case FR30_OPERAND_DISP9 :
1031       value = fields->f_disp9;
1032       break;
1033     case FR30_OPERAND_I20 :
1034       value = fields->f_i20;
1035       break;
1036     case FR30_OPERAND_I32 :
1037       value = fields->f_i32;
1038       break;
1039     case FR30_OPERAND_I8 :
1040       value = fields->f_i8;
1041       break;
1042     case FR30_OPERAND_LABEL12 :
1043       value = fields->f_rel12;
1044       break;
1045     case FR30_OPERAND_LABEL9 :
1046       value = fields->f_rel9;
1047       break;
1048     case FR30_OPERAND_M4 :
1049       value = fields->f_m4;
1050       break;
1051     case FR30_OPERAND_PS :
1052       value = 0;
1053       break;
1054     case FR30_OPERAND_REGLIST_HI_LD :
1055       value = fields->f_reglist_hi_ld;
1056       break;
1057     case FR30_OPERAND_REGLIST_HI_ST :
1058       value = fields->f_reglist_hi_st;
1059       break;
1060     case FR30_OPERAND_REGLIST_LOW_LD :
1061       value = fields->f_reglist_low_ld;
1062       break;
1063     case FR30_OPERAND_REGLIST_LOW_ST :
1064       value = fields->f_reglist_low_st;
1065       break;
1066     case FR30_OPERAND_S10 :
1067       value = fields->f_s10;
1068       break;
1069     case FR30_OPERAND_U10 :
1070       value = fields->f_u10;
1071       break;
1072     case FR30_OPERAND_U4 :
1073       value = fields->f_u4;
1074       break;
1075     case FR30_OPERAND_U4C :
1076       value = fields->f_u4c;
1077       break;
1078     case FR30_OPERAND_U8 :
1079       value = fields->f_u8;
1080       break;
1081     case FR30_OPERAND_UDISP6 :
1082       value = fields->f_udisp6;
1083       break;
1084
1085     default :
1086       /* xgettext:c-format */
1087       fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1088                        opindex);
1089       abort ();
1090   }
1091
1092   return value;
1093 }
1094
1095 bfd_vma
1096 fr30_cgen_get_vma_operand (cd, opindex, fields)
1097      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
1098      int opindex;
1099      const CGEN_FIELDS * fields;
1100 {
1101   bfd_vma value;
1102
1103   switch (opindex)
1104     {
1105     case FR30_OPERAND_CRI :
1106       value = fields->f_CRi;
1107       break;
1108     case FR30_OPERAND_CRJ :
1109       value = fields->f_CRj;
1110       break;
1111     case FR30_OPERAND_R13 :
1112       value = 0;
1113       break;
1114     case FR30_OPERAND_R14 :
1115       value = 0;
1116       break;
1117     case FR30_OPERAND_R15 :
1118       value = 0;
1119       break;
1120     case FR30_OPERAND_RI :
1121       value = fields->f_Ri;
1122       break;
1123     case FR30_OPERAND_RIC :
1124       value = fields->f_Ric;
1125       break;
1126     case FR30_OPERAND_RJ :
1127       value = fields->f_Rj;
1128       break;
1129     case FR30_OPERAND_RJC :
1130       value = fields->f_Rjc;
1131       break;
1132     case FR30_OPERAND_RS1 :
1133       value = fields->f_Rs1;
1134       break;
1135     case FR30_OPERAND_RS2 :
1136       value = fields->f_Rs2;
1137       break;
1138     case FR30_OPERAND_CC :
1139       value = fields->f_cc;
1140       break;
1141     case FR30_OPERAND_CCC :
1142       value = fields->f_ccc;
1143       break;
1144     case FR30_OPERAND_DIR10 :
1145       value = fields->f_dir10;
1146       break;
1147     case FR30_OPERAND_DIR8 :
1148       value = fields->f_dir8;
1149       break;
1150     case FR30_OPERAND_DIR9 :
1151       value = fields->f_dir9;
1152       break;
1153     case FR30_OPERAND_DISP10 :
1154       value = fields->f_disp10;
1155       break;
1156     case FR30_OPERAND_DISP8 :
1157       value = fields->f_disp8;
1158       break;
1159     case FR30_OPERAND_DISP9 :
1160       value = fields->f_disp9;
1161       break;
1162     case FR30_OPERAND_I20 :
1163       value = fields->f_i20;
1164       break;
1165     case FR30_OPERAND_I32 :
1166       value = fields->f_i32;
1167       break;
1168     case FR30_OPERAND_I8 :
1169       value = fields->f_i8;
1170       break;
1171     case FR30_OPERAND_LABEL12 :
1172       value = fields->f_rel12;
1173       break;
1174     case FR30_OPERAND_LABEL9 :
1175       value = fields->f_rel9;
1176       break;
1177     case FR30_OPERAND_M4 :
1178       value = fields->f_m4;
1179       break;
1180     case FR30_OPERAND_PS :
1181       value = 0;
1182       break;
1183     case FR30_OPERAND_REGLIST_HI_LD :
1184       value = fields->f_reglist_hi_ld;
1185       break;
1186     case FR30_OPERAND_REGLIST_HI_ST :
1187       value = fields->f_reglist_hi_st;
1188       break;
1189     case FR30_OPERAND_REGLIST_LOW_LD :
1190       value = fields->f_reglist_low_ld;
1191       break;
1192     case FR30_OPERAND_REGLIST_LOW_ST :
1193       value = fields->f_reglist_low_st;
1194       break;
1195     case FR30_OPERAND_S10 :
1196       value = fields->f_s10;
1197       break;
1198     case FR30_OPERAND_U10 :
1199       value = fields->f_u10;
1200       break;
1201     case FR30_OPERAND_U4 :
1202       value = fields->f_u4;
1203       break;
1204     case FR30_OPERAND_U4C :
1205       value = fields->f_u4c;
1206       break;
1207     case FR30_OPERAND_U8 :
1208       value = fields->f_u8;
1209       break;
1210     case FR30_OPERAND_UDISP6 :
1211       value = fields->f_udisp6;
1212       break;
1213
1214     default :
1215       /* xgettext:c-format */
1216       fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1217                        opindex);
1218       abort ();
1219   }
1220
1221   return value;
1222 }
1223
1224 /* Stuffing values in cgen_fields is handled by a collection of functions.
1225    They are distinguished by the type of the VALUE argument they accept.
1226    TODO: floating point, inlining support, remove cases where argument type
1227    not appropriate.  */
1228
1229 void
1230 fr30_cgen_set_int_operand (cd, opindex, fields, value)
1231      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
1232      int opindex;
1233      CGEN_FIELDS * fields;
1234      int value;
1235 {
1236   switch (opindex)
1237     {
1238     case FR30_OPERAND_CRI :
1239       fields->f_CRi = value;
1240       break;
1241     case FR30_OPERAND_CRJ :
1242       fields->f_CRj = value;
1243       break;
1244     case FR30_OPERAND_R13 :
1245       break;
1246     case FR30_OPERAND_R14 :
1247       break;
1248     case FR30_OPERAND_R15 :
1249       break;
1250     case FR30_OPERAND_RI :
1251       fields->f_Ri = value;
1252       break;
1253     case FR30_OPERAND_RIC :
1254       fields->f_Ric = value;
1255       break;
1256     case FR30_OPERAND_RJ :
1257       fields->f_Rj = value;
1258       break;
1259     case FR30_OPERAND_RJC :
1260       fields->f_Rjc = value;
1261       break;
1262     case FR30_OPERAND_RS1 :
1263       fields->f_Rs1 = value;
1264       break;
1265     case FR30_OPERAND_RS2 :
1266       fields->f_Rs2 = value;
1267       break;
1268     case FR30_OPERAND_CC :
1269       fields->f_cc = value;
1270       break;
1271     case FR30_OPERAND_CCC :
1272       fields->f_ccc = value;
1273       break;
1274     case FR30_OPERAND_DIR10 :
1275       fields->f_dir10 = value;
1276       break;
1277     case FR30_OPERAND_DIR8 :
1278       fields->f_dir8 = value;
1279       break;
1280     case FR30_OPERAND_DIR9 :
1281       fields->f_dir9 = value;
1282       break;
1283     case FR30_OPERAND_DISP10 :
1284       fields->f_disp10 = value;
1285       break;
1286     case FR30_OPERAND_DISP8 :
1287       fields->f_disp8 = value;
1288       break;
1289     case FR30_OPERAND_DISP9 :
1290       fields->f_disp9 = value;
1291       break;
1292     case FR30_OPERAND_I20 :
1293       fields->f_i20 = value;
1294       break;
1295     case FR30_OPERAND_I32 :
1296       fields->f_i32 = value;
1297       break;
1298     case FR30_OPERAND_I8 :
1299       fields->f_i8 = value;
1300       break;
1301     case FR30_OPERAND_LABEL12 :
1302       fields->f_rel12 = value;
1303       break;
1304     case FR30_OPERAND_LABEL9 :
1305       fields->f_rel9 = value;
1306       break;
1307     case FR30_OPERAND_M4 :
1308       fields->f_m4 = value;
1309       break;
1310     case FR30_OPERAND_PS :
1311       break;
1312     case FR30_OPERAND_REGLIST_HI_LD :
1313       fields->f_reglist_hi_ld = value;
1314       break;
1315     case FR30_OPERAND_REGLIST_HI_ST :
1316       fields->f_reglist_hi_st = value;
1317       break;
1318     case FR30_OPERAND_REGLIST_LOW_LD :
1319       fields->f_reglist_low_ld = value;
1320       break;
1321     case FR30_OPERAND_REGLIST_LOW_ST :
1322       fields->f_reglist_low_st = value;
1323       break;
1324     case FR30_OPERAND_S10 :
1325       fields->f_s10 = value;
1326       break;
1327     case FR30_OPERAND_U10 :
1328       fields->f_u10 = value;
1329       break;
1330     case FR30_OPERAND_U4 :
1331       fields->f_u4 = value;
1332       break;
1333     case FR30_OPERAND_U4C :
1334       fields->f_u4c = value;
1335       break;
1336     case FR30_OPERAND_U8 :
1337       fields->f_u8 = value;
1338       break;
1339     case FR30_OPERAND_UDISP6 :
1340       fields->f_udisp6 = value;
1341       break;
1342
1343     default :
1344       /* xgettext:c-format */
1345       fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1346                        opindex);
1347       abort ();
1348   }
1349 }
1350
1351 void
1352 fr30_cgen_set_vma_operand (cd, opindex, fields, value)
1353      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
1354      int opindex;
1355      CGEN_FIELDS * fields;
1356      bfd_vma value;
1357 {
1358   switch (opindex)
1359     {
1360     case FR30_OPERAND_CRI :
1361       fields->f_CRi = value;
1362       break;
1363     case FR30_OPERAND_CRJ :
1364       fields->f_CRj = value;
1365       break;
1366     case FR30_OPERAND_R13 :
1367       break;
1368     case FR30_OPERAND_R14 :
1369       break;
1370     case FR30_OPERAND_R15 :
1371       break;
1372     case FR30_OPERAND_RI :
1373       fields->f_Ri = value;
1374       break;
1375     case FR30_OPERAND_RIC :
1376       fields->f_Ric = value;
1377       break;
1378     case FR30_OPERAND_RJ :
1379       fields->f_Rj = value;
1380       break;
1381     case FR30_OPERAND_RJC :
1382       fields->f_Rjc = value;
1383       break;
1384     case FR30_OPERAND_RS1 :
1385       fields->f_Rs1 = value;
1386       break;
1387     case FR30_OPERAND_RS2 :
1388       fields->f_Rs2 = value;
1389       break;
1390     case FR30_OPERAND_CC :
1391       fields->f_cc = value;
1392       break;
1393     case FR30_OPERAND_CCC :
1394       fields->f_ccc = value;
1395       break;
1396     case FR30_OPERAND_DIR10 :
1397       fields->f_dir10 = value;
1398       break;
1399     case FR30_OPERAND_DIR8 :
1400       fields->f_dir8 = value;
1401       break;
1402     case FR30_OPERAND_DIR9 :
1403       fields->f_dir9 = value;
1404       break;
1405     case FR30_OPERAND_DISP10 :
1406       fields->f_disp10 = value;
1407       break;
1408     case FR30_OPERAND_DISP8 :
1409       fields->f_disp8 = value;
1410       break;
1411     case FR30_OPERAND_DISP9 :
1412       fields->f_disp9 = value;
1413       break;
1414     case FR30_OPERAND_I20 :
1415       fields->f_i20 = value;
1416       break;
1417     case FR30_OPERAND_I32 :
1418       fields->f_i32 = value;
1419       break;
1420     case FR30_OPERAND_I8 :
1421       fields->f_i8 = value;
1422       break;
1423     case FR30_OPERAND_LABEL12 :
1424       fields->f_rel12 = value;
1425       break;
1426     case FR30_OPERAND_LABEL9 :
1427       fields->f_rel9 = value;
1428       break;
1429     case FR30_OPERAND_M4 :
1430       fields->f_m4 = value;
1431       break;
1432     case FR30_OPERAND_PS :
1433       break;
1434     case FR30_OPERAND_REGLIST_HI_LD :
1435       fields->f_reglist_hi_ld = value;
1436       break;
1437     case FR30_OPERAND_REGLIST_HI_ST :
1438       fields->f_reglist_hi_st = value;
1439       break;
1440     case FR30_OPERAND_REGLIST_LOW_LD :
1441       fields->f_reglist_low_ld = value;
1442       break;
1443     case FR30_OPERAND_REGLIST_LOW_ST :
1444       fields->f_reglist_low_st = value;
1445       break;
1446     case FR30_OPERAND_S10 :
1447       fields->f_s10 = value;
1448       break;
1449     case FR30_OPERAND_U10 :
1450       fields->f_u10 = value;
1451       break;
1452     case FR30_OPERAND_U4 :
1453       fields->f_u4 = value;
1454       break;
1455     case FR30_OPERAND_U4C :
1456       fields->f_u4c = value;
1457       break;
1458     case FR30_OPERAND_U8 :
1459       fields->f_u8 = value;
1460       break;
1461     case FR30_OPERAND_UDISP6 :
1462       fields->f_udisp6 = value;
1463       break;
1464
1465     default :
1466       /* xgettext:c-format */
1467       fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1468                        opindex);
1469       abort ();
1470   }
1471 }
1472
1473 /* Function to call before using the instruction builder tables.  */
1474
1475 void
1476 fr30_cgen_init_ibld_table (cd)
1477      CGEN_CPU_DESC cd;
1478 {
1479   cd->insert_handlers = & fr30_cgen_insert_handlers[0];
1480   cd->extract_handlers = & fr30_cgen_extract_handlers[0];
1481
1482   cd->insert_operand = fr30_cgen_insert_operand;
1483   cd->extract_operand = fr30_cgen_extract_operand;
1484
1485   cd->get_int_operand = fr30_cgen_get_int_operand;
1486   cd->set_int_operand = fr30_cgen_set_int_operand;
1487   cd->get_vma_operand = fr30_cgen_get_vma_operand;
1488   cd->set_vma_operand = fr30_cgen_set_vma_operand;
1489 }