1 /* Instruction description for fr30.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 #define CGEN_ARCH fr30
30 /* Given symbol S, return fr30_cgen_<s>. */
31 #define CGEN_SYM(s) CONCAT3 (fr30,_cgen_,s)
33 /* Selected cpu families. */
34 #define HAVE_CPU_FR30BF
36 #define CGEN_INSN_LSB0_P 0
37 #define CGEN_WORD_BITSIZE 32
38 #define CGEN_DEFAULT_INSN_BITSIZE 16
39 #define CGEN_BASE_INSN_BITSIZE 16
40 #define CGEN_MIN_INSN_BITSIZE 16
41 #define CGEN_MAX_INSN_BITSIZE 16
42 #define CGEN_DEFAULT_INSN_SIZE (CGEN_DEFAULT_INSN_BITSIZE / 8)
43 #define CGEN_BASE_INSN_SIZE (CGEN_BASE_INSN_BITSIZE / 8)
44 #define CGEN_MIN_INSN_SIZE (CGEN_MIN_INSN_BITSIZE / 8)
45 #define CGEN_MAX_INSN_SIZE (CGEN_MAX_INSN_BITSIZE / 8)
46 #define CGEN_INT_INSN_P 1
48 /* FIXME: Need to compute CGEN_MAX_SYNTAX_BYTES. */
50 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
51 e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
52 we can't hash on everything up to the space. */
53 #define CGEN_MNEMONIC_OPERANDS
54 /* Maximum number of operands any insn or macro-insn has. */
55 #define CGEN_MAX_INSN_OPERANDS 16
59 /* Enum declaration for insn op1 enums. */
60 typedef enum insn_op1
{
61 OP1_0
, OP1_1
, OP1_2
, OP1_3
62 , OP1_4
, OP1_5
, OP1_6
, OP1_7
63 , OP1_8
, OP1_9
, OP1_A
, OP1_B
64 , OP1_C
, OP1_D
, OP1_E
, OP1_F
67 /* Enum declaration for insn op2 enums. */
68 typedef enum insn_op2
{
69 OP2_0
, OP2_1
, OP2_2
, OP2_3
70 , OP2_4
, OP2_5
, OP2_6
, OP2_7
71 , OP2_8
, OP2_9
, OP2_A
, OP2_B
72 , OP2_C
, OP2_D
, OP2_E
, OP2_F
75 /* Enum declaration for insn op3 enums. */
76 typedef enum insn_op3
{
77 OP3_0
, OP3_1
, OP3_2
, OP3_3
78 , OP3_4
, OP3_5
, OP3_6
, OP3_7
79 , OP3_8
, OP3_9
, OP3_A
, OP3_B
80 , OP3_C
, OP3_D
, OP3_E
, OP3_F
83 /* Enum declaration for insn op5 enums. */
84 typedef enum insn_op5
{
88 /* Enum declaration for general registers. */
90 H_GR_AC
= 13, H_GR_FP
= 14, H_GR_SP
= 15, H_GR_R0
= 0
91 , H_GR_R1
= 1, H_GR_R2
= 2, H_GR_R3
= 3, H_GR_R4
= 4
92 , H_GR_R5
= 5, H_GR_R6
= 6, H_GR_R7
= 7, H_GR_R8
= 8
93 , H_GR_R9
= 9, H_GR_R10
= 10, H_GR_R11
= 11, H_GR_R12
= 12
94 , H_GR_R13
= 13, H_GR_R14
= 14, H_GR_R15
= 15
97 /* Enum declaration for fr30 operand types. */
98 typedef enum cgen_operand_type
{
99 FR30_OPERAND_PC
, FR30_OPERAND_RI
, FR30_OPERAND_RJ
, FR30_OPERAND_MAX
102 /* Non-boolean attributes. */
104 /* Enum declaration for machine type selection. */
105 typedef enum mach_attr
{
106 MACH_BASE
, MACH_FR30
, MACH_MAX
109 /* Number of architecture variants. */
110 #define MAX_MACHS ((int) MACH_MAX)
112 /* Number of operands types. */
113 #define MAX_OPERANDS ((int) FR30_OPERAND_MAX)
115 /* Maximum number of operands referenced by any insn. */
116 #define MAX_OPERAND_INSTANCES 3
118 /* Hardware, operand and instruction attribute indices. */
120 /* Enum declaration for cgen_hw attrs. */
121 typedef enum cgen_hw_attr
{
122 CGEN_HW_CACHE_ADDR
, CGEN_HW_PC
, CGEN_HW_PROFILE
125 /* Number of non-boolean elements in cgen_hw. */
126 #define CGEN_HW_NBOOL_ATTRS ((int) CGEN_HW_CACHE_ADDR)
128 /* Enum declaration for cgen_operand attrs. */
129 typedef enum cgen_operand_attr
{
130 CGEN_OPERAND_ABS_ADDR
, CGEN_OPERAND_FAKE
, CGEN_OPERAND_NEGATIVE
, CGEN_OPERAND_PCREL_ADDR
131 , CGEN_OPERAND_RELAX
, CGEN_OPERAND_SIGN_OPT
, CGEN_OPERAND_UNSIGNED
134 /* Number of non-boolean elements in cgen_operand. */
135 #define CGEN_OPERAND_NBOOL_ATTRS ((int) CGEN_OPERAND_ABS_ADDR)
137 /* Enum declaration for cgen_insn attrs. */
138 typedef enum cgen_insn_attr
{
139 CGEN_INSN_ALIAS
, CGEN_INSN_COND_CTI
, CGEN_INSN_NO_DIS
, CGEN_INSN_RELAX
140 , CGEN_INSN_RELAXABLE
, CGEN_INSN_SKIP_CTI
, CGEN_INSN_UNCOND_CTI
, CGEN_INSN_VIRTUAL
143 /* Number of non-boolean elements in cgen_insn. */
144 #define CGEN_INSN_NBOOL_ATTRS ((int) CGEN_INSN_ALIAS)
146 /* Enum declaration for fr30 instruction types. */
147 typedef enum cgen_insn_type
{
148 FR30_INSN_INVALID
, FR30_INSN_ADD
, FR30_INSN_MAX
151 /* Index of `invalid' insn place holder. */
152 #define CGEN_INSN_INVALID FR30_INSN_INVALID
153 /* Total number of insns in table. */
154 #define MAX_INSNS ((int) FR30_INSN_MAX)
156 /* cgen.h uses things we just defined. */
157 #include "opcode/cgen.h"
159 /* This struct records data prior to insertion or after extraction. */
184 extern const CGEN_ATTR_TABLE fr30_cgen_hw_attr_table
[];
185 extern const CGEN_ATTR_TABLE fr30_cgen_operand_attr_table
[];
186 extern const CGEN_ATTR_TABLE fr30_cgen_insn_attr_table
[];
188 /* Enum declaration for fr30 hardware types. */
189 typedef enum hw_type
{
190 HW_H_PC
, HW_H_MEMORY
, HW_H_SINT
, HW_H_UINT
191 , HW_H_ADDR
, HW_H_IADDR
, HW_H_GR
, HW_MAX
194 #define MAX_HW ((int) HW_MAX)
196 /* Hardware decls. */
198 extern CGEN_KEYWORD fr30_cgen_opval_h_gr
;
200 #define CGEN_INIT_PARSE(od) \
203 #define CGEN_INIT_INSERT(od) \
206 #define CGEN_INIT_EXTRACT(od) \
209 #define CGEN_INIT_PRINT(od) \
215 #endif /* FR30_OPC_H */