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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37
38 #define MAXLEN 20
39
40 #include <setjmp.h>
41
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
46 #endif
47
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_0fae (int, int);
92 static void OP_0f07 (int, int);
93 static void NOP_Fixup (int, int);
94 static void OP_3DNowSuffix (int, int);
95 static void OP_SIMD_Suffix (int, int);
96 static void SIMD_Fixup (int, int);
97 static void PNI_Fixup (int, int);
98 static void INVLPG_Fixup (int, int);
99 static void BadOp (void);
100
101 struct dis_private {
102 /* Points to first byte not fetched. */
103 bfd_byte *max_fetched;
104 bfd_byte the_buffer[MAXLEN];
105 bfd_vma insn_start;
106 int orig_sizeflag;
107 jmp_buf bailout;
108 };
109
110 /* The opcode for the fwait instruction, which we treat as a prefix
111 when we can. */
112 #define FWAIT_OPCODE (0x9b)
113
114 /* Set to 1 for 64bit mode disassembly. */
115 static int mode_64bit;
116
117 /* Flags for the prefixes for the current instruction. See below. */
118 static int prefixes;
119
120 /* REX prefix the current instruction. See below. */
121 static int rex;
122 /* Bits of REX we've already used. */
123 static int rex_used;
124 #define REX_MODE64 8
125 #define REX_EXTX 4
126 #define REX_EXTY 2
127 #define REX_EXTZ 1
128 /* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132 #define USED_REX(value) \
133 { \
134 if (value) \
135 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
136 else \
137 rex_used |= 0x40; \
138 }
139
140 /* Flags for prefixes which we somehow handled when printing the
141 current instruction. */
142 static int used_prefixes;
143
144 /* Flags stored in PREFIXES. */
145 #define PREFIX_REPZ 1
146 #define PREFIX_REPNZ 2
147 #define PREFIX_LOCK 4
148 #define PREFIX_CS 8
149 #define PREFIX_SS 0x10
150 #define PREFIX_DS 0x20
151 #define PREFIX_ES 0x40
152 #define PREFIX_FS 0x80
153 #define PREFIX_GS 0x100
154 #define PREFIX_DATA 0x200
155 #define PREFIX_ADDR 0x400
156 #define PREFIX_FWAIT 0x800
157
158 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
159 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
160 on error. */
161 #define FETCH_DATA(info, addr) \
162 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
163 ? 1 : fetch_data ((info), (addr)))
164
165 static int
166 fetch_data (struct disassemble_info *info, bfd_byte *addr)
167 {
168 int status;
169 struct dis_private *priv = (struct dis_private *) info->private_data;
170 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
171
172 status = (*info->read_memory_func) (start,
173 priv->max_fetched,
174 addr - priv->max_fetched,
175 info);
176 if (status != 0)
177 {
178 /* If we did manage to read at least one byte, then
179 print_insn_i386 will do something sensible. Otherwise, print
180 an error. We do that here because this is where we know
181 STATUS. */
182 if (priv->max_fetched == priv->the_buffer)
183 (*info->memory_error_func) (status, start, info);
184 longjmp (priv->bailout, 1);
185 }
186 else
187 priv->max_fetched = addr;
188 return 1;
189 }
190
191 #define XX NULL, 0
192
193 #define Eb OP_E, b_mode
194 #define Ev OP_E, v_mode
195 #define Ed OP_E, d_mode
196 #define Eq OP_E, q_mode
197 #define Edq OP_E, dq_mode
198 #define Edqw OP_E, dqw_mode
199 #define indirEv OP_indirE, v_mode
200 #define indirEp OP_indirE, f_mode
201 #define Ew OP_E, w_mode
202 #define Ma OP_E, v_mode
203 #define M OP_M, 0 /* lea, lgdt, etc. */
204 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
205 #define Gb OP_G, b_mode
206 #define Gv OP_G, v_mode
207 #define Gd OP_G, d_mode
208 #define Gdq OP_G, dq_mode
209 #define Gw OP_G, w_mode
210 #define Rd OP_Rd, d_mode
211 #define Rm OP_Rd, m_mode
212 #define Ib OP_I, b_mode
213 #define sIb OP_sI, b_mode /* sign extened byte */
214 #define Iv OP_I, v_mode
215 #define Iq OP_I, q_mode
216 #define Iv64 OP_I64, v_mode
217 #define Iw OP_I, w_mode
218 #define I1 OP_I, const_1_mode
219 #define Jb OP_J, b_mode
220 #define Jv OP_J, v_mode
221 #define Cm OP_C, m_mode
222 #define Dm OP_D, m_mode
223 #define Td OP_T, d_mode
224
225 #define RMeAX OP_REG, eAX_reg
226 #define RMeBX OP_REG, eBX_reg
227 #define RMeCX OP_REG, eCX_reg
228 #define RMeDX OP_REG, eDX_reg
229 #define RMeSP OP_REG, eSP_reg
230 #define RMeBP OP_REG, eBP_reg
231 #define RMeSI OP_REG, eSI_reg
232 #define RMeDI OP_REG, eDI_reg
233 #define RMrAX OP_REG, rAX_reg
234 #define RMrBX OP_REG, rBX_reg
235 #define RMrCX OP_REG, rCX_reg
236 #define RMrDX OP_REG, rDX_reg
237 #define RMrSP OP_REG, rSP_reg
238 #define RMrBP OP_REG, rBP_reg
239 #define RMrSI OP_REG, rSI_reg
240 #define RMrDI OP_REG, rDI_reg
241 #define RMAL OP_REG, al_reg
242 #define RMAL OP_REG, al_reg
243 #define RMCL OP_REG, cl_reg
244 #define RMDL OP_REG, dl_reg
245 #define RMBL OP_REG, bl_reg
246 #define RMAH OP_REG, ah_reg
247 #define RMCH OP_REG, ch_reg
248 #define RMDH OP_REG, dh_reg
249 #define RMBH OP_REG, bh_reg
250 #define RMAX OP_REG, ax_reg
251 #define RMDX OP_REG, dx_reg
252
253 #define eAX OP_IMREG, eAX_reg
254 #define eBX OP_IMREG, eBX_reg
255 #define eCX OP_IMREG, eCX_reg
256 #define eDX OP_IMREG, eDX_reg
257 #define eSP OP_IMREG, eSP_reg
258 #define eBP OP_IMREG, eBP_reg
259 #define eSI OP_IMREG, eSI_reg
260 #define eDI OP_IMREG, eDI_reg
261 #define AL OP_IMREG, al_reg
262 #define AL OP_IMREG, al_reg
263 #define CL OP_IMREG, cl_reg
264 #define DL OP_IMREG, dl_reg
265 #define BL OP_IMREG, bl_reg
266 #define AH OP_IMREG, ah_reg
267 #define CH OP_IMREG, ch_reg
268 #define DH OP_IMREG, dh_reg
269 #define BH OP_IMREG, bh_reg
270 #define AX OP_IMREG, ax_reg
271 #define DX OP_IMREG, dx_reg
272 #define indirDX OP_IMREG, indir_dx_reg
273
274 #define Sw OP_SEG, w_mode
275 #define Ap OP_DIR, 0
276 #define Ob OP_OFF, b_mode
277 #define Ob64 OP_OFF64, b_mode
278 #define Ov OP_OFF, v_mode
279 #define Ov64 OP_OFF64, v_mode
280 #define Xb OP_DSreg, eSI_reg
281 #define Xv OP_DSreg, eSI_reg
282 #define Yb OP_ESreg, eDI_reg
283 #define Yv OP_ESreg, eDI_reg
284 #define DSBX OP_DSreg, eBX_reg
285
286 #define es OP_REG, es_reg
287 #define ss OP_REG, ss_reg
288 #define cs OP_REG, cs_reg
289 #define ds OP_REG, ds_reg
290 #define fs OP_REG, fs_reg
291 #define gs OP_REG, gs_reg
292
293 #define MX OP_MMX, 0
294 #define XM OP_XMM, 0
295 #define EM OP_EM, v_mode
296 #define EX OP_EX, v_mode
297 #define MS OP_MS, v_mode
298 #define XS OP_XS, v_mode
299 #define OPSUF OP_3DNowSuffix, 0
300 #define OPSIMD OP_SIMD_Suffix, 0
301
302 #define cond_jump_flag NULL, cond_jump_mode
303 #define loop_jcxz_flag NULL, loop_jcxz_mode
304
305 /* bits in sizeflag */
306 #define SUFFIX_ALWAYS 4
307 #define AFLAG 2
308 #define DFLAG 1
309
310 #define b_mode 1 /* byte operand */
311 #define v_mode 2 /* operand size depends on prefixes */
312 #define w_mode 3 /* word operand */
313 #define d_mode 4 /* double word operand */
314 #define q_mode 5 /* quad word operand */
315 #define t_mode 6 /* ten-byte operand */
316 #define x_mode 7 /* 16-byte XMM operand */
317 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
318 #define cond_jump_mode 9
319 #define loop_jcxz_mode 10
320 #define dq_mode 11 /* operand size depends on REX prefixes. */
321 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
322 #define f_mode 13 /* 4- or 6-byte pointer operand */
323 #define const_1_mode 14
324
325 #define es_reg 100
326 #define cs_reg 101
327 #define ss_reg 102
328 #define ds_reg 103
329 #define fs_reg 104
330 #define gs_reg 105
331
332 #define eAX_reg 108
333 #define eCX_reg 109
334 #define eDX_reg 110
335 #define eBX_reg 111
336 #define eSP_reg 112
337 #define eBP_reg 113
338 #define eSI_reg 114
339 #define eDI_reg 115
340
341 #define al_reg 116
342 #define cl_reg 117
343 #define dl_reg 118
344 #define bl_reg 119
345 #define ah_reg 120
346 #define ch_reg 121
347 #define dh_reg 122
348 #define bh_reg 123
349
350 #define ax_reg 124
351 #define cx_reg 125
352 #define dx_reg 126
353 #define bx_reg 127
354 #define sp_reg 128
355 #define bp_reg 129
356 #define si_reg 130
357 #define di_reg 131
358
359 #define rAX_reg 132
360 #define rCX_reg 133
361 #define rDX_reg 134
362 #define rBX_reg 135
363 #define rSP_reg 136
364 #define rBP_reg 137
365 #define rSI_reg 138
366 #define rDI_reg 139
367
368 #define indir_dx_reg 150
369
370 #define FLOATCODE 1
371 #define USE_GROUPS 2
372 #define USE_PREFIX_USER_TABLE 3
373 #define X86_64_SPECIAL 4
374
375 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
376
377 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
378 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
379 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
380 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
381 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
382 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
383 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
384 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
385 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
386 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
387 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
388 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
389 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
390 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
391 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
392 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
393 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
394 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
395 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
396 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
397 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
398 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
399 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
400 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
401 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
402
403 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
404 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
405 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
406 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
407 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
408 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
409 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
410 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
411 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
412 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
413 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
414 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
415 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
416 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
417 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
418 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
419 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
420 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
421 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
422 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
423 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
424 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
425 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
426 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
427 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
428 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
429 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
430 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
431 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
432 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
433 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
434 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
435 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
436
437 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
438
439 typedef void (*op_rtn) (int bytemode, int sizeflag);
440
441 struct dis386 {
442 const char *name;
443 op_rtn op1;
444 int bytemode1;
445 op_rtn op2;
446 int bytemode2;
447 op_rtn op3;
448 int bytemode3;
449 };
450
451 /* Upper case letters in the instruction names here are macros.
452 'A' => print 'b' if no register operands or suffix_always is true
453 'B' => print 'b' if suffix_always is true
454 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
455 . size prefix
456 'E' => print 'e' if 32-bit form of jcxz
457 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
458 'H' => print ",pt" or ",pn" branch hint
459 'I' => honor following macro letter even in Intel mode (implemented only
460 . for some of the macro letters)
461 'J' => print 'l'
462 'L' => print 'l' if suffix_always is true
463 'N' => print 'n' if instruction has no wait "prefix"
464 'O' => print 'd', or 'o'
465 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
466 . or suffix_always is true. print 'q' if rex prefix is present.
467 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
468 . is true
469 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
470 'S' => print 'w', 'l' or 'q' if suffix_always is true
471 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
472 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
473 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
474 'X' => print 's', 'd' depending on data16 prefix (for XMM)
475 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
476
477 Many of the above letters print nothing in Intel mode. See "putop"
478 for the details.
479
480 Braces '{' and '}', and vertical bars '|', indicate alternative
481 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
482 modes. In cases where there are only two alternatives, the X86_64
483 instruction is reserved, and "(bad)" is printed.
484 */
485
486 static const struct dis386 dis386[] = {
487 /* 00 */
488 { "addB", Eb, Gb, XX },
489 { "addS", Ev, Gv, XX },
490 { "addB", Gb, Eb, XX },
491 { "addS", Gv, Ev, XX },
492 { "addB", AL, Ib, XX },
493 { "addS", eAX, Iv, XX },
494 { "push{T|}", es, XX, XX },
495 { "pop{T|}", es, XX, XX },
496 /* 08 */
497 { "orB", Eb, Gb, XX },
498 { "orS", Ev, Gv, XX },
499 { "orB", Gb, Eb, XX },
500 { "orS", Gv, Ev, XX },
501 { "orB", AL, Ib, XX },
502 { "orS", eAX, Iv, XX },
503 { "push{T|}", cs, XX, XX },
504 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
505 /* 10 */
506 { "adcB", Eb, Gb, XX },
507 { "adcS", Ev, Gv, XX },
508 { "adcB", Gb, Eb, XX },
509 { "adcS", Gv, Ev, XX },
510 { "adcB", AL, Ib, XX },
511 { "adcS", eAX, Iv, XX },
512 { "push{T|}", ss, XX, XX },
513 { "popT|}", ss, XX, XX },
514 /* 18 */
515 { "sbbB", Eb, Gb, XX },
516 { "sbbS", Ev, Gv, XX },
517 { "sbbB", Gb, Eb, XX },
518 { "sbbS", Gv, Ev, XX },
519 { "sbbB", AL, Ib, XX },
520 { "sbbS", eAX, Iv, XX },
521 { "push{T|}", ds, XX, XX },
522 { "pop{T|}", ds, XX, XX },
523 /* 20 */
524 { "andB", Eb, Gb, XX },
525 { "andS", Ev, Gv, XX },
526 { "andB", Gb, Eb, XX },
527 { "andS", Gv, Ev, XX },
528 { "andB", AL, Ib, XX },
529 { "andS", eAX, Iv, XX },
530 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
531 { "daa{|}", XX, XX, XX },
532 /* 28 */
533 { "subB", Eb, Gb, XX },
534 { "subS", Ev, Gv, XX },
535 { "subB", Gb, Eb, XX },
536 { "subS", Gv, Ev, XX },
537 { "subB", AL, Ib, XX },
538 { "subS", eAX, Iv, XX },
539 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
540 { "das{|}", XX, XX, XX },
541 /* 30 */
542 { "xorB", Eb, Gb, XX },
543 { "xorS", Ev, Gv, XX },
544 { "xorB", Gb, Eb, XX },
545 { "xorS", Gv, Ev, XX },
546 { "xorB", AL, Ib, XX },
547 { "xorS", eAX, Iv, XX },
548 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
549 { "aaa{|}", XX, XX, XX },
550 /* 38 */
551 { "cmpB", Eb, Gb, XX },
552 { "cmpS", Ev, Gv, XX },
553 { "cmpB", Gb, Eb, XX },
554 { "cmpS", Gv, Ev, XX },
555 { "cmpB", AL, Ib, XX },
556 { "cmpS", eAX, Iv, XX },
557 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
558 { "aas{|}", XX, XX, XX },
559 /* 40 */
560 { "inc{S|}", RMeAX, XX, XX },
561 { "inc{S|}", RMeCX, XX, XX },
562 { "inc{S|}", RMeDX, XX, XX },
563 { "inc{S|}", RMeBX, XX, XX },
564 { "inc{S|}", RMeSP, XX, XX },
565 { "inc{S|}", RMeBP, XX, XX },
566 { "inc{S|}", RMeSI, XX, XX },
567 { "inc{S|}", RMeDI, XX, XX },
568 /* 48 */
569 { "dec{S|}", RMeAX, XX, XX },
570 { "dec{S|}", RMeCX, XX, XX },
571 { "dec{S|}", RMeDX, XX, XX },
572 { "dec{S|}", RMeBX, XX, XX },
573 { "dec{S|}", RMeSP, XX, XX },
574 { "dec{S|}", RMeBP, XX, XX },
575 { "dec{S|}", RMeSI, XX, XX },
576 { "dec{S|}", RMeDI, XX, XX },
577 /* 50 */
578 { "pushS", RMrAX, XX, XX },
579 { "pushS", RMrCX, XX, XX },
580 { "pushS", RMrDX, XX, XX },
581 { "pushS", RMrBX, XX, XX },
582 { "pushS", RMrSP, XX, XX },
583 { "pushS", RMrBP, XX, XX },
584 { "pushS", RMrSI, XX, XX },
585 { "pushS", RMrDI, XX, XX },
586 /* 58 */
587 { "popS", RMrAX, XX, XX },
588 { "popS", RMrCX, XX, XX },
589 { "popS", RMrDX, XX, XX },
590 { "popS", RMrBX, XX, XX },
591 { "popS", RMrSP, XX, XX },
592 { "popS", RMrBP, XX, XX },
593 { "popS", RMrSI, XX, XX },
594 { "popS", RMrDI, XX, XX },
595 /* 60 */
596 { "pusha{P|}", XX, XX, XX },
597 { "popa{P|}", XX, XX, XX },
598 { "bound{S|}", Gv, Ma, XX },
599 { X86_64_0 },
600 { "(bad)", XX, XX, XX }, /* seg fs */
601 { "(bad)", XX, XX, XX }, /* seg gs */
602 { "(bad)", XX, XX, XX }, /* op size prefix */
603 { "(bad)", XX, XX, XX }, /* adr size prefix */
604 /* 68 */
605 { "pushT", Iq, XX, XX },
606 { "imulS", Gv, Ev, Iv },
607 { "pushT", sIb, XX, XX },
608 { "imulS", Gv, Ev, sIb },
609 { "ins{b||b|}", Yb, indirDX, XX },
610 { "ins{R||R|}", Yv, indirDX, XX },
611 { "outs{b||b|}", indirDX, Xb, XX },
612 { "outs{R||R|}", indirDX, Xv, XX },
613 /* 70 */
614 { "joH", Jb, XX, cond_jump_flag },
615 { "jnoH", Jb, XX, cond_jump_flag },
616 { "jbH", Jb, XX, cond_jump_flag },
617 { "jaeH", Jb, XX, cond_jump_flag },
618 { "jeH", Jb, XX, cond_jump_flag },
619 { "jneH", Jb, XX, cond_jump_flag },
620 { "jbeH", Jb, XX, cond_jump_flag },
621 { "jaH", Jb, XX, cond_jump_flag },
622 /* 78 */
623 { "jsH", Jb, XX, cond_jump_flag },
624 { "jnsH", Jb, XX, cond_jump_flag },
625 { "jpH", Jb, XX, cond_jump_flag },
626 { "jnpH", Jb, XX, cond_jump_flag },
627 { "jlH", Jb, XX, cond_jump_flag },
628 { "jgeH", Jb, XX, cond_jump_flag },
629 { "jleH", Jb, XX, cond_jump_flag },
630 { "jgH", Jb, XX, cond_jump_flag },
631 /* 80 */
632 { GRP1b },
633 { GRP1S },
634 { "(bad)", XX, XX, XX },
635 { GRP1Ss },
636 { "testB", Eb, Gb, XX },
637 { "testS", Ev, Gv, XX },
638 { "xchgB", Eb, Gb, XX },
639 { "xchgS", Ev, Gv, XX },
640 /* 88 */
641 { "movB", Eb, Gb, XX },
642 { "movS", Ev, Gv, XX },
643 { "movB", Gb, Eb, XX },
644 { "movS", Gv, Ev, XX },
645 { "movQ", Ev, Sw, XX },
646 { "leaS", Gv, M, XX },
647 { "movQ", Sw, Ev, XX },
648 { "popU", Ev, XX, XX },
649 /* 90 */
650 { "nop", NOP_Fixup, 0, XX, XX },
651 { "xchgS", RMeCX, eAX, XX },
652 { "xchgS", RMeDX, eAX, XX },
653 { "xchgS", RMeBX, eAX, XX },
654 { "xchgS", RMeSP, eAX, XX },
655 { "xchgS", RMeBP, eAX, XX },
656 { "xchgS", RMeSI, eAX, XX },
657 { "xchgS", RMeDI, eAX, XX },
658 /* 98 */
659 { "cW{tR||tR|}", XX, XX, XX },
660 { "cR{tO||tO|}", XX, XX, XX },
661 { "Jcall{T|}", Ap, XX, XX },
662 { "(bad)", XX, XX, XX }, /* fwait */
663 { "pushfT", XX, XX, XX },
664 { "popfT", XX, XX, XX },
665 { "sahf{|}", XX, XX, XX },
666 { "lahf{|}", XX, XX, XX },
667 /* a0 */
668 { "movB", AL, Ob64, XX },
669 { "movS", eAX, Ov64, XX },
670 { "movB", Ob64, AL, XX },
671 { "movS", Ov64, eAX, XX },
672 { "movs{b||b|}", Yb, Xb, XX },
673 { "movs{R||R|}", Yv, Xv, XX },
674 { "cmps{b||b|}", Xb, Yb, XX },
675 { "cmps{R||R|}", Xv, Yv, XX },
676 /* a8 */
677 { "testB", AL, Ib, XX },
678 { "testS", eAX, Iv, XX },
679 { "stosB", Yb, AL, XX },
680 { "stosS", Yv, eAX, XX },
681 { "lodsB", AL, Xb, XX },
682 { "lodsS", eAX, Xv, XX },
683 { "scasB", AL, Yb, XX },
684 { "scasS", eAX, Yv, XX },
685 /* b0 */
686 { "movB", RMAL, Ib, XX },
687 { "movB", RMCL, Ib, XX },
688 { "movB", RMDL, Ib, XX },
689 { "movB", RMBL, Ib, XX },
690 { "movB", RMAH, Ib, XX },
691 { "movB", RMCH, Ib, XX },
692 { "movB", RMDH, Ib, XX },
693 { "movB", RMBH, Ib, XX },
694 /* b8 */
695 { "movS", RMeAX, Iv64, XX },
696 { "movS", RMeCX, Iv64, XX },
697 { "movS", RMeDX, Iv64, XX },
698 { "movS", RMeBX, Iv64, XX },
699 { "movS", RMeSP, Iv64, XX },
700 { "movS", RMeBP, Iv64, XX },
701 { "movS", RMeSI, Iv64, XX },
702 { "movS", RMeDI, Iv64, XX },
703 /* c0 */
704 { GRP2b },
705 { GRP2S },
706 { "retT", Iw, XX, XX },
707 { "retT", XX, XX, XX },
708 { "les{S|}", Gv, Mp, XX },
709 { "ldsS", Gv, Mp, XX },
710 { "movA", Eb, Ib, XX },
711 { "movQ", Ev, Iv, XX },
712 /* c8 */
713 { "enterT", Iw, Ib, XX },
714 { "leaveT", XX, XX, XX },
715 { "lretP", Iw, XX, XX },
716 { "lretP", XX, XX, XX },
717 { "int3", XX, XX, XX },
718 { "int", Ib, XX, XX },
719 { "into{|}", XX, XX, XX },
720 { "iretP", XX, XX, XX },
721 /* d0 */
722 { GRP2b_one },
723 { GRP2S_one },
724 { GRP2b_cl },
725 { GRP2S_cl },
726 { "aam{|}", sIb, XX, XX },
727 { "aad{|}", sIb, XX, XX },
728 { "(bad)", XX, XX, XX },
729 { "xlat", DSBX, XX, XX },
730 /* d8 */
731 { FLOAT },
732 { FLOAT },
733 { FLOAT },
734 { FLOAT },
735 { FLOAT },
736 { FLOAT },
737 { FLOAT },
738 { FLOAT },
739 /* e0 */
740 { "loopneFH", Jb, XX, loop_jcxz_flag },
741 { "loopeFH", Jb, XX, loop_jcxz_flag },
742 { "loopFH", Jb, XX, loop_jcxz_flag },
743 { "jEcxzH", Jb, XX, loop_jcxz_flag },
744 { "inB", AL, Ib, XX },
745 { "inS", eAX, Ib, XX },
746 { "outB", Ib, AL, XX },
747 { "outS", Ib, eAX, XX },
748 /* e8 */
749 { "callT", Jv, XX, XX },
750 { "jmpT", Jv, XX, XX },
751 { "Jjmp{T|}", Ap, XX, XX },
752 { "jmp", Jb, XX, XX },
753 { "inB", AL, indirDX, XX },
754 { "inS", eAX, indirDX, XX },
755 { "outB", indirDX, AL, XX },
756 { "outS", indirDX, eAX, XX },
757 /* f0 */
758 { "(bad)", XX, XX, XX }, /* lock prefix */
759 { "icebp", XX, XX, XX },
760 { "(bad)", XX, XX, XX }, /* repne */
761 { "(bad)", XX, XX, XX }, /* repz */
762 { "hlt", XX, XX, XX },
763 { "cmc", XX, XX, XX },
764 { GRP3b },
765 { GRP3S },
766 /* f8 */
767 { "clc", XX, XX, XX },
768 { "stc", XX, XX, XX },
769 { "cli", XX, XX, XX },
770 { "sti", XX, XX, XX },
771 { "cld", XX, XX, XX },
772 { "std", XX, XX, XX },
773 { GRP4 },
774 { GRP5 },
775 };
776
777 static const struct dis386 dis386_twobyte[] = {
778 /* 00 */
779 { GRP6 },
780 { GRP7 },
781 { "larS", Gv, Ew, XX },
782 { "lslS", Gv, Ew, XX },
783 { "(bad)", XX, XX, XX },
784 { "syscall", XX, XX, XX },
785 { "clts", XX, XX, XX },
786 { "sysretP", XX, XX, XX },
787 /* 08 */
788 { "invd", XX, XX, XX },
789 { "wbinvd", XX, XX, XX },
790 { "(bad)", XX, XX, XX },
791 { "ud2a", XX, XX, XX },
792 { "(bad)", XX, XX, XX },
793 { GRPAMD },
794 { "femms", XX, XX, XX },
795 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
796 /* 10 */
797 { PREGRP8 },
798 { PREGRP9 },
799 { PREGRP30 },
800 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
801 { "unpcklpX", XM, EX, XX },
802 { "unpckhpX", XM, EX, XX },
803 { PREGRP31 },
804 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
805 /* 18 */
806 { GRP14 },
807 { "(bad)", XX, XX, XX },
808 { "(bad)", XX, XX, XX },
809 { "(bad)", XX, XX, XX },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 { "(bad)", XX, XX, XX },
813 { "(bad)", XX, XX, XX },
814 /* 20 */
815 { "movL", Rm, Cm, XX },
816 { "movL", Rm, Dm, XX },
817 { "movL", Cm, Rm, XX },
818 { "movL", Dm, Rm, XX },
819 { "movL", Rd, Td, XX },
820 { "(bad)", XX, XX, XX },
821 { "movL", Td, Rd, XX },
822 { "(bad)", XX, XX, XX },
823 /* 28 */
824 { "movapX", XM, EX, XX },
825 { "movapX", EX, XM, XX },
826 { PREGRP2 },
827 { "movntpX", Ev, XM, XX },
828 { PREGRP4 },
829 { PREGRP3 },
830 { "ucomisX", XM,EX, XX },
831 { "comisX", XM,EX, XX },
832 /* 30 */
833 { "wrmsr", XX, XX, XX },
834 { "rdtsc", XX, XX, XX },
835 { "rdmsr", XX, XX, XX },
836 { "rdpmc", XX, XX, XX },
837 { "sysenter", XX, XX, XX },
838 { "sysexit", XX, XX, XX },
839 { "(bad)", XX, XX, XX },
840 { "(bad)", XX, XX, XX },
841 /* 38 */
842 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
844 { "(bad)", XX, XX, XX },
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
850 /* 40 */
851 { "cmovo", Gv, Ev, XX },
852 { "cmovno", Gv, Ev, XX },
853 { "cmovb", Gv, Ev, XX },
854 { "cmovae", Gv, Ev, XX },
855 { "cmove", Gv, Ev, XX },
856 { "cmovne", Gv, Ev, XX },
857 { "cmovbe", Gv, Ev, XX },
858 { "cmova", Gv, Ev, XX },
859 /* 48 */
860 { "cmovs", Gv, Ev, XX },
861 { "cmovns", Gv, Ev, XX },
862 { "cmovp", Gv, Ev, XX },
863 { "cmovnp", Gv, Ev, XX },
864 { "cmovl", Gv, Ev, XX },
865 { "cmovge", Gv, Ev, XX },
866 { "cmovle", Gv, Ev, XX },
867 { "cmovg", Gv, Ev, XX },
868 /* 50 */
869 { "movmskpX", Gdq, XS, XX },
870 { PREGRP13 },
871 { PREGRP12 },
872 { PREGRP11 },
873 { "andpX", XM, EX, XX },
874 { "andnpX", XM, EX, XX },
875 { "orpX", XM, EX, XX },
876 { "xorpX", XM, EX, XX },
877 /* 58 */
878 { PREGRP0 },
879 { PREGRP10 },
880 { PREGRP17 },
881 { PREGRP16 },
882 { PREGRP14 },
883 { PREGRP7 },
884 { PREGRP5 },
885 { PREGRP6 },
886 /* 60 */
887 { "punpcklbw", MX, EM, XX },
888 { "punpcklwd", MX, EM, XX },
889 { "punpckldq", MX, EM, XX },
890 { "packsswb", MX, EM, XX },
891 { "pcmpgtb", MX, EM, XX },
892 { "pcmpgtw", MX, EM, XX },
893 { "pcmpgtd", MX, EM, XX },
894 { "packuswb", MX, EM, XX },
895 /* 68 */
896 { "punpckhbw", MX, EM, XX },
897 { "punpckhwd", MX, EM, XX },
898 { "punpckhdq", MX, EM, XX },
899 { "packssdw", MX, EM, XX },
900 { PREGRP26 },
901 { PREGRP24 },
902 { "movd", MX, Edq, XX },
903 { PREGRP19 },
904 /* 70 */
905 { PREGRP22 },
906 { GRP10 },
907 { GRP11 },
908 { GRP12 },
909 { "pcmpeqb", MX, EM, XX },
910 { "pcmpeqw", MX, EM, XX },
911 { "pcmpeqd", MX, EM, XX },
912 { "emms", XX, XX, XX },
913 /* 78 */
914 { "(bad)", XX, XX, XX },
915 { "(bad)", XX, XX, XX },
916 { "(bad)", XX, XX, XX },
917 { "(bad)", XX, XX, XX },
918 { PREGRP28 },
919 { PREGRP29 },
920 { PREGRP23 },
921 { PREGRP20 },
922 /* 80 */
923 { "joH", Jv, XX, cond_jump_flag },
924 { "jnoH", Jv, XX, cond_jump_flag },
925 { "jbH", Jv, XX, cond_jump_flag },
926 { "jaeH", Jv, XX, cond_jump_flag },
927 { "jeH", Jv, XX, cond_jump_flag },
928 { "jneH", Jv, XX, cond_jump_flag },
929 { "jbeH", Jv, XX, cond_jump_flag },
930 { "jaH", Jv, XX, cond_jump_flag },
931 /* 88 */
932 { "jsH", Jv, XX, cond_jump_flag },
933 { "jnsH", Jv, XX, cond_jump_flag },
934 { "jpH", Jv, XX, cond_jump_flag },
935 { "jnpH", Jv, XX, cond_jump_flag },
936 { "jlH", Jv, XX, cond_jump_flag },
937 { "jgeH", Jv, XX, cond_jump_flag },
938 { "jleH", Jv, XX, cond_jump_flag },
939 { "jgH", Jv, XX, cond_jump_flag },
940 /* 90 */
941 { "seto", Eb, XX, XX },
942 { "setno", Eb, XX, XX },
943 { "setb", Eb, XX, XX },
944 { "setae", Eb, XX, XX },
945 { "sete", Eb, XX, XX },
946 { "setne", Eb, XX, XX },
947 { "setbe", Eb, XX, XX },
948 { "seta", Eb, XX, XX },
949 /* 98 */
950 { "sets", Eb, XX, XX },
951 { "setns", Eb, XX, XX },
952 { "setp", Eb, XX, XX },
953 { "setnp", Eb, XX, XX },
954 { "setl", Eb, XX, XX },
955 { "setge", Eb, XX, XX },
956 { "setle", Eb, XX, XX },
957 { "setg", Eb, XX, XX },
958 /* a0 */
959 { "pushT", fs, XX, XX },
960 { "popT", fs, XX, XX },
961 { "cpuid", XX, XX, XX },
962 { "btS", Ev, Gv, XX },
963 { "shldS", Ev, Gv, Ib },
964 { "shldS", Ev, Gv, CL },
965 { GRPPADLCK2 },
966 { GRPPADLCK1 },
967 /* a8 */
968 { "pushT", gs, XX, XX },
969 { "popT", gs, XX, XX },
970 { "rsm", XX, XX, XX },
971 { "btsS", Ev, Gv, XX },
972 { "shrdS", Ev, Gv, Ib },
973 { "shrdS", Ev, Gv, CL },
974 { GRP13 },
975 { "imulS", Gv, Ev, XX },
976 /* b0 */
977 { "cmpxchgB", Eb, Gb, XX },
978 { "cmpxchgS", Ev, Gv, XX },
979 { "lssS", Gv, Mp, XX },
980 { "btrS", Ev, Gv, XX },
981 { "lfsS", Gv, Mp, XX },
982 { "lgsS", Gv, Mp, XX },
983 { "movz{bR|x|bR|x}", Gv, Eb, XX },
984 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
985 /* b8 */
986 { "(bad)", XX, XX, XX },
987 { "ud2b", XX, XX, XX },
988 { GRP8 },
989 { "btcS", Ev, Gv, XX },
990 { "bsfS", Gv, Ev, XX },
991 { "bsrS", Gv, Ev, XX },
992 { "movs{bR|x|bR|x}", Gv, Eb, XX },
993 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
994 /* c0 */
995 { "xaddB", Eb, Gb, XX },
996 { "xaddS", Ev, Gv, XX },
997 { PREGRP1 },
998 { "movntiS", Ev, Gv, XX },
999 { "pinsrw", MX, Edqw, Ib },
1000 { "pextrw", Gdq, MS, Ib },
1001 { "shufpX", XM, EX, Ib },
1002 { GRP9 },
1003 /* c8 */
1004 { "bswap", RMeAX, XX, XX },
1005 { "bswap", RMeCX, XX, XX },
1006 { "bswap", RMeDX, XX, XX },
1007 { "bswap", RMeBX, XX, XX },
1008 { "bswap", RMeSP, XX, XX },
1009 { "bswap", RMeBP, XX, XX },
1010 { "bswap", RMeSI, XX, XX },
1011 { "bswap", RMeDI, XX, XX },
1012 /* d0 */
1013 { PREGRP27 },
1014 { "psrlw", MX, EM, XX },
1015 { "psrld", MX, EM, XX },
1016 { "psrlq", MX, EM, XX },
1017 { "paddq", MX, EM, XX },
1018 { "pmullw", MX, EM, XX },
1019 { PREGRP21 },
1020 { "pmovmskb", Gdq, MS, XX },
1021 /* d8 */
1022 { "psubusb", MX, EM, XX },
1023 { "psubusw", MX, EM, XX },
1024 { "pminub", MX, EM, XX },
1025 { "pand", MX, EM, XX },
1026 { "paddusb", MX, EM, XX },
1027 { "paddusw", MX, EM, XX },
1028 { "pmaxub", MX, EM, XX },
1029 { "pandn", MX, EM, XX },
1030 /* e0 */
1031 { "pavgb", MX, EM, XX },
1032 { "psraw", MX, EM, XX },
1033 { "psrad", MX, EM, XX },
1034 { "pavgw", MX, EM, XX },
1035 { "pmulhuw", MX, EM, XX },
1036 { "pmulhw", MX, EM, XX },
1037 { PREGRP15 },
1038 { PREGRP25 },
1039 /* e8 */
1040 { "psubsb", MX, EM, XX },
1041 { "psubsw", MX, EM, XX },
1042 { "pminsw", MX, EM, XX },
1043 { "por", MX, EM, XX },
1044 { "paddsb", MX, EM, XX },
1045 { "paddsw", MX, EM, XX },
1046 { "pmaxsw", MX, EM, XX },
1047 { "pxor", MX, EM, XX },
1048 /* f0 */
1049 { PREGRP32 },
1050 { "psllw", MX, EM, XX },
1051 { "pslld", MX, EM, XX },
1052 { "psllq", MX, EM, XX },
1053 { "pmuludq", MX, EM, XX },
1054 { "pmaddwd", MX, EM, XX },
1055 { "psadbw", MX, EM, XX },
1056 { PREGRP18 },
1057 /* f8 */
1058 { "psubb", MX, EM, XX },
1059 { "psubw", MX, EM, XX },
1060 { "psubd", MX, EM, XX },
1061 { "psubq", MX, EM, XX },
1062 { "paddb", MX, EM, XX },
1063 { "paddw", MX, EM, XX },
1064 { "paddd", MX, EM, XX },
1065 { "(bad)", XX, XX, XX }
1066 };
1067
1068 static const unsigned char onebyte_has_modrm[256] = {
1069 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1070 /* ------------------------------- */
1071 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1072 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1073 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1074 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1075 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1076 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1077 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1078 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1079 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1080 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1081 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1082 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1083 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1084 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1085 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1086 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1087 /* ------------------------------- */
1088 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1089 };
1090
1091 static const unsigned char twobyte_has_modrm[256] = {
1092 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1093 /* ------------------------------- */
1094 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1095 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1096 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1097 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1098 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1099 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1100 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1101 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1102 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1103 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1104 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1105 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1106 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1107 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1108 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1109 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1110 /* ------------------------------- */
1111 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1112 };
1113
1114 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1115 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1116 /* ------------------------------- */
1117 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1118 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1119 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1120 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1121 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1122 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1123 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1124 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1125 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1126 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1127 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1128 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1129 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1130 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1131 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1132 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1133 /* ------------------------------- */
1134 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1135 };
1136
1137 static char obuf[100];
1138 static char *obufp;
1139 static char scratchbuf[100];
1140 static unsigned char *start_codep;
1141 static unsigned char *insn_codep;
1142 static unsigned char *codep;
1143 static disassemble_info *the_info;
1144 static int mod;
1145 static int rm;
1146 static int reg;
1147 static unsigned char need_modrm;
1148
1149 /* If we are accessing mod/rm/reg without need_modrm set, then the
1150 values are stale. Hitting this abort likely indicates that you
1151 need to update onebyte_has_modrm or twobyte_has_modrm. */
1152 #define MODRM_CHECK if (!need_modrm) abort ()
1153
1154 static const char **names64;
1155 static const char **names32;
1156 static const char **names16;
1157 static const char **names8;
1158 static const char **names8rex;
1159 static const char **names_seg;
1160 static const char **index16;
1161
1162 static const char *intel_names64[] = {
1163 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1165 };
1166 static const char *intel_names32[] = {
1167 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1168 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1169 };
1170 static const char *intel_names16[] = {
1171 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1172 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1173 };
1174 static const char *intel_names8[] = {
1175 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1176 };
1177 static const char *intel_names8rex[] = {
1178 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1179 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1180 };
1181 static const char *intel_names_seg[] = {
1182 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1183 };
1184 static const char *intel_index16[] = {
1185 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1186 };
1187
1188 static const char *att_names64[] = {
1189 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1190 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1191 };
1192 static const char *att_names32[] = {
1193 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1194 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1195 };
1196 static const char *att_names16[] = {
1197 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1198 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1199 };
1200 static const char *att_names8[] = {
1201 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1202 };
1203 static const char *att_names8rex[] = {
1204 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1205 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1206 };
1207 static const char *att_names_seg[] = {
1208 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1209 };
1210 static const char *att_index16[] = {
1211 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1212 };
1213
1214 static const struct dis386 grps[][8] = {
1215 /* GRP1b */
1216 {
1217 { "addA", Eb, Ib, XX },
1218 { "orA", Eb, Ib, XX },
1219 { "adcA", Eb, Ib, XX },
1220 { "sbbA", Eb, Ib, XX },
1221 { "andA", Eb, Ib, XX },
1222 { "subA", Eb, Ib, XX },
1223 { "xorA", Eb, Ib, XX },
1224 { "cmpA", Eb, Ib, XX }
1225 },
1226 /* GRP1S */
1227 {
1228 { "addQ", Ev, Iv, XX },
1229 { "orQ", Ev, Iv, XX },
1230 { "adcQ", Ev, Iv, XX },
1231 { "sbbQ", Ev, Iv, XX },
1232 { "andQ", Ev, Iv, XX },
1233 { "subQ", Ev, Iv, XX },
1234 { "xorQ", Ev, Iv, XX },
1235 { "cmpQ", Ev, Iv, XX }
1236 },
1237 /* GRP1Ss */
1238 {
1239 { "addQ", Ev, sIb, XX },
1240 { "orQ", Ev, sIb, XX },
1241 { "adcQ", Ev, sIb, XX },
1242 { "sbbQ", Ev, sIb, XX },
1243 { "andQ", Ev, sIb, XX },
1244 { "subQ", Ev, sIb, XX },
1245 { "xorQ", Ev, sIb, XX },
1246 { "cmpQ", Ev, sIb, XX }
1247 },
1248 /* GRP2b */
1249 {
1250 { "rolA", Eb, Ib, XX },
1251 { "rorA", Eb, Ib, XX },
1252 { "rclA", Eb, Ib, XX },
1253 { "rcrA", Eb, Ib, XX },
1254 { "shlA", Eb, Ib, XX },
1255 { "shrA", Eb, Ib, XX },
1256 { "(bad)", XX, XX, XX },
1257 { "sarA", Eb, Ib, XX },
1258 },
1259 /* GRP2S */
1260 {
1261 { "rolQ", Ev, Ib, XX },
1262 { "rorQ", Ev, Ib, XX },
1263 { "rclQ", Ev, Ib, XX },
1264 { "rcrQ", Ev, Ib, XX },
1265 { "shlQ", Ev, Ib, XX },
1266 { "shrQ", Ev, Ib, XX },
1267 { "(bad)", XX, XX, XX },
1268 { "sarQ", Ev, Ib, XX },
1269 },
1270 /* GRP2b_one */
1271 {
1272 { "rolA", Eb, I1, XX },
1273 { "rorA", Eb, I1, XX },
1274 { "rclA", Eb, I1, XX },
1275 { "rcrA", Eb, I1, XX },
1276 { "shlA", Eb, I1, XX },
1277 { "shrA", Eb, I1, XX },
1278 { "(bad)", XX, XX, XX },
1279 { "sarA", Eb, I1, XX },
1280 },
1281 /* GRP2S_one */
1282 {
1283 { "rolQ", Ev, I1, XX },
1284 { "rorQ", Ev, I1, XX },
1285 { "rclQ", Ev, I1, XX },
1286 { "rcrQ", Ev, I1, XX },
1287 { "shlQ", Ev, I1, XX },
1288 { "shrQ", Ev, I1, XX },
1289 { "(bad)", XX, XX, XX},
1290 { "sarQ", Ev, I1, XX },
1291 },
1292 /* GRP2b_cl */
1293 {
1294 { "rolA", Eb, CL, XX },
1295 { "rorA", Eb, CL, XX },
1296 { "rclA", Eb, CL, XX },
1297 { "rcrA", Eb, CL, XX },
1298 { "shlA", Eb, CL, XX },
1299 { "shrA", Eb, CL, XX },
1300 { "(bad)", XX, XX, XX },
1301 { "sarA", Eb, CL, XX },
1302 },
1303 /* GRP2S_cl */
1304 {
1305 { "rolQ", Ev, CL, XX },
1306 { "rorQ", Ev, CL, XX },
1307 { "rclQ", Ev, CL, XX },
1308 { "rcrQ", Ev, CL, XX },
1309 { "shlQ", Ev, CL, XX },
1310 { "shrQ", Ev, CL, XX },
1311 { "(bad)", XX, XX, XX },
1312 { "sarQ", Ev, CL, XX }
1313 },
1314 /* GRP3b */
1315 {
1316 { "testA", Eb, Ib, XX },
1317 { "(bad)", Eb, XX, XX },
1318 { "notA", Eb, XX, XX },
1319 { "negA", Eb, XX, XX },
1320 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1321 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1322 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1323 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1324 },
1325 /* GRP3S */
1326 {
1327 { "testQ", Ev, Iv, XX },
1328 { "(bad)", XX, XX, XX },
1329 { "notQ", Ev, XX, XX },
1330 { "negQ", Ev, XX, XX },
1331 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1332 { "imulQ", Ev, XX, XX },
1333 { "divQ", Ev, XX, XX },
1334 { "idivQ", Ev, XX, XX },
1335 },
1336 /* GRP4 */
1337 {
1338 { "incA", Eb, XX, XX },
1339 { "decA", Eb, XX, XX },
1340 { "(bad)", XX, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 { "(bad)", XX, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "(bad)", XX, XX, XX },
1345 { "(bad)", XX, XX, XX },
1346 },
1347 /* GRP5 */
1348 {
1349 { "incQ", Ev, XX, XX },
1350 { "decQ", Ev, XX, XX },
1351 { "callT", indirEv, XX, XX },
1352 { "JcallT", indirEp, XX, XX },
1353 { "jmpT", indirEv, XX, XX },
1354 { "JjmpT", indirEp, XX, XX },
1355 { "pushU", Ev, XX, XX },
1356 { "(bad)", XX, XX, XX },
1357 },
1358 /* GRP6 */
1359 {
1360 { "sldtQ", Ev, XX, XX },
1361 { "strQ", Ev, XX, XX },
1362 { "lldt", Ew, XX, XX },
1363 { "ltr", Ew, XX, XX },
1364 { "verr", Ew, XX, XX },
1365 { "verw", Ew, XX, XX },
1366 { "(bad)", XX, XX, XX },
1367 { "(bad)", XX, XX, XX }
1368 },
1369 /* GRP7 */
1370 {
1371 { "sgdtIQ", M, XX, XX },
1372 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1373 { "lgdt{Q|Q||}", M, XX, XX },
1374 { "lidt{Q|Q||}", M, XX, XX },
1375 { "smswQ", Ev, XX, XX },
1376 { "(bad)", XX, XX, XX },
1377 { "lmsw", Ew, XX, XX },
1378 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1379 },
1380 /* GRP8 */
1381 {
1382 { "(bad)", XX, XX, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "btQ", Ev, Ib, XX },
1387 { "btsQ", Ev, Ib, XX },
1388 { "btrQ", Ev, Ib, XX },
1389 { "btcQ", Ev, Ib, XX },
1390 },
1391 /* GRP9 */
1392 {
1393 { "(bad)", XX, XX, XX },
1394 { "cmpxchg8b", Eq, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1401 },
1402 /* GRP10 */
1403 {
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "psrlw", MS, Ib, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "psraw", MS, Ib, XX },
1409 { "(bad)", XX, XX, XX },
1410 { "psllw", MS, Ib, XX },
1411 { "(bad)", XX, XX, XX },
1412 },
1413 /* GRP11 */
1414 {
1415 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psrld", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "psrad", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "pslld", MS, Ib, XX },
1422 { "(bad)", XX, XX, XX },
1423 },
1424 /* GRP12 */
1425 {
1426 { "(bad)", XX, XX, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "psrlq", MS, Ib, XX },
1429 { "psrldq", MS, Ib, XX },
1430 { "(bad)", XX, XX, XX },
1431 { "(bad)", XX, XX, XX },
1432 { "psllq", MS, Ib, XX },
1433 { "pslldq", MS, Ib, XX },
1434 },
1435 /* GRP13 */
1436 {
1437 { "fxsave", Ev, XX, XX },
1438 { "fxrstor", Ev, XX, XX },
1439 { "ldmxcsr", Ev, XX, XX },
1440 { "stmxcsr", Ev, XX, XX },
1441 { "(bad)", XX, XX, XX },
1442 { "lfence", OP_0fae, 0, XX, XX },
1443 { "mfence", OP_0fae, 0, XX, XX },
1444 { "clflush", OP_0fae, 0, XX, XX },
1445 },
1446 /* GRP14 */
1447 {
1448 { "prefetchnta", Ev, XX, XX },
1449 { "prefetcht0", Ev, XX, XX },
1450 { "prefetcht1", Ev, XX, XX },
1451 { "prefetcht2", Ev, XX, XX },
1452 { "(bad)", XX, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 { "(bad)", XX, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 },
1457 /* GRPAMD */
1458 {
1459 { "prefetch", Eb, XX, XX },
1460 { "prefetchw", Eb, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1467 },
1468 /* GRPPADLCK1 */
1469 {
1470 { "xstorerng", OP_0f07, 0, XX, XX },
1471 { "xcryptecb", OP_0f07, 0, XX, XX },
1472 { "xcryptcbc", OP_0f07, 0, XX, XX },
1473 { "(bad)", OP_0f07, 0, XX, XX },
1474 { "xcryptcfb", OP_0f07, 0, XX, XX },
1475 { "xcryptofb", OP_0f07, 0, XX, XX },
1476 { "(bad)", OP_0f07, 0, XX, XX },
1477 { "(bad)", OP_0f07, 0, XX, XX },
1478 },
1479 /* GRPPADLCK2 */
1480 {
1481 { "montmul", OP_0f07, 0, XX, XX },
1482 { "xsha1", OP_0f07, 0, XX, XX },
1483 { "xsha256", OP_0f07, 0, XX, XX },
1484 { "(bad)", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 { "(bad)", OP_0f07, 0, XX, XX },
1488 { "(bad)", OP_0f07, 0, XX, XX },
1489 }
1490 };
1491
1492 static const struct dis386 prefix_user_table[][4] = {
1493 /* PREGRP0 */
1494 {
1495 { "addps", XM, EX, XX },
1496 { "addss", XM, EX, XX },
1497 { "addpd", XM, EX, XX },
1498 { "addsd", XM, EX, XX },
1499 },
1500 /* PREGRP1 */
1501 {
1502 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1503 { "", XM, EX, OPSIMD },
1504 { "", XM, EX, OPSIMD },
1505 { "", XM, EX, OPSIMD },
1506 },
1507 /* PREGRP2 */
1508 {
1509 { "cvtpi2ps", XM, EM, XX },
1510 { "cvtsi2ssY", XM, Ev, XX },
1511 { "cvtpi2pd", XM, EM, XX },
1512 { "cvtsi2sdY", XM, Ev, XX },
1513 },
1514 /* PREGRP3 */
1515 {
1516 { "cvtps2pi", MX, EX, XX },
1517 { "cvtss2siY", Gv, EX, XX },
1518 { "cvtpd2pi", MX, EX, XX },
1519 { "cvtsd2siY", Gv, EX, XX },
1520 },
1521 /* PREGRP4 */
1522 {
1523 { "cvttps2pi", MX, EX, XX },
1524 { "cvttss2siY", Gv, EX, XX },
1525 { "cvttpd2pi", MX, EX, XX },
1526 { "cvttsd2siY", Gv, EX, XX },
1527 },
1528 /* PREGRP5 */
1529 {
1530 { "divps", XM, EX, XX },
1531 { "divss", XM, EX, XX },
1532 { "divpd", XM, EX, XX },
1533 { "divsd", XM, EX, XX },
1534 },
1535 /* PREGRP6 */
1536 {
1537 { "maxps", XM, EX, XX },
1538 { "maxss", XM, EX, XX },
1539 { "maxpd", XM, EX, XX },
1540 { "maxsd", XM, EX, XX },
1541 },
1542 /* PREGRP7 */
1543 {
1544 { "minps", XM, EX, XX },
1545 { "minss", XM, EX, XX },
1546 { "minpd", XM, EX, XX },
1547 { "minsd", XM, EX, XX },
1548 },
1549 /* PREGRP8 */
1550 {
1551 { "movups", XM, EX, XX },
1552 { "movss", XM, EX, XX },
1553 { "movupd", XM, EX, XX },
1554 { "movsd", XM, EX, XX },
1555 },
1556 /* PREGRP9 */
1557 {
1558 { "movups", EX, XM, XX },
1559 { "movss", EX, XM, XX },
1560 { "movupd", EX, XM, XX },
1561 { "movsd", EX, XM, XX },
1562 },
1563 /* PREGRP10 */
1564 {
1565 { "mulps", XM, EX, XX },
1566 { "mulss", XM, EX, XX },
1567 { "mulpd", XM, EX, XX },
1568 { "mulsd", XM, EX, XX },
1569 },
1570 /* PREGRP11 */
1571 {
1572 { "rcpps", XM, EX, XX },
1573 { "rcpss", XM, EX, XX },
1574 { "(bad)", XM, EX, XX },
1575 { "(bad)", XM, EX, XX },
1576 },
1577 /* PREGRP12 */
1578 {
1579 { "rsqrtps", XM, EX, XX },
1580 { "rsqrtss", XM, EX, XX },
1581 { "(bad)", XM, EX, XX },
1582 { "(bad)", XM, EX, XX },
1583 },
1584 /* PREGRP13 */
1585 {
1586 { "sqrtps", XM, EX, XX },
1587 { "sqrtss", XM, EX, XX },
1588 { "sqrtpd", XM, EX, XX },
1589 { "sqrtsd", XM, EX, XX },
1590 },
1591 /* PREGRP14 */
1592 {
1593 { "subps", XM, EX, XX },
1594 { "subss", XM, EX, XX },
1595 { "subpd", XM, EX, XX },
1596 { "subsd", XM, EX, XX },
1597 },
1598 /* PREGRP15 */
1599 {
1600 { "(bad)", XM, EX, XX },
1601 { "cvtdq2pd", XM, EX, XX },
1602 { "cvttpd2dq", XM, EX, XX },
1603 { "cvtpd2dq", XM, EX, XX },
1604 },
1605 /* PREGRP16 */
1606 {
1607 { "cvtdq2ps", XM, EX, XX },
1608 { "cvttps2dq",XM, EX, XX },
1609 { "cvtps2dq",XM, EX, XX },
1610 { "(bad)", XM, EX, XX },
1611 },
1612 /* PREGRP17 */
1613 {
1614 { "cvtps2pd", XM, EX, XX },
1615 { "cvtss2sd", XM, EX, XX },
1616 { "cvtpd2ps", XM, EX, XX },
1617 { "cvtsd2ss", XM, EX, XX },
1618 },
1619 /* PREGRP18 */
1620 {
1621 { "maskmovq", MX, MS, XX },
1622 { "(bad)", XM, EX, XX },
1623 { "maskmovdqu", XM, EX, XX },
1624 { "(bad)", XM, EX, XX },
1625 },
1626 /* PREGRP19 */
1627 {
1628 { "movq", MX, EM, XX },
1629 { "movdqu", XM, EX, XX },
1630 { "movdqa", XM, EX, XX },
1631 { "(bad)", XM, EX, XX },
1632 },
1633 /* PREGRP20 */
1634 {
1635 { "movq", EM, MX, XX },
1636 { "movdqu", EX, XM, XX },
1637 { "movdqa", EX, XM, XX },
1638 { "(bad)", EX, XM, XX },
1639 },
1640 /* PREGRP21 */
1641 {
1642 { "(bad)", EX, XM, XX },
1643 { "movq2dq", XM, MS, XX },
1644 { "movq", EX, XM, XX },
1645 { "movdq2q", MX, XS, XX },
1646 },
1647 /* PREGRP22 */
1648 {
1649 { "pshufw", MX, EM, Ib },
1650 { "pshufhw", XM, EX, Ib },
1651 { "pshufd", XM, EX, Ib },
1652 { "pshuflw", XM, EX, Ib },
1653 },
1654 /* PREGRP23 */
1655 {
1656 { "movd", Edq, MX, XX },
1657 { "movq", XM, EX, XX },
1658 { "movd", Edq, XM, XX },
1659 { "(bad)", Ed, XM, XX },
1660 },
1661 /* PREGRP24 */
1662 {
1663 { "(bad)", MX, EX, XX },
1664 { "(bad)", XM, EX, XX },
1665 { "punpckhqdq", XM, EX, XX },
1666 { "(bad)", XM, EX, XX },
1667 },
1668 /* PREGRP25 */
1669 {
1670 { "movntq", EM, MX, XX },
1671 { "(bad)", EM, XM, XX },
1672 { "movntdq", EM, XM, XX },
1673 { "(bad)", EM, XM, XX },
1674 },
1675 /* PREGRP26 */
1676 {
1677 { "(bad)", MX, EX, XX },
1678 { "(bad)", XM, EX, XX },
1679 { "punpcklqdq", XM, EX, XX },
1680 { "(bad)", XM, EX, XX },
1681 },
1682 /* PREGRP27 */
1683 {
1684 { "(bad)", MX, EX, XX },
1685 { "(bad)", XM, EX, XX },
1686 { "addsubpd", XM, EX, XX },
1687 { "addsubps", XM, EX, XX },
1688 },
1689 /* PREGRP28 */
1690 {
1691 { "(bad)", MX, EX, XX },
1692 { "(bad)", XM, EX, XX },
1693 { "haddpd", XM, EX, XX },
1694 { "haddps", XM, EX, XX },
1695 },
1696 /* PREGRP29 */
1697 {
1698 { "(bad)", MX, EX, XX },
1699 { "(bad)", XM, EX, XX },
1700 { "hsubpd", XM, EX, XX },
1701 { "hsubps", XM, EX, XX },
1702 },
1703 /* PREGRP30 */
1704 {
1705 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1706 { "movsldup", XM, EX, XX },
1707 { "movlpd", XM, EX, XX },
1708 { "movddup", XM, EX, XX },
1709 },
1710 /* PREGRP31 */
1711 {
1712 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1713 { "movshdup", XM, EX, XX },
1714 { "movhpd", XM, EX, XX },
1715 { "(bad)", XM, EX, XX },
1716 },
1717 /* PREGRP32 */
1718 {
1719 { "(bad)", XM, EX, XX },
1720 { "(bad)", XM, EX, XX },
1721 { "(bad)", XM, EX, XX },
1722 { "lddqu", XM, M, XX },
1723 },
1724 };
1725
1726 static const struct dis386 x86_64_table[][2] = {
1727 {
1728 { "arpl", Ew, Gw, XX },
1729 { "movs{||lq|xd}", Gv, Ed, XX },
1730 },
1731 };
1732
1733 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1734
1735 static void
1736 ckprefix (void)
1737 {
1738 int newrex;
1739 rex = 0;
1740 prefixes = 0;
1741 used_prefixes = 0;
1742 rex_used = 0;
1743 while (1)
1744 {
1745 FETCH_DATA (the_info, codep + 1);
1746 newrex = 0;
1747 switch (*codep)
1748 {
1749 /* REX prefixes family. */
1750 case 0x40:
1751 case 0x41:
1752 case 0x42:
1753 case 0x43:
1754 case 0x44:
1755 case 0x45:
1756 case 0x46:
1757 case 0x47:
1758 case 0x48:
1759 case 0x49:
1760 case 0x4a:
1761 case 0x4b:
1762 case 0x4c:
1763 case 0x4d:
1764 case 0x4e:
1765 case 0x4f:
1766 if (mode_64bit)
1767 newrex = *codep;
1768 else
1769 return;
1770 break;
1771 case 0xf3:
1772 prefixes |= PREFIX_REPZ;
1773 break;
1774 case 0xf2:
1775 prefixes |= PREFIX_REPNZ;
1776 break;
1777 case 0xf0:
1778 prefixes |= PREFIX_LOCK;
1779 break;
1780 case 0x2e:
1781 prefixes |= PREFIX_CS;
1782 break;
1783 case 0x36:
1784 prefixes |= PREFIX_SS;
1785 break;
1786 case 0x3e:
1787 prefixes |= PREFIX_DS;
1788 break;
1789 case 0x26:
1790 prefixes |= PREFIX_ES;
1791 break;
1792 case 0x64:
1793 prefixes |= PREFIX_FS;
1794 break;
1795 case 0x65:
1796 prefixes |= PREFIX_GS;
1797 break;
1798 case 0x66:
1799 prefixes |= PREFIX_DATA;
1800 break;
1801 case 0x67:
1802 prefixes |= PREFIX_ADDR;
1803 break;
1804 case FWAIT_OPCODE:
1805 /* fwait is really an instruction. If there are prefixes
1806 before the fwait, they belong to the fwait, *not* to the
1807 following instruction. */
1808 if (prefixes)
1809 {
1810 prefixes |= PREFIX_FWAIT;
1811 codep++;
1812 return;
1813 }
1814 prefixes = PREFIX_FWAIT;
1815 break;
1816 default:
1817 return;
1818 }
1819 /* Rex is ignored when followed by another prefix. */
1820 if (rex)
1821 {
1822 oappend (prefix_name (rex, 0));
1823 oappend (" ");
1824 }
1825 rex = newrex;
1826 codep++;
1827 }
1828 }
1829
1830 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1831 prefix byte. */
1832
1833 static const char *
1834 prefix_name (int pref, int sizeflag)
1835 {
1836 switch (pref)
1837 {
1838 /* REX prefixes family. */
1839 case 0x40:
1840 return "rex";
1841 case 0x41:
1842 return "rexZ";
1843 case 0x42:
1844 return "rexY";
1845 case 0x43:
1846 return "rexYZ";
1847 case 0x44:
1848 return "rexX";
1849 case 0x45:
1850 return "rexXZ";
1851 case 0x46:
1852 return "rexXY";
1853 case 0x47:
1854 return "rexXYZ";
1855 case 0x48:
1856 return "rex64";
1857 case 0x49:
1858 return "rex64Z";
1859 case 0x4a:
1860 return "rex64Y";
1861 case 0x4b:
1862 return "rex64YZ";
1863 case 0x4c:
1864 return "rex64X";
1865 case 0x4d:
1866 return "rex64XZ";
1867 case 0x4e:
1868 return "rex64XY";
1869 case 0x4f:
1870 return "rex64XYZ";
1871 case 0xf3:
1872 return "repz";
1873 case 0xf2:
1874 return "repnz";
1875 case 0xf0:
1876 return "lock";
1877 case 0x2e:
1878 return "cs";
1879 case 0x36:
1880 return "ss";
1881 case 0x3e:
1882 return "ds";
1883 case 0x26:
1884 return "es";
1885 case 0x64:
1886 return "fs";
1887 case 0x65:
1888 return "gs";
1889 case 0x66:
1890 return (sizeflag & DFLAG) ? "data16" : "data32";
1891 case 0x67:
1892 if (mode_64bit)
1893 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1894 else
1895 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1896 case FWAIT_OPCODE:
1897 return "fwait";
1898 default:
1899 return NULL;
1900 }
1901 }
1902
1903 static char op1out[100], op2out[100], op3out[100];
1904 static int op_ad, op_index[3];
1905 static int two_source_ops;
1906 static bfd_vma op_address[3];
1907 static bfd_vma op_riprel[3];
1908 static bfd_vma start_pc;
1909 \f
1910 /*
1911 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1912 * (see topic "Redundant prefixes" in the "Differences from 8086"
1913 * section of the "Virtual 8086 Mode" chapter.)
1914 * 'pc' should be the address of this instruction, it will
1915 * be used to print the target address if this is a relative jump or call
1916 * The function returns the length of this instruction in bytes.
1917 */
1918
1919 static char intel_syntax;
1920 static char open_char;
1921 static char close_char;
1922 static char separator_char;
1923 static char scale_char;
1924
1925 /* Here for backwards compatibility. When gdb stops using
1926 print_insn_i386_att and print_insn_i386_intel these functions can
1927 disappear, and print_insn_i386 be merged into print_insn. */
1928 int
1929 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1930 {
1931 intel_syntax = 0;
1932
1933 return print_insn (pc, info);
1934 }
1935
1936 int
1937 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1938 {
1939 intel_syntax = 1;
1940
1941 return print_insn (pc, info);
1942 }
1943
1944 int
1945 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1946 {
1947 intel_syntax = -1;
1948
1949 return print_insn (pc, info);
1950 }
1951
1952 static int
1953 print_insn (bfd_vma pc, disassemble_info *info)
1954 {
1955 const struct dis386 *dp;
1956 int i;
1957 char *first, *second, *third;
1958 int needcomma;
1959 unsigned char uses_SSE_prefix;
1960 int sizeflag;
1961 const char *p;
1962 struct dis_private priv;
1963
1964 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1965 || info->mach == bfd_mach_x86_64);
1966
1967 if (intel_syntax == (char) -1)
1968 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1969 || info->mach == bfd_mach_x86_64_intel_syntax);
1970
1971 if (info->mach == bfd_mach_i386_i386
1972 || info->mach == bfd_mach_x86_64
1973 || info->mach == bfd_mach_i386_i386_intel_syntax
1974 || info->mach == bfd_mach_x86_64_intel_syntax)
1975 priv.orig_sizeflag = AFLAG | DFLAG;
1976 else if (info->mach == bfd_mach_i386_i8086)
1977 priv.orig_sizeflag = 0;
1978 else
1979 abort ();
1980
1981 for (p = info->disassembler_options; p != NULL; )
1982 {
1983 if (strncmp (p, "x86-64", 6) == 0)
1984 {
1985 mode_64bit = 1;
1986 priv.orig_sizeflag = AFLAG | DFLAG;
1987 }
1988 else if (strncmp (p, "i386", 4) == 0)
1989 {
1990 mode_64bit = 0;
1991 priv.orig_sizeflag = AFLAG | DFLAG;
1992 }
1993 else if (strncmp (p, "i8086", 5) == 0)
1994 {
1995 mode_64bit = 0;
1996 priv.orig_sizeflag = 0;
1997 }
1998 else if (strncmp (p, "intel", 5) == 0)
1999 {
2000 intel_syntax = 1;
2001 }
2002 else if (strncmp (p, "att", 3) == 0)
2003 {
2004 intel_syntax = 0;
2005 }
2006 else if (strncmp (p, "addr", 4) == 0)
2007 {
2008 if (p[4] == '1' && p[5] == '6')
2009 priv.orig_sizeflag &= ~AFLAG;
2010 else if (p[4] == '3' && p[5] == '2')
2011 priv.orig_sizeflag |= AFLAG;
2012 }
2013 else if (strncmp (p, "data", 4) == 0)
2014 {
2015 if (p[4] == '1' && p[5] == '6')
2016 priv.orig_sizeflag &= ~DFLAG;
2017 else if (p[4] == '3' && p[5] == '2')
2018 priv.orig_sizeflag |= DFLAG;
2019 }
2020 else if (strncmp (p, "suffix", 6) == 0)
2021 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2022
2023 p = strchr (p, ',');
2024 if (p != NULL)
2025 p++;
2026 }
2027
2028 if (intel_syntax)
2029 {
2030 names64 = intel_names64;
2031 names32 = intel_names32;
2032 names16 = intel_names16;
2033 names8 = intel_names8;
2034 names8rex = intel_names8rex;
2035 names_seg = intel_names_seg;
2036 index16 = intel_index16;
2037 open_char = '[';
2038 close_char = ']';
2039 separator_char = '+';
2040 scale_char = '*';
2041 }
2042 else
2043 {
2044 names64 = att_names64;
2045 names32 = att_names32;
2046 names16 = att_names16;
2047 names8 = att_names8;
2048 names8rex = att_names8rex;
2049 names_seg = att_names_seg;
2050 index16 = att_index16;
2051 open_char = '(';
2052 close_char = ')';
2053 separator_char = ',';
2054 scale_char = ',';
2055 }
2056
2057 /* The output looks better if we put 7 bytes on a line, since that
2058 puts most long word instructions on a single line. */
2059 info->bytes_per_line = 7;
2060
2061 info->private_data = &priv;
2062 priv.max_fetched = priv.the_buffer;
2063 priv.insn_start = pc;
2064
2065 obuf[0] = 0;
2066 op1out[0] = 0;
2067 op2out[0] = 0;
2068 op3out[0] = 0;
2069
2070 op_index[0] = op_index[1] = op_index[2] = -1;
2071
2072 the_info = info;
2073 start_pc = pc;
2074 start_codep = priv.the_buffer;
2075 codep = priv.the_buffer;
2076
2077 if (setjmp (priv.bailout) != 0)
2078 {
2079 const char *name;
2080
2081 /* Getting here means we tried for data but didn't get it. That
2082 means we have an incomplete instruction of some sort. Just
2083 print the first byte as a prefix or a .byte pseudo-op. */
2084 if (codep > priv.the_buffer)
2085 {
2086 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2087 if (name != NULL)
2088 (*info->fprintf_func) (info->stream, "%s", name);
2089 else
2090 {
2091 /* Just print the first byte as a .byte instruction. */
2092 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2093 (unsigned int) priv.the_buffer[0]);
2094 }
2095
2096 return 1;
2097 }
2098
2099 return -1;
2100 }
2101
2102 obufp = obuf;
2103 ckprefix ();
2104
2105 insn_codep = codep;
2106 sizeflag = priv.orig_sizeflag;
2107
2108 FETCH_DATA (info, codep + 1);
2109 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2110
2111 if ((prefixes & PREFIX_FWAIT)
2112 && ((*codep < 0xd8) || (*codep > 0xdf)))
2113 {
2114 const char *name;
2115
2116 /* fwait not followed by floating point instruction. Print the
2117 first prefix, which is probably fwait itself. */
2118 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2119 if (name == NULL)
2120 name = INTERNAL_DISASSEMBLER_ERROR;
2121 (*info->fprintf_func) (info->stream, "%s", name);
2122 return 1;
2123 }
2124
2125 if (*codep == 0x0f)
2126 {
2127 FETCH_DATA (info, codep + 2);
2128 dp = &dis386_twobyte[*++codep];
2129 need_modrm = twobyte_has_modrm[*codep];
2130 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2131 }
2132 else
2133 {
2134 dp = &dis386[*codep];
2135 need_modrm = onebyte_has_modrm[*codep];
2136 uses_SSE_prefix = 0;
2137 }
2138 codep++;
2139
2140 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2141 {
2142 oappend ("repz ");
2143 used_prefixes |= PREFIX_REPZ;
2144 }
2145 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2146 {
2147 oappend ("repnz ");
2148 used_prefixes |= PREFIX_REPNZ;
2149 }
2150 if (prefixes & PREFIX_LOCK)
2151 {
2152 oappend ("lock ");
2153 used_prefixes |= PREFIX_LOCK;
2154 }
2155
2156 if (prefixes & PREFIX_ADDR)
2157 {
2158 sizeflag ^= AFLAG;
2159 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2160 {
2161 if ((sizeflag & AFLAG) || mode_64bit)
2162 oappend ("addr32 ");
2163 else
2164 oappend ("addr16 ");
2165 used_prefixes |= PREFIX_ADDR;
2166 }
2167 }
2168
2169 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2170 {
2171 sizeflag ^= DFLAG;
2172 if (dp->bytemode3 == cond_jump_mode
2173 && dp->bytemode1 == v_mode
2174 && !intel_syntax)
2175 {
2176 if (sizeflag & DFLAG)
2177 oappend ("data32 ");
2178 else
2179 oappend ("data16 ");
2180 used_prefixes |= PREFIX_DATA;
2181 }
2182 }
2183
2184 if (need_modrm)
2185 {
2186 FETCH_DATA (info, codep + 1);
2187 mod = (*codep >> 6) & 3;
2188 reg = (*codep >> 3) & 7;
2189 rm = *codep & 7;
2190 }
2191
2192 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2193 {
2194 dofloat (sizeflag);
2195 }
2196 else
2197 {
2198 int index;
2199 if (dp->name == NULL)
2200 {
2201 switch (dp->bytemode1)
2202 {
2203 case USE_GROUPS:
2204 dp = &grps[dp->bytemode2][reg];
2205 break;
2206
2207 case USE_PREFIX_USER_TABLE:
2208 index = 0;
2209 used_prefixes |= (prefixes & PREFIX_REPZ);
2210 if (prefixes & PREFIX_REPZ)
2211 index = 1;
2212 else
2213 {
2214 used_prefixes |= (prefixes & PREFIX_DATA);
2215 if (prefixes & PREFIX_DATA)
2216 index = 2;
2217 else
2218 {
2219 used_prefixes |= (prefixes & PREFIX_REPNZ);
2220 if (prefixes & PREFIX_REPNZ)
2221 index = 3;
2222 }
2223 }
2224 dp = &prefix_user_table[dp->bytemode2][index];
2225 break;
2226
2227 case X86_64_SPECIAL:
2228 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2229 break;
2230
2231 default:
2232 oappend (INTERNAL_DISASSEMBLER_ERROR);
2233 break;
2234 }
2235 }
2236
2237 if (putop (dp->name, sizeflag) == 0)
2238 {
2239 obufp = op1out;
2240 op_ad = 2;
2241 if (dp->op1)
2242 (*dp->op1) (dp->bytemode1, sizeflag);
2243
2244 obufp = op2out;
2245 op_ad = 1;
2246 if (dp->op2)
2247 (*dp->op2) (dp->bytemode2, sizeflag);
2248
2249 obufp = op3out;
2250 op_ad = 0;
2251 if (dp->op3)
2252 (*dp->op3) (dp->bytemode3, sizeflag);
2253 }
2254 }
2255
2256 /* See if any prefixes were not used. If so, print the first one
2257 separately. If we don't do this, we'll wind up printing an
2258 instruction stream which does not precisely correspond to the
2259 bytes we are disassembling. */
2260 if ((prefixes & ~used_prefixes) != 0)
2261 {
2262 const char *name;
2263
2264 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2265 if (name == NULL)
2266 name = INTERNAL_DISASSEMBLER_ERROR;
2267 (*info->fprintf_func) (info->stream, "%s", name);
2268 return 1;
2269 }
2270 if (rex & ~rex_used)
2271 {
2272 const char *name;
2273 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2274 if (name == NULL)
2275 name = INTERNAL_DISASSEMBLER_ERROR;
2276 (*info->fprintf_func) (info->stream, "%s ", name);
2277 }
2278
2279 obufp = obuf + strlen (obuf);
2280 for (i = strlen (obuf); i < 6; i++)
2281 oappend (" ");
2282 oappend (" ");
2283 (*info->fprintf_func) (info->stream, "%s", obuf);
2284
2285 /* The enter and bound instructions are printed with operands in the same
2286 order as the intel book; everything else is printed in reverse order. */
2287 if (intel_syntax || two_source_ops)
2288 {
2289 first = op1out;
2290 second = op2out;
2291 third = op3out;
2292 op_ad = op_index[0];
2293 op_index[0] = op_index[2];
2294 op_index[2] = op_ad;
2295 }
2296 else
2297 {
2298 first = op3out;
2299 second = op2out;
2300 third = op1out;
2301 }
2302 needcomma = 0;
2303 if (*first)
2304 {
2305 if (op_index[0] != -1 && !op_riprel[0])
2306 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2307 else
2308 (*info->fprintf_func) (info->stream, "%s", first);
2309 needcomma = 1;
2310 }
2311 if (*second)
2312 {
2313 if (needcomma)
2314 (*info->fprintf_func) (info->stream, ",");
2315 if (op_index[1] != -1 && !op_riprel[1])
2316 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2317 else
2318 (*info->fprintf_func) (info->stream, "%s", second);
2319 needcomma = 1;
2320 }
2321 if (*third)
2322 {
2323 if (needcomma)
2324 (*info->fprintf_func) (info->stream, ",");
2325 if (op_index[2] != -1 && !op_riprel[2])
2326 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2327 else
2328 (*info->fprintf_func) (info->stream, "%s", third);
2329 }
2330 for (i = 0; i < 3; i++)
2331 if (op_index[i] != -1 && op_riprel[i])
2332 {
2333 (*info->fprintf_func) (info->stream, " # ");
2334 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2335 + op_address[op_index[i]]), info);
2336 }
2337 return codep - priv.the_buffer;
2338 }
2339
2340 static const char *float_mem[] = {
2341 /* d8 */
2342 "fadd{s||s|}",
2343 "fmul{s||s|}",
2344 "fcom{s||s|}",
2345 "fcomp{s||s|}",
2346 "fsub{s||s|}",
2347 "fsubr{s||s|}",
2348 "fdiv{s||s|}",
2349 "fdivr{s||s|}",
2350 /* d9 */
2351 "fld{s||s|}",
2352 "(bad)",
2353 "fst{s||s|}",
2354 "fstp{s||s|}",
2355 "fldenvIC",
2356 "fldcw",
2357 "fNstenvIC",
2358 "fNstcw",
2359 /* da */
2360 "fiadd{l||l|}",
2361 "fimul{l||l|}",
2362 "ficom{l||l|}",
2363 "ficomp{l||l|}",
2364 "fisub{l||l|}",
2365 "fisubr{l||l|}",
2366 "fidiv{l||l|}",
2367 "fidivr{l||l|}",
2368 /* db */
2369 "fild{l||l|}",
2370 "fisttp{l||l|}",
2371 "fist{l||l|}",
2372 "fistp{l||l|}",
2373 "(bad)",
2374 "fld{t||t|}",
2375 "(bad)",
2376 "fstp{t||t|}",
2377 /* dc */
2378 "fadd{l||l|}",
2379 "fmul{l||l|}",
2380 "fcom{l||l|}",
2381 "fcomp{l||l|}",
2382 "fsub{l||l|}",
2383 "fsubr{l||l|}",
2384 "fdiv{l||l|}",
2385 "fdivr{l||l|}",
2386 /* dd */
2387 "fld{l||l|}",
2388 "fisttp{ll||ll|}",
2389 "fst{l||l|}",
2390 "fstp{l||l|}",
2391 "frstorIC",
2392 "(bad)",
2393 "fNsaveIC",
2394 "fNstsw",
2395 /* de */
2396 "fiadd",
2397 "fimul",
2398 "ficom",
2399 "ficomp",
2400 "fisub",
2401 "fisubr",
2402 "fidiv",
2403 "fidivr",
2404 /* df */
2405 "fild",
2406 "fisttp",
2407 "fist",
2408 "fistp",
2409 "fbld",
2410 "fild{ll||ll|}",
2411 "fbstp",
2412 "fistp{ll||ll|}",
2413 };
2414
2415 static const unsigned char float_mem_mode[] = {
2416 /* d8 */
2417 d_mode,
2418 d_mode,
2419 d_mode,
2420 d_mode,
2421 d_mode,
2422 d_mode,
2423 d_mode,
2424 d_mode,
2425 /* d9 */
2426 d_mode,
2427 0,
2428 d_mode,
2429 d_mode,
2430 0,
2431 w_mode,
2432 0,
2433 w_mode,
2434 /* da */
2435 d_mode,
2436 d_mode,
2437 d_mode,
2438 d_mode,
2439 d_mode,
2440 d_mode,
2441 d_mode,
2442 d_mode,
2443 /* db */
2444 d_mode,
2445 d_mode,
2446 d_mode,
2447 d_mode,
2448 0,
2449 t_mode,
2450 0,
2451 t_mode,
2452 /* dc */
2453 q_mode,
2454 q_mode,
2455 q_mode,
2456 q_mode,
2457 q_mode,
2458 q_mode,
2459 q_mode,
2460 q_mode,
2461 /* dd */
2462 q_mode,
2463 q_mode,
2464 q_mode,
2465 q_mode,
2466 0,
2467 0,
2468 0,
2469 w_mode,
2470 /* de */
2471 w_mode,
2472 w_mode,
2473 w_mode,
2474 w_mode,
2475 w_mode,
2476 w_mode,
2477 w_mode,
2478 w_mode,
2479 /* df */
2480 w_mode,
2481 w_mode,
2482 w_mode,
2483 w_mode,
2484 t_mode,
2485 q_mode,
2486 t_mode,
2487 q_mode
2488 };
2489
2490 #define ST OP_ST, 0
2491 #define STi OP_STi, 0
2492
2493 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2494 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2495 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2496 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2497 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2498 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2499 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2500 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2501 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2502
2503 static const struct dis386 float_reg[][8] = {
2504 /* d8 */
2505 {
2506 { "fadd", ST, STi, XX },
2507 { "fmul", ST, STi, XX },
2508 { "fcom", STi, XX, XX },
2509 { "fcomp", STi, XX, XX },
2510 { "fsub", ST, STi, XX },
2511 { "fsubr", ST, STi, XX },
2512 { "fdiv", ST, STi, XX },
2513 { "fdivr", ST, STi, XX },
2514 },
2515 /* d9 */
2516 {
2517 { "fld", STi, XX, XX },
2518 { "fxch", STi, XX, XX },
2519 { FGRPd9_2 },
2520 { "(bad)", XX, XX, XX },
2521 { FGRPd9_4 },
2522 { FGRPd9_5 },
2523 { FGRPd9_6 },
2524 { FGRPd9_7 },
2525 },
2526 /* da */
2527 {
2528 { "fcmovb", ST, STi, XX },
2529 { "fcmove", ST, STi, XX },
2530 { "fcmovbe",ST, STi, XX },
2531 { "fcmovu", ST, STi, XX },
2532 { "(bad)", XX, XX, XX },
2533 { FGRPda_5 },
2534 { "(bad)", XX, XX, XX },
2535 { "(bad)", XX, XX, XX },
2536 },
2537 /* db */
2538 {
2539 { "fcmovnb",ST, STi, XX },
2540 { "fcmovne",ST, STi, XX },
2541 { "fcmovnbe",ST, STi, XX },
2542 { "fcmovnu",ST, STi, XX },
2543 { FGRPdb_4 },
2544 { "fucomi", ST, STi, XX },
2545 { "fcomi", ST, STi, XX },
2546 { "(bad)", XX, XX, XX },
2547 },
2548 /* dc */
2549 {
2550 { "fadd", STi, ST, XX },
2551 { "fmul", STi, ST, XX },
2552 { "(bad)", XX, XX, XX },
2553 { "(bad)", XX, XX, XX },
2554 #if UNIXWARE_COMPAT
2555 { "fsub", STi, ST, XX },
2556 { "fsubr", STi, ST, XX },
2557 { "fdiv", STi, ST, XX },
2558 { "fdivr", STi, ST, XX },
2559 #else
2560 { "fsubr", STi, ST, XX },
2561 { "fsub", STi, ST, XX },
2562 { "fdivr", STi, ST, XX },
2563 { "fdiv", STi, ST, XX },
2564 #endif
2565 },
2566 /* dd */
2567 {
2568 { "ffree", STi, XX, XX },
2569 { "(bad)", XX, XX, XX },
2570 { "fst", STi, XX, XX },
2571 { "fstp", STi, XX, XX },
2572 { "fucom", STi, XX, XX },
2573 { "fucomp", STi, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "(bad)", XX, XX, XX },
2576 },
2577 /* de */
2578 {
2579 { "faddp", STi, ST, XX },
2580 { "fmulp", STi, ST, XX },
2581 { "(bad)", XX, XX, XX },
2582 { FGRPde_3 },
2583 #if UNIXWARE_COMPAT
2584 { "fsubp", STi, ST, XX },
2585 { "fsubrp", STi, ST, XX },
2586 { "fdivp", STi, ST, XX },
2587 { "fdivrp", STi, ST, XX },
2588 #else
2589 { "fsubrp", STi, ST, XX },
2590 { "fsubp", STi, ST, XX },
2591 { "fdivrp", STi, ST, XX },
2592 { "fdivp", STi, ST, XX },
2593 #endif
2594 },
2595 /* df */
2596 {
2597 { "ffreep", STi, XX, XX },
2598 { "(bad)", XX, XX, XX },
2599 { "(bad)", XX, XX, XX },
2600 { "(bad)", XX, XX, XX },
2601 { FGRPdf_4 },
2602 { "fucomip",ST, STi, XX },
2603 { "fcomip", ST, STi, XX },
2604 { "(bad)", XX, XX, XX },
2605 },
2606 };
2607
2608 static char *fgrps[][8] = {
2609 /* d9_2 0 */
2610 {
2611 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2612 },
2613
2614 /* d9_4 1 */
2615 {
2616 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2617 },
2618
2619 /* d9_5 2 */
2620 {
2621 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2622 },
2623
2624 /* d9_6 3 */
2625 {
2626 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2627 },
2628
2629 /* d9_7 4 */
2630 {
2631 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2632 },
2633
2634 /* da_5 5 */
2635 {
2636 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2637 },
2638
2639 /* db_4 6 */
2640 {
2641 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2642 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2643 },
2644
2645 /* de_3 7 */
2646 {
2647 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* df_4 8 */
2651 {
2652 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2653 },
2654 };
2655
2656 static void
2657 dofloat (int sizeflag)
2658 {
2659 const struct dis386 *dp;
2660 unsigned char floatop;
2661
2662 floatop = codep[-1];
2663
2664 if (mod != 3)
2665 {
2666 int fp_indx = (floatop - 0xd8) * 8 + reg;
2667
2668 putop (float_mem[fp_indx], sizeflag);
2669 obufp = op1out;
2670 OP_E (float_mem_mode[fp_indx], sizeflag);
2671 return;
2672 }
2673 /* Skip mod/rm byte. */
2674 MODRM_CHECK;
2675 codep++;
2676
2677 dp = &float_reg[floatop - 0xd8][reg];
2678 if (dp->name == NULL)
2679 {
2680 putop (fgrps[dp->bytemode1][rm], sizeflag);
2681
2682 /* Instruction fnstsw is only one with strange arg. */
2683 if (floatop == 0xdf && codep[-1] == 0xe0)
2684 strcpy (op1out, names16[0]);
2685 }
2686 else
2687 {
2688 putop (dp->name, sizeflag);
2689
2690 obufp = op1out;
2691 if (dp->op1)
2692 (*dp->op1) (dp->bytemode1, sizeflag);
2693 obufp = op2out;
2694 if (dp->op2)
2695 (*dp->op2) (dp->bytemode2, sizeflag);
2696 }
2697 }
2698
2699 static void
2700 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2701 {
2702 oappend ("%st");
2703 }
2704
2705 static void
2706 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2707 {
2708 sprintf (scratchbuf, "%%st(%d)", rm);
2709 oappend (scratchbuf + intel_syntax);
2710 }
2711
2712 /* Capital letters in template are macros. */
2713 static int
2714 putop (const char *template, int sizeflag)
2715 {
2716 const char *p;
2717 int alt = 0;
2718
2719 for (p = template; *p; p++)
2720 {
2721 switch (*p)
2722 {
2723 default:
2724 *obufp++ = *p;
2725 break;
2726 case '{':
2727 alt = 0;
2728 if (intel_syntax)
2729 alt += 1;
2730 if (mode_64bit)
2731 alt += 2;
2732 while (alt != 0)
2733 {
2734 while (*++p != '|')
2735 {
2736 if (*p == '}')
2737 {
2738 /* Alternative not valid. */
2739 strcpy (obuf, "(bad)");
2740 obufp = obuf + 5;
2741 return 1;
2742 }
2743 else if (*p == '\0')
2744 abort ();
2745 }
2746 alt--;
2747 }
2748 /* Fall through. */
2749 case 'I':
2750 alt = 1;
2751 continue;
2752 case '|':
2753 while (*++p != '}')
2754 {
2755 if (*p == '\0')
2756 abort ();
2757 }
2758 break;
2759 case '}':
2760 break;
2761 case 'A':
2762 if (intel_syntax)
2763 break;
2764 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2765 *obufp++ = 'b';
2766 break;
2767 case 'B':
2768 if (intel_syntax)
2769 break;
2770 if (sizeflag & SUFFIX_ALWAYS)
2771 *obufp++ = 'b';
2772 break;
2773 case 'C':
2774 if (intel_syntax && !alt)
2775 break;
2776 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2777 {
2778 if (sizeflag & DFLAG)
2779 *obufp++ = intel_syntax ? 'd' : 'l';
2780 else
2781 *obufp++ = intel_syntax ? 'w' : 's';
2782 used_prefixes |= (prefixes & PREFIX_DATA);
2783 }
2784 break;
2785 case 'E': /* For jcxz/jecxz */
2786 if (mode_64bit)
2787 {
2788 if (sizeflag & AFLAG)
2789 *obufp++ = 'r';
2790 else
2791 *obufp++ = 'e';
2792 }
2793 else
2794 if (sizeflag & AFLAG)
2795 *obufp++ = 'e';
2796 used_prefixes |= (prefixes & PREFIX_ADDR);
2797 break;
2798 case 'F':
2799 if (intel_syntax)
2800 break;
2801 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2802 {
2803 if (sizeflag & AFLAG)
2804 *obufp++ = mode_64bit ? 'q' : 'l';
2805 else
2806 *obufp++ = mode_64bit ? 'l' : 'w';
2807 used_prefixes |= (prefixes & PREFIX_ADDR);
2808 }
2809 break;
2810 case 'H':
2811 if (intel_syntax)
2812 break;
2813 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2814 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2815 {
2816 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2817 *obufp++ = ',';
2818 *obufp++ = 'p';
2819 if (prefixes & PREFIX_DS)
2820 *obufp++ = 't';
2821 else
2822 *obufp++ = 'n';
2823 }
2824 break;
2825 case 'J':
2826 if (intel_syntax)
2827 break;
2828 *obufp++ = 'l';
2829 break;
2830 case 'L':
2831 if (intel_syntax)
2832 break;
2833 if (sizeflag & SUFFIX_ALWAYS)
2834 *obufp++ = 'l';
2835 break;
2836 case 'N':
2837 if ((prefixes & PREFIX_FWAIT) == 0)
2838 *obufp++ = 'n';
2839 else
2840 used_prefixes |= PREFIX_FWAIT;
2841 break;
2842 case 'O':
2843 USED_REX (REX_MODE64);
2844 if (rex & REX_MODE64)
2845 *obufp++ = 'o';
2846 else
2847 *obufp++ = 'd';
2848 break;
2849 case 'T':
2850 if (intel_syntax)
2851 break;
2852 if (mode_64bit)
2853 {
2854 *obufp++ = 'q';
2855 break;
2856 }
2857 /* Fall through. */
2858 case 'P':
2859 if (intel_syntax)
2860 break;
2861 if ((prefixes & PREFIX_DATA)
2862 || (rex & REX_MODE64)
2863 || (sizeflag & SUFFIX_ALWAYS))
2864 {
2865 USED_REX (REX_MODE64);
2866 if (rex & REX_MODE64)
2867 *obufp++ = 'q';
2868 else
2869 {
2870 if (sizeflag & DFLAG)
2871 *obufp++ = 'l';
2872 else
2873 *obufp++ = 'w';
2874 used_prefixes |= (prefixes & PREFIX_DATA);
2875 }
2876 }
2877 break;
2878 case 'U':
2879 if (intel_syntax)
2880 break;
2881 if (mode_64bit)
2882 {
2883 *obufp++ = 'q';
2884 break;
2885 }
2886 /* Fall through. */
2887 case 'Q':
2888 if (intel_syntax && !alt)
2889 break;
2890 USED_REX (REX_MODE64);
2891 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2892 {
2893 if (rex & REX_MODE64)
2894 *obufp++ = 'q';
2895 else
2896 {
2897 if (sizeflag & DFLAG)
2898 *obufp++ = intel_syntax ? 'd' : 'l';
2899 else
2900 *obufp++ = 'w';
2901 used_prefixes |= (prefixes & PREFIX_DATA);
2902 }
2903 }
2904 break;
2905 case 'R':
2906 USED_REX (REX_MODE64);
2907 if (intel_syntax)
2908 {
2909 if (rex & REX_MODE64)
2910 {
2911 *obufp++ = 'q';
2912 *obufp++ = 't';
2913 }
2914 else if (sizeflag & DFLAG)
2915 {
2916 *obufp++ = 'd';
2917 *obufp++ = 'q';
2918 }
2919 else
2920 {
2921 *obufp++ = 'w';
2922 *obufp++ = 'd';
2923 }
2924 }
2925 else
2926 {
2927 if (rex & REX_MODE64)
2928 *obufp++ = 'q';
2929 else if (sizeflag & DFLAG)
2930 *obufp++ = 'l';
2931 else
2932 *obufp++ = 'w';
2933 }
2934 if (!(rex & REX_MODE64))
2935 used_prefixes |= (prefixes & PREFIX_DATA);
2936 break;
2937 case 'S':
2938 if (intel_syntax)
2939 break;
2940 if (sizeflag & SUFFIX_ALWAYS)
2941 {
2942 if (rex & REX_MODE64)
2943 *obufp++ = 'q';
2944 else
2945 {
2946 if (sizeflag & DFLAG)
2947 *obufp++ = 'l';
2948 else
2949 *obufp++ = 'w';
2950 used_prefixes |= (prefixes & PREFIX_DATA);
2951 }
2952 }
2953 break;
2954 case 'X':
2955 if (prefixes & PREFIX_DATA)
2956 *obufp++ = 'd';
2957 else
2958 *obufp++ = 's';
2959 used_prefixes |= (prefixes & PREFIX_DATA);
2960 break;
2961 case 'Y':
2962 if (intel_syntax)
2963 break;
2964 if (rex & REX_MODE64)
2965 {
2966 USED_REX (REX_MODE64);
2967 *obufp++ = 'q';
2968 }
2969 break;
2970 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2971 case 'W':
2972 /* operand size flag for cwtl, cbtw */
2973 USED_REX (0);
2974 if (rex)
2975 *obufp++ = 'l';
2976 else if (sizeflag & DFLAG)
2977 *obufp++ = 'w';
2978 else
2979 *obufp++ = 'b';
2980 if (intel_syntax)
2981 {
2982 if (rex)
2983 {
2984 *obufp++ = 'q';
2985 *obufp++ = 'e';
2986 }
2987 if (sizeflag & DFLAG)
2988 {
2989 *obufp++ = 'd';
2990 *obufp++ = 'e';
2991 }
2992 else
2993 {
2994 *obufp++ = 'w';
2995 }
2996 }
2997 if (!rex)
2998 used_prefixes |= (prefixes & PREFIX_DATA);
2999 break;
3000 }
3001 alt = 0;
3002 }
3003 *obufp = 0;
3004 return 0;
3005 }
3006
3007 static void
3008 oappend (const char *s)
3009 {
3010 strcpy (obufp, s);
3011 obufp += strlen (s);
3012 }
3013
3014 static void
3015 append_seg (void)
3016 {
3017 if (prefixes & PREFIX_CS)
3018 {
3019 used_prefixes |= PREFIX_CS;
3020 oappend ("%cs:" + intel_syntax);
3021 }
3022 if (prefixes & PREFIX_DS)
3023 {
3024 used_prefixes |= PREFIX_DS;
3025 oappend ("%ds:" + intel_syntax);
3026 }
3027 if (prefixes & PREFIX_SS)
3028 {
3029 used_prefixes |= PREFIX_SS;
3030 oappend ("%ss:" + intel_syntax);
3031 }
3032 if (prefixes & PREFIX_ES)
3033 {
3034 used_prefixes |= PREFIX_ES;
3035 oappend ("%es:" + intel_syntax);
3036 }
3037 if (prefixes & PREFIX_FS)
3038 {
3039 used_prefixes |= PREFIX_FS;
3040 oappend ("%fs:" + intel_syntax);
3041 }
3042 if (prefixes & PREFIX_GS)
3043 {
3044 used_prefixes |= PREFIX_GS;
3045 oappend ("%gs:" + intel_syntax);
3046 }
3047 }
3048
3049 static void
3050 OP_indirE (int bytemode, int sizeflag)
3051 {
3052 if (!intel_syntax)
3053 oappend ("*");
3054 OP_E (bytemode, sizeflag);
3055 }
3056
3057 static void
3058 print_operand_value (char *buf, int hex, bfd_vma disp)
3059 {
3060 if (mode_64bit)
3061 {
3062 if (hex)
3063 {
3064 char tmp[30];
3065 int i;
3066 buf[0] = '0';
3067 buf[1] = 'x';
3068 sprintf_vma (tmp, disp);
3069 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3070 strcpy (buf + 2, tmp + i);
3071 }
3072 else
3073 {
3074 bfd_signed_vma v = disp;
3075 char tmp[30];
3076 int i;
3077 if (v < 0)
3078 {
3079 *(buf++) = '-';
3080 v = -disp;
3081 /* Check for possible overflow on 0x8000000000000000. */
3082 if (v < 0)
3083 {
3084 strcpy (buf, "9223372036854775808");
3085 return;
3086 }
3087 }
3088 if (!v)
3089 {
3090 strcpy (buf, "0");
3091 return;
3092 }
3093
3094 i = 0;
3095 tmp[29] = 0;
3096 while (v)
3097 {
3098 tmp[28 - i] = (v % 10) + '0';
3099 v /= 10;
3100 i++;
3101 }
3102 strcpy (buf, tmp + 29 - i);
3103 }
3104 }
3105 else
3106 {
3107 if (hex)
3108 sprintf (buf, "0x%x", (unsigned int) disp);
3109 else
3110 sprintf (buf, "%d", (int) disp);
3111 }
3112 }
3113
3114 static void
3115 OP_E (int bytemode, int sizeflag)
3116 {
3117 bfd_vma disp;
3118 int add = 0;
3119 int riprel = 0;
3120 USED_REX (REX_EXTZ);
3121 if (rex & REX_EXTZ)
3122 add += 8;
3123
3124 /* Skip mod/rm byte. */
3125 MODRM_CHECK;
3126 codep++;
3127
3128 if (mod == 3)
3129 {
3130 switch (bytemode)
3131 {
3132 case b_mode:
3133 USED_REX (0);
3134 if (rex)
3135 oappend (names8rex[rm + add]);
3136 else
3137 oappend (names8[rm + add]);
3138 break;
3139 case w_mode:
3140 oappend (names16[rm + add]);
3141 break;
3142 case d_mode:
3143 oappend (names32[rm + add]);
3144 break;
3145 case q_mode:
3146 oappend (names64[rm + add]);
3147 break;
3148 case m_mode:
3149 if (mode_64bit)
3150 oappend (names64[rm + add]);
3151 else
3152 oappend (names32[rm + add]);
3153 break;
3154 case v_mode:
3155 case dq_mode:
3156 case dqw_mode:
3157 USED_REX (REX_MODE64);
3158 if (rex & REX_MODE64)
3159 oappend (names64[rm + add]);
3160 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3161 oappend (names32[rm + add]);
3162 else
3163 oappend (names16[rm + add]);
3164 used_prefixes |= (prefixes & PREFIX_DATA);
3165 break;
3166 case 0:
3167 break;
3168 default:
3169 oappend (INTERNAL_DISASSEMBLER_ERROR);
3170 break;
3171 }
3172 return;
3173 }
3174
3175 disp = 0;
3176 append_seg ();
3177
3178 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3179 {
3180 int havesib;
3181 int havebase;
3182 int base;
3183 int index = 0;
3184 int scale = 0;
3185
3186 havesib = 0;
3187 havebase = 1;
3188 base = rm;
3189
3190 if (base == 4)
3191 {
3192 havesib = 1;
3193 FETCH_DATA (the_info, codep + 1);
3194 index = (*codep >> 3) & 7;
3195 if (mode_64bit || index != 0x4)
3196 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3197 scale = (*codep >> 6) & 3;
3198 base = *codep & 7;
3199 USED_REX (REX_EXTY);
3200 USED_REX (REX_EXTZ);
3201 if (rex & REX_EXTY)
3202 index += 8;
3203 if (rex & REX_EXTZ)
3204 base += 8;
3205 codep++;
3206 }
3207
3208 switch (mod)
3209 {
3210 case 0:
3211 if ((base & 7) == 5)
3212 {
3213 havebase = 0;
3214 if (mode_64bit && !havesib)
3215 riprel = 1;
3216 disp = get32s ();
3217 }
3218 break;
3219 case 1:
3220 FETCH_DATA (the_info, codep + 1);
3221 disp = *codep++;
3222 if ((disp & 0x80) != 0)
3223 disp -= 0x100;
3224 break;
3225 case 2:
3226 disp = get32s ();
3227 break;
3228 }
3229
3230 if (!intel_syntax)
3231 if (mod != 0 || (base & 7) == 5)
3232 {
3233 print_operand_value (scratchbuf, !riprel, disp);
3234 oappend (scratchbuf);
3235 if (riprel)
3236 {
3237 set_op (disp, 1);
3238 oappend ("(%rip)");
3239 }
3240 }
3241
3242 if (havebase || (havesib && (index != 4 || scale != 0)))
3243 {
3244 if (intel_syntax)
3245 {
3246 switch (bytemode)
3247 {
3248 case b_mode:
3249 oappend ("BYTE PTR ");
3250 break;
3251 case w_mode:
3252 case dqw_mode:
3253 oappend ("WORD PTR ");
3254 break;
3255 case v_mode:
3256 case dq_mode:
3257 USED_REX (REX_MODE64);
3258 if (rex & REX_MODE64)
3259 oappend ("QWORD PTR ");
3260 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3261 oappend ("DWORD PTR ");
3262 else
3263 oappend ("WORD PTR ");
3264 used_prefixes |= (prefixes & PREFIX_DATA);
3265 break;
3266 case d_mode:
3267 oappend ("DWORD PTR ");
3268 break;
3269 case q_mode:
3270 oappend ("QWORD PTR ");
3271 break;
3272 case m_mode:
3273 if (mode_64bit)
3274 oappend ("QWORD PTR ");
3275 else
3276 oappend ("DWORD PTR ");
3277 break;
3278 case f_mode:
3279 if (sizeflag & DFLAG)
3280 {
3281 used_prefixes |= (prefixes & PREFIX_DATA);
3282 oappend ("FWORD PTR ");
3283 }
3284 else
3285 oappend ("DWORD PTR ");
3286 break;
3287 case t_mode:
3288 oappend ("TBYTE PTR ");
3289 break;
3290 case x_mode:
3291 oappend ("XMMWORD PTR ");
3292 break;
3293 default:
3294 break;
3295 }
3296 }
3297 *obufp++ = open_char;
3298 if (intel_syntax && riprel)
3299 oappend ("rip + ");
3300 *obufp = '\0';
3301 USED_REX (REX_EXTZ);
3302 if (!havesib && (rex & REX_EXTZ))
3303 base += 8;
3304 if (havebase)
3305 oappend (mode_64bit && (sizeflag & AFLAG)
3306 ? names64[base] : names32[base]);
3307 if (havesib)
3308 {
3309 if (index != 4)
3310 {
3311 if (!intel_syntax || havebase)
3312 {
3313 *obufp++ = separator_char;
3314 *obufp = '\0';
3315 }
3316 oappend (mode_64bit && (sizeflag & AFLAG)
3317 ? names64[index] : names32[index]);
3318 }
3319 if (scale != 0 || (!intel_syntax && index != 4))
3320 {
3321 *obufp++ = scale_char;
3322 *obufp = '\0';
3323 sprintf (scratchbuf, "%d", 1 << scale);
3324 oappend (scratchbuf);
3325 }
3326 }
3327 if (intel_syntax)
3328 if (mod != 0 || (base & 7) == 5)
3329 {
3330 /* Don't print zero displacements. */
3331 if (disp != 0)
3332 {
3333 if ((bfd_signed_vma) disp > 0)
3334 {
3335 *obufp++ = '+';
3336 *obufp = '\0';
3337 }
3338
3339 print_operand_value (scratchbuf, 0, disp);
3340 oappend (scratchbuf);
3341 }
3342 }
3343
3344 *obufp++ = close_char;
3345 *obufp = '\0';
3346 }
3347 else if (intel_syntax)
3348 {
3349 if (mod != 0 || (base & 7) == 5)
3350 {
3351 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3352 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3353 ;
3354 else
3355 {
3356 oappend (names_seg[ds_reg - es_reg]);
3357 oappend (":");
3358 }
3359 print_operand_value (scratchbuf, 1, disp);
3360 oappend (scratchbuf);
3361 }
3362 }
3363 }
3364 else
3365 { /* 16 bit address mode */
3366 switch (mod)
3367 {
3368 case 0:
3369 if ((rm & 7) == 6)
3370 {
3371 disp = get16 ();
3372 if ((disp & 0x8000) != 0)
3373 disp -= 0x10000;
3374 }
3375 break;
3376 case 1:
3377 FETCH_DATA (the_info, codep + 1);
3378 disp = *codep++;
3379 if ((disp & 0x80) != 0)
3380 disp -= 0x100;
3381 break;
3382 case 2:
3383 disp = get16 ();
3384 if ((disp & 0x8000) != 0)
3385 disp -= 0x10000;
3386 break;
3387 }
3388
3389 if (!intel_syntax)
3390 if (mod != 0 || (rm & 7) == 6)
3391 {
3392 print_operand_value (scratchbuf, 0, disp);
3393 oappend (scratchbuf);
3394 }
3395
3396 if (mod != 0 || (rm & 7) != 6)
3397 {
3398 *obufp++ = open_char;
3399 *obufp = '\0';
3400 oappend (index16[rm + add]);
3401 *obufp++ = close_char;
3402 *obufp = '\0';
3403 }
3404 }
3405 }
3406
3407 static void
3408 OP_G (int bytemode, int sizeflag)
3409 {
3410 int add = 0;
3411 USED_REX (REX_EXTX);
3412 if (rex & REX_EXTX)
3413 add += 8;
3414 switch (bytemode)
3415 {
3416 case b_mode:
3417 USED_REX (0);
3418 if (rex)
3419 oappend (names8rex[reg + add]);
3420 else
3421 oappend (names8[reg + add]);
3422 break;
3423 case w_mode:
3424 oappend (names16[reg + add]);
3425 break;
3426 case d_mode:
3427 oappend (names32[reg + add]);
3428 break;
3429 case q_mode:
3430 oappend (names64[reg + add]);
3431 break;
3432 case v_mode:
3433 case dq_mode:
3434 case dqw_mode:
3435 USED_REX (REX_MODE64);
3436 if (rex & REX_MODE64)
3437 oappend (names64[reg + add]);
3438 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3439 oappend (names32[reg + add]);
3440 else
3441 oappend (names16[reg + add]);
3442 used_prefixes |= (prefixes & PREFIX_DATA);
3443 break;
3444 default:
3445 oappend (INTERNAL_DISASSEMBLER_ERROR);
3446 break;
3447 }
3448 }
3449
3450 static bfd_vma
3451 get64 (void)
3452 {
3453 bfd_vma x;
3454 #ifdef BFD64
3455 unsigned int a;
3456 unsigned int b;
3457
3458 FETCH_DATA (the_info, codep + 8);
3459 a = *codep++ & 0xff;
3460 a |= (*codep++ & 0xff) << 8;
3461 a |= (*codep++ & 0xff) << 16;
3462 a |= (*codep++ & 0xff) << 24;
3463 b = *codep++ & 0xff;
3464 b |= (*codep++ & 0xff) << 8;
3465 b |= (*codep++ & 0xff) << 16;
3466 b |= (*codep++ & 0xff) << 24;
3467 x = a + ((bfd_vma) b << 32);
3468 #else
3469 abort ();
3470 x = 0;
3471 #endif
3472 return x;
3473 }
3474
3475 static bfd_signed_vma
3476 get32 (void)
3477 {
3478 bfd_signed_vma x = 0;
3479
3480 FETCH_DATA (the_info, codep + 4);
3481 x = *codep++ & (bfd_signed_vma) 0xff;
3482 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3483 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3484 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3485 return x;
3486 }
3487
3488 static bfd_signed_vma
3489 get32s (void)
3490 {
3491 bfd_signed_vma x = 0;
3492
3493 FETCH_DATA (the_info, codep + 4);
3494 x = *codep++ & (bfd_signed_vma) 0xff;
3495 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3496 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3497 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3498
3499 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3500
3501 return x;
3502 }
3503
3504 static int
3505 get16 (void)
3506 {
3507 int x = 0;
3508
3509 FETCH_DATA (the_info, codep + 2);
3510 x = *codep++ & 0xff;
3511 x |= (*codep++ & 0xff) << 8;
3512 return x;
3513 }
3514
3515 static void
3516 set_op (bfd_vma op, int riprel)
3517 {
3518 op_index[op_ad] = op_ad;
3519 if (mode_64bit)
3520 {
3521 op_address[op_ad] = op;
3522 op_riprel[op_ad] = riprel;
3523 }
3524 else
3525 {
3526 /* Mask to get a 32-bit address. */
3527 op_address[op_ad] = op & 0xffffffff;
3528 op_riprel[op_ad] = riprel & 0xffffffff;
3529 }
3530 }
3531
3532 static void
3533 OP_REG (int code, int sizeflag)
3534 {
3535 const char *s;
3536 int add = 0;
3537 USED_REX (REX_EXTZ);
3538 if (rex & REX_EXTZ)
3539 add = 8;
3540
3541 switch (code)
3542 {
3543 case indir_dx_reg:
3544 if (intel_syntax)
3545 s = "[dx]";
3546 else
3547 s = "(%dx)";
3548 break;
3549 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3550 case sp_reg: case bp_reg: case si_reg: case di_reg:
3551 s = names16[code - ax_reg + add];
3552 break;
3553 case es_reg: case ss_reg: case cs_reg:
3554 case ds_reg: case fs_reg: case gs_reg:
3555 s = names_seg[code - es_reg + add];
3556 break;
3557 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3558 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3559 USED_REX (0);
3560 if (rex)
3561 s = names8rex[code - al_reg + add];
3562 else
3563 s = names8[code - al_reg];
3564 break;
3565 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3566 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3567 if (mode_64bit)
3568 {
3569 s = names64[code - rAX_reg + add];
3570 break;
3571 }
3572 code += eAX_reg - rAX_reg;
3573 /* Fall through. */
3574 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3575 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3576 USED_REX (REX_MODE64);
3577 if (rex & REX_MODE64)
3578 s = names64[code - eAX_reg + add];
3579 else if (sizeflag & DFLAG)
3580 s = names32[code - eAX_reg + add];
3581 else
3582 s = names16[code - eAX_reg + add];
3583 used_prefixes |= (prefixes & PREFIX_DATA);
3584 break;
3585 default:
3586 s = INTERNAL_DISASSEMBLER_ERROR;
3587 break;
3588 }
3589 oappend (s);
3590 }
3591
3592 static void
3593 OP_IMREG (int code, int sizeflag)
3594 {
3595 const char *s;
3596
3597 switch (code)
3598 {
3599 case indir_dx_reg:
3600 if (intel_syntax)
3601 s = "[dx]";
3602 else
3603 s = "(%dx)";
3604 break;
3605 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3606 case sp_reg: case bp_reg: case si_reg: case di_reg:
3607 s = names16[code - ax_reg];
3608 break;
3609 case es_reg: case ss_reg: case cs_reg:
3610 case ds_reg: case fs_reg: case gs_reg:
3611 s = names_seg[code - es_reg];
3612 break;
3613 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3614 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3615 USED_REX (0);
3616 if (rex)
3617 s = names8rex[code - al_reg];
3618 else
3619 s = names8[code - al_reg];
3620 break;
3621 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3622 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3623 USED_REX (REX_MODE64);
3624 if (rex & REX_MODE64)
3625 s = names64[code - eAX_reg];
3626 else if (sizeflag & DFLAG)
3627 s = names32[code - eAX_reg];
3628 else
3629 s = names16[code - eAX_reg];
3630 used_prefixes |= (prefixes & PREFIX_DATA);
3631 break;
3632 default:
3633 s = INTERNAL_DISASSEMBLER_ERROR;
3634 break;
3635 }
3636 oappend (s);
3637 }
3638
3639 static void
3640 OP_I (int bytemode, int sizeflag)
3641 {
3642 bfd_signed_vma op;
3643 bfd_signed_vma mask = -1;
3644
3645 switch (bytemode)
3646 {
3647 case b_mode:
3648 FETCH_DATA (the_info, codep + 1);
3649 op = *codep++;
3650 mask = 0xff;
3651 break;
3652 case q_mode:
3653 if (mode_64bit)
3654 {
3655 op = get32s ();
3656 break;
3657 }
3658 /* Fall through. */
3659 case v_mode:
3660 USED_REX (REX_MODE64);
3661 if (rex & REX_MODE64)
3662 op = get32s ();
3663 else if (sizeflag & DFLAG)
3664 {
3665 op = get32 ();
3666 mask = 0xffffffff;
3667 }
3668 else
3669 {
3670 op = get16 ();
3671 mask = 0xfffff;
3672 }
3673 used_prefixes |= (prefixes & PREFIX_DATA);
3674 break;
3675 case w_mode:
3676 mask = 0xfffff;
3677 op = get16 ();
3678 break;
3679 case const_1_mode:
3680 if (intel_syntax)
3681 oappend ("1");
3682 return;
3683 default:
3684 oappend (INTERNAL_DISASSEMBLER_ERROR);
3685 return;
3686 }
3687
3688 op &= mask;
3689 scratchbuf[0] = '$';
3690 print_operand_value (scratchbuf + 1, 1, op);
3691 oappend (scratchbuf + intel_syntax);
3692 scratchbuf[0] = '\0';
3693 }
3694
3695 static void
3696 OP_I64 (int bytemode, int sizeflag)
3697 {
3698 bfd_signed_vma op;
3699 bfd_signed_vma mask = -1;
3700
3701 if (!mode_64bit)
3702 {
3703 OP_I (bytemode, sizeflag);
3704 return;
3705 }
3706
3707 switch (bytemode)
3708 {
3709 case b_mode:
3710 FETCH_DATA (the_info, codep + 1);
3711 op = *codep++;
3712 mask = 0xff;
3713 break;
3714 case v_mode:
3715 USED_REX (REX_MODE64);
3716 if (rex & REX_MODE64)
3717 op = get64 ();
3718 else if (sizeflag & DFLAG)
3719 {
3720 op = get32 ();
3721 mask = 0xffffffff;
3722 }
3723 else
3724 {
3725 op = get16 ();
3726 mask = 0xfffff;
3727 }
3728 used_prefixes |= (prefixes & PREFIX_DATA);
3729 break;
3730 case w_mode:
3731 mask = 0xfffff;
3732 op = get16 ();
3733 break;
3734 default:
3735 oappend (INTERNAL_DISASSEMBLER_ERROR);
3736 return;
3737 }
3738
3739 op &= mask;
3740 scratchbuf[0] = '$';
3741 print_operand_value (scratchbuf + 1, 1, op);
3742 oappend (scratchbuf + intel_syntax);
3743 scratchbuf[0] = '\0';
3744 }
3745
3746 static void
3747 OP_sI (int bytemode, int sizeflag)
3748 {
3749 bfd_signed_vma op;
3750 bfd_signed_vma mask = -1;
3751
3752 switch (bytemode)
3753 {
3754 case b_mode:
3755 FETCH_DATA (the_info, codep + 1);
3756 op = *codep++;
3757 if ((op & 0x80) != 0)
3758 op -= 0x100;
3759 mask = 0xffffffff;
3760 break;
3761 case v_mode:
3762 USED_REX (REX_MODE64);
3763 if (rex & REX_MODE64)
3764 op = get32s ();
3765 else if (sizeflag & DFLAG)
3766 {
3767 op = get32s ();
3768 mask = 0xffffffff;
3769 }
3770 else
3771 {
3772 mask = 0xffffffff;
3773 op = get16 ();
3774 if ((op & 0x8000) != 0)
3775 op -= 0x10000;
3776 }
3777 used_prefixes |= (prefixes & PREFIX_DATA);
3778 break;
3779 case w_mode:
3780 op = get16 ();
3781 mask = 0xffffffff;
3782 if ((op & 0x8000) != 0)
3783 op -= 0x10000;
3784 break;
3785 default:
3786 oappend (INTERNAL_DISASSEMBLER_ERROR);
3787 return;
3788 }
3789
3790 scratchbuf[0] = '$';
3791 print_operand_value (scratchbuf + 1, 1, op);
3792 oappend (scratchbuf + intel_syntax);
3793 }
3794
3795 static void
3796 OP_J (int bytemode, int sizeflag)
3797 {
3798 bfd_vma disp;
3799 bfd_vma mask = -1;
3800
3801 switch (bytemode)
3802 {
3803 case b_mode:
3804 FETCH_DATA (the_info, codep + 1);
3805 disp = *codep++;
3806 if ((disp & 0x80) != 0)
3807 disp -= 0x100;
3808 break;
3809 case v_mode:
3810 if (sizeflag & DFLAG)
3811 disp = get32s ();
3812 else
3813 {
3814 disp = get16 ();
3815 /* For some reason, a data16 prefix on a jump instruction
3816 means that the pc is masked to 16 bits after the
3817 displacement is added! */
3818 mask = 0xffff;
3819 }
3820 break;
3821 default:
3822 oappend (INTERNAL_DISASSEMBLER_ERROR);
3823 return;
3824 }
3825 disp = (start_pc + codep - start_codep + disp) & mask;
3826 set_op (disp, 0);
3827 print_operand_value (scratchbuf, 1, disp);
3828 oappend (scratchbuf);
3829 }
3830
3831 static void
3832 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3833 {
3834 oappend (names_seg[reg]);
3835 }
3836
3837 static void
3838 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3839 {
3840 int seg, offset;
3841
3842 if (sizeflag & DFLAG)
3843 {
3844 offset = get32 ();
3845 seg = get16 ();
3846 }
3847 else
3848 {
3849 offset = get16 ();
3850 seg = get16 ();
3851 }
3852 used_prefixes |= (prefixes & PREFIX_DATA);
3853 if (intel_syntax)
3854 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3855 else
3856 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3857 oappend (scratchbuf);
3858 }
3859
3860 static void
3861 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3862 {
3863 bfd_vma off;
3864
3865 append_seg ();
3866
3867 if ((sizeflag & AFLAG) || mode_64bit)
3868 off = get32 ();
3869 else
3870 off = get16 ();
3871
3872 if (intel_syntax)
3873 {
3874 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3875 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3876 {
3877 oappend (names_seg[ds_reg - es_reg]);
3878 oappend (":");
3879 }
3880 }
3881 print_operand_value (scratchbuf, 1, off);
3882 oappend (scratchbuf);
3883 }
3884
3885 static void
3886 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3887 {
3888 bfd_vma off;
3889
3890 if (!mode_64bit)
3891 {
3892 OP_OFF (bytemode, sizeflag);
3893 return;
3894 }
3895
3896 append_seg ();
3897
3898 off = get64 ();
3899
3900 if (intel_syntax)
3901 {
3902 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3903 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3904 {
3905 oappend (names_seg[ds_reg - es_reg]);
3906 oappend (":");
3907 }
3908 }
3909 print_operand_value (scratchbuf, 1, off);
3910 oappend (scratchbuf);
3911 }
3912
3913 static void
3914 ptr_reg (int code, int sizeflag)
3915 {
3916 const char *s;
3917
3918 *obufp++ = open_char;
3919 used_prefixes |= (prefixes & PREFIX_ADDR);
3920 if (mode_64bit)
3921 {
3922 if (!(sizeflag & AFLAG))
3923 s = names32[code - eAX_reg];
3924 else
3925 s = names64[code - eAX_reg];
3926 }
3927 else if (sizeflag & AFLAG)
3928 s = names32[code - eAX_reg];
3929 else
3930 s = names16[code - eAX_reg];
3931 oappend (s);
3932 *obufp++ = close_char;
3933 *obufp = 0;
3934 }
3935
3936 static void
3937 OP_ESreg (int code, int sizeflag)
3938 {
3939 if (intel_syntax)
3940 {
3941 if (codep[-1] & 1)
3942 {
3943 USED_REX (REX_MODE64);
3944 used_prefixes |= (prefixes & PREFIX_DATA);
3945 if (rex & REX_MODE64)
3946 oappend ("QWORD PTR ");
3947 else if ((sizeflag & DFLAG))
3948 oappend ("DWORD PTR ");
3949 else
3950 oappend ("WORD PTR ");
3951 }
3952 else
3953 oappend ("BYTE PTR ");
3954 }
3955
3956 oappend ("%es:" + intel_syntax);
3957 ptr_reg (code, sizeflag);
3958 }
3959
3960 static void
3961 OP_DSreg (int code, int sizeflag)
3962 {
3963 if (intel_syntax)
3964 {
3965 if (codep[-1] != 0xd7 && (codep[-1] & 1))
3966 {
3967 USED_REX (REX_MODE64);
3968 used_prefixes |= (prefixes & PREFIX_DATA);
3969 if (rex & REX_MODE64)
3970 oappend ("QWORD PTR ");
3971 else if ((sizeflag & DFLAG))
3972 oappend ("DWORD PTR ");
3973 else
3974 oappend ("WORD PTR ");
3975 }
3976 else
3977 oappend ("BYTE PTR ");
3978 }
3979
3980 if ((prefixes
3981 & (PREFIX_CS
3982 | PREFIX_DS
3983 | PREFIX_SS
3984 | PREFIX_ES
3985 | PREFIX_FS
3986 | PREFIX_GS)) == 0)
3987 prefixes |= PREFIX_DS;
3988 append_seg ();
3989 ptr_reg (code, sizeflag);
3990 }
3991
3992 static void
3993 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3994 {
3995 int add = 0;
3996 USED_REX (REX_EXTX);
3997 if (rex & REX_EXTX)
3998 add = 8;
3999 sprintf (scratchbuf, "%%cr%d", reg + add);
4000 oappend (scratchbuf + intel_syntax);
4001 }
4002
4003 static void
4004 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4005 {
4006 int add = 0;
4007 USED_REX (REX_EXTX);
4008 if (rex & REX_EXTX)
4009 add = 8;
4010 if (intel_syntax)
4011 sprintf (scratchbuf, "db%d", reg + add);
4012 else
4013 sprintf (scratchbuf, "%%db%d", reg + add);
4014 oappend (scratchbuf);
4015 }
4016
4017 static void
4018 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4019 {
4020 sprintf (scratchbuf, "%%tr%d", reg);
4021 oappend (scratchbuf + intel_syntax);
4022 }
4023
4024 static void
4025 OP_Rd (int bytemode, int sizeflag)
4026 {
4027 if (mod == 3)
4028 OP_E (bytemode, sizeflag);
4029 else
4030 BadOp ();
4031 }
4032
4033 static void
4034 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4035 {
4036 used_prefixes |= (prefixes & PREFIX_DATA);
4037 if (prefixes & PREFIX_DATA)
4038 {
4039 int add = 0;
4040 USED_REX (REX_EXTX);
4041 if (rex & REX_EXTX)
4042 add = 8;
4043 sprintf (scratchbuf, "%%xmm%d", reg + add);
4044 }
4045 else
4046 sprintf (scratchbuf, "%%mm%d", reg);
4047 oappend (scratchbuf + intel_syntax);
4048 }
4049
4050 static void
4051 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4052 {
4053 int add = 0;
4054 USED_REX (REX_EXTX);
4055 if (rex & REX_EXTX)
4056 add = 8;
4057 sprintf (scratchbuf, "%%xmm%d", reg + add);
4058 oappend (scratchbuf + intel_syntax);
4059 }
4060
4061 static void
4062 OP_EM (int bytemode, int sizeflag)
4063 {
4064 if (mod != 3)
4065 {
4066 if (intel_syntax && bytemode == v_mode)
4067 {
4068 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4069 used_prefixes |= (prefixes & PREFIX_DATA);
4070 }
4071 OP_E (bytemode, sizeflag);
4072 return;
4073 }
4074
4075 /* Skip mod/rm byte. */
4076 MODRM_CHECK;
4077 codep++;
4078 used_prefixes |= (prefixes & PREFIX_DATA);
4079 if (prefixes & PREFIX_DATA)
4080 {
4081 int add = 0;
4082
4083 USED_REX (REX_EXTZ);
4084 if (rex & REX_EXTZ)
4085 add = 8;
4086 sprintf (scratchbuf, "%%xmm%d", rm + add);
4087 }
4088 else
4089 sprintf (scratchbuf, "%%mm%d", rm);
4090 oappend (scratchbuf + intel_syntax);
4091 }
4092
4093 static void
4094 OP_EX (int bytemode, int sizeflag)
4095 {
4096 int add = 0;
4097 if (mod != 3)
4098 {
4099 if (intel_syntax && bytemode == v_mode)
4100 {
4101 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4102 {
4103 case 0: bytemode = x_mode; break;
4104 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4105 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4106 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4107 default: bytemode = 0; break;
4108 }
4109 }
4110 OP_E (bytemode, sizeflag);
4111 return;
4112 }
4113 USED_REX (REX_EXTZ);
4114 if (rex & REX_EXTZ)
4115 add = 8;
4116
4117 /* Skip mod/rm byte. */
4118 MODRM_CHECK;
4119 codep++;
4120 sprintf (scratchbuf, "%%xmm%d", rm + add);
4121 oappend (scratchbuf + intel_syntax);
4122 }
4123
4124 static void
4125 OP_MS (int bytemode, int sizeflag)
4126 {
4127 if (mod == 3)
4128 OP_EM (bytemode, sizeflag);
4129 else
4130 BadOp ();
4131 }
4132
4133 static void
4134 OP_XS (int bytemode, int sizeflag)
4135 {
4136 if (mod == 3)
4137 OP_EX (bytemode, sizeflag);
4138 else
4139 BadOp ();
4140 }
4141
4142 static void
4143 OP_M (int bytemode, int sizeflag)
4144 {
4145 if (mod == 3)
4146 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4147 else
4148 OP_E (bytemode, sizeflag);
4149 }
4150
4151 static void
4152 OP_0f07 (int bytemode, int sizeflag)
4153 {
4154 if (mod != 3 || rm != 0)
4155 BadOp ();
4156 else
4157 OP_E (bytemode, sizeflag);
4158 }
4159
4160 static void
4161 OP_0fae (int bytemode, int sizeflag)
4162 {
4163 if (mod == 3)
4164 {
4165 if (reg == 7)
4166 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4167
4168 if (reg < 5 || rm != 0)
4169 {
4170 BadOp (); /* bad sfence, mfence, or lfence */
4171 return;
4172 }
4173 }
4174 else if (reg != 7)
4175 {
4176 BadOp (); /* bad clflush */
4177 return;
4178 }
4179
4180 OP_E (bytemode, sizeflag);
4181 }
4182
4183 static void
4184 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4185 {
4186 /* NOP with REPZ prefix is called PAUSE. */
4187 if (prefixes == PREFIX_REPZ)
4188 strcpy (obuf, "pause");
4189 }
4190
4191 static const char *const Suffix3DNow[] = {
4192 /* 00 */ NULL, NULL, NULL, NULL,
4193 /* 04 */ NULL, NULL, NULL, NULL,
4194 /* 08 */ NULL, NULL, NULL, NULL,
4195 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4196 /* 10 */ NULL, NULL, NULL, NULL,
4197 /* 14 */ NULL, NULL, NULL, NULL,
4198 /* 18 */ NULL, NULL, NULL, NULL,
4199 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4200 /* 20 */ NULL, NULL, NULL, NULL,
4201 /* 24 */ NULL, NULL, NULL, NULL,
4202 /* 28 */ NULL, NULL, NULL, NULL,
4203 /* 2C */ NULL, NULL, NULL, NULL,
4204 /* 30 */ NULL, NULL, NULL, NULL,
4205 /* 34 */ NULL, NULL, NULL, NULL,
4206 /* 38 */ NULL, NULL, NULL, NULL,
4207 /* 3C */ NULL, NULL, NULL, NULL,
4208 /* 40 */ NULL, NULL, NULL, NULL,
4209 /* 44 */ NULL, NULL, NULL, NULL,
4210 /* 48 */ NULL, NULL, NULL, NULL,
4211 /* 4C */ NULL, NULL, NULL, NULL,
4212 /* 50 */ NULL, NULL, NULL, NULL,
4213 /* 54 */ NULL, NULL, NULL, NULL,
4214 /* 58 */ NULL, NULL, NULL, NULL,
4215 /* 5C */ NULL, NULL, NULL, NULL,
4216 /* 60 */ NULL, NULL, NULL, NULL,
4217 /* 64 */ NULL, NULL, NULL, NULL,
4218 /* 68 */ NULL, NULL, NULL, NULL,
4219 /* 6C */ NULL, NULL, NULL, NULL,
4220 /* 70 */ NULL, NULL, NULL, NULL,
4221 /* 74 */ NULL, NULL, NULL, NULL,
4222 /* 78 */ NULL, NULL, NULL, NULL,
4223 /* 7C */ NULL, NULL, NULL, NULL,
4224 /* 80 */ NULL, NULL, NULL, NULL,
4225 /* 84 */ NULL, NULL, NULL, NULL,
4226 /* 88 */ NULL, NULL, "pfnacc", NULL,
4227 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4228 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4229 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4230 /* 98 */ NULL, NULL, "pfsub", NULL,
4231 /* 9C */ NULL, NULL, "pfadd", NULL,
4232 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4233 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4234 /* A8 */ NULL, NULL, "pfsubr", NULL,
4235 /* AC */ NULL, NULL, "pfacc", NULL,
4236 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4237 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4238 /* B8 */ NULL, NULL, NULL, "pswapd",
4239 /* BC */ NULL, NULL, NULL, "pavgusb",
4240 /* C0 */ NULL, NULL, NULL, NULL,
4241 /* C4 */ NULL, NULL, NULL, NULL,
4242 /* C8 */ NULL, NULL, NULL, NULL,
4243 /* CC */ NULL, NULL, NULL, NULL,
4244 /* D0 */ NULL, NULL, NULL, NULL,
4245 /* D4 */ NULL, NULL, NULL, NULL,
4246 /* D8 */ NULL, NULL, NULL, NULL,
4247 /* DC */ NULL, NULL, NULL, NULL,
4248 /* E0 */ NULL, NULL, NULL, NULL,
4249 /* E4 */ NULL, NULL, NULL, NULL,
4250 /* E8 */ NULL, NULL, NULL, NULL,
4251 /* EC */ NULL, NULL, NULL, NULL,
4252 /* F0 */ NULL, NULL, NULL, NULL,
4253 /* F4 */ NULL, NULL, NULL, NULL,
4254 /* F8 */ NULL, NULL, NULL, NULL,
4255 /* FC */ NULL, NULL, NULL, NULL,
4256 };
4257
4258 static void
4259 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4260 {
4261 const char *mnemonic;
4262
4263 FETCH_DATA (the_info, codep + 1);
4264 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4265 place where an 8-bit immediate would normally go. ie. the last
4266 byte of the instruction. */
4267 obufp = obuf + strlen (obuf);
4268 mnemonic = Suffix3DNow[*codep++ & 0xff];
4269 if (mnemonic)
4270 oappend (mnemonic);
4271 else
4272 {
4273 /* Since a variable sized modrm/sib chunk is between the start
4274 of the opcode (0x0f0f) and the opcode suffix, we need to do
4275 all the modrm processing first, and don't know until now that
4276 we have a bad opcode. This necessitates some cleaning up. */
4277 op1out[0] = '\0';
4278 op2out[0] = '\0';
4279 BadOp ();
4280 }
4281 }
4282
4283 static const char *simd_cmp_op[] = {
4284 "eq",
4285 "lt",
4286 "le",
4287 "unord",
4288 "neq",
4289 "nlt",
4290 "nle",
4291 "ord"
4292 };
4293
4294 static void
4295 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4296 {
4297 unsigned int cmp_type;
4298
4299 FETCH_DATA (the_info, codep + 1);
4300 obufp = obuf + strlen (obuf);
4301 cmp_type = *codep++ & 0xff;
4302 if (cmp_type < 8)
4303 {
4304 char suffix1 = 'p', suffix2 = 's';
4305 used_prefixes |= (prefixes & PREFIX_REPZ);
4306 if (prefixes & PREFIX_REPZ)
4307 suffix1 = 's';
4308 else
4309 {
4310 used_prefixes |= (prefixes & PREFIX_DATA);
4311 if (prefixes & PREFIX_DATA)
4312 suffix2 = 'd';
4313 else
4314 {
4315 used_prefixes |= (prefixes & PREFIX_REPNZ);
4316 if (prefixes & PREFIX_REPNZ)
4317 suffix1 = 's', suffix2 = 'd';
4318 }
4319 }
4320 sprintf (scratchbuf, "cmp%s%c%c",
4321 simd_cmp_op[cmp_type], suffix1, suffix2);
4322 used_prefixes |= (prefixes & PREFIX_REPZ);
4323 oappend (scratchbuf);
4324 }
4325 else
4326 {
4327 /* We have a bad extension byte. Clean up. */
4328 op1out[0] = '\0';
4329 op2out[0] = '\0';
4330 BadOp ();
4331 }
4332 }
4333
4334 static void
4335 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4336 {
4337 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4338 forms of these instructions. */
4339 if (mod == 3)
4340 {
4341 char *p = obuf + strlen (obuf);
4342 *(p + 1) = '\0';
4343 *p = *(p - 1);
4344 *(p - 1) = *(p - 2);
4345 *(p - 2) = *(p - 3);
4346 *(p - 3) = extrachar;
4347 }
4348 }
4349
4350 static void
4351 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4352 {
4353 if (mod == 3 && reg == 1 && rm <= 1)
4354 {
4355 /* Override "sidt". */
4356 char *p = obuf + strlen (obuf) - 4;
4357
4358 /* We might have a suffix. */
4359 if (*p == 'i')
4360 --p;
4361
4362 if (rm)
4363 {
4364 /* mwait %eax,%ecx */
4365 strcpy (p, "mwait");
4366 }
4367 else
4368 {
4369 /* monitor %eax,%ecx,%edx" */
4370 strcpy (p, "monitor");
4371 strcpy (op3out, names32[2]);
4372 }
4373 strcpy (op1out, names32[0]);
4374 strcpy (op2out, names32[1]);
4375 two_source_ops = 1;
4376
4377 codep++;
4378 }
4379 else
4380 OP_E (0, sizeflag);
4381 }
4382
4383 static void
4384 INVLPG_Fixup (int bytemode, int sizeflag)
4385 {
4386 if (*codep == 0xf8)
4387 {
4388 char *p = obuf + strlen (obuf);
4389
4390 /* Override "invlpg". */
4391 strcpy (p - 6, "swapgs");
4392 codep++;
4393 }
4394 else
4395 OP_E (bytemode, sizeflag);
4396 }
4397
4398 static void
4399 BadOp (void)
4400 {
4401 /* Throw away prefixes and 1st. opcode byte. */
4402 codep = insn_codep + 1;
4403 oappend ("(bad)");
4404 }
GDB Binutils - Deliverables
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