1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
48 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma
, disassemble_info
*);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma
);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma
get64 (void);
63 static bfd_signed_vma
get32 (void);
64 static bfd_signed_vma
get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma
, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_VMX (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void SVME_Fixup (int, int);
100 static void INVLPG_Fixup (int, int);
101 static void BadOp (void);
102 static void SEG_Fixup (int, int);
103 static void VMX_Fixup (int, int);
106 /* Points to first byte not fetched. */
107 bfd_byte
*max_fetched
;
108 bfd_byte the_buffer
[MAXLEN
];
114 /* The opcode for the fwait instruction, which we treat as a prefix
116 #define FWAIT_OPCODE (0x9b)
125 enum address_mode address_mode
;
127 /* Flags for the prefixes for the current instruction. See below. */
130 /* REX prefix the current instruction. See below. */
132 /* Bits of REX we've already used. */
138 /* Mark parts used in the REX prefix. When we are testing for
139 empty prefix (for 8bit register REX extension), just mask it
140 out. Otherwise test for REX bit is excuse for existence of REX
141 only in case value is nonzero. */
142 #define USED_REX(value) \
145 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
150 /* Flags for prefixes which we somehow handled when printing the
151 current instruction. */
152 static int used_prefixes
;
154 /* Flags stored in PREFIXES. */
155 #define PREFIX_REPZ 1
156 #define PREFIX_REPNZ 2
157 #define PREFIX_LOCK 4
159 #define PREFIX_SS 0x10
160 #define PREFIX_DS 0x20
161 #define PREFIX_ES 0x40
162 #define PREFIX_FS 0x80
163 #define PREFIX_GS 0x100
164 #define PREFIX_DATA 0x200
165 #define PREFIX_ADDR 0x400
166 #define PREFIX_FWAIT 0x800
168 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
169 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
171 #define FETCH_DATA(info, addr) \
172 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
173 ? 1 : fetch_data ((info), (addr)))
176 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
179 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
180 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
182 status
= (*info
->read_memory_func
) (start
,
184 addr
- priv
->max_fetched
,
188 /* If we did manage to read at least one byte, then
189 print_insn_i386 will do something sensible. Otherwise, print
190 an error. We do that here because this is where we know
192 if (priv
->max_fetched
== priv
->the_buffer
)
193 (*info
->memory_error_func
) (status
, start
, info
);
194 longjmp (priv
->bailout
, 1);
197 priv
->max_fetched
= addr
;
203 #define Eb OP_E, b_mode
204 #define Ev OP_E, v_mode
205 #define Ed OP_E, d_mode
206 #define Eq OP_E, q_mode
207 #define Edq OP_E, dq_mode
208 #define Edqw OP_E, dqw_mode
209 #define indirEv OP_indirE, stack_v_mode
210 #define indirEp OP_indirE, f_mode
211 #define stackEv OP_E, stack_v_mode
212 #define Em OP_E, m_mode
213 #define Ew OP_E, w_mode
214 #define Ma OP_E, v_mode
215 #define M OP_M, 0 /* lea, lgdt, etc. */
216 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
217 #define Gb OP_G, b_mode
218 #define Gv OP_G, v_mode
219 #define Gd OP_G, d_mode
220 #define Gdq OP_G, dq_mode
221 #define Gm OP_G, m_mode
222 #define Gw OP_G, w_mode
223 #define Rd OP_Rd, d_mode
224 #define Rm OP_Rd, m_mode
225 #define Ib OP_I, b_mode
226 #define sIb OP_sI, b_mode /* sign extened byte */
227 #define Iv OP_I, v_mode
228 #define Iq OP_I, q_mode
229 #define Iv64 OP_I64, v_mode
230 #define Iw OP_I, w_mode
231 #define I1 OP_I, const_1_mode
232 #define Jb OP_J, b_mode
233 #define Jv OP_J, v_mode
234 #define Cm OP_C, m_mode
235 #define Dm OP_D, m_mode
236 #define Td OP_T, d_mode
237 #define Sv SEG_Fixup, v_mode
239 #define RMeAX OP_REG, eAX_reg
240 #define RMeBX OP_REG, eBX_reg
241 #define RMeCX OP_REG, eCX_reg
242 #define RMeDX OP_REG, eDX_reg
243 #define RMeSP OP_REG, eSP_reg
244 #define RMeBP OP_REG, eBP_reg
245 #define RMeSI OP_REG, eSI_reg
246 #define RMeDI OP_REG, eDI_reg
247 #define RMrAX OP_REG, rAX_reg
248 #define RMrBX OP_REG, rBX_reg
249 #define RMrCX OP_REG, rCX_reg
250 #define RMrDX OP_REG, rDX_reg
251 #define RMrSP OP_REG, rSP_reg
252 #define RMrBP OP_REG, rBP_reg
253 #define RMrSI OP_REG, rSI_reg
254 #define RMrDI OP_REG, rDI_reg
255 #define RMAL OP_REG, al_reg
256 #define RMAL OP_REG, al_reg
257 #define RMCL OP_REG, cl_reg
258 #define RMDL OP_REG, dl_reg
259 #define RMBL OP_REG, bl_reg
260 #define RMAH OP_REG, ah_reg
261 #define RMCH OP_REG, ch_reg
262 #define RMDH OP_REG, dh_reg
263 #define RMBH OP_REG, bh_reg
264 #define RMAX OP_REG, ax_reg
265 #define RMDX OP_REG, dx_reg
267 #define eAX OP_IMREG, eAX_reg
268 #define eBX OP_IMREG, eBX_reg
269 #define eCX OP_IMREG, eCX_reg
270 #define eDX OP_IMREG, eDX_reg
271 #define eSP OP_IMREG, eSP_reg
272 #define eBP OP_IMREG, eBP_reg
273 #define eSI OP_IMREG, eSI_reg
274 #define eDI OP_IMREG, eDI_reg
275 #define AL OP_IMREG, al_reg
276 #define AL OP_IMREG, al_reg
277 #define CL OP_IMREG, cl_reg
278 #define DL OP_IMREG, dl_reg
279 #define BL OP_IMREG, bl_reg
280 #define AH OP_IMREG, ah_reg
281 #define CH OP_IMREG, ch_reg
282 #define DH OP_IMREG, dh_reg
283 #define BH OP_IMREG, bh_reg
284 #define AX OP_IMREG, ax_reg
285 #define DX OP_IMREG, dx_reg
286 #define indirDX OP_IMREG, indir_dx_reg
288 #define Sw OP_SEG, w_mode
290 #define Ob OP_OFF64, b_mode
291 #define Ov OP_OFF64, v_mode
292 #define Xb OP_DSreg, eSI_reg
293 #define Xv OP_DSreg, eSI_reg
294 #define Yb OP_ESreg, eDI_reg
295 #define Yv OP_ESreg, eDI_reg
296 #define DSBX OP_DSreg, eBX_reg
298 #define es OP_REG, es_reg
299 #define ss OP_REG, ss_reg
300 #define cs OP_REG, cs_reg
301 #define ds OP_REG, ds_reg
302 #define fs OP_REG, fs_reg
303 #define gs OP_REG, gs_reg
307 #define EM OP_EM, v_mode
308 #define EX OP_EX, v_mode
309 #define MS OP_MS, v_mode
310 #define XS OP_XS, v_mode
311 #define VM OP_VMX, q_mode
312 #define OPSUF OP_3DNowSuffix, 0
313 #define OPSIMD OP_SIMD_Suffix, 0
315 #define cond_jump_flag NULL, cond_jump_mode
316 #define loop_jcxz_flag NULL, loop_jcxz_mode
318 /* bits in sizeflag */
319 #define SUFFIX_ALWAYS 4
323 #define b_mode 1 /* byte operand */
324 #define v_mode 2 /* operand size depends on prefixes */
325 #define w_mode 3 /* word operand */
326 #define d_mode 4 /* double word operand */
327 #define q_mode 5 /* quad word operand */
328 #define t_mode 6 /* ten-byte operand */
329 #define x_mode 7 /* 16-byte XMM operand */
330 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
331 #define cond_jump_mode 9
332 #define loop_jcxz_mode 10
333 #define dq_mode 11 /* operand size depends on REX prefixes. */
334 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
335 #define f_mode 13 /* 4- or 6-byte pointer operand */
336 #define const_1_mode 14
337 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
382 #define indir_dx_reg 150
386 #define USE_PREFIX_USER_TABLE 3
387 #define X86_64_SPECIAL 4
389 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
391 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
392 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
393 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
394 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
395 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
396 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
397 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
398 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
399 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
400 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
401 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
402 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
403 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
404 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
405 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
406 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
407 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
408 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
409 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
410 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
411 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
412 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
413 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
414 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
415 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
417 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
418 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
419 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
420 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
421 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
422 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
423 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
424 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
425 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
426 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
427 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
428 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
429 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
430 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
431 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
432 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
433 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
434 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
435 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
436 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
437 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
438 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
439 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
440 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
441 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
442 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
443 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
444 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
445 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
446 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
447 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
448 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
449 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
451 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
453 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
465 /* Upper case letters in the instruction names here are macros.
466 'A' => print 'b' if no register operands or suffix_always is true
467 'B' => print 'b' if suffix_always is true
468 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
470 'E' => print 'e' if 32-bit form of jcxz
471 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
472 'H' => print ",pt" or ",pn" branch hint
473 'I' => honor following macro letter even in Intel mode (implemented only
474 . for some of the macro letters)
476 'L' => print 'l' if suffix_always is true
477 'N' => print 'n' if instruction has no wait "prefix"
478 'O' => print 'd', or 'o'
479 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
480 . or suffix_always is true. print 'q' if rex prefix is present.
481 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
483 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
484 'S' => print 'w', 'l' or 'q' if suffix_always is true
485 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
486 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
487 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
488 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
489 'X' => print 's', 'd' depending on data16 prefix (for XMM)
490 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
492 Many of the above letters print nothing in Intel mode. See "putop"
495 Braces '{' and '}', and vertical bars '|', indicate alternative
496 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
497 modes. In cases where there are only two alternatives, the X86_64
498 instruction is reserved, and "(bad)" is printed.
501 static const struct dis386 dis386
[] = {
503 { "addB", Eb
, Gb
, XX
},
504 { "addS", Ev
, Gv
, XX
},
505 { "addB", Gb
, Eb
, XX
},
506 { "addS", Gv
, Ev
, XX
},
507 { "addB", AL
, Ib
, XX
},
508 { "addS", eAX
, Iv
, XX
},
509 { "push{T|}", es
, XX
, XX
},
510 { "pop{T|}", es
, XX
, XX
},
512 { "orB", Eb
, Gb
, XX
},
513 { "orS", Ev
, Gv
, XX
},
514 { "orB", Gb
, Eb
, XX
},
515 { "orS", Gv
, Ev
, XX
},
516 { "orB", AL
, Ib
, XX
},
517 { "orS", eAX
, Iv
, XX
},
518 { "push{T|}", cs
, XX
, XX
},
519 { "(bad)", XX
, XX
, XX
}, /* 0x0f extended opcode escape */
521 { "adcB", Eb
, Gb
, XX
},
522 { "adcS", Ev
, Gv
, XX
},
523 { "adcB", Gb
, Eb
, XX
},
524 { "adcS", Gv
, Ev
, XX
},
525 { "adcB", AL
, Ib
, XX
},
526 { "adcS", eAX
, Iv
, XX
},
527 { "push{T|}", ss
, XX
, XX
},
528 { "pop{T|}", ss
, XX
, XX
},
530 { "sbbB", Eb
, Gb
, XX
},
531 { "sbbS", Ev
, Gv
, XX
},
532 { "sbbB", Gb
, Eb
, XX
},
533 { "sbbS", Gv
, Ev
, XX
},
534 { "sbbB", AL
, Ib
, XX
},
535 { "sbbS", eAX
, Iv
, XX
},
536 { "push{T|}", ds
, XX
, XX
},
537 { "pop{T|}", ds
, XX
, XX
},
539 { "andB", Eb
, Gb
, XX
},
540 { "andS", Ev
, Gv
, XX
},
541 { "andB", Gb
, Eb
, XX
},
542 { "andS", Gv
, Ev
, XX
},
543 { "andB", AL
, Ib
, XX
},
544 { "andS", eAX
, Iv
, XX
},
545 { "(bad)", XX
, XX
, XX
}, /* SEG ES prefix */
546 { "daa{|}", XX
, XX
, XX
},
548 { "subB", Eb
, Gb
, XX
},
549 { "subS", Ev
, Gv
, XX
},
550 { "subB", Gb
, Eb
, XX
},
551 { "subS", Gv
, Ev
, XX
},
552 { "subB", AL
, Ib
, XX
},
553 { "subS", eAX
, Iv
, XX
},
554 { "(bad)", XX
, XX
, XX
}, /* SEG CS prefix */
555 { "das{|}", XX
, XX
, XX
},
557 { "xorB", Eb
, Gb
, XX
},
558 { "xorS", Ev
, Gv
, XX
},
559 { "xorB", Gb
, Eb
, XX
},
560 { "xorS", Gv
, Ev
, XX
},
561 { "xorB", AL
, Ib
, XX
},
562 { "xorS", eAX
, Iv
, XX
},
563 { "(bad)", XX
, XX
, XX
}, /* SEG SS prefix */
564 { "aaa{|}", XX
, XX
, XX
},
566 { "cmpB", Eb
, Gb
, XX
},
567 { "cmpS", Ev
, Gv
, XX
},
568 { "cmpB", Gb
, Eb
, XX
},
569 { "cmpS", Gv
, Ev
, XX
},
570 { "cmpB", AL
, Ib
, XX
},
571 { "cmpS", eAX
, Iv
, XX
},
572 { "(bad)", XX
, XX
, XX
}, /* SEG DS prefix */
573 { "aas{|}", XX
, XX
, XX
},
575 { "inc{S|}", RMeAX
, XX
, XX
},
576 { "inc{S|}", RMeCX
, XX
, XX
},
577 { "inc{S|}", RMeDX
, XX
, XX
},
578 { "inc{S|}", RMeBX
, XX
, XX
},
579 { "inc{S|}", RMeSP
, XX
, XX
},
580 { "inc{S|}", RMeBP
, XX
, XX
},
581 { "inc{S|}", RMeSI
, XX
, XX
},
582 { "inc{S|}", RMeDI
, XX
, XX
},
584 { "dec{S|}", RMeAX
, XX
, XX
},
585 { "dec{S|}", RMeCX
, XX
, XX
},
586 { "dec{S|}", RMeDX
, XX
, XX
},
587 { "dec{S|}", RMeBX
, XX
, XX
},
588 { "dec{S|}", RMeSP
, XX
, XX
},
589 { "dec{S|}", RMeBP
, XX
, XX
},
590 { "dec{S|}", RMeSI
, XX
, XX
},
591 { "dec{S|}", RMeDI
, XX
, XX
},
593 { "pushV", RMrAX
, XX
, XX
},
594 { "pushV", RMrCX
, XX
, XX
},
595 { "pushV", RMrDX
, XX
, XX
},
596 { "pushV", RMrBX
, XX
, XX
},
597 { "pushV", RMrSP
, XX
, XX
},
598 { "pushV", RMrBP
, XX
, XX
},
599 { "pushV", RMrSI
, XX
, XX
},
600 { "pushV", RMrDI
, XX
, XX
},
602 { "popV", RMrAX
, XX
, XX
},
603 { "popV", RMrCX
, XX
, XX
},
604 { "popV", RMrDX
, XX
, XX
},
605 { "popV", RMrBX
, XX
, XX
},
606 { "popV", RMrSP
, XX
, XX
},
607 { "popV", RMrBP
, XX
, XX
},
608 { "popV", RMrSI
, XX
, XX
},
609 { "popV", RMrDI
, XX
, XX
},
611 { "pusha{P|}", XX
, XX
, XX
},
612 { "popa{P|}", XX
, XX
, XX
},
613 { "bound{S|}", Gv
, Ma
, XX
},
615 { "(bad)", XX
, XX
, XX
}, /* seg fs */
616 { "(bad)", XX
, XX
, XX
}, /* seg gs */
617 { "(bad)", XX
, XX
, XX
}, /* op size prefix */
618 { "(bad)", XX
, XX
, XX
}, /* adr size prefix */
620 { "pushT", Iq
, XX
, XX
},
621 { "imulS", Gv
, Ev
, Iv
},
622 { "pushT", sIb
, XX
, XX
},
623 { "imulS", Gv
, Ev
, sIb
},
624 { "ins{b||b|}", Yb
, indirDX
, XX
},
625 { "ins{R||R|}", Yv
, indirDX
, XX
},
626 { "outs{b||b|}", indirDX
, Xb
, XX
},
627 { "outs{R||R|}", indirDX
, Xv
, XX
},
629 { "joH", Jb
, XX
, cond_jump_flag
},
630 { "jnoH", Jb
, XX
, cond_jump_flag
},
631 { "jbH", Jb
, XX
, cond_jump_flag
},
632 { "jaeH", Jb
, XX
, cond_jump_flag
},
633 { "jeH", Jb
, XX
, cond_jump_flag
},
634 { "jneH", Jb
, XX
, cond_jump_flag
},
635 { "jbeH", Jb
, XX
, cond_jump_flag
},
636 { "jaH", Jb
, XX
, cond_jump_flag
},
638 { "jsH", Jb
, XX
, cond_jump_flag
},
639 { "jnsH", Jb
, XX
, cond_jump_flag
},
640 { "jpH", Jb
, XX
, cond_jump_flag
},
641 { "jnpH", Jb
, XX
, cond_jump_flag
},
642 { "jlH", Jb
, XX
, cond_jump_flag
},
643 { "jgeH", Jb
, XX
, cond_jump_flag
},
644 { "jleH", Jb
, XX
, cond_jump_flag
},
645 { "jgH", Jb
, XX
, cond_jump_flag
},
649 { "(bad)", XX
, XX
, XX
},
651 { "testB", Eb
, Gb
, XX
},
652 { "testS", Ev
, Gv
, XX
},
653 { "xchgB", Eb
, Gb
, XX
},
654 { "xchgS", Ev
, Gv
, XX
},
656 { "movB", Eb
, Gb
, XX
},
657 { "movS", Ev
, Gv
, XX
},
658 { "movB", Gb
, Eb
, XX
},
659 { "movS", Gv
, Ev
, XX
},
660 { "movQ", Sv
, Sw
, XX
},
661 { "leaS", Gv
, M
, XX
},
662 { "movQ", Sw
, Sv
, XX
},
663 { "popU", stackEv
, XX
, XX
},
665 { "nop", NOP_Fixup
, 0, XX
, XX
},
666 { "xchgS", RMeCX
, eAX
, XX
},
667 { "xchgS", RMeDX
, eAX
, XX
},
668 { "xchgS", RMeBX
, eAX
, XX
},
669 { "xchgS", RMeSP
, eAX
, XX
},
670 { "xchgS", RMeBP
, eAX
, XX
},
671 { "xchgS", RMeSI
, eAX
, XX
},
672 { "xchgS", RMeDI
, eAX
, XX
},
674 { "cW{tR||tR|}", XX
, XX
, XX
},
675 { "cR{tO||tO|}", XX
, XX
, XX
},
676 { "Jcall{T|}", Ap
, XX
, XX
},
677 { "(bad)", XX
, XX
, XX
}, /* fwait */
678 { "pushfT", XX
, XX
, XX
},
679 { "popfT", XX
, XX
, XX
},
680 { "sahf{|}", XX
, XX
, XX
},
681 { "lahf{|}", XX
, XX
, XX
},
683 { "movB", AL
, Ob
, XX
},
684 { "movS", eAX
, Ov
, XX
},
685 { "movB", Ob
, AL
, XX
},
686 { "movS", Ov
, eAX
, XX
},
687 { "movs{b||b|}", Yb
, Xb
, XX
},
688 { "movs{R||R|}", Yv
, Xv
, XX
},
689 { "cmps{b||b|}", Xb
, Yb
, XX
},
690 { "cmps{R||R|}", Xv
, Yv
, XX
},
692 { "testB", AL
, Ib
, XX
},
693 { "testS", eAX
, Iv
, XX
},
694 { "stosB", Yb
, AL
, XX
},
695 { "stosS", Yv
, eAX
, XX
},
696 { "lodsB", AL
, Xb
, XX
},
697 { "lodsS", eAX
, Xv
, XX
},
698 { "scasB", AL
, Yb
, XX
},
699 { "scasS", eAX
, Yv
, XX
},
701 { "movB", RMAL
, Ib
, XX
},
702 { "movB", RMCL
, Ib
, XX
},
703 { "movB", RMDL
, Ib
, XX
},
704 { "movB", RMBL
, Ib
, XX
},
705 { "movB", RMAH
, Ib
, XX
},
706 { "movB", RMCH
, Ib
, XX
},
707 { "movB", RMDH
, Ib
, XX
},
708 { "movB", RMBH
, Ib
, XX
},
710 { "movS", RMeAX
, Iv64
, XX
},
711 { "movS", RMeCX
, Iv64
, XX
},
712 { "movS", RMeDX
, Iv64
, XX
},
713 { "movS", RMeBX
, Iv64
, XX
},
714 { "movS", RMeSP
, Iv64
, XX
},
715 { "movS", RMeBP
, Iv64
, XX
},
716 { "movS", RMeSI
, Iv64
, XX
},
717 { "movS", RMeDI
, Iv64
, XX
},
721 { "retT", Iw
, XX
, XX
},
722 { "retT", XX
, XX
, XX
},
723 { "les{S|}", Gv
, Mp
, XX
},
724 { "ldsS", Gv
, Mp
, XX
},
725 { "movA", Eb
, Ib
, XX
},
726 { "movQ", Ev
, Iv
, XX
},
728 { "enterT", Iw
, Ib
, XX
},
729 { "leaveT", XX
, XX
, XX
},
730 { "lretP", Iw
, XX
, XX
},
731 { "lretP", XX
, XX
, XX
},
732 { "int3", XX
, XX
, XX
},
733 { "int", Ib
, XX
, XX
},
734 { "into{|}", XX
, XX
, XX
},
735 { "iretP", XX
, XX
, XX
},
741 { "aam{|}", sIb
, XX
, XX
},
742 { "aad{|}", sIb
, XX
, XX
},
743 { "(bad)", XX
, XX
, XX
},
744 { "xlat", DSBX
, XX
, XX
},
755 { "loopneFH", Jb
, XX
, loop_jcxz_flag
},
756 { "loopeFH", Jb
, XX
, loop_jcxz_flag
},
757 { "loopFH", Jb
, XX
, loop_jcxz_flag
},
758 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
},
759 { "inB", AL
, Ib
, XX
},
760 { "inS", eAX
, Ib
, XX
},
761 { "outB", Ib
, AL
, XX
},
762 { "outS", Ib
, eAX
, XX
},
764 { "callT", Jv
, XX
, XX
},
765 { "jmpT", Jv
, XX
, XX
},
766 { "Jjmp{T|}", Ap
, XX
, XX
},
767 { "jmp", Jb
, XX
, XX
},
768 { "inB", AL
, indirDX
, XX
},
769 { "inS", eAX
, indirDX
, XX
},
770 { "outB", indirDX
, AL
, XX
},
771 { "outS", indirDX
, eAX
, XX
},
773 { "(bad)", XX
, XX
, XX
}, /* lock prefix */
774 { "icebp", XX
, XX
, XX
},
775 { "(bad)", XX
, XX
, XX
}, /* repne */
776 { "(bad)", XX
, XX
, XX
}, /* repz */
777 { "hlt", XX
, XX
, XX
},
778 { "cmc", XX
, XX
, XX
},
782 { "clc", XX
, XX
, XX
},
783 { "stc", XX
, XX
, XX
},
784 { "cli", XX
, XX
, XX
},
785 { "sti", XX
, XX
, XX
},
786 { "cld", XX
, XX
, XX
},
787 { "std", XX
, XX
, XX
},
792 static const struct dis386 dis386_twobyte
[] = {
796 { "larS", Gv
, Ew
, XX
},
797 { "lslS", Gv
, Ew
, XX
},
798 { "(bad)", XX
, XX
, XX
},
799 { "syscall", XX
, XX
, XX
},
800 { "clts", XX
, XX
, XX
},
801 { "sysretP", XX
, XX
, XX
},
803 { "invd", XX
, XX
, XX
},
804 { "wbinvd", XX
, XX
, XX
},
805 { "(bad)", XX
, XX
, XX
},
806 { "ud2a", XX
, XX
, XX
},
807 { "(bad)", XX
, XX
, XX
},
809 { "femms", XX
, XX
, XX
},
810 { "", MX
, EM
, OPSUF
}, /* See OP_3DNowSuffix. */
815 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h' },
816 { "unpcklpX", XM
, EX
, XX
},
817 { "unpckhpX", XM
, EX
, XX
},
819 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l' },
822 { "(bad)", XX
, XX
, XX
},
823 { "(bad)", XX
, XX
, XX
},
824 { "(bad)", XX
, XX
, XX
},
825 { "(bad)", XX
, XX
, XX
},
826 { "(bad)", XX
, XX
, XX
},
827 { "(bad)", XX
, XX
, XX
},
828 { "(bad)", XX
, XX
, XX
},
830 { "movL", Rm
, Cm
, XX
},
831 { "movL", Rm
, Dm
, XX
},
832 { "movL", Cm
, Rm
, XX
},
833 { "movL", Dm
, Rm
, XX
},
834 { "movL", Rd
, Td
, XX
},
835 { "(bad)", XX
, XX
, XX
},
836 { "movL", Td
, Rd
, XX
},
837 { "(bad)", XX
, XX
, XX
},
839 { "movapX", XM
, EX
, XX
},
840 { "movapX", EX
, XM
, XX
},
842 { "movntpX", Ev
, XM
, XX
},
845 { "ucomisX", XM
,EX
, XX
},
846 { "comisX", XM
,EX
, XX
},
848 { "wrmsr", XX
, XX
, XX
},
849 { "rdtsc", XX
, XX
, XX
},
850 { "rdmsr", XX
, XX
, XX
},
851 { "rdpmc", XX
, XX
, XX
},
852 { "sysenter", XX
, XX
, XX
},
853 { "sysexit", XX
, XX
, XX
},
854 { "(bad)", XX
, XX
, XX
},
855 { "(bad)", XX
, XX
, XX
},
857 { "(bad)", XX
, XX
, XX
},
858 { "(bad)", XX
, XX
, XX
},
859 { "(bad)", XX
, XX
, XX
},
860 { "(bad)", XX
, XX
, XX
},
861 { "(bad)", XX
, XX
, XX
},
862 { "(bad)", XX
, XX
, XX
},
863 { "(bad)", XX
, XX
, XX
},
864 { "(bad)", XX
, XX
, XX
},
866 { "cmovo", Gv
, Ev
, XX
},
867 { "cmovno", Gv
, Ev
, XX
},
868 { "cmovb", Gv
, Ev
, XX
},
869 { "cmovae", Gv
, Ev
, XX
},
870 { "cmove", Gv
, Ev
, XX
},
871 { "cmovne", Gv
, Ev
, XX
},
872 { "cmovbe", Gv
, Ev
, XX
},
873 { "cmova", Gv
, Ev
, XX
},
875 { "cmovs", Gv
, Ev
, XX
},
876 { "cmovns", Gv
, Ev
, XX
},
877 { "cmovp", Gv
, Ev
, XX
},
878 { "cmovnp", Gv
, Ev
, XX
},
879 { "cmovl", Gv
, Ev
, XX
},
880 { "cmovge", Gv
, Ev
, XX
},
881 { "cmovle", Gv
, Ev
, XX
},
882 { "cmovg", Gv
, Ev
, XX
},
884 { "movmskpX", Gdq
, XS
, XX
},
888 { "andpX", XM
, EX
, XX
},
889 { "andnpX", XM
, EX
, XX
},
890 { "orpX", XM
, EX
, XX
},
891 { "xorpX", XM
, EX
, XX
},
902 { "punpcklbw", MX
, EM
, XX
},
903 { "punpcklwd", MX
, EM
, XX
},
904 { "punpckldq", MX
, EM
, XX
},
905 { "packsswb", MX
, EM
, XX
},
906 { "pcmpgtb", MX
, EM
, XX
},
907 { "pcmpgtw", MX
, EM
, XX
},
908 { "pcmpgtd", MX
, EM
, XX
},
909 { "packuswb", MX
, EM
, XX
},
911 { "punpckhbw", MX
, EM
, XX
},
912 { "punpckhwd", MX
, EM
, XX
},
913 { "punpckhdq", MX
, EM
, XX
},
914 { "packssdw", MX
, EM
, XX
},
917 { "movd", MX
, Edq
, XX
},
924 { "pcmpeqb", MX
, EM
, XX
},
925 { "pcmpeqw", MX
, EM
, XX
},
926 { "pcmpeqd", MX
, EM
, XX
},
927 { "emms", XX
, XX
, XX
},
929 { "vmread", Em
, Gm
, XX
},
930 { "vmwrite", Gm
, Em
, XX
},
931 { "(bad)", XX
, XX
, XX
},
932 { "(bad)", XX
, XX
, XX
},
938 { "joH", Jv
, XX
, cond_jump_flag
},
939 { "jnoH", Jv
, XX
, cond_jump_flag
},
940 { "jbH", Jv
, XX
, cond_jump_flag
},
941 { "jaeH", Jv
, XX
, cond_jump_flag
},
942 { "jeH", Jv
, XX
, cond_jump_flag
},
943 { "jneH", Jv
, XX
, cond_jump_flag
},
944 { "jbeH", Jv
, XX
, cond_jump_flag
},
945 { "jaH", Jv
, XX
, cond_jump_flag
},
947 { "jsH", Jv
, XX
, cond_jump_flag
},
948 { "jnsH", Jv
, XX
, cond_jump_flag
},
949 { "jpH", Jv
, XX
, cond_jump_flag
},
950 { "jnpH", Jv
, XX
, cond_jump_flag
},
951 { "jlH", Jv
, XX
, cond_jump_flag
},
952 { "jgeH", Jv
, XX
, cond_jump_flag
},
953 { "jleH", Jv
, XX
, cond_jump_flag
},
954 { "jgH", Jv
, XX
, cond_jump_flag
},
956 { "seto", Eb
, XX
, XX
},
957 { "setno", Eb
, XX
, XX
},
958 { "setb", Eb
, XX
, XX
},
959 { "setae", Eb
, XX
, XX
},
960 { "sete", Eb
, XX
, XX
},
961 { "setne", Eb
, XX
, XX
},
962 { "setbe", Eb
, XX
, XX
},
963 { "seta", Eb
, XX
, XX
},
965 { "sets", Eb
, XX
, XX
},
966 { "setns", Eb
, XX
, XX
},
967 { "setp", Eb
, XX
, XX
},
968 { "setnp", Eb
, XX
, XX
},
969 { "setl", Eb
, XX
, XX
},
970 { "setge", Eb
, XX
, XX
},
971 { "setle", Eb
, XX
, XX
},
972 { "setg", Eb
, XX
, XX
},
974 { "pushT", fs
, XX
, XX
},
975 { "popT", fs
, XX
, XX
},
976 { "cpuid", XX
, XX
, XX
},
977 { "btS", Ev
, Gv
, XX
},
978 { "shldS", Ev
, Gv
, Ib
},
979 { "shldS", Ev
, Gv
, CL
},
983 { "pushT", gs
, XX
, XX
},
984 { "popT", gs
, XX
, XX
},
985 { "rsm", XX
, XX
, XX
},
986 { "btsS", Ev
, Gv
, XX
},
987 { "shrdS", Ev
, Gv
, Ib
},
988 { "shrdS", Ev
, Gv
, CL
},
990 { "imulS", Gv
, Ev
, XX
},
992 { "cmpxchgB", Eb
, Gb
, XX
},
993 { "cmpxchgS", Ev
, Gv
, XX
},
994 { "lssS", Gv
, Mp
, XX
},
995 { "btrS", Ev
, Gv
, XX
},
996 { "lfsS", Gv
, Mp
, XX
},
997 { "lgsS", Gv
, Mp
, XX
},
998 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
},
999 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movzww ! */
1001 { "(bad)", XX
, XX
, XX
},
1002 { "ud2b", XX
, XX
, XX
},
1004 { "btcS", Ev
, Gv
, XX
},
1005 { "bsfS", Gv
, Ev
, XX
},
1006 { "bsrS", Gv
, Ev
, XX
},
1007 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
},
1008 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movsww ! */
1010 { "xaddB", Eb
, Gb
, XX
},
1011 { "xaddS", Ev
, Gv
, XX
},
1013 { "movntiS", Ev
, Gv
, XX
},
1014 { "pinsrw", MX
, Edqw
, Ib
},
1015 { "pextrw", Gdq
, MS
, Ib
},
1016 { "shufpX", XM
, EX
, Ib
},
1019 { "bswap", RMeAX
, XX
, XX
},
1020 { "bswap", RMeCX
, XX
, XX
},
1021 { "bswap", RMeDX
, XX
, XX
},
1022 { "bswap", RMeBX
, XX
, XX
},
1023 { "bswap", RMeSP
, XX
, XX
},
1024 { "bswap", RMeBP
, XX
, XX
},
1025 { "bswap", RMeSI
, XX
, XX
},
1026 { "bswap", RMeDI
, XX
, XX
},
1029 { "psrlw", MX
, EM
, XX
},
1030 { "psrld", MX
, EM
, XX
},
1031 { "psrlq", MX
, EM
, XX
},
1032 { "paddq", MX
, EM
, XX
},
1033 { "pmullw", MX
, EM
, XX
},
1035 { "pmovmskb", Gdq
, MS
, XX
},
1037 { "psubusb", MX
, EM
, XX
},
1038 { "psubusw", MX
, EM
, XX
},
1039 { "pminub", MX
, EM
, XX
},
1040 { "pand", MX
, EM
, XX
},
1041 { "paddusb", MX
, EM
, XX
},
1042 { "paddusw", MX
, EM
, XX
},
1043 { "pmaxub", MX
, EM
, XX
},
1044 { "pandn", MX
, EM
, XX
},
1046 { "pavgb", MX
, EM
, XX
},
1047 { "psraw", MX
, EM
, XX
},
1048 { "psrad", MX
, EM
, XX
},
1049 { "pavgw", MX
, EM
, XX
},
1050 { "pmulhuw", MX
, EM
, XX
},
1051 { "pmulhw", MX
, EM
, XX
},
1055 { "psubsb", MX
, EM
, XX
},
1056 { "psubsw", MX
, EM
, XX
},
1057 { "pminsw", MX
, EM
, XX
},
1058 { "por", MX
, EM
, XX
},
1059 { "paddsb", MX
, EM
, XX
},
1060 { "paddsw", MX
, EM
, XX
},
1061 { "pmaxsw", MX
, EM
, XX
},
1062 { "pxor", MX
, EM
, XX
},
1065 { "psllw", MX
, EM
, XX
},
1066 { "pslld", MX
, EM
, XX
},
1067 { "psllq", MX
, EM
, XX
},
1068 { "pmuludq", MX
, EM
, XX
},
1069 { "pmaddwd", MX
, EM
, XX
},
1070 { "psadbw", MX
, EM
, XX
},
1073 { "psubb", MX
, EM
, XX
},
1074 { "psubw", MX
, EM
, XX
},
1075 { "psubd", MX
, EM
, XX
},
1076 { "psubq", MX
, EM
, XX
},
1077 { "paddb", MX
, EM
, XX
},
1078 { "paddw", MX
, EM
, XX
},
1079 { "paddd", MX
, EM
, XX
},
1080 { "(bad)", XX
, XX
, XX
}
1083 static const unsigned char onebyte_has_modrm
[256] = {
1084 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1085 /* ------------------------------- */
1086 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1087 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1088 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1089 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1090 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1091 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1092 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1093 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1094 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1095 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1096 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1097 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1098 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1099 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1100 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1101 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1102 /* ------------------------------- */
1103 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1106 static const unsigned char twobyte_has_modrm
[256] = {
1107 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1108 /* ------------------------------- */
1109 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1110 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1111 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1112 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1113 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1114 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1115 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1116 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1117 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1118 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1119 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1120 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1121 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1122 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1123 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1124 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1125 /* ------------------------------- */
1126 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1129 static const unsigned char twobyte_uses_SSE_prefix
[256] = {
1130 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1131 /* ------------------------------- */
1132 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1133 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1134 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1135 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1136 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1137 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1138 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1139 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1140 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1141 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1142 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1143 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1144 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1145 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1146 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1147 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1148 /* ------------------------------- */
1149 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1152 static char obuf
[100];
1154 static char scratchbuf
[100];
1155 static unsigned char *start_codep
;
1156 static unsigned char *insn_codep
;
1157 static unsigned char *codep
;
1158 static disassemble_info
*the_info
;
1162 static unsigned char need_modrm
;
1164 /* If we are accessing mod/rm/reg without need_modrm set, then the
1165 values are stale. Hitting this abort likely indicates that you
1166 need to update onebyte_has_modrm or twobyte_has_modrm. */
1167 #define MODRM_CHECK if (!need_modrm) abort ()
1169 static const char **names64
;
1170 static const char **names32
;
1171 static const char **names16
;
1172 static const char **names8
;
1173 static const char **names8rex
;
1174 static const char **names_seg
;
1175 static const char **index16
;
1177 static const char *intel_names64
[] = {
1178 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1181 static const char *intel_names32
[] = {
1182 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1183 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1185 static const char *intel_names16
[] = {
1186 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1187 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1189 static const char *intel_names8
[] = {
1190 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1192 static const char *intel_names8rex
[] = {
1193 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1194 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1196 static const char *intel_names_seg
[] = {
1197 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1199 static const char *intel_index16
[] = {
1200 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1203 static const char *att_names64
[] = {
1204 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1205 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1207 static const char *att_names32
[] = {
1208 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1209 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1211 static const char *att_names16
[] = {
1212 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1213 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1215 static const char *att_names8
[] = {
1216 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1218 static const char *att_names8rex
[] = {
1219 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1220 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1222 static const char *att_names_seg
[] = {
1223 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1225 static const char *att_index16
[] = {
1226 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1229 static const struct dis386 grps
[][8] = {
1232 { "addA", Eb
, Ib
, XX
},
1233 { "orA", Eb
, Ib
, XX
},
1234 { "adcA", Eb
, Ib
, XX
},
1235 { "sbbA", Eb
, Ib
, XX
},
1236 { "andA", Eb
, Ib
, XX
},
1237 { "subA", Eb
, Ib
, XX
},
1238 { "xorA", Eb
, Ib
, XX
},
1239 { "cmpA", Eb
, Ib
, XX
}
1243 { "addQ", Ev
, Iv
, XX
},
1244 { "orQ", Ev
, Iv
, XX
},
1245 { "adcQ", Ev
, Iv
, XX
},
1246 { "sbbQ", Ev
, Iv
, XX
},
1247 { "andQ", Ev
, Iv
, XX
},
1248 { "subQ", Ev
, Iv
, XX
},
1249 { "xorQ", Ev
, Iv
, XX
},
1250 { "cmpQ", Ev
, Iv
, XX
}
1254 { "addQ", Ev
, sIb
, XX
},
1255 { "orQ", Ev
, sIb
, XX
},
1256 { "adcQ", Ev
, sIb
, XX
},
1257 { "sbbQ", Ev
, sIb
, XX
},
1258 { "andQ", Ev
, sIb
, XX
},
1259 { "subQ", Ev
, sIb
, XX
},
1260 { "xorQ", Ev
, sIb
, XX
},
1261 { "cmpQ", Ev
, sIb
, XX
}
1265 { "rolA", Eb
, Ib
, XX
},
1266 { "rorA", Eb
, Ib
, XX
},
1267 { "rclA", Eb
, Ib
, XX
},
1268 { "rcrA", Eb
, Ib
, XX
},
1269 { "shlA", Eb
, Ib
, XX
},
1270 { "shrA", Eb
, Ib
, XX
},
1271 { "(bad)", XX
, XX
, XX
},
1272 { "sarA", Eb
, Ib
, XX
},
1276 { "rolQ", Ev
, Ib
, XX
},
1277 { "rorQ", Ev
, Ib
, XX
},
1278 { "rclQ", Ev
, Ib
, XX
},
1279 { "rcrQ", Ev
, Ib
, XX
},
1280 { "shlQ", Ev
, Ib
, XX
},
1281 { "shrQ", Ev
, Ib
, XX
},
1282 { "(bad)", XX
, XX
, XX
},
1283 { "sarQ", Ev
, Ib
, XX
},
1287 { "rolA", Eb
, I1
, XX
},
1288 { "rorA", Eb
, I1
, XX
},
1289 { "rclA", Eb
, I1
, XX
},
1290 { "rcrA", Eb
, I1
, XX
},
1291 { "shlA", Eb
, I1
, XX
},
1292 { "shrA", Eb
, I1
, XX
},
1293 { "(bad)", XX
, XX
, XX
},
1294 { "sarA", Eb
, I1
, XX
},
1298 { "rolQ", Ev
, I1
, XX
},
1299 { "rorQ", Ev
, I1
, XX
},
1300 { "rclQ", Ev
, I1
, XX
},
1301 { "rcrQ", Ev
, I1
, XX
},
1302 { "shlQ", Ev
, I1
, XX
},
1303 { "shrQ", Ev
, I1
, XX
},
1304 { "(bad)", XX
, XX
, XX
},
1305 { "sarQ", Ev
, I1
, XX
},
1309 { "rolA", Eb
, CL
, XX
},
1310 { "rorA", Eb
, CL
, XX
},
1311 { "rclA", Eb
, CL
, XX
},
1312 { "rcrA", Eb
, CL
, XX
},
1313 { "shlA", Eb
, CL
, XX
},
1314 { "shrA", Eb
, CL
, XX
},
1315 { "(bad)", XX
, XX
, XX
},
1316 { "sarA", Eb
, CL
, XX
},
1320 { "rolQ", Ev
, CL
, XX
},
1321 { "rorQ", Ev
, CL
, XX
},
1322 { "rclQ", Ev
, CL
, XX
},
1323 { "rcrQ", Ev
, CL
, XX
},
1324 { "shlQ", Ev
, CL
, XX
},
1325 { "shrQ", Ev
, CL
, XX
},
1326 { "(bad)", XX
, XX
, XX
},
1327 { "sarQ", Ev
, CL
, XX
}
1331 { "testA", Eb
, Ib
, XX
},
1332 { "(bad)", Eb
, XX
, XX
},
1333 { "notA", Eb
, XX
, XX
},
1334 { "negA", Eb
, XX
, XX
},
1335 { "mulA", Eb
, XX
, XX
}, /* Don't print the implicit %al register, */
1336 { "imulA", Eb
, XX
, XX
}, /* to distinguish these opcodes from other */
1337 { "divA", Eb
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1338 { "idivA", Eb
, XX
, XX
} /* and idiv for consistency. */
1342 { "testQ", Ev
, Iv
, XX
},
1343 { "(bad)", XX
, XX
, XX
},
1344 { "notQ", Ev
, XX
, XX
},
1345 { "negQ", Ev
, XX
, XX
},
1346 { "mulQ", Ev
, XX
, XX
}, /* Don't print the implicit register. */
1347 { "imulQ", Ev
, XX
, XX
},
1348 { "divQ", Ev
, XX
, XX
},
1349 { "idivQ", Ev
, XX
, XX
},
1353 { "incA", Eb
, XX
, XX
},
1354 { "decA", Eb
, XX
, XX
},
1355 { "(bad)", XX
, XX
, XX
},
1356 { "(bad)", XX
, XX
, XX
},
1357 { "(bad)", XX
, XX
, XX
},
1358 { "(bad)", XX
, XX
, XX
},
1359 { "(bad)", XX
, XX
, XX
},
1360 { "(bad)", XX
, XX
, XX
},
1364 { "incQ", Ev
, XX
, XX
},
1365 { "decQ", Ev
, XX
, XX
},
1366 { "callT", indirEv
, XX
, XX
},
1367 { "JcallT", indirEp
, XX
, XX
},
1368 { "jmpT", indirEv
, XX
, XX
},
1369 { "JjmpT", indirEp
, XX
, XX
},
1370 { "pushU", stackEv
, XX
, XX
},
1371 { "(bad)", XX
, XX
, XX
},
1375 { "sldtQ", Ev
, XX
, XX
},
1376 { "strQ", Ev
, XX
, XX
},
1377 { "lldt", Ew
, XX
, XX
},
1378 { "ltr", Ew
, XX
, XX
},
1379 { "verr", Ew
, XX
, XX
},
1380 { "verw", Ew
, XX
, XX
},
1381 { "(bad)", XX
, XX
, XX
},
1382 { "(bad)", XX
, XX
, XX
}
1386 { "sgdtIQ", VMX_Fixup
, 0, XX
, XX
},
1387 { "sidtIQ", PNI_Fixup
, 0, XX
, XX
},
1388 { "lgdt{Q|Q||}", M
, XX
, XX
},
1389 { "lidt{Q|Q||}", SVME_Fixup
, 0, XX
, XX
},
1390 { "smswQ", Ev
, XX
, XX
},
1391 { "(bad)", XX
, XX
, XX
},
1392 { "lmsw", Ew
, XX
, XX
},
1393 { "invlpg", INVLPG_Fixup
, w_mode
, XX
, XX
},
1397 { "(bad)", XX
, XX
, XX
},
1398 { "(bad)", XX
, XX
, XX
},
1399 { "(bad)", XX
, XX
, XX
},
1400 { "(bad)", XX
, XX
, XX
},
1401 { "btQ", Ev
, Ib
, XX
},
1402 { "btsQ", Ev
, Ib
, XX
},
1403 { "btrQ", Ev
, Ib
, XX
},
1404 { "btcQ", Ev
, Ib
, XX
},
1408 { "(bad)", XX
, XX
, XX
},
1409 { "cmpxchg8b", Eq
, XX
, XX
},
1410 { "(bad)", XX
, XX
, XX
},
1411 { "(bad)", XX
, XX
, XX
},
1412 { "(bad)", XX
, XX
, XX
},
1413 { "(bad)", XX
, XX
, XX
},
1414 { "", VM
, XX
, XX
}, /* See OP_VMX. */
1415 { "vmptrst", Eq
, XX
, XX
},
1419 { "(bad)", XX
, XX
, XX
},
1420 { "(bad)", XX
, XX
, XX
},
1421 { "psrlw", MS
, Ib
, XX
},
1422 { "(bad)", XX
, XX
, XX
},
1423 { "psraw", MS
, Ib
, XX
},
1424 { "(bad)", XX
, XX
, XX
},
1425 { "psllw", MS
, Ib
, XX
},
1426 { "(bad)", XX
, XX
, XX
},
1430 { "(bad)", XX
, XX
, XX
},
1431 { "(bad)", XX
, XX
, XX
},
1432 { "psrld", MS
, Ib
, XX
},
1433 { "(bad)", XX
, XX
, XX
},
1434 { "psrad", MS
, Ib
, XX
},
1435 { "(bad)", XX
, XX
, XX
},
1436 { "pslld", MS
, Ib
, XX
},
1437 { "(bad)", XX
, XX
, XX
},
1441 { "(bad)", XX
, XX
, XX
},
1442 { "(bad)", XX
, XX
, XX
},
1443 { "psrlq", MS
, Ib
, XX
},
1444 { "psrldq", MS
, Ib
, XX
},
1445 { "(bad)", XX
, XX
, XX
},
1446 { "(bad)", XX
, XX
, XX
},
1447 { "psllq", MS
, Ib
, XX
},
1448 { "pslldq", MS
, Ib
, XX
},
1452 { "fxsave", Ev
, XX
, XX
},
1453 { "fxrstor", Ev
, XX
, XX
},
1454 { "ldmxcsr", Ev
, XX
, XX
},
1455 { "stmxcsr", Ev
, XX
, XX
},
1456 { "(bad)", XX
, XX
, XX
},
1457 { "lfence", OP_0fae
, 0, XX
, XX
},
1458 { "mfence", OP_0fae
, 0, XX
, XX
},
1459 { "clflush", OP_0fae
, 0, XX
, XX
},
1463 { "prefetchnta", Ev
, XX
, XX
},
1464 { "prefetcht0", Ev
, XX
, XX
},
1465 { "prefetcht1", Ev
, XX
, XX
},
1466 { "prefetcht2", Ev
, XX
, XX
},
1467 { "(bad)", XX
, XX
, XX
},
1468 { "(bad)", XX
, XX
, XX
},
1469 { "(bad)", XX
, XX
, XX
},
1470 { "(bad)", XX
, XX
, XX
},
1474 { "prefetch", Eb
, XX
, XX
},
1475 { "prefetchw", Eb
, XX
, XX
},
1476 { "(bad)", XX
, XX
, XX
},
1477 { "(bad)", XX
, XX
, XX
},
1478 { "(bad)", XX
, XX
, XX
},
1479 { "(bad)", XX
, XX
, XX
},
1480 { "(bad)", XX
, XX
, XX
},
1481 { "(bad)", XX
, XX
, XX
},
1485 { "xstore-rng", OP_0f07
, 0, XX
, XX
},
1486 { "xcrypt-ecb", OP_0f07
, 0, XX
, XX
},
1487 { "xcrypt-cbc", OP_0f07
, 0, XX
, XX
},
1488 { "xcrypt-ctr", OP_0f07
, 0, XX
, XX
},
1489 { "xcrypt-cfb", OP_0f07
, 0, XX
, XX
},
1490 { "xcrypt-ofb", OP_0f07
, 0, XX
, XX
},
1491 { "(bad)", OP_0f07
, 0, XX
, XX
},
1492 { "(bad)", OP_0f07
, 0, XX
, XX
},
1496 { "montmul", OP_0f07
, 0, XX
, XX
},
1497 { "xsha1", OP_0f07
, 0, XX
, XX
},
1498 { "xsha256", OP_0f07
, 0, XX
, XX
},
1499 { "(bad)", OP_0f07
, 0, XX
, XX
},
1500 { "(bad)", OP_0f07
, 0, XX
, XX
},
1501 { "(bad)", OP_0f07
, 0, XX
, XX
},
1502 { "(bad)", OP_0f07
, 0, XX
, XX
},
1503 { "(bad)", OP_0f07
, 0, XX
, XX
},
1507 static const struct dis386 prefix_user_table
[][4] = {
1510 { "addps", XM
, EX
, XX
},
1511 { "addss", XM
, EX
, XX
},
1512 { "addpd", XM
, EX
, XX
},
1513 { "addsd", XM
, EX
, XX
},
1517 { "", XM
, EX
, OPSIMD
}, /* See OP_SIMD_SUFFIX. */
1518 { "", XM
, EX
, OPSIMD
},
1519 { "", XM
, EX
, OPSIMD
},
1520 { "", XM
, EX
, OPSIMD
},
1524 { "cvtpi2ps", XM
, EM
, XX
},
1525 { "cvtsi2ssY", XM
, Ev
, XX
},
1526 { "cvtpi2pd", XM
, EM
, XX
},
1527 { "cvtsi2sdY", XM
, Ev
, XX
},
1531 { "cvtps2pi", MX
, EX
, XX
},
1532 { "cvtss2siY", Gv
, EX
, XX
},
1533 { "cvtpd2pi", MX
, EX
, XX
},
1534 { "cvtsd2siY", Gv
, EX
, XX
},
1538 { "cvttps2pi", MX
, EX
, XX
},
1539 { "cvttss2siY", Gv
, EX
, XX
},
1540 { "cvttpd2pi", MX
, EX
, XX
},
1541 { "cvttsd2siY", Gv
, EX
, XX
},
1545 { "divps", XM
, EX
, XX
},
1546 { "divss", XM
, EX
, XX
},
1547 { "divpd", XM
, EX
, XX
},
1548 { "divsd", XM
, EX
, XX
},
1552 { "maxps", XM
, EX
, XX
},
1553 { "maxss", XM
, EX
, XX
},
1554 { "maxpd", XM
, EX
, XX
},
1555 { "maxsd", XM
, EX
, XX
},
1559 { "minps", XM
, EX
, XX
},
1560 { "minss", XM
, EX
, XX
},
1561 { "minpd", XM
, EX
, XX
},
1562 { "minsd", XM
, EX
, XX
},
1566 { "movups", XM
, EX
, XX
},
1567 { "movss", XM
, EX
, XX
},
1568 { "movupd", XM
, EX
, XX
},
1569 { "movsd", XM
, EX
, XX
},
1573 { "movups", EX
, XM
, XX
},
1574 { "movss", EX
, XM
, XX
},
1575 { "movupd", EX
, XM
, XX
},
1576 { "movsd", EX
, XM
, XX
},
1580 { "mulps", XM
, EX
, XX
},
1581 { "mulss", XM
, EX
, XX
},
1582 { "mulpd", XM
, EX
, XX
},
1583 { "mulsd", XM
, EX
, XX
},
1587 { "rcpps", XM
, EX
, XX
},
1588 { "rcpss", XM
, EX
, XX
},
1589 { "(bad)", XM
, EX
, XX
},
1590 { "(bad)", XM
, EX
, XX
},
1594 { "rsqrtps", XM
, EX
, XX
},
1595 { "rsqrtss", XM
, EX
, XX
},
1596 { "(bad)", XM
, EX
, XX
},
1597 { "(bad)", XM
, EX
, XX
},
1601 { "sqrtps", XM
, EX
, XX
},
1602 { "sqrtss", XM
, EX
, XX
},
1603 { "sqrtpd", XM
, EX
, XX
},
1604 { "sqrtsd", XM
, EX
, XX
},
1608 { "subps", XM
, EX
, XX
},
1609 { "subss", XM
, EX
, XX
},
1610 { "subpd", XM
, EX
, XX
},
1611 { "subsd", XM
, EX
, XX
},
1615 { "(bad)", XM
, EX
, XX
},
1616 { "cvtdq2pd", XM
, EX
, XX
},
1617 { "cvttpd2dq", XM
, EX
, XX
},
1618 { "cvtpd2dq", XM
, EX
, XX
},
1622 { "cvtdq2ps", XM
, EX
, XX
},
1623 { "cvttps2dq",XM
, EX
, XX
},
1624 { "cvtps2dq",XM
, EX
, XX
},
1625 { "(bad)", XM
, EX
, XX
},
1629 { "cvtps2pd", XM
, EX
, XX
},
1630 { "cvtss2sd", XM
, EX
, XX
},
1631 { "cvtpd2ps", XM
, EX
, XX
},
1632 { "cvtsd2ss", XM
, EX
, XX
},
1636 { "maskmovq", MX
, MS
, XX
},
1637 { "(bad)", XM
, EX
, XX
},
1638 { "maskmovdqu", XM
, EX
, XX
},
1639 { "(bad)", XM
, EX
, XX
},
1643 { "movq", MX
, EM
, XX
},
1644 { "movdqu", XM
, EX
, XX
},
1645 { "movdqa", XM
, EX
, XX
},
1646 { "(bad)", XM
, EX
, XX
},
1650 { "movq", EM
, MX
, XX
},
1651 { "movdqu", EX
, XM
, XX
},
1652 { "movdqa", EX
, XM
, XX
},
1653 { "(bad)", EX
, XM
, XX
},
1657 { "(bad)", EX
, XM
, XX
},
1658 { "movq2dq", XM
, MS
, XX
},
1659 { "movq", EX
, XM
, XX
},
1660 { "movdq2q", MX
, XS
, XX
},
1664 { "pshufw", MX
, EM
, Ib
},
1665 { "pshufhw", XM
, EX
, Ib
},
1666 { "pshufd", XM
, EX
, Ib
},
1667 { "pshuflw", XM
, EX
, Ib
},
1671 { "movd", Edq
, MX
, XX
},
1672 { "movq", XM
, EX
, XX
},
1673 { "movd", Edq
, XM
, XX
},
1674 { "(bad)", Ed
, XM
, XX
},
1678 { "(bad)", MX
, EX
, XX
},
1679 { "(bad)", XM
, EX
, XX
},
1680 { "punpckhqdq", XM
, EX
, XX
},
1681 { "(bad)", XM
, EX
, XX
},
1685 { "movntq", EM
, MX
, XX
},
1686 { "(bad)", EM
, XM
, XX
},
1687 { "movntdq", EM
, XM
, XX
},
1688 { "(bad)", EM
, XM
, XX
},
1692 { "(bad)", MX
, EX
, XX
},
1693 { "(bad)", XM
, EX
, XX
},
1694 { "punpcklqdq", XM
, EX
, XX
},
1695 { "(bad)", XM
, EX
, XX
},
1699 { "(bad)", MX
, EX
, XX
},
1700 { "(bad)", XM
, EX
, XX
},
1701 { "addsubpd", XM
, EX
, XX
},
1702 { "addsubps", XM
, EX
, XX
},
1706 { "(bad)", MX
, EX
, XX
},
1707 { "(bad)", XM
, EX
, XX
},
1708 { "haddpd", XM
, EX
, XX
},
1709 { "haddps", XM
, EX
, XX
},
1713 { "(bad)", MX
, EX
, XX
},
1714 { "(bad)", XM
, EX
, XX
},
1715 { "hsubpd", XM
, EX
, XX
},
1716 { "hsubps", XM
, EX
, XX
},
1720 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h' }, /* really only 2 operands */
1721 { "movsldup", XM
, EX
, XX
},
1722 { "movlpd", XM
, EX
, XX
},
1723 { "movddup", XM
, EX
, XX
},
1727 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l' },
1728 { "movshdup", XM
, EX
, XX
},
1729 { "movhpd", XM
, EX
, XX
},
1730 { "(bad)", XM
, EX
, XX
},
1734 { "(bad)", XM
, EX
, XX
},
1735 { "(bad)", XM
, EX
, XX
},
1736 { "(bad)", XM
, EX
, XX
},
1737 { "lddqu", XM
, M
, XX
},
1741 static const struct dis386 x86_64_table
[][2] = {
1743 { "arpl", Ew
, Gw
, XX
},
1744 { "movs{||lq|xd}", Gv
, Ed
, XX
},
1748 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1760 FETCH_DATA (the_info
, codep
+ 1);
1764 /* REX prefixes family. */
1781 if (address_mode
== mode_64bit
)
1787 prefixes
|= PREFIX_REPZ
;
1790 prefixes
|= PREFIX_REPNZ
;
1793 prefixes
|= PREFIX_LOCK
;
1796 prefixes
|= PREFIX_CS
;
1799 prefixes
|= PREFIX_SS
;
1802 prefixes
|= PREFIX_DS
;
1805 prefixes
|= PREFIX_ES
;
1808 prefixes
|= PREFIX_FS
;
1811 prefixes
|= PREFIX_GS
;
1814 prefixes
|= PREFIX_DATA
;
1817 prefixes
|= PREFIX_ADDR
;
1820 /* fwait is really an instruction. If there are prefixes
1821 before the fwait, they belong to the fwait, *not* to the
1822 following instruction. */
1823 if (prefixes
|| rex
)
1825 prefixes
|= PREFIX_FWAIT
;
1829 prefixes
= PREFIX_FWAIT
;
1834 /* Rex is ignored when followed by another prefix. */
1845 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1849 prefix_name (int pref
, int sizeflag
)
1853 /* REX prefixes family. */
1905 return (sizeflag
& DFLAG
) ? "data16" : "data32";
1907 if (address_mode
== mode_64bit
)
1908 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
1910 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
1918 static char op1out
[100], op2out
[100], op3out
[100];
1919 static int op_ad
, op_index
[3];
1920 static int two_source_ops
;
1921 static bfd_vma op_address
[3];
1922 static bfd_vma op_riprel
[3];
1923 static bfd_vma start_pc
;
1926 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1927 * (see topic "Redundant prefixes" in the "Differences from 8086"
1928 * section of the "Virtual 8086 Mode" chapter.)
1929 * 'pc' should be the address of this instruction, it will
1930 * be used to print the target address if this is a relative jump or call
1931 * The function returns the length of this instruction in bytes.
1934 static char intel_syntax
;
1935 static char open_char
;
1936 static char close_char
;
1937 static char separator_char
;
1938 static char scale_char
;
1940 /* Here for backwards compatibility. When gdb stops using
1941 print_insn_i386_att and print_insn_i386_intel these functions can
1942 disappear, and print_insn_i386 be merged into print_insn. */
1944 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
1948 return print_insn (pc
, info
);
1952 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
1956 return print_insn (pc
, info
);
1960 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
1964 return print_insn (pc
, info
);
1968 print_insn (bfd_vma pc
, disassemble_info
*info
)
1970 const struct dis386
*dp
;
1972 char *first
, *second
, *third
;
1974 unsigned char uses_SSE_prefix
, uses_LOCK_prefix
;
1977 struct dis_private priv
;
1979 if (info
->mach
== bfd_mach_x86_64_intel_syntax
1980 || info
->mach
== bfd_mach_x86_64
)
1981 address_mode
= mode_64bit
;
1983 address_mode
= mode_32bit
;
1985 if (intel_syntax
== (char) -1)
1986 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
1987 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
1989 if (info
->mach
== bfd_mach_i386_i386
1990 || info
->mach
== bfd_mach_x86_64
1991 || info
->mach
== bfd_mach_i386_i386_intel_syntax
1992 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
1993 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
1994 else if (info
->mach
== bfd_mach_i386_i8086
)
1995 priv
.orig_sizeflag
= 0;
1999 for (p
= info
->disassembler_options
; p
!= NULL
; )
2001 if (strncmp (p
, "x86-64", 6) == 0)
2003 address_mode
= mode_64bit
;
2004 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2006 else if (strncmp (p
, "i386", 4) == 0)
2008 address_mode
= mode_32bit
;
2009 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2011 else if (strncmp (p
, "i8086", 5) == 0)
2013 address_mode
= mode_16bit
;
2014 priv
.orig_sizeflag
= 0;
2016 else if (strncmp (p
, "intel", 5) == 0)
2020 else if (strncmp (p
, "att", 3) == 0)
2024 else if (strncmp (p
, "addr", 4) == 0)
2026 if (p
[4] == '1' && p
[5] == '6')
2027 priv
.orig_sizeflag
&= ~AFLAG
;
2028 else if (p
[4] == '3' && p
[5] == '2')
2029 priv
.orig_sizeflag
|= AFLAG
;
2031 else if (strncmp (p
, "data", 4) == 0)
2033 if (p
[4] == '1' && p
[5] == '6')
2034 priv
.orig_sizeflag
&= ~DFLAG
;
2035 else if (p
[4] == '3' && p
[5] == '2')
2036 priv
.orig_sizeflag
|= DFLAG
;
2038 else if (strncmp (p
, "suffix", 6) == 0)
2039 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
2041 p
= strchr (p
, ',');
2048 names64
= intel_names64
;
2049 names32
= intel_names32
;
2050 names16
= intel_names16
;
2051 names8
= intel_names8
;
2052 names8rex
= intel_names8rex
;
2053 names_seg
= intel_names_seg
;
2054 index16
= intel_index16
;
2057 separator_char
= '+';
2062 names64
= att_names64
;
2063 names32
= att_names32
;
2064 names16
= att_names16
;
2065 names8
= att_names8
;
2066 names8rex
= att_names8rex
;
2067 names_seg
= att_names_seg
;
2068 index16
= att_index16
;
2071 separator_char
= ',';
2075 /* The output looks better if we put 7 bytes on a line, since that
2076 puts most long word instructions on a single line. */
2077 info
->bytes_per_line
= 7;
2079 info
->private_data
= &priv
;
2080 priv
.max_fetched
= priv
.the_buffer
;
2081 priv
.insn_start
= pc
;
2088 op_index
[0] = op_index
[1] = op_index
[2] = -1;
2092 start_codep
= priv
.the_buffer
;
2093 codep
= priv
.the_buffer
;
2095 if (setjmp (priv
.bailout
) != 0)
2099 /* Getting here means we tried for data but didn't get it. That
2100 means we have an incomplete instruction of some sort. Just
2101 print the first byte as a prefix or a .byte pseudo-op. */
2102 if (codep
> priv
.the_buffer
)
2104 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2106 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2109 /* Just print the first byte as a .byte instruction. */
2110 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
2111 (unsigned int) priv
.the_buffer
[0]);
2124 sizeflag
= priv
.orig_sizeflag
;
2126 FETCH_DATA (info
, codep
+ 1);
2127 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
2129 if (((prefixes
& PREFIX_FWAIT
)
2130 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
2131 || (rex
&& rex_used
))
2135 /* fwait not followed by floating point instruction, or rex followed
2136 by other prefixes. Print the first prefix. */
2137 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2139 name
= INTERNAL_DISASSEMBLER_ERROR
;
2140 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2146 FETCH_DATA (info
, codep
+ 2);
2147 dp
= &dis386_twobyte
[*++codep
];
2148 need_modrm
= twobyte_has_modrm
[*codep
];
2149 uses_SSE_prefix
= twobyte_uses_SSE_prefix
[*codep
];
2150 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
2154 dp
= &dis386
[*codep
];
2155 need_modrm
= onebyte_has_modrm
[*codep
];
2156 uses_SSE_prefix
= 0;
2157 uses_LOCK_prefix
= 0;
2161 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPZ
))
2164 used_prefixes
|= PREFIX_REPZ
;
2166 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPNZ
))
2169 used_prefixes
|= PREFIX_REPNZ
;
2171 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
2174 used_prefixes
|= PREFIX_LOCK
;
2177 if (prefixes
& PREFIX_ADDR
)
2180 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
2182 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
2183 oappend ("addr32 ");
2185 oappend ("addr16 ");
2186 used_prefixes
|= PREFIX_ADDR
;
2190 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_DATA
))
2193 if (dp
->bytemode3
== cond_jump_mode
2194 && dp
->bytemode1
== v_mode
2197 if (sizeflag
& DFLAG
)
2198 oappend ("data32 ");
2200 oappend ("data16 ");
2201 used_prefixes
|= PREFIX_DATA
;
2207 FETCH_DATA (info
, codep
+ 1);
2208 mod
= (*codep
>> 6) & 3;
2209 reg
= (*codep
>> 3) & 7;
2213 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
2220 if (dp
->name
== NULL
)
2222 switch (dp
->bytemode1
)
2225 dp
= &grps
[dp
->bytemode2
][reg
];
2228 case USE_PREFIX_USER_TABLE
:
2230 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
2231 if (prefixes
& PREFIX_REPZ
)
2235 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2236 if (prefixes
& PREFIX_DATA
)
2240 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
2241 if (prefixes
& PREFIX_REPNZ
)
2245 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
2248 case X86_64_SPECIAL
:
2249 index
= address_mode
== mode_64bit
? 1 : 0;
2250 dp
= &x86_64_table
[dp
->bytemode2
][index
];
2254 oappend (INTERNAL_DISASSEMBLER_ERROR
);
2259 if (putop (dp
->name
, sizeflag
) == 0)
2264 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2269 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2274 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
2278 /* See if any prefixes were not used. If so, print the first one
2279 separately. If we don't do this, we'll wind up printing an
2280 instruction stream which does not precisely correspond to the
2281 bytes we are disassembling. */
2282 if ((prefixes
& ~used_prefixes
) != 0)
2286 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2288 name
= INTERNAL_DISASSEMBLER_ERROR
;
2289 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2292 if (rex
& ~rex_used
)
2295 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
2297 name
= INTERNAL_DISASSEMBLER_ERROR
;
2298 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
2301 obufp
= obuf
+ strlen (obuf
);
2302 for (i
= strlen (obuf
); i
< 6; i
++)
2305 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
2307 /* The enter and bound instructions are printed with operands in the same
2308 order as the intel book; everything else is printed in reverse order. */
2309 if (intel_syntax
|| two_source_ops
)
2314 op_ad
= op_index
[0];
2315 op_index
[0] = op_index
[2];
2316 op_index
[2] = op_ad
;
2327 if (op_index
[0] != -1 && !op_riprel
[0])
2328 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
2330 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
2336 (*info
->fprintf_func
) (info
->stream
, ",");
2337 if (op_index
[1] != -1 && !op_riprel
[1])
2338 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
2340 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
2346 (*info
->fprintf_func
) (info
->stream
, ",");
2347 if (op_index
[2] != -1 && !op_riprel
[2])
2348 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
2350 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
2352 for (i
= 0; i
< 3; i
++)
2353 if (op_index
[i
] != -1 && op_riprel
[i
])
2355 (*info
->fprintf_func
) (info
->stream
, " # ");
2356 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
2357 + op_address
[op_index
[i
]]), info
);
2359 return codep
- priv
.the_buffer
;
2362 static const char *float_mem
[] = {
2437 static const unsigned char float_mem_mode
[] = {
2513 #define STi OP_STi, 0
2515 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2516 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2517 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2518 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2519 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2520 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2521 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2522 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2523 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2525 static const struct dis386 float_reg
[][8] = {
2528 { "fadd", ST
, STi
, XX
},
2529 { "fmul", ST
, STi
, XX
},
2530 { "fcom", STi
, XX
, XX
},
2531 { "fcomp", STi
, XX
, XX
},
2532 { "fsub", ST
, STi
, XX
},
2533 { "fsubr", ST
, STi
, XX
},
2534 { "fdiv", ST
, STi
, XX
},
2535 { "fdivr", ST
, STi
, XX
},
2539 { "fld", STi
, XX
, XX
},
2540 { "fxch", STi
, XX
, XX
},
2542 { "(bad)", XX
, XX
, XX
},
2550 { "fcmovb", ST
, STi
, XX
},
2551 { "fcmove", ST
, STi
, XX
},
2552 { "fcmovbe",ST
, STi
, XX
},
2553 { "fcmovu", ST
, STi
, XX
},
2554 { "(bad)", XX
, XX
, XX
},
2556 { "(bad)", XX
, XX
, XX
},
2557 { "(bad)", XX
, XX
, XX
},
2561 { "fcmovnb",ST
, STi
, XX
},
2562 { "fcmovne",ST
, STi
, XX
},
2563 { "fcmovnbe",ST
, STi
, XX
},
2564 { "fcmovnu",ST
, STi
, XX
},
2566 { "fucomi", ST
, STi
, XX
},
2567 { "fcomi", ST
, STi
, XX
},
2568 { "(bad)", XX
, XX
, XX
},
2572 { "fadd", STi
, ST
, XX
},
2573 { "fmul", STi
, ST
, XX
},
2574 { "(bad)", XX
, XX
, XX
},
2575 { "(bad)", XX
, XX
, XX
},
2577 { "fsub", STi
, ST
, XX
},
2578 { "fsubr", STi
, ST
, XX
},
2579 { "fdiv", STi
, ST
, XX
},
2580 { "fdivr", STi
, ST
, XX
},
2582 { "fsubr", STi
, ST
, XX
},
2583 { "fsub", STi
, ST
, XX
},
2584 { "fdivr", STi
, ST
, XX
},
2585 { "fdiv", STi
, ST
, XX
},
2590 { "ffree", STi
, XX
, XX
},
2591 { "(bad)", XX
, XX
, XX
},
2592 { "fst", STi
, XX
, XX
},
2593 { "fstp", STi
, XX
, XX
},
2594 { "fucom", STi
, XX
, XX
},
2595 { "fucomp", STi
, XX
, XX
},
2596 { "(bad)", XX
, XX
, XX
},
2597 { "(bad)", XX
, XX
, XX
},
2601 { "faddp", STi
, ST
, XX
},
2602 { "fmulp", STi
, ST
, XX
},
2603 { "(bad)", XX
, XX
, XX
},
2606 { "fsubp", STi
, ST
, XX
},
2607 { "fsubrp", STi
, ST
, XX
},
2608 { "fdivp", STi
, ST
, XX
},
2609 { "fdivrp", STi
, ST
, XX
},
2611 { "fsubrp", STi
, ST
, XX
},
2612 { "fsubp", STi
, ST
, XX
},
2613 { "fdivrp", STi
, ST
, XX
},
2614 { "fdivp", STi
, ST
, XX
},
2619 { "ffreep", STi
, XX
, XX
},
2620 { "(bad)", XX
, XX
, XX
},
2621 { "(bad)", XX
, XX
, XX
},
2622 { "(bad)", XX
, XX
, XX
},
2624 { "fucomip",ST
, STi
, XX
},
2625 { "fcomip", ST
, STi
, XX
},
2626 { "(bad)", XX
, XX
, XX
},
2630 static char *fgrps
[][8] = {
2633 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2638 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2643 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2648 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2653 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2658 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2663 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2664 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2669 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2674 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2679 dofloat (int sizeflag
)
2681 const struct dis386
*dp
;
2682 unsigned char floatop
;
2684 floatop
= codep
[-1];
2688 int fp_indx
= (floatop
- 0xd8) * 8 + reg
;
2690 putop (float_mem
[fp_indx
], sizeflag
);
2692 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
2695 /* Skip mod/rm byte. */
2699 dp
= &float_reg
[floatop
- 0xd8][reg
];
2700 if (dp
->name
== NULL
)
2702 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
2704 /* Instruction fnstsw is only one with strange arg. */
2705 if (floatop
== 0xdf && codep
[-1] == 0xe0)
2706 strcpy (op1out
, names16
[0]);
2710 putop (dp
->name
, sizeflag
);
2714 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2717 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2722 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2728 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2730 sprintf (scratchbuf
, "%%st(%d)", rm
);
2731 oappend (scratchbuf
+ intel_syntax
);
2734 /* Capital letters in template are macros. */
2736 putop (const char *template, int sizeflag
)
2741 for (p
= template; *p
; p
++)
2752 if (address_mode
== mode_64bit
)
2760 /* Alternative not valid. */
2761 strcpy (obuf
, "(bad)");
2765 else if (*p
== '\0')
2786 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2792 if (sizeflag
& SUFFIX_ALWAYS
)
2796 if (intel_syntax
&& !alt
)
2798 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
2800 if (sizeflag
& DFLAG
)
2801 *obufp
++ = intel_syntax
? 'd' : 'l';
2803 *obufp
++ = intel_syntax
? 'w' : 's';
2804 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2807 case 'E': /* For jcxz/jecxz */
2808 if (address_mode
== mode_64bit
)
2810 if (sizeflag
& AFLAG
)
2816 if (sizeflag
& AFLAG
)
2818 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2823 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
2825 if (sizeflag
& AFLAG
)
2826 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
2828 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
2829 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2835 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
2836 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
2838 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
2841 if (prefixes
& PREFIX_DS
)
2855 if (sizeflag
& SUFFIX_ALWAYS
)
2859 if ((prefixes
& PREFIX_FWAIT
) == 0)
2862 used_prefixes
|= PREFIX_FWAIT
;
2865 USED_REX (REX_MODE64
);
2866 if (rex
& REX_MODE64
)
2874 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
2883 if ((prefixes
& PREFIX_DATA
)
2884 || (rex
& REX_MODE64
)
2885 || (sizeflag
& SUFFIX_ALWAYS
))
2887 USED_REX (REX_MODE64
);
2888 if (rex
& REX_MODE64
)
2892 if (sizeflag
& DFLAG
)
2897 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2903 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
2905 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2911 if (intel_syntax
&& !alt
)
2913 USED_REX (REX_MODE64
);
2914 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2916 if (rex
& REX_MODE64
)
2920 if (sizeflag
& DFLAG
)
2921 *obufp
++ = intel_syntax
? 'd' : 'l';
2925 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2929 USED_REX (REX_MODE64
);
2932 if (rex
& REX_MODE64
)
2937 else if (sizeflag
& DFLAG
)
2950 if (rex
& REX_MODE64
)
2952 else if (sizeflag
& DFLAG
)
2957 if (!(rex
& REX_MODE64
))
2958 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2963 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
2965 if (sizeflag
& SUFFIX_ALWAYS
)
2973 if (sizeflag
& SUFFIX_ALWAYS
)
2975 if (rex
& REX_MODE64
)
2979 if (sizeflag
& DFLAG
)
2983 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2988 if (prefixes
& PREFIX_DATA
)
2992 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2997 if (rex
& REX_MODE64
)
2999 USED_REX (REX_MODE64
);
3003 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3005 /* operand size flag for cwtl, cbtw */
3009 else if (sizeflag
& DFLAG
)
3020 if (sizeflag
& DFLAG
)
3031 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3041 oappend (const char *s
)
3044 obufp
+= strlen (s
);
3050 if (prefixes
& PREFIX_CS
)
3052 used_prefixes
|= PREFIX_CS
;
3053 oappend ("%cs:" + intel_syntax
);
3055 if (prefixes
& PREFIX_DS
)
3057 used_prefixes
|= PREFIX_DS
;
3058 oappend ("%ds:" + intel_syntax
);
3060 if (prefixes
& PREFIX_SS
)
3062 used_prefixes
|= PREFIX_SS
;
3063 oappend ("%ss:" + intel_syntax
);
3065 if (prefixes
& PREFIX_ES
)
3067 used_prefixes
|= PREFIX_ES
;
3068 oappend ("%es:" + intel_syntax
);
3070 if (prefixes
& PREFIX_FS
)
3072 used_prefixes
|= PREFIX_FS
;
3073 oappend ("%fs:" + intel_syntax
);
3075 if (prefixes
& PREFIX_GS
)
3077 used_prefixes
|= PREFIX_GS
;
3078 oappend ("%gs:" + intel_syntax
);
3083 OP_indirE (int bytemode
, int sizeflag
)
3087 OP_E (bytemode
, sizeflag
);
3091 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
3093 if (address_mode
== mode_64bit
)
3101 sprintf_vma (tmp
, disp
);
3102 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
3103 strcpy (buf
+ 2, tmp
+ i
);
3107 bfd_signed_vma v
= disp
;
3114 /* Check for possible overflow on 0x8000000000000000. */
3117 strcpy (buf
, "9223372036854775808");
3131 tmp
[28 - i
] = (v
% 10) + '0';
3135 strcpy (buf
, tmp
+ 29 - i
);
3141 sprintf (buf
, "0x%x", (unsigned int) disp
);
3143 sprintf (buf
, "%d", (int) disp
);
3148 intel_operand_size (int bytemode
, int sizeflag
)
3153 oappend ("BYTE PTR ");
3157 oappend ("WORD PTR ");
3160 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3162 oappend ("QWORD PTR ");
3163 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3169 USED_REX (REX_MODE64
);
3170 if (rex
& REX_MODE64
)
3171 oappend ("QWORD PTR ");
3172 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
3173 oappend ("DWORD PTR ");
3175 oappend ("WORD PTR ");
3176 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3179 oappend ("DWORD PTR ");
3182 oappend ("QWORD PTR ");
3185 if (address_mode
== mode_64bit
)
3186 oappend ("QWORD PTR ");
3188 oappend ("DWORD PTR ");
3191 if (sizeflag
& DFLAG
)
3192 oappend ("FWORD PTR ");
3194 oappend ("DWORD PTR ");
3195 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3198 oappend ("TBYTE PTR ");
3201 oappend ("XMMWORD PTR ");
3209 OP_E (int bytemode
, int sizeflag
)
3214 USED_REX (REX_EXTZ
);
3218 /* Skip mod/rm byte. */
3229 oappend (names8rex
[rm
+ add
]);
3231 oappend (names8
[rm
+ add
]);
3234 oappend (names16
[rm
+ add
]);
3237 oappend (names32
[rm
+ add
]);
3240 oappend (names64
[rm
+ add
]);
3243 if (address_mode
== mode_64bit
)
3244 oappend (names64
[rm
+ add
]);
3246 oappend (names32
[rm
+ add
]);
3249 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3251 oappend (names64
[rm
+ add
]);
3252 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3260 USED_REX (REX_MODE64
);
3261 if (rex
& REX_MODE64
)
3262 oappend (names64
[rm
+ add
]);
3263 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
3264 oappend (names32
[rm
+ add
]);
3266 oappend (names16
[rm
+ add
]);
3267 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3272 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3280 intel_operand_size (bytemode
, sizeflag
);
3283 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
) /* 32 bit address mode */
3298 FETCH_DATA (the_info
, codep
+ 1);
3299 index
= (*codep
>> 3) & 7;
3300 if (address_mode
== mode_64bit
|| index
!= 0x4)
3301 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3302 scale
= (*codep
>> 6) & 3;
3304 USED_REX (REX_EXTY
);
3314 if ((base
& 7) == 5)
3317 if (address_mode
== mode_64bit
&& !havesib
)
3323 FETCH_DATA (the_info
, codep
+ 1);
3325 if ((disp
& 0x80) != 0)
3334 if (mod
!= 0 || (base
& 7) == 5)
3336 print_operand_value (scratchbuf
, !riprel
, disp
);
3337 oappend (scratchbuf
);
3345 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
3347 *obufp
++ = open_char
;
3348 if (intel_syntax
&& riprel
)
3352 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
3353 ? names64
[base
] : names32
[base
]);
3358 if (!intel_syntax
|| havebase
)
3360 *obufp
++ = separator_char
;
3363 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
3364 ? names64
[index
] : names32
[index
]);
3366 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
3368 *obufp
++ = scale_char
;
3370 sprintf (scratchbuf
, "%d", 1 << scale
);
3371 oappend (scratchbuf
);
3374 if (intel_syntax
&& disp
)
3376 if ((bfd_signed_vma
) disp
> 0)
3385 disp
= - (bfd_signed_vma
) disp
;
3388 print_operand_value (scratchbuf
, mod
!= 1, disp
);
3389 oappend (scratchbuf
);
3392 *obufp
++ = close_char
;
3395 else if (intel_syntax
)
3397 if (mod
!= 0 || (base
& 7) == 5)
3399 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3400 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3404 oappend (names_seg
[ds_reg
- es_reg
]);
3407 print_operand_value (scratchbuf
, 1, disp
);
3408 oappend (scratchbuf
);
3413 { /* 16 bit address mode */
3420 if ((disp
& 0x8000) != 0)
3425 FETCH_DATA (the_info
, codep
+ 1);
3427 if ((disp
& 0x80) != 0)
3432 if ((disp
& 0x8000) != 0)
3438 if (mod
!= 0 || rm
== 6)
3440 print_operand_value (scratchbuf
, 0, disp
);
3441 oappend (scratchbuf
);
3444 if (mod
!= 0 || rm
!= 6)
3446 *obufp
++ = open_char
;
3448 oappend (index16
[rm
]);
3449 if (intel_syntax
&& disp
)
3451 if ((bfd_signed_vma
) disp
> 0)
3460 disp
= - (bfd_signed_vma
) disp
;
3463 print_operand_value (scratchbuf
, mod
!= 1, disp
);
3464 oappend (scratchbuf
);
3467 *obufp
++ = close_char
;
3470 else if (intel_syntax
)
3472 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3473 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3477 oappend (names_seg
[ds_reg
- es_reg
]);
3480 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
3481 oappend (scratchbuf
);
3487 OP_G (int bytemode
, int sizeflag
)
3490 USED_REX (REX_EXTX
);
3498 oappend (names8rex
[reg
+ add
]);
3500 oappend (names8
[reg
+ add
]);
3503 oappend (names16
[reg
+ add
]);
3506 oappend (names32
[reg
+ add
]);
3509 oappend (names64
[reg
+ add
]);
3514 USED_REX (REX_MODE64
);
3515 if (rex
& REX_MODE64
)
3516 oappend (names64
[reg
+ add
]);
3517 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
3518 oappend (names32
[reg
+ add
]);
3520 oappend (names16
[reg
+ add
]);
3521 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3524 if (address_mode
== mode_64bit
)
3525 oappend (names64
[reg
+ add
]);
3527 oappend (names32
[reg
+ add
]);
3530 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3543 FETCH_DATA (the_info
, codep
+ 8);
3544 a
= *codep
++ & 0xff;
3545 a
|= (*codep
++ & 0xff) << 8;
3546 a
|= (*codep
++ & 0xff) << 16;
3547 a
|= (*codep
++ & 0xff) << 24;
3548 b
= *codep
++ & 0xff;
3549 b
|= (*codep
++ & 0xff) << 8;
3550 b
|= (*codep
++ & 0xff) << 16;
3551 b
|= (*codep
++ & 0xff) << 24;
3552 x
= a
+ ((bfd_vma
) b
<< 32);
3560 static bfd_signed_vma
3563 bfd_signed_vma x
= 0;
3565 FETCH_DATA (the_info
, codep
+ 4);
3566 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3567 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3568 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3569 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3573 static bfd_signed_vma
3576 bfd_signed_vma x
= 0;
3578 FETCH_DATA (the_info
, codep
+ 4);
3579 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3580 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3581 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3582 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3584 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
3594 FETCH_DATA (the_info
, codep
+ 2);
3595 x
= *codep
++ & 0xff;
3596 x
|= (*codep
++ & 0xff) << 8;
3601 set_op (bfd_vma op
, int riprel
)
3603 op_index
[op_ad
] = op_ad
;
3604 if (address_mode
== mode_64bit
)
3606 op_address
[op_ad
] = op
;
3607 op_riprel
[op_ad
] = riprel
;
3611 /* Mask to get a 32-bit address. */
3612 op_address
[op_ad
] = op
& 0xffffffff;
3613 op_riprel
[op_ad
] = riprel
& 0xffffffff;
3618 OP_REG (int code
, int sizeflag
)
3622 USED_REX (REX_EXTZ
);
3634 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3635 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3636 s
= names16
[code
- ax_reg
+ add
];
3638 case es_reg
: case ss_reg
: case cs_reg
:
3639 case ds_reg
: case fs_reg
: case gs_reg
:
3640 s
= names_seg
[code
- es_reg
+ add
];
3642 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3643 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3646 s
= names8rex
[code
- al_reg
+ add
];
3648 s
= names8
[code
- al_reg
];
3650 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
3651 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
3652 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3654 s
= names64
[code
- rAX_reg
+ add
];
3657 code
+= eAX_reg
- rAX_reg
;
3659 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3660 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3661 USED_REX (REX_MODE64
);
3662 if (rex
& REX_MODE64
)
3663 s
= names64
[code
- eAX_reg
+ add
];
3664 else if (sizeflag
& DFLAG
)
3665 s
= names32
[code
- eAX_reg
+ add
];
3667 s
= names16
[code
- eAX_reg
+ add
];
3668 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3671 s
= INTERNAL_DISASSEMBLER_ERROR
;
3678 OP_IMREG (int code
, int sizeflag
)
3690 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3691 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3692 s
= names16
[code
- ax_reg
];
3694 case es_reg
: case ss_reg
: case cs_reg
:
3695 case ds_reg
: case fs_reg
: case gs_reg
:
3696 s
= names_seg
[code
- es_reg
];
3698 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3699 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3702 s
= names8rex
[code
- al_reg
];
3704 s
= names8
[code
- al_reg
];
3706 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3707 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3708 USED_REX (REX_MODE64
);
3709 if (rex
& REX_MODE64
)
3710 s
= names64
[code
- eAX_reg
];
3711 else if (sizeflag
& DFLAG
)
3712 s
= names32
[code
- eAX_reg
];
3714 s
= names16
[code
- eAX_reg
];
3715 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3718 s
= INTERNAL_DISASSEMBLER_ERROR
;
3725 OP_I (int bytemode
, int sizeflag
)
3728 bfd_signed_vma mask
= -1;
3733 FETCH_DATA (the_info
, codep
+ 1);
3738 if (address_mode
== mode_64bit
)
3745 USED_REX (REX_MODE64
);
3746 if (rex
& REX_MODE64
)
3748 else if (sizeflag
& DFLAG
)
3758 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3769 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3774 scratchbuf
[0] = '$';
3775 print_operand_value (scratchbuf
+ 1, 1, op
);
3776 oappend (scratchbuf
+ intel_syntax
);
3777 scratchbuf
[0] = '\0';
3781 OP_I64 (int bytemode
, int sizeflag
)
3784 bfd_signed_vma mask
= -1;
3786 if (address_mode
!= mode_64bit
)
3788 OP_I (bytemode
, sizeflag
);
3795 FETCH_DATA (the_info
, codep
+ 1);
3800 USED_REX (REX_MODE64
);
3801 if (rex
& REX_MODE64
)
3803 else if (sizeflag
& DFLAG
)
3813 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3820 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3825 scratchbuf
[0] = '$';
3826 print_operand_value (scratchbuf
+ 1, 1, op
);
3827 oappend (scratchbuf
+ intel_syntax
);
3828 scratchbuf
[0] = '\0';
3832 OP_sI (int bytemode
, int sizeflag
)
3835 bfd_signed_vma mask
= -1;
3840 FETCH_DATA (the_info
, codep
+ 1);
3842 if ((op
& 0x80) != 0)
3847 USED_REX (REX_MODE64
);
3848 if (rex
& REX_MODE64
)
3850 else if (sizeflag
& DFLAG
)
3859 if ((op
& 0x8000) != 0)
3862 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3867 if ((op
& 0x8000) != 0)
3871 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3875 scratchbuf
[0] = '$';
3876 print_operand_value (scratchbuf
+ 1, 1, op
);
3877 oappend (scratchbuf
+ intel_syntax
);
3881 OP_J (int bytemode
, int sizeflag
)
3889 FETCH_DATA (the_info
, codep
+ 1);
3891 if ((disp
& 0x80) != 0)
3895 if ((sizeflag
& DFLAG
) || (rex
& REX_MODE64
))
3900 /* For some reason, a data16 prefix on a jump instruction
3901 means that the pc is masked to 16 bits after the
3902 displacement is added! */
3907 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3910 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
3912 print_operand_value (scratchbuf
, 1, disp
);
3913 oappend (scratchbuf
);
3917 OP_SEG (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
3919 oappend (names_seg
[reg
]);
3923 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
3927 if (sizeflag
& DFLAG
)
3937 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3939 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
3941 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
3942 oappend (scratchbuf
);
3946 OP_OFF (int bytemode
, int sizeflag
)
3950 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
3951 intel_operand_size (bytemode
, sizeflag
);
3954 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3961 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3962 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3964 oappend (names_seg
[ds_reg
- es_reg
]);
3968 print_operand_value (scratchbuf
, 1, off
);
3969 oappend (scratchbuf
);
3973 OP_OFF64 (int bytemode
, int sizeflag
)
3977 if (address_mode
!= mode_64bit
)
3979 OP_OFF (bytemode
, sizeflag
);
3983 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
3984 intel_operand_size (bytemode
, sizeflag
);
3991 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3992 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3994 oappend (names_seg
[ds_reg
- es_reg
]);
3998 print_operand_value (scratchbuf
, 1, off
);
3999 oappend (scratchbuf
);
4003 ptr_reg (int code
, int sizeflag
)
4007 *obufp
++ = open_char
;
4008 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4009 if (address_mode
== mode_64bit
)
4011 if (!(sizeflag
& AFLAG
))
4012 s
= names32
[code
- eAX_reg
];
4014 s
= names64
[code
- eAX_reg
];
4016 else if (sizeflag
& AFLAG
)
4017 s
= names32
[code
- eAX_reg
];
4019 s
= names16
[code
- eAX_reg
];
4021 *obufp
++ = close_char
;
4026 OP_ESreg (int code
, int sizeflag
)
4029 intel_operand_size (codep
[-1] & 1 ? v_mode
: b_mode
, sizeflag
);
4030 oappend ("%es:" + intel_syntax
);
4031 ptr_reg (code
, sizeflag
);
4035 OP_DSreg (int code
, int sizeflag
)
4038 intel_operand_size (codep
[-1] != 0xd7 && (codep
[-1] & 1)
4049 prefixes
|= PREFIX_DS
;
4051 ptr_reg (code
, sizeflag
);
4055 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4060 USED_REX (REX_EXTX
);
4063 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
4065 used_prefixes
|= PREFIX_LOCK
;
4068 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
4069 oappend (scratchbuf
+ intel_syntax
);
4073 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4076 USED_REX (REX_EXTX
);
4080 sprintf (scratchbuf
, "db%d", reg
+ add
);
4082 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
4083 oappend (scratchbuf
);
4087 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4089 sprintf (scratchbuf
, "%%tr%d", reg
);
4090 oappend (scratchbuf
+ intel_syntax
);
4094 OP_Rd (int bytemode
, int sizeflag
)
4097 OP_E (bytemode
, sizeflag
);
4103 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4105 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4106 if (prefixes
& PREFIX_DATA
)
4109 USED_REX (REX_EXTX
);
4112 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4115 sprintf (scratchbuf
, "%%mm%d", reg
);
4116 oappend (scratchbuf
+ intel_syntax
);
4120 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4123 USED_REX (REX_EXTX
);
4126 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4127 oappend (scratchbuf
+ intel_syntax
);
4131 OP_EM (int bytemode
, int sizeflag
)
4135 if (intel_syntax
&& bytemode
== v_mode
)
4137 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
4138 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4140 OP_E (bytemode
, sizeflag
);
4144 /* Skip mod/rm byte. */
4147 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4148 if (prefixes
& PREFIX_DATA
)
4152 USED_REX (REX_EXTZ
);
4155 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4158 sprintf (scratchbuf
, "%%mm%d", rm
);
4159 oappend (scratchbuf
+ intel_syntax
);
4163 OP_EX (int bytemode
, int sizeflag
)
4168 if (intel_syntax
&& bytemode
== v_mode
)
4170 switch (prefixes
& (PREFIX_DATA
|PREFIX_REPZ
|PREFIX_REPNZ
))
4172 case 0: bytemode
= x_mode
; break;
4173 case PREFIX_REPZ
: bytemode
= d_mode
; used_prefixes
|= PREFIX_REPZ
; break;
4174 case PREFIX_DATA
: bytemode
= x_mode
; used_prefixes
|= PREFIX_DATA
; break;
4175 case PREFIX_REPNZ
: bytemode
= q_mode
; used_prefixes
|= PREFIX_REPNZ
; break;
4176 default: bytemode
= 0; break;
4179 OP_E (bytemode
, sizeflag
);
4182 USED_REX (REX_EXTZ
);
4186 /* Skip mod/rm byte. */
4189 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4190 oappend (scratchbuf
+ intel_syntax
);
4194 OP_MS (int bytemode
, int sizeflag
)
4197 OP_EM (bytemode
, sizeflag
);
4203 OP_XS (int bytemode
, int sizeflag
)
4206 OP_EX (bytemode
, sizeflag
);
4212 OP_M (int bytemode
, int sizeflag
)
4215 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4217 OP_E (bytemode
, sizeflag
);
4221 OP_0f07 (int bytemode
, int sizeflag
)
4223 if (mod
!= 3 || rm
!= 0)
4226 OP_E (bytemode
, sizeflag
);
4230 OP_0fae (int bytemode
, int sizeflag
)
4235 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
4237 if (reg
< 5 || rm
!= 0)
4239 BadOp (); /* bad sfence, mfence, or lfence */
4245 BadOp (); /* bad clflush */
4249 OP_E (bytemode
, sizeflag
);
4253 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4255 /* NOP with REPZ prefix is called PAUSE. */
4256 if (prefixes
== PREFIX_REPZ
)
4257 strcpy (obuf
, "pause");
4260 static const char *const Suffix3DNow
[] = {
4261 /* 00 */ NULL
, NULL
, NULL
, NULL
,
4262 /* 04 */ NULL
, NULL
, NULL
, NULL
,
4263 /* 08 */ NULL
, NULL
, NULL
, NULL
,
4264 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
4265 /* 10 */ NULL
, NULL
, NULL
, NULL
,
4266 /* 14 */ NULL
, NULL
, NULL
, NULL
,
4267 /* 18 */ NULL
, NULL
, NULL
, NULL
,
4268 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
4269 /* 20 */ NULL
, NULL
, NULL
, NULL
,
4270 /* 24 */ NULL
, NULL
, NULL
, NULL
,
4271 /* 28 */ NULL
, NULL
, NULL
, NULL
,
4272 /* 2C */ NULL
, NULL
, NULL
, NULL
,
4273 /* 30 */ NULL
, NULL
, NULL
, NULL
,
4274 /* 34 */ NULL
, NULL
, NULL
, NULL
,
4275 /* 38 */ NULL
, NULL
, NULL
, NULL
,
4276 /* 3C */ NULL
, NULL
, NULL
, NULL
,
4277 /* 40 */ NULL
, NULL
, NULL
, NULL
,
4278 /* 44 */ NULL
, NULL
, NULL
, NULL
,
4279 /* 48 */ NULL
, NULL
, NULL
, NULL
,
4280 /* 4C */ NULL
, NULL
, NULL
, NULL
,
4281 /* 50 */ NULL
, NULL
, NULL
, NULL
,
4282 /* 54 */ NULL
, NULL
, NULL
, NULL
,
4283 /* 58 */ NULL
, NULL
, NULL
, NULL
,
4284 /* 5C */ NULL
, NULL
, NULL
, NULL
,
4285 /* 60 */ NULL
, NULL
, NULL
, NULL
,
4286 /* 64 */ NULL
, NULL
, NULL
, NULL
,
4287 /* 68 */ NULL
, NULL
, NULL
, NULL
,
4288 /* 6C */ NULL
, NULL
, NULL
, NULL
,
4289 /* 70 */ NULL
, NULL
, NULL
, NULL
,
4290 /* 74 */ NULL
, NULL
, NULL
, NULL
,
4291 /* 78 */ NULL
, NULL
, NULL
, NULL
,
4292 /* 7C */ NULL
, NULL
, NULL
, NULL
,
4293 /* 80 */ NULL
, NULL
, NULL
, NULL
,
4294 /* 84 */ NULL
, NULL
, NULL
, NULL
,
4295 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
4296 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
4297 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
4298 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
4299 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
4300 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
4301 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
4302 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
4303 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
4304 /* AC */ NULL
, NULL
, "pfacc", NULL
,
4305 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
4306 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
4307 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
4308 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
4309 /* C0 */ NULL
, NULL
, NULL
, NULL
,
4310 /* C4 */ NULL
, NULL
, NULL
, NULL
,
4311 /* C8 */ NULL
, NULL
, NULL
, NULL
,
4312 /* CC */ NULL
, NULL
, NULL
, NULL
,
4313 /* D0 */ NULL
, NULL
, NULL
, NULL
,
4314 /* D4 */ NULL
, NULL
, NULL
, NULL
,
4315 /* D8 */ NULL
, NULL
, NULL
, NULL
,
4316 /* DC */ NULL
, NULL
, NULL
, NULL
,
4317 /* E0 */ NULL
, NULL
, NULL
, NULL
,
4318 /* E4 */ NULL
, NULL
, NULL
, NULL
,
4319 /* E8 */ NULL
, NULL
, NULL
, NULL
,
4320 /* EC */ NULL
, NULL
, NULL
, NULL
,
4321 /* F0 */ NULL
, NULL
, NULL
, NULL
,
4322 /* F4 */ NULL
, NULL
, NULL
, NULL
,
4323 /* F8 */ NULL
, NULL
, NULL
, NULL
,
4324 /* FC */ NULL
, NULL
, NULL
, NULL
,
4328 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4330 const char *mnemonic
;
4332 FETCH_DATA (the_info
, codep
+ 1);
4333 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4334 place where an 8-bit immediate would normally go. ie. the last
4335 byte of the instruction. */
4336 obufp
= obuf
+ strlen (obuf
);
4337 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
4342 /* Since a variable sized modrm/sib chunk is between the start
4343 of the opcode (0x0f0f) and the opcode suffix, we need to do
4344 all the modrm processing first, and don't know until now that
4345 we have a bad opcode. This necessitates some cleaning up. */
4352 static const char *simd_cmp_op
[] = {
4364 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4366 unsigned int cmp_type
;
4368 FETCH_DATA (the_info
, codep
+ 1);
4369 obufp
= obuf
+ strlen (obuf
);
4370 cmp_type
= *codep
++ & 0xff;
4373 char suffix1
= 'p', suffix2
= 's';
4374 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4375 if (prefixes
& PREFIX_REPZ
)
4379 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4380 if (prefixes
& PREFIX_DATA
)
4384 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4385 if (prefixes
& PREFIX_REPNZ
)
4386 suffix1
= 's', suffix2
= 'd';
4389 sprintf (scratchbuf
, "cmp%s%c%c",
4390 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
4391 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4392 oappend (scratchbuf
);
4396 /* We have a bad extension byte. Clean up. */
4404 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
4406 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4407 forms of these instructions. */
4410 char *p
= obuf
+ strlen (obuf
);
4413 *(p
- 1) = *(p
- 2);
4414 *(p
- 2) = *(p
- 3);
4415 *(p
- 3) = extrachar
;
4420 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
4422 if (mod
== 3 && reg
== 1 && rm
<= 1)
4424 /* Override "sidt". */
4425 size_t olen
= strlen (obuf
);
4426 char *p
= obuf
+ olen
- 4;
4427 const char **names
= (address_mode
== mode_64bit
4428 ? names64
: names32
);
4430 /* We might have a suffix when disassembling with -Msuffix. */
4434 /* Remove "addr16/addr32" if we aren't in Intel mode. */
4436 && (prefixes
& PREFIX_ADDR
)
4439 && strncmp (p
- 7, "addr", 4) == 0
4440 && (strncmp (p
- 3, "16", 2) == 0
4441 || strncmp (p
- 3, "32", 2) == 0))
4446 /* mwait %eax,%ecx */
4447 strcpy (p
, "mwait");
4449 strcpy (op1out
, names
[0]);
4453 /* monitor %eax,%ecx,%edx" */
4454 strcpy (p
, "monitor");
4457 const char **op1_names
;
4458 if (!(prefixes
& PREFIX_ADDR
))
4459 op1_names
= (address_mode
== mode_16bit
4463 op1_names
= (address_mode
!= mode_32bit
4464 ? names32
: names16
);
4465 used_prefixes
|= PREFIX_ADDR
;
4467 strcpy (op1out
, op1_names
[0]);
4468 strcpy (op3out
, names
[2]);
4473 strcpy (op2out
, names
[1]);
4484 SVME_Fixup (int bytemode
, int sizeflag
)
4516 OP_M (bytemode
, sizeflag
);
4519 /* Override "lidt". */
4520 p
= obuf
+ strlen (obuf
) - 4;
4521 /* We might have a suffix. */
4525 if (!(prefixes
& PREFIX_ADDR
))
4530 used_prefixes
|= PREFIX_ADDR
;
4534 strcpy (op2out
, names32
[1]);
4540 *obufp
++ = open_char
;
4541 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
4545 strcpy (obufp
, alt
);
4546 obufp
+= strlen (alt
);
4547 *obufp
++ = close_char
;
4554 INVLPG_Fixup (int bytemode
, int sizeflag
)
4567 OP_M (bytemode
, sizeflag
);
4570 /* Override "invlpg". */
4571 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
4578 /* Throw away prefixes and 1st. opcode byte. */
4579 codep
= insn_codep
+ 1;
4584 SEG_Fixup (int extrachar
, int sizeflag
)
4588 /* We need to add a proper suffix with
4599 if (prefixes
& PREFIX_DATA
)
4603 USED_REX (REX_MODE64
);
4604 if (rex
& REX_MODE64
)
4609 strcat (obuf
, suffix
);
4613 /* We need to fix the suffix for
4620 Override "mov[l|q]". */
4621 char *p
= obuf
+ strlen (obuf
) - 1;
4623 /* We might not have a suffix. */
4629 OP_E (extrachar
, sizeflag
);
4633 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
4635 if (mod
== 3 && reg
== 0 && rm
>=1 && rm
<= 4)
4637 /* Override "sgdt". */
4638 char *p
= obuf
+ strlen (obuf
) - 4;
4640 /* We might have a suffix when disassembling with -Msuffix. */
4647 strcpy (p
, "vmcall");
4650 strcpy (p
, "vmlaunch");
4653 strcpy (p
, "vmresume");
4656 strcpy (p
, "vmxoff");
4667 OP_VMX (int bytemode
, int sizeflag
)
4669 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
4670 if (prefixes
& PREFIX_DATA
)
4671 strcpy (obuf
, "vmclear");
4672 else if (prefixes
& PREFIX_REPZ
)
4673 strcpy (obuf
, "vmxon");
4675 strcpy (obuf
, "vmptrld");
4676 OP_E (bytemode
, sizeflag
);