opcodes/i386-dis.c

   1 /* Print i386 instructions for GDB, the GNU debugger.
   2    Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 1997
   3    Free Software Foundation, Inc.
   4
   5 This file is part of GDB.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 /*
  22  * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  23  * July 1988
  24  *  modified by John Hassey (hassey@dg-rtp.dg.com)
  25  */
  26
  27 /*
  28  * The main tables describing the instructions is essentially a copy
  29  * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  30  * Programmers Manual.  Usually, there is a capital letter, followed
  31  * by a small letter.  The capital letter tell the addressing mode,
  32  * and the small letter tells about the operand size.  Refer to
  33  * the Intel manual for details.
  34  */
  35
  36 #include "dis-asm.h"
  37 #include "sysdep.h"
  38
  39 #define MAXLEN 20
  40
  41 #include <setjmp.h>
  42
  43 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
  44
  45 struct dis_private
  46 {
  47   /* Points to first byte not fetched.  */
  48   bfd_byte *max_fetched;
  49   bfd_byte the_buffer[MAXLEN];
  50   bfd_vma insn_start;
  51   jmp_buf bailout;
  52 };
  53
  54 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
  55    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
  56    on error.  */
  57 #define FETCH_DATA(info, addr) \
  58   ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
  59    ? 1 : fetch_data ((info), (addr)))
  60
  61 static int
  62 fetch_data (info, addr)
  63      struct disassemble_info *info;
  64      bfd_byte *addr;
  65 {
  66   int status;
  67   struct dis_private *priv = (struct dis_private *)info->private_data;
  68   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
  69
  70   status = (*info->read_memory_func) (start,
  71                                       priv->max_fetched,
  72                                       addr - priv->max_fetched,
  73                                       info);
  74   if (status != 0)
  75     {
  76       (*info->memory_error_func) (status, start, info);
  77       longjmp (priv->bailout, 1);
  78     }
  79   else
  80     priv->max_fetched = addr;
  81   return 1;
  82 }
  83
  84 #define Eb OP_E, b_mode
  85 #define indirEb OP_indirE, b_mode
  86 #define Gb OP_G, b_mode
  87 #define Ev OP_E, v_mode
  88 #define indirEv OP_indirE, v_mode
  89 #define Ew OP_E, w_mode
  90 #define Ma OP_E, v_mode
  91 #define M OP_E, 0
  92 #define Mp OP_E, 0              /* ? */
  93 #define Gv OP_G, v_mode
  94 #define Gw OP_G, w_mode
  95 #define Rw OP_rm, w_mode
  96 #define Rd OP_rm, d_mode
  97 #define Ib OP_I, b_mode
  98 #define sIb OP_sI, b_mode       /* sign extened byte */
  99 #define Iv OP_I, v_mode
 100 #define Iw OP_I, w_mode
 101 #define Jb OP_J, b_mode
 102 #define Jv OP_J, v_mode
 103 #if 0
 104 #define ONE OP_ONE, 0
 105 #endif
 106 #define Cd OP_C, d_mode
 107 #define Dd OP_D, d_mode
 108 #define Td OP_T, d_mode
 109
 110 #define eAX OP_REG, eAX_reg
 111 #define eBX OP_REG, eBX_reg
 112 #define eCX OP_REG, eCX_reg
 113 #define eDX OP_REG, eDX_reg
 114 #define eSP OP_REG, eSP_reg
 115 #define eBP OP_REG, eBP_reg
 116 #define eSI OP_REG, eSI_reg
 117 #define eDI OP_REG, eDI_reg
 118 #define AL OP_REG, al_reg
 119 #define CL OP_REG, cl_reg
 120 #define DL OP_REG, dl_reg
 121 #define BL OP_REG, bl_reg
 122 #define AH OP_REG, ah_reg
 123 #define CH OP_REG, ch_reg
 124 #define DH OP_REG, dh_reg
 125 #define BH OP_REG, bh_reg
 126 #define AX OP_REG, ax_reg
 127 #define DX OP_REG, dx_reg
 128 #define indirDX OP_REG, indir_dx_reg
 129
 130 #define Sw OP_SEG, w_mode
 131 #define Ap OP_DIR, lptr
 132 #define Av OP_DIR, v_mode
 133 #define Ob OP_OFF, b_mode
 134 #define Ov OP_OFF, v_mode
 135 #define Xb OP_DSSI, b_mode
 136 #define Xv OP_DSSI, v_mode
 137 #define Yb OP_ESDI, b_mode
 138 #define Yv OP_ESDI, v_mode
 139
 140 #define es OP_REG, es_reg
 141 #define ss OP_REG, ss_reg
 142 #define cs OP_REG, cs_reg
 143 #define ds OP_REG, ds_reg
 144 #define fs OP_REG, fs_reg
 145 #define gs OP_REG, gs_reg
 146
 147 #define MX OP_MMX, 0
 148 #define EM OP_EM, v_mode
 149 #define MS OP_MS, b_mode
 150
 151 typedef int (*op_rtn) PARAMS ((int bytemode, int aflag, int dflag));
 152
 153 static int OP_E PARAMS ((int, int, int));
 154 static int OP_G PARAMS ((int, int, int));
 155 static int OP_I PARAMS ((int, int, int));
 156 static int OP_indirE PARAMS ((int, int, int));
 157 static int OP_sI PARAMS ((int, int, int));
 158 static int OP_REG PARAMS ((int, int, int));
 159 static int OP_J PARAMS ((int, int, int));
 160 static int OP_DIR PARAMS ((int, int, int));
 161 static int OP_OFF PARAMS ((int, int, int));
 162 static int OP_ESDI PARAMS ((int, int, int));
 163 static int OP_DSSI PARAMS ((int, int, int));
 164 static int OP_SEG PARAMS ((int, int, int));
 165 static int OP_C PARAMS ((int, int, int));
 166 static int OP_D PARAMS ((int, int, int));
 167 static int OP_T PARAMS ((int, int, int));
 168 static int OP_rm PARAMS ((int, int, int));
 169 static int OP_ST PARAMS ((int, int, int));
 170 static int OP_STi  PARAMS ((int, int, int));
 171 #if 0
 172 static int OP_ONE PARAMS ((int, int, int));
 173 #endif
 174 static int OP_MMX PARAMS ((int, int, int));
 175 static int OP_EM PARAMS ((int, int, int));
 176 static int OP_MS PARAMS ((int, int, int));
 177
 178 static void append_prefix PARAMS ((void));
 179 static void set_op PARAMS ((int op));
 180 static void putop PARAMS ((char *template, int aflag, int dflag));
 181 static void dofloat PARAMS ((int aflag, int dflag));
 182 static int get16 PARAMS ((void));
 183 static int get32 PARAMS ((void));
 184 static void ckprefix PARAMS ((void));
 185
 186 #define b_mode 1
 187 #define v_mode 2
 188 #define w_mode 3
 189 #define d_mode 4
 190
 191 #define es_reg 100
 192 #define cs_reg 101
 193 #define ss_reg 102
 194 #define ds_reg 103
 195 #define fs_reg 104
 196 #define gs_reg 105
 197 #define eAX_reg 107
 198 #define eCX_reg 108
 199 #define eDX_reg 109
 200 #define eBX_reg 110
 201 #define eSP_reg 111
 202 #define eBP_reg 112
 203 #define eSI_reg 113
 204 #define eDI_reg 114
 205
 206 #define lptr 115
 207
 208 #define al_reg 116
 209 #define cl_reg 117
 210 #define dl_reg 118
 211 #define bl_reg 119
 212 #define ah_reg 120
 213 #define ch_reg 121
 214 #define dh_reg 122
 215 #define bh_reg 123
 216
 217 #define ax_reg 124
 218 #define cx_reg 125
 219 #define dx_reg 126
 220 #define bx_reg 127
 221 #define sp_reg 128
 222 #define bp_reg 129
 223 #define si_reg 130
 224 #define di_reg 131
 225
 226 #define indir_dx_reg 150
 227
 228 #define GRP1b NULL, NULL, 0
 229 #define GRP1S NULL, NULL, 1
 230 #define GRP1Ss NULL, NULL, 2
 231 #define GRP2b NULL, NULL, 3
 232 #define GRP2S NULL, NULL, 4
 233 #define GRP2b_one NULL, NULL, 5
 234 #define GRP2S_one NULL, NULL, 6
 235 #define GRP2b_cl NULL, NULL, 7
 236 #define GRP2S_cl NULL, NULL, 8
 237 #define GRP3b NULL, NULL, 9
 238 #define GRP3S NULL, NULL, 10
 239 #define GRP4  NULL, NULL, 11
 240 #define GRP5  NULL, NULL, 12
 241 #define GRP6  NULL, NULL, 13
 242 #define GRP7 NULL, NULL, 14
 243 #define GRP8 NULL, NULL, 15
 244 #define GRP9 NULL, NULL, 16
 245 #define GRP10 NULL, NULL, 17
 246 #define GRP11 NULL, NULL, 18
 247 #define GRP12 NULL, NULL, 19
 248
 249 #define FLOATCODE 50
 250 #define FLOAT NULL, NULL, FLOATCODE
 251
 252 struct dis386 {
 253   char *name;
 254   op_rtn op1;
 255   int bytemode1;
 256   op_rtn op2;
 257   int bytemode2;
 258   op_rtn op3;
 259   int bytemode3;
 260 };
 261
 262 static struct dis386 dis386[] = {
 263   /* 00 */
 264   { "addb",     Eb, Gb },
 265   { "addS",     Ev, Gv },
 266   { "addb",     Gb, Eb },
 267   { "addS",     Gv, Ev },
 268   { "addb",     AL, Ib },
 269   { "addS",     eAX, Iv },
 270   { "pushS",    es },
 271   { "popS",     es },
 272   /* 08 */
 273   { "orb",      Eb, Gb },
 274   { "orS",      Ev, Gv },
 275   { "orb",      Gb, Eb },
 276   { "orS",      Gv, Ev },
 277   { "orb",      AL, Ib },
 278   { "orS",      eAX, Iv },
 279   { "pushS",    cs },
 280   { "(bad)" },  /* 0x0f extended opcode escape */
 281   /* 10 */
 282   { "adcb",     Eb, Gb },
 283   { "adcS",     Ev, Gv },
 284   { "adcb",     Gb, Eb },
 285   { "adcS",     Gv, Ev },
 286   { "adcb",     AL, Ib },
 287   { "adcS",     eAX, Iv },
 288   { "pushS",    ss },
 289   { "popS",     ss },
 290   /* 18 */
 291   { "sbbb",     Eb, Gb },
 292   { "sbbS",     Ev, Gv },
 293   { "sbbb",     Gb, Eb },
 294   { "sbbS",     Gv, Ev },
 295   { "sbbb",     AL, Ib },
 296   { "sbbS",     eAX, Iv },
 297   { "pushS",    ds },
 298   { "popS",     ds },
 299   /* 20 */
 300   { "andb",     Eb, Gb },
 301   { "andS",     Ev, Gv },
 302   { "andb",     Gb, Eb },
 303   { "andS",     Gv, Ev },
 304   { "andb",     AL, Ib },
 305   { "andS",     eAX, Iv },
 306   { "(bad)" },                  /* SEG ES prefix */
 307   { "daa" },
 308   /* 28 */
 309   { "subb",     Eb, Gb },
 310   { "subS",     Ev, Gv },
 311   { "subb",     Gb, Eb },
 312   { "subS",     Gv, Ev },
 313   { "subb",     AL, Ib },
 314   { "subS",     eAX, Iv },
 315   { "(bad)" },                  /* SEG CS prefix */
 316   { "das" },
 317   /* 30 */
 318   { "xorb",     Eb, Gb },
 319   { "xorS",     Ev, Gv },
 320   { "xorb",     Gb, Eb },
 321   { "xorS",     Gv, Ev },
 322   { "xorb",     AL, Ib },
 323   { "xorS",     eAX, Iv },
 324   { "(bad)" },                  /* SEG SS prefix */
 325   { "aaa" },
 326   /* 38 */
 327   { "cmpb",     Eb, Gb },
 328   { "cmpS",     Ev, Gv },
 329   { "cmpb",     Gb, Eb },
 330   { "cmpS",     Gv, Ev },
 331   { "cmpb",     AL, Ib },
 332   { "cmpS",     eAX, Iv },
 333   { "(bad)" },                  /* SEG DS prefix */
 334   { "aas" },
 335   /* 40 */
 336   { "incS",     eAX },
 337   { "incS",     eCX },
 338   { "incS",     eDX },
 339   { "incS",     eBX },
 340   { "incS",     eSP },
 341   { "incS",     eBP },
 342   { "incS",     eSI },
 343   { "incS",     eDI },
 344   /* 48 */
 345   { "decS",     eAX },
 346   { "decS",     eCX },
 347   { "decS",     eDX },
 348   { "decS",     eBX },
 349   { "decS",     eSP },
 350   { "decS",     eBP },
 351   { "decS",     eSI },
 352   { "decS",     eDI },
 353   /* 50 */
 354   { "pushS",    eAX },
 355   { "pushS",    eCX },
 356   { "pushS",    eDX },
 357   { "pushS",    eBX },
 358   { "pushS",    eSP },
 359   { "pushS",    eBP },
 360   { "pushS",    eSI },
 361   { "pushS",    eDI },
 362   /* 58 */
 363   { "popS",     eAX },
 364   { "popS",     eCX },
 365   { "popS",     eDX },
 366   { "popS",     eBX },
 367   { "popS",     eSP },
 368   { "popS",     eBP },
 369   { "popS",     eSI },
 370   { "popS",     eDI },
 371   /* 60 */
 372   { "pusha" },
 373   { "popa" },
 374   { "boundS",   Gv, Ma },
 375   { "arpl",     Ew, Gw },
 376   { "(bad)" },                  /* seg fs */
 377   { "(bad)" },                  /* seg gs */
 378   { "(bad)" },                  /* op size prefix */
 379   { "(bad)" },                  /* adr size prefix */
 380   /* 68 */
 381   { "pushS",    Iv },           /* 386 book wrong */
 382   { "imulS",    Gv, Ev, Iv },
 383   { "pushS",    sIb },          /* push of byte really pushes 2 or 4 bytes */
 384   { "imulS",    Gv, Ev, Ib },
 385   { "insb",     Yb, indirDX },
 386   { "insS",     Yv, indirDX },
 387   { "outsb",    indirDX, Xb },
 388   { "outsS",    indirDX, Xv },
 389   /* 70 */
 390   { "jo",       Jb },
 391   { "jno",      Jb },
 392   { "jb",       Jb },
 393   { "jae",      Jb },
 394   { "je",       Jb },
 395   { "jne",      Jb },
 396   { "jbe",      Jb },
 397   { "ja",       Jb },
 398   /* 78 */
 399   { "js",       Jb },
 400   { "jns",      Jb },
 401   { "jp",       Jb },
 402   { "jnp",      Jb },
 403   { "jl",       Jb },
 404   { "jnl",      Jb },
 405   { "jle",      Jb },
 406   { "jg",       Jb },
 407   /* 80 */
 408   { GRP1b },
 409   { GRP1S },
 410   { "(bad)" },
 411   { GRP1Ss },
 412   { "testb",    Eb, Gb },
 413   { "testS",    Ev, Gv },
 414   { "xchgb",    Eb, Gb },
 415   { "xchgS",    Ev, Gv },
 416   /* 88 */
 417   { "movb",     Eb, Gb },
 418   { "movS",     Ev, Gv },
 419   { "movb",     Gb, Eb },
 420   { "movS",     Gv, Ev },
 421   { "movw",     Ew, Sw },
 422   { "leaS",     Gv, M },
 423   { "movw",     Sw, Ew },
 424   { "popS",     Ev },
 425   /* 90 */
 426   { "nop" },
 427   { "xchgS",    eCX, eAX },
 428   { "xchgS",    eDX, eAX },
 429   { "xchgS",    eBX, eAX },
 430   { "xchgS",    eSP, eAX },
 431   { "xchgS",    eBP, eAX },
 432   { "xchgS",    eSI, eAX },
 433   { "xchgS",    eDI, eAX },
 434   /* 98 */
 435   { "cWtS" },
 436   { "cStd" },
 437   { "lcall",    Ap },
 438   { "(bad)" },          /* fwait */
 439   { "pushf" },
 440   { "popf" },
 441   { "sahf" },
 442   { "lahf" },
 443   /* a0 */
 444   { "movb",     AL, Ob },
 445   { "movS",     eAX, Ov },
 446   { "movb",     Ob, AL },
 447   { "movS",     Ov, eAX },
 448   { "movsb",    Yb, Xb },
 449   { "movsS",    Yv, Xv },
 450   { "cmpsb",    Yb, Xb },
 451   { "cmpsS",    Yv, Xv },
 452   /* a8 */
 453   { "testb",    AL, Ib },
 454   { "testS",    eAX, Iv },
 455   { "stosb",    Yb, AL },
 456   { "stosS",    Yv, eAX },
 457   { "lodsb",    AL, Xb },
 458   { "lodsS",    eAX, Xv },
 459   { "scasb",    AL, Yb },
 460   { "scasS",    eAX, Yv },
 461   /* b0 */
 462   { "movb",     AL, Ib },
 463   { "movb",     CL, Ib },
 464   { "movb",     DL, Ib },
 465   { "movb",     BL, Ib },
 466   { "movb",     AH, Ib },
 467   { "movb",     CH, Ib },
 468   { "movb",     DH, Ib },
 469   { "movb",     BH, Ib },
 470   /* b8 */
 471   { "movS",     eAX, Iv },
 472   { "movS",     eCX, Iv },
 473   { "movS",     eDX, Iv },
 474   { "movS",     eBX, Iv },
 475   { "movS",     eSP, Iv },
 476   { "movS",     eBP, Iv },
 477   { "movS",     eSI, Iv },
 478   { "movS",     eDI, Iv },
 479   /* c0 */
 480   { GRP2b },
 481   { GRP2S },
 482   { "ret",      Iw },
 483   { "ret" },
 484   { "lesS",     Gv, Mp },
 485   { "ldsS",     Gv, Mp },
 486   { "movb",     Eb, Ib },
 487   { "movS",     Ev, Iv },
 488   /* c8 */
 489   { "enter",    Iw, Ib },
 490   { "leave" },
 491   { "lret",     Iw },
 492   { "lret" },
 493   { "int3" },
 494   { "int",      Ib },
 495   { "into" },
 496   { "iret" },
 497   /* d0 */
 498   { GRP2b_one },
 499   { GRP2S_one },
 500   { GRP2b_cl },
 501   { GRP2S_cl },
 502   { "aam",      Ib },
 503   { "aad",      Ib },
 504   { "(bad)" },
 505   { "xlat" },
 506   /* d8 */
 507   { FLOAT },
 508   { FLOAT },
 509   { FLOAT },
 510   { FLOAT },
 511   { FLOAT },
 512   { FLOAT },
 513   { FLOAT },
 514   { FLOAT },
 515   /* e0 */
 516   { "loopne",   Jb },
 517   { "loope",    Jb },
 518   { "loop",     Jb },
 519   { "jCcxz",    Jb },
 520   { "inb",      AL, Ib },
 521   { "inS",      eAX, Ib },
 522   { "outb",     Ib, AL },
 523   { "outS",     Ib, eAX },
 524   /* e8 */
 525   { "call",     Av },
 526   { "jmp",      Jv },
 527   { "ljmp",     Ap },
 528   { "jmp",      Jb },
 529   { "inb",      AL, indirDX },
 530   { "inS",      eAX, indirDX },
 531   { "outb",     indirDX, AL },
 532   { "outS",     indirDX, eAX },
 533   /* f0 */
 534   { "(bad)" },                  /* lock prefix */
 535   { "(bad)" },
 536   { "(bad)" },                  /* repne */
 537   { "(bad)" },                  /* repz */
 538   { "hlt" },
 539   { "cmc" },
 540   { GRP3b },
 541   { GRP3S },
 542   /* f8 */
 543   { "clc" },
 544   { "stc" },
 545   { "cli" },
 546   { "sti" },
 547   { "cld" },
 548   { "std" },
 549   { GRP4 },
 550   { GRP5 },
 551 };
 552
 553 static struct dis386 dis386_twobyte[] = {
 554   /* 00 */
 555   { GRP6 },
 556   { GRP7 },
 557   { "larS", Gv, Ew },
 558   { "lslS", Gv, Ew },
 559   { "(bad)" },
 560   { "(bad)" },
 561   { "clts" },
 562   { "(bad)" },
 563   /* 08 */
 564   { "invd" },
 565   { "wbinvd" },
 566   { "(bad)" },  { "ud2a" },
 567   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 568   /* 10 */
 569   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 570   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 571   /* 18 */
 572   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 573   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 574   /* 20 */
 575   /* these are all backward in appendix A of the intel book */
 576   { "movl", Rd, Cd },
 577   { "movl", Rd, Dd },
 578   { "movl", Cd, Rd },
 579   { "movl", Dd, Rd },
 580   { "movl", Rd, Td },
 581   { "(bad)" },
 582   { "movl", Td, Rd },
 583   { "(bad)" },
 584   /* 28 */
 585   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 586   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 587   /* 30 */
 588   { "wrmsr" },  { "rdtsc" },  { "rdmsr" },  { "rdpmc" },
 589   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 590   /* 38 */
 591   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 592   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 593   /* 40 */
 594   { "cmovo", Gv,Ev }, { "cmovno", Gv,Ev }, { "cmovb", Gv,Ev }, { "cmovae", Gv,Ev },
 595   { "cmove", Gv,Ev }, { "cmovne", Gv,Ev }, { "cmovbe", Gv,Ev }, { "cmova", Gv,Ev },
 596   /* 48 */
 597   { "cmovs", Gv,Ev }, { "cmovns", Gv,Ev }, { "cmovp", Gv,Ev }, { "cmovnp", Gv,Ev },
 598   { "cmovl", Gv,Ev }, { "cmovge", Gv,Ev }, { "cmovle", Gv,Ev }, { "cmovg", Gv,Ev },
 599   /* 50 */
 600   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 601   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 602   /* 58 */
 603   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 604   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 605   /* 60 */
 606   { "punpcklbw", MX, EM },
 607   { "punpcklwd", MX, EM },
 608   { "punpckldq", MX, EM },
 609   { "packsswb", MX, EM },
 610   { "pcmpgtb", MX, EM },
 611   { "pcmpgtw", MX, EM },
 612   { "pcmpgtd", MX, EM },
 613   { "packuswb", MX, EM },
 614   /* 68 */
 615   { "punpckhbw", MX, EM },
 616   { "punpckhwd", MX, EM },
 617   { "punpckhdq", MX, EM },
 618   { "packssdw", MX, EM },
 619   { "(bad)" },  { "(bad)" },
 620   { "movd", MX, Ev },
 621   { "movq", MX, EM },
 622   /* 70 */
 623   { "(bad)" },
 624   { GRP10 },
 625   { GRP11 },
 626   { GRP12 },
 627   { "pcmpeqb", MX, EM },
 628   { "pcmpeqw", MX, EM },
 629   { "pcmpeqd", MX, EM },
 630   { "emms" },
 631   /* 78 */
 632   { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },
 633   { "(bad)" },  { "(bad)" },
 634   { "movd", Ev, MX },
 635   { "movq", EM, MX },
 636   /* 80 */
 637   { "jo", Jv },
 638   { "jno", Jv },
 639   { "jb", Jv },
 640   { "jae", Jv },
 641   { "je", Jv },
 642   { "jne", Jv },
 643   { "jbe", Jv },
 644   { "ja", Jv },
 645   /* 88 */
 646   { "js", Jv },
 647   { "jns", Jv },
 648   { "jp", Jv },
 649   { "jnp", Jv },
 650   { "jl", Jv },
 651   { "jge", Jv },
 652   { "jle", Jv },
 653   { "jg", Jv },
 654   /* 90 */
 655   { "seto", Eb },
 656   { "setno", Eb },
 657   { "setb", Eb },
 658   { "setae", Eb },
 659   { "sete", Eb },
 660   { "setne", Eb },
 661   { "setbe", Eb },
 662   { "seta", Eb },
 663   /* 98 */
 664   { "sets", Eb },
 665   { "setns", Eb },
 666   { "setp", Eb },
 667   { "setnp", Eb },
 668   { "setl", Eb },
 669   { "setge", Eb },
 670   { "setle", Eb },
 671   { "setg", Eb },
 672   /* a0 */
 673   { "pushS", fs },
 674   { "popS", fs },
 675   { "cpuid" },
 676   { "btS", Ev, Gv },
 677   { "shldS", Ev, Gv, Ib },
 678   { "shldS", Ev, Gv, CL },
 679   { "(bad)" },
 680   { "(bad)" },
 681   /* a8 */
 682   { "pushS", gs },
 683   { "popS", gs },
 684   { "rsm" },
 685   { "btsS", Ev, Gv },
 686   { "shrdS", Ev, Gv, Ib },
 687   { "shrdS", Ev, Gv, CL },
 688   { "(bad)" },
 689   { "imulS", Gv, Ev },
 690   /* b0 */
 691   { "cmpxchgb", Eb, Gb },
 692   { "cmpxchgS", Ev, Gv },
 693   { "lssS", Gv, Mp },   /* 386 lists only Mp */
 694   { "btrS", Ev, Gv },
 695   { "lfsS", Gv, Mp },   /* 386 lists only Mp */
 696   { "lgsS", Gv, Mp },   /* 386 lists only Mp */
 697   { "movzbS", Gv, Eb },
 698   { "movzwS", Gv, Ew },
 699   /* b8 */
 700   { "ud2b" },
 701   { "(bad)" },
 702   { GRP8 },
 703   { "btcS", Ev, Gv },
 704   { "bsfS", Gv, Ev },
 705   { "bsrS", Gv, Ev },
 706   { "movsbS", Gv, Eb },
 707   { "movswS", Gv, Ew },
 708   /* c0 */
 709   { "xaddb", Eb, Gb },
 710   { "xaddS", Ev, Gv },
 711   { "(bad)" },
 712   { "(bad)" },
 713   { "(bad)" },
 714   { "(bad)" },
 715   { "(bad)" },
 716   { GRP9 },
 717   /* c8 */
 718   { "bswap", eAX },
 719   { "bswap", eCX },
 720   { "bswap", eDX },
 721   { "bswap", eBX },
 722   { "bswap", eSP },
 723   { "bswap", eBP },
 724   { "bswap", eSI },
 725   { "bswap", eDI },
 726   /* d0 */
 727   { "(bad)" },
 728   { "psrlw", MX, EM },
 729   { "psrld", MX, EM },
 730   { "psrlq", MX, EM },
 731   { "(bad)" },
 732   { "pmullw", MX, EM },
 733   { "(bad)" },  { "(bad)" },
 734   /* d8 */
 735   { "psubusb", MX, EM },
 736   { "psubusw", MX, EM },
 737   { "(bad)" },
 738   { "pand", MX, EM },
 739   { "paddusb", MX, EM },
 740   { "paddusw", MX, EM },
 741   { "(bad)" },
 742   { "pandn", MX, EM },
 743   /* e0 */
 744   { "(bad)" },
 745   { "psraw", MX, EM },
 746   { "psrad", MX, EM },
 747   { "(bad)" },
 748   { "(bad)" },
 749   { "pmulhw", MX, EM },
 750   { "(bad)" },  { "(bad)" },
 751   /* e8 */
 752   { "psubsb", MX, EM },
 753   { "psubsw", MX, EM },
 754   { "(bad)" },
 755   { "por", MX, EM },
 756   { "paddsb", MX, EM },
 757   { "paddsw", MX, EM },
 758   { "(bad)" },
 759   { "pxor", MX, EM },
 760   /* f0 */
 761   { "(bad)" },
 762   { "psllw", MX, EM },
 763   { "pslld", MX, EM },
 764   { "psllq", MX, EM },
 765   { "(bad)" },
 766   { "pmaddwd", MX, EM },
 767   { "(bad)" },  { "(bad)" },
 768   /* f8 */
 769   { "psubb", MX, EM },
 770   { "psubw", MX, EM },
 771   { "psubd", MX, EM },
 772   { "(bad)" },
 773   { "paddb", MX, EM },
 774   { "paddw", MX, EM },
 775   { "paddd", MX, EM },
 776   { "(bad)" }
 777 };
 778
 779 static const unsigned char onebyte_has_modrm[256] = {
 780   1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
 781   1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
 782   1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
 783   1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
 784   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 785   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 786   0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0,
 787   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 788   1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
 789   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 790   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 791   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 792   1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
 793   1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
 794   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
 795   0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1
 796 };
 797
 798 static const unsigned char twobyte_has_modrm[256] = {
 799   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
 800   /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
 801   /* 20 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* 2f */
 802   /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
 803   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
 804   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
 805   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
 806   /* 70 */ 0,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
 807   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
 808   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
 809   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
 810   /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
 811   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
 812   /* d0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,0,1, /* df */
 813   /* e0 */ 0,1,1,0,0,1,0,0,1,1,0,1,1,1,0,1, /* ef */
 814   /* f0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,1,0  /* ff */
 815 };
 816
 817 static char obuf[100];
 818 static char *obufp;
 819 static char scratchbuf[100];
 820 static unsigned char *start_codep;
 821 static unsigned char *codep;
 822 static disassemble_info *the_info;
 823 static int mod;
 824 static int rm;
 825 static int reg;
 826 static void oappend PARAMS ((char *s));
 827
 828 static char *names32[]={
 829   "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
 830 };
 831 static char *names16[] = {
 832   "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
 833 };
 834 static char *names8[] = {
 835   "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
 836 };
 837 static char *names_seg[] = {
 838   "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
 839 };
 840 static char *index16[] = {
 841   "bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
 842 };
 843
 844 static struct dis386 grps[][8] = {
 845   /* GRP1b */
 846   {
 847     { "addb",   Eb, Ib },
 848     { "orb",    Eb, Ib },
 849     { "adcb",   Eb, Ib },
 850     { "sbbb",   Eb, Ib },
 851     { "andb",   Eb, Ib },
 852     { "subb",   Eb, Ib },
 853     { "xorb",   Eb, Ib },
 854     { "cmpb",   Eb, Ib }
 855   },
 856   /* GRP1S */
 857   {
 858     { "addS",   Ev, Iv },
 859     { "orS",    Ev, Iv },
 860     { "adcS",   Ev, Iv },
 861     { "sbbS",   Ev, Iv },
 862     { "andS",   Ev, Iv },
 863     { "subS",   Ev, Iv },
 864     { "xorS",   Ev, Iv },
 865     { "cmpS",   Ev, Iv }
 866   },
 867   /* GRP1Ss */
 868   {
 869     { "addS",   Ev, sIb },
 870     { "orS",    Ev, sIb },
 871     { "adcS",   Ev, sIb },
 872     { "sbbS",   Ev, sIb },
 873     { "andS",   Ev, sIb },
 874     { "subS",   Ev, sIb },
 875     { "xorS",   Ev, sIb },
 876     { "cmpS",   Ev, sIb }
 877   },
 878   /* GRP2b */
 879   {
 880     { "rolb",   Eb, Ib },
 881     { "rorb",   Eb, Ib },
 882     { "rclb",   Eb, Ib },
 883     { "rcrb",   Eb, Ib },
 884     { "shlb",   Eb, Ib },
 885     { "shrb",   Eb, Ib },
 886     { "(bad)" },
 887     { "sarb",   Eb, Ib },
 888   },
 889   /* GRP2S */
 890   {
 891     { "rolS",   Ev, Ib },
 892     { "rorS",   Ev, Ib },
 893     { "rclS",   Ev, Ib },
 894     { "rcrS",   Ev, Ib },
 895     { "shlS",   Ev, Ib },
 896     { "shrS",   Ev, Ib },
 897     { "(bad)" },
 898     { "sarS",   Ev, Ib },
 899   },
 900   /* GRP2b_one */
 901   {
 902     { "rolb",   Eb },
 903     { "rorb",   Eb },
 904     { "rclb",   Eb },
 905     { "rcrb",   Eb },
 906     { "shlb",   Eb },
 907     { "shrb",   Eb },
 908     { "(bad)" },
 909     { "sarb",   Eb },
 910   },
 911   /* GRP2S_one */
 912   {
 913     { "rolS",   Ev },
 914     { "rorS",   Ev },
 915     { "rclS",   Ev },
 916     { "rcrS",   Ev },
 917     { "shlS",   Ev },
 918     { "shrS",   Ev },
 919     { "(bad)" },
 920     { "sarS",   Ev },
 921   },
 922   /* GRP2b_cl */
 923   {
 924     { "rolb",   Eb, CL },
 925     { "rorb",   Eb, CL },
 926     { "rclb",   Eb, CL },
 927     { "rcrb",   Eb, CL },
 928     { "shlb",   Eb, CL },
 929     { "shrb",   Eb, CL },
 930     { "(bad)" },
 931     { "sarb",   Eb, CL },
 932   },
 933   /* GRP2S_cl */
 934   {
 935     { "rolS",   Ev, CL },
 936     { "rorS",   Ev, CL },
 937     { "rclS",   Ev, CL },
 938     { "rcrS",   Ev, CL },
 939     { "shlS",   Ev, CL },
 940     { "shrS",   Ev, CL },
 941     { "(bad)" },
 942     { "sarS",   Ev, CL }
 943   },
 944   /* GRP3b */
 945   {
 946     { "testb",  Eb, Ib },
 947     { "(bad)",  Eb },
 948     { "notb",   Eb },
 949     { "negb",   Eb },
 950     { "mulb",   AL, Eb },
 951     { "imulb",  AL, Eb },
 952     { "divb",   AL, Eb },
 953     { "idivb",  AL, Eb }
 954   },
 955   /* GRP3S */
 956   {
 957     { "testS",  Ev, Iv },
 958     { "(bad)" },
 959     { "notS",   Ev },
 960     { "negS",   Ev },
 961     { "mulS",   eAX, Ev },
 962     { "imulS",  eAX, Ev },
 963     { "divS",   eAX, Ev },
 964     { "idivS",  eAX, Ev },
 965   },
 966   /* GRP4 */
 967   {
 968     { "incb", Eb },
 969     { "decb", Eb },
 970     { "(bad)" },
 971     { "(bad)" },
 972     { "(bad)" },
 973     { "(bad)" },
 974     { "(bad)" },
 975     { "(bad)" },
 976   },
 977   /* GRP5 */
 978   {
 979     { "incS",   Ev },
 980     { "decS",   Ev },
 981     { "call",   indirEv },
 982     { "lcall",  indirEv },
 983     { "jmp",    indirEv },
 984     { "ljmp",   indirEv },
 985     { "pushS",  Ev },
 986     { "(bad)" },
 987   },
 988   /* GRP6 */
 989   {
 990     { "sldt",   Ew },
 991     { "str",    Ew },
 992     { "lldt",   Ew },
 993     { "ltr",    Ew },
 994     { "verr",   Ew },
 995     { "verw",   Ew },
 996     { "(bad)" },
 997     { "(bad)" }
 998   },
 999   /* GRP7 */
1000   {
1001     { "sgdt", Ew },
1002     { "sidt", Ew },
1003     { "lgdt", Ew },
1004     { "lidt", Ew },
1005     { "smsw", Ew },
1006     { "(bad)" },
1007     { "lmsw", Ew },
1008     { "invlpg", Ew },
1009   },
1010   /* GRP8 */
1011   {
1012     { "(bad)" },
1013     { "(bad)" },
1014     { "(bad)" },
1015     { "(bad)" },
1016     { "btS",    Ev, Ib },
1017     { "btsS",   Ev, Ib },
1018     { "btrS",   Ev, Ib },
1019     { "btcS",   Ev, Ib },
1020   },
1021   /* GRP9 */
1022   {
1023     { "(bad)" },
1024     { "cmpxchg8b", Ev },
1025     { "(bad)" },
1026     { "(bad)" },
1027     { "(bad)" },
1028     { "(bad)" },
1029     { "(bad)" },
1030     { "(bad)" },
1031   },
1032   /* GRP10 */
1033   {
1034     { "(bad)" },
1035     { "(bad)" },
1036     { "psrlw", MS, Ib },
1037     { "(bad)" },
1038     { "psraw", MS, Ib },
1039     { "(bad)" },
1040     { "psllw", MS, Ib },
1041     { "(bad)" },
1042   },
1043   /* GRP11 */
1044   {
1045     { "(bad)" },
1046     { "(bad)" },
1047     { "psrld", MS, Ib },
1048     { "(bad)" },
1049     { "psrad", MS, Ib },
1050     { "(bad)" },
1051     { "pslld", MS, Ib },
1052     { "(bad)" },
1053   },
1054   /* GRP12 */
1055   {
1056     { "(bad)" },
1057     { "(bad)" },
1058     { "psrlq", MS, Ib },
1059     { "(bad)" },
1060     { "(bad)" },
1061     { "(bad)" },
1062     { "psllq", MS, Ib },
1063     { "(bad)" },
1064   }
1065 };
1066
1067 #define PREFIX_REPZ 1
1068 #define PREFIX_REPNZ 2
1069 #define PREFIX_LOCK 4
1070 #define PREFIX_CS 8
1071 #define PREFIX_SS 0x10
1072 #define PREFIX_DS 0x20
1073 #define PREFIX_ES 0x40
1074 #define PREFIX_FS 0x80
1075 #define PREFIX_GS 0x100
1076 #define PREFIX_DATA 0x200
1077 #define PREFIX_ADR 0x400
1078 #define PREFIX_FWAIT 0x800
1079
1080 static int prefixes;
1081
1082 static void
1083 ckprefix ()
1084 {
1085   prefixes = 0;
1086   while (1)
1087     {
1088       FETCH_DATA (the_info, codep + 1);
1089       switch (*codep)
1090         {
1091         case 0xf3:
1092           prefixes |= PREFIX_REPZ;
1093           break;
1094         case 0xf2:
1095           prefixes |= PREFIX_REPNZ;
1096           break;
1097         case 0xf0:
1098           prefixes |= PREFIX_LOCK;
1099           break;
1100         case 0x2e:
1101           prefixes |= PREFIX_CS;
1102           break;
1103         case 0x36:
1104           prefixes |= PREFIX_SS;
1105           break;
1106         case 0x3e:
1107           prefixes |= PREFIX_DS;
1108           break;
1109         case 0x26:
1110           prefixes |= PREFIX_ES;
1111           break;
1112         case 0x64:
1113           prefixes |= PREFIX_FS;
1114           break;
1115         case 0x65:
1116           prefixes |= PREFIX_GS;
1117           break;
1118         case 0x66:
1119           prefixes |= PREFIX_DATA;
1120           break;
1121         case 0x67:
1122           prefixes |= PREFIX_ADR;
1123           break;
1124         case 0x9b:
1125           prefixes |= PREFIX_FWAIT;
1126           break;
1127         default:
1128           return;
1129         }
1130       codep++;
1131     }
1132 }
1133
1134 static char op1out[100], op2out[100], op3out[100];
1135 static int op_address[3], op_ad, op_index[3];
1136 static int start_pc;
1137
1138 \f
1139 /*
1140  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1141  *   (see topic "Redundant prefixes" in the "Differences from 8086"
1142  *   section of the "Virtual 8086 Mode" chapter.)
1143  * 'pc' should be the address of this instruction, it will
1144  *   be used to print the target address if this is a relative jump or call
1145  * The function returns the length of this instruction in bytes.
1146  */
1147
1148 int print_insn_x86 PARAMS ((bfd_vma pc, disassemble_info *info, int aflag,
1149                             int dflag));
1150 int
1151 print_insn_i386 (pc, info)
1152      bfd_vma pc;
1153      disassemble_info *info;
1154 {
1155   if (info->mach == bfd_mach_i386_i386)
1156     return print_insn_x86 (pc, info, 1, 1);
1157   else if (info->mach == bfd_mach_i386_i8086)
1158     return print_insn_x86 (pc, info, 0, 0);
1159   else
1160     abort ();
1161 }
1162
1163 int
1164 print_insn_x86 (pc, info, aflag, dflag)
1165      bfd_vma pc;
1166      disassemble_info *info;
1167 {
1168   struct dis386 *dp;
1169   int i;
1170   int enter_instruction;
1171   char *first, *second, *third;
1172   int needcomma;
1173   unsigned char need_modrm;
1174
1175   struct dis_private priv;
1176   bfd_byte *inbuf = priv.the_buffer;
1177
1178   /* The output looks better if we put 5 bytes on a line, since that
1179      puts long word instructions on a single line.  */
1180   info->bytes_per_line = 5;
1181
1182   info->private_data = (PTR) &priv;
1183   priv.max_fetched = priv.the_buffer;
1184   priv.insn_start = pc;
1185   if (setjmp (priv.bailout) != 0)
1186     /* Error return.  */
1187     return -1;
1188
1189   obuf[0] = 0;
1190   op1out[0] = 0;
1191   op2out[0] = 0;
1192   op3out[0] = 0;
1193
1194   op_index[0] = op_index[1] = op_index[2] = -1;
1195
1196   the_info = info;
1197   start_pc = pc;
1198   start_codep = inbuf;
1199   codep = inbuf;
1200
1201   ckprefix ();
1202
1203   FETCH_DATA (info, codep + 1);
1204   if (*codep == 0xc8)
1205     enter_instruction = 1;
1206   else
1207     enter_instruction = 0;
1208
1209   obufp = obuf;
1210
1211   if (prefixes & PREFIX_REPZ)
1212     oappend ("repz ");
1213   if (prefixes & PREFIX_REPNZ)
1214     oappend ("repnz ");
1215   if (prefixes & PREFIX_LOCK)
1216     oappend ("lock ");
1217
1218   if ((prefixes & PREFIX_FWAIT)
1219       && ((*codep < 0xd8) || (*codep > 0xdf)))
1220     {
1221       /* fwait not followed by floating point instruction */
1222       (*info->fprintf_func) (info->stream, "fwait");
1223       return (1);
1224     }
1225
1226   if (prefixes & PREFIX_DATA)
1227     dflag ^= 1;
1228
1229   if (prefixes & PREFIX_ADR)
1230     {
1231       aflag ^= 1;
1232       if (aflag)
1233         oappend ("addr32 ");
1234       else
1235         oappend ("addr16 ");
1236     }
1237
1238   if (*codep == 0x0f)
1239     {
1240       FETCH_DATA (info, codep + 2);
1241       dp = &dis386_twobyte[*++codep];
1242       need_modrm = twobyte_has_modrm[*codep];
1243     }
1244   else
1245     {
1246       dp = &dis386[*codep];
1247       need_modrm = onebyte_has_modrm[*codep];
1248     }
1249   codep++;
1250
1251   if (need_modrm)
1252     {
1253       FETCH_DATA (info, codep + 1);
1254       mod = (*codep >> 6) & 3;
1255       reg = (*codep >> 3) & 7;
1256       rm = *codep & 7;
1257     }
1258
1259   if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
1260     {
1261       dofloat (aflag, dflag);
1262     }
1263   else
1264     {
1265       if (dp->name == NULL)
1266         dp = &grps[dp->bytemode1][reg];
1267
1268       putop (dp->name, aflag, dflag);
1269
1270       obufp = op1out;
1271       op_ad = 2;
1272       if (dp->op1)
1273         (*dp->op1)(dp->bytemode1, aflag, dflag);
1274
1275       obufp = op2out;
1276       op_ad = 1;
1277       if (dp->op2)
1278         (*dp->op2)(dp->bytemode2, aflag, dflag);
1279
1280       obufp = op3out;
1281       op_ad = 0;
1282       if (dp->op3)
1283         (*dp->op3)(dp->bytemode3, aflag, dflag);
1284     }
1285
1286   obufp = obuf + strlen (obuf);
1287   for (i = strlen (obuf); i < 6; i++)
1288     oappend (" ");
1289   oappend (" ");
1290   (*info->fprintf_func) (info->stream, "%s", obuf);
1291
1292   /* enter instruction is printed with operands in the
1293    * same order as the intel book; everything else
1294    * is printed in reverse order
1295    */
1296   if (enter_instruction)
1297     {
1298       first = op1out;
1299       second = op2out;
1300       third = op3out;
1301       op_ad = op_index[0];
1302       op_index[0] = op_index[2];
1303       op_index[2] = op_ad;
1304     }
1305   else
1306     {
1307       first = op3out;
1308       second = op2out;
1309       third = op1out;
1310     }
1311   needcomma = 0;
1312   if (*first)
1313     {
1314       if (op_index[0] != -1)
1315         (*info->print_address_func) (op_address[op_index[0]], info);
1316       else
1317         (*info->fprintf_func) (info->stream, "%s", first);
1318       needcomma = 1;
1319     }
1320   if (*second)
1321     {
1322       if (needcomma)
1323         (*info->fprintf_func) (info->stream, ",");
1324       if (op_index[1] != -1)
1325         (*info->print_address_func) (op_address[op_index[1]], info);
1326       else
1327         (*info->fprintf_func) (info->stream, "%s", second);
1328       needcomma = 1;
1329     }
1330   if (*third)
1331     {
1332       if (needcomma)
1333         (*info->fprintf_func) (info->stream, ",");
1334       if (op_index[2] != -1)
1335         (*info->print_address_func) (op_address[op_index[2]], info);
1336       else
1337         (*info->fprintf_func) (info->stream, "%s", third);
1338     }
1339   return (codep - inbuf);
1340 }
1341
1342 static char *float_mem[] = {
1343   /* d8 */
1344   "fadds",
1345   "fmuls",
1346   "fcoms",
1347   "fcomps",
1348   "fsubs",
1349   "fsubrs",
1350   "fdivs",
1351   "fdivrs",
1352   /*  d9 */
1353   "flds",
1354   "(bad)",
1355   "fsts",
1356   "fstps",
1357   "fldenv",
1358   "fldcw",
1359   "fNstenv",
1360   "fNstcw",
1361   /* da */
1362   "fiaddl",
1363   "fimull",
1364   "ficoml",
1365   "ficompl",
1366   "fisubl",
1367   "fisubrl",
1368   "fidivl",
1369   "fidivrl",
1370   /* db */
1371   "fildl",
1372   "(bad)",
1373   "fistl",
1374   "fistpl",
1375   "(bad)",
1376   "fldt",
1377   "(bad)",
1378   "fstpt",
1379   /* dc */
1380   "faddl",
1381   "fmull",
1382   "fcoml",
1383   "fcompl",
1384   "fsubl",
1385   "fsubrl",
1386   "fdivl",
1387   "fdivrl",
1388   /* dd */
1389   "fldl",
1390   "(bad)",
1391   "fstl",
1392   "fstpl",
1393   "frstor",
1394   "(bad)",
1395   "fNsave",
1396   "fNstsw",
1397   /* de */
1398   "fiadd",
1399   "fimul",
1400   "ficom",
1401   "ficomp",
1402   "fisub",
1403   "fisubr",
1404   "fidiv",
1405   "fidivr",
1406   /* df */
1407   "fild",
1408   "(bad)",
1409   "fist",
1410   "fistp",
1411   "fbld",
1412   "fildll",
1413   "fbstp",
1414   "fistpll",
1415 };
1416
1417 #define ST OP_ST, 0
1418 #define STi OP_STi, 0
1419
1420 #define FGRPd9_2 NULL, NULL, 0
1421 #define FGRPd9_4 NULL, NULL, 1
1422 #define FGRPd9_5 NULL, NULL, 2
1423 #define FGRPd9_6 NULL, NULL, 3
1424 #define FGRPd9_7 NULL, NULL, 4
1425 #define FGRPda_5 NULL, NULL, 5
1426 #define FGRPdb_4 NULL, NULL, 6
1427 #define FGRPde_3 NULL, NULL, 7
1428 #define FGRPdf_4 NULL, NULL, 8
1429
1430 static struct dis386 float_reg[][8] = {
1431   /* d8 */
1432   {
1433     { "fadd",   ST, STi },
1434     { "fmul",   ST, STi },
1435     { "fcom",   STi },
1436     { "fcomp",  STi },
1437     { "fsub",   ST, STi },
1438     { "fsubr",  ST, STi },
1439     { "fdiv",   ST, STi },
1440     { "fdivr",  ST, STi },
1441   },
1442   /* d9 */
1443   {
1444     { "fld",    STi },
1445     { "fxch",   STi },
1446     { FGRPd9_2 },
1447     { "(bad)" },
1448     { FGRPd9_4 },
1449     { FGRPd9_5 },
1450     { FGRPd9_6 },
1451     { FGRPd9_7 },
1452   },
1453   /* da */
1454   {
1455     { "fcmovb", ST, STi },
1456     { "fcmove", ST, STi },
1457     { "fcmovbe",ST, STi },
1458     { "fcmovu", ST, STi },
1459     { "(bad)" },
1460     { FGRPda_5 },
1461     { "(bad)" },
1462     { "(bad)" },
1463   },
1464   /* db */
1465   {
1466     { "fcmovnb",ST, STi },
1467     { "fcmovne",ST, STi },
1468     { "fcmovnbe",ST, STi },
1469     { "fcmovnu",ST, STi },
1470     { FGRPdb_4 },
1471     { "fucomi", ST, STi },
1472     { "fcomi",  ST, STi },
1473     { "(bad)" },
1474   },
1475   /* dc */
1476   {
1477     { "fadd",   STi, ST },
1478     { "fmul",   STi, ST },
1479     { "(bad)" },
1480     { "(bad)" },
1481     { "fsub",   STi, ST },
1482     { "fsubr",  STi, ST },
1483     { "fdiv",   STi, ST },
1484     { "fdivr",  STi, ST },
1485   },
1486   /* dd */
1487   {
1488     { "ffree",  STi },
1489     { "(bad)" },
1490     { "fst",    STi },
1491     { "fstp",   STi },
1492     { "fucom",  STi },
1493     { "fucomp", STi },
1494     { "(bad)" },
1495     { "(bad)" },
1496   },
1497   /* de */
1498   {
1499     { "faddp",  STi, ST },
1500     { "fmulp",  STi, ST },
1501     { "(bad)" },
1502     { FGRPde_3 },
1503     { "fsubp",  STi, ST },
1504     { "fsubrp", STi, ST },
1505     { "fdivp",  STi, ST },
1506     { "fdivrp", STi, ST },
1507   },
1508   /* df */
1509   {
1510     { "(bad)" },
1511     { "(bad)" },
1512     { "(bad)" },
1513     { "(bad)" },
1514     { FGRPdf_4 },
1515     { "fucomip",ST, STi },
1516     { "fcomip", ST, STi },
1517     { "(bad)" },
1518   },
1519 };
1520
1521
1522 static char *fgrps[][8] = {
1523   /* d9_2  0 */
1524   {
1525     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1526   },
1527
1528   /* d9_4  1 */
1529   {
1530     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1531   },
1532
1533   /* d9_5  2 */
1534   {
1535     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1536   },
1537
1538   /* d9_6  3 */
1539   {
1540     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1541   },
1542
1543   /* d9_7  4 */
1544   {
1545     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1546   },
1547
1548   /* da_5  5 */
1549   {
1550     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1551   },
1552
1553   /* db_4  6 */
1554   {
1555     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1556     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1557   },
1558
1559   /* de_3  7 */
1560   {
1561     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1562   },
1563
1564   /* df_4  8 */
1565   {
1566     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1567   },
1568 };
1569
1570 static void
1571 dofloat (aflag, dflag)
1572      int aflag;
1573      int dflag;
1574 {
1575   struct dis386 *dp;
1576   unsigned char floatop;
1577
1578   floatop = codep[-1];
1579
1580   if (mod != 3)
1581     {
1582       putop (float_mem[(floatop - 0xd8) * 8 + reg], aflag, dflag);
1583       obufp = op1out;
1584       OP_E (v_mode, aflag, dflag);
1585       return;
1586     }
1587   codep++;
1588
1589   dp = &float_reg[floatop - 0xd8][reg];
1590   if (dp->name == NULL)
1591     {
1592       putop (fgrps[dp->bytemode1][rm], aflag, dflag);
1593       /* instruction fnstsw is only one with strange arg */
1594       if (floatop == 0xdf
1595           && FETCH_DATA (the_info, codep + 1)
1596           && *codep == 0xe0)
1597         strcpy (op1out, "%eax");
1598     }
1599   else
1600     {
1601       putop (dp->name, aflag, dflag);
1602       obufp = op1out;
1603       if (dp->op1)
1604         (*dp->op1)(dp->bytemode1, aflag, dflag);
1605       obufp = op2out;
1606       if (dp->op2)
1607         (*dp->op2)(dp->bytemode2, aflag, dflag);
1608     }
1609 }
1610
1611 /* ARGSUSED */
1612 static int
1613 OP_ST (ignore, aflag, dflag)
1614      int ignore;
1615      int aflag;
1616      int dflag;
1617 {
1618   oappend ("%st");
1619   return (0);
1620 }
1621
1622 /* ARGSUSED */
1623 static int
1624 OP_STi (ignore, aflag, dflag)
1625      int ignore;
1626      int aflag;
1627      int dflag;
1628 {
1629   sprintf (scratchbuf, "%%st(%d)", rm);
1630   oappend (scratchbuf);
1631   return (0);
1632 }
1633
1634
1635 /* capital letters in template are macros */
1636 static void
1637 putop (template, aflag, dflag)
1638      char *template;
1639      int aflag;
1640      int dflag;
1641 {
1642   char *p;
1643
1644   for (p = template; *p; p++)
1645     {
1646       switch (*p)
1647         {
1648         default:
1649           *obufp++ = *p;
1650           break;
1651         case 'C':               /* For jcxz/jecxz */
1652           if (aflag)
1653             *obufp++ = 'e';
1654           break;
1655         case 'N':
1656           if ((prefixes & PREFIX_FWAIT) == 0)
1657             *obufp++ = 'n';
1658           break;
1659         case 'S':
1660           /* operand size flag */
1661           if (dflag)
1662             *obufp++ = 'l';
1663           else
1664             *obufp++ = 'w';
1665           break;
1666         case 'W':
1667           /* operand size flag for cwtl, cbtw */
1668           if (dflag)
1669             *obufp++ = 'w';
1670           else
1671             *obufp++ = 'b';
1672           break;
1673         }
1674     }
1675   *obufp = 0;
1676 }
1677
1678 static void
1679 oappend (s)
1680      char *s;
1681 {
1682   strcpy (obufp, s);
1683   obufp += strlen (s);
1684   *obufp = 0;
1685 }
1686
1687 static void
1688 append_prefix ()
1689 {
1690   if (prefixes & PREFIX_CS)
1691     oappend ("%cs:");
1692   if (prefixes & PREFIX_DS)
1693     oappend ("%ds:");
1694   if (prefixes & PREFIX_SS)
1695     oappend ("%ss:");
1696   if (prefixes & PREFIX_ES)
1697     oappend ("%es:");
1698   if (prefixes & PREFIX_FS)
1699     oappend ("%fs:");
1700   if (prefixes & PREFIX_GS)
1701     oappend ("%gs:");
1702 }
1703
1704 static int
1705 OP_indirE (bytemode, aflag, dflag)
1706      int bytemode;
1707      int aflag;
1708      int dflag;
1709 {
1710   oappend ("*");
1711   return OP_E (bytemode, aflag, dflag);
1712 }
1713
1714 static int
1715 OP_E (bytemode, aflag, dflag)
1716      int bytemode;
1717      int aflag;
1718      int dflag;
1719 {
1720   int disp;
1721
1722   /* skip mod/rm byte */
1723   codep++;
1724
1725   if (mod == 3)
1726     {
1727       switch (bytemode)
1728         {
1729         case b_mode:
1730           oappend (names8[rm]);
1731           break;
1732         case w_mode:
1733           oappend (names16[rm]);
1734           break;
1735         case v_mode:
1736           if (dflag)
1737             oappend (names32[rm]);
1738           else
1739             oappend (names16[rm]);
1740           break;
1741         default:
1742           oappend ("<bad dis table>");
1743           break;
1744         }
1745       return 0;
1746     }
1747
1748   disp = 0;
1749   append_prefix ();
1750
1751   if (aflag) /* 32 bit address mode */
1752     {
1753       int havesib;
1754       int havebase;
1755       int base;
1756       int index;
1757       int scale;
1758
1759       havesib = 0;
1760       havebase = 1;
1761       base = rm;
1762
1763       if (base == 4)
1764         {
1765           havesib = 1;
1766           FETCH_DATA (the_info, codep + 1);
1767           scale = (*codep >> 6) & 3;
1768           index = (*codep >> 3) & 7;
1769           base = *codep & 7;
1770           codep++;
1771         }
1772
1773       switch (mod)
1774         {
1775         case 0:
1776           if (base == 5)
1777             {
1778               havebase = 0;
1779               disp = get32 ();
1780             }
1781           break;
1782         case 1:
1783           FETCH_DATA (the_info, codep + 1);
1784           disp = *(char *)codep++;
1785           break;
1786         case 2:
1787           disp = get32 ();
1788           break;
1789         }
1790
1791       if (mod != 0 || base == 5)
1792         {
1793           sprintf (scratchbuf, "0x%x", disp);
1794           oappend (scratchbuf);
1795         }
1796
1797       if (havebase || (havesib && (index != 4 || scale != 0)))
1798         {
1799           oappend ("(");
1800           if (havebase)
1801             oappend (names32[base]);
1802           if (havesib)
1803             {
1804               if (index != 4)
1805                 {
1806                   sprintf (scratchbuf, ",%s", names32[index]);
1807                   oappend (scratchbuf);
1808                 }
1809               sprintf (scratchbuf, ",%d", 1 << scale);
1810               oappend (scratchbuf);
1811             }
1812           oappend (")");
1813         }
1814     }
1815   else
1816     { /* 16 bit address mode */
1817       switch (mod)
1818         {
1819         case 0:
1820           if (rm == 6)
1821             disp = (short) get16 ();
1822           break;
1823         case 1:
1824           FETCH_DATA (the_info, codep + 1);
1825           disp = *(char *)codep++;
1826           break;
1827         case 2:
1828           disp = (short) get16 ();
1829           break;
1830         }
1831
1832       if (mod != 0 || rm == 6)
1833         {
1834           sprintf (scratchbuf, "0x%x", disp);
1835           oappend (scratchbuf);
1836         }
1837
1838       if (mod != 0 || rm != 6)
1839         {
1840           oappend ("(");
1841           oappend (index16[rm]);
1842           oappend (")");
1843         }
1844     }
1845   return 0;
1846 }
1847
1848 static int
1849 OP_G (bytemode, aflag, dflag)
1850      int bytemode;
1851      int aflag;
1852      int dflag;
1853 {
1854   switch (bytemode)
1855     {
1856     case b_mode:
1857       oappend (names8[reg]);
1858       break;
1859     case w_mode:
1860       oappend (names16[reg]);
1861       break;
1862     case d_mode:
1863       oappend (names32[reg]);
1864       break;
1865     case v_mode:
1866       if (dflag)
1867         oappend (names32[reg]);
1868       else
1869         oappend (names16[reg]);
1870       break;
1871     default:
1872       oappend ("<internal disassembler error>");
1873       break;
1874     }
1875   return (0);
1876 }
1877
1878 static int
1879 get32 ()
1880 {
1881   int x = 0;
1882
1883   FETCH_DATA (the_info, codep + 4);
1884   x = *codep++ & 0xff;
1885   x |= (*codep++ & 0xff) << 8;
1886   x |= (*codep++ & 0xff) << 16;
1887   x |= (*codep++ & 0xff) << 24;
1888   return (x);
1889 }
1890
1891 static int
1892 get16 ()
1893 {
1894   int x = 0;
1895
1896   FETCH_DATA (the_info, codep + 2);
1897   x = *codep++ & 0xff;
1898   x |= (*codep++ & 0xff) << 8;
1899   return (x);
1900 }
1901
1902 static void
1903 set_op (op)
1904      int op;
1905 {
1906   op_index[op_ad] = op_ad;
1907   op_address[op_ad] = op;
1908 }
1909
1910 static int
1911 OP_REG (code, aflag, dflag)
1912      int code;
1913      int aflag;
1914      int dflag;
1915 {
1916   char *s;
1917
1918   switch (code)
1919     {
1920     case indir_dx_reg: s = "(%dx)"; break;
1921         case ax_reg: case cx_reg: case dx_reg: case bx_reg:
1922         case sp_reg: case bp_reg: case si_reg: case di_reg:
1923                 s = names16[code - ax_reg];
1924                 break;
1925         case es_reg: case ss_reg: case cs_reg:
1926         case ds_reg: case fs_reg: case gs_reg:
1927                 s = names_seg[code - es_reg];
1928                 break;
1929         case al_reg: case ah_reg: case cl_reg: case ch_reg:
1930         case dl_reg: case dh_reg: case bl_reg: case bh_reg:
1931                 s = names8[code - al_reg];
1932                 break;
1933         case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
1934         case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
1935       if (dflag)
1936         s = names32[code - eAX_reg];
1937       else
1938         s = names16[code - eAX_reg];
1939       break;
1940     default:
1941       s = "<internal disassembler error>";
1942       break;
1943     }
1944   oappend (s);
1945   return (0);
1946 }
1947
1948 static int
1949 OP_I (bytemode, aflag, dflag)
1950      int bytemode;
1951      int aflag;
1952      int dflag;
1953 {
1954   int op;
1955
1956   switch (bytemode)
1957     {
1958     case b_mode:
1959       FETCH_DATA (the_info, codep + 1);
1960       op = *codep++ & 0xff;
1961       break;
1962     case v_mode:
1963       if (dflag)
1964         op = get32 ();
1965       else
1966         op = get16 ();
1967       break;
1968     case w_mode:
1969       op = get16 ();
1970       break;
1971     default:
1972       oappend ("<internal disassembler error>");
1973       return (0);
1974     }
1975   sprintf (scratchbuf, "$0x%x", op);
1976   oappend (scratchbuf);
1977   return (0);
1978 }
1979
1980 static int
1981 OP_sI (bytemode, aflag, dflag)
1982      int bytemode;
1983      int aflag;
1984      int dflag;
1985 {
1986   int op;
1987
1988   switch (bytemode)
1989     {
1990     case b_mode:
1991       FETCH_DATA (the_info, codep + 1);
1992       op = *(char *)codep++;
1993       break;
1994     case v_mode:
1995       if (dflag)
1996         op = get32 ();
1997       else
1998         op = (short)get16();
1999       break;
2000     case w_mode:
2001       op = (short)get16 ();
2002       break;
2003     default:
2004       oappend ("<internal disassembler error>");
2005       return (0);
2006     }
2007   sprintf (scratchbuf, "$0x%x", op);
2008   oappend (scratchbuf);
2009   return (0);
2010 }
2011
2012 static int
2013 OP_J (bytemode, aflag, dflag)
2014      int bytemode;
2015      int aflag;
2016      int dflag;
2017 {
2018   int disp;
2019   int mask = -1;
2020
2021   switch (bytemode)
2022     {
2023     case b_mode:
2024       FETCH_DATA (the_info, codep + 1);
2025       disp = *(char *)codep++;
2026       break;
2027     case v_mode:
2028       if (dflag)
2029         disp = get32 ();
2030       else
2031         {
2032           disp = (short)get16 ();
2033           /* for some reason, a data16 prefix on a jump instruction
2034              means that the pc is masked to 16 bits after the
2035              displacement is added!  */
2036           mask = 0xffff;
2037         }
2038       break;
2039     default:
2040       oappend ("<internal disassembler error>");
2041       return (0);
2042     }
2043   disp = (start_pc + codep - start_codep + disp) & mask;
2044   set_op (disp);
2045   sprintf (scratchbuf, "0x%x", disp);
2046   oappend (scratchbuf);
2047   return (0);
2048 }
2049
2050 /* ARGSUSED */
2051 static int
2052 OP_SEG (dummy, aflag, dflag)
2053      int dummy;
2054      int aflag;
2055      int dflag;
2056 {
2057   static char *sreg[] = {
2058     "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2059   };
2060
2061   oappend (sreg[reg]);
2062   return (0);
2063 }
2064
2065 static int
2066 OP_DIR (size, aflag, dflag)
2067      int size;
2068      int aflag;
2069      int dflag;
2070 {
2071   int seg, offset;
2072
2073   switch (size)
2074     {
2075     case lptr:
2076       if (aflag)
2077         {
2078           offset = get32 ();
2079           seg = get16 ();
2080         }
2081       else
2082         {
2083           offset = get16 ();
2084           seg = get16 ();
2085         }
2086       sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
2087       oappend (scratchbuf);
2088       break;
2089     case v_mode:
2090       if (aflag)
2091         offset = get32 ();
2092       else
2093         offset = (short)get16 ();
2094
2095       offset = start_pc + codep - start_codep + offset;
2096       set_op (offset);
2097       sprintf (scratchbuf, "0x%x", offset);
2098       oappend (scratchbuf);
2099       break;
2100     default:
2101       oappend ("<internal disassembler error>");
2102       break;
2103     }
2104   return (0);
2105 }
2106
2107 /* ARGSUSED */
2108 static int
2109 OP_OFF (bytemode, aflag, dflag)
2110      int bytemode;
2111      int aflag;
2112      int dflag;
2113 {
2114   int off;
2115
2116   append_prefix ();
2117
2118   if (aflag)
2119     off = get32 ();
2120   else
2121     off = get16 ();
2122
2123   sprintf (scratchbuf, "0x%x", off);
2124   oappend (scratchbuf);
2125   return (0);
2126 }
2127
2128 /* ARGSUSED */
2129 static int
2130 OP_ESDI (dummy, aflag, dflag)
2131      int dummy;
2132      int aflag;
2133      int dflag;
2134 {
2135   oappend ("%es:(");
2136   oappend (aflag ? "%edi" : "%di");
2137   oappend (")");
2138   return (0);
2139 }
2140
2141 /* ARGSUSED */
2142 static int
2143 OP_DSSI (dummy, aflag, dflag)
2144      int dummy;
2145      int aflag;
2146      int dflag;
2147 {
2148   oappend ("%ds:(");
2149   oappend (aflag ? "%esi" : "%si");
2150   oappend (")");
2151   return (0);
2152 }
2153
2154 #if 0
2155 /* Not used.  */
2156
2157 /* ARGSUSED */
2158 static int
2159 OP_ONE (dummy, aflag, dflag)
2160      int dummy;
2161      int aflag;
2162      int dflag;
2163 {
2164   oappend ("1");
2165   return (0);
2166 }
2167
2168 #endif
2169
2170 /* ARGSUSED */
2171 static int
2172 OP_C (dummy, aflag, dflag)
2173      int dummy;
2174      int aflag;
2175      int dflag;
2176 {
2177   codep++; /* skip mod/rm */
2178   sprintf (scratchbuf, "%%cr%d", reg);
2179   oappend (scratchbuf);
2180   return (0);
2181 }
2182
2183 /* ARGSUSED */
2184 static int
2185 OP_D (dummy, aflag, dflag)
2186      int dummy;
2187      int aflag;
2188      int dflag;
2189 {
2190   codep++; /* skip mod/rm */
2191   sprintf (scratchbuf, "%%db%d", reg);
2192   oappend (scratchbuf);
2193   return (0);
2194 }
2195
2196 /* ARGSUSED */
2197 static int
2198 OP_T (dummy, aflag, dflag)
2199      int dummy;
2200      int aflag;
2201      int dflag;
2202 {
2203   codep++; /* skip mod/rm */
2204   sprintf (scratchbuf, "%%tr%d", reg);
2205   oappend (scratchbuf);
2206   return (0);
2207 }
2208
2209 static int
2210 OP_rm (bytemode, aflag, dflag)
2211      int bytemode;
2212      int aflag;
2213      int dflag;
2214 {
2215   switch (bytemode)
2216     {
2217     case d_mode:
2218       oappend (names32[rm]);
2219       break;
2220     case w_mode:
2221       oappend (names16[rm]);
2222       break;
2223     }
2224   return (0);
2225 }
2226
2227 static int
2228 OP_MMX (bytemode, aflag, dflag)
2229      int bytemode;
2230      int aflag;
2231      int dflag;
2232 {
2233   sprintf (scratchbuf, "%%mm%d", reg);
2234   oappend (scratchbuf);
2235   return 0;
2236 }
2237
2238 static int
2239 OP_EM (bytemode, aflag, dflag)
2240      int bytemode;
2241      int aflag;
2242      int dflag;
2243 {
2244   if (mod != 3)
2245     return OP_E (bytemode, aflag, dflag);
2246
2247   codep++;
2248   sprintf (scratchbuf, "%%mm%d", rm);
2249   oappend (scratchbuf);
2250   return 0;
2251 }
2252
2253 static int
2254 OP_MS (bytemode, aflag, dflag)
2255      int bytemode;
2256      int aflag;
2257      int dflag;
2258 {
2259   ++codep;
2260   sprintf (scratchbuf, "%%mm%d", rm);
2261   oappend (scratchbuf);
2262   return 0;
2263 }