opcodes/i386-dis.c

   1 /* Print i386 instructions for GDB, the GNU debugger.
   2    Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   3    2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22
  23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  24    July 1988
  25     modified by John Hassey (hassey@dg-rtp.dg.com)
  26     x86-64 support added by Jan Hubicka (jh@suse.cz)
  27     VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  28
  29 /* The main tables describing the instructions is essentially a copy
  30    of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  31    Programmers Manual.  Usually, there is a capital letter, followed
  32    by a small letter.  The capital letter tell the addressing mode,
  33    and the small letter tells about the operand size.  Refer to
  34    the Intel manual for details.  */
  35
  36 #include "sysdep.h"
  37 #include "dis-asm.h"
  38 #include "opintl.h"
  39 #include "opcode/i386.h"
  40 #include "libiberty.h"
  41
  42 #include <setjmp.h>
  43
  44 static int fetch_data (struct disassemble_info *, bfd_byte *);
  45 static void ckprefix (void);
  46 static const char *prefix_name (int, int);
  47 static int print_insn (bfd_vma, disassemble_info *);
  48 static void dofloat (int);
  49 static void OP_ST (int, int);
  50 static void OP_STi (int, int);
  51 static int putop (const char *, int);
  52 static void oappend (const char *);
  53 static void append_seg (void);
  54 static void OP_indirE (int, int);
  55 static void print_operand_value (char *, int, bfd_vma);
  56 static void OP_E_extended (int, int, int);
  57 static void print_displacement (char *, bfd_vma);
  58 static void OP_E (int, int);
  59 static void OP_G (int, int);
  60 static bfd_vma get64 (void);
  61 static bfd_signed_vma get32 (void);
  62 static bfd_signed_vma get32s (void);
  63 static int get16 (void);
  64 static void set_op (bfd_vma, int);
  65 static void OP_Skip_MODRM (int, int);
  66 static void OP_REG (int, int);
  67 static void OP_IMREG (int, int);
  68 static void OP_I (int, int);
  69 static void OP_I64 (int, int);
  70 static void OP_sI (int, int);
  71 static void OP_J (int, int);
  72 static void OP_SEG (int, int);
  73 static void OP_DIR (int, int);
  74 static void OP_OFF (int, int);
  75 static void OP_OFF64 (int, int);
  76 static void ptr_reg (int, int);
  77 static void OP_ESreg (int, int);
  78 static void OP_DSreg (int, int);
  79 static void OP_C (int, int);
  80 static void OP_D (int, int);
  81 static void OP_T (int, int);
  82 static void OP_R (int, int);
  83 static void OP_MMX (int, int);
  84 static void OP_XMM (int, int);
  85 static void OP_EM (int, int);
  86 static void OP_EX (int, int);
  87 static void OP_EMC (int,int);
  88 static void OP_MXC (int,int);
  89 static void OP_MS (int, int);
  90 static void OP_XS (int, int);
  91 static void OP_M (int, int);
  92 static void OP_0f07 (int, int);
  93 static void OP_Monitor (int, int);
  94 static void OP_Mwait (int, int);
  95 static void NOP_Fixup1 (int, int);
  96 static void NOP_Fixup2 (int, int);
  97 static void OP_3DNowSuffix (int, int);
  98 static void CMP_Fixup (int, int);
  99 static void BadOp (void);
 100 static void REP_Fixup (int, int);
 101 static void CMPXCHG8B_Fixup (int, int);
 102 static void XMM_Fixup (int, int);
 103 static void CRC32_Fixup (int, int);
 104 static void print_drex_arg (unsigned int, int, int);
 105 static void OP_DREX4 (int, int);
 106 static void OP_DREX3 (int, int);
 107 static void OP_DREX_ICMP (int, int);
 108 static void OP_DREX_FCMP (int, int);
 109
 110 struct dis_private {
 111   /* Points to first byte not fetched.  */
 112   bfd_byte *max_fetched;
 113   bfd_byte the_buffer[MAX_MNEM_SIZE];
 114   bfd_vma insn_start;
 115   int orig_sizeflag;
 116   jmp_buf bailout;
 117 };
 118
 119 enum address_mode
 120 {
 121   mode_16bit,
 122   mode_32bit,
 123   mode_64bit
 124 };
 125
 126 enum address_mode address_mode;
 127
 128 /* Flags for the prefixes for the current instruction.  See below.  */
 129 static int prefixes;
 130
 131 /* REX prefix the current instruction.  See below.  */
 132 static int rex;
 133 /* Bits of REX we've already used.  */
 134 static int rex_used;
 135 /* Mark parts used in the REX prefix.  When we are testing for
 136    empty prefix (for 8bit register REX extension), just mask it
 137    out.  Otherwise test for REX bit is excuse for existence of REX
 138    only in case value is nonzero.  */
 139 #define USED_REX(value)                                 \
 140   {                                                     \
 141     if (value)                                          \
 142       {                                                 \
 143         if ((rex & value))                              \
 144           rex_used |= (value) | REX_OPCODE;             \
 145       }                                                 \
 146     else                                                \
 147       rex_used |= REX_OPCODE;                           \
 148   }
 149
 150 /* Special 'registers' for DREX handling */
 151 #define DREX_REG_UNKNOWN        1000    /* not initialized */
 152 #define DREX_REG_MEMORY         1001    /* use MODRM/SIB/OFFSET memory */
 153
 154 /* The DREX byte has the following fields:
 155    Bits 7-4 -- DREX.Dest, xmm destination register
 156    Bit 3    -- DREX.OC0, operand config bit defines operand order
 157    Bit 2    -- DREX.R, equivalent to REX_R bit, to extend ModRM register
 158    Bit 1    -- DREX.X, equivalent to REX_X bit, to extend SIB index field
 159    Bit 0    -- DREX.W, equivalent to REX_B bit, to extend ModRM r/m field,
 160                SIB base field, or opcode reg field.  */
 161 #define DREX_XMM(drex) ((drex >> 4) & 0xf)
 162 #define DREX_OC0(drex) ((drex >> 3) & 0x1)
 163
 164 /* Flags for prefixes which we somehow handled when printing the
 165    current instruction.  */
 166 static int used_prefixes;
 167
 168 /* Flags stored in PREFIXES.  */
 169 #define PREFIX_REPZ 1
 170 #define PREFIX_REPNZ 2
 171 #define PREFIX_LOCK 4
 172 #define PREFIX_CS 8
 173 #define PREFIX_SS 0x10
 174 #define PREFIX_DS 0x20
 175 #define PREFIX_ES 0x40
 176 #define PREFIX_FS 0x80
 177 #define PREFIX_GS 0x100
 178 #define PREFIX_DATA 0x200
 179 #define PREFIX_ADDR 0x400
 180 #define PREFIX_FWAIT 0x800
 181
 182 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 183    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 184    on error.  */
 185 #define FETCH_DATA(info, addr) \
 186   ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
 187    ? 1 : fetch_data ((info), (addr)))
 188
 189 static int
 190 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 191 {
 192   int status;
 193   struct dis_private *priv = (struct dis_private *) info->private_data;
 194   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 195
 196   if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 197     status = (*info->read_memory_func) (start,
 198                                         priv->max_fetched,
 199                                         addr - priv->max_fetched,
 200                                         info);
 201   else
 202     status = -1;
 203   if (status != 0)
 204     {
 205       /* If we did manage to read at least one byte, then
 206          print_insn_i386 will do something sensible.  Otherwise, print
 207          an error.  We do that here because this is where we know
 208          STATUS.  */
 209       if (priv->max_fetched == priv->the_buffer)
 210         (*info->memory_error_func) (status, start, info);
 211       longjmp (priv->bailout, 1);
 212     }
 213   else
 214     priv->max_fetched = addr;
 215   return 1;
 216 }
 217
 218 #define XX { NULL, 0 }
 219
 220 #define Eb { OP_E, b_mode }
 221 #define Ev { OP_E, v_mode }
 222 #define Ed { OP_E, d_mode }
 223 #define Edq { OP_E, dq_mode }
 224 #define Edqw { OP_E, dqw_mode }
 225 #define Edqb { OP_E, dqb_mode }
 226 #define Edqd { OP_E, dqd_mode }
 227 #define Eq { OP_E, q_mode }
 228 #define indirEv { OP_indirE, stack_v_mode }
 229 #define indirEp { OP_indirE, f_mode }
 230 #define stackEv { OP_E, stack_v_mode }
 231 #define Em { OP_E, m_mode }
 232 #define Ew { OP_E, w_mode }
 233 #define M { OP_M, 0 }           /* lea, lgdt, etc. */
 234 #define Ma { OP_M, v_mode }
 235 #define Mb { OP_M, b_mode }
 236 #define Md { OP_M, d_mode }
 237 #define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 238 #define Mq { OP_M, q_mode }
 239 #define Mx { OP_M, x_mode }
 240 #define Gb { OP_G, b_mode }
 241 #define Gv { OP_G, v_mode }
 242 #define Gd { OP_G, d_mode }
 243 #define Gdq { OP_G, dq_mode }
 244 #define Gm { OP_G, m_mode }
 245 #define Gw { OP_G, w_mode }
 246 #define Rd { OP_R, d_mode }
 247 #define Rm { OP_R, m_mode }
 248 #define Ib { OP_I, b_mode }
 249 #define sIb { OP_sI, b_mode }   /* sign extened byte */
 250 #define Iv { OP_I, v_mode }
 251 #define Iq { OP_I, q_mode }
 252 #define Iv64 { OP_I64, v_mode }
 253 #define Iw { OP_I, w_mode }
 254 #define I1 { OP_I, const_1_mode }
 255 #define Jb { OP_J, b_mode }
 256 #define Jv { OP_J, v_mode }
 257 #define Cm { OP_C, m_mode }
 258 #define Dm { OP_D, m_mode }
 259 #define Td { OP_T, d_mode }
 260 #define Skip_MODRM { OP_Skip_MODRM, 0 }
 261
 262 #define RMeAX { OP_REG, eAX_reg }
 263 #define RMeBX { OP_REG, eBX_reg }
 264 #define RMeCX { OP_REG, eCX_reg }
 265 #define RMeDX { OP_REG, eDX_reg }
 266 #define RMeSP { OP_REG, eSP_reg }
 267 #define RMeBP { OP_REG, eBP_reg }
 268 #define RMeSI { OP_REG, eSI_reg }
 269 #define RMeDI { OP_REG, eDI_reg }
 270 #define RMrAX { OP_REG, rAX_reg }
 271 #define RMrBX { OP_REG, rBX_reg }
 272 #define RMrCX { OP_REG, rCX_reg }
 273 #define RMrDX { OP_REG, rDX_reg }
 274 #define RMrSP { OP_REG, rSP_reg }
 275 #define RMrBP { OP_REG, rBP_reg }
 276 #define RMrSI { OP_REG, rSI_reg }
 277 #define RMrDI { OP_REG, rDI_reg }
 278 #define RMAL { OP_REG, al_reg }
 279 #define RMAL { OP_REG, al_reg }
 280 #define RMCL { OP_REG, cl_reg }
 281 #define RMDL { OP_REG, dl_reg }
 282 #define RMBL { OP_REG, bl_reg }
 283 #define RMAH { OP_REG, ah_reg }
 284 #define RMCH { OP_REG, ch_reg }
 285 #define RMDH { OP_REG, dh_reg }
 286 #define RMBH { OP_REG, bh_reg }
 287 #define RMAX { OP_REG, ax_reg }
 288 #define RMDX { OP_REG, dx_reg }
 289
 290 #define eAX { OP_IMREG, eAX_reg }
 291 #define eBX { OP_IMREG, eBX_reg }
 292 #define eCX { OP_IMREG, eCX_reg }
 293 #define eDX { OP_IMREG, eDX_reg }
 294 #define eSP { OP_IMREG, eSP_reg }
 295 #define eBP { OP_IMREG, eBP_reg }
 296 #define eSI { OP_IMREG, eSI_reg }
 297 #define eDI { OP_IMREG, eDI_reg }
 298 #define AL { OP_IMREG, al_reg }
 299 #define CL { OP_IMREG, cl_reg }
 300 #define DL { OP_IMREG, dl_reg }
 301 #define BL { OP_IMREG, bl_reg }
 302 #define AH { OP_IMREG, ah_reg }
 303 #define CH { OP_IMREG, ch_reg }
 304 #define DH { OP_IMREG, dh_reg }
 305 #define BH { OP_IMREG, bh_reg }
 306 #define AX { OP_IMREG, ax_reg }
 307 #define DX { OP_IMREG, dx_reg }
 308 #define zAX { OP_IMREG, z_mode_ax_reg }
 309 #define indirDX { OP_IMREG, indir_dx_reg }
 310
 311 #define Sw { OP_SEG, w_mode }
 312 #define Sv { OP_SEG, v_mode }
 313 #define Ap { OP_DIR, 0 }
 314 #define Ob { OP_OFF64, b_mode }
 315 #define Ov { OP_OFF64, v_mode }
 316 #define Xb { OP_DSreg, eSI_reg }
 317 #define Xv { OP_DSreg, eSI_reg }
 318 #define Xz { OP_DSreg, eSI_reg }
 319 #define Yb { OP_ESreg, eDI_reg }
 320 #define Yv { OP_ESreg, eDI_reg }
 321 #define DSBX { OP_DSreg, eBX_reg }
 322
 323 #define es { OP_REG, es_reg }
 324 #define ss { OP_REG, ss_reg }
 325 #define cs { OP_REG, cs_reg }
 326 #define ds { OP_REG, ds_reg }
 327 #define fs { OP_REG, fs_reg }
 328 #define gs { OP_REG, gs_reg }
 329
 330 #define MX { OP_MMX, 0 }
 331 #define XM { OP_XMM, 0 }
 332 #define EM { OP_EM, v_mode }
 333 #define EMd { OP_EM, d_mode }
 334 #define EMx { OP_EM, x_mode }
 335 #define EXw { OP_EX, w_mode }
 336 #define EXd { OP_EX, d_mode }
 337 #define EXq { OP_EX, q_mode }
 338 #define EXx { OP_EX, x_mode }
 339 #define MS { OP_MS, v_mode }
 340 #define XS { OP_XS, v_mode }
 341 #define EMCq { OP_EMC, q_mode }
 342 #define MXC { OP_MXC, 0 }
 343 #define OPSUF { OP_3DNowSuffix, 0 }
 344 #define CMP { CMP_Fixup, 0 }
 345 #define XMM0 { XMM_Fixup, 0 }
 346
 347 /* Used handle "rep" prefix for string instructions.  */
 348 #define Xbr { REP_Fixup, eSI_reg }
 349 #define Xvr { REP_Fixup, eSI_reg }
 350 #define Ybr { REP_Fixup, eDI_reg }
 351 #define Yvr { REP_Fixup, eDI_reg }
 352 #define Yzr { REP_Fixup, eDI_reg }
 353 #define indirDXr { REP_Fixup, indir_dx_reg }
 354 #define ALr { REP_Fixup, al_reg }
 355 #define eAXr { REP_Fixup, eAX_reg }
 356
 357 #define cond_jump_flag { NULL, cond_jump_mode }
 358 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
 359
 360 /* bits in sizeflag */
 361 #define SUFFIX_ALWAYS 4
 362 #define AFLAG 2
 363 #define DFLAG 1
 364
 365 /* byte operand */
 366 #define b_mode                  1
 367 /* operand size depends on prefixes */
 368 #define v_mode                  (b_mode + 1)
 369 /* word operand */
 370 #define w_mode                  (v_mode + 1)
 371 /* double word operand  */
 372 #define d_mode                  (w_mode + 1)
 373 /* quad word operand */
 374 #define q_mode                  (d_mode + 1)
 375 /* ten-byte operand */
 376 #define t_mode                  (q_mode + 1)
 377 /* 16-byte XMM operand */
 378 #define x_mode                  (t_mode + 1)
 379 /* d_mode in 32bit, q_mode in 64bit mode.  */
 380 #define m_mode                  (x_mode + 1)
 381 #define cond_jump_mode          (m_mode + 1)
 382 #define loop_jcxz_mode          (cond_jump_mode + 1)
 383 /* operand size depends on REX prefixes.  */
 384 #define dq_mode                 (loop_jcxz_mode + 1)
 385 /* registers like dq_mode, memory like w_mode.  */
 386 #define dqw_mode                (dq_mode + 1)
 387 /* 4- or 6-byte pointer operand */
 388 #define f_mode                  (dqw_mode + 1)
 389 #define const_1_mode            (f_mode + 1)
 390 /* v_mode for stack-related opcodes.  */
 391 #define stack_v_mode            (const_1_mode + 1)
 392 /* non-quad operand size depends on prefixes */
 393 #define z_mode                  (stack_v_mode + 1)
 394 /* 16-byte operand */
 395 #define o_mode                  (z_mode + 1)
 396 /* registers like dq_mode, memory like b_mode.  */
 397 #define dqb_mode                (o_mode + 1)
 398 /* registers like dq_mode, memory like d_mode.  */
 399 #define dqd_mode                (dqb_mode + 1)
 400
 401 #define es_reg                  (dqd_mode + 1)
 402 #define cs_reg                  (es_reg + 1)
 403 #define ss_reg                  (cs_reg + 1)
 404 #define ds_reg                  (ss_reg + 1)
 405 #define fs_reg                  (ds_reg + 1)
 406 #define gs_reg                  (fs_reg + 1)
 407
 408 #define eAX_reg                 (gs_reg + 1)
 409 #define eCX_reg                 (eAX_reg + 1)
 410 #define eDX_reg                 (eCX_reg + 1)
 411 #define eBX_reg                 (eDX_reg + 1)
 412 #define eSP_reg                 (eBX_reg + 1)
 413 #define eBP_reg                 (eSP_reg + 1)
 414 #define eSI_reg                 (eBP_reg + 1)
 415 #define eDI_reg                 (eSI_reg + 1)
 416
 417 #define al_reg                  (eDI_reg + 1)
 418 #define cl_reg                  (al_reg + 1)
 419 #define dl_reg                  (cl_reg + 1)
 420 #define bl_reg                  (dl_reg + 1)
 421 #define ah_reg                  (bl_reg + 1)
 422 #define ch_reg                  (ah_reg + 1)
 423 #define dh_reg                  (ch_reg + 1)
 424 #define bh_reg                  (dh_reg + 1)
 425
 426 #define ax_reg                  (bh_reg + 1)
 427 #define cx_reg                  (ax_reg + 1)
 428 #define dx_reg                  (cx_reg + 1)
 429 #define bx_reg                  (dx_reg + 1)
 430 #define sp_reg                  (bx_reg + 1)
 431 #define bp_reg                  (sp_reg + 1)
 432 #define si_reg                  (bp_reg + 1)
 433 #define di_reg                  (si_reg + 1)
 434
 435 #define rAX_reg                 (di_reg + 1)
 436 #define rCX_reg                 (rAX_reg + 1)
 437 #define rDX_reg                 (rCX_reg + 1)
 438 #define rBX_reg                 (rDX_reg + 1)
 439 #define rSP_reg                 (rBX_reg + 1)
 440 #define rBP_reg                 (rSP_reg + 1)
 441 #define rSI_reg                 (rBP_reg + 1)
 442 #define rDI_reg                 (rSI_reg + 1)
 443
 444 #define z_mode_ax_reg           (rDI_reg + 1)
 445 #define indir_dx_reg            (z_mode_ax_reg + 1)
 446
 447 #define MAX_BYTEMODE    indir_dx_reg
 448
 449 /* Flags that are OR'ed into the bytemode field to pass extra
 450    information.  */
 451 #define DREX_OC1                0x10000 /* OC1 bit set */
 452 #define DREX_NO_OC0             0x20000 /* OC0 bit not used */
 453 #define DREX_MASK               0x40000 /* mask to delete */
 454
 455 #if MAX_BYTEMODE >= DREX_OC1
 456 #error MAX_BYTEMODE must be less than DREX_OC1
 457 #endif
 458
 459 #define FLOATCODE               1
 460 #define USE_REG_TABLE           (FLOATCODE + 1)
 461 #define USE_MOD_TABLE           (USE_REG_TABLE + 1)
 462 #define USE_RM_TABLE            (USE_MOD_TABLE + 1)
 463 #define USE_PREFIX_TABLE        (USE_RM_TABLE + 1)
 464 #define USE_X86_64_TABLE        (USE_PREFIX_TABLE + 1)
 465 #define USE_3BYTE_TABLE         (USE_X86_64_TABLE + 1)
 466
 467 #define FLOAT                   NULL, { { NULL, FLOATCODE } }
 468
 469 #define DIS386(T, I)            NULL, { { NULL, (T)}, { NULL,  (I) } }
 470 #define REG_TABLE(I)            DIS386 (USE_REG_TABLE, (I))
 471 #define MOD_TABLE(I)            DIS386 (USE_MOD_TABLE, (I))
 472 #define RM_TABLE(I)             DIS386 (USE_RM_TABLE, (I))
 473 #define PREFIX_TABLE(I)         DIS386 (USE_PREFIX_TABLE, (I))
 474 #define X86_64_TABLE(I)         DIS386 (USE_X86_64_TABLE, (I))
 475 #define THREE_BYTE_TABLE(I)     DIS386 (USE_3BYTE_TABLE, (I))
 476
 477 #define REG_80                  0
 478 #define REG_81                  (REG_80 + 1)
 479 #define REG_82                  (REG_81 + 1)
 480 #define REG_8F                  (REG_82 + 1)
 481 #define REG_C0                  (REG_8F + 1)
 482 #define REG_C1                  (REG_C0 + 1)
 483 #define REG_C6                  (REG_C1 + 1)
 484 #define REG_C7                  (REG_C6 + 1)
 485 #define REG_D0                  (REG_C7 + 1)
 486 #define REG_D1                  (REG_D0 + 1)
 487 #define REG_D2                  (REG_D1 + 1)
 488 #define REG_D3                  (REG_D2 + 1)
 489 #define REG_F6                  (REG_D3 + 1)
 490 #define REG_F7                  (REG_F6 + 1)
 491 #define REG_FE                  (REG_F7 + 1)
 492 #define REG_FF                  (REG_FE + 1)
 493 #define REG_0F00                (REG_FF + 1)
 494 #define REG_0F01                (REG_0F00 + 1)
 495 #define REG_0F0D                (REG_0F01 + 1)
 496 #define REG_0F18                (REG_0F0D + 1)
 497 #define REG_0F71                (REG_0F18 + 1)
 498 #define REG_0F72                (REG_0F71 + 1)
 499 #define REG_0F73                (REG_0F72 + 1)
 500 #define REG_0FA6                (REG_0F73 + 1)
 501 #define REG_0FA7                (REG_0FA6 + 1)
 502 #define REG_0FAE                (REG_0FA7 + 1)
 503 #define REG_0FBA                (REG_0FAE + 1)
 504 #define REG_0FC7                (REG_0FBA + 1)
 505
 506 #define MOD_8D                  0
 507 #define MOD_0F01_REG_0          (MOD_8D + 1)
 508 #define MOD_0F01_REG_1          (MOD_0F01_REG_0 + 1)
 509 #define MOD_0F01_REG_2          (MOD_0F01_REG_1 + 1)
 510 #define MOD_0F01_REG_3          (MOD_0F01_REG_2 + 1)
 511 #define MOD_0F01_REG_7          (MOD_0F01_REG_3 + 1)
 512 #define MOD_0F12_PREFIX_0       (MOD_0F01_REG_7 + 1)
 513 #define MOD_0F13                (MOD_0F12_PREFIX_0 + 1)
 514 #define MOD_0F16_PREFIX_0       (MOD_0F13 + 1)
 515 #define MOD_0F17                (MOD_0F16_PREFIX_0 + 1)
 516 #define MOD_0F18_REG_0          (MOD_0F17 + 1)
 517 #define MOD_0F18_REG_1          (MOD_0F18_REG_0 + 1)
 518 #define MOD_0F18_REG_2          (MOD_0F18_REG_1 + 1)
 519 #define MOD_0F18_REG_3          (MOD_0F18_REG_2 + 1)
 520 #define MOD_0F20                (MOD_0F18_REG_3 + 1)
 521 #define MOD_0F21                (MOD_0F20 + 1)
 522 #define MOD_0F22                (MOD_0F21 + 1)
 523 #define MOD_0F23                (MOD_0F22 + 1)
 524 #define MOD_0F24                (MOD_0F23 + 1)
 525 #define MOD_0F26                (MOD_0F24 + 1)
 526 #define MOD_0F2B_PREFIX_0       (MOD_0F26 + 1)
 527 #define MOD_0F2B_PREFIX_1       (MOD_0F2B_PREFIX_0 + 1)
 528 #define MOD_0F2B_PREFIX_2       (MOD_0F2B_PREFIX_1 + 1)
 529 #define MOD_0F2B_PREFIX_3       (MOD_0F2B_PREFIX_2 + 1)
 530 #define MOD_0F51                (MOD_0F2B_PREFIX_3 + 1)
 531 #define MOD_0F71_REG_2          (MOD_0F51 + 1)
 532 #define MOD_0F71_REG_4          (MOD_0F71_REG_2 + 1)
 533 #define MOD_0F71_REG_6          (MOD_0F71_REG_4 + 1)
 534 #define MOD_0F72_REG_2          (MOD_0F71_REG_6 + 1)
 535 #define MOD_0F72_REG_4          (MOD_0F72_REG_2 + 1)
 536 #define MOD_0F72_REG_6          (MOD_0F72_REG_4 + 1)
 537 #define MOD_0F73_REG_2          (MOD_0F72_REG_6 + 1)
 538 #define MOD_0F73_REG_3          (MOD_0F73_REG_2 + 1)
 539 #define MOD_0F73_REG_6          (MOD_0F73_REG_3 + 1)
 540 #define MOD_0F73_REG_7          (MOD_0F73_REG_6 + 1)
 541 #define MOD_0FAE_REG_0          (MOD_0F73_REG_7 + 1)
 542 #define MOD_0FAE_REG_1          (MOD_0FAE_REG_0 + 1)
 543 #define MOD_0FAE_REG_2          (MOD_0FAE_REG_1 + 1)
 544 #define MOD_0FAE_REG_3          (MOD_0FAE_REG_2 + 1)
 545 #define MOD_0FAE_REG_5          (MOD_0FAE_REG_3 + 1)
 546 #define MOD_0FAE_REG_6          (MOD_0FAE_REG_5 + 1)
 547 #define MOD_0FAE_REG_7          (MOD_0FAE_REG_6 + 1)
 548 #define MOD_0FB2                (MOD_0FAE_REG_7 + 1)
 549 #define MOD_0FB4                (MOD_0FB2 + 1)
 550 #define MOD_0FB5                (MOD_0FB4 + 1)
 551 #define MOD_0FC7_REG_6          (MOD_0FB5 + 1)
 552 #define MOD_0FC7_REG_7          (MOD_0FC7_REG_6 + 1)
 553 #define MOD_0FD7                (MOD_0FC7_REG_7 + 1)
 554 #define MOD_0FE7_PREFIX_2       (MOD_0FD7 + 1)
 555 #define MOD_0FF0_PREFIX_3       (MOD_0FE7_PREFIX_2 + 1)
 556 #define MOD_0F382A_PREFIX_2     (MOD_0FF0_PREFIX_3 + 1)
 557 #define MOD_62_32BIT            (MOD_0F382A_PREFIX_2 + 1)
 558 #define MOD_C4_32BIT            (MOD_62_32BIT + 1)
 559 #define MOD_C5_32BIT            (MOD_C4_32BIT + 1)
 560
 561 #define RM_0F01_REG_0           0
 562 #define RM_0F01_REG_1           (RM_0F01_REG_0 + 1)
 563 #define RM_0F01_REG_3           (RM_0F01_REG_1 + 1)
 564 #define RM_0F01_REG_7           (RM_0F01_REG_3 + 1)
 565 #define RM_0FAE_REG_5           (RM_0F01_REG_7 + 1)
 566 #define RM_0FAE_REG_6           (RM_0FAE_REG_5 + 1)
 567 #define RM_0FAE_REG_7           (RM_0FAE_REG_6 + 1)
 568
 569 #define PREFIX_90               0
 570 #define PREFIX_0F10             (PREFIX_90 + 1)
 571 #define PREFIX_0F11             (PREFIX_0F10 + 1)
 572 #define PREFIX_0F12             (PREFIX_0F11 + 1)
 573 #define PREFIX_0F16             (PREFIX_0F12 + 1)
 574 #define PREFIX_0F2A             (PREFIX_0F16 + 1)
 575 #define PREFIX_0F2B             (PREFIX_0F2A + 1)
 576 #define PREFIX_0F2C             (PREFIX_0F2B + 1)
 577 #define PREFIX_0F2D             (PREFIX_0F2C + 1)
 578 #define PREFIX_0F2E             (PREFIX_0F2D + 1)
 579 #define PREFIX_0F2F             (PREFIX_0F2E + 1)
 580 #define PREFIX_0F51             (PREFIX_0F2F + 1)
 581 #define PREFIX_0F52             (PREFIX_0F51 + 1)
 582 #define PREFIX_0F53             (PREFIX_0F52 + 1)
 583 #define PREFIX_0F58             (PREFIX_0F53 + 1)
 584 #define PREFIX_0F59             (PREFIX_0F58 + 1)
 585 #define PREFIX_0F5A             (PREFIX_0F59 + 1)
 586 #define PREFIX_0F5B             (PREFIX_0F5A + 1)
 587 #define PREFIX_0F5C             (PREFIX_0F5B + 1)
 588 #define PREFIX_0F5D             (PREFIX_0F5C + 1)
 589 #define PREFIX_0F5E             (PREFIX_0F5D + 1)
 590 #define PREFIX_0F5F             (PREFIX_0F5E + 1)
 591 #define PREFIX_0F60             (PREFIX_0F5F + 1)
 592 #define PREFIX_0F61             (PREFIX_0F60 + 1)
 593 #define PREFIX_0F62             (PREFIX_0F61 + 1)
 594 #define PREFIX_0F6C             (PREFIX_0F62 + 1)
 595 #define PREFIX_0F6D             (PREFIX_0F6C + 1)
 596 #define PREFIX_0F6F             (PREFIX_0F6D + 1)
 597 #define PREFIX_0F70             (PREFIX_0F6F + 1)
 598 #define PREFIX_0F73_REG_3       (PREFIX_0F70 + 1)
 599 #define PREFIX_0F73_REG_7       (PREFIX_0F73_REG_3 + 1)
 600 #define PREFIX_0F78             (PREFIX_0F73_REG_7 + 1)
 601 #define PREFIX_0F79             (PREFIX_0F78 + 1)
 602 #define PREFIX_0F7C             (PREFIX_0F79 + 1)
 603 #define PREFIX_0F7D             (PREFIX_0F7C + 1)
 604 #define PREFIX_0F7E             (PREFIX_0F7D + 1)
 605 #define PREFIX_0F7F             (PREFIX_0F7E + 1)
 606 #define PREFIX_0FB8             (PREFIX_0F7F + 1)
 607 #define PREFIX_0FBD             (PREFIX_0FB8 + 1)
 608 #define PREFIX_0FC2             (PREFIX_0FBD + 1)
 609 #define PREFIX_0FC3             (PREFIX_0FC2 + 1)
 610 #define PREFIX_0FC7_REG_6       (PREFIX_0FC3 + 1)
 611 #define PREFIX_0FD0             (PREFIX_0FC7_REG_6 + 1)
 612 #define PREFIX_0FD6             (PREFIX_0FD0 + 1)
 613 #define PREFIX_0FE6             (PREFIX_0FD6 + 1)
 614 #define PREFIX_0FE7             (PREFIX_0FE6 + 1)
 615 #define PREFIX_0FF0             (PREFIX_0FE7 + 1)
 616 #define PREFIX_0FF7             (PREFIX_0FF0 + 1)
 617 #define PREFIX_0F3810           (PREFIX_0FF7 + 1)
 618 #define PREFIX_0F3814           (PREFIX_0F3810 + 1)
 619 #define PREFIX_0F3815           (PREFIX_0F3814 + 1)
 620 #define PREFIX_0F3817           (PREFIX_0F3815 + 1)
 621 #define PREFIX_0F3820           (PREFIX_0F3817 + 1)
 622 #define PREFIX_0F3821           (PREFIX_0F3820 + 1)
 623 #define PREFIX_0F3822           (PREFIX_0F3821 + 1)
 624 #define PREFIX_0F3823           (PREFIX_0F3822 + 1)
 625 #define PREFIX_0F3824           (PREFIX_0F3823 + 1)
 626 #define PREFIX_0F3825           (PREFIX_0F3824 + 1)
 627 #define PREFIX_0F3828           (PREFIX_0F3825 + 1)
 628 #define PREFIX_0F3829           (PREFIX_0F3828 + 1)
 629 #define PREFIX_0F382A           (PREFIX_0F3829 + 1)
 630 #define PREFIX_0F382B           (PREFIX_0F382A + 1)
 631 #define PREFIX_0F3830           (PREFIX_0F382B + 1)
 632 #define PREFIX_0F3831           (PREFIX_0F3830 + 1)
 633 #define PREFIX_0F3832           (PREFIX_0F3831 + 1)
 634 #define PREFIX_0F3833           (PREFIX_0F3832 + 1)
 635 #define PREFIX_0F3834           (PREFIX_0F3833 + 1)
 636 #define PREFIX_0F3835           (PREFIX_0F3834 + 1)
 637 #define PREFIX_0F3837           (PREFIX_0F3835 + 1)
 638 #define PREFIX_0F3838           (PREFIX_0F3837 + 1)
 639 #define PREFIX_0F3839           (PREFIX_0F3838 + 1)
 640 #define PREFIX_0F383A           (PREFIX_0F3839 + 1)
 641 #define PREFIX_0F383B           (PREFIX_0F383A + 1)
 642 #define PREFIX_0F383C           (PREFIX_0F383B + 1)
 643 #define PREFIX_0F383D           (PREFIX_0F383C + 1)
 644 #define PREFIX_0F383E           (PREFIX_0F383D + 1)
 645 #define PREFIX_0F383F           (PREFIX_0F383E + 1)
 646 #define PREFIX_0F3840           (PREFIX_0F383F + 1)
 647 #define PREFIX_0F3841           (PREFIX_0F3840 + 1)
 648 #define PREFIX_0F38F0           (PREFIX_0F3841 + 1)
 649 #define PREFIX_0F38F1           (PREFIX_0F38F0 + 1)
 650 #define PREFIX_0F3A08           (PREFIX_0F38F1 + 1)
 651 #define PREFIX_0F3A09           (PREFIX_0F3A08 + 1)
 652 #define PREFIX_0F3A0A           (PREFIX_0F3A09 + 1)
 653 #define PREFIX_0F3A0B           (PREFIX_0F3A0A + 1)
 654 #define PREFIX_0F3A0C           (PREFIX_0F3A0B + 1)
 655 #define PREFIX_0F3A0D           (PREFIX_0F3A0C + 1)
 656 #define PREFIX_0F3A0E           (PREFIX_0F3A0D + 1)
 657 #define PREFIX_0F3A14           (PREFIX_0F3A0E + 1)
 658 #define PREFIX_0F3A15           (PREFIX_0F3A14 + 1)
 659 #define PREFIX_0F3A16           (PREFIX_0F3A15 + 1)
 660 #define PREFIX_0F3A17           (PREFIX_0F3A16 + 1)
 661 #define PREFIX_0F3A20           (PREFIX_0F3A17 + 1)
 662 #define PREFIX_0F3A21           (PREFIX_0F3A20 + 1)
 663 #define PREFIX_0F3A22           (PREFIX_0F3A21 + 1)
 664 #define PREFIX_0F3A40           (PREFIX_0F3A22 + 1)
 665 #define PREFIX_0F3A41           (PREFIX_0F3A40 + 1)
 666 #define PREFIX_0F3A42           (PREFIX_0F3A41 + 1)
 667 #define PREFIX_0F3A60           (PREFIX_0F3A42 + 1)
 668 #define PREFIX_0F3A61           (PREFIX_0F3A60 + 1)
 669 #define PREFIX_0F3A62           (PREFIX_0F3A61 + 1)
 670 #define PREFIX_0F3A63           (PREFIX_0F3A62 + 1)
 671
 672 #define X86_64_06               0
 673 #define X86_64_07               (X86_64_06 + 1)
 674 #define X86_64_0D               (X86_64_07 + 1)
 675 #define X86_64_16               (X86_64_0D + 1)
 676 #define X86_64_17               (X86_64_16 + 1)
 677 #define X86_64_1E               (X86_64_17 + 1)
 678 #define X86_64_1F               (X86_64_1E + 1)
 679 #define X86_64_27               (X86_64_1F + 1)
 680 #define X86_64_2F               (X86_64_27 + 1)
 681 #define X86_64_37               (X86_64_2F + 1)
 682 #define X86_64_3F               (X86_64_37 + 1)
 683 #define X86_64_60               (X86_64_3F + 1)
 684 #define X86_64_61               (X86_64_60 + 1)
 685 #define X86_64_62               (X86_64_61 + 1)
 686 #define X86_64_63               (X86_64_62 + 1)
 687 #define X86_64_6D               (X86_64_63 + 1)
 688 #define X86_64_6F               (X86_64_6D + 1)
 689 #define X86_64_9A               (X86_64_6F + 1)
 690 #define X86_64_C4               (X86_64_9A + 1)
 691 #define X86_64_C5               (X86_64_C4 + 1)
 692 #define X86_64_CE               (X86_64_C5 + 1)
 693 #define X86_64_D4               (X86_64_CE + 1)
 694 #define X86_64_D5               (X86_64_D4 + 1)
 695 #define X86_64_EA               (X86_64_D5 + 1)
 696 #define X86_64_0F01_REG_0       (X86_64_EA + 1)
 697 #define X86_64_0F01_REG_1       (X86_64_0F01_REG_0 + 1)
 698 #define X86_64_0F01_REG_2       (X86_64_0F01_REG_1 + 1)
 699 #define X86_64_0F01_REG_3       (X86_64_0F01_REG_2 + 1)
 700
 701 #define THREE_BYTE_0F24         0
 702 #define THREE_BYTE_0F25         (THREE_BYTE_0F24 + 1)
 703 #define THREE_BYTE_0F38         (THREE_BYTE_0F25 + 1)
 704 #define THREE_BYTE_0F3A         (THREE_BYTE_0F38 + 1)
 705 #define THREE_BYTE_0F7A         (THREE_BYTE_0F3A + 1)
 706 #define THREE_BYTE_0F7B         (THREE_BYTE_0F7A + 1)
 707
 708 typedef void (*op_rtn) (int bytemode, int sizeflag);
 709
 710 struct dis386 {
 711   const char *name;
 712   struct
 713     {
 714       op_rtn rtn;
 715       int bytemode;
 716     } op[MAX_OPERANDS];
 717 };
 718
 719 /* Upper case letters in the instruction names here are macros.
 720    'A' => print 'b' if no register operands or suffix_always is true
 721    'B' => print 'b' if suffix_always is true
 722    'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 723           size prefix
 724    'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 725           suffix_always is true
 726    'E' => print 'e' if 32-bit form of jcxz
 727    'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 728    'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 729    'H' => print ",pt" or ",pn" branch hint
 730    'I' => honor following macro letter even in Intel mode (implemented only
 731           for some of the macro letters)
 732    'J' => print 'l'
 733    'K' => print 'd' or 'q' if rex prefix is present.
 734    'L' => print 'l' if suffix_always is true
 735    'M' => print 'r' if intel_mnemonic is false.
 736    'N' => print 'n' if instruction has no wait "prefix"
 737    'O' => print 'd' or 'o' (or 'q' in Intel mode)
 738    'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 739           or suffix_always is true.  print 'q' if rex prefix is present.
 740    'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
 741           is true
 742    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 743    'S' => print 'w', 'l' or 'q' if suffix_always is true
 744    'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 745    'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 746    'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 747    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 748    'X' => print 's', 'd' depending on data16 prefix (for XMM)
 749    'Y' => 'q' if instruction has an REX 64bit overwrite prefix and
 750           suffix_always is true.
 751    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 752    '!' => change condition from true to false or from false to true.
 753    '%' => add 1 upper case letter to the macro.
 754
 755    2 upper case letter macros:
 756    'LQ' => print 'l' ('d' in Intel mode) or 'q' for memory operand
 757            or suffix_always is true
 758
 759    Many of the above letters print nothing in Intel mode.  See "putop"
 760    for the details.
 761
 762    Braces '{' and '}', and vertical bars '|', indicate alternative
 763    mnemonic strings for AT&T and Intel.  */
 764
 765 static const struct dis386 dis386[] = {
 766   /* 00 */
 767   { "addB",             { Eb, Gb } },
 768   { "addS",             { Ev, Gv } },
 769   { "addB",             { Gb, Eb } },
 770   { "addS",             { Gv, Ev } },
 771   { "addB",             { AL, Ib } },
 772   { "addS",             { eAX, Iv } },
 773   { X86_64_TABLE (X86_64_06) },
 774   { X86_64_TABLE (X86_64_07) },
 775   /* 08 */
 776   { "orB",              { Eb, Gb } },
 777   { "orS",              { Ev, Gv } },
 778   { "orB",              { Gb, Eb } },
 779   { "orS",              { Gv, Ev } },
 780   { "orB",              { AL, Ib } },
 781   { "orS",              { eAX, Iv } },
 782   { X86_64_TABLE (X86_64_0D) },
 783   { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 784   /* 10 */
 785   { "adcB",             { Eb, Gb } },
 786   { "adcS",             { Ev, Gv } },
 787   { "adcB",             { Gb, Eb } },
 788   { "adcS",             { Gv, Ev } },
 789   { "adcB",             { AL, Ib } },
 790   { "adcS",             { eAX, Iv } },
 791   { X86_64_TABLE (X86_64_16) },
 792   { X86_64_TABLE (X86_64_17) },
 793   /* 18 */
 794   { "sbbB",             { Eb, Gb } },
 795   { "sbbS",             { Ev, Gv } },
 796   { "sbbB",             { Gb, Eb } },
 797   { "sbbS",             { Gv, Ev } },
 798   { "sbbB",             { AL, Ib } },
 799   { "sbbS",             { eAX, Iv } },
 800   { X86_64_TABLE (X86_64_1E) },
 801   { X86_64_TABLE (X86_64_1F) },
 802   /* 20 */
 803   { "andB",             { Eb, Gb } },
 804   { "andS",             { Ev, Gv } },
 805   { "andB",             { Gb, Eb } },
 806   { "andS",             { Gv, Ev } },
 807   { "andB",             { AL, Ib } },
 808   { "andS",             { eAX, Iv } },
 809   { "(bad)",            { XX } },       /* SEG ES prefix */
 810   { X86_64_TABLE (X86_64_27) },
 811   /* 28 */
 812   { "subB",             { Eb, Gb } },
 813   { "subS",             { Ev, Gv } },
 814   { "subB",             { Gb, Eb } },
 815   { "subS",             { Gv, Ev } },
 816   { "subB",             { AL, Ib } },
 817   { "subS",             { eAX, Iv } },
 818   { "(bad)",            { XX } },       /* SEG CS prefix */
 819   { X86_64_TABLE (X86_64_2F) },
 820   /* 30 */
 821   { "xorB",             { Eb, Gb } },
 822   { "xorS",             { Ev, Gv } },
 823   { "xorB",             { Gb, Eb } },
 824   { "xorS",             { Gv, Ev } },
 825   { "xorB",             { AL, Ib } },
 826   { "xorS",             { eAX, Iv } },
 827   { "(bad)",            { XX } },       /* SEG SS prefix */
 828   { X86_64_TABLE (X86_64_37) },
 829   /* 38 */
 830   { "cmpB",             { Eb, Gb } },
 831   { "cmpS",             { Ev, Gv } },
 832   { "cmpB",             { Gb, Eb } },
 833   { "cmpS",             { Gv, Ev } },
 834   { "cmpB",             { AL, Ib } },
 835   { "cmpS",             { eAX, Iv } },
 836   { "(bad)",            { XX } },       /* SEG DS prefix */
 837   { X86_64_TABLE (X86_64_3F) },
 838   /* 40 */
 839   { "inc{S|}",          { RMeAX } },
 840   { "inc{S|}",          { RMeCX } },
 841   { "inc{S|}",          { RMeDX } },
 842   { "inc{S|}",          { RMeBX } },
 843   { "inc{S|}",          { RMeSP } },
 844   { "inc{S|}",          { RMeBP } },
 845   { "inc{S|}",          { RMeSI } },
 846   { "inc{S|}",          { RMeDI } },
 847   /* 48 */
 848   { "dec{S|}",          { RMeAX } },
 849   { "dec{S|}",          { RMeCX } },
 850   { "dec{S|}",          { RMeDX } },
 851   { "dec{S|}",          { RMeBX } },
 852   { "dec{S|}",          { RMeSP } },
 853   { "dec{S|}",          { RMeBP } },
 854   { "dec{S|}",          { RMeSI } },
 855   { "dec{S|}",          { RMeDI } },
 856   /* 50 */
 857   { "pushV",            { RMrAX } },
 858   { "pushV",            { RMrCX } },
 859   { "pushV",            { RMrDX } },
 860   { "pushV",            { RMrBX } },
 861   { "pushV",            { RMrSP } },
 862   { "pushV",            { RMrBP } },
 863   { "pushV",            { RMrSI } },
 864   { "pushV",            { RMrDI } },
 865   /* 58 */
 866   { "popV",             { RMrAX } },
 867   { "popV",             { RMrCX } },
 868   { "popV",             { RMrDX } },
 869   { "popV",             { RMrBX } },
 870   { "popV",             { RMrSP } },
 871   { "popV",             { RMrBP } },
 872   { "popV",             { RMrSI } },
 873   { "popV",             { RMrDI } },
 874   /* 60 */
 875   { X86_64_TABLE (X86_64_60) },
 876   { X86_64_TABLE (X86_64_61) },
 877   { X86_64_TABLE (X86_64_62) },
 878   { X86_64_TABLE (X86_64_63) },
 879   { "(bad)",            { XX } },       /* seg fs */
 880   { "(bad)",            { XX } },       /* seg gs */
 881   { "(bad)",            { XX } },       /* op size prefix */
 882   { "(bad)",            { XX } },       /* adr size prefix */
 883   /* 68 */
 884   { "pushT",            { Iq } },
 885   { "imulS",            { Gv, Ev, Iv } },
 886   { "pushT",            { sIb } },
 887   { "imulS",            { Gv, Ev, sIb } },
 888   { "ins{b|}",          { Ybr, indirDX } },
 889   { X86_64_TABLE (X86_64_6D) },
 890   { "outs{b|}",         { indirDXr, Xb } },
 891   { X86_64_TABLE (X86_64_6F) },
 892   /* 70 */
 893   { "joH",              { Jb, XX, cond_jump_flag } },
 894   { "jnoH",             { Jb, XX, cond_jump_flag } },
 895   { "jbH",              { Jb, XX, cond_jump_flag } },
 896   { "jaeH",             { Jb, XX, cond_jump_flag } },
 897   { "jeH",              { Jb, XX, cond_jump_flag } },
 898   { "jneH",             { Jb, XX, cond_jump_flag } },
 899   { "jbeH",             { Jb, XX, cond_jump_flag } },
 900   { "jaH",              { Jb, XX, cond_jump_flag } },
 901   /* 78 */
 902   { "jsH",              { Jb, XX, cond_jump_flag } },
 903   { "jnsH",             { Jb, XX, cond_jump_flag } },
 904   { "jpH",              { Jb, XX, cond_jump_flag } },
 905   { "jnpH",             { Jb, XX, cond_jump_flag } },
 906   { "jlH",              { Jb, XX, cond_jump_flag } },
 907   { "jgeH",             { Jb, XX, cond_jump_flag } },
 908   { "jleH",             { Jb, XX, cond_jump_flag } },
 909   { "jgH",              { Jb, XX, cond_jump_flag } },
 910   /* 80 */
 911   { REG_TABLE (REG_80) },
 912   { REG_TABLE (REG_81) },
 913   { "(bad)",            { XX } },
 914   { REG_TABLE (REG_82) },
 915   { "testB",            { Eb, Gb } },
 916   { "testS",            { Ev, Gv } },
 917   { "xchgB",            { Eb, Gb } },
 918   { "xchgS",            { Ev, Gv } },
 919   /* 88 */
 920   { "movB",             { Eb, Gb } },
 921   { "movS",             { Ev, Gv } },
 922   { "movB",             { Gb, Eb } },
 923   { "movS",             { Gv, Ev } },
 924   { "movD",             { Sv, Sw } },
 925   { MOD_TABLE (MOD_8D) },
 926   { "movD",             { Sw, Sv } },
 927   { REG_TABLE (REG_8F) },
 928   /* 90 */
 929   { PREFIX_TABLE (PREFIX_90) },
 930   { "xchgS",            { RMeCX, eAX } },
 931   { "xchgS",            { RMeDX, eAX } },
 932   { "xchgS",            { RMeBX, eAX } },
 933   { "xchgS",            { RMeSP, eAX } },
 934   { "xchgS",            { RMeBP, eAX } },
 935   { "xchgS",            { RMeSI, eAX } },
 936   { "xchgS",            { RMeDI, eAX } },
 937   /* 98 */
 938   { "cW{t|}R",          { XX } },
 939   { "cR{t|}O",          { XX } },
 940   { X86_64_TABLE (X86_64_9A) },
 941   { "(bad)",            { XX } },       /* fwait */
 942   { "pushfT",           { XX } },
 943   { "popfT",            { XX } },
 944   { "sahf",             { XX } },
 945   { "lahf",             { XX } },
 946   /* a0 */
 947   { "movB",             { AL, Ob } },
 948   { "movS",             { eAX, Ov } },
 949   { "movB",             { Ob, AL } },
 950   { "movS",             { Ov, eAX } },
 951   { "movs{b|}",         { Ybr, Xb } },
 952   { "movs{R|}",         { Yvr, Xv } },
 953   { "cmps{b|}",         { Xb, Yb } },
 954   { "cmps{R|}",         { Xv, Yv } },
 955   /* a8 */
 956   { "testB",            { AL, Ib } },
 957   { "testS",            { eAX, Iv } },
 958   { "stosB",            { Ybr, AL } },
 959   { "stosS",            { Yvr, eAX } },
 960   { "lodsB",            { ALr, Xb } },
 961   { "lodsS",            { eAXr, Xv } },
 962   { "scasB",            { AL, Yb } },
 963   { "scasS",            { eAX, Yv } },
 964   /* b0 */
 965   { "movB",             { RMAL, Ib } },
 966   { "movB",             { RMCL, Ib } },
 967   { "movB",             { RMDL, Ib } },
 968   { "movB",             { RMBL, Ib } },
 969   { "movB",             { RMAH, Ib } },
 970   { "movB",             { RMCH, Ib } },
 971   { "movB",             { RMDH, Ib } },
 972   { "movB",             { RMBH, Ib } },
 973   /* b8 */
 974   { "movS",             { RMeAX, Iv64 } },
 975   { "movS",             { RMeCX, Iv64 } },
 976   { "movS",             { RMeDX, Iv64 } },
 977   { "movS",             { RMeBX, Iv64 } },
 978   { "movS",             { RMeSP, Iv64 } },
 979   { "movS",             { RMeBP, Iv64 } },
 980   { "movS",             { RMeSI, Iv64 } },
 981   { "movS",             { RMeDI, Iv64 } },
 982   /* c0 */
 983   { REG_TABLE (REG_C0) },
 984   { REG_TABLE (REG_C1) },
 985   { "retT",             { Iw } },
 986   { "retT",             { XX } },
 987   { X86_64_TABLE (X86_64_C4) },
 988   { X86_64_TABLE (X86_64_C5) },
 989   { REG_TABLE (REG_C6) },
 990   { REG_TABLE (REG_C7) },
 991   /* c8 */
 992   { "enterT",           { Iw, Ib } },
 993   { "leaveT",           { XX } },
 994   { "lretP",            { Iw } },
 995   { "lretP",            { XX } },
 996   { "int3",             { XX } },
 997   { "int",              { Ib } },
 998   { X86_64_TABLE (X86_64_CE) },
 999   { "iretP",            { XX } },
1000   /* d0 */
1001   { REG_TABLE (REG_D0) },
1002   { REG_TABLE (REG_D1) },
1003   { REG_TABLE (REG_D2) },
1004   { REG_TABLE (REG_D3) },
1005   { X86_64_TABLE (X86_64_D4) },
1006   { X86_64_TABLE (X86_64_D5) },
1007   { "(bad)",            { XX } },
1008   { "xlat",             { DSBX } },
1009   /* d8 */
1010   { FLOAT },
1011   { FLOAT },
1012   { FLOAT },
1013   { FLOAT },
1014   { FLOAT },
1015   { FLOAT },
1016   { FLOAT },
1017   { FLOAT },
1018   /* e0 */
1019   { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
1020   { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
1021   { "loopFH",           { Jb, XX, loop_jcxz_flag } },
1022   { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
1023   { "inB",              { AL, Ib } },
1024   { "inG",              { zAX, Ib } },
1025   { "outB",             { Ib, AL } },
1026   { "outG",             { Ib, zAX } },
1027   /* e8 */
1028   { "callT",            { Jv } },
1029   { "jmpT",             { Jv } },
1030   { X86_64_TABLE (X86_64_EA) },
1031   { "jmp",              { Jb } },
1032   { "inB",              { AL, indirDX } },
1033   { "inG",              { zAX, indirDX } },
1034   { "outB",             { indirDX, AL } },
1035   { "outG",             { indirDX, zAX } },
1036   /* f0 */
1037   { "(bad)",            { XX } },       /* lock prefix */
1038   { "icebp",            { XX } },
1039   { "(bad)",            { XX } },       /* repne */
1040   { "(bad)",            { XX } },       /* repz */
1041   { "hlt",              { XX } },
1042   { "cmc",              { XX } },
1043   { REG_TABLE (REG_F6) },
1044   { REG_TABLE (REG_F7) },
1045   /* f8 */
1046   { "clc",              { XX } },
1047   { "stc",              { XX } },
1048   { "cli",              { XX } },
1049   { "sti",              { XX } },
1050   { "cld",              { XX } },
1051   { "std",              { XX } },
1052   { REG_TABLE (REG_FE) },
1053   { REG_TABLE (REG_FF) },
1054 };
1055
1056 static const struct dis386 dis386_twobyte[] = {
1057   /* 00 */
1058   { REG_TABLE (REG_0F00 ) },
1059   { REG_TABLE (REG_0F01 ) },
1060   { "larS",             { Gv, Ew } },
1061   { "lslS",             { Gv, Ew } },
1062   { "(bad)",            { XX } },
1063   { "syscall",          { XX } },
1064   { "clts",             { XX } },
1065   { "sysretP",          { XX } },
1066   /* 08 */
1067   { "invd",             { XX } },
1068   { "wbinvd",           { XX } },
1069   { "(bad)",            { XX } },
1070   { "ud2a",             { XX } },
1071   { "(bad)",            { XX } },
1072   { REG_TABLE (REG_0F0D) },
1073   { "femms",            { XX } },
1074   { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1075   /* 10 */
1076   { PREFIX_TABLE (PREFIX_0F10) },
1077   { PREFIX_TABLE (PREFIX_0F11) },
1078   { PREFIX_TABLE (PREFIX_0F12) },
1079   { MOD_TABLE (MOD_0F13) },
1080   { "unpcklpX",         { XM, EXx } },
1081   { "unpckhpX",         { XM, EXx } },
1082   { PREFIX_TABLE (PREFIX_0F16) },
1083   { MOD_TABLE (MOD_0F17) },
1084   /* 18 */
1085   { REG_TABLE (REG_0F18) },
1086   { "nopQ",             { Ev } },
1087   { "nopQ",             { Ev } },
1088   { "nopQ",             { Ev } },
1089   { "nopQ",             { Ev } },
1090   { "nopQ",             { Ev } },
1091   { "nopQ",             { Ev } },
1092   { "nopQ",             { Ev } },
1093   /* 20 */
1094   { MOD_TABLE (MOD_0F20) },
1095   { MOD_TABLE (MOD_0F21) },
1096   { MOD_TABLE (MOD_0F22) },
1097   { MOD_TABLE (MOD_0F23) },
1098   { MOD_TABLE (MOD_0F24) },
1099   { THREE_BYTE_TABLE (THREE_BYTE_0F25) },
1100   { MOD_TABLE (MOD_0F26) },
1101   { "(bad)",            { XX } },
1102   /* 28 */
1103   { "movapX",           { XM, EXx } },
1104   { "movapX",           { EXx, XM } },
1105   { PREFIX_TABLE (PREFIX_0F2A) },
1106   { PREFIX_TABLE (PREFIX_0F2B) },
1107   { PREFIX_TABLE (PREFIX_0F2C) },
1108   { PREFIX_TABLE (PREFIX_0F2D) },
1109   { PREFIX_TABLE (PREFIX_0F2E) },
1110   { PREFIX_TABLE (PREFIX_0F2F) },
1111   /* 30 */
1112   { "wrmsr",            { XX } },
1113   { "rdtsc",            { XX } },
1114   { "rdmsr",            { XX } },
1115   { "rdpmc",            { XX } },
1116   { "sysenter",         { XX } },
1117   { "sysexit",          { XX } },
1118   { "(bad)",            { XX } },
1119   { "getsec",           { XX } },
1120   /* 38 */
1121   { THREE_BYTE_TABLE (THREE_BYTE_0F38) },
1122   { "(bad)",            { XX } },
1123   { THREE_BYTE_TABLE (THREE_BYTE_0F3A) },
1124   { "(bad)",            { XX } },
1125   { "(bad)",            { XX } },
1126   { "(bad)",            { XX } },
1127   { "(bad)",            { XX } },
1128   { "(bad)",            { XX } },
1129   /* 40 */
1130   { "cmovo",            { Gv, Ev } },
1131   { "cmovno",           { Gv, Ev } },
1132   { "cmovb",            { Gv, Ev } },
1133   { "cmovae",           { Gv, Ev } },
1134   { "cmove",            { Gv, Ev } },
1135   { "cmovne",           { Gv, Ev } },
1136   { "cmovbe",           { Gv, Ev } },
1137   { "cmova",            { Gv, Ev } },
1138   /* 48 */
1139   { "cmovs",            { Gv, Ev } },
1140   { "cmovns",           { Gv, Ev } },
1141   { "cmovp",            { Gv, Ev } },
1142   { "cmovnp",           { Gv, Ev } },
1143   { "cmovl",            { Gv, Ev } },
1144   { "cmovge",           { Gv, Ev } },
1145   { "cmovle",           { Gv, Ev } },
1146   { "cmovg",            { Gv, Ev } },
1147   /* 50 */
1148   { MOD_TABLE (MOD_0F51) },
1149   { PREFIX_TABLE (PREFIX_0F51) },
1150   { PREFIX_TABLE (PREFIX_0F52) },
1151   { PREFIX_TABLE (PREFIX_0F53) },
1152   { "andpX",            { XM, EXx } },
1153   { "andnpX",           { XM, EXx } },
1154   { "orpX",             { XM, EXx } },
1155   { "xorpX",            { XM, EXx } },
1156   /* 58 */
1157   { PREFIX_TABLE (PREFIX_0F58) },
1158   { PREFIX_TABLE (PREFIX_0F59) },
1159   { PREFIX_TABLE (PREFIX_0F5A) },
1160   { PREFIX_TABLE (PREFIX_0F5B) },
1161   { PREFIX_TABLE (PREFIX_0F5C) },
1162   { PREFIX_TABLE (PREFIX_0F5D) },
1163   { PREFIX_TABLE (PREFIX_0F5E) },
1164   { PREFIX_TABLE (PREFIX_0F5F) },
1165   /* 60 */
1166   { PREFIX_TABLE (PREFIX_0F60) },
1167   { PREFIX_TABLE (PREFIX_0F61) },
1168   { PREFIX_TABLE (PREFIX_0F62) },
1169   { "packsswb",         { MX, EM } },
1170   { "pcmpgtb",          { MX, EM } },
1171   { "pcmpgtw",          { MX, EM } },
1172   { "pcmpgtd",          { MX, EM } },
1173   { "packuswb",         { MX, EM } },
1174   /* 68 */
1175   { "punpckhbw",        { MX, EM } },
1176   { "punpckhwd",        { MX, EM } },
1177   { "punpckhdq",        { MX, EM } },
1178   { "packssdw",         { MX, EM } },
1179   { PREFIX_TABLE (PREFIX_0F6C) },
1180   { PREFIX_TABLE (PREFIX_0F6D) },
1181   { "movK",             { MX, Edq } },
1182   { PREFIX_TABLE (PREFIX_0F6F) },
1183   /* 70 */
1184   { PREFIX_TABLE (PREFIX_0F70) },
1185   { REG_TABLE (REG_0F71) },
1186   { REG_TABLE (REG_0F72) },
1187   { REG_TABLE (REG_0F73) },
1188   { "pcmpeqb",          { MX, EM } },
1189   { "pcmpeqw",          { MX, EM } },
1190   { "pcmpeqd",          { MX, EM } },
1191   { "emms",             { XX } },
1192   /* 78 */
1193   { PREFIX_TABLE (PREFIX_0F78) },
1194   { PREFIX_TABLE (PREFIX_0F79) },
1195   { THREE_BYTE_TABLE (THREE_BYTE_0F7A) },
1196   { THREE_BYTE_TABLE (THREE_BYTE_0F7B) },
1197   { PREFIX_TABLE (PREFIX_0F7C) },
1198   { PREFIX_TABLE (PREFIX_0F7D) },
1199   { PREFIX_TABLE (PREFIX_0F7E) },
1200   { PREFIX_TABLE (PREFIX_0F7F) },
1201   /* 80 */
1202   { "joH",              { Jv, XX, cond_jump_flag } },
1203   { "jnoH",             { Jv, XX, cond_jump_flag } },
1204   { "jbH",              { Jv, XX, cond_jump_flag } },
1205   { "jaeH",             { Jv, XX, cond_jump_flag } },
1206   { "jeH",              { Jv, XX, cond_jump_flag } },
1207   { "jneH",             { Jv, XX, cond_jump_flag } },
1208   { "jbeH",             { Jv, XX, cond_jump_flag } },
1209   { "jaH",              { Jv, XX, cond_jump_flag } },
1210   /* 88 */
1211   { "jsH",              { Jv, XX, cond_jump_flag } },
1212   { "jnsH",             { Jv, XX, cond_jump_flag } },
1213   { "jpH",              { Jv, XX, cond_jump_flag } },
1214   { "jnpH",             { Jv, XX, cond_jump_flag } },
1215   { "jlH",              { Jv, XX, cond_jump_flag } },
1216   { "jgeH",             { Jv, XX, cond_jump_flag } },
1217   { "jleH",             { Jv, XX, cond_jump_flag } },
1218   { "jgH",              { Jv, XX, cond_jump_flag } },
1219   /* 90 */
1220   { "seto",             { Eb } },
1221   { "setno",            { Eb } },
1222   { "setb",             { Eb } },
1223   { "setae",            { Eb } },
1224   { "sete",             { Eb } },
1225   { "setne",            { Eb } },
1226   { "setbe",            { Eb } },
1227   { "seta",             { Eb } },
1228   /* 98 */
1229   { "sets",             { Eb } },
1230   { "setns",            { Eb } },
1231   { "setp",             { Eb } },
1232   { "setnp",            { Eb } },
1233   { "setl",             { Eb } },
1234   { "setge",            { Eb } },
1235   { "setle",            { Eb } },
1236   { "setg",             { Eb } },
1237   /* a0 */
1238   { "pushT",            { fs } },
1239   { "popT",             { fs } },
1240   { "cpuid",            { XX } },
1241   { "btS",              { Ev, Gv } },
1242   { "shldS",            { Ev, Gv, Ib } },
1243   { "shldS",            { Ev, Gv, CL } },
1244   { REG_TABLE (REG_0FA6) },
1245   { REG_TABLE (REG_0FA7) },
1246   /* a8 */
1247   { "pushT",            { gs } },
1248   { "popT",             { gs } },
1249   { "rsm",              { XX } },
1250   { "btsS",             { Ev, Gv } },
1251   { "shrdS",            { Ev, Gv, Ib } },
1252   { "shrdS",            { Ev, Gv, CL } },
1253   { REG_TABLE (REG_0FAE) },
1254   { "imulS",            { Gv, Ev } },
1255   /* b0 */
1256   { "cmpxchgB",         { Eb, Gb } },
1257   { "cmpxchgS",         { Ev, Gv } },
1258   { MOD_TABLE (MOD_0FB2) },
1259   { "btrS",             { Ev, Gv } },
1260   { MOD_TABLE (MOD_0FB4) },
1261   { MOD_TABLE (MOD_0FB5) },
1262   { "movz{bR|x}",       { Gv, Eb } },
1263   { "movz{wR|x}",       { Gv, Ew } }, /* yes, there really is movzww ! */
1264   /* b8 */
1265   { PREFIX_TABLE (PREFIX_0FB8) },
1266   { "ud2b",             { XX } },
1267   { REG_TABLE (REG_0FBA) },
1268   { "btcS",             { Ev, Gv } },
1269   { "bsfS",             { Gv, Ev } },
1270   { PREFIX_TABLE (PREFIX_0FBD) },
1271   { "movs{bR|x}",       { Gv, Eb } },
1272   { "movs{wR|x}",       { Gv, Ew } }, /* yes, there really is movsww ! */
1273   /* c0 */
1274   { "xaddB",            { Eb, Gb } },
1275   { "xaddS",            { Ev, Gv } },
1276   { PREFIX_TABLE (PREFIX_0FC2) },
1277   { PREFIX_TABLE (PREFIX_0FC3) },
1278   { "pinsrw",           { MX, Edqw, Ib } },
1279   { "pextrw",           { Gdq, MS, Ib } },
1280   { "shufpX",           { XM, EXx, Ib } },
1281   { REG_TABLE (REG_0FC7) },
1282   /* c8 */
1283   { "bswap",            { RMeAX } },
1284   { "bswap",            { RMeCX } },
1285   { "bswap",            { RMeDX } },
1286   { "bswap",            { RMeBX } },
1287   { "bswap",            { RMeSP } },
1288   { "bswap",            { RMeBP } },
1289   { "bswap",            { RMeSI } },
1290   { "bswap",            { RMeDI } },
1291   /* d0 */
1292   { PREFIX_TABLE (PREFIX_0FD0) },
1293   { "psrlw",            { MX, EM } },
1294   { "psrld",            { MX, EM } },
1295   { "psrlq",            { MX, EM } },
1296   { "paddq",            { MX, EM } },
1297   { "pmullw",           { MX, EM } },
1298   { PREFIX_TABLE (PREFIX_0FD6) },
1299   { MOD_TABLE (MOD_0FD7) },
1300   /* d8 */
1301   { "psubusb",          { MX, EM } },
1302   { "psubusw",          { MX, EM } },
1303   { "pminub",           { MX, EM } },
1304   { "pand",             { MX, EM } },
1305   { "paddusb",          { MX, EM } },
1306   { "paddusw",          { MX, EM } },
1307   { "pmaxub",           { MX, EM } },
1308   { "pandn",            { MX, EM } },
1309   /* e0 */
1310   { "pavgb",            { MX, EM } },
1311   { "psraw",            { MX, EM } },
1312   { "psrad",            { MX, EM } },
1313   { "pavgw",            { MX, EM } },
1314   { "pmulhuw",          { MX, EM } },
1315   { "pmulhw",           { MX, EM } },
1316   { PREFIX_TABLE (PREFIX_0FE6) },
1317   { PREFIX_TABLE (PREFIX_0FE7) },
1318   /* e8 */
1319   { "psubsb",           { MX, EM } },
1320   { "psubsw",           { MX, EM } },
1321   { "pminsw",           { MX, EM } },
1322   { "por",              { MX, EM } },
1323   { "paddsb",           { MX, EM } },
1324   { "paddsw",           { MX, EM } },
1325   { "pmaxsw",           { MX, EM } },
1326   { "pxor",             { MX, EM } },
1327   /* f0 */
1328   { PREFIX_TABLE (PREFIX_0FF0) },
1329   { "psllw",            { MX, EM } },
1330   { "pslld",            { MX, EM } },
1331   { "psllq",            { MX, EM } },
1332   { "pmuludq",          { MX, EM } },
1333   { "pmaddwd",          { MX, EM } },
1334   { "psadbw",           { MX, EM } },
1335   { PREFIX_TABLE (PREFIX_0FF7) },
1336   /* f8 */
1337   { "psubb",            { MX, EM } },
1338   { "psubw",            { MX, EM } },
1339   { "psubd",            { MX, EM } },
1340   { "psubq",            { MX, EM } },
1341   { "paddb",            { MX, EM } },
1342   { "paddw",            { MX, EM } },
1343   { "paddd",            { MX, EM } },
1344   { "(bad)",            { XX } },
1345 };
1346
1347 static const unsigned char onebyte_has_modrm[256] = {
1348   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1349   /*       -------------------------------        */
1350   /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1351   /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1352   /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1353   /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1354   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1355   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1356   /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1357   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1358   /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1359   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1360   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1361   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1362   /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1363   /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1364   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1365   /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1366   /*       -------------------------------        */
1367   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1368 };
1369
1370 static const unsigned char twobyte_has_modrm[256] = {
1371   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1372   /*       -------------------------------        */
1373   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1374   /* 10 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 1f */
1375   /* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
1376   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1377   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1378   /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1379   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1380   /* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
1381   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1382   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1383   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1384   /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1385   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1386   /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1387   /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1388   /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1389   /*       -------------------------------        */
1390   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1391 };
1392
1393 static char obuf[100];
1394 static char *obufp;
1395 static char scratchbuf[100];
1396 static unsigned char *start_codep;
1397 static unsigned char *insn_codep;
1398 static unsigned char *codep;
1399 static const char *lock_prefix;
1400 static const char *data_prefix;
1401 static const char *addr_prefix;
1402 static const char *repz_prefix;
1403 static const char *repnz_prefix;
1404 static disassemble_info *the_info;
1405 static struct
1406   {
1407     int mod;
1408     int reg;
1409     int rm;
1410   }
1411 modrm;
1412 static unsigned char need_modrm;
1413
1414 /* If we are accessing mod/rm/reg without need_modrm set, then the
1415    values are stale.  Hitting this abort likely indicates that you
1416    need to update onebyte_has_modrm or twobyte_has_modrm.  */
1417 #define MODRM_CHECK  if (!need_modrm) abort ()
1418
1419 static const char **names64;
1420 static const char **names32;
1421 static const char **names16;
1422 static const char **names8;
1423 static const char **names8rex;
1424 static const char **names_seg;
1425 static const char *index64;
1426 static const char *index32;
1427 static const char **index16;
1428
1429 static const char *intel_names64[] = {
1430   "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1431   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1432 };
1433 static const char *intel_names32[] = {
1434   "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1435   "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1436 };
1437 static const char *intel_names16[] = {
1438   "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1439   "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1440 };
1441 static const char *intel_names8[] = {
1442   "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1443 };
1444 static const char *intel_names8rex[] = {
1445   "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1446   "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1447 };
1448 static const char *intel_names_seg[] = {
1449   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1450 };
1451 static const char *intel_index64 = "riz";
1452 static const char *intel_index32 = "eiz";
1453 static const char *intel_index16[] = {
1454   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1455 };
1456
1457 static const char *att_names64[] = {
1458   "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1459   "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1460 };
1461 static const char *att_names32[] = {
1462   "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1463   "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1464 };
1465 static const char *att_names16[] = {
1466   "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1467   "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1468 };
1469 static const char *att_names8[] = {
1470   "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1471 };
1472 static const char *att_names8rex[] = {
1473   "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1474   "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1475 };
1476 static const char *att_names_seg[] = {
1477   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1478 };
1479 static const char *att_index64 = "%riz";
1480 static const char *att_index32 = "%eiz";
1481 static const char *att_index16[] = {
1482   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1483 };
1484
1485 static const struct dis386 reg_table[][8] = {
1486   /* REG_80 */
1487   {
1488     { "addA",   { Eb, Ib } },
1489     { "orA",    { Eb, Ib } },
1490     { "adcA",   { Eb, Ib } },
1491     { "sbbA",   { Eb, Ib } },
1492     { "andA",   { Eb, Ib } },
1493     { "subA",   { Eb, Ib } },
1494     { "xorA",   { Eb, Ib } },
1495     { "cmpA",   { Eb, Ib } },
1496   },
1497   /* REG_81 */
1498   {
1499     { "addQ",   { Ev, Iv } },
1500     { "orQ",    { Ev, Iv } },
1501     { "adcQ",   { Ev, Iv } },
1502     { "sbbQ",   { Ev, Iv } },
1503     { "andQ",   { Ev, Iv } },
1504     { "subQ",   { Ev, Iv } },
1505     { "xorQ",   { Ev, Iv } },
1506     { "cmpQ",   { Ev, Iv } },
1507   },
1508   /* REG_82 */
1509   {
1510     { "addQ",   { Ev, sIb } },
1511     { "orQ",    { Ev, sIb } },
1512     { "adcQ",   { Ev, sIb } },
1513     { "sbbQ",   { Ev, sIb } },
1514     { "andQ",   { Ev, sIb } },
1515     { "subQ",   { Ev, sIb } },
1516     { "xorQ",   { Ev, sIb } },
1517     { "cmpQ",   { Ev, sIb } },
1518   },
1519   /* REG_8F */
1520   {
1521     { "popU",   { stackEv } },
1522     { "(bad)",  { XX } },
1523     { "(bad)",  { XX } },
1524     { "(bad)",  { XX } },
1525     { "(bad)",  { XX } },
1526     { "(bad)",  { XX } },
1527     { "(bad)",  { XX } },
1528     { "(bad)",  { XX } },
1529   },
1530   /* REG_C0 */
1531   {
1532     { "rolA",   { Eb, Ib } },
1533     { "rorA",   { Eb, Ib } },
1534     { "rclA",   { Eb, Ib } },
1535     { "rcrA",   { Eb, Ib } },
1536     { "shlA",   { Eb, Ib } },
1537     { "shrA",   { Eb, Ib } },
1538     { "(bad)",  { XX } },
1539     { "sarA",   { Eb, Ib } },
1540   },
1541   /* REG_C1 */
1542   {
1543     { "rolQ",   { Ev, Ib } },
1544     { "rorQ",   { Ev, Ib } },
1545     { "rclQ",   { Ev, Ib } },
1546     { "rcrQ",   { Ev, Ib } },
1547     { "shlQ",   { Ev, Ib } },
1548     { "shrQ",   { Ev, Ib } },
1549     { "(bad)",  { XX } },
1550     { "sarQ",   { Ev, Ib } },
1551   },
1552   /* REG_C6 */
1553   {
1554     { "movA",   { Eb, Ib } },
1555     { "(bad)",  { XX } },
1556     { "(bad)",  { XX } },
1557     { "(bad)",  { XX } },
1558     { "(bad)",  { XX } },
1559     { "(bad)",  { XX } },
1560     { "(bad)",  { XX } },
1561     { "(bad)",  { XX } },
1562   },
1563   /* REG_C7 */
1564   {
1565     { "movQ",   { Ev, Iv } },
1566     { "(bad)",  { XX } },
1567     { "(bad)",  { XX } },
1568     { "(bad)",  { XX } },
1569     { "(bad)",  { XX } },
1570     { "(bad)",  { XX } },
1571     { "(bad)",  { XX } },
1572     { "(bad)",  { XX } },
1573   },
1574   /* REG_D0 */
1575   {
1576     { "rolA",   { Eb, I1 } },
1577     { "rorA",   { Eb, I1 } },
1578     { "rclA",   { Eb, I1 } },
1579     { "rcrA",   { Eb, I1 } },
1580     { "shlA",   { Eb, I1 } },
1581     { "shrA",   { Eb, I1 } },
1582     { "(bad)",  { XX } },
1583     { "sarA",   { Eb, I1 } },
1584   },
1585   /* REG_D1 */
1586   {
1587     { "rolQ",   { Ev, I1 } },
1588     { "rorQ",   { Ev, I1 } },
1589     { "rclQ",   { Ev, I1 } },
1590     { "rcrQ",   { Ev, I1 } },
1591     { "shlQ",   { Ev, I1 } },
1592     { "shrQ",   { Ev, I1 } },
1593     { "(bad)",  { XX } },
1594     { "sarQ",   { Ev, I1 } },
1595   },
1596   /* REG_D2 */
1597   {
1598     { "rolA",   { Eb, CL } },
1599     { "rorA",   { Eb, CL } },
1600     { "rclA",   { Eb, CL } },
1601     { "rcrA",   { Eb, CL } },
1602     { "shlA",   { Eb, CL } },
1603     { "shrA",   { Eb, CL } },
1604     { "(bad)",  { XX } },
1605     { "sarA",   { Eb, CL } },
1606   },
1607   /* REG_D3 */
1608   {
1609     { "rolQ",   { Ev, CL } },
1610     { "rorQ",   { Ev, CL } },
1611     { "rclQ",   { Ev, CL } },
1612     { "rcrQ",   { Ev, CL } },
1613     { "shlQ",   { Ev, CL } },
1614     { "shrQ",   { Ev, CL } },
1615     { "(bad)",  { XX } },
1616     { "sarQ",   { Ev, CL } },
1617   },
1618   /* REG_F6 */
1619   {
1620     { "testA",  { Eb, Ib } },
1621     { "(bad)",  { XX } },
1622     { "notA",   { Eb } },
1623     { "negA",   { Eb } },
1624     { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1625     { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1626     { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1627     { "idivA",  { Eb } },       /* and idiv for consistency.               */
1628   },
1629   /* REG_F7 */
1630   {
1631     { "testQ",  { Ev, Iv } },
1632     { "(bad)",  { XX } },
1633     { "notQ",   { Ev } },
1634     { "negQ",   { Ev } },
1635     { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1636     { "imulQ",  { Ev } },
1637     { "divQ",   { Ev } },
1638     { "idivQ",  { Ev } },
1639   },
1640   /* REG_FE */
1641   {
1642     { "incA",   { Eb } },
1643     { "decA",   { Eb } },
1644     { "(bad)",  { XX } },
1645     { "(bad)",  { XX } },
1646     { "(bad)",  { XX } },
1647     { "(bad)",  { XX } },
1648     { "(bad)",  { XX } },
1649     { "(bad)",  { XX } },
1650   },
1651   /* REG_FF */
1652   {
1653     { "incQ",   { Ev } },
1654     { "decQ",   { Ev } },
1655     { "callT",  { indirEv } },
1656     { "JcallT", { indirEp } },
1657     { "jmpT",   { indirEv } },
1658     { "JjmpT",  { indirEp } },
1659     { "pushU",  { stackEv } },
1660     { "(bad)",  { XX } },
1661   },
1662   /* REG_0F00 */
1663   {
1664     { "sldtD",  { Sv } },
1665     { "strD",   { Sv } },
1666     { "lldt",   { Ew } },
1667     { "ltr",    { Ew } },
1668     { "verr",   { Ew } },
1669     { "verw",   { Ew } },
1670     { "(bad)",  { XX } },
1671     { "(bad)",  { XX } },
1672   },
1673   /* REG_0F01 */
1674   {
1675     { MOD_TABLE (MOD_0F01_REG_0) },
1676     { MOD_TABLE (MOD_0F01_REG_1) },
1677     { MOD_TABLE (MOD_0F01_REG_2) },
1678     { MOD_TABLE (MOD_0F01_REG_3) },
1679     { "smswD",  { Sv } },
1680     { "(bad)",  { XX } },
1681     { "lmsw",   { Ew } },
1682     { MOD_TABLE (MOD_0F01_REG_7) },
1683   },
1684   /* REG_0F0D */
1685   {
1686     { "prefetch",       { Eb } },
1687     { "prefetchw",      { Eb } },
1688     { "(bad)",          { XX } },
1689     { "(bad)",          { XX } },
1690     { "(bad)",          { XX } },
1691     { "(bad)",          { XX } },
1692     { "(bad)",          { XX } },
1693     { "(bad)",          { XX } },
1694   },
1695   /* REG_0F18 */
1696   {
1697     { MOD_TABLE (MOD_0F18_REG_0) },
1698     { MOD_TABLE (MOD_0F18_REG_1) },
1699     { MOD_TABLE (MOD_0F18_REG_2) },
1700     { MOD_TABLE (MOD_0F18_REG_3) },
1701     { "(bad)",  { XX } },
1702     { "(bad)",  { XX } },
1703     { "(bad)",  { XX } },
1704     { "(bad)",  { XX } },
1705   },
1706   /* REG_0F71 */
1707   {
1708     { "(bad)",  { XX } },
1709     { "(bad)",  { XX } },
1710     { MOD_TABLE (MOD_0F71_REG_2) },
1711     { "(bad)",  { XX } },
1712     { MOD_TABLE (MOD_0F71_REG_4) },
1713     { "(bad)",  { XX } },
1714     { MOD_TABLE (MOD_0F71_REG_6) },
1715     { "(bad)",  { XX } },
1716   },
1717   /* REG_0F72 */
1718   {
1719     { "(bad)",  { XX } },
1720     { "(bad)",  { XX } },
1721     { MOD_TABLE (MOD_0F72_REG_2) },
1722     { "(bad)",  { XX } },
1723     { MOD_TABLE (MOD_0F72_REG_4) },
1724     { "(bad)",  { XX } },
1725     { MOD_TABLE (MOD_0F72_REG_6) },
1726     { "(bad)",  { XX } },
1727   },
1728   /* REG_0F73 */
1729   {
1730     { "(bad)",  { XX } },
1731     { "(bad)",  { XX } },
1732     { MOD_TABLE (MOD_0F73_REG_2) },
1733     { MOD_TABLE (MOD_0F73_REG_3) },
1734     { "(bad)",  { XX } },
1735     { "(bad)",  { XX } },
1736     { MOD_TABLE (MOD_0F73_REG_6) },
1737     { MOD_TABLE (MOD_0F73_REG_7) },
1738   },
1739   /* REG_0FA6 */
1740   {
1741     { "montmul",        { { OP_0f07, 0 } } },
1742     { "xsha1",          { { OP_0f07, 0 } } },
1743     { "xsha256",        { { OP_0f07, 0 } } },
1744     { "(bad)",          { { OP_0f07, 0 } } },
1745     { "(bad)",          { { OP_0f07, 0 } } },
1746     { "(bad)",          { { OP_0f07, 0 } } },
1747     { "(bad)",          { { OP_0f07, 0 } } },
1748     { "(bad)",          { { OP_0f07, 0 } } },
1749   },
1750   /* REG_0FA7 */
1751   {
1752     { "xstore-rng",     { { OP_0f07, 0 } } },
1753     { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1754     { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1755     { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1756     { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1757     { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1758     { "(bad)",          { { OP_0f07, 0 } } },
1759     { "(bad)",          { { OP_0f07, 0 } } },
1760   },
1761   /* REG_0FAE */
1762   {
1763     { MOD_TABLE (MOD_0FAE_REG_0) },
1764     { MOD_TABLE (MOD_0FAE_REG_1) },
1765     { MOD_TABLE (MOD_0FAE_REG_2) },
1766     { MOD_TABLE (MOD_0FAE_REG_3) },
1767     { "(bad)",  { XX } },
1768     { MOD_TABLE (MOD_0FAE_REG_5) },
1769     { MOD_TABLE (MOD_0FAE_REG_6) },
1770     { MOD_TABLE (MOD_0FAE_REG_7) },
1771   },
1772   /* REG_0FBA */
1773   {
1774     { "(bad)",  { XX } },
1775     { "(bad)",  { XX } },
1776     { "(bad)",  { XX } },
1777     { "(bad)",  { XX } },
1778     { "btQ",    { Ev, Ib } },
1779     { "btsQ",   { Ev, Ib } },
1780     { "btrQ",   { Ev, Ib } },
1781     { "btcQ",   { Ev, Ib } },
1782   },
1783   /* REG_0FC7 */
1784   {
1785     { "(bad)",  { XX } },
1786     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1787     { "(bad)",  { XX } },
1788     { "(bad)",  { XX } },
1789     { "(bad)",  { XX } },
1790     { "(bad)",  { XX } },
1791     { MOD_TABLE (MOD_0FC7_REG_6) },
1792     { MOD_TABLE (MOD_0FC7_REG_7) },
1793   },
1794 };
1795
1796 static const struct dis386 prefix_table[][4] = {
1797   /* PREFIX_90 */
1798   {
1799     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1800     { "pause", { XX } },
1801     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1802     { "(bad)", { XX } },
1803   },
1804
1805   /* PREFIX_0F10 */
1806   {
1807     { "movups", { XM, EXx } },
1808     { "movss",  { XM, EXd } },
1809     { "movupd", { XM, EXx } },
1810     { "movsd",  { XM, EXq } },
1811   },
1812
1813   /* PREFIX_0F11 */
1814   {
1815     { "movups", { EXx, XM } },
1816     { "movss",  { EXd, XM } },
1817     { "movupd", { EXx, XM } },
1818     { "movsd",  { EXq, XM } },
1819   },
1820
1821   /* PREFIX_0F12 */
1822   {
1823     { MOD_TABLE (MOD_0F12_PREFIX_0) },
1824     { "movsldup", { XM, EXx } },
1825     { "movlpd", { XM, EXq } },
1826     { "movddup", { XM, EXq } },
1827   },
1828
1829   /* PREFIX_0F16 */
1830   {
1831     { MOD_TABLE (MOD_0F16_PREFIX_0) },
1832     { "movshdup", { XM, EXx } },
1833     { "movhpd", { XM, EXq } },
1834     { "(bad)",  { XX } },
1835   },
1836
1837   /* PREFIX_0F2A */
1838   {
1839     { "cvtpi2ps", { XM, EMCq } },
1840     { "cvtsi2ss%LQ", { XM, Ev } },
1841     { "cvtpi2pd", { XM, EMCq } },
1842     { "cvtsi2sd%LQ", { XM, Ev } },
1843   },
1844
1845   /* PREFIX_0F2B */
1846   {
1847     { MOD_TABLE (MOD_0F2B_PREFIX_0) },
1848     { MOD_TABLE (MOD_0F2B_PREFIX_1) },
1849     { MOD_TABLE (MOD_0F2B_PREFIX_2) },
1850     { MOD_TABLE (MOD_0F2B_PREFIX_3) },
1851   },
1852
1853   /* PREFIX_0F2C */
1854   {
1855     { "cvttps2pi", { MXC, EXq } },
1856     { "cvttss2siY", { Gv, EXd } },
1857     { "cvttpd2pi", { MXC, EXx } },
1858     { "cvttsd2siY", { Gv, EXq } },
1859   },
1860
1861   /* PREFIX_0F2D */
1862   {
1863     { "cvtps2pi", { MXC, EXq } },
1864     { "cvtss2siY", { Gv, EXd } },
1865     { "cvtpd2pi", { MXC, EXx } },
1866     { "cvtsd2siY", { Gv, EXq } },
1867   },
1868
1869   /* PREFIX_0F2E */
1870   {
1871     { "ucomiss",{ XM, EXd } },
1872     { "(bad)",  { XX } },
1873     { "ucomisd",{ XM, EXq } },
1874     { "(bad)",  { XX } },
1875   },
1876
1877   /* PREFIX_0F2F */
1878   {
1879     { "comiss", { XM, EXd } },
1880     { "(bad)",  { XX } },
1881     { "comisd", { XM, EXq } },
1882     { "(bad)",  { XX } },
1883   },
1884
1885   /* PREFIX_0F51 */
1886   {
1887     { "sqrtps", { XM, EXx } },
1888     { "sqrtss", { XM, EXd } },
1889     { "sqrtpd", { XM, EXx } },
1890     { "sqrtsd", { XM, EXq } },
1891   },
1892
1893   /* PREFIX_0F52 */
1894   {
1895     { "rsqrtps",{ XM, EXx } },
1896     { "rsqrtss",{ XM, EXd } },
1897     { "(bad)",  { XX } },
1898     { "(bad)",  { XX } },
1899   },
1900
1901   /* PREFIX_0F53 */
1902   {
1903     { "rcpps",  { XM, EXx } },
1904     { "rcpss",  { XM, EXd } },
1905     { "(bad)",  { XX } },
1906     { "(bad)",  { XX } },
1907   },
1908
1909   /* PREFIX_0F58 */
1910   {
1911     { "addps", { XM, EXx } },
1912     { "addss", { XM, EXd } },
1913     { "addpd", { XM, EXx } },
1914     { "addsd", { XM, EXq } },
1915   },
1916
1917   /* PREFIX_0F59 */
1918   {
1919     { "mulps",  { XM, EXx } },
1920     { "mulss",  { XM, EXd } },
1921     { "mulpd",  { XM, EXx } },
1922     { "mulsd",  { XM, EXq } },
1923   },
1924
1925   /* PREFIX_0F5A */
1926   {
1927     { "cvtps2pd", { XM, EXq } },
1928     { "cvtss2sd", { XM, EXd } },
1929     { "cvtpd2ps", { XM, EXx } },
1930     { "cvtsd2ss", { XM, EXq } },
1931   },
1932
1933   /* PREFIX_0F5B */
1934   {
1935     { "cvtdq2ps", { XM, EXx } },
1936     { "cvttps2dq", { XM, EXx } },
1937     { "cvtps2dq", { XM, EXx } },
1938     { "(bad)",  { XX } },
1939   },
1940
1941   /* PREFIX_0F5C */
1942   {
1943     { "subps",  { XM, EXx } },
1944     { "subss",  { XM, EXd } },
1945     { "subpd",  { XM, EXx } },
1946     { "subsd",  { XM, EXq } },
1947   },
1948
1949   /* PREFIX_0F5D */
1950   {
1951     { "minps",  { XM, EXx } },
1952     { "minss",  { XM, EXd } },
1953     { "minpd",  { XM, EXx } },
1954     { "minsd",  { XM, EXq } },
1955   },
1956
1957   /* PREFIX_0F5E */
1958   {
1959     { "divps",  { XM, EXx } },
1960     { "divss",  { XM, EXd } },
1961     { "divpd",  { XM, EXx } },
1962     { "divsd",  { XM, EXq } },
1963   },
1964
1965   /* PREFIX_0F5F */
1966   {
1967     { "maxps",  { XM, EXx } },
1968     { "maxss",  { XM, EXd } },
1969     { "maxpd",  { XM, EXx } },
1970     { "maxsd",  { XM, EXq } },
1971   },
1972
1973   /* PREFIX_0F60 */
1974   {
1975     { "punpcklbw",{ MX, EMd } },
1976     { "(bad)",  { XX } },
1977     { "punpcklbw",{ MX, EMx } },
1978     { "(bad)",  { XX } },
1979   },
1980
1981   /* PREFIX_0F61 */
1982   {
1983     { "punpcklwd",{ MX, EMd } },
1984     { "(bad)",  { XX } },
1985     { "punpcklwd",{ MX, EMx } },
1986     { "(bad)",  { XX } },
1987   },
1988
1989   /* PREFIX_0F62 */
1990   {
1991     { "punpckldq",{ MX, EMd } },
1992     { "(bad)",  { XX } },
1993     { "punpckldq",{ MX, EMx } },
1994     { "(bad)",  { XX } },
1995   },
1996
1997   /* PREFIX_0F6C */
1998   {
1999     { "(bad)",  { XX } },
2000     { "(bad)",  { XX } },
2001     { "punpcklqdq", { XM, EXx } },
2002     { "(bad)",  { XX } },
2003   },
2004
2005   /* PREFIX_0F6D */
2006   {
2007     { "(bad)",  { XX } },
2008     { "(bad)",  { XX } },
2009     { "punpckhqdq", { XM, EXx } },
2010     { "(bad)",  { XX } },
2011   },
2012
2013   /* PREFIX_0F6F */
2014   {
2015     { "movq",   { MX, EM } },
2016     { "movdqu", { XM, EXx } },
2017     { "movdqa", { XM, EXx } },
2018     { "(bad)",  { XX } },
2019   },
2020
2021   /* PREFIX_0F70 */
2022   {
2023     { "pshufw", { MX, EM, Ib } },
2024     { "pshufhw",{ XM, EXx, Ib } },
2025     { "pshufd", { XM, EXx, Ib } },
2026     { "pshuflw",{ XM, EXx, Ib } },
2027   },
2028
2029   /* PREFIX_0F73_REG_3 */
2030   {
2031     { "(bad)",  { XX } },
2032     { "(bad)",  { XX } },
2033     { "psrldq", { XS, Ib } },
2034     { "(bad)",  { XX } },
2035   },
2036
2037   /* PREFIX_0F73_REG_7 */
2038   {
2039     { "(bad)",  { XX } },
2040     { "(bad)",  { XX } },
2041     { "pslldq", { XS, Ib } },
2042     { "(bad)",  { XX } },
2043   },
2044
2045   /* PREFIX_0F78 */
2046   {
2047     {"vmread",  { Em, Gm } },
2048     {"(bad)",   { XX } },
2049     {"extrq",   { XS, Ib, Ib } },
2050     {"insertq", { XM, XS, Ib, Ib } },
2051   },
2052
2053   /* PREFIX_0F79 */
2054   {
2055     {"vmwrite", { Gm, Em } },
2056     {"(bad)",   { XX } },
2057     {"extrq",   { XM, XS } },
2058     {"insertq", { XM, XS } },
2059   },
2060
2061   /* PREFIX_0F7C */
2062   {
2063     { "(bad)",  { XX } },
2064     { "(bad)",  { XX } },
2065     { "haddpd", { XM, EXx } },
2066     { "haddps", { XM, EXx } },
2067   },
2068
2069   /* PREFIX_0F7D */
2070   {
2071     { "(bad)",  { XX } },
2072     { "(bad)",  { XX } },
2073     { "hsubpd", { XM, EXx } },
2074     { "hsubps", { XM, EXx } },
2075   },
2076
2077   /* PREFIX_0F7E */
2078   {
2079     { "movK",   { Edq, MX } },
2080     { "movq",   { XM, EXq } },
2081     { "movK",   { Edq, XM } },
2082     { "(bad)",  { XX } },
2083   },
2084
2085   /* PREFIX_0F7F */
2086   {
2087     { "movq",   { EM, MX } },
2088     { "movdqu", { EXx, XM } },
2089     { "movdqa", { EXx, XM } },
2090     { "(bad)",  { XX } },
2091   },
2092
2093   /* PREFIX_0FB8 */
2094   {
2095     { "(bad)", { XX } },
2096     { "popcntS", { Gv, Ev } },
2097     { "(bad)", { XX } },
2098     { "(bad)", { XX } },
2099   },
2100
2101   /* PREFIX_0FBD */
2102   {
2103     { "bsrS",   { Gv, Ev } },
2104     { "lzcntS", { Gv, Ev } },
2105     { "bsrS",   { Gv, Ev } },
2106     { "(bad)",  { XX } },
2107   },
2108
2109   /* PREFIX_0FC2 */
2110   {
2111     { "cmpps",  { XM, EXx, CMP } },
2112     { "cmpss",  { XM, EXd, CMP } },
2113     { "cmppd",  { XM, EXx, CMP } },
2114     { "cmpsd",  { XM, EXq, CMP } },
2115   },
2116
2117   /* PREFIX_0FC3 */
2118   {
2119     { "movntiS", { Ma, Gv } },
2120     { "(bad)",  { XX } },
2121     { "(bad)",  { XX } },
2122     { "(bad)",  { XX } },
2123   },
2124
2125   /* PREFIX_0FC7_REG_6 */
2126   {
2127     { "vmptrld",{ Mq } },
2128     { "vmxon",  { Mq } },
2129     { "vmclear",{ Mq } },
2130     { "(bad)",  { XX } },
2131   },
2132
2133   /* PREFIX_0FD0 */
2134   {
2135     { "(bad)",  { XX } },
2136     { "(bad)",  { XX } },
2137     { "addsubpd", { XM, EXx } },
2138     { "addsubps", { XM, EXx } },
2139   },
2140
2141   /* PREFIX_0FD6 */
2142   {
2143     { "(bad)",  { XX } },
2144     { "movq2dq",{ XM, MS } },
2145     { "movq",   { EXq, XM } },
2146     { "movdq2q",{ MX, XS } },
2147   },
2148
2149   /* PREFIX_0FE6 */
2150   {
2151     { "(bad)",  { XX } },
2152     { "cvtdq2pd", { XM, EXq } },
2153     { "cvttpd2dq", { XM, EXx } },
2154     { "cvtpd2dq", { XM, EXx } },
2155   },
2156
2157   /* PREFIX_0FE7 */
2158   {
2159     { "movntq", { Mq, MX } },
2160     { "(bad)",  { XX } },
2161     { MOD_TABLE (MOD_0FE7_PREFIX_2) },
2162     { "(bad)",  { XX } },
2163   },
2164
2165   /* PREFIX_0FF0 */
2166   {
2167     { "(bad)",  { XX } },
2168     { "(bad)",  { XX } },
2169     { "(bad)",  { XX } },
2170     { MOD_TABLE (MOD_0FF0_PREFIX_3) },
2171   },
2172
2173   /* PREFIX_0FF7 */
2174   {
2175     { "maskmovq", { MX, MS } },
2176     { "(bad)",  { XX } },
2177     { "maskmovdqu", { XM, XS } },
2178     { "(bad)",  { XX } },
2179   },
2180
2181   /* PREFIX_0F3810 */
2182   {
2183     { "(bad)",  { XX } },
2184     { "(bad)",  { XX } },
2185     { "pblendvb", { XM, EXx, XMM0 } },
2186     { "(bad)",  { XX } },
2187   },
2188
2189   /* PREFIX_0F3814 */
2190   {
2191     { "(bad)",  { XX } },
2192     { "(bad)",  { XX } },
2193     { "blendvps", { XM, EXx, XMM0 } },
2194     { "(bad)",  { XX } },
2195   },
2196
2197   /* PREFIX_0F3815 */
2198   {
2199     { "(bad)",  { XX } },
2200     { "(bad)",  { XX } },
2201     { "blendvpd", { XM, EXx, XMM0 } },
2202     { "(bad)",  { XX } },
2203   },
2204
2205   /* PREFIX_0F3817 */
2206   {
2207     { "(bad)",  { XX } },
2208     { "(bad)",  { XX } },
2209     { "ptest",  { XM, EXx } },
2210     { "(bad)",  { XX } },
2211   },
2212
2213   /* PREFIX_0F3820 */
2214   {
2215     { "(bad)",  { XX } },
2216     { "(bad)",  { XX } },
2217     { "pmovsxbw", { XM, EXq } },
2218     { "(bad)",  { XX } },
2219   },
2220
2221   /* PREFIX_0F3821 */
2222   {
2223     { "(bad)",  { XX } },
2224     { "(bad)",  { XX } },
2225     { "pmovsxbd", { XM, EXd } },
2226     { "(bad)",  { XX } },
2227   },
2228
2229   /* PREFIX_0F3822 */
2230   {
2231     { "(bad)",  { XX } },
2232     { "(bad)",  { XX } },
2233     { "pmovsxbq", { XM, EXw } },
2234     { "(bad)",  { XX } },
2235   },
2236
2237   /* PREFIX_0F3823 */
2238   {
2239     { "(bad)",  { XX } },
2240     { "(bad)",  { XX } },
2241     { "pmovsxwd", { XM, EXq } },
2242     { "(bad)",  { XX } },
2243   },
2244
2245   /* PREFIX_0F3824 */
2246   {
2247     { "(bad)",  { XX } },
2248     { "(bad)",  { XX } },
2249     { "pmovsxwq", { XM, EXd } },
2250     { "(bad)",  { XX } },
2251   },
2252
2253   /* PREFIX_0F3825 */
2254   {
2255     { "(bad)",  { XX } },
2256     { "(bad)",  { XX } },
2257     { "pmovsxdq", { XM, EXq } },
2258     { "(bad)",  { XX } },
2259   },
2260
2261   /* PREFIX_0F3828 */
2262   {
2263     { "(bad)",  { XX } },
2264     { "(bad)",  { XX } },
2265     { "pmuldq", { XM, EXx } },
2266     { "(bad)",  { XX } },
2267   },
2268
2269   /* PREFIX_0F3829 */
2270   {
2271     { "(bad)",  { XX } },
2272     { "(bad)",  { XX } },
2273     { "pcmpeqq", { XM, EXx } },
2274     { "(bad)",  { XX } },
2275   },
2276
2277   /* PREFIX_0F382A */
2278   {
2279     { "(bad)",  { XX } },
2280     { "(bad)",  { XX } },
2281     { MOD_TABLE (MOD_0F382A_PREFIX_2) },
2282     { "(bad)",  { XX } },
2283   },
2284
2285   /* PREFIX_0F382B */
2286   {
2287     { "(bad)",  { XX } },
2288     { "(bad)",  { XX } },
2289     { "packusdw", { XM, EXx } },
2290     { "(bad)",  { XX } },
2291   },
2292
2293   /* PREFIX_0F3830 */
2294   {
2295     { "(bad)",  { XX } },
2296     { "(bad)",  { XX } },
2297     { "pmovzxbw", { XM, EXq } },
2298     { "(bad)",  { XX } },
2299   },
2300
2301   /* PREFIX_0F3831 */
2302   {
2303     { "(bad)",  { XX } },
2304     { "(bad)",  { XX } },
2305     { "pmovzxbd", { XM, EXd } },
2306     { "(bad)",  { XX } },
2307   },
2308
2309   /* PREFIX_0F3832 */
2310   {
2311     { "(bad)",  { XX } },
2312     { "(bad)",  { XX } },
2313     { "pmovzxbq", { XM, EXw } },
2314     { "(bad)",  { XX } },
2315   },
2316
2317   /* PREFIX_0F3833 */
2318   {
2319     { "(bad)",  { XX } },
2320     { "(bad)",  { XX } },
2321     { "pmovzxwd", { XM, EXq } },
2322     { "(bad)",  { XX } },
2323   },
2324
2325   /* PREFIX_0F3834 */
2326   {
2327     { "(bad)",  { XX } },
2328     { "(bad)",  { XX } },
2329     { "pmovzxwq", { XM, EXd } },
2330     { "(bad)",  { XX } },
2331   },
2332
2333   /* PREFIX_0F3835 */
2334   {
2335     { "(bad)",  { XX } },
2336     { "(bad)",  { XX } },
2337     { "pmovzxdq", { XM, EXq } },
2338     { "(bad)",  { XX } },
2339   },
2340
2341   /* PREFIX_0F3837 */
2342   {
2343     { "(bad)",  { XX } },
2344     { "(bad)",  { XX } },
2345     { "pcmpgtq", { XM, EXx } },
2346     { "(bad)",  { XX } },
2347   },
2348
2349   /* PREFIX_0F3838 */
2350   {
2351     { "(bad)",  { XX } },
2352     { "(bad)",  { XX } },
2353     { "pminsb", { XM, EXx } },
2354     { "(bad)",  { XX } },
2355   },
2356
2357   /* PREFIX_0F3839 */
2358   {
2359     { "(bad)",  { XX } },
2360     { "(bad)",  { XX } },
2361     { "pminsd", { XM, EXx } },
2362     { "(bad)",  { XX } },
2363   },
2364
2365   /* PREFIX_0F383A */
2366   {
2367     { "(bad)",  { XX } },
2368     { "(bad)",  { XX } },
2369     { "pminuw", { XM, EXx } },
2370     { "(bad)",  { XX } },
2371   },
2372
2373   /* PREFIX_0F383B */
2374   {
2375     { "(bad)",  { XX } },
2376     { "(bad)",  { XX } },
2377     { "pminud", { XM, EXx } },
2378     { "(bad)",  { XX } },
2379   },
2380
2381   /* PREFIX_0F383C */
2382   {
2383     { "(bad)",  { XX } },
2384     { "(bad)",  { XX } },
2385     { "pmaxsb", { XM, EXx } },
2386     { "(bad)",  { XX } },
2387   },
2388
2389   /* PREFIX_0F383D */
2390   {
2391     { "(bad)",  { XX } },
2392     { "(bad)",  { XX } },
2393     { "pmaxsd", { XM, EXx } },
2394     { "(bad)",  { XX } },
2395   },
2396
2397   /* PREFIX_0F383E */
2398   {
2399     { "(bad)",  { XX } },
2400     { "(bad)",  { XX } },
2401     { "pmaxuw", { XM, EXx } },
2402     { "(bad)",  { XX } },
2403   },
2404
2405   /* PREFIX_0F383F */
2406   {
2407     { "(bad)",  { XX } },
2408     { "(bad)",  { XX } },
2409     { "pmaxud", { XM, EXx } },
2410     { "(bad)",  { XX } },
2411   },
2412
2413   /* PREFIX_0F3840 */
2414   {
2415     { "(bad)",  { XX } },
2416     { "(bad)",  { XX } },
2417     { "pmulld", { XM, EXx } },
2418     { "(bad)",  { XX } },
2419   },
2420
2421   /* PREFIX_0F3841 */
2422   {
2423     { "(bad)",  { XX } },
2424     { "(bad)",  { XX } },
2425     { "phminposuw", { XM, EXx } },
2426     { "(bad)",  { XX } },
2427   },
2428
2429   /* PREFIX_0F38F0 */
2430   {
2431     { "(bad)",  { XX } },
2432     { "(bad)",  { XX } },
2433     { "(bad)",  { XX } },
2434     { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2435   },
2436
2437   /* PREFIX_0F38F1 */
2438   {
2439     { "(bad)",  { XX } },
2440     { "(bad)",  { XX } },
2441     { "(bad)",  { XX } },
2442     { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2443   },
2444
2445   /* PREFIX_0F3A08 */
2446   {
2447     { "(bad)",  { XX } },
2448     { "(bad)",  { XX } },
2449     { "roundps", { XM, EXx, Ib } },
2450     { "(bad)",  { XX } },
2451   },
2452
2453   /* PREFIX_0F3A09 */
2454   {
2455     { "(bad)",  { XX } },
2456     { "(bad)",  { XX } },
2457     { "roundpd", { XM, EXx, Ib } },
2458     { "(bad)",  { XX } },
2459   },
2460
2461   /* PREFIX_0F3A0A */
2462   {
2463     { "(bad)",  { XX } },
2464     { "(bad)",  { XX } },
2465     { "roundss", { XM, EXd, Ib } },
2466     { "(bad)",  { XX } },
2467   },
2468
2469   /* PREFIX_0F3A0B */
2470   {
2471     { "(bad)",  { XX } },
2472     { "(bad)",  { XX } },
2473     { "roundsd", { XM, EXq, Ib } },
2474     { "(bad)",  { XX } },
2475   },
2476
2477   /* PREFIX_0F3A0C */
2478   {
2479     { "(bad)",  { XX } },
2480     { "(bad)",  { XX } },
2481     { "blendps", { XM, EXx, Ib } },
2482     { "(bad)",  { XX } },
2483   },
2484
2485   /* PREFIX_0F3A0D */
2486   {
2487     { "(bad)",  { XX } },
2488     { "(bad)",  { XX } },
2489     { "blendpd", { XM, EXx, Ib } },
2490     { "(bad)",  { XX } },
2491   },
2492
2493   /* PREFIX_0F3A0E */
2494   {
2495     { "(bad)",  { XX } },
2496     { "(bad)",  { XX } },
2497     { "pblendw", { XM, EXx, Ib } },
2498     { "(bad)",  { XX } },
2499   },
2500
2501   /* PREFIX_0F3A14 */
2502   {
2503     { "(bad)",  { XX } },
2504     { "(bad)",  { XX } },
2505     { "pextrb", { Edqb, XM, Ib } },
2506     { "(bad)",  { XX } },
2507   },
2508
2509   /* PREFIX_0F3A15 */
2510   {
2511     { "(bad)",  { XX } },
2512     { "(bad)",  { XX } },
2513     { "pextrw", { Edqw, XM, Ib } },
2514     { "(bad)",  { XX } },
2515   },
2516
2517   /* PREFIX_0F3A16 */
2518   {
2519     { "(bad)",  { XX } },
2520     { "(bad)",  { XX } },
2521     { "pextrK", { Edq, XM, Ib } },
2522     { "(bad)",  { XX } },
2523   },
2524
2525   /* PREFIX_0F3A17 */
2526   {
2527     { "(bad)",  { XX } },
2528     { "(bad)",  { XX } },
2529     { "extractps", { Edqd, XM, Ib } },
2530     { "(bad)",  { XX } },
2531   },
2532
2533   /* PREFIX_0F3A20 */
2534   {
2535     { "(bad)",  { XX } },
2536     { "(bad)",  { XX } },
2537     { "pinsrb", { XM, Edqb, Ib } },
2538     { "(bad)",  { XX } },
2539   },
2540
2541   /* PREFIX_0F3A21 */
2542   {
2543     { "(bad)",  { XX } },
2544     { "(bad)",  { XX } },
2545     { "insertps", { XM, EXd, Ib } },
2546     { "(bad)",  { XX } },
2547   },
2548
2549   /* PREFIX_0F3A22 */
2550   {
2551     { "(bad)",  { XX } },
2552     { "(bad)",  { XX } },
2553     { "pinsrK", { XM, Edq, Ib } },
2554     { "(bad)",  { XX } },
2555   },
2556
2557   /* PREFIX_0F3A40 */
2558   {
2559     { "(bad)",  { XX } },
2560     { "(bad)",  { XX } },
2561     { "dpps",   { XM, EXx, Ib } },
2562     { "(bad)",  { XX } },
2563   },
2564
2565   /* PREFIX_0F3A41 */
2566   {
2567     { "(bad)",  { XX } },
2568     { "(bad)",  { XX } },
2569     { "dppd",   { XM, EXx, Ib } },
2570     { "(bad)",  { XX } },
2571   },
2572
2573   /* PREFIX_0F3A42 */
2574   {
2575     { "(bad)",  { XX } },
2576     { "(bad)",  { XX } },
2577     { "mpsadbw", { XM, EXx, Ib } },
2578     { "(bad)",  { XX } },
2579   },
2580
2581   /* PREFIX_0F3A60 */
2582   {
2583     { "(bad)",  { XX } },
2584     { "(bad)",  { XX } },
2585     { "pcmpestrm", { XM, EXx, Ib } },
2586     { "(bad)",  { XX } },
2587   },
2588
2589   /* PREFIX_0F3A61 */
2590   {
2591     { "(bad)",  { XX } },
2592     { "(bad)",  { XX } },
2593     { "pcmpestri", { XM, EXx, Ib } },
2594     { "(bad)",  { XX } },
2595   },
2596
2597   /* PREFIX_0F3A62 */
2598   {
2599     { "(bad)",  { XX } },
2600     { "(bad)",  { XX } },
2601     { "pcmpistrm", { XM, EXx, Ib } },
2602     { "(bad)",  { XX } },
2603   },
2604
2605   /* PREFIX_0F3A63 */
2606   {
2607     { "(bad)",  { XX } },
2608     { "(bad)",  { XX } },
2609     { "pcmpistri", { XM, EXx, Ib } },
2610     { "(bad)",  { XX } },
2611   },
2612 };
2613
2614 static const struct dis386 x86_64_table[][2] = {
2615   /* X86_64_06 */
2616   {
2617     { "push{T|}", { es } },
2618     { "(bad)", { XX } },
2619   },
2620
2621   /* X86_64_07 */
2622   {
2623     { "pop{T|}", { es } },
2624     { "(bad)", { XX } },
2625   },
2626
2627   /* X86_64_0D */
2628   {
2629     { "push{T|}", { cs } },
2630     { "(bad)", { XX } },
2631   },
2632
2633   /* X86_64_16 */
2634   {
2635     { "push{T|}", { ss } },
2636     { "(bad)", { XX } },
2637   },
2638
2639   /* X86_64_17 */
2640   {
2641     { "pop{T|}", { ss } },
2642     { "(bad)", { XX } },
2643   },
2644
2645   /* X86_64_1E */
2646   {
2647     { "push{T|}", { ds } },
2648     { "(bad)", { XX } },
2649   },
2650
2651   /* X86_64_1F */
2652   {
2653     { "pop{T|}", { ds } },
2654     { "(bad)", { XX } },
2655   },
2656
2657   /* X86_64_27 */
2658   {
2659     { "daa", { XX } },
2660     { "(bad)", { XX } },
2661   },
2662
2663   /* X86_64_2F */
2664   {
2665     { "das", { XX } },
2666     { "(bad)", { XX } },
2667   },
2668
2669   /* X86_64_37 */
2670   {
2671     { "aaa", { XX } },
2672     { "(bad)", { XX } },
2673   },
2674
2675   /* X86_64_3F */
2676   {
2677     { "aas", { XX } },
2678     { "(bad)", { XX } },
2679   },
2680
2681   /* X86_64_60 */
2682   {
2683     { "pusha{P|}", { XX } },
2684     { "(bad)", { XX } },
2685   },
2686
2687   /* X86_64_61 */
2688   {
2689     { "popa{P|}", { XX } },
2690     { "(bad)", { XX } },
2691   },
2692
2693   /* X86_64_62 */
2694   {
2695     { MOD_TABLE (MOD_62_32BIT) },
2696     { "(bad)", { XX } },
2697   },
2698
2699   /* X86_64_63 */
2700   {
2701     { "arpl", { Ew, Gw } },
2702     { "movs{lq|xd}", { Gv, Ed } },
2703   },
2704
2705   /* X86_64_6D */
2706   {
2707     { "ins{R|}", { Yzr, indirDX } },
2708     { "ins{G|}", { Yzr, indirDX } },
2709   },
2710
2711   /* X86_64_6F */
2712   {
2713     { "outs{R|}", { indirDXr, Xz } },
2714     { "outs{G|}", { indirDXr, Xz } },
2715   },
2716
2717   /* X86_64_9A */
2718   {
2719     { "Jcall{T|}", { Ap } },
2720     { "(bad)", { XX } },
2721   },
2722
2723   /* X86_64_C4 */
2724   {
2725     { MOD_TABLE (MOD_C4_32BIT) },
2726     { "(bad)", { XX } },
2727   },
2728
2729   /* X86_64_C5 */
2730   {
2731     { MOD_TABLE (MOD_C5_32BIT) },
2732     { "(bad)", { XX } },
2733   },
2734
2735   /* X86_64_CE */
2736   {
2737     { "into", { XX } },
2738     { "(bad)", { XX } },
2739   },
2740
2741   /* X86_64_D4 */
2742   {
2743     { "aam", { sIb } },
2744     { "(bad)", { XX } },
2745   },
2746
2747   /* X86_64_D5 */
2748   {
2749     { "aad", { sIb } },
2750     { "(bad)", { XX } },
2751   },
2752
2753   /* X86_64_EA */
2754   {
2755     { "Jjmp{T|}", { Ap } },
2756     { "(bad)", { XX } },
2757   },
2758
2759   /* X86_64_0F01_REG_0 */
2760   {
2761     { "sgdt{Q|IQ}", { M } },
2762     { "sgdt", { M } },
2763   },
2764
2765   /* X86_64_0F01_REG_1 */
2766   {
2767     { "sidt{Q|IQ}", { M } },
2768     { "sidt", { M } },
2769   },
2770
2771   /* X86_64_0F01_REG_2 */
2772   {
2773     { "lgdt{Q|Q}", { M } },
2774     { "lgdt", { M } },
2775   },
2776
2777   /* X86_64_0F01_REG_3 */
2778   {
2779     { "lidt{Q|Q}", { M } },
2780     { "lidt", { M } },
2781   },
2782 };
2783
2784 static const struct dis386 three_byte_table[][256] = {
2785   /* THREE_BYTE_0F24 */
2786   {
2787     /* 00 */
2788     { "fmaddps",        { { OP_DREX4, q_mode } } },
2789     { "fmaddpd",        { { OP_DREX4, q_mode } } },
2790     { "fmaddss",        { { OP_DREX4, w_mode } } },
2791     { "fmaddsd",        { { OP_DREX4, d_mode } } },
2792     { "fmaddps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2793     { "fmaddpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2794     { "fmaddss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2795     { "fmaddsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2796     /* 08 */
2797     { "fmsubps",        { { OP_DREX4, q_mode } } },
2798     { "fmsubpd",        { { OP_DREX4, q_mode } } },
2799     { "fmsubss",        { { OP_DREX4, w_mode } } },
2800     { "fmsubsd",        { { OP_DREX4, d_mode } } },
2801     { "fmsubps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2802     { "fmsubpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2803     { "fmsubss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2804     { "fmsubsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2805     /* 10 */
2806     { "fnmaddps",       { { OP_DREX4, q_mode } } },
2807     { "fnmaddpd",       { { OP_DREX4, q_mode } } },
2808     { "fnmaddss",       { { OP_DREX4, w_mode } } },
2809     { "fnmaddsd",       { { OP_DREX4, d_mode } } },
2810     { "fnmaddps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2811     { "fnmaddpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2812     { "fnmaddss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2813     { "fnmaddsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2814     /* 18 */
2815     { "fnmsubps",       { { OP_DREX4, q_mode } } },
2816     { "fnmsubpd",       { { OP_DREX4, q_mode } } },
2817     { "fnmsubss",       { { OP_DREX4, w_mode } } },
2818     { "fnmsubsd",       { { OP_DREX4, d_mode } } },
2819     { "fnmsubps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2820     { "fnmsubpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2821     { "fnmsubss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2822     { "fnmsubsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2823     /* 20 */
2824     { "permps",         { { OP_DREX4, q_mode } } },
2825     { "permpd",         { { OP_DREX4, q_mode } } },
2826     { "pcmov",          { { OP_DREX4, q_mode } } },
2827     { "pperm",          { { OP_DREX4, q_mode } } },
2828     { "permps",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2829     { "permpd",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2830     { "pcmov",          { { OP_DREX4, DREX_OC1 + w_mode } } },
2831     { "pperm",          { { OP_DREX4, DREX_OC1 + d_mode } } },
2832     /* 28 */
2833     { "(bad)",          { XX } },
2834     { "(bad)",          { XX } },
2835     { "(bad)",          { XX } },
2836     { "(bad)",          { XX } },
2837     { "(bad)",          { XX } },
2838     { "(bad)",          { XX } },
2839     { "(bad)",          { XX } },
2840     { "(bad)",          { XX } },
2841     /* 30 */
2842     { "(bad)",          { XX } },
2843     { "(bad)",          { XX } },
2844     { "(bad)",          { XX } },
2845     { "(bad)",          { XX } },
2846     { "(bad)",          { XX } },
2847     { "(bad)",          { XX } },
2848     { "(bad)",          { XX } },
2849     { "(bad)",          { XX } },
2850     /* 38 */
2851     { "(bad)",          { XX } },
2852     { "(bad)",          { XX } },
2853     { "(bad)",          { XX } },
2854     { "(bad)",          { XX } },
2855     { "(bad)",          { XX } },
2856     { "(bad)",          { XX } },
2857     { "(bad)",          { XX } },
2858     { "(bad)",          { XX } },
2859     /* 40 */
2860     { "protb",          { { OP_DREX3, q_mode } } },
2861     { "protw",          { { OP_DREX3, q_mode } } },
2862     { "protd",          { { OP_DREX3, q_mode } } },
2863     { "protq",          { { OP_DREX3, q_mode } } },
2864     { "pshlb",          { { OP_DREX3, q_mode } } },
2865     { "pshlw",          { { OP_DREX3, q_mode } } },
2866     { "pshld",          { { OP_DREX3, q_mode } } },
2867     { "pshlq",          { { OP_DREX3, q_mode } } },
2868     /* 48 */
2869     { "pshab",          { { OP_DREX3, q_mode } } },
2870     { "pshaw",          { { OP_DREX3, q_mode } } },
2871     { "pshad",          { { OP_DREX3, q_mode } } },
2872     { "pshaq",          { { OP_DREX3, q_mode } } },
2873     { "(bad)",          { XX } },
2874     { "(bad)",          { XX } },
2875     { "(bad)",          { XX } },
2876     { "(bad)",          { XX } },
2877     /* 50 */
2878     { "(bad)",          { XX } },
2879     { "(bad)",          { XX } },
2880     { "(bad)",          { XX } },
2881     { "(bad)",          { XX } },
2882     { "(bad)",          { XX } },
2883     { "(bad)",          { XX } },
2884     { "(bad)",          { XX } },
2885     { "(bad)",          { XX } },
2886     /* 58 */
2887     { "(bad)",          { XX } },
2888     { "(bad)",          { XX } },
2889     { "(bad)",          { XX } },
2890     { "(bad)",          { XX } },
2891     { "(bad)",          { XX } },
2892     { "(bad)",          { XX } },
2893     { "(bad)",          { XX } },
2894     { "(bad)",          { XX } },
2895     /* 60 */
2896     { "(bad)",          { XX } },
2897     { "(bad)",          { XX } },
2898     { "(bad)",          { XX } },
2899     { "(bad)",          { XX } },
2900     { "(bad)",          { XX } },
2901     { "(bad)",          { XX } },
2902     { "(bad)",          { XX } },
2903     { "(bad)",          { XX } },
2904     /* 68 */
2905     { "(bad)",          { XX } },
2906     { "(bad)",          { XX } },
2907     { "(bad)",          { XX } },
2908     { "(bad)",          { XX } },
2909     { "(bad)",          { XX } },
2910     { "(bad)",          { XX } },
2911     { "(bad)",          { XX } },
2912     { "(bad)",          { XX } },
2913     /* 70 */
2914     { "(bad)",          { XX } },
2915     { "(bad)",          { XX } },
2916     { "(bad)",          { XX } },
2917     { "(bad)",          { XX } },
2918     { "(bad)",          { XX } },
2919     { "(bad)",          { XX } },
2920     { "(bad)",          { XX } },
2921     { "(bad)",          { XX } },
2922     /* 78 */
2923     { "(bad)",          { XX } },
2924     { "(bad)",          { XX } },
2925     { "(bad)",          { XX } },
2926     { "(bad)",          { XX } },
2927     { "(bad)",          { XX } },
2928     { "(bad)",          { XX } },
2929     { "(bad)",          { XX } },
2930     { "(bad)",          { XX } },
2931     /* 80 */
2932     { "(bad)",          { XX } },
2933     { "(bad)",          { XX } },
2934     { "(bad)",          { XX } },
2935     { "(bad)",          { XX } },
2936     { "(bad)",          { XX } },
2937     { "pmacssww",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2938     { "pmacsswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2939     { "pmacssdql",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2940     /* 88 */
2941     { "(bad)",          { XX } },
2942     { "(bad)",          { XX } },
2943     { "(bad)",          { XX } },
2944     { "(bad)",          { XX } },
2945     { "(bad)",          { XX } },
2946     { "(bad)",          { XX } },
2947     { "pmacssdd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2948     { "pmacssdqh",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2949     /* 90 */
2950     { "(bad)",          { XX } },
2951     { "(bad)",          { XX } },
2952     { "(bad)",          { XX } },
2953     { "(bad)",          { XX } },
2954     { "(bad)",          { XX } },
2955     { "pmacsww",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2956     { "pmacswd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2957     { "pmacsdql",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2958     /* 98 */
2959     { "(bad)",          { XX } },
2960     { "(bad)",          { XX } },
2961     { "(bad)",          { XX } },
2962     { "(bad)",          { XX } },
2963     { "(bad)",          { XX } },
2964     { "(bad)",          { XX } },
2965     { "pmacsdd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2966     { "pmacsdqh",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2967     /* a0 */
2968     { "(bad)",          { XX } },
2969     { "(bad)",          { XX } },
2970     { "(bad)",          { XX } },
2971     { "(bad)",          { XX } },
2972     { "(bad)",          { XX } },
2973     { "(bad)",          { XX } },
2974     { "pmadcsswd",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2975     { "(bad)",          { XX } },
2976     /* a8 */
2977     { "(bad)",          { XX } },
2978     { "(bad)",          { XX } },
2979     { "(bad)",          { XX } },
2980     { "(bad)",          { XX } },
2981     { "(bad)",          { XX } },
2982     { "(bad)",          { XX } },
2983     { "(bad)",          { XX } },
2984     { "(bad)",          { XX } },
2985     /* b0 */
2986     { "(bad)",          { XX } },
2987     { "(bad)",          { XX } },
2988     { "(bad)",          { XX } },
2989     { "(bad)",          { XX } },
2990     { "(bad)",          { XX } },
2991     { "(bad)",          { XX } },
2992     { "pmadcswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2993     { "(bad)",          { XX } },
2994     /* b8 */
2995     { "(bad)",          { XX } },
2996     { "(bad)",          { XX } },
2997     { "(bad)",          { XX } },
2998     { "(bad)",          { XX } },
2999     { "(bad)",          { XX } },
3000     { "(bad)",          { XX } },
3001     { "(bad)",          { XX } },
3002     { "(bad)",          { XX } },
3003     /* c0 */
3004     { "(bad)",          { XX } },
3005     { "(bad)",          { XX } },
3006     { "(bad)",          { XX } },
3007     { "(bad)",          { XX } },
3008     { "(bad)",          { XX } },
3009     { "(bad)",          { XX } },
3010     { "(bad)",          { XX } },
3011     { "(bad)",          { XX } },
3012     /* c8 */
3013     { "(bad)",          { XX } },
3014     { "(bad)",          { XX } },
3015     { "(bad)",          { XX } },
3016     { "(bad)",          { XX } },
3017     { "(bad)",          { XX } },
3018     { "(bad)",          { XX } },
3019     { "(bad)",          { XX } },
3020     { "(bad)",          { XX } },
3021     /* d0 */
3022     { "(bad)",          { XX } },
3023     { "(bad)",          { XX } },
3024     { "(bad)",          { XX } },
3025     { "(bad)",          { XX } },
3026     { "(bad)",          { XX } },
3027     { "(bad)",          { XX } },
3028     { "(bad)",          { XX } },
3029     { "(bad)",          { XX } },
3030     /* d8 */
3031     { "(bad)",          { XX } },
3032     { "(bad)",          { XX } },
3033     { "(bad)",          { XX } },
3034     { "(bad)",          { XX } },
3035     { "(bad)",          { XX } },
3036     { "(bad)",          { XX } },
3037     { "(bad)",          { XX } },
3038     { "(bad)",          { XX } },
3039     /* e0 */
3040     { "(bad)",          { XX } },
3041     { "(bad)",          { XX } },
3042     { "(bad)",          { XX } },
3043     { "(bad)",          { XX } },
3044     { "(bad)",          { XX } },
3045     { "(bad)",          { XX } },
3046     { "(bad)",          { XX } },
3047     { "(bad)",          { XX } },
3048     /* e8 */
3049     { "(bad)",          { XX } },
3050     { "(bad)",          { XX } },
3051     { "(bad)",          { XX } },
3052     { "(bad)",          { XX } },
3053     { "(bad)",          { XX } },
3054     { "(bad)",          { XX } },
3055     { "(bad)",          { XX } },
3056     { "(bad)",          { XX } },
3057     /* f0 */
3058     { "(bad)",          { XX } },
3059     { "(bad)",          { XX } },
3060     { "(bad)",          { XX } },
3061     { "(bad)",          { XX } },
3062     { "(bad)",          { XX } },
3063     { "(bad)",          { XX } },
3064     { "(bad)",          { XX } },
3065     { "(bad)",          { XX } },
3066     /* f8 */
3067     { "(bad)",          { XX } },
3068     { "(bad)",          { XX } },
3069     { "(bad)",          { XX } },
3070     { "(bad)",          { XX } },
3071     { "(bad)",          { XX } },
3072     { "(bad)",          { XX } },
3073     { "(bad)",          { XX } },
3074     { "(bad)",          { XX } },
3075   },
3076   /* THREE_BYTE_0F25 */
3077   {
3078     /* 00 */
3079     { "(bad)",          { XX } },
3080     { "(bad)",          { XX } },
3081     { "(bad)",          { XX } },
3082     { "(bad)",          { XX } },
3083     { "(bad)",          { XX } },
3084     { "(bad)",          { XX } },
3085     { "(bad)",          { XX } },
3086     { "(bad)",          { XX } },
3087     /* 08 */
3088     { "(bad)",          { XX } },
3089     { "(bad)",          { XX } },
3090     { "(bad)",          { XX } },
3091     { "(bad)",          { XX } },
3092     { "(bad)",          { XX } },
3093     { "(bad)",          { XX } },
3094     { "(bad)",          { XX } },
3095     { "(bad)",          { XX } },
3096     /* 10 */
3097     { "(bad)",          { XX } },
3098     { "(bad)",          { XX } },
3099     { "(bad)",          { XX } },
3100     { "(bad)",          { XX } },
3101     { "(bad)",          { XX } },
3102     { "(bad)",          { XX } },
3103     { "(bad)",          { XX } },
3104     { "(bad)",          { XX } },
3105     /* 18 */
3106     { "(bad)",          { XX } },
3107     { "(bad)",          { XX } },
3108     { "(bad)",          { XX } },
3109     { "(bad)",          { XX } },
3110     { "(bad)",          { XX } },
3111     { "(bad)",          { XX } },
3112     { "(bad)",          { XX } },
3113     { "(bad)",          { XX } },
3114     /* 20 */
3115     { "(bad)",          { XX } },
3116     { "(bad)",          { XX } },
3117     { "(bad)",          { XX } },
3118     { "(bad)",          { XX } },
3119     { "(bad)",          { XX } },
3120     { "(bad)",          { XX } },
3121     { "(bad)",          { XX } },
3122     { "(bad)",          { XX } },
3123     /* 28 */
3124     { "(bad)",          { XX } },
3125     { "(bad)",          { XX } },
3126     { "(bad)",          { XX } },
3127     { "(bad)",          { XX } },
3128     { "comps",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3129     { "compd",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3130     { "comss",          { { OP_DREX3, w_mode }, { OP_DREX_FCMP, b_mode } } },
3131     { "comsd",          { { OP_DREX3, d_mode }, { OP_DREX_FCMP, b_mode } } },
3132     /* 30 */
3133     { "(bad)",          { XX } },
3134     { "(bad)",          { XX } },
3135     { "(bad)",          { XX } },
3136     { "(bad)",          { XX } },
3137     { "(bad)",          { XX } },
3138     { "(bad)",          { XX } },
3139     { "(bad)",          { XX } },
3140     { "(bad)",          { XX } },
3141     /* 38 */
3142     { "(bad)",          { XX } },
3143     { "(bad)",          { XX } },
3144     { "(bad)",          { XX } },
3145     { "(bad)",          { XX } },
3146     { "(bad)",          { XX } },
3147     { "(bad)",          { XX } },
3148     { "(bad)",          { XX } },
3149     { "(bad)",          { XX } },
3150     /* 40 */
3151     { "(bad)",          { XX } },
3152     { "(bad)",          { XX } },
3153     { "(bad)",          { XX } },
3154     { "(bad)",          { XX } },
3155     { "(bad)",          { XX } },
3156     { "(bad)",          { XX } },
3157     { "(bad)",          { XX } },
3158     { "(bad)",          { XX } },
3159     /* 48 */
3160     { "(bad)",          { XX } },
3161     { "(bad)",          { XX } },
3162     { "(bad)",          { XX } },
3163     { "(bad)",          { XX } },
3164     { "pcomb",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3165     { "pcomw",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3166     { "pcomd",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3167     { "pcomq",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3168     /* 50 */
3169     { "(bad)",          { XX } },
3170     { "(bad)",          { XX } },
3171     { "(bad)",          { XX } },
3172     { "(bad)",          { XX } },
3173     { "(bad)",          { XX } },
3174     { "(bad)",          { XX } },
3175     { "(bad)",          { XX } },
3176     { "(bad)",          { XX } },
3177     /* 58 */
3178     { "(bad)",          { XX } },
3179     { "(bad)",          { XX } },
3180     { "(bad)",          { XX } },
3181     { "(bad)",          { XX } },
3182     { "(bad)",          { XX } },
3183     { "(bad)",          { XX } },
3184     { "(bad)",          { XX } },
3185     { "(bad)",          { XX } },
3186     /* 60 */
3187     { "(bad)",          { XX } },
3188     { "(bad)",          { XX } },
3189     { "(bad)",          { XX } },
3190     { "(bad)",          { XX } },
3191     { "(bad)",          { XX } },
3192     { "(bad)",          { XX } },
3193     { "(bad)",          { XX } },
3194     { "(bad)",          { XX } },
3195     /* 68 */
3196     { "(bad)",          { XX } },
3197     { "(bad)",          { XX } },
3198     { "(bad)",          { XX } },
3199     { "(bad)",          { XX } },
3200     { "pcomub",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3201     { "pcomuw",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3202     { "pcomud",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3203     { "pcomuq",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3204     /* 70 */
3205     { "(bad)",          { XX } },
3206     { "(bad)",          { XX } },
3207     { "(bad)",          { XX } },
3208     { "(bad)",          { XX } },
3209     { "(bad)",          { XX } },
3210     { "(bad)",          { XX } },
3211     { "(bad)",          { XX } },
3212     { "(bad)",          { XX } },
3213     /* 78 */
3214     { "(bad)",          { XX } },
3215     { "(bad)",          { XX } },
3216     { "(bad)",          { XX } },
3217     { "(bad)",          { XX } },
3218     { "(bad)",          { XX } },
3219     { "(bad)",          { XX } },
3220     { "(bad)",          { XX } },
3221     { "(bad)",          { XX } },
3222     /* 80 */
3223     { "(bad)",          { XX } },
3224     { "(bad)",          { XX } },
3225     { "(bad)",          { XX } },
3226     { "(bad)",          { XX } },
3227     { "(bad)",          { XX } },
3228     { "(bad)",          { XX } },
3229     { "(bad)",          { XX } },
3230     { "(bad)",          { XX } },
3231     /* 88 */
3232     { "(bad)",          { XX } },
3233     { "(bad)",          { XX } },
3234     { "(bad)",          { XX } },
3235     { "(bad)",          { XX } },
3236     { "(bad)",          { XX } },
3237     { "(bad)",          { XX } },
3238     { "(bad)",          { XX } },
3239     { "(bad)",          { XX } },
3240     /* 90 */
3241     { "(bad)",          { XX } },
3242     { "(bad)",          { XX } },
3243     { "(bad)",          { XX } },
3244     { "(bad)",          { XX } },
3245     { "(bad)",          { XX } },
3246     { "(bad)",          { XX } },
3247     { "(bad)",          { XX } },
3248     { "(bad)",          { XX } },
3249     /* 98 */
3250     { "(bad)",          { XX } },
3251     { "(bad)",          { XX } },
3252     { "(bad)",          { XX } },
3253     { "(bad)",          { XX } },
3254     { "(bad)",          { XX } },
3255     { "(bad)",          { XX } },
3256     { "(bad)",          { XX } },
3257     { "(bad)",          { XX } },
3258     /* a0 */
3259     { "(bad)",          { XX } },
3260     { "(bad)",          { XX } },
3261     { "(bad)",          { XX } },
3262     { "(bad)",          { XX } },
3263     { "(bad)",          { XX } },
3264     { "(bad)",          { XX } },
3265     { "(bad)",          { XX } },
3266     { "(bad)",          { XX } },
3267     /* a8 */
3268     { "(bad)",          { XX } },
3269     { "(bad)",          { XX } },
3270     { "(bad)",          { XX } },
3271     { "(bad)",          { XX } },
3272     { "(bad)",          { XX } },
3273     { "(bad)",          { XX } },
3274     { "(bad)",          { XX } },
3275     { "(bad)",          { XX } },
3276     /* b0 */
3277     { "(bad)",          { XX } },
3278     { "(bad)",          { XX } },
3279     { "(bad)",          { XX } },
3280     { "(bad)",          { XX } },
3281     { "(bad)",          { XX } },
3282     { "(bad)",          { XX } },
3283     { "(bad)",          { XX } },
3284     { "(bad)",          { XX } },
3285     /* b8 */
3286     { "(bad)",          { XX } },
3287     { "(bad)",          { XX } },
3288     { "(bad)",          { XX } },
3289     { "(bad)",          { XX } },
3290     { "(bad)",          { XX } },
3291     { "(bad)",          { XX } },
3292     { "(bad)",          { XX } },
3293     { "(bad)",          { XX } },
3294     /* c0 */
3295     { "(bad)",          { XX } },
3296     { "(bad)",          { XX } },
3297     { "(bad)",          { XX } },
3298     { "(bad)",          { XX } },
3299     { "(bad)",          { XX } },
3300     { "(bad)",          { XX } },
3301     { "(bad)",          { XX } },
3302     { "(bad)",          { XX } },
3303     /* c8 */
3304     { "(bad)",          { XX } },
3305     { "(bad)",          { XX } },
3306     { "(bad)",          { XX } },
3307     { "(bad)",          { XX } },
3308     { "(bad)",          { XX } },
3309     { "(bad)",          { XX } },
3310     { "(bad)",          { XX } },
3311     { "(bad)",          { XX } },
3312     /* d0 */
3313     { "(bad)",          { XX } },
3314     { "(bad)",          { XX } },
3315     { "(bad)",          { XX } },
3316     { "(bad)",          { XX } },
3317     { "(bad)",          { XX } },
3318     { "(bad)",          { XX } },
3319     { "(bad)",          { XX } },
3320     { "(bad)",          { XX } },
3321     /* d8 */
3322     { "(bad)",          { XX } },
3323     { "(bad)",          { XX } },
3324     { "(bad)",          { XX } },
3325     { "(bad)",          { XX } },
3326     { "(bad)",          { XX } },
3327     { "(bad)",          { XX } },
3328     { "(bad)",          { XX } },
3329     { "(bad)",          { XX } },
3330     /* e0 */
3331     { "(bad)",          { XX } },
3332     { "(bad)",          { XX } },
3333     { "(bad)",          { XX } },
3334     { "(bad)",          { XX } },
3335     { "(bad)",          { XX } },
3336     { "(bad)",          { XX } },
3337     { "(bad)",          { XX } },
3338     { "(bad)",          { XX } },
3339     /* e8 */
3340     { "(bad)",          { XX } },
3341     { "(bad)",          { XX } },
3342     { "(bad)",          { XX } },
3343     { "(bad)",          { XX } },
3344     { "(bad)",          { XX } },
3345     { "(bad)",          { XX } },
3346     { "(bad)",          { XX } },
3347     { "(bad)",          { XX } },
3348     /* f0 */
3349     { "(bad)",          { XX } },
3350     { "(bad)",          { XX } },
3351     { "(bad)",          { XX } },
3352     { "(bad)",          { XX } },
3353     { "(bad)",          { XX } },
3354     { "(bad)",          { XX } },
3355     { "(bad)",          { XX } },
3356     { "(bad)",          { XX } },
3357     /* f8 */
3358     { "(bad)",          { XX } },
3359     { "(bad)",          { XX } },
3360     { "(bad)",          { XX } },
3361     { "(bad)",          { XX } },
3362     { "(bad)",          { XX } },
3363     { "(bad)",          { XX } },
3364     { "(bad)",          { XX } },
3365     { "(bad)",          { XX } },
3366   },
3367   /* THREE_BYTE_0F38 */
3368   {
3369     /* 00 */
3370     { "pshufb",         { MX, EM } },
3371     { "phaddw",         { MX, EM } },
3372     { "phaddd",         { MX, EM } },
3373     { "phaddsw",        { MX, EM } },
3374     { "pmaddubsw",      { MX, EM } },
3375     { "phsubw",         { MX, EM } },
3376     { "phsubd",         { MX, EM } },
3377     { "phsubsw",        { MX, EM } },
3378     /* 08 */
3379     { "psignb",         { MX, EM } },
3380     { "psignw",         { MX, EM } },
3381     { "psignd",         { MX, EM } },
3382     { "pmulhrsw",       { MX, EM } },
3383     { "(bad)",          { XX } },
3384     { "(bad)",          { XX } },
3385     { "(bad)",          { XX } },
3386     { "(bad)",          { XX } },
3387     /* 10 */
3388     { PREFIX_TABLE (PREFIX_0F3810) },
3389     { "(bad)",          { XX } },
3390     { "(bad)",          { XX } },
3391     { "(bad)",          { XX } },
3392     { PREFIX_TABLE (PREFIX_0F3814) },
3393     { PREFIX_TABLE (PREFIX_0F3815) },
3394     { "(bad)",          { XX } },
3395     { PREFIX_TABLE (PREFIX_0F3817) },
3396     /* 18 */
3397     { "(bad)",          { XX } },
3398     { "(bad)",          { XX } },
3399     { "(bad)",          { XX } },
3400     { "(bad)",          { XX } },
3401     { "pabsb",          { MX, EM } },
3402     { "pabsw",          { MX, EM } },
3403     { "pabsd",          { MX, EM } },
3404     { "(bad)",          { XX } },
3405     /* 20 */
3406     { PREFIX_TABLE (PREFIX_0F3820) },
3407     { PREFIX_TABLE (PREFIX_0F3821) },
3408     { PREFIX_TABLE (PREFIX_0F3822) },
3409     { PREFIX_TABLE (PREFIX_0F3823) },
3410     { PREFIX_TABLE (PREFIX_0F3824) },
3411     { PREFIX_TABLE (PREFIX_0F3825) },
3412     { "(bad)",          { XX } },
3413     { "(bad)",          { XX } },
3414     /* 28 */
3415     { PREFIX_TABLE (PREFIX_0F3828) },
3416     { PREFIX_TABLE (PREFIX_0F3829) },
3417     { PREFIX_TABLE (PREFIX_0F382A) },
3418     { PREFIX_TABLE (PREFIX_0F382B) },
3419     { "(bad)",          { XX } },
3420     { "(bad)",          { XX } },
3421     { "(bad)",          { XX } },
3422     { "(bad)",          { XX } },
3423     /* 30 */
3424     { PREFIX_TABLE (PREFIX_0F3830) },
3425     { PREFIX_TABLE (PREFIX_0F3831) },
3426     { PREFIX_TABLE (PREFIX_0F3832) },
3427     { PREFIX_TABLE (PREFIX_0F3833) },
3428     { PREFIX_TABLE (PREFIX_0F3834) },
3429     { PREFIX_TABLE (PREFIX_0F3835) },
3430     { "(bad)",          { XX } },
3431     { PREFIX_TABLE (PREFIX_0F3837) },
3432     /* 38 */
3433     { PREFIX_TABLE (PREFIX_0F3838) },
3434     { PREFIX_TABLE (PREFIX_0F3839) },
3435     { PREFIX_TABLE (PREFIX_0F383A) },
3436     { PREFIX_TABLE (PREFIX_0F383B) },
3437     { PREFIX_TABLE (PREFIX_0F383C) },
3438     { PREFIX_TABLE (PREFIX_0F383D) },
3439     { PREFIX_TABLE (PREFIX_0F383E) },
3440     { PREFIX_TABLE (PREFIX_0F383F) },
3441     /* 40 */
3442     { PREFIX_TABLE (PREFIX_0F3840) },
3443     { PREFIX_TABLE (PREFIX_0F3841) },
3444     { "(bad)",          { XX } },
3445     { "(bad)",          { XX } },
3446     { "(bad)",          { XX } },
3447     { "(bad)",          { XX } },
3448     { "(bad)",          { XX } },
3449     { "(bad)",          { XX } },
3450     /* 48 */
3451     { "(bad)",          { XX } },
3452     { "(bad)",          { XX } },
3453     { "(bad)",          { XX } },
3454     { "(bad)",          { XX } },
3455     { "(bad)",          { XX } },
3456     { "(bad)",          { XX } },
3457     { "(bad)",          { XX } },
3458     { "(bad)",          { XX } },
3459     /* 50 */
3460     { "(bad)",          { XX } },
3461     { "(bad)",          { XX } },
3462     { "(bad)",          { XX } },
3463     { "(bad)",          { XX } },
3464     { "(bad)",          { XX } },
3465     { "(bad)",          { XX } },
3466     { "(bad)",          { XX } },
3467     { "(bad)",          { XX } },
3468     /* 58 */
3469     { "(bad)",          { XX } },
3470     { "(bad)",          { XX } },
3471     { "(bad)",          { XX } },
3472     { "(bad)",          { XX } },
3473     { "(bad)",          { XX } },
3474     { "(bad)",          { XX } },
3475     { "(bad)",          { XX } },
3476     { "(bad)",          { XX } },
3477     /* 60 */
3478     { "(bad)",          { XX } },
3479     { "(bad)",          { XX } },
3480     { "(bad)",          { XX } },
3481     { "(bad)",          { XX } },
3482     { "(bad)",          { XX } },
3483     { "(bad)",          { XX } },
3484     { "(bad)",          { XX } },
3485     { "(bad)",          { XX } },
3486     /* 68 */
3487     { "(bad)",          { XX } },
3488     { "(bad)",          { XX } },
3489     { "(bad)",          { XX } },
3490     { "(bad)",          { XX } },
3491     { "(bad)",          { XX } },
3492     { "(bad)",          { XX } },
3493     { "(bad)",          { XX } },
3494     { "(bad)",          { XX } },
3495     /* 70 */
3496     { "(bad)",          { XX } },
3497     { "(bad)",          { XX } },
3498     { "(bad)",          { XX } },
3499     { "(bad)",          { XX } },
3500     { "(bad)",          { XX } },
3501     { "(bad)",          { XX } },
3502     { "(bad)",          { XX } },
3503     { "(bad)",          { XX } },
3504     /* 78 */
3505     { "(bad)",          { XX } },
3506     { "(bad)",          { XX } },
3507     { "(bad)",          { XX } },
3508     { "(bad)",          { XX } },
3509     { "(bad)",          { XX } },
3510     { "(bad)",          { XX } },
3511     { "(bad)",          { XX } },
3512     { "(bad)",          { XX } },
3513     /* 80 */
3514     { "(bad)",          { XX } },
3515     { "(bad)",          { XX } },
3516     { "(bad)",          { XX } },
3517     { "(bad)",          { XX } },
3518     { "(bad)",          { XX } },
3519     { "(bad)",          { XX } },
3520     { "(bad)",          { XX } },
3521     { "(bad)",          { XX } },
3522     /* 88 */
3523     { "(bad)",          { XX } },
3524     { "(bad)",          { XX } },
3525     { "(bad)",          { XX } },
3526     { "(bad)",          { XX } },
3527     { "(bad)",          { XX } },
3528     { "(bad)",          { XX } },
3529     { "(bad)",          { XX } },
3530     { "(bad)",          { XX } },
3531     /* 90 */
3532     { "(bad)",          { XX } },
3533     { "(bad)",          { XX } },
3534     { "(bad)",          { XX } },
3535     { "(bad)",          { XX } },
3536     { "(bad)",          { XX } },
3537     { "(bad)",          { XX } },
3538     { "(bad)",          { XX } },
3539     { "(bad)",          { XX } },
3540     /* 98 */
3541     { "(bad)",          { XX } },
3542     { "(bad)",          { XX } },
3543     { "(bad)",          { XX } },
3544     { "(bad)",          { XX } },
3545     { "(bad)",          { XX } },
3546     { "(bad)",          { XX } },
3547     { "(bad)",          { XX } },
3548     { "(bad)",          { XX } },
3549     /* a0 */
3550     { "(bad)",          { XX } },
3551     { "(bad)",          { XX } },
3552     { "(bad)",          { XX } },
3553     { "(bad)",          { XX } },
3554     { "(bad)",          { XX } },
3555     { "(bad)",          { XX } },
3556     { "(bad)",          { XX } },
3557     { "(bad)",          { XX } },
3558     /* a8 */
3559     { "(bad)",          { XX } },
3560     { "(bad)",          { XX } },
3561     { "(bad)",          { XX } },
3562     { "(bad)",          { XX } },
3563     { "(bad)",          { XX } },
3564     { "(bad)",          { XX } },
3565     { "(bad)",          { XX } },
3566     { "(bad)",          { XX } },
3567     /* b0 */
3568     { "(bad)",          { XX } },
3569     { "(bad)",          { XX } },
3570     { "(bad)",          { XX } },
3571     { "(bad)",          { XX } },
3572     { "(bad)",          { XX } },
3573     { "(bad)",          { XX } },
3574     { "(bad)",          { XX } },
3575     { "(bad)",          { XX } },
3576     /* b8 */
3577     { "(bad)",          { XX } },
3578     { "(bad)",          { XX } },
3579     { "(bad)",          { XX } },
3580     { "(bad)",          { XX } },
3581     { "(bad)",          { XX } },
3582     { "(bad)",          { XX } },
3583     { "(bad)",          { XX } },
3584     { "(bad)",          { XX } },
3585     /* c0 */
3586     { "(bad)",          { XX } },
3587     { "(bad)",          { XX } },
3588     { "(bad)",          { XX } },
3589     { "(bad)",          { XX } },
3590     { "(bad)",          { XX } },
3591     { "(bad)",          { XX } },
3592     { "(bad)",          { XX } },
3593     { "(bad)",          { XX } },
3594     /* c8 */
3595     { "(bad)",          { XX } },
3596     { "(bad)",          { XX } },
3597     { "(bad)",          { XX } },
3598     { "(bad)",          { XX } },
3599     { "(bad)",          { XX } },
3600     { "(bad)",          { XX } },
3601     { "(bad)",          { XX } },
3602     { "(bad)",          { XX } },
3603     /* d0 */
3604     { "(bad)",          { XX } },
3605     { "(bad)",          { XX } },
3606     { "(bad)",          { XX } },
3607     { "(bad)",          { XX } },
3608     { "(bad)",          { XX } },
3609     { "(bad)",          { XX } },
3610     { "(bad)",          { XX } },
3611     { "(bad)",          { XX } },
3612     /* d8 */
3613     { "(bad)",          { XX } },
3614     { "(bad)",          { XX } },
3615     { "(bad)",          { XX } },
3616     { "(bad)",          { XX } },
3617     { "(bad)",          { XX } },
3618     { "(bad)",          { XX } },
3619     { "(bad)",          { XX } },
3620     { "(bad)",          { XX } },
3621     /* e0 */
3622     { "(bad)",          { XX } },
3623     { "(bad)",          { XX } },
3624     { "(bad)",          { XX } },
3625     { "(bad)",          { XX } },
3626     { "(bad)",          { XX } },
3627     { "(bad)",          { XX } },
3628     { "(bad)",          { XX } },
3629     { "(bad)",          { XX } },
3630     /* e8 */
3631     { "(bad)",          { XX } },
3632     { "(bad)",          { XX } },
3633     { "(bad)",          { XX } },
3634     { "(bad)",          { XX } },
3635     { "(bad)",          { XX } },
3636     { "(bad)",          { XX } },
3637     { "(bad)",          { XX } },
3638     { "(bad)",          { XX } },
3639     /* f0 */
3640     { PREFIX_TABLE (PREFIX_0F38F0) },
3641     { PREFIX_TABLE (PREFIX_0F38F1) },
3642     { "(bad)",          { XX } },
3643     { "(bad)",          { XX } },
3644     { "(bad)",          { XX } },
3645     { "(bad)",          { XX } },
3646     { "(bad)",          { XX } },
3647     { "(bad)",          { XX } },
3648     /* f8 */
3649     { "(bad)",          { XX } },
3650     { "(bad)",          { XX } },
3651     { "(bad)",          { XX } },
3652     { "(bad)",          { XX } },
3653     { "(bad)",          { XX } },
3654     { "(bad)",          { XX } },
3655     { "(bad)",          { XX } },
3656     { "(bad)",          { XX } },
3657   },
3658   /* THREE_BYTE_0F3A */
3659   {
3660     /* 00 */
3661     { "(bad)",          { XX } },
3662     { "(bad)",          { XX } },
3663     { "(bad)",          { XX } },
3664     { "(bad)",          { XX } },
3665     { "(bad)",          { XX } },
3666     { "(bad)",          { XX } },
3667     { "(bad)",          { XX } },
3668     { "(bad)",          { XX } },
3669     /* 08 */
3670     { PREFIX_TABLE (PREFIX_0F3A08) },
3671     { PREFIX_TABLE (PREFIX_0F3A09) },
3672     { PREFIX_TABLE (PREFIX_0F3A0A) },
3673     { PREFIX_TABLE (PREFIX_0F3A0B) },
3674     { PREFIX_TABLE (PREFIX_0F3A0C) },
3675     { PREFIX_TABLE (PREFIX_0F3A0D) },
3676     { PREFIX_TABLE (PREFIX_0F3A0E) },
3677     { "palignr",        { MX, EM, Ib } },
3678     /* 10 */
3679     { "(bad)",          { XX } },
3680     { "(bad)",          { XX } },
3681     { "(bad)",          { XX } },
3682     { "(bad)",          { XX } },
3683     { PREFIX_TABLE (PREFIX_0F3A14) },
3684     { PREFIX_TABLE (PREFIX_0F3A15) },
3685     { PREFIX_TABLE (PREFIX_0F3A16) },
3686     { PREFIX_TABLE (PREFIX_0F3A17) },
3687     /* 18 */
3688     { "(bad)",          { XX } },
3689     { "(bad)",          { XX } },
3690     { "(bad)",          { XX } },
3691     { "(bad)",          { XX } },
3692     { "(bad)",          { XX } },
3693     { "(bad)",          { XX } },
3694     { "(bad)",          { XX } },
3695     { "(bad)",          { XX } },
3696     /* 20 */
3697     { PREFIX_TABLE (PREFIX_0F3A20) },
3698     { PREFIX_TABLE (PREFIX_0F3A21) },
3699     { PREFIX_TABLE (PREFIX_0F3A22) },
3700     { "(bad)",          { XX } },
3701     { "(bad)",          { XX } },
3702     { "(bad)",          { XX } },
3703     { "(bad)",          { XX } },
3704     { "(bad)",          { XX } },
3705     /* 28 */
3706     { "(bad)",          { XX } },
3707     { "(bad)",          { XX } },
3708     { "(bad)",          { XX } },
3709     { "(bad)",          { XX } },
3710     { "(bad)",          { XX } },
3711     { "(bad)",          { XX } },
3712     { "(bad)",          { XX } },
3713     { "(bad)",          { XX } },
3714     /* 30 */
3715     { "(bad)",          { XX } },
3716     { "(bad)",          { XX } },
3717     { "(bad)",          { XX } },
3718     { "(bad)",          { XX } },
3719     { "(bad)",          { XX } },
3720     { "(bad)",          { XX } },
3721     { "(bad)",          { XX } },
3722     { "(bad)",          { XX } },
3723     /* 38 */
3724     { "(bad)",          { XX } },
3725     { "(bad)",          { XX } },
3726     { "(bad)",          { XX } },
3727     { "(bad)",          { XX } },
3728     { "(bad)",          { XX } },
3729     { "(bad)",          { XX } },
3730     { "(bad)",          { XX } },
3731     { "(bad)",          { XX } },
3732     /* 40 */
3733     { PREFIX_TABLE (PREFIX_0F3A40) },
3734     { PREFIX_TABLE (PREFIX_0F3A41) },
3735     { PREFIX_TABLE (PREFIX_0F3A42) },
3736     { "(bad)",          { XX } },
3737     { "(bad)",          { XX } },
3738     { "(bad)",          { XX } },
3739     { "(bad)",          { XX } },
3740     { "(bad)",          { XX } },
3741     /* 48 */
3742     { "(bad)",          { XX } },
3743     { "(bad)",          { XX } },
3744     { "(bad)",          { XX } },
3745     { "(bad)",          { XX } },
3746     { "(bad)",          { XX } },
3747     { "(bad)",          { XX } },
3748     { "(bad)",          { XX } },
3749     { "(bad)",          { XX } },
3750     /* 50 */
3751     { "(bad)",          { XX } },
3752     { "(bad)",          { XX } },
3753     { "(bad)",          { XX } },
3754     { "(bad)",          { XX } },
3755     { "(bad)",          { XX } },
3756     { "(bad)",          { XX } },
3757     { "(bad)",          { XX } },
3758     { "(bad)",          { XX } },
3759     /* 58 */
3760     { "(bad)",          { XX } },
3761     { "(bad)",          { XX } },
3762     { "(bad)",          { XX } },
3763     { "(bad)",          { XX } },
3764     { "(bad)",          { XX } },
3765     { "(bad)",          { XX } },
3766     { "(bad)",          { XX } },
3767     { "(bad)",          { XX } },
3768     /* 60 */
3769     { PREFIX_TABLE (PREFIX_0F3A60) },
3770     { PREFIX_TABLE (PREFIX_0F3A61) },
3771     { PREFIX_TABLE (PREFIX_0F3A62) },
3772     { PREFIX_TABLE (PREFIX_0F3A63) },
3773     { "(bad)",          { XX } },
3774     { "(bad)",          { XX } },
3775     { "(bad)",          { XX } },
3776     { "(bad)",          { XX } },
3777     /* 68 */
3778     { "(bad)",          { XX } },
3779     { "(bad)",          { XX } },
3780     { "(bad)",          { XX } },
3781     { "(bad)",          { XX } },
3782     { "(bad)",          { XX } },
3783     { "(bad)",          { XX } },
3784     { "(bad)",          { XX } },
3785     { "(bad)",          { XX } },
3786     /* 70 */
3787     { "(bad)",          { XX } },
3788     { "(bad)",          { XX } },
3789     { "(bad)",          { XX } },
3790     { "(bad)",          { XX } },
3791     { "(bad)",          { XX } },
3792     { "(bad)",          { XX } },
3793     { "(bad)",          { XX } },
3794     { "(bad)",          { XX } },
3795     /* 78 */
3796     { "(bad)",          { XX } },
3797     { "(bad)",          { XX } },
3798     { "(bad)",          { XX } },
3799     { "(bad)",          { XX } },
3800     { "(bad)",          { XX } },
3801     { "(bad)",          { XX } },
3802     { "(bad)",          { XX } },
3803     { "(bad)",          { XX } },
3804     /* 80 */
3805     { "(bad)",          { XX } },
3806     { "(bad)",          { XX } },
3807     { "(bad)",          { XX } },
3808     { "(bad)",          { XX } },
3809     { "(bad)",          { XX } },
3810     { "(bad)",          { XX } },
3811     { "(bad)",          { XX } },
3812     { "(bad)",          { XX } },
3813     /* 88 */
3814     { "(bad)",          { XX } },
3815     { "(bad)",          { XX } },
3816     { "(bad)",          { XX } },
3817     { "(bad)",          { XX } },
3818     { "(bad)",          { XX } },
3819     { "(bad)",          { XX } },
3820     { "(bad)",          { XX } },
3821     { "(bad)",          { XX } },
3822     /* 90 */
3823     { "(bad)",          { XX } },
3824     { "(bad)",          { XX } },
3825     { "(bad)",          { XX } },
3826     { "(bad)",          { XX } },
3827     { "(bad)",          { XX } },
3828     { "(bad)",          { XX } },
3829     { "(bad)",          { XX } },
3830     { "(bad)",          { XX } },
3831     /* 98 */
3832     { "(bad)",          { XX } },
3833     { "(bad)",          { XX } },
3834     { "(bad)",          { XX } },
3835     { "(bad)",          { XX } },
3836     { "(bad)",          { XX } },
3837     { "(bad)",          { XX } },
3838     { "(bad)",          { XX } },
3839     { "(bad)",          { XX } },
3840     /* a0 */
3841     { "(bad)",          { XX } },
3842     { "(bad)",          { XX } },
3843     { "(bad)",          { XX } },
3844     { "(bad)",          { XX } },
3845     { "(bad)",          { XX } },
3846     { "(bad)",          { XX } },
3847     { "(bad)",          { XX } },
3848     { "(bad)",          { XX } },
3849     /* a8 */
3850     { "(bad)",          { XX } },
3851     { "(bad)",          { XX } },
3852     { "(bad)",          { XX } },
3853     { "(bad)",          { XX } },
3854     { "(bad)",          { XX } },
3855     { "(bad)",          { XX } },
3856     { "(bad)",          { XX } },
3857     { "(bad)",          { XX } },
3858     /* b0 */
3859     { "(bad)",          { XX } },
3860     { "(bad)",          { XX } },
3861     { "(bad)",          { XX } },
3862     { "(bad)",          { XX } },
3863     { "(bad)",          { XX } },
3864     { "(bad)",          { XX } },
3865     { "(bad)",          { XX } },
3866     { "(bad)",          { XX } },
3867     /* b8 */
3868     { "(bad)",          { XX } },
3869     { "(bad)",          { XX } },
3870     { "(bad)",          { XX } },
3871     { "(bad)",          { XX } },
3872     { "(bad)",          { XX } },
3873     { "(bad)",          { XX } },
3874     { "(bad)",          { XX } },
3875     { "(bad)",          { XX } },
3876     /* c0 */
3877     { "(bad)",          { XX } },
3878     { "(bad)",          { XX } },
3879     { "(bad)",          { XX } },
3880     { "(bad)",          { XX } },
3881     { "(bad)",          { XX } },
3882     { "(bad)",          { XX } },
3883     { "(bad)",          { XX } },
3884     { "(bad)",          { XX } },
3885     /* c8 */
3886     { "(bad)",          { XX } },
3887     { "(bad)",          { XX } },
3888     { "(bad)",          { XX } },
3889     { "(bad)",          { XX } },
3890     { "(bad)",          { XX } },
3891     { "(bad)",          { XX } },
3892     { "(bad)",          { XX } },
3893     { "(bad)",          { XX } },
3894     /* d0 */
3895     { "(bad)",          { XX } },
3896     { "(bad)",          { XX } },
3897     { "(bad)",          { XX } },
3898     { "(bad)",          { XX } },
3899     { "(bad)",          { XX } },
3900     { "(bad)",          { XX } },
3901     { "(bad)",          { XX } },
3902     { "(bad)",          { XX } },
3903     /* d8 */
3904     { "(bad)",          { XX } },
3905     { "(bad)",          { XX } },
3906     { "(bad)",          { XX } },
3907     { "(bad)",          { XX } },
3908     { "(bad)",          { XX } },
3909     { "(bad)",          { XX } },
3910     { "(bad)",          { XX } },
3911     { "(bad)",          { XX } },
3912     /* e0 */
3913     { "(bad)",          { XX } },
3914     { "(bad)",          { XX } },
3915     { "(bad)",          { XX } },
3916     { "(bad)",          { XX } },
3917     { "(bad)",          { XX } },
3918     { "(bad)",          { XX } },
3919     { "(bad)",          { XX } },
3920     { "(bad)",          { XX } },
3921     /* e8 */
3922     { "(bad)",          { XX } },
3923     { "(bad)",          { XX } },
3924     { "(bad)",          { XX } },
3925     { "(bad)",          { XX } },
3926     { "(bad)",          { XX } },
3927     { "(bad)",          { XX } },
3928     { "(bad)",          { XX } },
3929     { "(bad)",          { XX } },
3930     /* f0 */
3931     { "(bad)",          { XX } },
3932     { "(bad)",          { XX } },
3933     { "(bad)",          { XX } },
3934     { "(bad)",          { XX } },
3935     { "(bad)",          { XX } },
3936     { "(bad)",          { XX } },
3937     { "(bad)",          { XX } },
3938     { "(bad)",          { XX } },
3939     /* f8 */
3940     { "(bad)",          { XX } },
3941     { "(bad)",          { XX } },
3942     { "(bad)",          { XX } },
3943     { "(bad)",          { XX } },
3944     { "(bad)",          { XX } },
3945     { "(bad)",          { XX } },
3946     { "(bad)",          { XX } },
3947     { "(bad)",          { XX } },
3948   },
3949   /* THREE_BYTE_0F7A */
3950   {
3951     /* 00 */
3952     { "(bad)",          { XX } },
3953     { "(bad)",          { XX } },
3954     { "(bad)",          { XX } },
3955     { "(bad)",          { XX } },
3956     { "(bad)",          { XX } },
3957     { "(bad)",          { XX } },
3958     { "(bad)",          { XX } },
3959     { "(bad)",          { XX } },
3960     /* 08 */
3961     { "(bad)",          { XX } },
3962     { "(bad)",          { XX } },
3963     { "(bad)",          { XX } },
3964     { "(bad)",          { XX } },
3965     { "(bad)",          { XX } },
3966     { "(bad)",          { XX } },
3967     { "(bad)",          { XX } },
3968     { "(bad)",          { XX } },
3969     /* 10 */
3970     { "frczps",         { XM, EXq } },
3971     { "frczpd",         { XM, EXq } },
3972     { "frczss",         { XM, EXq } },
3973     { "frczsd",         { XM, EXq } },
3974     { "(bad)",          { XX } },
3975     { "(bad)",          { XX } },
3976     { "(bad)",          { XX } },
3977     { "(bad)",          { XX } },
3978     /* 18 */
3979     { "(bad)",          { XX } },
3980     { "(bad)",          { XX } },
3981     { "(bad)",          { XX } },
3982     { "(bad)",          { XX } },
3983     { "(bad)",          { XX } },
3984     { "(bad)",          { XX } },
3985     { "(bad)",          { XX } },
3986     { "(bad)",          { XX } },
3987     /* 20 */
3988     { "ptest",          { XX } },
3989     { "(bad)",          { XX } },
3990     { "(bad)",          { XX } },
3991     { "(bad)",          { XX } },
3992     { "(bad)",          { XX } },
3993     { "(bad)",          { XX } },
3994     { "(bad)",          { XX } },
3995     { "(bad)",          { XX } },
3996     /* 28 */
3997     { "(bad)",          { XX } },
3998     { "(bad)",          { XX } },
3999     { "(bad)",          { XX } },
4000     { "(bad)",          { XX } },
4001     { "(bad)",          { XX } },
4002     { "(bad)",          { XX } },
4003     { "(bad)",          { XX } },
4004     { "(bad)",          { XX } },
4005     /* 30 */
4006     { "cvtph2ps",       { XM, EXd } },
4007     { "cvtps2ph",       { EXd, XM } },
4008     { "(bad)",          { XX } },
4009     { "(bad)",          { XX } },
4010     { "(bad)",          { XX } },
4011     { "(bad)",          { XX } },
4012     { "(bad)",          { XX } },
4013     { "(bad)",          { XX } },
4014     /* 38 */
4015     { "(bad)",          { XX } },
4016     { "(bad)",          { XX } },
4017     { "(bad)",          { XX } },
4018     { "(bad)",          { XX } },
4019     { "(bad)",          { XX } },
4020     { "(bad)",          { XX } },
4021     { "(bad)",          { XX } },
4022     { "(bad)",          { XX } },
4023     /* 40 */
4024     { "(bad)",          { XX } },
4025     { "phaddbw",        { XM, EXq } },
4026     { "phaddbd",        { XM, EXq } },
4027     { "phaddbq",        { XM, EXq } },
4028     { "(bad)",          { XX } },
4029     { "(bad)",          { XX } },
4030     { "phaddwd",        { XM, EXq } },
4031     { "phaddwq",        { XM, EXq } },
4032     /* 48 */
4033     { "(bad)",          { XX } },
4034     { "(bad)",          { XX } },
4035     { "(bad)",          { XX } },
4036     { "phadddq",        { XM, EXq } },
4037     { "(bad)",          { XX } },
4038     { "(bad)",          { XX } },
4039     { "(bad)",          { XX } },
4040     { "(bad)",          { XX } },
4041     /* 50 */
4042     { "(bad)",          { XX } },
4043     { "phaddubw",       { XM, EXq } },
4044     { "phaddubd",       { XM, EXq } },
4045     { "phaddubq",       { XM, EXq } },
4046     { "(bad)",          { XX } },
4047     { "(bad)",          { XX } },
4048     { "phadduwd",       { XM, EXq } },
4049     { "phadduwq",       { XM, EXq } },
4050     /* 58 */
4051     { "(bad)",          { XX } },
4052     { "(bad)",          { XX } },
4053     { "(bad)",          { XX } },
4054     { "phaddudq",       { XM, EXq } },
4055     { "(bad)",          { XX } },
4056     { "(bad)",          { XX } },
4057     { "(bad)",          { XX } },
4058     { "(bad)",          { XX } },
4059     /* 60 */
4060     { "(bad)",          { XX } },
4061     { "phsubbw",        { XM, EXq } },
4062     { "phsubbd",        { XM, EXq } },
4063     { "phsubbq",        { XM, EXq } },
4064     { "(bad)",          { XX } },
4065     { "(bad)",          { XX } },
4066     { "(bad)",          { XX } },
4067     { "(bad)",          { XX } },
4068     /* 68 */
4069     { "(bad)",          { XX } },
4070     { "(bad)",          { XX } },
4071     { "(bad)",          { XX } },
4072     { "(bad)",          { XX } },
4073     { "(bad)",          { XX } },
4074     { "(bad)",          { XX } },
4075     { "(bad)",          { XX } },
4076     { "(bad)",          { XX } },
4077     /* 70 */
4078     { "(bad)",          { XX } },
4079     { "(bad)",          { XX } },
4080     { "(bad)",          { XX } },
4081     { "(bad)",          { XX } },
4082     { "(bad)",          { XX } },
4083     { "(bad)",          { XX } },
4084     { "(bad)",          { XX } },
4085     { "(bad)",          { XX } },
4086     /* 78 */
4087     { "(bad)",          { XX } },
4088     { "(bad)",          { XX } },
4089     { "(bad)",          { XX } },
4090     { "(bad)",          { XX } },
4091     { "(bad)",          { XX } },
4092     { "(bad)",          { XX } },
4093     { "(bad)",          { XX } },
4094     { "(bad)",          { XX } },
4095     /* 80 */
4096     { "(bad)",          { XX } },
4097     { "(bad)",          { XX } },
4098     { "(bad)",          { XX } },
4099     { "(bad)",          { XX } },
4100     { "(bad)",          { XX } },
4101     { "(bad)",          { XX } },
4102     { "(bad)",          { XX } },
4103     { "(bad)",          { XX } },
4104     /* 88 */
4105     { "(bad)",          { XX } },
4106     { "(bad)",          { XX } },
4107     { "(bad)",          { XX } },
4108     { "(bad)",          { XX } },
4109     { "(bad)",          { XX } },
4110     { "(bad)",          { XX } },
4111     { "(bad)",          { XX } },
4112     { "(bad)",          { XX } },
4113     /* 90 */
4114     { "(bad)",          { XX } },
4115     { "(bad)",          { XX } },
4116     { "(bad)",          { XX } },
4117     { "(bad)",          { XX } },
4118     { "(bad)",          { XX } },
4119     { "(bad)",          { XX } },
4120     { "(bad)",          { XX } },
4121     { "(bad)",          { XX } },
4122     /* 98 */
4123     { "(bad)",          { XX } },
4124     { "(bad)",          { XX } },
4125     { "(bad)",          { XX } },
4126     { "(bad)",          { XX } },
4127     { "(bad)",          { XX } },
4128     { "(bad)",          { XX } },
4129     { "(bad)",          { XX } },
4130     { "(bad)",          { XX } },
4131     /* a0 */
4132     { "(bad)",          { XX } },
4133     { "(bad)",          { XX } },
4134     { "(bad)",          { XX } },
4135     { "(bad)",          { XX } },
4136     { "(bad)",          { XX } },
4137     { "(bad)",          { XX } },
4138     { "(bad)",          { XX } },
4139     { "(bad)",          { XX } },
4140     /* a8 */
4141     { "(bad)",          { XX } },
4142     { "(bad)",          { XX } },
4143     { "(bad)",          { XX } },
4144     { "(bad)",          { XX } },
4145     { "(bad)",          { XX } },
4146     { "(bad)",          { XX } },
4147     { "(bad)",          { XX } },
4148     { "(bad)",          { XX } },
4149     /* b0 */
4150     { "(bad)",          { XX } },
4151     { "(bad)",          { XX } },
4152     { "(bad)",          { XX } },
4153     { "(bad)",          { XX } },
4154     { "(bad)",          { XX } },
4155     { "(bad)",          { XX } },
4156     { "(bad)",          { XX } },
4157     { "(bad)",          { XX } },
4158     /* b8 */
4159     { "(bad)",          { XX } },
4160     { "(bad)",          { XX } },
4161     { "(bad)",          { XX } },
4162     { "(bad)",          { XX } },
4163     { "(bad)",          { XX } },
4164     { "(bad)",          { XX } },
4165     { "(bad)",          { XX } },
4166     { "(bad)",          { XX } },
4167     /* c0 */
4168     { "(bad)",          { XX } },
4169     { "(bad)",          { XX } },
4170     { "(bad)",          { XX } },
4171     { "(bad)",          { XX } },
4172     { "(bad)",          { XX } },
4173     { "(bad)",          { XX } },
4174     { "(bad)",          { XX } },
4175     { "(bad)",          { XX } },
4176     /* c8 */
4177     { "(bad)",          { XX } },
4178     { "(bad)",          { XX } },
4179     { "(bad)",          { XX } },
4180     { "(bad)",          { XX } },
4181     { "(bad)",          { XX } },
4182     { "(bad)",          { XX } },
4183     { "(bad)",          { XX } },
4184     { "(bad)",          { XX } },
4185     /* d0 */
4186     { "(bad)",          { XX } },
4187     { "(bad)",          { XX } },
4188     { "(bad)",          { XX } },
4189     { "(bad)",          { XX } },
4190     { "(bad)",          { XX } },
4191     { "(bad)",          { XX } },
4192     { "(bad)",          { XX } },
4193     { "(bad)",          { XX } },
4194     /* d8 */
4195     { "(bad)",          { XX } },
4196     { "(bad)",          { XX } },
4197     { "(bad)",          { XX } },
4198     { "(bad)",          { XX } },
4199     { "(bad)",          { XX } },
4200     { "(bad)",          { XX } },
4201     { "(bad)",          { XX } },
4202     { "(bad)",          { XX } },
4203     /* e0 */
4204     { "(bad)",          { XX } },
4205     { "(bad)",          { XX } },
4206     { "(bad)",          { XX } },
4207     { "(bad)",          { XX } },
4208     { "(bad)",          { XX } },
4209     { "(bad)",          { XX } },
4210     { "(bad)",          { XX } },
4211     { "(bad)",          { XX } },
4212     /* e8 */
4213     { "(bad)",          { XX } },
4214     { "(bad)",          { XX } },
4215     { "(bad)",          { XX } },
4216     { "(bad)",          { XX } },
4217     { "(bad)",          { XX } },
4218     { "(bad)",          { XX } },
4219     { "(bad)",          { XX } },
4220     { "(bad)",          { XX } },
4221     /* f0 */
4222     { "(bad)",          { XX } },
4223     { "(bad)",          { XX } },
4224     { "(bad)",          { XX } },
4225     { "(bad)",          { XX } },
4226     { "(bad)",          { XX } },
4227     { "(bad)",          { XX } },
4228     { "(bad)",          { XX } },
4229     { "(bad)",          { XX } },
4230     /* f8 */
4231     { "(bad)",          { XX } },
4232     { "(bad)",          { XX } },
4233     { "(bad)",          { XX } },
4234     { "(bad)",          { XX } },
4235     { "(bad)",          { XX } },
4236     { "(bad)",          { XX } },
4237     { "(bad)",          { XX } },
4238     { "(bad)",          { XX } },
4239   },
4240   /* THREE_BYTE_0F7B */
4241   {
4242     /* 00 */
4243     { "(bad)",          { XX } },
4244     { "(bad)",          { XX } },
4245     { "(bad)",          { XX } },
4246     { "(bad)",          { XX } },
4247     { "(bad)",          { XX } },
4248     { "(bad)",          { XX } },
4249     { "(bad)",          { XX } },
4250     { "(bad)",          { XX } },
4251     /* 08 */
4252     { "(bad)",          { XX } },
4253     { "(bad)",          { XX } },
4254     { "(bad)",          { XX } },
4255     { "(bad)",          { XX } },
4256     { "(bad)",          { XX } },
4257     { "(bad)",          { XX } },
4258     { "(bad)",          { XX } },
4259     { "(bad)",          { XX } },
4260     /* 10 */
4261     { "(bad)",          { XX } },
4262     { "(bad)",          { XX } },
4263     { "(bad)",          { XX } },
4264     { "(bad)",          { XX } },
4265     { "(bad)",          { XX } },
4266     { "(bad)",          { XX } },
4267     { "(bad)",          { XX } },
4268     { "(bad)",          { XX } },
4269     /* 18 */
4270     { "(bad)",          { XX } },
4271     { "(bad)",          { XX } },
4272     { "(bad)",          { XX } },
4273     { "(bad)",          { XX } },
4274     { "(bad)",          { XX } },
4275     { "(bad)",          { XX } },
4276     { "(bad)",          { XX } },
4277     { "(bad)",          { XX } },
4278     /* 20 */
4279     { "(bad)",          { XX } },
4280     { "(bad)",          { XX } },
4281     { "(bad)",          { XX } },
4282     { "(bad)",          { XX } },
4283     { "(bad)",          { XX } },
4284     { "(bad)",          { XX } },
4285     { "(bad)",          { XX } },
4286     { "(bad)",          { XX } },
4287     /* 28 */
4288     { "(bad)",          { XX } },
4289     { "(bad)",          { XX } },
4290     { "(bad)",          { XX } },
4291     { "(bad)",          { XX } },
4292     { "(bad)",          { XX } },
4293     { "(bad)",          { XX } },
4294     { "(bad)",          { XX } },
4295     { "(bad)",          { XX } },
4296     /* 30 */
4297     { "(bad)",          { XX } },
4298     { "(bad)",          { XX } },
4299     { "(bad)",          { XX } },
4300     { "(bad)",          { XX } },
4301     { "(bad)",          { XX } },
4302     { "(bad)",          { XX } },
4303     { "(bad)",          { XX } },
4304     { "(bad)",          { XX } },
4305     /* 38 */
4306     { "(bad)",          { XX } },
4307     { "(bad)",          { XX } },
4308     { "(bad)",          { XX } },
4309     { "(bad)",          { XX } },
4310     { "(bad)",          { XX } },
4311     { "(bad)",          { XX } },
4312     { "(bad)",          { XX } },
4313     { "(bad)",          { XX } },
4314     /* 40 */
4315     { "protb",          { XM, EXq, Ib } },
4316     { "protw",          { XM, EXq, Ib } },
4317     { "protd",          { XM, EXq, Ib } },
4318     { "protq",          { XM, EXq, Ib } },
4319     { "pshlb",          { XM, EXq, Ib } },
4320     { "pshlw",          { XM, EXq, Ib } },
4321     { "pshld",          { XM, EXq, Ib } },
4322     { "pshlq",          { XM, EXq, Ib } },
4323     /* 48 */
4324     { "pshab",          { XM, EXq, Ib } },
4325     { "pshaw",          { XM, EXq, Ib } },
4326     { "pshad",          { XM, EXq, Ib } },
4327     { "pshaq",          { XM, EXq, Ib } },
4328     { "(bad)",          { XX } },
4329     { "(bad)",          { XX } },
4330     { "(bad)",          { XX } },
4331     { "(bad)",          { XX } },
4332     /* 50 */
4333     { "(bad)",          { XX } },
4334     { "(bad)",          { XX } },
4335     { "(bad)",          { XX } },
4336     { "(bad)",          { XX } },
4337     { "(bad)",          { XX } },
4338     { "(bad)",          { XX } },
4339     { "(bad)",          { XX } },
4340     { "(bad)",          { XX } },
4341     /* 58 */
4342     { "(bad)",          { XX } },
4343     { "(bad)",          { XX } },
4344     { "(bad)",          { XX } },
4345     { "(bad)",          { XX } },
4346     { "(bad)",          { XX } },
4347     { "(bad)",          { XX } },
4348     { "(bad)",          { XX } },
4349     { "(bad)",          { XX } },
4350     /* 60 */
4351     { "(bad)",          { XX } },
4352     { "(bad)",          { XX } },
4353     { "(bad)",          { XX } },
4354     { "(bad)",          { XX } },
4355     { "(bad)",          { XX } },
4356     { "(bad)",          { XX } },
4357     { "(bad)",          { XX } },
4358     { "(bad)",          { XX } },
4359     /* 68 */
4360     { "(bad)",          { XX } },
4361     { "(bad)",          { XX } },
4362     { "(bad)",          { XX } },
4363     { "(bad)",          { XX } },
4364     { "(bad)",          { XX } },
4365     { "(bad)",          { XX } },
4366     { "(bad)",          { XX } },
4367     { "(bad)",          { XX } },
4368     /* 70 */
4369     { "(bad)",          { XX } },
4370     { "(bad)",          { XX } },
4371     { "(bad)",          { XX } },
4372     { "(bad)",          { XX } },
4373     { "(bad)",          { XX } },
4374     { "(bad)",          { XX } },
4375     { "(bad)",          { XX } },
4376     { "(bad)",          { XX } },
4377     /* 78 */
4378     { "(bad)",          { XX } },
4379     { "(bad)",          { XX } },
4380     { "(bad)",          { XX } },
4381     { "(bad)",          { XX } },
4382     { "(bad)",          { XX } },
4383     { "(bad)",          { XX } },
4384     { "(bad)",          { XX } },
4385     { "(bad)",          { XX } },
4386     /* 80 */
4387     { "(bad)",          { XX } },
4388     { "(bad)",          { XX } },
4389     { "(bad)",          { XX } },
4390     { "(bad)",          { XX } },
4391     { "(bad)",          { XX } },
4392     { "(bad)",          { XX } },
4393     { "(bad)",          { XX } },
4394     { "(bad)",          { XX } },
4395     /* 88 */
4396     { "(bad)",          { XX } },
4397     { "(bad)",          { XX } },
4398     { "(bad)",          { XX } },
4399     { "(bad)",          { XX } },
4400     { "(bad)",          { XX } },
4401     { "(bad)",          { XX } },
4402     { "(bad)",          { XX } },
4403     { "(bad)",          { XX } },
4404     /* 90 */
4405     { "(bad)",          { XX } },
4406     { "(bad)",          { XX } },
4407     { "(bad)",          { XX } },
4408     { "(bad)",          { XX } },
4409     { "(bad)",          { XX } },
4410     { "(bad)",          { XX } },
4411     { "(bad)",          { XX } },
4412     { "(bad)",          { XX } },
4413     /* 98 */
4414     { "(bad)",          { XX } },
4415     { "(bad)",          { XX } },
4416     { "(bad)",          { XX } },
4417     { "(bad)",          { XX } },
4418     { "(bad)",          { XX } },
4419     { "(bad)",          { XX } },
4420     { "(bad)",          { XX } },
4421     { "(bad)",          { XX } },
4422     /* a0 */
4423     { "(bad)",          { XX } },
4424     { "(bad)",          { XX } },
4425     { "(bad)",          { XX } },
4426     { "(bad)",          { XX } },
4427     { "(bad)",          { XX } },
4428     { "(bad)",          { XX } },
4429     { "(bad)",          { XX } },
4430     { "(bad)",          { XX } },
4431     /* a8 */
4432     { "(bad)",          { XX } },
4433     { "(bad)",          { XX } },
4434     { "(bad)",          { XX } },
4435     { "(bad)",          { XX } },
4436     { "(bad)",          { XX } },
4437     { "(bad)",          { XX } },
4438     { "(bad)",          { XX } },
4439     { "(bad)",          { XX } },
4440     /* b0 */
4441     { "(bad)",          { XX } },
4442     { "(bad)",          { XX } },
4443     { "(bad)",          { XX } },
4444     { "(bad)",          { XX } },
4445     { "(bad)",          { XX } },
4446     { "(bad)",          { XX } },
4447     { "(bad)",          { XX } },
4448     { "(bad)",          { XX } },
4449     /* b8 */
4450     { "(bad)",          { XX } },
4451     { "(bad)",          { XX } },
4452     { "(bad)",          { XX } },
4453     { "(bad)",          { XX } },
4454     { "(bad)",          { XX } },
4455     { "(bad)",          { XX } },
4456     { "(bad)",          { XX } },
4457     { "(bad)",          { XX } },
4458     /* c0 */
4459     { "(bad)",          { XX } },
4460     { "(bad)",          { XX } },
4461     { "(bad)",          { XX } },
4462     { "(bad)",          { XX } },
4463     { "(bad)",          { XX } },
4464     { "(bad)",          { XX } },
4465     { "(bad)",          { XX } },
4466     { "(bad)",          { XX } },
4467     /* c8 */
4468     { "(bad)",          { XX } },
4469     { "(bad)",          { XX } },
4470     { "(bad)",          { XX } },
4471     { "(bad)",          { XX } },
4472     { "(bad)",          { XX } },
4473     { "(bad)",          { XX } },
4474     { "(bad)",          { XX } },
4475     { "(bad)",          { XX } },
4476     /* d0 */
4477     { "(bad)",          { XX } },
4478     { "(bad)",          { XX } },
4479     { "(bad)",          { XX } },
4480     { "(bad)",          { XX } },
4481     { "(bad)",          { XX } },
4482     { "(bad)",          { XX } },
4483     { "(bad)",          { XX } },
4484     { "(bad)",          { XX } },
4485     /* d8 */
4486     { "(bad)",          { XX } },
4487     { "(bad)",          { XX } },
4488     { "(bad)",          { XX } },
4489     { "(bad)",          { XX } },
4490     { "(bad)",          { XX } },
4491     { "(bad)",          { XX } },
4492     { "(bad)",          { XX } },
4493     { "(bad)",          { XX } },
4494     /* e0 */
4495     { "(bad)",          { XX } },
4496     { "(bad)",          { XX } },
4497     { "(bad)",          { XX } },
4498     { "(bad)",          { XX } },
4499     { "(bad)",          { XX } },
4500     { "(bad)",          { XX } },
4501     { "(bad)",          { XX } },
4502     { "(bad)",          { XX } },
4503     /* e8 */
4504     { "(bad)",          { XX } },
4505     { "(bad)",          { XX } },
4506     { "(bad)",          { XX } },
4507     { "(bad)",          { XX } },
4508     { "(bad)",          { XX } },
4509     { "(bad)",          { XX } },
4510     { "(bad)",          { XX } },
4511     { "(bad)",          { XX } },
4512     /* f0 */
4513     { "(bad)",          { XX } },
4514     { "(bad)",          { XX } },
4515     { "(bad)",          { XX } },
4516     { "(bad)",          { XX } },
4517     { "(bad)",          { XX } },
4518     { "(bad)",          { XX } },
4519     { "(bad)",          { XX } },
4520     { "(bad)",          { XX } },
4521     /* f8 */
4522     { "(bad)",          { XX } },
4523     { "(bad)",          { XX } },
4524     { "(bad)",          { XX } },
4525     { "(bad)",          { XX } },
4526     { "(bad)",          { XX } },
4527     { "(bad)",          { XX } },
4528     { "(bad)",          { XX } },
4529     { "(bad)",          { XX } },
4530   }
4531 };
4532
4533 static const struct dis386 mod_table[][2] = {
4534   {
4535     /* MOD_8D */
4536     { "leaS",           { Gv, M } },
4537     { "(bad)",          { XX } },
4538   },
4539   {
4540     /* MOD_0F01_REG_0 */
4541     { X86_64_TABLE (X86_64_0F01_REG_0) },
4542     { RM_TABLE (RM_0F01_REG_0) },
4543   },
4544   {
4545     /* MOD_0F01_REG_1 */
4546     { X86_64_TABLE (X86_64_0F01_REG_1) },
4547     { RM_TABLE (RM_0F01_REG_1) },
4548   },
4549   {
4550     /* MOD_0F01_REG_2 */
4551     { X86_64_TABLE (X86_64_0F01_REG_2) },
4552     { "(bad)",          { XX } },
4553   },
4554   {
4555     /* MOD_0F01_REG_3 */
4556     { X86_64_TABLE (X86_64_0F01_REG_3) },
4557     { RM_TABLE (RM_0F01_REG_3) },
4558   },
4559   {
4560     /* MOD_0F01_REG_7 */
4561     { "invlpg",         { Mb } },
4562     { RM_TABLE (RM_0F01_REG_7) },
4563   },
4564   {
4565     /* MOD_0F12_PREFIX_0 */
4566     { "movlps",         { XM, EXq } },
4567     { "movhlps",        { XM, EXq } },
4568   },
4569   {
4570     /* MOD_0F13 */
4571     { "movlpX",         { EXq, XM } },
4572     { "(bad)",          { XX } },
4573   },
4574   {
4575     /* MOD_0F16_PREFIX_0 */
4576     { "movhps",         { XM, EXq } },
4577     { "movlhps",        { XM, EXq } },
4578   },
4579   {
4580     /* MOD_0F17 */
4581     { "movhpX",         { EXq, XM } },
4582     { "(bad)",          { XX } },
4583   },
4584   {
4585     /* MOD_0F18_REG_0 */
4586     { "prefetchnta",    { Mb } },
4587     { "(bad)",          { XX } },
4588   },
4589   {
4590     /* MOD_0F18_REG_1 */
4591     { "prefetcht0",     { Mb } },
4592     { "(bad)",          { XX } },
4593   },
4594   {
4595     /* MOD_0F18_REG_2 */
4596     { "prefetcht1",     { Mb } },
4597     { "(bad)",          { XX } },
4598   },
4599   {
4600     /* MOD_0F18_REG_3 */
4601     { "prefetcht2",     { Mb } },
4602     { "(bad)",          { XX } },
4603   },
4604   {
4605     /* MOD_0F20 */
4606     { "(bad)",          { XX } },
4607     { "movZ",           { Rm, Cm } },
4608   },
4609   {
4610     /* MOD_0F21 */
4611     { "(bad)",          { XX } },
4612     { "movZ",           { Rm, Dm } },
4613   },
4614   {
4615     /* MOD_0F22 */
4616     { "(bad)",          { XX } },
4617     { "movZ",           { Cm, Rm } },
4618   },
4619   {
4620     /* MOD_0F23 */
4621     { "(bad)",          { XX } },
4622     { "movZ",           { Dm, Rm } },
4623   },
4624   {
4625     /* MOD_0F24 */
4626     { THREE_BYTE_TABLE (THREE_BYTE_0F24) },
4627     { "movL",           { Rd, Td } },
4628   },
4629   {
4630     /* MOD_0F26 */
4631     { "(bad)",          { XX } },
4632     { "movL",           { Td, Rd } },
4633   },
4634   {
4635     /* MOD_0F2B_PREFIX_0 */
4636     {"movntps",         { Mx, XM } },
4637     { "(bad)",          { XX } },
4638   },
4639   {
4640     /* MOD_0F2B_PREFIX_1 */
4641     {"movntss",         { Md, XM } },
4642     { "(bad)",          { XX } },
4643   },
4644   {
4645     /* MOD_0F2B_PREFIX_2 */
4646     {"movntpd",         { Mx, XM } },
4647     { "(bad)",          { XX } },
4648   },
4649   {
4650     /* MOD_0F2B_PREFIX_3 */
4651     {"movntsd",         { Mq, XM } },
4652     { "(bad)",          { XX } },
4653   },
4654   {
4655     /* MOD_0F51 */
4656     { "(bad)",          { XX } },
4657     { "movmskpX",       { Gdq, XS } },
4658   },
4659   {
4660     /* MOD_0F71_REG_2 */
4661     { "(bad)",          { XX } },
4662     { "psrlw",          { MS, Ib } },
4663   },
4664   {
4665     /* MOD_0F71_REG_4 */
4666     { "(bad)",          { XX } },
4667     { "psraw",          { MS, Ib } },
4668   },
4669   {
4670     /* MOD_0F71_REG_6 */
4671     { "(bad)",          { XX } },
4672     { "psllw",          { MS, Ib } },
4673   },
4674   {
4675     /* MOD_0F72_REG_2 */
4676     { "(bad)",          { XX } },
4677     { "psrld",          { MS, Ib } },
4678   },
4679   {
4680     /* MOD_0F72_REG_4 */
4681     { "(bad)",          { XX } },
4682     { "psrad",          { MS, Ib } },
4683   },
4684   {
4685     /* MOD_0F72_REG_6 */
4686     { "(bad)",          { XX } },
4687     { "pslld",          { MS, Ib } },
4688   },
4689   {
4690     /* MOD_0F73_REG_2 */
4691     { "(bad)",          { XX } },
4692     { "psrlq",          { MS, Ib } },
4693   },
4694   {
4695     /* MOD_0F73_REG_3 */
4696     { "(bad)",          { XX } },
4697     { PREFIX_TABLE (PREFIX_0F73_REG_3) },
4698   },
4699   {
4700     /* MOD_0F73_REG_6 */
4701     { "(bad)",          { XX } },
4702     { "psllq",          { MS, Ib } },
4703   },
4704   {
4705     /* MOD_0F73_REG_7 */
4706     { "(bad)",          { XX } },
4707     { PREFIX_TABLE (PREFIX_0F73_REG_7) },
4708   },
4709   {
4710     /* MOD_0FAE_REG_0 */
4711     { "fxsave",         { M } },
4712     { "(bad)",          { XX } },
4713   },
4714   {
4715     /* MOD_0FAE_REG_1 */
4716     { "fxrstor",        { M } },
4717     { "(bad)",          { XX } },
4718   },
4719   {
4720     /* MOD_0FAE_REG_2 */
4721     { "ldmxcsr",        { Md } },
4722     { "(bad)",          { XX } },
4723   },
4724   {
4725     /* MOD_0FAE_REG_3 */
4726     { "stmxcsr",        { Md } },
4727     { "(bad)",          { XX } },
4728   },
4729   {
4730     /* MOD_0FAE_REG_5 */
4731     { "(bad)",          { XX } },
4732     { RM_TABLE (RM_0FAE_REG_5) },
4733   },
4734   {
4735     /* MOD_0FAE_REG_6 */
4736     { "(bad)",          { XX } },
4737     { RM_TABLE (RM_0FAE_REG_6) },
4738   },
4739   {
4740     /* MOD_0FAE_REG_7 */
4741     { "clflush",        { Mb } },
4742     { RM_TABLE (RM_0FAE_REG_7) },
4743   },
4744   {
4745     /* MOD_0FB2 */
4746     { "lssS",           { Gv, Mp } },
4747     { "(bad)",          { XX } },
4748   },
4749   {
4750     /* MOD_0FB4 */
4751     { "lfsS",           { Gv, Mp } },
4752     { "(bad)",          { XX } },
4753   },
4754   {
4755     /* MOD_0FB5 */
4756     { "lgsS",           { Gv, Mp } },
4757     { "(bad)",          { XX } },
4758   },
4759   {
4760     /* MOD_0FC7_REG_6 */
4761     { PREFIX_TABLE (PREFIX_0FC7_REG_6) },
4762     { "(bad)",          { XX } },
4763   },
4764   {
4765     /* MOD_0FC7_REG_7 */
4766     { "vmptrst",        { Mq } },
4767     { "(bad)",          { XX } },
4768   },
4769   {
4770     /* MOD_0FD7 */
4771     { "(bad)",          { XX } },
4772     { "pmovmskb",       { Gdq, MS } },
4773   },
4774   {
4775     /* MOD_0FE7_PREFIX_2 */
4776     { "movntdq",        { Mx, XM } },
4777     { "(bad)",          { XX } },
4778   },
4779   {
4780     /* MOD_0FF0_PREFIX_3 */
4781     { "lddqu",          { XM, M } },
4782     { "(bad)",          { XX } },
4783   },
4784   {
4785     /* MOD_0F382A_PREFIX_2 */
4786     { "movntdqa",       { XM, Mx } },
4787     { "(bad)",          { XX } },
4788   },
4789   {
4790     /* MOD_62_32BIT */
4791     { "bound{S|}",      { Gv, Ma } },
4792     { "(bad)",          { XX } },
4793   },
4794   {
4795     /* MOD_C4_32BIT */
4796     { "lesS",           { Gv, Mp } },
4797     { "(bad)",          { XX } },
4798   },
4799   {
4800     /* MOD_C5_32BIT */
4801     { "ldsS",           { Gv, Mp } },
4802     { "(bad)",          { XX } },
4803   },
4804 };
4805
4806 static const struct dis386 rm_table[][8] = {
4807   {
4808     /* RM_0F01_REG_0 */
4809     { "(bad)",          { XX } },
4810     { "vmcall",         { Skip_MODRM } },
4811     { "vmlaunch",       { Skip_MODRM } },
4812     { "vmresume",       { Skip_MODRM } },
4813     { "vmxoff",         { Skip_MODRM } },
4814     { "(bad)",          { XX } },
4815     { "(bad)",          { XX } },
4816     { "(bad)",          { XX } },
4817   },
4818   {
4819     /* RM_0F01_REG_1 */
4820     { "monitor",        { { OP_Monitor, 0 } } },
4821     { "mwait",          { { OP_Mwait, 0 } } },
4822     { "(bad)",          { XX } },
4823     { "(bad)",          { XX } },
4824     { "(bad)",          { XX } },
4825     { "(bad)",          { XX } },
4826     { "(bad)",          { XX } },
4827     { "(bad)",          { XX } },
4828   },
4829   {
4830     /* RM_0F01_REG_3 */
4831     { "vmrun",          { Skip_MODRM } },
4832     { "vmmcall",        { Skip_MODRM } },
4833     { "vmload",         { Skip_MODRM } },
4834     { "vmsave",         { Skip_MODRM } },
4835     { "stgi",           { Skip_MODRM } },
4836     { "clgi",           { Skip_MODRM } },
4837     { "skinit",         { Skip_MODRM } },
4838     { "invlpga",        { Skip_MODRM } },
4839   },
4840   {
4841     /* RM_0F01_REG_7 */
4842     { "swapgs",         { Skip_MODRM } },
4843     { "rdtscp",         { Skip_MODRM } },
4844     { "(bad)",          { XX } },
4845     { "(bad)",          { XX } },
4846     { "(bad)",          { XX } },
4847     { "(bad)",          { XX } },
4848     { "(bad)",          { XX } },
4849     { "(bad)",          { XX } },
4850   },
4851   {
4852     /* RM_0FAE_REG_5 */
4853     { "lfence",         { Skip_MODRM } },
4854     { "(bad)",          { XX } },
4855     { "(bad)",          { XX } },
4856     { "(bad)",          { XX } },
4857     { "(bad)",          { XX } },
4858     { "(bad)",          { XX } },
4859     { "(bad)",          { XX } },
4860     { "(bad)",          { XX } },
4861   },
4862   {
4863     /* RM_0FAE_REG_6 */
4864     { "mfence",         { Skip_MODRM } },
4865     { "(bad)",          { XX } },
4866     { "(bad)",          { XX } },
4867     { "(bad)",          { XX } },
4868     { "(bad)",          { XX } },
4869     { "(bad)",          { XX } },
4870     { "(bad)",          { XX } },
4871     { "(bad)",          { XX } },
4872   },
4873   {
4874     /* RM_0FAE_REG_7 */
4875     { "sfence",         { Skip_MODRM } },
4876     { "(bad)",          { XX } },
4877     { "(bad)",          { XX } },
4878     { "(bad)",          { XX } },
4879     { "(bad)",          { XX } },
4880     { "(bad)",          { XX } },
4881     { "(bad)",          { XX } },
4882     { "(bad)",          { XX } },
4883   },
4884 };
4885
4886 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
4887
4888 static void
4889 ckprefix (void)
4890 {
4891   int newrex;
4892   rex = 0;
4893   prefixes = 0;
4894   used_prefixes = 0;
4895   rex_used = 0;
4896   while (1)
4897     {
4898       FETCH_DATA (the_info, codep + 1);
4899       newrex = 0;
4900       switch (*codep)
4901         {
4902         /* REX prefixes family.  */
4903         case 0x40:
4904         case 0x41:
4905         case 0x42:
4906         case 0x43:
4907         case 0x44:
4908         case 0x45:
4909         case 0x46:
4910         case 0x47:
4911         case 0x48:
4912         case 0x49:
4913         case 0x4a:
4914         case 0x4b:
4915         case 0x4c:
4916         case 0x4d:
4917         case 0x4e:
4918         case 0x4f:
4919             if (address_mode == mode_64bit)
4920               newrex = *codep;
4921             else
4922               return;
4923           break;
4924         case 0xf3:
4925           prefixes |= PREFIX_REPZ;
4926           break;
4927         case 0xf2:
4928           prefixes |= PREFIX_REPNZ;
4929           break;
4930         case 0xf0:
4931           prefixes |= PREFIX_LOCK;
4932           break;
4933         case 0x2e:
4934           prefixes |= PREFIX_CS;
4935           break;
4936         case 0x36:
4937           prefixes |= PREFIX_SS;
4938           break;
4939         case 0x3e:
4940           prefixes |= PREFIX_DS;
4941           break;
4942         case 0x26:
4943           prefixes |= PREFIX_ES;
4944           break;
4945         case 0x64:
4946           prefixes |= PREFIX_FS;
4947           break;
4948         case 0x65:
4949           prefixes |= PREFIX_GS;
4950           break;
4951         case 0x66:
4952           prefixes |= PREFIX_DATA;
4953           break;
4954         case 0x67:
4955           prefixes |= PREFIX_ADDR;
4956           break;
4957         case FWAIT_OPCODE:
4958           /* fwait is really an instruction.  If there are prefixes
4959              before the fwait, they belong to the fwait, *not* to the
4960              following instruction.  */
4961           if (prefixes || rex)
4962             {
4963               prefixes |= PREFIX_FWAIT;
4964               codep++;
4965               return;
4966             }
4967           prefixes = PREFIX_FWAIT;
4968           break;
4969         default:
4970           return;
4971         }
4972       /* Rex is ignored when followed by another prefix.  */
4973       if (rex)
4974         {
4975           rex_used = rex;
4976           return;
4977         }
4978       rex = newrex;
4979       codep++;
4980     }
4981 }
4982
4983 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
4984    prefix byte.  */
4985
4986 static const char *
4987 prefix_name (int pref, int sizeflag)
4988 {
4989   static const char *rexes [16] =
4990     {
4991       "rex",            /* 0x40 */
4992       "rex.B",          /* 0x41 */
4993       "rex.X",          /* 0x42 */
4994       "rex.XB",         /* 0x43 */
4995       "rex.R",          /* 0x44 */
4996       "rex.RB",         /* 0x45 */
4997       "rex.RX",         /* 0x46 */
4998       "rex.RXB",        /* 0x47 */
4999       "rex.W",          /* 0x48 */
5000       "rex.WB",         /* 0x49 */
5001       "rex.WX",         /* 0x4a */
5002       "rex.WXB",        /* 0x4b */
5003       "rex.WR",         /* 0x4c */
5004       "rex.WRB",        /* 0x4d */
5005       "rex.WRX",        /* 0x4e */
5006       "rex.WRXB",       /* 0x4f */
5007     };
5008
5009   switch (pref)
5010     {
5011     /* REX prefixes family.  */
5012     case 0x40:
5013     case 0x41:
5014     case 0x42:
5015     case 0x43:
5016     case 0x44:
5017     case 0x45:
5018     case 0x46:
5019     case 0x47:
5020     case 0x48:
5021     case 0x49:
5022     case 0x4a:
5023     case 0x4b:
5024     case 0x4c:
5025     case 0x4d:
5026     case 0x4e:
5027     case 0x4f:
5028       return rexes [pref - 0x40];
5029     case 0xf3:
5030       return "repz";
5031     case 0xf2:
5032       return "repnz";
5033     case 0xf0:
5034       return "lock";
5035     case 0x2e:
5036       return "cs";
5037     case 0x36:
5038       return "ss";
5039     case 0x3e:
5040       return "ds";
5041     case 0x26:
5042       return "es";
5043     case 0x64:
5044       return "fs";
5045     case 0x65:
5046       return "gs";
5047     case 0x66:
5048       return (sizeflag & DFLAG) ? "data16" : "data32";
5049     case 0x67:
5050       if (address_mode == mode_64bit)
5051         return (sizeflag & AFLAG) ? "addr32" : "addr64";
5052       else
5053         return (sizeflag & AFLAG) ? "addr16" : "addr32";
5054     case FWAIT_OPCODE:
5055       return "fwait";
5056     default:
5057       return NULL;
5058     }
5059 }
5060
5061 static char op_out[MAX_OPERANDS][100];
5062 static int op_ad, op_index[MAX_OPERANDS];
5063 static int two_source_ops;
5064 static bfd_vma op_address[MAX_OPERANDS];
5065 static bfd_vma op_riprel[MAX_OPERANDS];
5066 static bfd_vma start_pc;
5067
5068 /*
5069  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
5070  *   (see topic "Redundant prefixes" in the "Differences from 8086"
5071  *   section of the "Virtual 8086 Mode" chapter.)
5072  * 'pc' should be the address of this instruction, it will
5073  *   be used to print the target address if this is a relative jump or call
5074  * The function returns the length of this instruction in bytes.
5075  */
5076
5077 static char intel_syntax;
5078 static char intel_mnemonic = !SYSV386_COMPAT;
5079 static char open_char;
5080 static char close_char;
5081 static char separator_char;
5082 static char scale_char;
5083
5084 /* Here for backwards compatibility.  When gdb stops using
5085    print_insn_i386_att and print_insn_i386_intel these functions can
5086    disappear, and print_insn_i386 be merged into print_insn.  */
5087 int
5088 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
5089 {
5090   intel_syntax = 0;
5091
5092   return print_insn (pc, info);
5093 }
5094
5095 int
5096 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
5097 {
5098   intel_syntax = 1;
5099
5100   return print_insn (pc, info);
5101 }
5102
5103 int
5104 print_insn_i386 (bfd_vma pc, disassemble_info *info)
5105 {
5106   intel_syntax = -1;
5107
5108   return print_insn (pc, info);
5109 }
5110
5111 void
5112 print_i386_disassembler_options (FILE *stream)
5113 {
5114   fprintf (stream, _("\n\
5115 The following i386/x86-64 specific disassembler options are supported for use\n\
5116 with the -M switch (multiple options should be separated by commas):\n"));
5117
5118   fprintf (stream, _("  x86-64      Disassemble in 64bit mode\n"));
5119   fprintf (stream, _("  i386        Disassemble in 32bit mode\n"));
5120   fprintf (stream, _("  i8086       Disassemble in 16bit mode\n"));
5121   fprintf (stream, _("  att         Display instruction in AT&T syntax\n"));
5122   fprintf (stream, _("  intel       Display instruction in Intel syntax\n"));
5123   fprintf (stream, _("  att-mnemonic\n"
5124                      "              Display instruction in AT&T mnemonic\n"));
5125   fprintf (stream, _("  intel-mnemonic\n"
5126                      "              Display instruction in Intel mnemonic\n"));
5127   fprintf (stream, _("  addr64      Assume 64bit address size\n"));
5128   fprintf (stream, _("  addr32      Assume 32bit address size\n"));
5129   fprintf (stream, _("  addr16      Assume 16bit address size\n"));
5130   fprintf (stream, _("  data32      Assume 32bit data size\n"));
5131   fprintf (stream, _("  data16      Assume 16bit data size\n"));
5132   fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
5133 }
5134
5135 /* Get a pointer to struct dis386 with a valid name.  */
5136
5137 static const struct dis386 *
5138 get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
5139 {
5140   int index;
5141
5142   if (dp->name != NULL)
5143     return dp;
5144
5145   switch (dp->op[0].bytemode)
5146     {
5147     case USE_REG_TABLE:
5148       dp = &reg_table[dp->op[1].bytemode][modrm.reg];
5149       break;
5150
5151     case USE_MOD_TABLE:
5152       index = modrm.mod == 0x3 ? 1 : 0;
5153       dp = &mod_table[dp->op[1].bytemode][index];
5154       break;
5155
5156     case USE_RM_TABLE:
5157       dp = &rm_table[dp->op[1].bytemode][modrm.rm];
5158       break;
5159
5160     case USE_PREFIX_TABLE:
5161       index = 0;
5162       used_prefixes |= (prefixes & PREFIX_REPZ);
5163       if (prefixes & PREFIX_REPZ)
5164         {
5165           index = 1;
5166           repz_prefix = NULL;
5167         }
5168       else
5169         {
5170           /* We should check PREFIX_REPNZ and PREFIX_REPZ before
5171              PREFIX_DATA.  */
5172           used_prefixes |= (prefixes & PREFIX_REPNZ);
5173           if (prefixes & PREFIX_REPNZ)
5174             {
5175               index = 3;
5176               repnz_prefix = NULL;
5177             }
5178           else
5179             {
5180               used_prefixes |= (prefixes & PREFIX_DATA);
5181               if (prefixes & PREFIX_DATA)
5182                 {
5183                   index = 2;
5184                   data_prefix = NULL;
5185                 }
5186             }
5187         }
5188       dp = &prefix_table[dp->op[1].bytemode][index];
5189       break;
5190
5191     case USE_X86_64_TABLE:
5192       index = address_mode == mode_64bit ? 1 : 0;
5193       dp = &x86_64_table[dp->op[1].bytemode][index];
5194       break;
5195
5196     case USE_3BYTE_TABLE:
5197       FETCH_DATA (info, codep + 2);
5198       index = *codep++;
5199       dp = &three_byte_table[dp->op[1].bytemode][index];
5200       modrm.mod = (*codep >> 6) & 3;
5201       modrm.reg = (*codep >> 3) & 7;
5202       modrm.rm = *codep & 7;
5203       break;
5204
5205     default:
5206       oappend (INTERNAL_DISASSEMBLER_ERROR);
5207       return NULL;
5208     }
5209
5210   if (dp->name != NULL)
5211     return dp;
5212   else
5213     return get_valid_dis386 (dp, info);
5214 }
5215
5216 static int
5217 print_insn (bfd_vma pc, disassemble_info *info)
5218 {
5219   const struct dis386 *dp;
5220   int i;
5221   char *op_txt[MAX_OPERANDS];
5222   int needcomma;
5223   int sizeflag;
5224   const char *p;
5225   struct dis_private priv;
5226   unsigned char op;
5227   char prefix_obuf[32];
5228   char *prefix_obufp;
5229
5230   if (info->mach == bfd_mach_x86_64_intel_syntax
5231       || info->mach == bfd_mach_x86_64)
5232     address_mode = mode_64bit;
5233   else
5234     address_mode = mode_32bit;
5235
5236   if (intel_syntax == (char) -1)
5237     intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
5238                     || info->mach == bfd_mach_x86_64_intel_syntax);
5239
5240   if (info->mach == bfd_mach_i386_i386
5241       || info->mach == bfd_mach_x86_64
5242       || info->mach == bfd_mach_i386_i386_intel_syntax
5243       || info->mach == bfd_mach_x86_64_intel_syntax)
5244     priv.orig_sizeflag = AFLAG | DFLAG;
5245   else if (info->mach == bfd_mach_i386_i8086)
5246     priv.orig_sizeflag = 0;
5247   else
5248     abort ();
5249
5250   for (p = info->disassembler_options; p != NULL; )
5251     {
5252       if (CONST_STRNEQ (p, "x86-64"))
5253         {
5254           address_mode = mode_64bit;
5255           priv.orig_sizeflag = AFLAG | DFLAG;
5256         }
5257       else if (CONST_STRNEQ (p, "i386"))
5258         {
5259           address_mode = mode_32bit;
5260           priv.orig_sizeflag = AFLAG | DFLAG;
5261         }
5262       else if (CONST_STRNEQ (p, "i8086"))
5263         {
5264           address_mode = mode_16bit;
5265           priv.orig_sizeflag = 0;
5266         }
5267       else if (CONST_STRNEQ (p, "intel"))
5268         {
5269           intel_syntax = 1;
5270           if (CONST_STRNEQ (p + 5, "-mnemonic"))
5271             intel_mnemonic = 1;
5272         }
5273       else if (CONST_STRNEQ (p, "att"))
5274         {
5275           intel_syntax = 0;
5276           if (CONST_STRNEQ (p + 3, "-mnemonic"))
5277             intel_mnemonic = 0;
5278         }
5279       else if (CONST_STRNEQ (p, "addr"))
5280         {
5281           if (address_mode == mode_64bit)
5282             {
5283               if (p[4] == '3' && p[5] == '2')
5284                 priv.orig_sizeflag &= ~AFLAG;
5285               else if (p[4] == '6' && p[5] == '4')
5286                 priv.orig_sizeflag |= AFLAG;
5287             }
5288           else
5289             {
5290               if (p[4] == '1' && p[5] == '6')
5291                 priv.orig_sizeflag &= ~AFLAG;
5292               else if (p[4] == '3' && p[5] == '2')
5293                 priv.orig_sizeflag |= AFLAG;
5294             }
5295         }
5296       else if (CONST_STRNEQ (p, "data"))
5297         {
5298           if (p[4] == '1' && p[5] == '6')
5299             priv.orig_sizeflag &= ~DFLAG;
5300           else if (p[4] == '3' && p[5] == '2')
5301             priv.orig_sizeflag |= DFLAG;
5302         }
5303       else if (CONST_STRNEQ (p, "suffix"))
5304         priv.orig_sizeflag |= SUFFIX_ALWAYS;
5305
5306       p = strchr (p, ',');
5307       if (p != NULL)
5308         p++;
5309     }
5310
5311   if (intel_syntax)
5312     {
5313       names64 = intel_names64;
5314       names32 = intel_names32;
5315       names16 = intel_names16;
5316       names8 = intel_names8;
5317       names8rex = intel_names8rex;
5318       names_seg = intel_names_seg;
5319       index64 = intel_index64;
5320       index32 = intel_index32;
5321       index16 = intel_index16;
5322       open_char = '[';
5323       close_char = ']';
5324       separator_char = '+';
5325       scale_char = '*';
5326     }
5327   else
5328     {
5329       names64 = att_names64;
5330       names32 = att_names32;
5331       names16 = att_names16;
5332       names8 = att_names8;
5333       names8rex = att_names8rex;
5334       names_seg = att_names_seg;
5335       index64 = att_index64;
5336       index32 = att_index32;
5337       index16 = att_index16;
5338       open_char = '(';
5339       close_char =  ')';
5340       separator_char = ',';
5341       scale_char = ',';
5342     }
5343
5344   /* The output looks better if we put 7 bytes on a line, since that
5345      puts most long word instructions on a single line.  */
5346   info->bytes_per_line = 7;
5347
5348   info->private_data = &priv;
5349   priv.max_fetched = priv.the_buffer;
5350   priv.insn_start = pc;
5351
5352   obuf[0] = 0;
5353   for (i = 0; i < MAX_OPERANDS; ++i)
5354     {
5355       op_out[i][0] = 0;
5356       op_index[i] = -1;
5357     }
5358
5359   the_info = info;
5360   start_pc = pc;
5361   start_codep = priv.the_buffer;
5362   codep = priv.the_buffer;
5363
5364   if (setjmp (priv.bailout) != 0)
5365     {
5366       const char *name;
5367
5368       /* Getting here means we tried for data but didn't get it.  That
5369          means we have an incomplete instruction of some sort.  Just
5370          print the first byte as a prefix or a .byte pseudo-op.  */
5371       if (codep > priv.the_buffer)
5372         {
5373           name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5374           if (name != NULL)
5375             (*info->fprintf_func) (info->stream, "%s", name);
5376           else
5377             {
5378               /* Just print the first byte as a .byte instruction.  */
5379               (*info->fprintf_func) (info->stream, ".byte 0x%x",
5380                                      (unsigned int) priv.the_buffer[0]);
5381             }
5382
5383           return 1;
5384         }
5385
5386       return -1;
5387     }
5388
5389   obufp = obuf;
5390   ckprefix ();
5391
5392   insn_codep = codep;
5393   sizeflag = priv.orig_sizeflag;
5394
5395   FETCH_DATA (info, codep + 1);
5396   two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
5397
5398   if (((prefixes & PREFIX_FWAIT)
5399        && ((*codep < 0xd8) || (*codep > 0xdf)))
5400       || (rex && rex_used))
5401     {
5402       const char *name;
5403
5404       /* fwait not followed by floating point instruction, or rex followed
5405          by other prefixes.  Print the first prefix.  */
5406       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5407       if (name == NULL)
5408         name = INTERNAL_DISASSEMBLER_ERROR;
5409       (*info->fprintf_func) (info->stream, "%s", name);
5410       return 1;
5411     }
5412
5413   op = 0;
5414   if (*codep == 0x0f)
5415     {
5416       unsigned char threebyte;
5417       FETCH_DATA (info, codep + 2);
5418       threebyte = *++codep;
5419       dp = &dis386_twobyte[threebyte];
5420       need_modrm = twobyte_has_modrm[*codep];
5421       codep++;
5422     }
5423   else
5424     {
5425       dp = &dis386[*codep];
5426       need_modrm = onebyte_has_modrm[*codep];
5427       codep++;
5428     }
5429
5430   if ((prefixes & PREFIX_REPZ))
5431     {
5432       repz_prefix = "repz ";
5433       used_prefixes |= PREFIX_REPZ;
5434     }
5435   else
5436     repz_prefix = NULL;
5437
5438   if ((prefixes & PREFIX_REPNZ))
5439     {
5440       repnz_prefix = "repnz ";
5441       used_prefixes |= PREFIX_REPNZ;
5442     }
5443   else
5444     repnz_prefix = NULL;
5445
5446   if ((prefixes & PREFIX_LOCK))
5447     {
5448       lock_prefix = "lock ";
5449       used_prefixes |= PREFIX_LOCK;
5450     }
5451   else
5452     lock_prefix = NULL;
5453
5454   addr_prefix = NULL;
5455   if (prefixes & PREFIX_ADDR)
5456     {
5457       sizeflag ^= AFLAG;
5458       if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
5459         {
5460           if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5461             addr_prefix = "addr32 ";
5462           else
5463             addr_prefix = "addr16 ";
5464           used_prefixes |= PREFIX_ADDR;
5465         }
5466     }
5467
5468   data_prefix = NULL;
5469   if ((prefixes & PREFIX_DATA))
5470     {
5471       sizeflag ^= DFLAG;
5472       if (dp->op[2].bytemode == cond_jump_mode
5473           && dp->op[0].bytemode == v_mode
5474           && !intel_syntax)
5475         {
5476           if (sizeflag & DFLAG)
5477             data_prefix = "data32 ";
5478           else
5479             data_prefix = "data16 ";
5480           used_prefixes |= PREFIX_DATA;
5481         }
5482     }
5483
5484   if (need_modrm)
5485     {
5486       FETCH_DATA (info, codep + 1);
5487       modrm.mod = (*codep >> 6) & 3;
5488       modrm.reg = (*codep >> 3) & 7;
5489       modrm.rm = *codep & 7;
5490     }
5491
5492   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
5493     {
5494       dofloat (sizeflag);
5495     }
5496   else
5497     {
5498       dp = get_valid_dis386 (dp, info);
5499       if (dp != NULL && putop (dp->name, sizeflag) == 0)
5500         {
5501           for (i = 0; i < MAX_OPERANDS; ++i)
5502             {
5503               obufp = op_out[i];
5504               op_ad = MAX_OPERANDS - 1 - i;
5505               if (dp->op[i].rtn)
5506                 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
5507             }
5508         }
5509     }
5510
5511   /* See if any prefixes were not used.  If so, print the first one
5512      separately.  If we don't do this, we'll wind up printing an
5513      instruction stream which does not precisely correspond to the
5514      bytes we are disassembling.  */
5515   if ((prefixes & ~used_prefixes) != 0)
5516     {
5517       const char *name;
5518
5519       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5520       if (name == NULL)
5521         name = INTERNAL_DISASSEMBLER_ERROR;
5522       (*info->fprintf_func) (info->stream, "%s", name);
5523       return 1;
5524     }
5525   if (rex & ~rex_used)
5526     {
5527       const char *name;
5528       name = prefix_name (rex | 0x40, priv.orig_sizeflag);
5529       if (name == NULL)
5530         name = INTERNAL_DISASSEMBLER_ERROR;
5531       (*info->fprintf_func) (info->stream, "%s ", name);
5532     }
5533
5534   prefix_obuf[0] = 0;
5535   prefix_obufp = prefix_obuf;
5536   if (lock_prefix)
5537     prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
5538   if (repz_prefix)
5539     prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
5540   if (repnz_prefix)
5541     prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
5542   if (addr_prefix)
5543     prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
5544   if (data_prefix)
5545     prefix_obufp = stpcpy (prefix_obufp, data_prefix);
5546
5547   if (prefix_obuf[0] != 0)
5548     (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
5549
5550   obufp = obuf + strlen (obuf);
5551   for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
5552     oappend (" ");
5553   oappend (" ");
5554   (*info->fprintf_func) (info->stream, "%s", obuf);
5555
5556   /* The enter and bound instructions are printed with operands in the same
5557      order as the intel book; everything else is printed in reverse order.  */
5558   if (intel_syntax || two_source_ops)
5559     {
5560       bfd_vma riprel;
5561
5562       for (i = 0; i < MAX_OPERANDS; ++i)
5563         op_txt[i] = op_out[i];
5564
5565       for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
5566         {
5567           op_ad = op_index[i];
5568           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
5569           op_index[MAX_OPERANDS - 1 - i] = op_ad;
5570           riprel = op_riprel[i];
5571           op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
5572           op_riprel[MAX_OPERANDS - 1 - i] = riprel;
5573         }
5574     }
5575   else
5576     {
5577       for (i = 0; i < MAX_OPERANDS; ++i)
5578         op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
5579     }
5580
5581   needcomma = 0;
5582   for (i = 0; i < MAX_OPERANDS; ++i)
5583     if (*op_txt[i])
5584       {
5585         if (needcomma)
5586           (*info->fprintf_func) (info->stream, ",");
5587         if (op_index[i] != -1 && !op_riprel[i])
5588           (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
5589         else
5590           (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
5591         needcomma = 1;
5592       }
5593
5594   for (i = 0; i < MAX_OPERANDS; i++)
5595     if (op_index[i] != -1 && op_riprel[i])
5596       {
5597         (*info->fprintf_func) (info->stream, "        # ");
5598         (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
5599                                                 + op_address[op_index[i]]), info);
5600         break;
5601       }
5602   return codep - priv.the_buffer;
5603 }
5604
5605 static const char *float_mem[] = {
5606   /* d8 */
5607   "fadd{s|}",
5608   "fmul{s|}",
5609   "fcom{s|}",
5610   "fcomp{s|}",
5611   "fsub{s|}",
5612   "fsubr{s|}",
5613   "fdiv{s|}",
5614   "fdivr{s|}",
5615   /* d9 */
5616   "fld{s|}",
5617   "(bad)",
5618   "fst{s|}",
5619   "fstp{s|}",
5620   "fldenvIC",
5621   "fldcw",
5622   "fNstenvIC",
5623   "fNstcw",
5624   /* da */
5625   "fiadd{l|}",
5626   "fimul{l|}",
5627   "ficom{l|}",
5628   "ficomp{l|}",
5629   "fisub{l|}",
5630   "fisubr{l|}",
5631   "fidiv{l|}",
5632   "fidivr{l|}",
5633   /* db */
5634   "fild{l|}",
5635   "fisttp{l|}",
5636   "fist{l|}",
5637   "fistp{l|}",
5638   "(bad)",
5639   "fld{t||t|}",
5640   "(bad)",
5641   "fstp{t||t|}",
5642   /* dc */
5643   "fadd{l|}",
5644   "fmul{l|}",
5645   "fcom{l|}",
5646   "fcomp{l|}",
5647   "fsub{l|}",
5648   "fsubr{l|}",
5649   "fdiv{l|}",
5650   "fdivr{l|}",
5651   /* dd */
5652   "fld{l|}",
5653   "fisttp{ll|}",
5654   "fst{l||}",
5655   "fstp{l|}",
5656   "frstorIC",
5657   "(bad)",
5658   "fNsaveIC",
5659   "fNstsw",
5660   /* de */
5661   "fiadd",
5662   "fimul",
5663   "ficom",
5664   "ficomp",
5665   "fisub",
5666   "fisubr",
5667   "fidiv",
5668   "fidivr",
5669   /* df */
5670   "fild",
5671   "fisttp",
5672   "fist",
5673   "fistp",
5674   "fbld",
5675   "fild{ll|}",
5676   "fbstp",
5677   "fistp{ll|}",
5678 };
5679
5680 static const unsigned char float_mem_mode[] = {
5681   /* d8 */
5682   d_mode,
5683   d_mode,
5684   d_mode,
5685   d_mode,
5686   d_mode,
5687   d_mode,
5688   d_mode,
5689   d_mode,
5690   /* d9 */
5691   d_mode,
5692   0,
5693   d_mode,
5694   d_mode,
5695   0,
5696   w_mode,
5697   0,
5698   w_mode,
5699   /* da */
5700   d_mode,
5701   d_mode,
5702   d_mode,
5703   d_mode,
5704   d_mode,
5705   d_mode,
5706   d_mode,
5707   d_mode,
5708   /* db */
5709   d_mode,
5710   d_mode,
5711   d_mode,
5712   d_mode,
5713   0,
5714   t_mode,
5715   0,
5716   t_mode,
5717   /* dc */
5718   q_mode,
5719   q_mode,
5720   q_mode,
5721   q_mode,
5722   q_mode,
5723   q_mode,
5724   q_mode,
5725   q_mode,
5726   /* dd */
5727   q_mode,
5728   q_mode,
5729   q_mode,
5730   q_mode,
5731   0,
5732   0,
5733   0,
5734   w_mode,
5735   /* de */
5736   w_mode,
5737   w_mode,
5738   w_mode,
5739   w_mode,
5740   w_mode,
5741   w_mode,
5742   w_mode,
5743   w_mode,
5744   /* df */
5745   w_mode,
5746   w_mode,
5747   w_mode,
5748   w_mode,
5749   t_mode,
5750   q_mode,
5751   t_mode,
5752   q_mode
5753 };
5754
5755 #define ST { OP_ST, 0 }
5756 #define STi { OP_STi, 0 }
5757
5758 #define FGRPd9_2 NULL, { { NULL, 0 } }
5759 #define FGRPd9_4 NULL, { { NULL, 1 } }
5760 #define FGRPd9_5 NULL, { { NULL, 2 } }
5761 #define FGRPd9_6 NULL, { { NULL, 3 } }
5762 #define FGRPd9_7 NULL, { { NULL, 4 } }
5763 #define FGRPda_5 NULL, { { NULL, 5 } }
5764 #define FGRPdb_4 NULL, { { NULL, 6 } }
5765 #define FGRPde_3 NULL, { { NULL, 7 } }
5766 #define FGRPdf_4 NULL, { { NULL, 8 } }
5767
5768 static const struct dis386 float_reg[][8] = {
5769   /* d8 */
5770   {
5771     { "fadd",   { ST, STi } },
5772     { "fmul",   { ST, STi } },
5773     { "fcom",   { STi } },
5774     { "fcomp",  { STi } },
5775     { "fsub",   { ST, STi } },
5776     { "fsubr",  { ST, STi } },
5777     { "fdiv",   { ST, STi } },
5778     { "fdivr",  { ST, STi } },
5779   },
5780   /* d9 */
5781   {
5782     { "fld",    { STi } },
5783     { "fxch",   { STi } },
5784     { FGRPd9_2 },
5785     { "(bad)",  { XX } },
5786     { FGRPd9_4 },
5787     { FGRPd9_5 },
5788     { FGRPd9_6 },
5789     { FGRPd9_7 },
5790   },
5791   /* da */
5792   {
5793     { "fcmovb", { ST, STi } },
5794     { "fcmove", { ST, STi } },
5795     { "fcmovbe",{ ST, STi } },
5796     { "fcmovu", { ST, STi } },
5797     { "(bad)",  { XX } },
5798     { FGRPda_5 },
5799     { "(bad)",  { XX } },
5800     { "(bad)",  { XX } },
5801   },
5802   /* db */
5803   {
5804     { "fcmovnb",{ ST, STi } },
5805     { "fcmovne",{ ST, STi } },
5806     { "fcmovnbe",{ ST, STi } },
5807     { "fcmovnu",{ ST, STi } },
5808     { FGRPdb_4 },
5809     { "fucomi", { ST, STi } },
5810     { "fcomi",  { ST, STi } },
5811     { "(bad)",  { XX } },
5812   },
5813   /* dc */
5814   {
5815     { "fadd",   { STi, ST } },
5816     { "fmul",   { STi, ST } },
5817     { "(bad)",  { XX } },
5818     { "(bad)",  { XX } },
5819     { "fsub!M", { STi, ST } },
5820     { "fsubM",  { STi, ST } },
5821     { "fdiv!M", { STi, ST } },
5822     { "fdivM",  { STi, ST } },
5823   },
5824   /* dd */
5825   {
5826     { "ffree",  { STi } },
5827     { "(bad)",  { XX } },
5828     { "fst",    { STi } },
5829     { "fstp",   { STi } },
5830     { "fucom",  { STi } },
5831     { "fucomp", { STi } },
5832     { "(bad)",  { XX } },
5833     { "(bad)",  { XX } },
5834   },
5835   /* de */
5836   {
5837     { "faddp",  { STi, ST } },
5838     { "fmulp",  { STi, ST } },
5839     { "(bad)",  { XX } },
5840     { FGRPde_3 },
5841     { "fsub!Mp", { STi, ST } },
5842     { "fsubMp", { STi, ST } },
5843     { "fdiv!Mp", { STi, ST } },
5844     { "fdivMp", { STi, ST } },
5845   },
5846   /* df */
5847   {
5848     { "ffreep", { STi } },
5849     { "(bad)",  { XX } },
5850     { "(bad)",  { XX } },
5851     { "(bad)",  { XX } },
5852     { FGRPdf_4 },
5853     { "fucomip", { ST, STi } },
5854     { "fcomip", { ST, STi } },
5855     { "(bad)",  { XX } },
5856   },
5857 };
5858
5859 static char *fgrps[][8] = {
5860   /* d9_2  0 */
5861   {
5862     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5863   },
5864
5865   /* d9_4  1 */
5866   {
5867     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
5868   },
5869
5870   /* d9_5  2 */
5871   {
5872     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
5873   },
5874
5875   /* d9_6  3 */
5876   {
5877     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
5878   },
5879
5880   /* d9_7  4 */
5881   {
5882     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
5883   },
5884
5885   /* da_5  5 */
5886   {
5887     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5888   },
5889
5890   /* db_4  6 */
5891   {
5892     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
5893     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
5894   },
5895
5896   /* de_3  7 */
5897   {
5898     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5899   },
5900
5901   /* df_4  8 */
5902   {
5903     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5904   },
5905 };
5906
5907 static void
5908 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
5909                int sizeflag ATTRIBUTE_UNUSED)
5910 {
5911   /* Skip mod/rm byte.  */
5912   MODRM_CHECK;
5913   codep++;
5914 }
5915
5916 static void
5917 dofloat (int sizeflag)
5918 {
5919   const struct dis386 *dp;
5920   unsigned char floatop;
5921
5922   floatop = codep[-1];
5923
5924   if (modrm.mod != 3)
5925     {
5926       int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
5927
5928       putop (float_mem[fp_indx], sizeflag);
5929       obufp = op_out[0];
5930       op_ad = 2;
5931       OP_E (float_mem_mode[fp_indx], sizeflag);
5932       return;
5933     }
5934   /* Skip mod/rm byte.  */
5935   MODRM_CHECK;
5936   codep++;
5937
5938   dp = &float_reg[floatop - 0xd8][modrm.reg];
5939   if (dp->name == NULL)
5940     {
5941       putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
5942
5943       /* Instruction fnstsw is only one with strange arg.  */
5944       if (floatop == 0xdf && codep[-1] == 0xe0)
5945         strcpy (op_out[0], names16[0]);
5946     }
5947   else
5948     {
5949       putop (dp->name, sizeflag);
5950
5951       obufp = op_out[0];
5952       op_ad = 2;
5953       if (dp->op[0].rtn)
5954         (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
5955
5956       obufp = op_out[1];
5957       op_ad = 1;
5958       if (dp->op[1].rtn)
5959         (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
5960     }
5961 }
5962
5963 static void
5964 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5965 {
5966   oappend ("%st" + intel_syntax);
5967 }
5968
5969 static void
5970 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5971 {
5972   sprintf (scratchbuf, "%%st(%d)", modrm.rm);
5973   oappend (scratchbuf + intel_syntax);
5974 }
5975
5976 /* Capital letters in template are macros.  */
5977 static int
5978 putop (const char *template, int sizeflag)
5979 {
5980   const char *p;
5981   int alt = 0;
5982   int cond = 1;
5983   unsigned int l = 0, len = 1;
5984   char last[4];
5985
5986 #define SAVE_LAST(c)                    \
5987   if (l < len && l < sizeof (last))     \
5988     last[l++] = c;                      \
5989   else                                  \
5990     abort ();
5991
5992   for (p = template; *p; p++)
5993     {
5994       switch (*p)
5995         {
5996         default:
5997           *obufp++ = *p;
5998           break;
5999         case '%':
6000           len++;
6001           break;
6002         case '!':
6003           cond = 0;
6004           break;
6005         case '{':
6006           alt = 0;
6007           if (intel_syntax)
6008             {
6009               while (*++p != '|')
6010                 if (*p == '}' || *p == '\0')
6011                   abort ();
6012             }
6013           /* Fall through.  */
6014         case 'I':
6015           alt = 1;
6016           continue;
6017         case '|':
6018           while (*++p != '}')
6019             {
6020               if (*p == '\0')
6021                 abort ();
6022             }
6023           break;
6024         case '}':
6025           break;
6026         case 'A':
6027           if (intel_syntax)
6028             break;
6029           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6030             *obufp++ = 'b';
6031           break;
6032         case 'B':
6033           if (intel_syntax)
6034             break;
6035           if (sizeflag & SUFFIX_ALWAYS)
6036             *obufp++ = 'b';
6037           break;
6038         case 'C':
6039           if (intel_syntax && !alt)
6040             break;
6041           if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
6042             {
6043               if (sizeflag & DFLAG)
6044                 *obufp++ = intel_syntax ? 'd' : 'l';
6045               else
6046                 *obufp++ = intel_syntax ? 'w' : 's';
6047               used_prefixes |= (prefixes & PREFIX_DATA);
6048             }
6049           break;
6050         case 'D':
6051           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
6052             break;
6053           USED_REX (REX_W);
6054           if (modrm.mod == 3)
6055             {
6056               if (rex & REX_W)
6057                 *obufp++ = 'q';
6058               else if (sizeflag & DFLAG)
6059                 *obufp++ = intel_syntax ? 'd' : 'l';
6060               else
6061                 *obufp++ = 'w';
6062               used_prefixes |= (prefixes & PREFIX_DATA);
6063             }
6064           else
6065             *obufp++ = 'w';
6066           break;
6067         case 'E':               /* For jcxz/jecxz */
6068           if (address_mode == mode_64bit)
6069             {
6070               if (sizeflag & AFLAG)
6071                 *obufp++ = 'r';
6072               else
6073                 *obufp++ = 'e';
6074             }
6075           else
6076             if (sizeflag & AFLAG)
6077               *obufp++ = 'e';
6078           used_prefixes |= (prefixes & PREFIX_ADDR);
6079           break;
6080         case 'F':
6081           if (intel_syntax)
6082             break;
6083           if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
6084             {
6085               if (sizeflag & AFLAG)
6086                 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
6087               else
6088                 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
6089               used_prefixes |= (prefixes & PREFIX_ADDR);
6090             }
6091           break;
6092         case 'G':
6093           if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
6094             break;
6095           if ((rex & REX_W) || (sizeflag & DFLAG))
6096             *obufp++ = 'l';
6097           else
6098             *obufp++ = 'w';
6099           if (!(rex & REX_W))
6100             used_prefixes |= (prefixes & PREFIX_DATA);
6101           break;
6102         case 'H':
6103           if (intel_syntax)
6104             break;
6105           if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
6106               || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
6107             {
6108               used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
6109               *obufp++ = ',';
6110               *obufp++ = 'p';
6111               if (prefixes & PREFIX_DS)
6112                 *obufp++ = 't';
6113               else
6114                 *obufp++ = 'n';
6115             }
6116           break;
6117         case 'J':
6118           if (intel_syntax)
6119             break;
6120           *obufp++ = 'l';
6121           break;
6122         case 'K':
6123           USED_REX (REX_W);
6124           if (rex & REX_W)
6125             *obufp++ = 'q';
6126           else
6127             *obufp++ = 'd';
6128           break;
6129         case 'Z':
6130           if (intel_syntax)
6131             break;
6132           if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
6133             {
6134               *obufp++ = 'q';
6135               break;
6136             }
6137           /* Fall through.  */
6138           goto case_L;
6139         case 'L':
6140           if (l != 0 || len != 1)
6141             {
6142               SAVE_LAST (*p);
6143               break;
6144             }
6145 case_L:
6146           if (intel_syntax)
6147             break;
6148           if (sizeflag & SUFFIX_ALWAYS)
6149             *obufp++ = 'l';
6150           break;
6151         case 'M':
6152           if (intel_mnemonic != cond)
6153             *obufp++ = 'r';
6154           break;
6155         case 'N':
6156           if ((prefixes & PREFIX_FWAIT) == 0)
6157             *obufp++ = 'n';
6158           else
6159             used_prefixes |= PREFIX_FWAIT;
6160           break;
6161         case 'O':
6162           USED_REX (REX_W);
6163           if (rex & REX_W)
6164             *obufp++ = 'o';
6165           else if (intel_syntax && (sizeflag & DFLAG))
6166             *obufp++ = 'q';
6167           else
6168             *obufp++ = 'd';
6169           if (!(rex & REX_W))
6170             used_prefixes |= (prefixes & PREFIX_DATA);
6171           break;
6172         case 'T':
6173           if (intel_syntax)
6174             break;
6175           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6176             {
6177               *obufp++ = 'q';
6178               break;
6179             }
6180           /* Fall through.  */
6181         case 'P':
6182           if (intel_syntax)
6183             break;
6184           if ((prefixes & PREFIX_DATA)
6185               || (rex & REX_W)
6186               || (sizeflag & SUFFIX_ALWAYS))
6187             {
6188               USED_REX (REX_W);
6189               if (rex & REX_W)
6190                 *obufp++ = 'q';
6191               else
6192                 {
6193                    if (sizeflag & DFLAG)
6194                       *obufp++ = 'l';
6195                    else
6196                      *obufp++ = 'w';
6197                 }
6198               used_prefixes |= (prefixes & PREFIX_DATA);
6199             }
6200           break;
6201         case 'U':
6202           if (intel_syntax)
6203             break;
6204           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6205             {
6206               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6207                 *obufp++ = 'q';
6208               break;
6209             }
6210           /* Fall through.  */
6211           goto case_Q;
6212         case 'Q':
6213           if (l == 0 && len == 1)
6214             {
6215 case_Q:
6216               if (intel_syntax && !alt)
6217                 break;
6218               USED_REX (REX_W);
6219               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6220                 {
6221                   if (rex & REX_W)
6222                     *obufp++ = 'q';
6223                   else
6224                     {
6225                       if (sizeflag & DFLAG)
6226                         *obufp++ = intel_syntax ? 'd' : 'l';
6227                       else
6228                         *obufp++ = 'w';
6229                     }
6230                   used_prefixes |= (prefixes & PREFIX_DATA);
6231                 }
6232             }
6233           else
6234             {
6235               if (l != 1 || len != 2 || last[0] != 'L')
6236                 {
6237                   SAVE_LAST (*p);
6238                   break;
6239                 }
6240               if (intel_syntax
6241                   || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
6242                 break;
6243               if ((rex & REX_W))
6244                 {
6245                   USED_REX (REX_W);
6246                   *obufp++ = 'q';
6247                 }
6248               else
6249                 *obufp++ = 'l';
6250             }
6251           break;
6252         case 'R':
6253           USED_REX (REX_W);
6254           if (rex & REX_W)
6255             *obufp++ = 'q';
6256           else if (sizeflag & DFLAG)
6257             {
6258               if (intel_syntax)
6259                   *obufp++ = 'd';
6260               else
6261                   *obufp++ = 'l';
6262             }
6263           else
6264             *obufp++ = 'w';
6265           if (intel_syntax && !p[1]
6266               && ((rex & REX_W) || (sizeflag & DFLAG)))
6267             *obufp++ = 'e';
6268           if (!(rex & REX_W))
6269             used_prefixes |= (prefixes & PREFIX_DATA);
6270           break;
6271         case 'V':
6272           if (intel_syntax)
6273             break;
6274           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6275             {
6276               if (sizeflag & SUFFIX_ALWAYS)
6277                 *obufp++ = 'q';
6278               break;
6279             }
6280           /* Fall through.  */
6281         case 'S':
6282           if (intel_syntax)
6283             break;
6284           if (sizeflag & SUFFIX_ALWAYS)
6285             {
6286               if (rex & REX_W)
6287                 *obufp++ = 'q';
6288               else
6289                 {
6290                   if (sizeflag & DFLAG)
6291                     *obufp++ = 'l';
6292                   else
6293                     *obufp++ = 'w';
6294                   used_prefixes |= (prefixes & PREFIX_DATA);
6295                 }
6296             }
6297           break;
6298         case 'X':
6299           if (prefixes & PREFIX_DATA)
6300             *obufp++ = 'd';
6301           else
6302             *obufp++ = 's';
6303           used_prefixes |= (prefixes & PREFIX_DATA);
6304           break;
6305         case 'Y':
6306           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
6307             break;
6308           if (rex & REX_W)
6309             {
6310               USED_REX (REX_W);
6311               *obufp++ = 'q';
6312             }
6313           break;
6314           /* implicit operand size 'l' for i386 or 'q' for x86-64 */
6315         case 'W':
6316           /* operand size flag for cwtl, cbtw */
6317           USED_REX (REX_W);
6318           if (rex & REX_W)
6319             {
6320               if (intel_syntax)
6321                 *obufp++ = 'd';
6322               else
6323                 *obufp++ = 'l';
6324             }
6325           else if (sizeflag & DFLAG)
6326             *obufp++ = 'w';
6327           else
6328             *obufp++ = 'b';
6329           if (!(rex & REX_W))
6330             used_prefixes |= (prefixes & PREFIX_DATA);
6331           break;
6332         }
6333       alt = 0;
6334     }
6335   *obufp = 0;
6336   return 0;
6337 }
6338
6339 static void
6340 oappend (const char *s)
6341 {
6342   strcpy (obufp, s);
6343   obufp += strlen (s);
6344 }
6345
6346 static void
6347 append_seg (void)
6348 {
6349   if (prefixes & PREFIX_CS)
6350     {
6351       used_prefixes |= PREFIX_CS;
6352       oappend ("%cs:" + intel_syntax);
6353     }
6354   if (prefixes & PREFIX_DS)
6355     {
6356       used_prefixes |= PREFIX_DS;
6357       oappend ("%ds:" + intel_syntax);
6358     }
6359   if (prefixes & PREFIX_SS)
6360     {
6361       used_prefixes |= PREFIX_SS;
6362       oappend ("%ss:" + intel_syntax);
6363     }
6364   if (prefixes & PREFIX_ES)
6365     {
6366       used_prefixes |= PREFIX_ES;
6367       oappend ("%es:" + intel_syntax);
6368     }
6369   if (prefixes & PREFIX_FS)
6370     {
6371       used_prefixes |= PREFIX_FS;
6372       oappend ("%fs:" + intel_syntax);
6373     }
6374   if (prefixes & PREFIX_GS)
6375     {
6376       used_prefixes |= PREFIX_GS;
6377       oappend ("%gs:" + intel_syntax);
6378     }
6379 }
6380
6381 static void
6382 OP_indirE (int bytemode, int sizeflag)
6383 {
6384   if (!intel_syntax)
6385     oappend ("*");
6386   OP_E (bytemode, sizeflag);
6387 }
6388
6389 static void
6390 print_operand_value (char *buf, int hex, bfd_vma disp)
6391 {
6392   if (address_mode == mode_64bit)
6393     {
6394       if (hex)
6395         {
6396           char tmp[30];
6397           int i;
6398           buf[0] = '0';
6399           buf[1] = 'x';
6400           sprintf_vma (tmp, disp);
6401           for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
6402           strcpy (buf + 2, tmp + i);
6403         }
6404       else
6405         {
6406           bfd_signed_vma v = disp;
6407           char tmp[30];
6408           int i;
6409           if (v < 0)
6410             {
6411               *(buf++) = '-';
6412               v = -disp;
6413               /* Check for possible overflow on 0x8000000000000000.  */
6414               if (v < 0)
6415                 {
6416                   strcpy (buf, "9223372036854775808");
6417                   return;
6418                 }
6419             }
6420           if (!v)
6421             {
6422               strcpy (buf, "0");
6423               return;
6424             }
6425
6426           i = 0;
6427           tmp[29] = 0;
6428           while (v)
6429             {
6430               tmp[28 - i] = (v % 10) + '0';
6431               v /= 10;
6432               i++;
6433             }
6434           strcpy (buf, tmp + 29 - i);
6435         }
6436     }
6437   else
6438     {
6439       if (hex)
6440         sprintf (buf, "0x%x", (unsigned int) disp);
6441       else
6442         sprintf (buf, "%d", (int) disp);
6443     }
6444 }
6445
6446 /* Put DISP in BUF as signed hex number.  */
6447
6448 static void
6449 print_displacement (char *buf, bfd_vma disp)
6450 {
6451   bfd_signed_vma val = disp;
6452   char tmp[30];
6453   int i, j = 0;
6454
6455   if (val < 0)
6456     {
6457       buf[j++] = '-';
6458       val = -disp;
6459
6460       /* Check for possible overflow.  */
6461       if (val < 0)
6462         {
6463           switch (address_mode)
6464             {
6465             case mode_64bit:
6466               strcpy (buf + j, "0x8000000000000000");
6467               break;
6468             case mode_32bit:
6469               strcpy (buf + j, "0x80000000");
6470               break;
6471             case mode_16bit:
6472               strcpy (buf + j, "0x8000");
6473               break;
6474             }
6475           return;
6476         }
6477     }
6478
6479   buf[j++] = '0';
6480   buf[j++] = 'x';
6481
6482   sprintf_vma (tmp, val);
6483   for (i = 0; tmp[i] == '0'; i++)
6484     continue;
6485   if (tmp[i] == '\0')
6486     i--;
6487   strcpy (buf + j, tmp + i);
6488 }
6489
6490 static void
6491 intel_operand_size (int bytemode, int sizeflag)
6492 {
6493   switch (bytemode)
6494     {
6495     case b_mode:
6496     case dqb_mode:
6497       oappend ("BYTE PTR ");
6498       break;
6499     case w_mode:
6500     case dqw_mode:
6501       oappend ("WORD PTR ");
6502       break;
6503     case stack_v_mode:
6504       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6505         {
6506           oappend ("QWORD PTR ");
6507           used_prefixes |= (prefixes & PREFIX_DATA);
6508           break;
6509         }
6510       /* FALLTHRU */
6511     case v_mode:
6512     case dq_mode:
6513       USED_REX (REX_W);
6514       if (rex & REX_W)
6515         oappend ("QWORD PTR ");
6516       else if ((sizeflag & DFLAG) || bytemode == dq_mode)
6517         oappend ("DWORD PTR ");
6518       else
6519         oappend ("WORD PTR ");
6520       used_prefixes |= (prefixes & PREFIX_DATA);
6521       break;
6522     case z_mode:
6523       if ((rex & REX_W) || (sizeflag & DFLAG))
6524         *obufp++ = 'D';
6525       oappend ("WORD PTR ");
6526       if (!(rex & REX_W))
6527         used_prefixes |= (prefixes & PREFIX_DATA);
6528       break;
6529     case d_mode:
6530     case dqd_mode:
6531       oappend ("DWORD PTR ");
6532       break;
6533     case q_mode:
6534       oappend ("QWORD PTR ");
6535       break;
6536     case m_mode:
6537       if (address_mode == mode_64bit)
6538         oappend ("QWORD PTR ");
6539       else
6540         oappend ("DWORD PTR ");
6541       break;
6542     case f_mode:
6543       if (sizeflag & DFLAG)
6544         oappend ("FWORD PTR ");
6545       else
6546         oappend ("DWORD PTR ");
6547       used_prefixes |= (prefixes & PREFIX_DATA);
6548       break;
6549     case t_mode:
6550       oappend ("TBYTE PTR ");
6551       break;
6552     case x_mode:
6553       oappend ("XMMWORD PTR ");
6554       break;
6555     case o_mode:
6556       oappend ("OWORD PTR ");
6557       break;
6558     default:
6559       break;
6560     }
6561 }
6562
6563 static void
6564 OP_E_extended (int bytemode, int sizeflag, int has_drex)
6565 {
6566   bfd_vma disp;
6567   int add = 0;
6568   int riprel = 0;
6569   USED_REX (REX_B);
6570   if (rex & REX_B)
6571     add += 8;
6572
6573   /* Skip mod/rm byte.  */
6574   MODRM_CHECK;
6575   codep++;
6576
6577   if (modrm.mod == 3)
6578     {
6579       switch (bytemode)
6580         {
6581         case b_mode:
6582           USED_REX (0);
6583           if (rex)
6584             oappend (names8rex[modrm.rm + add]);
6585           else
6586             oappend (names8[modrm.rm + add]);
6587           break;
6588         case w_mode:
6589           oappend (names16[modrm.rm + add]);
6590           break;
6591         case d_mode:
6592           oappend (names32[modrm.rm + add]);
6593           break;
6594         case q_mode:
6595           oappend (names64[modrm.rm + add]);
6596           break;
6597         case m_mode:
6598           if (address_mode == mode_64bit)
6599             oappend (names64[modrm.rm + add]);
6600           else
6601             oappend (names32[modrm.rm + add]);
6602           break;
6603         case stack_v_mode:
6604           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6605             {
6606               oappend (names64[modrm.rm + add]);
6607               used_prefixes |= (prefixes & PREFIX_DATA);
6608               break;
6609             }
6610           bytemode = v_mode;
6611           /* FALLTHRU */
6612         case v_mode:
6613         case dq_mode:
6614         case dqb_mode:
6615         case dqd_mode:
6616         case dqw_mode:
6617           USED_REX (REX_W);
6618           if (rex & REX_W)
6619             oappend (names64[modrm.rm + add]);
6620           else if ((sizeflag & DFLAG) || bytemode != v_mode)
6621             oappend (names32[modrm.rm + add]);
6622           else
6623             oappend (names16[modrm.rm + add]);
6624           used_prefixes |= (prefixes & PREFIX_DATA);
6625           break;
6626         case 0:
6627           break;
6628         default:
6629           oappend (INTERNAL_DISASSEMBLER_ERROR);
6630           break;
6631         }
6632       return;
6633     }
6634
6635   disp = 0;
6636   if (intel_syntax)
6637     intel_operand_size (bytemode, sizeflag);
6638   append_seg ();
6639
6640   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
6641     {
6642       /* 32/64 bit address mode */
6643       int havedisp;
6644       int havesib;
6645       int havebase;
6646       int haveindex;
6647       int needindex;
6648       int base;
6649       int index = 0;
6650       int scale = 0;
6651
6652       havesib = 0;
6653       havebase = 1;
6654       haveindex = 0;
6655       base = modrm.rm;
6656
6657       if (base == 4)
6658         {
6659           havesib = 1;
6660           FETCH_DATA (the_info, codep + 1);
6661           index = (*codep >> 3) & 7;
6662           scale = (*codep >> 6) & 3;
6663           base = *codep & 7;
6664           USED_REX (REX_X);
6665           if (rex & REX_X)
6666             index += 8;
6667           haveindex = index != 4;
6668           codep++;
6669         }
6670       base += add;
6671
6672       /* If we have a DREX byte, skip it now
6673          (it has already been handled) */
6674       if (has_drex)
6675         {
6676           FETCH_DATA (the_info, codep + 1);
6677           codep++;
6678         }
6679
6680       switch (modrm.mod)
6681         {
6682         case 0:
6683           if ((base & 7) == 5)
6684             {
6685               havebase = 0;
6686               if (address_mode == mode_64bit && !havesib)
6687                 riprel = 1;
6688               disp = get32s ();
6689             }
6690           break;
6691         case 1:
6692           FETCH_DATA (the_info, codep + 1);
6693           disp = *codep++;
6694           if ((disp & 0x80) != 0)
6695             disp -= 0x100;
6696           break;
6697         case 2:
6698           disp = get32s ();
6699           break;
6700         }
6701
6702       /* In 32bit mode, we need index register to tell [offset] from
6703          [eiz*1 + offset].  */
6704       needindex = (havesib
6705                    && !havebase
6706                    && !haveindex
6707                    && address_mode == mode_32bit);
6708       havedisp = (havebase
6709                   || needindex
6710                   || (havesib && (haveindex || scale != 0)));
6711
6712       if (!intel_syntax)
6713         if (modrm.mod != 0 || (base & 7) == 5)
6714           {
6715             if (havedisp || riprel)
6716               print_displacement (scratchbuf, disp);
6717             else
6718               print_operand_value (scratchbuf, 1, disp);
6719             oappend (scratchbuf);
6720             if (riprel)
6721               {
6722                 set_op (disp, 1);
6723                 oappend (sizeflag & AFLAG ? "(%rip)" : "(%eip)");
6724               }
6725           }
6726
6727       if (havebase || haveindex || riprel)
6728         used_prefixes |= PREFIX_ADDR;
6729
6730       if (havedisp || (intel_syntax && riprel))
6731         {
6732           *obufp++ = open_char;
6733           if (intel_syntax && riprel)
6734             {
6735               set_op (disp, 1);
6736               oappend (sizeflag & AFLAG ? "rip" : "eip");
6737             }
6738           *obufp = '\0';
6739           if (havebase)
6740             oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
6741                      ? names64[base] : names32[base]);
6742           if (havesib)
6743             {
6744               /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
6745                  print index to tell base + index from base.  */
6746               if (scale != 0
6747                   || needindex
6748                   || haveindex
6749                   || (havebase && base != ESP_REG_NUM))
6750                 {
6751                   if (!intel_syntax || havebase)
6752                     {
6753                       *obufp++ = separator_char;
6754                       *obufp = '\0';
6755                     }
6756                   if (haveindex)
6757                     oappend (address_mode == mode_64bit
6758                              && (sizeflag & AFLAG)
6759                              ? names64[index] : names32[index]);
6760                   else
6761                     oappend (address_mode == mode_64bit
6762                              && (sizeflag & AFLAG)
6763                              ? index64 : index32);
6764
6765                   *obufp++ = scale_char;
6766                   *obufp = '\0';
6767                   sprintf (scratchbuf, "%d", 1 << scale);
6768                   oappend (scratchbuf);
6769                 }
6770             }
6771           if (intel_syntax
6772               && (disp || modrm.mod != 0 || (base & 7) == 5))
6773             {
6774               if (!havedisp || (bfd_signed_vma) disp >= 0)
6775                 {
6776                   *obufp++ = '+';
6777                   *obufp = '\0';
6778                 }
6779               else if (modrm.mod != 1)
6780                 {
6781                   *obufp++ = '-';
6782                   *obufp = '\0';
6783                   disp = - (bfd_signed_vma) disp;
6784                 }
6785
6786               if (havedisp)
6787                 print_displacement (scratchbuf, disp);
6788               else
6789                 print_operand_value (scratchbuf, 1, disp);
6790               oappend (scratchbuf);
6791             }
6792
6793           *obufp++ = close_char;
6794           *obufp = '\0';
6795         }
6796       else if (intel_syntax)
6797         {
6798           if (modrm.mod != 0 || (base & 7) == 5)
6799             {
6800               if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6801                               | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6802                 ;
6803               else
6804                 {
6805                   oappend (names_seg[ds_reg - es_reg]);
6806                   oappend (":");
6807                 }
6808               print_operand_value (scratchbuf, 1, disp);
6809               oappend (scratchbuf);
6810             }
6811         }
6812     }
6813   else
6814     { /* 16 bit address mode */
6815       switch (modrm.mod)
6816         {
6817         case 0:
6818           if (modrm.rm == 6)
6819             {
6820               disp = get16 ();
6821               if ((disp & 0x8000) != 0)
6822                 disp -= 0x10000;
6823             }
6824           break;
6825         case 1:
6826           FETCH_DATA (the_info, codep + 1);
6827           disp = *codep++;
6828           if ((disp & 0x80) != 0)
6829             disp -= 0x100;
6830           break;
6831         case 2:
6832           disp = get16 ();
6833           if ((disp & 0x8000) != 0)
6834             disp -= 0x10000;
6835           break;
6836         }
6837
6838       if (!intel_syntax)
6839         if (modrm.mod != 0 || modrm.rm == 6)
6840           {
6841             print_displacement (scratchbuf, disp);
6842             oappend (scratchbuf);
6843           }
6844
6845       if (modrm.mod != 0 || modrm.rm != 6)
6846         {
6847           *obufp++ = open_char;
6848           *obufp = '\0';
6849           oappend (index16[modrm.rm]);
6850           if (intel_syntax
6851               && (disp || modrm.mod != 0 || modrm.rm == 6))
6852             {
6853               if ((bfd_signed_vma) disp >= 0)
6854                 {
6855                   *obufp++ = '+';
6856                   *obufp = '\0';
6857                 }
6858               else if (modrm.mod != 1)
6859                 {
6860                   *obufp++ = '-';
6861                   *obufp = '\0';
6862                   disp = - (bfd_signed_vma) disp;
6863                 }
6864
6865               print_displacement (scratchbuf, disp);
6866               oappend (scratchbuf);
6867             }
6868
6869           *obufp++ = close_char;
6870           *obufp = '\0';
6871         }
6872       else if (intel_syntax)
6873         {
6874           if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6875                           | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6876             ;
6877           else
6878             {
6879               oappend (names_seg[ds_reg - es_reg]);
6880               oappend (":");
6881             }
6882           print_operand_value (scratchbuf, 1, disp & 0xffff);
6883           oappend (scratchbuf);
6884         }
6885     }
6886 }
6887
6888 static void
6889 OP_E (int bytemode, int sizeflag)
6890 {
6891   OP_E_extended (bytemode, sizeflag, 0);
6892 }
6893
6894
6895 static void
6896 OP_G (int bytemode, int sizeflag)
6897 {
6898   int add = 0;
6899   USED_REX (REX_R);
6900   if (rex & REX_R)
6901     add += 8;
6902   switch (bytemode)
6903     {
6904     case b_mode:
6905       USED_REX (0);
6906       if (rex)
6907         oappend (names8rex[modrm.reg + add]);
6908       else
6909         oappend (names8[modrm.reg + add]);
6910       break;
6911     case w_mode:
6912       oappend (names16[modrm.reg + add]);
6913       break;
6914     case d_mode:
6915       oappend (names32[modrm.reg + add]);
6916       break;
6917     case q_mode:
6918       oappend (names64[modrm.reg + add]);
6919       break;
6920     case v_mode:
6921     case dq_mode:
6922     case dqb_mode:
6923     case dqd_mode:
6924     case dqw_mode:
6925       USED_REX (REX_W);
6926       if (rex & REX_W)
6927         oappend (names64[modrm.reg + add]);
6928       else if ((sizeflag & DFLAG) || bytemode != v_mode)
6929         oappend (names32[modrm.reg + add]);
6930       else
6931         oappend (names16[modrm.reg + add]);
6932       used_prefixes |= (prefixes & PREFIX_DATA);
6933       break;
6934     case m_mode:
6935       if (address_mode == mode_64bit)
6936         oappend (names64[modrm.reg + add]);
6937       else
6938         oappend (names32[modrm.reg + add]);
6939       break;
6940     default:
6941       oappend (INTERNAL_DISASSEMBLER_ERROR);
6942       break;
6943     }
6944 }
6945
6946 static bfd_vma
6947 get64 (void)
6948 {
6949   bfd_vma x;
6950 #ifdef BFD64
6951   unsigned int a;
6952   unsigned int b;
6953
6954   FETCH_DATA (the_info, codep + 8);
6955   a = *codep++ & 0xff;
6956   a |= (*codep++ & 0xff) << 8;
6957   a |= (*codep++ & 0xff) << 16;
6958   a |= (*codep++ & 0xff) << 24;
6959   b = *codep++ & 0xff;
6960   b |= (*codep++ & 0xff) << 8;
6961   b |= (*codep++ & 0xff) << 16;
6962   b |= (*codep++ & 0xff) << 24;
6963   x = a + ((bfd_vma) b << 32);
6964 #else
6965   abort ();
6966   x = 0;
6967 #endif
6968   return x;
6969 }
6970
6971 static bfd_signed_vma
6972 get32 (void)
6973 {
6974   bfd_signed_vma x = 0;
6975
6976   FETCH_DATA (the_info, codep + 4);
6977   x = *codep++ & (bfd_signed_vma) 0xff;
6978   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6979   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6980   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6981   return x;
6982 }
6983
6984 static bfd_signed_vma
6985 get32s (void)
6986 {
6987   bfd_signed_vma x = 0;
6988
6989   FETCH_DATA (the_info, codep + 4);
6990   x = *codep++ & (bfd_signed_vma) 0xff;
6991   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6992   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6993   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6994
6995   x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
6996
6997   return x;
6998 }
6999
7000 static int
7001 get16 (void)
7002 {
7003   int x = 0;
7004
7005   FETCH_DATA (the_info, codep + 2);
7006   x = *codep++ & 0xff;
7007   x |= (*codep++ & 0xff) << 8;
7008   return x;
7009 }
7010
7011 static void
7012 set_op (bfd_vma op, int riprel)
7013 {
7014   op_index[op_ad] = op_ad;
7015   if (address_mode == mode_64bit)
7016     {
7017       op_address[op_ad] = op;
7018       op_riprel[op_ad] = riprel;
7019     }
7020   else
7021     {
7022       /* Mask to get a 32-bit address.  */
7023       op_address[op_ad] = op & 0xffffffff;
7024       op_riprel[op_ad] = riprel & 0xffffffff;
7025     }
7026 }
7027
7028 static void
7029 OP_REG (int code, int sizeflag)
7030 {
7031   const char *s;
7032   int add;
7033   USED_REX (REX_B);
7034   if (rex & REX_B)
7035     add = 8;
7036   else
7037     add = 0;
7038
7039   switch (code)
7040     {
7041     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
7042     case sp_reg: case bp_reg: case si_reg: case di_reg:
7043       s = names16[code - ax_reg + add];
7044       break;
7045     case es_reg: case ss_reg: case cs_reg:
7046     case ds_reg: case fs_reg: case gs_reg:
7047       s = names_seg[code - es_reg + add];
7048       break;
7049     case al_reg: case ah_reg: case cl_reg: case ch_reg:
7050     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
7051       USED_REX (0);
7052       if (rex)
7053         s = names8rex[code - al_reg + add];
7054       else
7055         s = names8[code - al_reg];
7056       break;
7057     case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
7058     case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
7059       if (address_mode == mode_64bit && (sizeflag & DFLAG))
7060         {
7061           s = names64[code - rAX_reg + add];
7062           break;
7063         }
7064       code += eAX_reg - rAX_reg;
7065       /* Fall through.  */
7066     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
7067     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
7068       USED_REX (REX_W);
7069       if (rex & REX_W)
7070         s = names64[code - eAX_reg + add];
7071       else if (sizeflag & DFLAG)
7072         s = names32[code - eAX_reg + add];
7073       else
7074         s = names16[code - eAX_reg + add];
7075       used_prefixes |= (prefixes & PREFIX_DATA);
7076       break;
7077     default:
7078       s = INTERNAL_DISASSEMBLER_ERROR;
7079       break;
7080     }
7081   oappend (s);
7082 }
7083
7084 static void
7085 OP_IMREG (int code, int sizeflag)
7086 {
7087   const char *s;
7088
7089   switch (code)
7090     {
7091     case indir_dx_reg:
7092       if (intel_syntax)
7093         s = "dx";
7094       else
7095         s = "(%dx)";
7096       break;
7097     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
7098     case sp_reg: case bp_reg: case si_reg: case di_reg:
7099       s = names16[code - ax_reg];
7100       break;
7101     case es_reg: case ss_reg: case cs_reg:
7102     case ds_reg: case fs_reg: case gs_reg:
7103       s = names_seg[code - es_reg];
7104       break;
7105     case al_reg: case ah_reg: case cl_reg: case ch_reg:
7106     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
7107       USED_REX (0);
7108       if (rex)
7109         s = names8rex[code - al_reg];
7110       else
7111         s = names8[code - al_reg];
7112       break;
7113     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
7114     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
7115       USED_REX (REX_W);
7116       if (rex & REX_W)
7117         s = names64[code - eAX_reg];
7118       else if (sizeflag & DFLAG)
7119         s = names32[code - eAX_reg];
7120       else
7121         s = names16[code - eAX_reg];
7122       used_prefixes |= (prefixes & PREFIX_DATA);
7123       break;
7124     case z_mode_ax_reg:
7125       if ((rex & REX_W) || (sizeflag & DFLAG))
7126         s = *names32;
7127       else
7128         s = *names16;
7129       if (!(rex & REX_W))
7130         used_prefixes |= (prefixes & PREFIX_DATA);
7131       break;
7132     default:
7133       s = INTERNAL_DISASSEMBLER_ERROR;
7134       break;
7135     }
7136   oappend (s);
7137 }
7138
7139 static void
7140 OP_I (int bytemode, int sizeflag)
7141 {
7142   bfd_signed_vma op;
7143   bfd_signed_vma mask = -1;
7144
7145   switch (bytemode)
7146     {
7147     case b_mode:
7148       FETCH_DATA (the_info, codep + 1);
7149       op = *codep++;
7150       mask = 0xff;
7151       break;
7152     case q_mode:
7153       if (address_mode == mode_64bit)
7154         {
7155           op = get32s ();
7156           break;
7157         }
7158       /* Fall through.  */
7159     case v_mode:
7160       USED_REX (REX_W);
7161       if (rex & REX_W)
7162         op = get32s ();
7163       else if (sizeflag & DFLAG)
7164         {
7165           op = get32 ();
7166           mask = 0xffffffff;
7167         }
7168       else
7169         {
7170           op = get16 ();
7171           mask = 0xfffff;
7172         }
7173       used_prefixes |= (prefixes & PREFIX_DATA);
7174       break;
7175     case w_mode:
7176       mask = 0xfffff;
7177       op = get16 ();
7178       break;
7179     case const_1_mode:
7180       if (intel_syntax)
7181         oappend ("1");
7182       return;
7183     default:
7184       oappend (INTERNAL_DISASSEMBLER_ERROR);
7185       return;
7186     }
7187
7188   op &= mask;
7189   scratchbuf[0] = '$';
7190   print_operand_value (scratchbuf + 1, 1, op);
7191   oappend (scratchbuf + intel_syntax);
7192   scratchbuf[0] = '\0';
7193 }
7194
7195 static void
7196 OP_I64 (int bytemode, int sizeflag)
7197 {
7198   bfd_signed_vma op;
7199   bfd_signed_vma mask = -1;
7200
7201   if (address_mode != mode_64bit)
7202     {
7203       OP_I (bytemode, sizeflag);
7204       return;
7205     }
7206
7207   switch (bytemode)
7208     {
7209     case b_mode:
7210       FETCH_DATA (the_info, codep + 1);
7211       op = *codep++;
7212       mask = 0xff;
7213       break;
7214     case v_mode:
7215       USED_REX (REX_W);
7216       if (rex & REX_W)
7217         op = get64 ();
7218       else if (sizeflag & DFLAG)
7219         {
7220           op = get32 ();
7221           mask = 0xffffffff;
7222         }
7223       else
7224         {
7225           op = get16 ();
7226           mask = 0xfffff;
7227         }
7228       used_prefixes |= (prefixes & PREFIX_DATA);
7229       break;
7230     case w_mode:
7231       mask = 0xfffff;
7232       op = get16 ();
7233       break;
7234     default:
7235       oappend (INTERNAL_DISASSEMBLER_ERROR);
7236       return;
7237     }
7238
7239   op &= mask;
7240   scratchbuf[0] = '$';
7241   print_operand_value (scratchbuf + 1, 1, op);
7242   oappend (scratchbuf + intel_syntax);
7243   scratchbuf[0] = '\0';
7244 }
7245
7246 static void
7247 OP_sI (int bytemode, int sizeflag)
7248 {
7249   bfd_signed_vma op;
7250   bfd_signed_vma mask = -1;
7251
7252   switch (bytemode)
7253     {
7254     case b_mode:
7255       FETCH_DATA (the_info, codep + 1);
7256       op = *codep++;
7257       if ((op & 0x80) != 0)
7258         op -= 0x100;
7259       mask = 0xffffffff;
7260       break;
7261     case v_mode:
7262       USED_REX (REX_W);
7263       if (rex & REX_W)
7264         op = get32s ();
7265       else if (sizeflag & DFLAG)
7266         {
7267           op = get32s ();
7268           mask = 0xffffffff;
7269         }
7270       else
7271         {
7272           mask = 0xffffffff;
7273           op = get16 ();
7274           if ((op & 0x8000) != 0)
7275             op -= 0x10000;
7276         }
7277       used_prefixes |= (prefixes & PREFIX_DATA);
7278       break;
7279     case w_mode:
7280       op = get16 ();
7281       mask = 0xffffffff;
7282       if ((op & 0x8000) != 0)
7283         op -= 0x10000;
7284       break;
7285     default:
7286       oappend (INTERNAL_DISASSEMBLER_ERROR);
7287       return;
7288     }
7289
7290   scratchbuf[0] = '$';
7291   print_operand_value (scratchbuf + 1, 1, op);
7292   oappend (scratchbuf + intel_syntax);
7293 }
7294
7295 static void
7296 OP_J (int bytemode, int sizeflag)
7297 {
7298   bfd_vma disp;
7299   bfd_vma mask = -1;
7300   bfd_vma segment = 0;
7301
7302   switch (bytemode)
7303     {
7304     case b_mode:
7305       FETCH_DATA (the_info, codep + 1);
7306       disp = *codep++;
7307       if ((disp & 0x80) != 0)
7308         disp -= 0x100;
7309       break;
7310     case v_mode:
7311       if ((sizeflag & DFLAG) || (rex & REX_W))
7312         disp = get32s ();
7313       else
7314         {
7315           disp = get16 ();
7316           if ((disp & 0x8000) != 0)
7317             disp -= 0x10000;
7318           /* In 16bit mode, address is wrapped around at 64k within
7319              the same segment.  Otherwise, a data16 prefix on a jump
7320              instruction means that the pc is masked to 16 bits after
7321              the displacement is added!  */
7322           mask = 0xffff;
7323           if ((prefixes & PREFIX_DATA) == 0)
7324             segment = ((start_pc + codep - start_codep)
7325                        & ~((bfd_vma) 0xffff));
7326         }
7327       used_prefixes |= (prefixes & PREFIX_DATA);
7328       break;
7329     default:
7330       oappend (INTERNAL_DISASSEMBLER_ERROR);
7331       return;
7332     }
7333   disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
7334   set_op (disp, 0);
7335   print_operand_value (scratchbuf, 1, disp);
7336   oappend (scratchbuf);
7337 }
7338
7339 static void
7340 OP_SEG (int bytemode, int sizeflag)
7341 {
7342   if (bytemode == w_mode)
7343     oappend (names_seg[modrm.reg]);
7344   else
7345     OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
7346 }
7347
7348 static void
7349 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
7350 {
7351   int seg, offset;
7352
7353   if (sizeflag & DFLAG)
7354     {
7355       offset = get32 ();
7356       seg = get16 ();
7357     }
7358   else
7359     {
7360       offset = get16 ();
7361       seg = get16 ();
7362     }
7363   used_prefixes |= (prefixes & PREFIX_DATA);
7364   if (intel_syntax)
7365     sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
7366   else
7367     sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
7368   oappend (scratchbuf);
7369 }
7370
7371 static void
7372 OP_OFF (int bytemode, int sizeflag)
7373 {
7374   bfd_vma off;
7375
7376   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7377     intel_operand_size (bytemode, sizeflag);
7378   append_seg ();
7379
7380   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
7381     off = get32 ();
7382   else
7383     off = get16 ();
7384
7385   if (intel_syntax)
7386     {
7387       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7388                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7389         {
7390           oappend (names_seg[ds_reg - es_reg]);
7391           oappend (":");
7392         }
7393     }
7394   print_operand_value (scratchbuf, 1, off);
7395   oappend (scratchbuf);
7396 }
7397
7398 static void
7399 OP_OFF64 (int bytemode, int sizeflag)
7400 {
7401   bfd_vma off;
7402
7403   if (address_mode != mode_64bit
7404       || (prefixes & PREFIX_ADDR))
7405     {
7406       OP_OFF (bytemode, sizeflag);
7407       return;
7408     }
7409
7410   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7411     intel_operand_size (bytemode, sizeflag);
7412   append_seg ();
7413
7414   off = get64 ();
7415
7416   if (intel_syntax)
7417     {
7418       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7419                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7420         {
7421           oappend (names_seg[ds_reg - es_reg]);
7422           oappend (":");
7423         }
7424     }
7425   print_operand_value (scratchbuf, 1, off);
7426   oappend (scratchbuf);
7427 }
7428
7429 static void
7430 ptr_reg (int code, int sizeflag)
7431 {
7432   const char *s;
7433
7434   *obufp++ = open_char;
7435   used_prefixes |= (prefixes & PREFIX_ADDR);
7436   if (address_mode == mode_64bit)
7437     {
7438       if (!(sizeflag & AFLAG))
7439         s = names32[code - eAX_reg];
7440       else
7441         s = names64[code - eAX_reg];
7442     }
7443   else if (sizeflag & AFLAG)
7444     s = names32[code - eAX_reg];
7445   else
7446     s = names16[code - eAX_reg];
7447   oappend (s);
7448   *obufp++ = close_char;
7449   *obufp = 0;
7450 }
7451
7452 static void
7453 OP_ESreg (int code, int sizeflag)
7454 {
7455   if (intel_syntax)
7456     {
7457       switch (codep[-1])
7458         {
7459         case 0x6d:      /* insw/insl */
7460           intel_operand_size (z_mode, sizeflag);
7461           break;
7462         case 0xa5:      /* movsw/movsl/movsq */
7463         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7464         case 0xab:      /* stosw/stosl */
7465         case 0xaf:      /* scasw/scasl */
7466           intel_operand_size (v_mode, sizeflag);
7467           break;
7468         default:
7469           intel_operand_size (b_mode, sizeflag);
7470         }
7471     }
7472   oappend ("%es:" + intel_syntax);
7473   ptr_reg (code, sizeflag);
7474 }
7475
7476 static void
7477 OP_DSreg (int code, int sizeflag)
7478 {
7479   if (intel_syntax)
7480     {
7481       switch (codep[-1])
7482         {
7483         case 0x6f:      /* outsw/outsl */
7484           intel_operand_size (z_mode, sizeflag);
7485           break;
7486         case 0xa5:      /* movsw/movsl/movsq */
7487         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7488         case 0xad:      /* lodsw/lodsl/lodsq */
7489           intel_operand_size (v_mode, sizeflag);
7490           break;
7491         default:
7492           intel_operand_size (b_mode, sizeflag);
7493         }
7494     }
7495   if ((prefixes
7496        & (PREFIX_CS
7497           | PREFIX_DS
7498           | PREFIX_SS
7499           | PREFIX_ES
7500           | PREFIX_FS
7501           | PREFIX_GS)) == 0)
7502     prefixes |= PREFIX_DS;
7503   append_seg ();
7504   ptr_reg (code, sizeflag);
7505 }
7506
7507 static void
7508 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7509 {
7510   int add;
7511   if (rex & REX_R)
7512     {
7513       USED_REX (REX_R);
7514       add = 8;
7515     }
7516   else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
7517     {
7518       lock_prefix = NULL;
7519       used_prefixes |= PREFIX_LOCK;
7520       add = 8;
7521     }
7522   else
7523     add = 0;
7524   sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
7525   oappend (scratchbuf + intel_syntax);
7526 }
7527
7528 static void
7529 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7530 {
7531   int add;
7532   USED_REX (REX_R);
7533   if (rex & REX_R)
7534     add = 8;
7535   else
7536     add = 0;
7537   if (intel_syntax)
7538     sprintf (scratchbuf, "db%d", modrm.reg + add);
7539   else
7540     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
7541   oappend (scratchbuf);
7542 }
7543
7544 static void
7545 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7546 {
7547   sprintf (scratchbuf, "%%tr%d", modrm.reg);
7548   oappend (scratchbuf + intel_syntax);
7549 }
7550
7551 static void
7552 OP_R (int bytemode, int sizeflag)
7553 {
7554   if (modrm.mod == 3)
7555     OP_E (bytemode, sizeflag);
7556   else
7557     BadOp ();
7558 }
7559
7560 static void
7561 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7562 {
7563   used_prefixes |= (prefixes & PREFIX_DATA);
7564   if (prefixes & PREFIX_DATA)
7565     {
7566       int add;
7567       USED_REX (REX_R);
7568       if (rex & REX_R)
7569         add = 8;
7570       else
7571         add = 0;
7572       sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7573     }
7574   else
7575     sprintf (scratchbuf, "%%mm%d", modrm.reg);
7576   oappend (scratchbuf + intel_syntax);
7577 }
7578
7579 static void
7580 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7581 {
7582   int add;
7583   USED_REX (REX_R);
7584   if (rex & REX_R)
7585     add = 8;
7586   else
7587     add = 0;
7588   sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7589   oappend (scratchbuf + intel_syntax);
7590 }
7591
7592 static void
7593 OP_EM (int bytemode, int sizeflag)
7594 {
7595   if (modrm.mod != 3)
7596     {
7597       if (intel_syntax && bytemode == v_mode)
7598         {
7599           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7600           used_prefixes |= (prefixes & PREFIX_DATA);
7601         }
7602       OP_E (bytemode, sizeflag);
7603       return;
7604     }
7605
7606   /* Skip mod/rm byte.  */
7607   MODRM_CHECK;
7608   codep++;
7609   used_prefixes |= (prefixes & PREFIX_DATA);
7610   if (prefixes & PREFIX_DATA)
7611     {
7612       int add;
7613
7614       USED_REX (REX_B);
7615       if (rex & REX_B)
7616         add = 8;
7617       else
7618         add = 0;
7619       sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7620     }
7621   else
7622     sprintf (scratchbuf, "%%mm%d", modrm.rm);
7623   oappend (scratchbuf + intel_syntax);
7624 }
7625
7626 /* cvt* are the only instructions in sse2 which have
7627    both SSE and MMX operands and also have 0x66 prefix
7628    in their opcode. 0x66 was originally used to differentiate
7629    between SSE and MMX instruction(operands). So we have to handle the
7630    cvt* separately using OP_EMC and OP_MXC */
7631 static void
7632 OP_EMC (int bytemode, int sizeflag)
7633 {
7634   if (modrm.mod != 3)
7635     {
7636       if (intel_syntax && bytemode == v_mode)
7637         {
7638           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7639           used_prefixes |= (prefixes & PREFIX_DATA);
7640         }
7641       OP_E (bytemode, sizeflag);
7642       return;
7643     }
7644
7645   /* Skip mod/rm byte.  */
7646   MODRM_CHECK;
7647   codep++;
7648   used_prefixes |= (prefixes & PREFIX_DATA);
7649   sprintf (scratchbuf, "%%mm%d", modrm.rm);
7650   oappend (scratchbuf + intel_syntax);
7651 }
7652
7653 static void
7654 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7655 {
7656   used_prefixes |= (prefixes & PREFIX_DATA);
7657   sprintf (scratchbuf, "%%mm%d", modrm.reg);
7658   oappend (scratchbuf + intel_syntax);
7659 }
7660
7661 static void
7662 OP_EX (int bytemode, int sizeflag)
7663 {
7664   int add;
7665   if (modrm.mod != 3)
7666     {
7667       OP_E (bytemode, sizeflag);
7668       return;
7669     }
7670   USED_REX (REX_B);
7671   if (rex & REX_B)
7672     add = 8;
7673   else
7674     add = 0;
7675
7676   /* Skip mod/rm byte.  */
7677   MODRM_CHECK;
7678   codep++;
7679   sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7680   oappend (scratchbuf + intel_syntax);
7681 }
7682
7683 static void
7684 OP_MS (int bytemode, int sizeflag)
7685 {
7686   if (modrm.mod == 3)
7687     OP_EM (bytemode, sizeflag);
7688   else
7689     BadOp ();
7690 }
7691
7692 static void
7693 OP_XS (int bytemode, int sizeflag)
7694 {
7695   if (modrm.mod == 3)
7696     OP_EX (bytemode, sizeflag);
7697   else
7698     BadOp ();
7699 }
7700
7701 static void
7702 OP_M (int bytemode, int sizeflag)
7703 {
7704   if (modrm.mod == 3)
7705     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
7706     BadOp ();
7707   else
7708     OP_E (bytemode, sizeflag);
7709 }
7710
7711 static void
7712 OP_0f07 (int bytemode, int sizeflag)
7713 {
7714   if (modrm.mod != 3 || modrm.rm != 0)
7715     BadOp ();
7716   else
7717     OP_E (bytemode, sizeflag);
7718 }
7719
7720 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
7721    32bit mode and "xchg %rax,%rax" in 64bit mode.  */
7722
7723 static void
7724 NOP_Fixup1 (int bytemode, int sizeflag)
7725 {
7726   if ((prefixes & PREFIX_DATA) != 0
7727       || (rex != 0
7728           && rex != 0x48
7729           && address_mode == mode_64bit))
7730     OP_REG (bytemode, sizeflag);
7731   else
7732     strcpy (obuf, "nop");
7733 }
7734
7735 static void
7736 NOP_Fixup2 (int bytemode, int sizeflag)
7737 {
7738   if ((prefixes & PREFIX_DATA) != 0
7739       || (rex != 0
7740           && rex != 0x48
7741           && address_mode == mode_64bit))
7742     OP_IMREG (bytemode, sizeflag);
7743 }
7744
7745 static const char *const Suffix3DNow[] = {
7746 /* 00 */        NULL,           NULL,           NULL,           NULL,
7747 /* 04 */        NULL,           NULL,           NULL,           NULL,
7748 /* 08 */        NULL,           NULL,           NULL,           NULL,
7749 /* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
7750 /* 10 */        NULL,           NULL,           NULL,           NULL,
7751 /* 14 */        NULL,           NULL,           NULL,           NULL,
7752 /* 18 */        NULL,           NULL,           NULL,           NULL,
7753 /* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
7754 /* 20 */        NULL,           NULL,           NULL,           NULL,
7755 /* 24 */        NULL,           NULL,           NULL,           NULL,
7756 /* 28 */        NULL,           NULL,           NULL,           NULL,
7757 /* 2C */        NULL,           NULL,           NULL,           NULL,
7758 /* 30 */        NULL,           NULL,           NULL,           NULL,
7759 /* 34 */        NULL,           NULL,           NULL,           NULL,
7760 /* 38 */        NULL,           NULL,           NULL,           NULL,
7761 /* 3C */        NULL,           NULL,           NULL,           NULL,
7762 /* 40 */        NULL,           NULL,           NULL,           NULL,
7763 /* 44 */        NULL,           NULL,           NULL,           NULL,
7764 /* 48 */        NULL,           NULL,           NULL,           NULL,
7765 /* 4C */        NULL,           NULL,           NULL,           NULL,
7766 /* 50 */        NULL,           NULL,           NULL,           NULL,
7767 /* 54 */        NULL,           NULL,           NULL,           NULL,
7768 /* 58 */        NULL,           NULL,           NULL,           NULL,
7769 /* 5C */        NULL,           NULL,           NULL,           NULL,
7770 /* 60 */        NULL,           NULL,           NULL,           NULL,
7771 /* 64 */        NULL,           NULL,           NULL,           NULL,
7772 /* 68 */        NULL,           NULL,           NULL,           NULL,
7773 /* 6C */        NULL,           NULL,           NULL,           NULL,
7774 /* 70 */        NULL,           NULL,           NULL,           NULL,
7775 /* 74 */        NULL,           NULL,           NULL,           NULL,
7776 /* 78 */        NULL,           NULL,           NULL,           NULL,
7777 /* 7C */        NULL,           NULL,           NULL,           NULL,
7778 /* 80 */        NULL,           NULL,           NULL,           NULL,
7779 /* 84 */        NULL,           NULL,           NULL,           NULL,
7780 /* 88 */        NULL,           NULL,           "pfnacc",       NULL,
7781 /* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
7782 /* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
7783 /* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
7784 /* 98 */        NULL,           NULL,           "pfsub",        NULL,
7785 /* 9C */        NULL,           NULL,           "pfadd",        NULL,
7786 /* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
7787 /* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
7788 /* A8 */        NULL,           NULL,           "pfsubr",       NULL,
7789 /* AC */        NULL,           NULL,           "pfacc",        NULL,
7790 /* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
7791 /* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
7792 /* B8 */        NULL,           NULL,           NULL,           "pswapd",
7793 /* BC */        NULL,           NULL,           NULL,           "pavgusb",
7794 /* C0 */        NULL,           NULL,           NULL,           NULL,
7795 /* C4 */        NULL,           NULL,           NULL,           NULL,
7796 /* C8 */        NULL,           NULL,           NULL,           NULL,
7797 /* CC */        NULL,           NULL,           NULL,           NULL,
7798 /* D0 */        NULL,           NULL,           NULL,           NULL,
7799 /* D4 */        NULL,           NULL,           NULL,           NULL,
7800 /* D8 */        NULL,           NULL,           NULL,           NULL,
7801 /* DC */        NULL,           NULL,           NULL,           NULL,
7802 /* E0 */        NULL,           NULL,           NULL,           NULL,
7803 /* E4 */        NULL,           NULL,           NULL,           NULL,
7804 /* E8 */        NULL,           NULL,           NULL,           NULL,
7805 /* EC */        NULL,           NULL,           NULL,           NULL,
7806 /* F0 */        NULL,           NULL,           NULL,           NULL,
7807 /* F4 */        NULL,           NULL,           NULL,           NULL,
7808 /* F8 */        NULL,           NULL,           NULL,           NULL,
7809 /* FC */        NULL,           NULL,           NULL,           NULL,
7810 };
7811
7812 static void
7813 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7814 {
7815   const char *mnemonic;
7816
7817   FETCH_DATA (the_info, codep + 1);
7818   /* AMD 3DNow! instructions are specified by an opcode suffix in the
7819      place where an 8-bit immediate would normally go.  ie. the last
7820      byte of the instruction.  */
7821   obufp = obuf + strlen (obuf);
7822   mnemonic = Suffix3DNow[*codep++ & 0xff];
7823   if (mnemonic)
7824     oappend (mnemonic);
7825   else
7826     {
7827       /* Since a variable sized modrm/sib chunk is between the start
7828          of the opcode (0x0f0f) and the opcode suffix, we need to do
7829          all the modrm processing first, and don't know until now that
7830          we have a bad opcode.  This necessitates some cleaning up.  */
7831       op_out[0][0] = '\0';
7832       op_out[1][0] = '\0';
7833       BadOp ();
7834     }
7835 }
7836
7837 static const char *simd_cmp_op[] = {
7838   "eq",
7839   "lt",
7840   "le",
7841   "unord",
7842   "neq",
7843   "nlt",
7844   "nle",
7845   "ord"
7846 };
7847
7848 static void
7849 CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7850 {
7851   unsigned int cmp_type;
7852
7853   FETCH_DATA (the_info, codep + 1);
7854   cmp_type = *codep++ & 0xff;
7855   if (cmp_type < 8)
7856     {
7857       char suffix [3];
7858       char *p = obuf + strlen (obuf) - 2;
7859       suffix[0] = p[0];
7860       suffix[1] = p[1];
7861       suffix[2] = '\0';
7862       sprintf (p, "%s%s", simd_cmp_op[cmp_type], suffix);
7863     }
7864   else
7865     {
7866       /* We have a reserved extension byte.  Output it directly.  */
7867       scratchbuf[0] = '$';
7868       print_operand_value (scratchbuf + 1, 1, cmp_type);
7869       oappend (scratchbuf + intel_syntax);
7870       scratchbuf[0] = '\0';
7871     }
7872 }
7873
7874 static void
7875 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
7876           int sizeflag ATTRIBUTE_UNUSED)
7877 {
7878   /* mwait %eax,%ecx  */
7879   if (!intel_syntax)
7880     {
7881       const char **names = (address_mode == mode_64bit
7882                             ? names64 : names32);
7883       strcpy (op_out[0], names[0]);
7884       strcpy (op_out[1], names[1]);
7885       two_source_ops = 1;
7886     }
7887   /* Skip mod/rm byte.  */
7888   MODRM_CHECK;
7889   codep++;
7890 }
7891
7892 static void
7893 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
7894             int sizeflag ATTRIBUTE_UNUSED)
7895 {
7896   /* monitor %eax,%ecx,%edx"  */
7897   if (!intel_syntax)
7898     {
7899       const char **op1_names;
7900       const char **names = (address_mode == mode_64bit
7901                             ? names64 : names32);
7902
7903       if (!(prefixes & PREFIX_ADDR))
7904         op1_names = (address_mode == mode_16bit
7905                      ? names16 : names);
7906       else
7907         {
7908           /* Remove "addr16/addr32".  */
7909           addr_prefix = NULL;
7910           op1_names = (address_mode != mode_32bit
7911                        ? names32 : names16);
7912           used_prefixes |= PREFIX_ADDR;
7913         }
7914       strcpy (op_out[0], op1_names[0]);
7915       strcpy (op_out[1], names[1]);
7916       strcpy (op_out[2], names[2]);
7917       two_source_ops = 1;
7918     }
7919   /* Skip mod/rm byte.  */
7920   MODRM_CHECK;
7921   codep++;
7922 }
7923
7924 static void
7925 BadOp (void)
7926 {
7927   /* Throw away prefixes and 1st. opcode byte.  */
7928   codep = insn_codep + 1;
7929   oappend ("(bad)");
7930 }
7931
7932 static void
7933 REP_Fixup (int bytemode, int sizeflag)
7934 {
7935   /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
7936      lods and stos.  */
7937   if (prefixes & PREFIX_REPZ)
7938     repz_prefix = "rep ";
7939
7940   switch (bytemode)
7941     {
7942     case al_reg:
7943     case eAX_reg:
7944     case indir_dx_reg:
7945       OP_IMREG (bytemode, sizeflag);
7946       break;
7947     case eDI_reg:
7948       OP_ESreg (bytemode, sizeflag);
7949       break;
7950     case eSI_reg:
7951       OP_DSreg (bytemode, sizeflag);
7952       break;
7953     default:
7954       abort ();
7955       break;
7956     }
7957 }
7958
7959 static void
7960 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
7961 {
7962   USED_REX (REX_W);
7963   if (rex & REX_W)
7964     {
7965       /* Change cmpxchg8b to cmpxchg16b.  */
7966       char *p = obuf + strlen (obuf) - 2;
7967       strcpy (p, "16b");
7968       bytemode = o_mode;
7969     }
7970   OP_M (bytemode, sizeflag);
7971 }
7972
7973 static void
7974 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
7975 {
7976   sprintf (scratchbuf, "%%xmm%d", reg);
7977   oappend (scratchbuf + intel_syntax);
7978 }
7979
7980 static void
7981 CRC32_Fixup (int bytemode, int sizeflag)
7982 {
7983   /* Add proper suffix to "crc32".  */
7984   char *p = obuf + strlen (obuf);
7985
7986   switch (bytemode)
7987     {
7988     case b_mode:
7989       if (intel_syntax)
7990         break;
7991
7992       *p++ = 'b';
7993       break;
7994     case v_mode:
7995       if (intel_syntax)
7996         break;
7997
7998       USED_REX (REX_W);
7999       if (rex & REX_W)
8000         *p++ = 'q';
8001       else if (sizeflag & DFLAG)
8002         *p++ = 'l';
8003       else
8004         *p++ = 'w';
8005       used_prefixes |= (prefixes & PREFIX_DATA);
8006       break;
8007     default:
8008       oappend (INTERNAL_DISASSEMBLER_ERROR);
8009       break;
8010     }
8011   *p = '\0';
8012
8013   if (modrm.mod == 3)
8014     {
8015       int add;
8016
8017       /* Skip mod/rm byte.  */
8018       MODRM_CHECK;
8019       codep++;
8020
8021       USED_REX (REX_B);
8022       add = (rex & REX_B) ? 8 : 0;
8023       if (bytemode == b_mode)
8024         {
8025           USED_REX (0);
8026           if (rex)
8027             oappend (names8rex[modrm.rm + add]);
8028           else
8029             oappend (names8[modrm.rm + add]);
8030         }
8031       else
8032         {
8033           USED_REX (REX_W);
8034           if (rex & REX_W)
8035             oappend (names64[modrm.rm + add]);
8036           else if ((prefixes & PREFIX_DATA))
8037             oappend (names16[modrm.rm + add]);
8038           else
8039             oappend (names32[modrm.rm + add]);
8040         }
8041     }
8042   else
8043     OP_E (bytemode, sizeflag);
8044 }
8045
8046 /* Print a DREX argument as either a register or memory operation.  */
8047 static void
8048 print_drex_arg (unsigned int reg, int bytemode, int sizeflag)
8049 {
8050   if (reg == DREX_REG_UNKNOWN)
8051     BadOp ();
8052
8053   else if (reg != DREX_REG_MEMORY)
8054     {
8055       sprintf (scratchbuf, "%%xmm%d", reg);
8056       oappend (scratchbuf + intel_syntax);
8057     }
8058
8059   else
8060     OP_E_extended (bytemode, sizeflag, 1);
8061 }
8062
8063 /* SSE5 instructions that have 4 arguments are encoded as:
8064    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>.
8065
8066    The <sub-opcode> byte has 1 bit (0x4) that is combined with 1 bit in
8067    the DREX field (0x8) to determine how the arguments are laid out.
8068    The destination register must be the same register as one of the
8069    inputs, and it is encoded in the DREX byte.  No REX prefix is used
8070    for these instructions, since the DREX field contains the 3 extension
8071    bits provided by the REX prefix.
8072
8073    The bytemode argument adds 2 extra bits for passing extra information:
8074         DREX_OC1        -- Set the OC1 bit to indicate dest == 1st arg
8075         DREX_NO_OC0     -- OC0 in DREX is invalid
8076         (but pretend it is set).  */
8077
8078 static void
8079 OP_DREX4 (int flag_bytemode, int sizeflag)
8080 {
8081   unsigned int drex_byte;
8082   unsigned int regs[4];
8083   unsigned int modrm_regmem;
8084   unsigned int modrm_reg;
8085   unsigned int drex_reg;
8086   int bytemode;
8087   int rex_save = rex;
8088   int rex_used_save = rex_used;
8089   int has_sib = 0;
8090   int oc1 = (flag_bytemode & DREX_OC1) ? 2 : 0;
8091   int oc0;
8092   int i;
8093
8094   bytemode = flag_bytemode & ~ DREX_MASK;
8095
8096   for (i = 0; i < 4; i++)
8097     regs[i] = DREX_REG_UNKNOWN;
8098
8099   /* Determine if we have a SIB byte in addition to MODRM before the
8100      DREX byte.  */
8101   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8102       && (modrm.mod != 3)
8103       && (modrm.rm == 4))
8104     has_sib = 1;
8105
8106   /* Get the DREX byte.  */
8107   FETCH_DATA (the_info, codep + 2 + has_sib);
8108   drex_byte = codep[has_sib+1];
8109   drex_reg = DREX_XMM (drex_byte);
8110   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8111
8112   /* Is OC0 legal?  If not, hardwire oc0 == 1.  */
8113   if (flag_bytemode & DREX_NO_OC0)
8114     {
8115       oc0 = 1;
8116       if (DREX_OC0 (drex_byte))
8117         BadOp ();
8118     }
8119   else
8120     oc0 = DREX_OC0 (drex_byte);
8121
8122   if (modrm.mod == 3)
8123     {
8124       /* regmem == register  */
8125       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8126       rex = rex_used = 0;
8127       /* skip modrm/drex since we don't call OP_E_extended  */
8128       codep += 2;
8129     }
8130   else
8131     {
8132       /* regmem == memory, fill in appropriate REX bits  */
8133       modrm_regmem = DREX_REG_MEMORY;
8134       rex = drex_byte & (REX_B | REX_X | REX_R);
8135       if (rex)
8136         rex |= REX_OPCODE;
8137       rex_used = rex;
8138     }
8139
8140   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8141      order.  */
8142   switch (oc0 + oc1)
8143     {
8144     default:
8145       BadOp ();
8146       return;
8147
8148     case 0:
8149       regs[0] = modrm_regmem;
8150       regs[1] = modrm_reg;
8151       regs[2] = drex_reg;
8152       regs[3] = drex_reg;
8153       break;
8154
8155     case 1:
8156       regs[0] = modrm_reg;
8157       regs[1] = modrm_regmem;
8158       regs[2] = drex_reg;
8159       regs[3] = drex_reg;
8160       break;
8161
8162     case 2:
8163       regs[0] = drex_reg;
8164       regs[1] = modrm_regmem;
8165       regs[2] = modrm_reg;
8166       regs[3] = drex_reg;
8167       break;
8168
8169     case 3:
8170       regs[0] = drex_reg;
8171       regs[1] = modrm_reg;
8172       regs[2] = modrm_regmem;
8173       regs[3] = drex_reg;
8174       break;
8175     }
8176
8177   /* Print out the arguments.  */
8178   for (i = 0; i < 4; i++)
8179     {
8180       int j = (intel_syntax) ? 3 - i : i;
8181       if (i > 0)
8182         {
8183           *obufp++ = ',';
8184           *obufp = '\0';
8185         }
8186
8187       print_drex_arg (regs[j], bytemode, sizeflag);
8188     }
8189
8190   rex = rex_save;
8191   rex_used = rex_used_save;
8192 }
8193
8194 /* SSE5 instructions that have 3 arguments, and are encoded as:
8195    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>    (or)
8196    0f 25 <sub-opcode> <modrm> <optional-sib> <drex> <offset> <cmp-byte>
8197
8198    The DREX field has 1 bit (0x8) to determine how the arguments are
8199    laid out. The destination register is encoded in the DREX byte.
8200    No REX prefix is used for these instructions, since the DREX field
8201    contains the 3 extension bits provided by the REX prefix.  */
8202
8203 static void
8204 OP_DREX3 (int flag_bytemode, int sizeflag)
8205 {
8206   unsigned int drex_byte;
8207   unsigned int regs[3];
8208   unsigned int modrm_regmem;
8209   unsigned int modrm_reg;
8210   unsigned int drex_reg;
8211   int bytemode;
8212   int rex_save = rex;
8213   int rex_used_save = rex_used;
8214   int has_sib = 0;
8215   int oc0;
8216   int i;
8217
8218   bytemode = flag_bytemode & ~ DREX_MASK;
8219
8220   for (i = 0; i < 3; i++)
8221     regs[i] = DREX_REG_UNKNOWN;
8222
8223   /* Determine if we have a SIB byte in addition to MODRM before the
8224      DREX byte.  */
8225   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8226       && (modrm.mod != 3)
8227       && (modrm.rm == 4))
8228     has_sib = 1;
8229
8230   /* Get the DREX byte.  */
8231   FETCH_DATA (the_info, codep + 2 + has_sib);
8232   drex_byte = codep[has_sib+1];
8233   drex_reg = DREX_XMM (drex_byte);
8234   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8235
8236   /* Is OC0 legal?  If not, hardwire oc0 == 0 */
8237   oc0 = DREX_OC0 (drex_byte);
8238   if ((flag_bytemode & DREX_NO_OC0) && oc0)
8239     BadOp ();
8240
8241   if (modrm.mod == 3)
8242     {
8243       /* regmem == register */
8244       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8245       rex = rex_used = 0;
8246       /* skip modrm/drex since we don't call OP_E_extended.  */
8247       codep += 2;
8248     }
8249   else
8250     {
8251       /* regmem == memory, fill in appropriate REX bits.  */
8252       modrm_regmem = DREX_REG_MEMORY;
8253       rex = drex_byte & (REX_B | REX_X | REX_R);
8254       if (rex)
8255         rex |= REX_OPCODE;
8256       rex_used = rex;
8257     }
8258
8259   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8260      order.  */
8261   switch (oc0)
8262     {
8263     default:
8264       BadOp ();
8265       return;
8266
8267     case 0:
8268       regs[0] = modrm_regmem;
8269       regs[1] = modrm_reg;
8270       regs[2] = drex_reg;
8271       break;
8272
8273     case 1:
8274       regs[0] = modrm_reg;
8275       regs[1] = modrm_regmem;
8276       regs[2] = drex_reg;
8277       break;
8278     }
8279
8280   /* Print out the arguments.  */
8281   for (i = 0; i < 3; i++)
8282     {
8283       int j = (intel_syntax) ? 2 - i : i;
8284       if (i > 0)
8285         {
8286           *obufp++ = ',';
8287           *obufp = '\0';
8288         }
8289
8290       print_drex_arg (regs[j], bytemode, sizeflag);
8291     }
8292
8293   rex = rex_save;
8294   rex_used = rex_used_save;
8295 }
8296
8297 /* Emit a floating point comparison for comp<xx> instructions.  */
8298
8299 static void
8300 OP_DREX_FCMP (int bytemode ATTRIBUTE_UNUSED,
8301               int sizeflag ATTRIBUTE_UNUSED)
8302 {
8303   unsigned char byte;
8304
8305   static const char *const cmp_test[] = {
8306     "eq",
8307     "lt",
8308     "le",
8309     "unord",
8310     "ne",
8311     "nlt",
8312     "nle",
8313     "ord",
8314     "ueq",
8315     "ult",
8316     "ule",
8317     "false",
8318     "une",
8319     "unlt",
8320     "unle",
8321     "true"
8322   };
8323
8324   FETCH_DATA (the_info, codep + 1);
8325   byte = *codep & 0xff;
8326
8327   if (byte >= ARRAY_SIZE (cmp_test)
8328       || obuf[0] != 'c'
8329       || obuf[1] != 'o'
8330       || obuf[2] != 'm')
8331     {
8332       /* The instruction isn't one we know about, so just append the
8333          extension byte as a numeric value.  */
8334       OP_I (b_mode, 0);
8335     }
8336
8337   else
8338     {
8339       sprintf (scratchbuf, "com%s%s", cmp_test[byte], obuf+3);
8340       strcpy (obuf, scratchbuf);
8341       codep++;
8342     }
8343 }
8344
8345 /* Emit an integer point comparison for pcom<xx> instructions,
8346    rewriting the instruction to have the test inside of it.  */
8347
8348 static void
8349 OP_DREX_ICMP (int bytemode ATTRIBUTE_UNUSED,
8350               int sizeflag ATTRIBUTE_UNUSED)
8351 {
8352   unsigned char byte;
8353
8354   static const char *const cmp_test[] = {
8355     "lt",
8356     "le",
8357     "gt",
8358     "ge",
8359     "eq",
8360     "ne",
8361     "false",
8362     "true"
8363   };
8364
8365   FETCH_DATA (the_info, codep + 1);
8366   byte = *codep & 0xff;
8367
8368   if (byte >= ARRAY_SIZE (cmp_test)
8369       || obuf[0] != 'p'
8370       || obuf[1] != 'c'
8371       || obuf[2] != 'o'
8372       || obuf[3] != 'm')
8373     {
8374       /* The instruction isn't one we know about, so just print the
8375          comparison test byte as a numeric value.  */
8376       OP_I (b_mode, 0);
8377     }
8378
8379   else
8380     {
8381       sprintf (scratchbuf, "pcom%s%s", cmp_test[byte], obuf+4);
8382       strcpy (obuf, scratchbuf);
8383       codep++;
8384     }
8385 }