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Branch hints for Pentium4 as insn modifiers, and some minor tweaks
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22 /*
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * July 1988
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
27 */
28
29 /*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38 #include "dis-asm.h"
39 #include "sysdep.h"
40 #include "opintl.h"
41
42 #define MAXLEN 20
43
44 #include <setjmp.h>
45
46 #ifndef UNIXWARE_COMPAT
47 /* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49 #define UNIXWARE_COMPAT 1
50 #endif
51
52 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
53
54 struct dis_private
55 {
56 /* Points to first byte not fetched. */
57 bfd_byte *max_fetched;
58 bfd_byte the_buffer[MAXLEN];
59 bfd_vma insn_start;
60 jmp_buf bailout;
61 };
62
63 /* The opcode for the fwait instruction, which we treat as a prefix
64 when we can. */
65 #define FWAIT_OPCODE (0x9b)
66
67 /* Set to 1 for 64bit mode disassembly. */
68 static int mode_64bit;
69
70 /* Flags for the prefixes for the current instruction. See below. */
71 static int prefixes;
72
73 /* REX prefix the current instruction. See below. */
74 static int rex;
75 /* Bits of REX we've already used. */
76 static int rex_used;
77 #define REX_MODE64 8
78 #define REX_EXTX 4
79 #define REX_EXTY 2
80 #define REX_EXTZ 1
81 /* Mark parts used in the REX prefix. When we are testing for
82 empty prefix (for 8bit register REX extension), just mask it
83 out. Otherwise test for REX bit is excuse for existence of REX
84 only in case value is nonzero. */
85 #define USED_REX(value) \
86 { \
87 if (value) \
88 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
89 else \
90 rex_used |= 0x40; \
91 }
92
93 /* Flags for prefixes which we somehow handled when printing the
94 current instruction. */
95 static int used_prefixes;
96
97 /* Flags stored in PREFIXES. */
98 #define PREFIX_REPZ 1
99 #define PREFIX_REPNZ 2
100 #define PREFIX_LOCK 4
101 #define PREFIX_CS 8
102 #define PREFIX_SS 0x10
103 #define PREFIX_DS 0x20
104 #define PREFIX_ES 0x40
105 #define PREFIX_FS 0x80
106 #define PREFIX_GS 0x100
107 #define PREFIX_DATA 0x200
108 #define PREFIX_ADDR 0x400
109 #define PREFIX_FWAIT 0x800
110
111 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
112 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
113 on error. */
114 #define FETCH_DATA(info, addr) \
115 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
116 ? 1 : fetch_data ((info), (addr)))
117
118 static int
119 fetch_data (info, addr)
120 struct disassemble_info *info;
121 bfd_byte *addr;
122 {
123 int status;
124 struct dis_private *priv = (struct dis_private *)info->private_data;
125 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
126
127 status = (*info->read_memory_func) (start,
128 priv->max_fetched,
129 addr - priv->max_fetched,
130 info);
131 if (status != 0)
132 {
133 /* If we did manage to read at least one byte, then
134 print_insn_i386 will do something sensible. Otherwise, print
135 an error. We do that here because this is where we know
136 STATUS. */
137 if (priv->max_fetched == priv->the_buffer)
138 (*info->memory_error_func) (status, start, info);
139 longjmp (priv->bailout, 1);
140 }
141 else
142 priv->max_fetched = addr;
143 return 1;
144 }
145
146 #define XX NULL, 0
147
148 #define Eb OP_E, b_mode
149 #define Ev OP_E, v_mode
150 #define Ed OP_E, d_mode
151 #define indirEb OP_indirE, b_mode
152 #define indirEv OP_indirE, v_mode
153 #define Ew OP_E, w_mode
154 #define Ma OP_E, v_mode
155 #define M OP_E, 0 /* lea */
156 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
157 #define Gb OP_G, b_mode
158 #define Gv OP_G, v_mode
159 #define Gd OP_G, d_mode
160 #define Gw OP_G, w_mode
161 #define Rd OP_Rd, d_mode
162 #define Rm OP_Rd, m_mode
163 #define Ib OP_I, b_mode
164 #define sIb OP_sI, b_mode /* sign extened byte */
165 #define Iv OP_I, v_mode
166 #define Iq OP_I, q_mode
167 #define Iv64 OP_I64, v_mode
168 #define Iw OP_I, w_mode
169 #define Jb OP_J, b_mode
170 #define Jv OP_J, v_mode
171 #define Cm OP_C, m_mode
172 #define Dm OP_D, m_mode
173 #define Td OP_T, d_mode
174
175 #define RMeAX OP_REG, eAX_reg
176 #define RMeBX OP_REG, eBX_reg
177 #define RMeCX OP_REG, eCX_reg
178 #define RMeDX OP_REG, eDX_reg
179 #define RMeSP OP_REG, eSP_reg
180 #define RMeBP OP_REG, eBP_reg
181 #define RMeSI OP_REG, eSI_reg
182 #define RMeDI OP_REG, eDI_reg
183 #define RMrAX OP_REG, rAX_reg
184 #define RMrBX OP_REG, rBX_reg
185 #define RMrCX OP_REG, rCX_reg
186 #define RMrDX OP_REG, rDX_reg
187 #define RMrSP OP_REG, rSP_reg
188 #define RMrBP OP_REG, rBP_reg
189 #define RMrSI OP_REG, rSI_reg
190 #define RMrDI OP_REG, rDI_reg
191 #define RMAL OP_REG, al_reg
192 #define RMAL OP_REG, al_reg
193 #define RMCL OP_REG, cl_reg
194 #define RMDL OP_REG, dl_reg
195 #define RMBL OP_REG, bl_reg
196 #define RMAH OP_REG, ah_reg
197 #define RMCH OP_REG, ch_reg
198 #define RMDH OP_REG, dh_reg
199 #define RMBH OP_REG, bh_reg
200 #define RMAX OP_REG, ax_reg
201 #define RMDX OP_REG, dx_reg
202
203 #define eAX OP_IMREG, eAX_reg
204 #define eBX OP_IMREG, eBX_reg
205 #define eCX OP_IMREG, eCX_reg
206 #define eDX OP_IMREG, eDX_reg
207 #define eSP OP_IMREG, eSP_reg
208 #define eBP OP_IMREG, eBP_reg
209 #define eSI OP_IMREG, eSI_reg
210 #define eDI OP_IMREG, eDI_reg
211 #define AL OP_IMREG, al_reg
212 #define AL OP_IMREG, al_reg
213 #define CL OP_IMREG, cl_reg
214 #define DL OP_IMREG, dl_reg
215 #define BL OP_IMREG, bl_reg
216 #define AH OP_IMREG, ah_reg
217 #define CH OP_IMREG, ch_reg
218 #define DH OP_IMREG, dh_reg
219 #define BH OP_IMREG, bh_reg
220 #define AX OP_IMREG, ax_reg
221 #define DX OP_IMREG, dx_reg
222 #define indirDX OP_IMREG, indir_dx_reg
223
224 #define Sw OP_SEG, w_mode
225 #define Ap OP_DIR, 0
226 #define Ob OP_OFF, b_mode
227 #define Ob64 OP_OFF64, b_mode
228 #define Ov OP_OFF, v_mode
229 #define Ov64 OP_OFF64, v_mode
230 #define Xb OP_DSreg, eSI_reg
231 #define Xv OP_DSreg, eSI_reg
232 #define Yb OP_ESreg, eDI_reg
233 #define Yv OP_ESreg, eDI_reg
234 #define DSBX OP_DSreg, eBX_reg
235
236 #define es OP_REG, es_reg
237 #define ss OP_REG, ss_reg
238 #define cs OP_REG, cs_reg
239 #define ds OP_REG, ds_reg
240 #define fs OP_REG, fs_reg
241 #define gs OP_REG, gs_reg
242
243 #define MX OP_MMX, 0
244 #define XM OP_XMM, 0
245 #define EM OP_EM, v_mode
246 #define EX OP_EX, v_mode
247 #define MS OP_MS, v_mode
248 #define XS OP_XS, v_mode
249 #define None OP_E, 0
250 #define OPSUF OP_3DNowSuffix, 0
251 #define OPSIMD OP_SIMD_Suffix, 0
252
253 #define cond_jump_flag NULL, cond_jump_mode
254 #define loop_jcxz_flag NULL, loop_jcxz_mode
255
256 /* bits in sizeflag */
257 #if 0 /* leave undefined until someone adds the extra flag to objdump */
258 #define SUFFIX_ALWAYS 4
259 #endif
260 #define AFLAG 2
261 #define DFLAG 1
262
263 typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
264
265 static void OP_E PARAMS ((int, int));
266 static void OP_G PARAMS ((int, int));
267 static void OP_I PARAMS ((int, int));
268 static void OP_I64 PARAMS ((int, int));
269 static void OP_OFF PARAMS ((int, int));
270 static void OP_REG PARAMS ((int, int));
271 static void OP_IMREG PARAMS ((int, int));
272 static void OP_OFF64 PARAMS ((int, int));
273 static void OP_indirE PARAMS ((int, int));
274 static void OP_sI PARAMS ((int, int));
275 static void OP_REG PARAMS ((int, int));
276 static void OP_J PARAMS ((int, int));
277 static void OP_DIR PARAMS ((int, int));
278 static void OP_OFF PARAMS ((int, int));
279 static void OP_ESreg PARAMS ((int, int));
280 static void OP_DSreg PARAMS ((int, int));
281 static void OP_SEG PARAMS ((int, int));
282 static void OP_C PARAMS ((int, int));
283 static void OP_D PARAMS ((int, int));
284 static void OP_T PARAMS ((int, int));
285 static void OP_Rd PARAMS ((int, int));
286 static void OP_ST PARAMS ((int, int));
287 static void OP_STi PARAMS ((int, int));
288 static void OP_MMX PARAMS ((int, int));
289 static void OP_XMM PARAMS ((int, int));
290 static void OP_EM PARAMS ((int, int));
291 static void OP_EX PARAMS ((int, int));
292 static void OP_MS PARAMS ((int, int));
293 static void OP_XS PARAMS ((int, int));
294 static void OP_3DNowSuffix PARAMS ((int, int));
295 static void OP_SIMD_Suffix PARAMS ((int, int));
296 static void SIMD_Fixup PARAMS ((int, int));
297
298 static void append_seg PARAMS ((void));
299 static void set_op PARAMS ((unsigned int op, int));
300 static void putop PARAMS ((const char *template, int sizeflag));
301 static void dofloat PARAMS ((int sizeflag));
302 static int get16 PARAMS ((void));
303 static bfd_vma get64 PARAMS ((void));
304 static bfd_signed_vma get32 PARAMS ((void));
305 static bfd_signed_vma get32s PARAMS ((void));
306 static void ckprefix PARAMS ((void));
307 static const char *prefix_name PARAMS ((int, int));
308 static void ptr_reg PARAMS ((int, int));
309 static void BadOp PARAMS ((void));
310
311 #define b_mode 1 /* byte operand */
312 #define v_mode 2 /* operand size depends on prefixes */
313 #define w_mode 3 /* word operand */
314 #define d_mode 4 /* double word operand */
315 #define q_mode 5 /* quad word operand */
316 #define x_mode 6
317 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
318 #define cond_jump_mode 8
319 #define loop_jcxz_mode 9
320
321 #define es_reg 100
322 #define cs_reg 101
323 #define ss_reg 102
324 #define ds_reg 103
325 #define fs_reg 104
326 #define gs_reg 105
327
328 #define eAX_reg 108
329 #define eCX_reg 109
330 #define eDX_reg 110
331 #define eBX_reg 111
332 #define eSP_reg 112
333 #define eBP_reg 113
334 #define eSI_reg 114
335 #define eDI_reg 115
336
337 #define al_reg 116
338 #define cl_reg 117
339 #define dl_reg 118
340 #define bl_reg 119
341 #define ah_reg 120
342 #define ch_reg 121
343 #define dh_reg 122
344 #define bh_reg 123
345
346 #define ax_reg 124
347 #define cx_reg 125
348 #define dx_reg 126
349 #define bx_reg 127
350 #define sp_reg 128
351 #define bp_reg 129
352 #define si_reg 130
353 #define di_reg 131
354
355 #define rAX_reg 132
356 #define rCX_reg 133
357 #define rDX_reg 134
358 #define rBX_reg 135
359 #define rSP_reg 136
360 #define rBP_reg 137
361 #define rSI_reg 138
362 #define rDI_reg 139
363
364 #define indir_dx_reg 150
365
366 #define USE_GROUPS 1
367 #define USE_PREFIX_USER_TABLE 2
368
369 #define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0
370 #define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0
371 #define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0
372 #define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0
373 #define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0
374 #define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0
375 #define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0
376 #define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0
377 #define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0
378 #define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0
379 #define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0
380 #define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0
381 #define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0
382 #define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0
383 #define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0
384 #define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0
385 #define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0
386 #define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0
387 #define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0
388 #define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0
389 #define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0
390 #define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0
391 #define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0
392
393 #define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0
394 #define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0
395 #define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0
396 #define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0
397 #define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0
398 #define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0
399 #define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0
400 #define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0
401 #define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0
402 #define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0
403 #define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0
404 #define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0
405 #define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0
406 #define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0
407 #define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0
408 #define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0
409 #define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0
410 #define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0
411 #define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0
412 #define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0
413 #define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0
414 #define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0
415 #define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0
416 #define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0
417 #define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0
418 #define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0
419 #define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0
420
421 #define FLOATCODE 50
422 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
423
424 struct dis386 {
425 const char *name;
426 op_rtn op1;
427 int bytemode1;
428 op_rtn op2;
429 int bytemode2;
430 op_rtn op3;
431 int bytemode3;
432 };
433
434 /* Upper case letters in the instruction names here are macros.
435 'A' => print 'b' if no register operands or suffix_always is true
436 'B' => print 'b' if suffix_always is true
437 'E' => print 'e' if 32-bit form of jcxz
438 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
439 'H' => print ",pt" or ",pn" branch hint
440 'L' => print 'l' if suffix_always is true
441 'N' => print 'n' if instruction has no wait "prefix"
442 'O' => print 'd', or 'o'
443 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
444 or suffix_always is true
445 print 'q' if rex prefix is present.
446 'I' => print 'q' in 64bit mode and behave as 'P' otherwise
447 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true
448 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
449 'S' => print 'w', 'l' or 'q' if suffix_always is true
450 'T' => print 'q' in 64bit mode and behave as 'I' otherwise
451 'X' => print 's', 'd' depending on data16 prefix (for XMM)
452 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
453 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
454 */
455
456 static const struct dis386 dis386_att[] = {
457 /* 00 */
458 { "addB", Eb, Gb, XX },
459 { "addS", Ev, Gv, XX },
460 { "addB", Gb, Eb, XX },
461 { "addS", Gv, Ev, XX },
462 { "addB", AL, Ib, XX },
463 { "addS", eAX, Iv, XX },
464 { "pushI", es, XX, XX },
465 { "popI", es, XX, XX },
466 /* 08 */
467 { "orB", Eb, Gb, XX },
468 { "orS", Ev, Gv, XX },
469 { "orB", Gb, Eb, XX },
470 { "orS", Gv, Ev, XX },
471 { "orB", AL, Ib, XX },
472 { "orS", eAX, Iv, XX },
473 { "pushI", cs, XX, XX },
474 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
475 /* 10 */
476 { "adcB", Eb, Gb, XX },
477 { "adcS", Ev, Gv, XX },
478 { "adcB", Gb, Eb, XX },
479 { "adcS", Gv, Ev, XX },
480 { "adcB", AL, Ib, XX },
481 { "adcS", eAX, Iv, XX },
482 { "pushI", ss, XX, XX },
483 { "popI", ss, XX, XX },
484 /* 18 */
485 { "sbbB", Eb, Gb, XX },
486 { "sbbS", Ev, Gv, XX },
487 { "sbbB", Gb, Eb, XX },
488 { "sbbS", Gv, Ev, XX },
489 { "sbbB", AL, Ib, XX },
490 { "sbbS", eAX, Iv, XX },
491 { "pushI", ds, XX, XX },
492 { "popI", ds, XX, XX },
493 /* 20 */
494 { "andB", Eb, Gb, XX },
495 { "andS", Ev, Gv, XX },
496 { "andB", Gb, Eb, XX },
497 { "andS", Gv, Ev, XX },
498 { "andB", AL, Ib, XX },
499 { "andS", eAX, Iv, XX },
500 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
501 { "daa", XX, XX, XX },
502 /* 28 */
503 { "subB", Eb, Gb, XX },
504 { "subS", Ev, Gv, XX },
505 { "subB", Gb, Eb, XX },
506 { "subS", Gv, Ev, XX },
507 { "subB", AL, Ib, XX },
508 { "subS", eAX, Iv, XX },
509 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
510 { "das", XX, XX, XX },
511 /* 30 */
512 { "xorB", Eb, Gb, XX },
513 { "xorS", Ev, Gv, XX },
514 { "xorB", Gb, Eb, XX },
515 { "xorS", Gv, Ev, XX },
516 { "xorB", AL, Ib, XX },
517 { "xorS", eAX, Iv, XX },
518 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
519 { "aaa", XX, XX, XX },
520 /* 38 */
521 { "cmpB", Eb, Gb, XX },
522 { "cmpS", Ev, Gv, XX },
523 { "cmpB", Gb, Eb, XX },
524 { "cmpS", Gv, Ev, XX },
525 { "cmpB", AL, Ib, XX },
526 { "cmpS", eAX, Iv, XX },
527 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
528 { "aas", XX, XX, XX },
529 /* 40 */
530 { "incS", RMeAX, XX, XX },
531 { "incS", RMeCX, XX, XX },
532 { "incS", RMeDX, XX, XX },
533 { "incS", RMeBX, XX, XX },
534 { "incS", RMeSP, XX, XX },
535 { "incS", RMeBP, XX, XX },
536 { "incS", RMeSI, XX, XX },
537 { "incS", RMeDI, XX, XX },
538 /* 48 */
539 { "decS", RMeAX, XX, XX },
540 { "decS", RMeCX, XX, XX },
541 { "decS", RMeDX, XX, XX },
542 { "decS", RMeBX, XX, XX },
543 { "decS", RMeSP, XX, XX },
544 { "decS", RMeBP, XX, XX },
545 { "decS", RMeSI, XX, XX },
546 { "decS", RMeDI, XX, XX },
547 /* 50 */
548 { "pushS", RMeAX, XX, XX },
549 { "pushS", RMeCX, XX, XX },
550 { "pushS", RMeDX, XX, XX },
551 { "pushS", RMeBX, XX, XX },
552 { "pushS", RMeSP, XX, XX },
553 { "pushS", RMeBP, XX, XX },
554 { "pushS", RMeSI, XX, XX },
555 { "pushS", RMeDI, XX, XX },
556 /* 58 */
557 { "popS", RMeAX, XX, XX },
558 { "popS", RMeCX, XX, XX },
559 { "popS", RMeDX, XX, XX },
560 { "popS", RMeBX, XX, XX },
561 { "popS", RMeSP, XX, XX },
562 { "popS", RMeBP, XX, XX },
563 { "popS", RMeSI, XX, XX },
564 { "popS", RMeDI, XX, XX },
565 /* 60 */
566 { "pushaP", XX, XX, XX },
567 { "popaP", XX, XX, XX },
568 { "boundS", Gv, Ma, XX },
569 { "arpl", Ew, Gw, XX },
570 { "(bad)", XX, XX, XX }, /* seg fs */
571 { "(bad)", XX, XX, XX }, /* seg gs */
572 { "(bad)", XX, XX, XX }, /* op size prefix */
573 { "(bad)", XX, XX, XX }, /* adr size prefix */
574 /* 68 */
575 { "pushI", Iv, XX, XX }, /* 386 book wrong */
576 { "imulS", Gv, Ev, Iv },
577 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
578 { "imulS", Gv, Ev, sIb },
579 { "insb", Yb, indirDX, XX },
580 { "insR", Yv, indirDX, XX },
581 { "outsb", indirDX, Xb, XX },
582 { "outsR", indirDX, Xv, XX },
583 /* 70 */
584 { "joH", Jb, cond_jump_flag, XX },
585 { "jnoH", Jb, cond_jump_flag, XX },
586 { "jbH", Jb, cond_jump_flag, XX },
587 { "jaeH", Jb, cond_jump_flag, XX },
588 { "jeH", Jb, cond_jump_flag, XX },
589 { "jneH", Jb, cond_jump_flag, XX },
590 { "jbeH", Jb, cond_jump_flag, XX },
591 { "jaH", Jb, cond_jump_flag, XX },
592 /* 78 */
593 { "jsH", Jb, cond_jump_flag, XX },
594 { "jnsH", Jb, cond_jump_flag, XX },
595 { "jpH", Jb, cond_jump_flag, XX },
596 { "jnpH", Jb, cond_jump_flag, XX },
597 { "jlH", Jb, cond_jump_flag, XX },
598 { "jgeH", Jb, cond_jump_flag, XX },
599 { "jleH", Jb, cond_jump_flag, XX },
600 { "jgH", Jb, cond_jump_flag, XX },
601 /* 80 */
602 { GRP1b },
603 { GRP1S },
604 { "(bad)", XX, XX, XX },
605 { GRP1Ss },
606 { "testB", Eb, Gb, XX },
607 { "testS", Ev, Gv, XX },
608 { "xchgB", Eb, Gb, XX },
609 { "xchgS", Ev, Gv, XX },
610 /* 88 */
611 { "movB", Eb, Gb, XX },
612 { "movS", Ev, Gv, XX },
613 { "movB", Gb, Eb, XX },
614 { "movS", Gv, Ev, XX },
615 { "movQ", Ev, Sw, XX },
616 { "leaS", Gv, M, XX },
617 { "movQ", Sw, Ev, XX },
618 { "popT", Ev, XX, XX },
619 /* 90 */
620 { "nop", XX, XX, XX },
621 /* FIXME: NOP with REPz prefix is called PAUSE. */
622 { "xchgS", RMeCX, eAX, XX },
623 { "xchgS", RMeDX, eAX, XX },
624 { "xchgS", RMeBX, eAX, XX },
625 { "xchgS", RMeSP, eAX, XX },
626 { "xchgS", RMeBP, eAX, XX },
627 { "xchgS", RMeSI, eAX, XX },
628 { "xchgS", RMeDI, eAX, XX },
629 /* 98 */
630 { "cWtR", XX, XX, XX },
631 { "cRtO", XX, XX, XX },
632 { "lcallI", Ap, XX, XX },
633 { "(bad)", XX, XX, XX }, /* fwait */
634 { "pushfI", XX, XX, XX },
635 { "popfI", XX, XX, XX },
636 { "sahf", XX, XX, XX },
637 { "lahf", XX, XX, XX },
638 /* a0 */
639 { "movB", AL, Ob, XX },
640 { "movS", eAX, Ov, XX },
641 { "movB", Ob, AL, XX },
642 { "movS", Ov, eAX, XX },
643 { "movsb", Yb, Xb, XX },
644 { "movsR", Yv, Xv, XX },
645 { "cmpsb", Xb, Yb, XX },
646 { "cmpsR", Xv, Yv, XX },
647 /* a8 */
648 { "testB", AL, Ib, XX },
649 { "testS", eAX, Iv, XX },
650 { "stosB", Yb, AL, XX },
651 { "stosS", Yv, eAX, XX },
652 { "lodsB", AL, Xb, XX },
653 { "lodsS", eAX, Xv, XX },
654 { "scasB", AL, Yb, XX },
655 { "scasS", eAX, Yv, XX },
656 /* b0 */
657 { "movB", RMAL, Ib, XX },
658 { "movB", RMCL, Ib, XX },
659 { "movB", RMDL, Ib, XX },
660 { "movB", RMBL, Ib, XX },
661 { "movB", RMAH, Ib, XX },
662 { "movB", RMCH, Ib, XX },
663 { "movB", RMDH, Ib, XX },
664 { "movB", RMBH, Ib, XX },
665 /* b8 */
666 { "movS", RMeAX, Iv, XX },
667 { "movS", RMeCX, Iv, XX },
668 { "movS", RMeDX, Iv, XX },
669 { "movS", RMeBX, Iv, XX },
670 { "movS", RMeSP, Iv, XX },
671 { "movS", RMeBP, Iv, XX },
672 { "movS", RMeSI, Iv, XX },
673 { "movS", RMeDI, Iv, XX },
674 /* c0 */
675 { GRP2b },
676 { GRP2S },
677 { "retI", Iw, XX, XX },
678 { "retI", XX, XX, XX },
679 { "lesS", Gv, Mp, XX },
680 { "ldsS", Gv, Mp, XX },
681 { "movA", Eb, Ib, XX },
682 { "movQ", Ev, Iv, XX },
683 /* c8 */
684 { "enterI", Iw, Ib, XX },
685 { "leaveI", XX, XX, XX },
686 { "lretP", Iw, XX, XX },
687 { "lretP", XX, XX, XX },
688 { "int3", XX, XX, XX },
689 { "int", Ib, XX, XX },
690 { "into", XX, XX, XX},
691 { "iretP", XX, XX, XX },
692 /* d0 */
693 { GRP2b_one },
694 { GRP2S_one },
695 { GRP2b_cl },
696 { GRP2S_cl },
697 { "aam", sIb, XX, XX },
698 { "aad", sIb, XX, XX },
699 { "(bad)", XX, XX, XX },
700 { "xlat", DSBX, XX, XX },
701 /* d8 */
702 { FLOAT },
703 { FLOAT },
704 { FLOAT },
705 { FLOAT },
706 { FLOAT },
707 { FLOAT },
708 { FLOAT },
709 { FLOAT },
710 /* e0 */
711 { "loopneFH", Jb, loop_jcxz_flag, XX },
712 { "loopeFH", Jb, loop_jcxz_flag, XX },
713 { "loopFH", Jb, loop_jcxz_flag, XX },
714 { "jEcxzH", Jb, loop_jcxz_flag, XX },
715 { "inB", AL, Ib, XX },
716 { "inS", eAX, Ib, XX },
717 { "outB", Ib, AL, XX },
718 { "outS", Ib, eAX, XX },
719 /* e8 */
720 { "callI", Jv, XX, XX },
721 { "jmpI", Jv, XX, XX },
722 { "ljmpI", Ap, XX, XX },
723 { "jmp", Jb, XX, XX },
724 { "inB", AL, indirDX, XX },
725 { "inS", eAX, indirDX, XX },
726 { "outB", indirDX, AL, XX },
727 { "outS", indirDX, eAX, XX },
728 /* f0 */
729 { "(bad)", XX, XX, XX }, /* lock prefix */
730 { "(bad)", XX, XX, XX },
731 { "(bad)", XX, XX, XX }, /* repne */
732 { "(bad)", XX, XX, XX }, /* repz */
733 { "hlt", XX, XX, XX },
734 { "cmc", XX, XX, XX },
735 { GRP3b },
736 { GRP3S },
737 /* f8 */
738 { "clc", XX, XX, XX },
739 { "stc", XX, XX, XX },
740 { "cli", XX, XX, XX },
741 { "sti", XX, XX, XX },
742 { "cld", XX, XX, XX },
743 { "std", XX, XX, XX },
744 { GRP4 },
745 { GRP5 },
746 };
747
748 static const struct dis386 dis386_intel[] = {
749 /* 00 */
750 { "add", Eb, Gb, XX },
751 { "add", Ev, Gv, XX },
752 { "add", Gb, Eb, XX },
753 { "add", Gv, Ev, XX },
754 { "add", AL, Ib, XX },
755 { "add", eAX, Iv, XX },
756 { "push", es, XX, XX },
757 { "pop", es, XX, XX },
758 /* 08 */
759 { "or", Eb, Gb, XX },
760 { "or", Ev, Gv, XX },
761 { "or", Gb, Eb, XX },
762 { "or", Gv, Ev, XX },
763 { "or", AL, Ib, XX },
764 { "or", eAX, Iv, XX },
765 { "push", cs, XX, XX },
766 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
767 /* 10 */
768 { "adc", Eb, Gb, XX },
769 { "adc", Ev, Gv, XX },
770 { "adc", Gb, Eb, XX },
771 { "adc", Gv, Ev, XX },
772 { "adc", AL, Ib, XX },
773 { "adc", eAX, Iv, XX },
774 { "push", ss, XX, XX },
775 { "pop", ss, XX, XX },
776 /* 18 */
777 { "sbb", Eb, Gb, XX },
778 { "sbb", Ev, Gv, XX },
779 { "sbb", Gb, Eb, XX },
780 { "sbb", Gv, Ev, XX },
781 { "sbb", AL, Ib, XX },
782 { "sbb", eAX, Iv, XX },
783 { "push", ds, XX, XX },
784 { "pop", ds, XX, XX },
785 /* 20 */
786 { "and", Eb, Gb, XX },
787 { "and", Ev, Gv, XX },
788 { "and", Gb, Eb, XX },
789 { "and", Gv, Ev, XX },
790 { "and", AL, Ib, XX },
791 { "and", eAX, Iv, XX },
792 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
793 { "daa", XX, XX, XX },
794 /* 28 */
795 { "sub", Eb, Gb, XX },
796 { "sub", Ev, Gv, XX },
797 { "sub", Gb, Eb, XX },
798 { "sub", Gv, Ev, XX },
799 { "sub", AL, Ib, XX },
800 { "sub", eAX, Iv, XX },
801 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
802 { "das", XX, XX, XX },
803 /* 30 */
804 { "xor", Eb, Gb, XX },
805 { "xor", Ev, Gv, XX },
806 { "xor", Gb, Eb, XX },
807 { "xor", Gv, Ev, XX },
808 { "xor", AL, Ib, XX },
809 { "xor", eAX, Iv, XX },
810 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
811 { "aaa", XX, XX, XX },
812 /* 38 */
813 { "cmp", Eb, Gb, XX },
814 { "cmp", Ev, Gv, XX },
815 { "cmp", Gb, Eb, XX },
816 { "cmp", Gv, Ev, XX },
817 { "cmp", AL, Ib, XX },
818 { "cmp", eAX, Iv, XX },
819 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
820 { "aas", XX, XX, XX },
821 /* 40 */
822 { "inc", RMeAX, XX, XX },
823 { "inc", RMeCX, XX, XX },
824 { "inc", RMeDX, XX, XX },
825 { "inc", RMeBX, XX, XX },
826 { "inc", RMeSP, XX, XX },
827 { "inc", RMeBP, XX, XX },
828 { "inc", RMeSI, XX, XX },
829 { "inc", RMeDI, XX, XX },
830 /* 48 */
831 { "dec", RMeAX, XX, XX },
832 { "dec", RMeCX, XX, XX },
833 { "dec", RMeDX, XX, XX },
834 { "dec", RMeBX, XX, XX },
835 { "dec", RMeSP, XX, XX },
836 { "dec", RMeBP, XX, XX },
837 { "dec", RMeSI, XX, XX },
838 { "dec", RMeDI, XX, XX },
839 /* 50 */
840 { "push", RMeAX, XX, XX },
841 { "push", RMeCX, XX, XX },
842 { "push", RMeDX, XX, XX },
843 { "push", RMeBX, XX, XX },
844 { "push", RMeSP, XX, XX },
845 { "push", RMeBP, XX, XX },
846 { "push", RMeSI, XX, XX },
847 { "push", RMeDI, XX, XX },
848 /* 58 */
849 { "pop", RMeAX, XX, XX },
850 { "pop", RMeCX, XX, XX },
851 { "pop", RMeDX, XX, XX },
852 { "pop", RMeBX, XX, XX },
853 { "pop", RMeSP, XX, XX },
854 { "pop", RMeBP, XX, XX },
855 { "pop", RMeSI, XX, XX },
856 { "pop", RMeDI, XX, XX },
857 /* 60 */
858 { "pusha", XX, XX, XX },
859 { "popa", XX, XX, XX },
860 { "bound", Gv, Ma, XX },
861 { "arpl", Ew, Gw, XX },
862 { "(bad)", XX, XX, XX }, /* seg fs */
863 { "(bad)", XX, XX, XX }, /* seg gs */
864 { "(bad)", XX, XX, XX }, /* op size prefix */
865 { "(bad)", XX, XX, XX }, /* adr size prefix */
866 /* 68 */
867 { "push", Iv, XX, XX }, /* 386 book wrong */
868 { "imul", Gv, Ev, Iv },
869 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
870 { "imul", Gv, Ev, sIb },
871 { "ins", Yb, indirDX, XX },
872 { "ins", Yv, indirDX, XX },
873 { "outs", indirDX, Xb, XX },
874 { "outs", indirDX, Xv, XX },
875 /* 70 */
876 { "jo", Jb, XX, XX },
877 { "jno", Jb, XX, XX },
878 { "jb", Jb, XX, XX },
879 { "jae", Jb, XX, XX },
880 { "je", Jb, XX, XX },
881 { "jne", Jb, XX, XX },
882 { "jbe", Jb, XX, XX },
883 { "ja", Jb, XX, XX },
884 /* 78 */
885 { "js", Jb, XX, XX },
886 { "jns", Jb, XX, XX },
887 { "jp", Jb, XX, XX },
888 { "jnp", Jb, XX, XX },
889 { "jl", Jb, XX, XX },
890 { "jge", Jb, XX, XX },
891 { "jle", Jb, XX, XX },
892 { "jg", Jb, XX, XX },
893 /* 80 */
894 { GRP1b },
895 { GRP1S },
896 { "(bad)", XX, XX, XX },
897 { GRP1Ss },
898 { "test", Eb, Gb, XX },
899 { "test", Ev, Gv, XX },
900 { "xchg", Eb, Gb, XX },
901 { "xchg", Ev, Gv, XX },
902 /* 88 */
903 { "mov", Eb, Gb, XX },
904 { "mov", Ev, Gv, XX },
905 { "mov", Gb, Eb, XX },
906 { "mov", Gv, Ev, XX },
907 { "mov", Ev, Sw, XX },
908 { "lea", Gv, M, XX },
909 { "mov", Sw, Ev, XX },
910 { "pop", Ev, XX, XX },
911 /* 90 */
912 { "nop", XX, XX, XX },
913 /* FIXME: NOP with REPz prefix is called PAUSE. */
914 { "xchg", RMeCX, eAX, XX },
915 { "xchg", RMeDX, eAX, XX },
916 { "xchg", RMeBX, eAX, XX },
917 { "xchg", RMeSP, eAX, XX },
918 { "xchg", RMeBP, eAX, XX },
919 { "xchg", RMeSI, eAX, XX },
920 { "xchg", RMeDI, eAX, XX },
921 /* 98 */
922 { "cW", XX, XX, XX }, /* cwde and cbw */
923 { "cR", XX, XX, XX }, /* cdq and cwd */
924 { "lcall", Ap, XX, XX },
925 { "(bad)", XX, XX, XX }, /* fwait */
926 { "pushf", XX, XX, XX },
927 { "popf", XX, XX, XX },
928 { "sahf", XX, XX, XX },
929 { "lahf", XX, XX, XX },
930 /* a0 */
931 { "mov", AL, Ob, XX },
932 { "mov", eAX, Ov, XX },
933 { "mov", Ob, AL, XX },
934 { "mov", Ov, eAX, XX },
935 { "movs", Yb, Xb, XX },
936 { "movs", Yv, Xv, XX },
937 { "cmps", Xb, Yb, XX },
938 { "cmps", Xv, Yv, XX },
939 /* a8 */
940 { "test", AL, Ib, XX },
941 { "test", eAX, Iv, XX },
942 { "stos", Yb, AL, XX },
943 { "stos", Yv, eAX, XX },
944 { "lods", AL, Xb, XX },
945 { "lods", eAX, Xv, XX },
946 { "scas", AL, Yb, XX },
947 { "scas", eAX, Yv, XX },
948 /* b0 */
949 { "mov", RMAL, Ib, XX },
950 { "mov", RMCL, Ib, XX },
951 { "mov", RMDL, Ib, XX },
952 { "mov", RMBL, Ib, XX },
953 { "mov", RMAH, Ib, XX },
954 { "mov", RMCH, Ib, XX },
955 { "mov", RMDH, Ib, XX },
956 { "mov", RMBH, Ib, XX },
957 /* b8 */
958 { "mov", RMeAX, Iv, XX },
959 { "mov", RMeCX, Iv, XX },
960 { "mov", RMeDX, Iv, XX },
961 { "mov", RMeBX, Iv, XX },
962 { "mov", RMeSP, Iv, XX },
963 { "mov", RMeBP, Iv, XX },
964 { "mov", RMeSI, Iv, XX },
965 { "mov", RMeDI, Iv, XX },
966 /* c0 */
967 { GRP2b },
968 { GRP2S },
969 { "ret", Iw, XX, XX },
970 { "ret", XX, XX, XX },
971 { "les", Gv, Mp, XX },
972 { "lds", Gv, Mp, XX },
973 { "mov", Eb, Ib, XX },
974 { "mov", Ev, Iv, XX },
975 /* c8 */
976 { "enter", Iw, Ib, XX },
977 { "leave", XX, XX, XX },
978 { "lret", Iw, XX, XX },
979 { "lret", XX, XX, XX },
980 { "int3", XX, XX, XX },
981 { "int", Ib, XX, XX },
982 { "into", XX, XX, XX },
983 { "iret", XX, XX, XX },
984 /* d0 */
985 { GRP2b_one },
986 { GRP2S_one },
987 { GRP2b_cl },
988 { GRP2S_cl },
989 { "aam", sIb, XX, XX },
990 { "aad", sIb, XX, XX },
991 { "(bad)", XX, XX, XX },
992 { "xlat", DSBX, XX, XX },
993 /* d8 */
994 { FLOAT },
995 { FLOAT },
996 { FLOAT },
997 { FLOAT },
998 { FLOAT },
999 { FLOAT },
1000 { FLOAT },
1001 { FLOAT },
1002 /* e0 */
1003 { "loopne", Jb, XX, XX },
1004 { "loope", Jb, XX, XX },
1005 { "loop", Jb, XX, XX },
1006 { "jEcxz", Jb, XX, XX },
1007 { "in", AL, Ib, XX },
1008 { "in", eAX, Ib, XX },
1009 { "out", Ib, AL, XX },
1010 { "out", Ib, eAX, XX },
1011 /* e8 */
1012 { "call", Jv, XX, XX },
1013 { "jmp", Jv, XX, XX },
1014 { "ljmp", Ap, XX, XX },
1015 { "jmp", Jb, XX, XX },
1016 { "in", AL, indirDX, XX },
1017 { "in", eAX, indirDX, XX },
1018 { "out", indirDX, AL, XX },
1019 { "out", indirDX, eAX, XX },
1020 /* f0 */
1021 { "(bad)", XX, XX, XX }, /* lock prefix */
1022 { "(bad)", XX, XX, XX },
1023 { "(bad)", XX, XX, XX }, /* repne */
1024 { "(bad)", XX, XX, XX }, /* repz */
1025 { "hlt", XX, XX, XX },
1026 { "cmc", XX, XX, XX },
1027 { GRP3b },
1028 { GRP3S },
1029 /* f8 */
1030 { "clc", XX, XX, XX },
1031 { "stc", XX, XX, XX },
1032 { "cli", XX, XX, XX },
1033 { "sti", XX, XX, XX },
1034 { "cld", XX, XX, XX },
1035 { "std", XX, XX, XX },
1036 { GRP4 },
1037 { GRP5 },
1038 };
1039
1040 /* 64bit mode is having some instruction set differences, so separate table is
1041 needed. */
1042 static const struct dis386 disx86_64_att[] = {
1043 /* 00 */
1044 { "addB", Eb, Gb, XX },
1045 { "addS", Ev, Gv, XX },
1046 { "addB", Gb, Eb, XX },
1047 { "addS", Gv, Ev, XX },
1048 { "addB", AL, Ib, XX },
1049 { "addS", eAX, Iv, XX },
1050 { "(bad)", XX, XX, XX }, /* Reserved. */
1051 { "(bad)", XX, XX, XX }, /* Reserved. */
1052 /* 08 */
1053 { "orB", Eb, Gb, XX },
1054 { "orS", Ev, Gv, XX },
1055 { "orB", Gb, Eb, XX },
1056 { "orS", Gv, Ev, XX },
1057 { "orB", AL, Ib, XX },
1058 { "orS", eAX, Iv, XX },
1059 { "(bad)", XX, XX, XX }, /* Reserved. */
1060 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
1061 /* 10 */
1062 { "adcB", Eb, Gb, XX },
1063 { "adcS", Ev, Gv, XX },
1064 { "adcB", Gb, Eb, XX },
1065 { "adcS", Gv, Ev, XX },
1066 { "adcB", AL, Ib, XX },
1067 { "adcS", eAX, Iv, XX },
1068 { "(bad)", XX, XX, XX }, /* Reserved. */
1069 { "(bad)", XX, XX, XX }, /* Reserved. */
1070 /* 18 */
1071 { "sbbB", Eb, Gb, XX },
1072 { "sbbS", Ev, Gv, XX },
1073 { "sbbB", Gb, Eb, XX },
1074 { "sbbS", Gv, Ev, XX },
1075 { "sbbB", AL, Ib, XX },
1076 { "sbbS", eAX, Iv, XX },
1077 { "(bad)", XX, XX, XX }, /* Reserved. */
1078 { "(bad)", XX, XX, XX }, /* Reserved. */
1079 /* 20 */
1080 { "andB", Eb, Gb, XX },
1081 { "andS", Ev, Gv, XX },
1082 { "andB", Gb, Eb, XX },
1083 { "andS", Gv, Ev, XX },
1084 { "andB", AL, Ib, XX },
1085 { "andS", eAX, Iv, XX },
1086 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
1087 { "(bad)", XX, XX, XX }, /* Reserved. */
1088 /* 28 */
1089 { "subB", Eb, Gb, XX },
1090 { "subS", Ev, Gv, XX },
1091 { "subB", Gb, Eb, XX },
1092 { "subS", Gv, Ev, XX },
1093 { "subB", AL, Ib, XX },
1094 { "subS", eAX, Iv, XX },
1095 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
1096 { "(bad)", XX, XX, XX }, /* Reserved. */
1097 /* 30 */
1098 { "xorB", Eb, Gb, XX },
1099 { "xorS", Ev, Gv, XX },
1100 { "xorB", Gb, Eb, XX },
1101 { "xorS", Gv, Ev, XX },
1102 { "xorB", AL, Ib, XX },
1103 { "xorS", eAX, Iv, XX },
1104 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
1105 { "(bad)", XX, XX, XX }, /* Reserved. */
1106 /* 38 */
1107 { "cmpB", Eb, Gb, XX },
1108 { "cmpS", Ev, Gv, XX },
1109 { "cmpB", Gb, Eb, XX },
1110 { "cmpS", Gv, Ev, XX },
1111 { "cmpB", AL, Ib, XX },
1112 { "cmpS", eAX, Iv, XX },
1113 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
1114 { "(bad)", XX, XX, XX }, /* Reserved. */
1115 /* 40 */
1116 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1117 { "(bad)", XX, XX, XX },
1118 { "(bad)", XX, XX, XX },
1119 { "(bad)", XX, XX, XX },
1120 { "(bad)", XX, XX, XX },
1121 { "(bad)", XX, XX, XX },
1122 { "(bad)", XX, XX, XX },
1123 { "(bad)", XX, XX, XX },
1124 /* 48 */
1125 { "(bad)", XX, XX, XX },
1126 { "(bad)", XX, XX, XX },
1127 { "(bad)", XX, XX, XX },
1128 { "(bad)", XX, XX, XX },
1129 { "(bad)", XX, XX, XX },
1130 { "(bad)", XX, XX, XX },
1131 { "(bad)", XX, XX, XX },
1132 { "(bad)", XX, XX, XX },
1133 /* 50 */
1134 { "pushI", RMrAX, XX, XX },
1135 { "pushI", RMrCX, XX, XX },
1136 { "pushI", RMrDX, XX, XX },
1137 { "pushI", RMrBX, XX, XX },
1138 { "pushI", RMrSP, XX, XX },
1139 { "pushI", RMrBP, XX, XX },
1140 { "pushI", RMrSI, XX, XX },
1141 { "pushI", RMrDI, XX, XX },
1142 /* 58 */
1143 { "popI", RMrAX, XX, XX },
1144 { "popI", RMrCX, XX, XX },
1145 { "popI", RMrDX, XX, XX },
1146 { "popI", RMrBX, XX, XX },
1147 { "popI", RMrSP, XX, XX },
1148 { "popI", RMrBP, XX, XX },
1149 { "popI", RMrSI, XX, XX },
1150 { "popI", RMrDI, XX, XX },
1151 /* 60 */
1152 { "(bad)", XX, XX, XX }, /* reserved. */
1153 { "(bad)", XX, XX, XX }, /* reserved. */
1154 { "(bad)", XX, XX, XX }, /* reserved. */
1155 { "movslR", Gv, Ed, XX },
1156 { "(bad)", XX, XX, XX }, /* seg fs */
1157 { "(bad)", XX, XX, XX }, /* seg gs */
1158 { "(bad)", XX, XX, XX }, /* op size prefix */
1159 { "(bad)", XX, XX, XX }, /* adr size prefix */
1160 /* 68 */
1161 { "pushI", Iq, XX, XX }, /* 386 book wrong */
1162 { "imulS", Gv, Ev, Iv },
1163 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
1164 { "imulS", Gv, Ev, sIb },
1165 { "insb", Yb, indirDX, XX },
1166 { "insR", Yv, indirDX, XX },
1167 { "outsb", indirDX, Xb, XX },
1168 { "outsR", indirDX, Xv, XX },
1169 /* 70 */
1170 { "joH", Jb, cond_jump_flag, XX },
1171 { "jnoH", Jb, cond_jump_flag, XX },
1172 { "jbH", Jb, cond_jump_flag, XX },
1173 { "jaeH", Jb, cond_jump_flag, XX },
1174 { "jeH", Jb, cond_jump_flag, XX },
1175 { "jneH", Jb, cond_jump_flag, XX },
1176 { "jbeH", Jb, cond_jump_flag, XX },
1177 { "jaH", Jb, cond_jump_flag, XX },
1178 /* 78 */
1179 { "jsH", Jb, cond_jump_flag, XX },
1180 { "jnsH", Jb, cond_jump_flag, XX },
1181 { "jpH", Jb, cond_jump_flag, XX },
1182 { "jnpH", Jb, cond_jump_flag, XX },
1183 { "jlH", Jb, cond_jump_flag, XX },
1184 { "jgeH", Jb, cond_jump_flag, XX },
1185 { "jleH", Jb, cond_jump_flag, XX },
1186 { "jgH", Jb, cond_jump_flag, XX },
1187 /* 80 */
1188 { GRP1b },
1189 { GRP1S },
1190 { "(bad)", XX, XX, XX },
1191 { GRP1Ss },
1192 { "testB", Eb, Gb, XX },
1193 { "testS", Ev, Gv, XX },
1194 { "xchgB", Eb, Gb, XX },
1195 { "xchgS", Ev, Gv, XX },
1196 /* 88 */
1197 { "movB", Eb, Gb, XX },
1198 { "movS", Ev, Gv, XX },
1199 { "movB", Gb, Eb, XX },
1200 { "movS", Gv, Ev, XX },
1201 { "movQ", Ev, Sw, XX },
1202 { "leaS", Gv, M, XX },
1203 { "movQ", Sw, Ev, XX },
1204 { "popI", Ev, XX, XX },
1205 /* 90 */
1206 { "nop", XX, XX, XX },
1207 /* FIXME: NOP with REPz prefix is called PAUSE. */
1208 { "xchgS", RMeCX, eAX, XX },
1209 { "xchgS", RMeDX, eAX, XX },
1210 { "xchgS", RMeBX, eAX, XX },
1211 { "xchgS", RMeSP, eAX, XX },
1212 { "xchgS", RMeBP, eAX, XX },
1213 { "xchgS", RMeSI, eAX, XX },
1214 { "xchgS", RMeDI, eAX, XX },
1215 /* 98 */
1216 { "cWtR", XX, XX, XX },
1217 { "cRtO", XX, XX, XX },
1218 { "(bad)", XX, XX, XX }, /* reserved. */
1219 { "(bad)", XX, XX, XX }, /* fwait */
1220 { "pushfI", XX, XX, XX },
1221 { "popfI", XX, XX, XX },
1222 { "(bad)", XX, XX, XX }, /* reserved. */
1223 { "(bad)", XX, XX, XX }, /* reserved. */
1224 /* a0 */
1225 { "movB", AL, Ob64, XX },
1226 { "movS", eAX, Ov64, XX },
1227 { "movB", Ob64, AL, XX },
1228 { "movS", Ov64, eAX, XX },
1229 { "movsb", Yb, Xb, XX },
1230 { "movsR", Yv, Xv, XX },
1231 { "cmpsb", Xb, Yb, XX },
1232 { "cmpsR", Xv, Yv, XX },
1233 /* a8 */
1234 { "testB", AL, Ib, XX },
1235 { "testS", eAX, Iv, XX },
1236 { "stosB", Yb, AL, XX },
1237 { "stosS", Yv, eAX, XX },
1238 { "lodsB", AL, Xb, XX },
1239 { "lodsS", eAX, Xv, XX },
1240 { "scasB", AL, Yb, XX },
1241 { "scasS", eAX, Yv, XX },
1242 /* b0 */
1243 { "movB", RMAL, Ib, XX },
1244 { "movB", RMCL, Ib, XX },
1245 { "movB", RMDL, Ib, XX },
1246 { "movB", RMBL, Ib, XX },
1247 { "movB", RMAH, Ib, XX },
1248 { "movB", RMCH, Ib, XX },
1249 { "movB", RMDH, Ib, XX },
1250 { "movB", RMBH, Ib, XX },
1251 /* b8 */
1252 { "movS", RMeAX, Iv64, XX },
1253 { "movS", RMeCX, Iv64, XX },
1254 { "movS", RMeDX, Iv64, XX },
1255 { "movS", RMeBX, Iv64, XX },
1256 { "movS", RMeSP, Iv64, XX },
1257 { "movS", RMeBP, Iv64, XX },
1258 { "movS", RMeSI, Iv64, XX },
1259 { "movS", RMeDI, Iv64, XX },
1260 /* c0 */
1261 { GRP2b },
1262 { GRP2S },
1263 { "retI", Iw, XX, XX },
1264 { "retI", XX, XX, XX },
1265 { "(bad)", XX, XX, XX }, /* reserved. */
1266 { "ldsS", Gv, Mp, XX },
1267 { "movA", Eb, Ib, XX },
1268 { "movQ", Ev, Iv, XX },
1269 /* c8 */
1270 { "enterI", Iw, Ib, XX },
1271 { "leaveI", XX, XX, XX },
1272 { "lretP", Iw, XX, XX },
1273 { "lretP", XX, XX, XX },
1274 { "int3", XX, XX, XX },
1275 { "int", Ib, XX, XX },
1276 { "(bad)", XX, XX, XX }, /* reserved. */
1277 { "iretP", XX, XX, XX },
1278 /* d0 */
1279 { GRP2b_one },
1280 { GRP2S_one },
1281 { GRP2b_cl },
1282 { GRP2S_cl },
1283 { "(bad)", XX, XX, XX }, /* reserved. */
1284 { "(bad)", XX, XX, XX }, /* reserved. */
1285 { "(bad)", XX, XX, XX }, /* reserved. */
1286 { "xlat", DSBX, XX, XX },
1287 /* d8 */
1288 { FLOAT },
1289 { FLOAT },
1290 { FLOAT },
1291 { FLOAT },
1292 { FLOAT },
1293 { FLOAT },
1294 { FLOAT },
1295 { FLOAT },
1296 /* e0 */
1297 { "loopneFH", Jb, loop_jcxz_flag, XX },
1298 { "loopeFH", Jb, loop_jcxz_flag, XX },
1299 { "loopFH", Jb, loop_jcxz_flag, XX },
1300 { "jEcxzH", Jb, loop_jcxz_flag, XX },
1301 { "inB", AL, Ib, XX },
1302 { "inS", eAX, Ib, XX },
1303 { "outB", Ib, AL, XX },
1304 { "outS", Ib, eAX, XX },
1305 /* e8 */
1306 { "callI", Jv, XX, XX },
1307 { "jmpI", Jv, XX, XX },
1308 { "(bad)", XX, XX, XX }, /* reserved. */
1309 { "jmp", Jb, XX, XX },
1310 { "inB", AL, indirDX, XX },
1311 { "inS", eAX, indirDX, XX },
1312 { "outB", indirDX, AL, XX },
1313 { "outS", indirDX, eAX, XX },
1314 /* f0 */
1315 { "(bad)", XX, XX, XX }, /* lock prefix */
1316 { "(bad)", XX, XX, XX },
1317 { "(bad)", XX, XX, XX }, /* repne */
1318 { "(bad)", XX, XX, XX }, /* repz */
1319 { "hlt", XX, XX, XX },
1320 { "cmc", XX, XX, XX },
1321 { GRP3b },
1322 { GRP3S },
1323 /* f8 */
1324 { "clc", XX, XX, XX },
1325 { "stc", XX, XX, XX },
1326 { "cli", XX, XX, XX },
1327 { "sti", XX, XX, XX },
1328 { "cld", XX, XX, XX },
1329 { "std", XX, XX, XX },
1330 { GRP4 },
1331 { GRP5 },
1332 };
1333
1334 static const struct dis386 dis386_64_intel[] = {
1335 /* 00 */
1336 { "add", Eb, Gb, XX },
1337 { "add", Ev, Gv, XX },
1338 { "add", Gb, Eb, XX },
1339 { "add", Gv, Ev, XX },
1340 { "add", AL, Ib, XX },
1341 { "add", eAX, Iv, XX },
1342 { "(bad)", XX, XX, XX }, /* Reserved. */
1343 { "(bad)", XX, XX, XX }, /* Reserved. */
1344 /* 08 */
1345 { "or", Eb, Gb, XX },
1346 { "or", Ev, Gv, XX },
1347 { "or", Gb, Eb, XX },
1348 { "or", Gv, Ev, XX },
1349 { "or", AL, Ib, XX },
1350 { "or", eAX, Iv, XX },
1351 { "(bad)", XX, XX, XX }, /* Reserved. */
1352 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
1353 /* 10 */
1354 { "adc", Eb, Gb, XX },
1355 { "adc", Ev, Gv, XX },
1356 { "adc", Gb, Eb, XX },
1357 { "adc", Gv, Ev, XX },
1358 { "adc", AL, Ib, XX },
1359 { "adc", eAX, Iv, XX },
1360 { "(bad)", XX, XX, XX }, /* Reserved. */
1361 { "(bad)", XX, XX, XX }, /* Reserved. */
1362 /* 18 */
1363 { "sbb", Eb, Gb, XX },
1364 { "sbb", Ev, Gv, XX },
1365 { "sbb", Gb, Eb, XX },
1366 { "sbb", Gv, Ev, XX },
1367 { "sbb", AL, Ib, XX },
1368 { "sbb", eAX, Iv, XX },
1369 { "(bad)", XX, XX, XX }, /* Reserved. */
1370 { "(bad)", XX, XX, XX }, /* Reserved. */
1371 /* 20 */
1372 { "and", Eb, Gb, XX },
1373 { "and", Ev, Gv, XX },
1374 { "and", Gb, Eb, XX },
1375 { "and", Gv, Ev, XX },
1376 { "and", AL, Ib, XX },
1377 { "and", eAX, Iv, XX },
1378 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
1379 { "(bad)", XX, XX, XX }, /* Reserved. */
1380 /* 28 */
1381 { "sub", Eb, Gb, XX },
1382 { "sub", Ev, Gv, XX },
1383 { "sub", Gb, Eb, XX },
1384 { "sub", Gv, Ev, XX },
1385 { "sub", AL, Ib, XX },
1386 { "sub", eAX, Iv, XX },
1387 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
1388 { "(bad)", XX, XX, XX }, /* Reserved. */
1389 /* 30 */
1390 { "xor", Eb, Gb, XX },
1391 { "xor", Ev, Gv, XX },
1392 { "xor", Gb, Eb, XX },
1393 { "xor", Gv, Ev, XX },
1394 { "xor", AL, Ib, XX },
1395 { "xor", eAX, Iv, XX },
1396 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
1397 { "(bad)", XX, XX, XX }, /* Reserved. */
1398 /* 38 */
1399 { "cmp", Eb, Gb, XX },
1400 { "cmp", Ev, Gv, XX },
1401 { "cmp", Gb, Eb, XX },
1402 { "cmp", Gv, Ev, XX },
1403 { "cmp", AL, Ib, XX },
1404 { "cmp", eAX, Iv, XX },
1405 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
1406 { "(bad)", XX, XX, XX }, /* Reserved. */
1407 /* 40 */
1408 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1409 { "(bad)", XX, XX, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "(bad)", XX, XX, XX },
1416 /* 48 */
1417 { "(bad)", XX, XX, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "(bad)", XX, XX, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "(bad)", XX, XX, XX },
1423 { "(bad)", XX, XX, XX },
1424 { "(bad)", XX, XX, XX },
1425 /* 50 */
1426 { "push", RMrAX, XX, XX },
1427 { "push", RMrCX, XX, XX },
1428 { "push", RMrDX, XX, XX },
1429 { "push", RMrBX, XX, XX },
1430 { "push", RMrSP, XX, XX },
1431 { "push", RMrBP, XX, XX },
1432 { "push", RMrSI, XX, XX },
1433 { "push", RMrDI, XX, XX },
1434 /* 58 */
1435 { "pop", RMrAX, XX, XX },
1436 { "pop", RMrCX, XX, XX },
1437 { "pop", RMrDX, XX, XX },
1438 { "pop", RMrBX, XX, XX },
1439 { "pop", RMrSP, XX, XX },
1440 { "pop", RMrBP, XX, XX },
1441 { "pop", RMrSI, XX, XX },
1442 { "pop", RMrDI, XX, XX },
1443 /* 60 */
1444 { "(bad)", XX, XX, XX }, /* Reserved. */
1445 { "(bad)", XX, XX, XX }, /* Reserved. */
1446 { "(bad)", XX, XX, XX }, /* Reserved. */
1447 { "movsx", Gv, Ed, XX },
1448 { "(bad)", XX, XX, XX }, /* seg fs */
1449 { "(bad)", XX, XX, XX }, /* seg gs */
1450 { "(bad)", XX, XX, XX }, /* op size prefix */
1451 { "(bad)", XX, XX, XX }, /* adr size prefix */
1452 /* 68 */
1453 { "push", Iq, XX, XX }, /* 386 book wrong */
1454 { "imul", Gv, Ev, Iv },
1455 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
1456 { "imul", Gv, Ev, sIb },
1457 { "ins", Yb, indirDX, XX },
1458 { "ins", Yv, indirDX, XX },
1459 { "outs", indirDX, Xb, XX },
1460 { "outs", indirDX, Xv, XX },
1461 /* 70 */
1462 { "jo", Jb, XX, XX },
1463 { "jno", Jb, XX, XX },
1464 { "jb", Jb, XX, XX },
1465 { "jae", Jb, XX, XX },
1466 { "je", Jb, XX, XX },
1467 { "jne", Jb, XX, XX },
1468 { "jbe", Jb, XX, XX },
1469 { "ja", Jb, XX, XX },
1470 /* 78 */
1471 { "js", Jb, XX, XX },
1472 { "jns", Jb, XX, XX },
1473 { "jp", Jb, XX, XX },
1474 { "jnp", Jb, XX, XX },
1475 { "jl", Jb, XX, XX },
1476 { "jge", Jb, XX, XX },
1477 { "jle", Jb, XX, XX },
1478 { "jg", Jb, XX, XX },
1479 /* 80 */
1480 { GRP1b },
1481 { GRP1S },
1482 { "(bad)", XX, XX, XX },
1483 { GRP1Ss },
1484 { "test", Eb, Gb, XX },
1485 { "test", Ev, Gv, XX },
1486 { "xchg", Eb, Gb, XX },
1487 { "xchg", Ev, Gv, XX },
1488 /* 88 */
1489 { "mov", Eb, Gb, XX },
1490 { "mov", Ev, Gv, XX },
1491 { "mov", Gb, Eb, XX },
1492 { "mov", Gv, Ev, XX },
1493 { "mov", Ev, Sw, XX },
1494 { "lea", Gv, M, XX },
1495 { "mov", Sw, Ev, XX },
1496 { "pop", Ev, XX, XX },
1497 /* 90 */
1498 { "nop", XX, XX, XX },
1499 /* FIXME: NOP with REPz prefix is called PAUSE. */
1500 { "xchg", RMeCX, eAX, XX },
1501 { "xchg", RMeDX, eAX, XX },
1502 { "xchg", RMeBX, eAX, XX },
1503 { "xchg", RMeSP, eAX, XX },
1504 { "xchg", RMeBP, eAX, XX },
1505 { "xchg", RMeSI, eAX, XX },
1506 { "xchg", RMeDI, eAX, XX },
1507 /* 98 */
1508 { "cW", XX, XX, XX }, /* cwde and cbw */
1509 { "cR", XX, XX, XX }, /* cdq and cwd */
1510 { "(bad)", XX, XX, XX }, /* Reserved. */
1511 { "(bad)", XX, XX, XX }, /* fwait */
1512 { "pushf", XX, XX, XX },
1513 { "popf", XX, XX, XX },
1514 { "(bad)", XX, XX, XX }, /* Reserved. */
1515 { "(bad)", XX, XX, XX }, /* Reserved. */
1516 /* a0 */
1517 { "mov", AL, Ob, XX },
1518 { "mov", eAX, Ov, XX },
1519 { "mov", Ob, AL, XX },
1520 { "mov", Ov, eAX, XX },
1521 { "movs", Yb, Xb, XX },
1522 { "movs", Yv, Xv, XX },
1523 { "cmps", Xb, Yb, XX },
1524 { "cmps", Xv, Yv, XX },
1525 /* a8 */
1526 { "test", AL, Ib, XX },
1527 { "test", eAX, Iv, XX },
1528 { "stos", Yb, AL, XX },
1529 { "stos", Yv, eAX, XX },
1530 { "lods", AL, Xb, XX },
1531 { "lods", eAX, Xv, XX },
1532 { "scas", AL, Yb, XX },
1533 { "scas", eAX, Yv, XX },
1534 /* b0 */
1535 { "mov", RMAL, Ib, XX },
1536 { "mov", RMCL, Ib, XX },
1537 { "mov", RMDL, Ib, XX },
1538 { "mov", RMBL, Ib, XX },
1539 { "mov", RMAH, Ib, XX },
1540 { "mov", RMCH, Ib, XX },
1541 { "mov", RMDH, Ib, XX },
1542 { "mov", RMBH, Ib, XX },
1543 /* b8 */
1544 { "mov", RMeAX, Iv, XX },
1545 { "mov", RMeCX, Iv, XX },
1546 { "mov", RMeDX, Iv, XX },
1547 { "mov", RMeBX, Iv, XX },
1548 { "mov", RMeSP, Iv, XX },
1549 { "mov", RMeBP, Iv, XX },
1550 { "mov", RMeSI, Iv, XX },
1551 { "mov", RMeDI, Iv, XX },
1552 /* c0 */
1553 { GRP2b },
1554 { GRP2S },
1555 { "ret", Iw, XX, XX },
1556 { "ret", XX, XX, XX },
1557 { "(bad)", XX, XX, XX }, /* Reserved. */
1558 { "lds", Gv, Mp, XX },
1559 { "mov", Eb, Ib, XX },
1560 { "mov", Ev, Iv, XX },
1561 /* c8 */
1562 { "enter", Iw, Ib, XX },
1563 { "leave", XX, XX, XX },
1564 { "lret", Iw, XX, XX },
1565 { "lret", XX, XX, XX },
1566 { "int3", XX, XX, XX },
1567 { "int", Ib, XX, XX },
1568 { "(bad)", XX, XX, XX }, /* Reserved. */
1569 { "iret", XX, XX, XX },
1570 /* d0 */
1571 { GRP2b_one },
1572 { GRP2S_one },
1573 { GRP2b_cl },
1574 { GRP2S_cl },
1575 { "(bad)", XX, XX, XX }, /* Reserved. */
1576 { "(bad)", XX, XX, XX }, /* Reserved. */
1577 { "(bad)", XX, XX, XX }, /* Reserved. */
1578 { "xlat", DSBX, XX, XX },
1579 /* d8 */
1580 { FLOAT },
1581 { FLOAT },
1582 { FLOAT },
1583 { FLOAT },
1584 { FLOAT },
1585 { FLOAT },
1586 { FLOAT },
1587 { FLOAT },
1588 /* e0 */
1589 { "loopne", Jb, XX, XX },
1590 { "loope", Jb, XX, XX },
1591 { "loop", Jb, XX, XX },
1592 { "jEcxz", Jb, XX, XX },
1593 { "in", AL, Ib, XX },
1594 { "in", eAX, Ib, XX },
1595 { "out", Ib, AL, XX },
1596 { "out", Ib, eAX, XX },
1597 /* e8 */
1598 { "call", Jv, XX, XX },
1599 { "jmp", Jv, XX, XX },
1600 { "(bad)", XX, XX, XX }, /* Reserved. */
1601 { "jmp", Jb, XX, XX },
1602 { "in", AL, indirDX, XX },
1603 { "in", eAX, indirDX, XX },
1604 { "out", indirDX, AL, XX },
1605 { "out", indirDX, eAX, XX },
1606 /* f0 */
1607 { "(bad)", XX, XX, XX }, /* lock prefix */
1608 { "(bad)", XX, XX, XX },
1609 { "(bad)", XX, XX, XX }, /* repne */
1610 { "(bad)", XX, XX, XX }, /* repz */
1611 { "hlt", XX, XX, XX },
1612 { "cmc", XX, XX, XX },
1613 { GRP3b },
1614 { GRP3S },
1615 /* f8 */
1616 { "clc", XX, XX, XX },
1617 { "stc", XX, XX, XX },
1618 { "cli", XX, XX, XX },
1619 { "sti", XX, XX, XX },
1620 { "cld", XX, XX, XX },
1621 { "std", XX, XX, XX },
1622 { GRP4 },
1623 { GRP5 },
1624 };
1625
1626 static const struct dis386 dis386_twobyte_att[] = {
1627 /* 00 */
1628 { GRP6 },
1629 { GRP7 },
1630 { "larS", Gv, Ew, XX },
1631 { "lslS", Gv, Ew, XX },
1632 { "(bad)", XX, XX, XX },
1633 { "syscall", XX, XX, XX },
1634 { "clts", XX, XX, XX },
1635 { "sysretP", XX, XX, XX },
1636 /* 08 */
1637 { "invd", XX, XX, XX },
1638 { "wbinvd", XX, XX, XX },
1639 { "(bad)", XX, XX, XX },
1640 { "ud2a", XX, XX, XX },
1641 { "(bad)", XX, XX, XX },
1642 { GRPAMD },
1643 { "femms", XX, XX, XX },
1644 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1645 /* 10 */
1646 { PREGRP8 },
1647 { PREGRP9 },
1648 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1649 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1650 { "unpcklpX", XM, EX, XX },
1651 { "unpckhpX", XM, EX, XX },
1652 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1653 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
1654 /* 18 */
1655 { GRP14 },
1656 { "(bad)", XX, XX, XX },
1657 { "(bad)", XX, XX, XX },
1658 { "(bad)", XX, XX, XX },
1659 { "(bad)", XX, XX, XX },
1660 { "(bad)", XX, XX, XX },
1661 { "(bad)", XX, XX, XX },
1662 { "(bad)", XX, XX, XX },
1663 /* 20 */
1664 /* these are all backward in appendix A of the intel book */
1665 { "movL", Rm, Cm, XX },
1666 { "movL", Rm, Dm, XX },
1667 { "movL", Cm, Rm, XX },
1668 { "movL", Dm, Rm, XX },
1669 { "movL", Rd, Td, XX },
1670 { "(bad)", XX, XX, XX },
1671 { "movL", Td, Rd, XX },
1672 { "(bad)", XX, XX, XX },
1673 /* 28 */
1674 { "movapX", XM, EX, XX },
1675 { "movapX", EX, XM, XX },
1676 { PREGRP2 },
1677 { "movntpX", Ev, XM, XX },
1678 { PREGRP4 },
1679 { PREGRP3 },
1680 { "ucomisX", XM,EX, XX },
1681 { "comisX", XM,EX, XX },
1682 /* 30 */
1683 { "wrmsr", XX, XX, XX },
1684 { "rdtsc", XX, XX, XX },
1685 { "rdmsr", XX, XX, XX },
1686 { "rdpmc", XX, XX, XX },
1687 { "sysenter", XX, XX, XX },
1688 { "sysexit", XX, XX, XX },
1689 { "(bad)", XX, XX, XX },
1690 { "(bad)", XX, XX, XX },
1691 /* 38 */
1692 { "(bad)", XX, XX, XX },
1693 { "(bad)", XX, XX, XX },
1694 { "(bad)", XX, XX, XX },
1695 { "(bad)", XX, XX, XX },
1696 { "(bad)", XX, XX, XX },
1697 { "(bad)", XX, XX, XX },
1698 { "(bad)", XX, XX, XX },
1699 { "(bad)", XX, XX, XX },
1700 /* 40 */
1701 { "cmovo", Gv, Ev, XX },
1702 { "cmovno", Gv, Ev, XX },
1703 { "cmovb", Gv, Ev, XX },
1704 { "cmovae", Gv, Ev, XX },
1705 { "cmove", Gv, Ev, XX },
1706 { "cmovne", Gv, Ev, XX },
1707 { "cmovbe", Gv, Ev, XX },
1708 { "cmova", Gv, Ev, XX },
1709 /* 48 */
1710 { "cmovs", Gv, Ev, XX },
1711 { "cmovns", Gv, Ev, XX },
1712 { "cmovp", Gv, Ev, XX },
1713 { "cmovnp", Gv, Ev, XX },
1714 { "cmovl", Gv, Ev, XX },
1715 { "cmovge", Gv, Ev, XX },
1716 { "cmovle", Gv, Ev, XX },
1717 { "cmovg", Gv, Ev, XX },
1718 /* 50 */
1719 { "movmskpX", Gd, XS, XX },
1720 { PREGRP13 },
1721 { PREGRP12 },
1722 { PREGRP11 },
1723 { "andpX", XM, EX, XX },
1724 { "andnpX", XM, EX, XX },
1725 { "orpX", XM, EX, XX },
1726 { "xorpX", XM, EX, XX },
1727 /* 58 */
1728 { PREGRP0 },
1729 { PREGRP10 },
1730 { PREGRP17 },
1731 { PREGRP16 },
1732 { PREGRP14 },
1733 { PREGRP7 },
1734 { PREGRP5 },
1735 { PREGRP6 },
1736 /* 60 */
1737 { "punpcklbw", MX, EM, XX },
1738 { "punpcklwd", MX, EM, XX },
1739 { "punpckldq", MX, EM, XX },
1740 { "packsswb", MX, EM, XX },
1741 { "pcmpgtb", MX, EM, XX },
1742 { "pcmpgtw", MX, EM, XX },
1743 { "pcmpgtd", MX, EM, XX },
1744 { "packuswb", MX, EM, XX },
1745 /* 68 */
1746 { "punpckhbw", MX, EM, XX },
1747 { "punpckhwd", MX, EM, XX },
1748 { "punpckhdq", MX, EM, XX },
1749 { "packssdw", MX, EM, XX },
1750 { PREGRP26 },
1751 { PREGRP24 },
1752 { "movd", MX, Ed, XX },
1753 { PREGRP19 },
1754 /* 70 */
1755 { PREGRP22 },
1756 { GRP10 },
1757 { GRP11 },
1758 { GRP12 },
1759 { "pcmpeqb", MX, EM, XX },
1760 { "pcmpeqw", MX, EM, XX },
1761 { "pcmpeqd", MX, EM, XX },
1762 { "emms", XX, XX, XX },
1763 /* 78 */
1764 { "(bad)", XX, XX, XX },
1765 { "(bad)", XX, XX, XX },
1766 { "(bad)", XX, XX, XX },
1767 { "(bad)", XX, XX, XX },
1768 { "(bad)", XX, XX, XX },
1769 { "(bad)", XX, XX, XX },
1770 { PREGRP23 },
1771 { PREGRP20 },
1772 /* 80 */
1773 { "joH", Jv, cond_jump_flag, XX },
1774 { "jnoH", Jv, cond_jump_flag, XX },
1775 { "jbH", Jv, cond_jump_flag, XX },
1776 { "jaeH", Jv, cond_jump_flag, XX },
1777 { "jeH", Jv, cond_jump_flag, XX },
1778 { "jneH", Jv, cond_jump_flag, XX },
1779 { "jbeH", Jv, cond_jump_flag, XX },
1780 { "jaH", Jv, cond_jump_flag, XX },
1781 /* 88 */
1782 { "jsH", Jv, cond_jump_flag, XX },
1783 { "jnsH", Jv, cond_jump_flag, XX },
1784 { "jpH", Jv, cond_jump_flag, XX },
1785 { "jnpH", Jv, cond_jump_flag, XX },
1786 { "jlH", Jv, cond_jump_flag, XX },
1787 { "jgeH", Jv, cond_jump_flag, XX },
1788 { "jleH", Jv, cond_jump_flag, XX },
1789 { "jgH", Jv, cond_jump_flag, XX },
1790 /* 90 */
1791 { "seto", Eb, XX, XX },
1792 { "setno", Eb, XX, XX },
1793 { "setb", Eb, XX, XX },
1794 { "setae", Eb, XX, XX },
1795 { "sete", Eb, XX, XX },
1796 { "setne", Eb, XX, XX },
1797 { "setbe", Eb, XX, XX },
1798 { "seta", Eb, XX, XX },
1799 /* 98 */
1800 { "sets", Eb, XX, XX },
1801 { "setns", Eb, XX, XX },
1802 { "setp", Eb, XX, XX },
1803 { "setnp", Eb, XX, XX },
1804 { "setl", Eb, XX, XX },
1805 { "setge", Eb, XX, XX },
1806 { "setle", Eb, XX, XX },
1807 { "setg", Eb, XX, XX },
1808 /* a0 */
1809 { "pushI", fs, XX, XX },
1810 { "popI", fs, XX, XX },
1811 { "cpuid", XX, XX, XX },
1812 { "btS", Ev, Gv, XX },
1813 { "shldS", Ev, Gv, Ib },
1814 { "shldS", Ev, Gv, CL },
1815 { "(bad)", XX, XX, XX },
1816 { "(bad)", XX, XX, XX },
1817 /* a8 */
1818 { "pushI", gs, XX, XX },
1819 { "popI", gs, XX, XX },
1820 { "rsm", XX, XX, XX },
1821 { "btsS", Ev, Gv, XX },
1822 { "shrdS", Ev, Gv, Ib },
1823 { "shrdS", Ev, Gv, CL },
1824 { GRP13 },
1825 { "imulS", Gv, Ev, XX },
1826 /* b0 */
1827 { "cmpxchgB", Eb, Gb, XX },
1828 { "cmpxchgS", Ev, Gv, XX },
1829 { "lssS", Gv, Mp, XX },
1830 { "btrS", Ev, Gv, XX },
1831 { "lfsS", Gv, Mp, XX },
1832 { "lgsS", Gv, Mp, XX },
1833 { "movzbR", Gv, Eb, XX },
1834 { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */
1835 /* b8 */
1836 { "(bad)", XX, XX, XX },
1837 { "ud2b", XX, XX, XX },
1838 { GRP8 },
1839 { "btcS", Ev, Gv, XX },
1840 { "bsfS", Gv, Ev, XX },
1841 { "bsrS", Gv, Ev, XX },
1842 { "movsbR", Gv, Eb, XX },
1843 { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */
1844 /* c0 */
1845 { "xaddB", Eb, Gb, XX },
1846 { "xaddS", Ev, Gv, XX },
1847 { PREGRP1 },
1848 { "movntiS", Ev, Gv, XX },
1849 { "pinsrw", MX, Ed, Ib },
1850 { "pextrw", Gd, MS, Ib },
1851 { "shufpX", XM, EX, Ib },
1852 { GRP9 },
1853 /* c8 */
1854 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
1855 { "bswap", RMeCX, XX, XX },
1856 { "bswap", RMeDX, XX, XX },
1857 { "bswap", RMeBX, XX, XX },
1858 { "bswap", RMeSP, XX, XX },
1859 { "bswap", RMeBP, XX, XX },
1860 { "bswap", RMeSI, XX, XX },
1861 { "bswap", RMeDI, XX, XX },
1862 /* d0 */
1863 { "(bad)", XX, XX, XX },
1864 { "psrlw", MX, EM, XX },
1865 { "psrld", MX, EM, XX },
1866 { "psrlq", MX, EM, XX },
1867 { "paddq", MX, EM, XX },
1868 { "pmullw", MX, EM, XX },
1869 { PREGRP21 },
1870 { "pmovmskb", Gd, MS, XX },
1871 /* d8 */
1872 { "psubusb", MX, EM, XX },
1873 { "psubusw", MX, EM, XX },
1874 { "pminub", MX, EM, XX },
1875 { "pand", MX, EM, XX },
1876 { "paddusb", MX, EM, XX },
1877 { "paddusw", MX, EM, XX },
1878 { "pmaxub", MX, EM, XX },
1879 { "pandn", MX, EM, XX },
1880 /* e0 */
1881 { "pavgb", MX, EM, XX },
1882 { "psraw", MX, EM, XX },
1883 { "psrad", MX, EM, XX },
1884 { "pavgw", MX, EM, XX },
1885 { "pmulhuw", MX, EM, XX },
1886 { "pmulhw", MX, EM, XX },
1887 { PREGRP15 },
1888 { PREGRP25 },
1889 /* e8 */
1890 { "psubsb", MX, EM, XX },
1891 { "psubsw", MX, EM, XX },
1892 { "pminsw", MX, EM, XX },
1893 { "por", MX, EM, XX },
1894 { "paddsb", MX, EM, XX },
1895 { "paddsw", MX, EM, XX },
1896 { "pmaxsw", MX, EM, XX },
1897 { "pxor", MX, EM, XX },
1898 /* f0 */
1899 { "(bad)", XX, XX, XX },
1900 { "psllw", MX, EM, XX },
1901 { "pslld", MX, EM, XX },
1902 { "psllq", MX, EM, XX },
1903 { "pmuludq", MX, EM, XX },
1904 { "pmaddwd", MX, EM, XX },
1905 { "psadbw", MX, EM, XX },
1906 { PREGRP18 },
1907 /* f8 */
1908 { "psubb", MX, EM, XX },
1909 { "psubw", MX, EM, XX },
1910 { "psubd", MX, EM, XX },
1911 { "psubq", MX, EM, XX },
1912 { "paddb", MX, EM, XX },
1913 { "paddw", MX, EM, XX },
1914 { "paddd", MX, EM, XX },
1915 { "(bad)", XX, XX, XX }
1916 };
1917
1918 static const struct dis386 dis386_twobyte_intel[] = {
1919 /* 00 */
1920 { GRP6 },
1921 { GRP7 },
1922 { "lar", Gv, Ew, XX },
1923 { "lsl", Gv, Ew, XX },
1924 { "(bad)", XX, XX, XX },
1925 { "syscall", XX, XX, XX },
1926 { "clts", XX, XX, XX },
1927 { "sysretP", XX, XX, XX },
1928 /* 08 */
1929 { "invd", XX, XX, XX },
1930 { "wbinvd", XX, XX, XX },
1931 { "(bad)", XX, XX, XX },
1932 { "ud2a", XX, XX, XX },
1933 { "(bad)", XX, XX, XX },
1934 { GRPAMD },
1935 { "femms" , XX, XX, XX},
1936 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1937 /* 10 */
1938 { PREGRP8 },
1939 { PREGRP9 },
1940 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1941 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1942 { "unpcklpX", XM, EX, XX },
1943 { "unpckhpX", XM, EX, XX },
1944 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1945 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
1946 /* 18 */
1947 { GRP14 },
1948 { "(bad)", XX, XX, XX },
1949 { "(bad)", XX, XX, XX },
1950 { "(bad)", XX, XX, XX },
1951 { "(bad)", XX, XX, XX },
1952 { "(bad)", XX, XX, XX },
1953 { "(bad)", XX, XX, XX },
1954 { "(bad)", XX, XX, XX },
1955 /* 20 */
1956 /* these are all backward in appendix A of the intel book */
1957 { "mov", Rm, Cm, XX },
1958 { "mov", Rm, Dm, XX },
1959 { "mov", Cm, Rm, XX },
1960 { "mov", Dm, Rm, XX },
1961 { "mov", Rd, Td, XX },
1962 { "(bad)", XX, XX, XX },
1963 { "mov", Td, Rd, XX },
1964 { "(bad)", XX, XX, XX },
1965 /* 28 */
1966 { "movapX", XM, EX, XX },
1967 { "movapX", EX, XM, XX },
1968 { PREGRP2 },
1969 { "movntpX", Ev, XM, XX },
1970 { PREGRP4 },
1971 { PREGRP3 },
1972 { "ucomisX", XM,EX, XX },
1973 { "comisX", XM,EX, XX },
1974 /* 30 */
1975 { "wrmsr", XX, XX, XX },
1976 { "rdtsc", XX, XX, XX },
1977 { "rdmsr", XX, XX, XX },
1978 { "rdpmc", XX, XX, XX },
1979 { "sysenter", XX, XX, XX },
1980 { "sysexit", XX, XX, XX },
1981 { "(bad)", XX, XX, XX },
1982 { "(bad)", XX, XX, XX },
1983 /* 38 */
1984 { "(bad)", XX, XX, XX },
1985 { "(bad)", XX, XX, XX },
1986 { "(bad)", XX, XX, XX },
1987 { "(bad)", XX, XX, XX },
1988 { "(bad)", XX, XX, XX },
1989 { "(bad)", XX, XX, XX },
1990 { "(bad)", XX, XX, XX },
1991 { "(bad)", XX, XX, XX },
1992 /* 40 */
1993 { "cmovo", Gv, Ev, XX },
1994 { "cmovno", Gv, Ev, XX },
1995 { "cmovb", Gv, Ev, XX },
1996 { "cmovae", Gv, Ev, XX },
1997 { "cmove", Gv, Ev, XX },
1998 { "cmovne", Gv, Ev, XX },
1999 { "cmovbe", Gv, Ev, XX },
2000 { "cmova", Gv, Ev, XX },
2001 /* 48 */
2002 { "cmovs", Gv, Ev, XX },
2003 { "cmovns", Gv, Ev, XX },
2004 { "cmovp", Gv, Ev, XX },
2005 { "cmovnp", Gv, Ev, XX },
2006 { "cmovl", Gv, Ev, XX },
2007 { "cmovge", Gv, Ev, XX },
2008 { "cmovle", Gv, Ev, XX },
2009 { "cmovg", Gv, Ev, XX },
2010 /* 50 */
2011 { "movmskpX", Gd, XS, XX },
2012 { PREGRP13 },
2013 { PREGRP12 },
2014 { PREGRP11 },
2015 { "andpX", XM, EX, XX },
2016 { "andnpX", XM, EX, XX },
2017 { "orpX", XM, EX, XX },
2018 { "xorpX", XM, EX, XX },
2019 /* 58 */
2020 { PREGRP0 },
2021 { PREGRP10 },
2022 { PREGRP17 },
2023 { PREGRP16 },
2024 { PREGRP14 },
2025 { PREGRP7 },
2026 { PREGRP5 },
2027 { PREGRP6 },
2028 /* 60 */
2029 { "punpcklbw", MX, EM, XX },
2030 { "punpcklwd", MX, EM, XX },
2031 { "punpckldq", MX, EM, XX },
2032 { "packsswb", MX, EM, XX },
2033 { "pcmpgtb", MX, EM, XX },
2034 { "pcmpgtw", MX, EM, XX },
2035 { "pcmpgtd", MX, EM, XX },
2036 { "packuswb", MX, EM, XX },
2037 /* 68 */
2038 { "punpckhbw", MX, EM, XX },
2039 { "punpckhwd", MX, EM, XX },
2040 { "punpckhdq", MX, EM, XX },
2041 { "packssdw", MX, EM, XX },
2042 { PREGRP26 },
2043 { PREGRP24 },
2044 { "movd", MX, Ed, XX },
2045 { PREGRP19 },
2046 /* 70 */
2047 { PREGRP22 },
2048 { GRP10 },
2049 { GRP11 },
2050 { GRP12 },
2051 { "pcmpeqb", MX, EM, XX },
2052 { "pcmpeqw", MX, EM, XX },
2053 { "pcmpeqd", MX, EM, XX },
2054 { "emms", XX, XX, XX },
2055 /* 78 */
2056 { "(bad)", XX, XX, XX },
2057 { "(bad)", XX, XX, XX },
2058 { "(bad)", XX, XX, XX },
2059 { "(bad)", XX, XX, XX },
2060 { "(bad)", XX, XX, XX },
2061 { "(bad)", XX, XX, XX },
2062 { PREGRP23 },
2063 { PREGRP20 },
2064 /* 80 */
2065 { "jo", Jv, XX, XX },
2066 { "jno", Jv, XX, XX },
2067 { "jb", Jv, XX, XX },
2068 { "jae", Jv, XX, XX },
2069 { "je", Jv, XX, XX },
2070 { "jne", Jv, XX, XX },
2071 { "jbe", Jv, XX, XX },
2072 { "ja", Jv, XX, XX },
2073 /* 88 */
2074 { "js", Jv, XX, XX },
2075 { "jns", Jv, XX, XX },
2076 { "jp", Jv, XX, XX },
2077 { "jnp", Jv, XX, XX },
2078 { "jl", Jv, XX, XX },
2079 { "jge", Jv, XX, XX },
2080 { "jle", Jv, XX, XX },
2081 { "jg", Jv, XX, XX },
2082 /* 90 */
2083 { "seto", Eb, XX, XX },
2084 { "setno", Eb, XX, XX },
2085 { "setb", Eb, XX, XX },
2086 { "setae", Eb, XX, XX },
2087 { "sete", Eb, XX, XX },
2088 { "setne", Eb, XX, XX },
2089 { "setbe", Eb, XX, XX },
2090 { "seta", Eb, XX, XX },
2091 /* 98 */
2092 { "sets", Eb, XX, XX },
2093 { "setns", Eb, XX, XX },
2094 { "setp", Eb, XX, XX },
2095 { "setnp", Eb, XX, XX },
2096 { "setl", Eb, XX, XX },
2097 { "setge", Eb, XX, XX },
2098 { "setle", Eb, XX, XX },
2099 { "setg", Eb, XX, XX },
2100 /* a0 */
2101 { "push", fs, XX, XX },
2102 { "pop", fs, XX, XX },
2103 { "cpuid", XX, XX, XX },
2104 { "bt", Ev, Gv, XX },
2105 { "shld", Ev, Gv, Ib },
2106 { "shld", Ev, Gv, CL },
2107 { "(bad)", XX, XX, XX },
2108 { "(bad)", XX, XX, XX },
2109 /* a8 */
2110 { "push", gs, XX, XX },
2111 { "pop", gs, XX, XX },
2112 { "rsm" , XX, XX, XX},
2113 { "bts", Ev, Gv, XX },
2114 { "shrd", Ev, Gv, Ib },
2115 { "shrd", Ev, Gv, CL },
2116 { GRP13 },
2117 { "imul", Gv, Ev, XX },
2118 /* b0 */
2119 { "cmpxchg", Eb, Gb, XX },
2120 { "cmpxchg", Ev, Gv, XX },
2121 { "lss", Gv, Mp, XX },
2122 { "btr", Ev, Gv, XX },
2123 { "lfs", Gv, Mp, XX },
2124 { "lgs", Gv, Mp, XX },
2125 { "movzx", Gv, Eb, XX },
2126 { "movzx", Gv, Ew, XX },
2127 /* b8 */
2128 { "(bad)", XX, XX, XX },
2129 { "ud2b", XX, XX, XX },
2130 { GRP8 },
2131 { "btc", Ev, Gv, XX },
2132 { "bsf", Gv, Ev, XX },
2133 { "bsr", Gv, Ev, XX },
2134 { "movsx", Gv, Eb, XX },
2135 { "movsx", Gv, Ew, XX },
2136 /* c0 */
2137 { "xadd", Eb, Gb, XX },
2138 { "xadd", Ev, Gv, XX },
2139 { PREGRP1 },
2140 { "movnti", Ev, Gv, XX },
2141 { "pinsrw", MX, Ed, Ib },
2142 { "pextrw", Gd, MS, Ib },
2143 { "shufpX", XM, EX, Ib },
2144 { GRP9 },
2145 /* c8 */
2146 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
2147 { "bswap", RMeCX, XX, XX },
2148 { "bswap", RMeDX, XX, XX },
2149 { "bswap", RMeBX, XX, XX },
2150 { "bswap", RMeSP, XX, XX },
2151 { "bswap", RMeBP, XX, XX },
2152 { "bswap", RMeSI, XX, XX },
2153 { "bswap", RMeDI, XX, XX },
2154 /* d0 */
2155 { "(bad)", XX, XX, XX },
2156 { "psrlw", MX, EM, XX },
2157 { "psrld", MX, EM, XX },
2158 { "psrlq", MX, EM, XX },
2159 { "paddq", MX, EM, XX },
2160 { "pmullw", MX, EM, XX },
2161 { PREGRP21 },
2162 { "pmovmskb", Gd, MS, XX },
2163 /* d8 */
2164 { "psubusb", MX, EM, XX },
2165 { "psubusw", MX, EM, XX },
2166 { "pminub", MX, EM, XX },
2167 { "pand", MX, EM, XX },
2168 { "paddusb", MX, EM, XX },
2169 { "paddusw", MX, EM, XX },
2170 { "pmaxub", MX, EM, XX },
2171 { "pandn", MX, EM, XX },
2172 /* e0 */
2173 { "pavgb", MX, EM, XX },
2174 { "psraw", MX, EM, XX },
2175 { "psrad", MX, EM, XX },
2176 { "pavgw", MX, EM, XX },
2177 { "pmulhuw", MX, EM, XX },
2178 { "pmulhw", MX, EM, XX },
2179 { PREGRP15 },
2180 { PREGRP25 },
2181 /* e8 */
2182 { "psubsb", MX, EM, XX },
2183 { "psubsw", MX, EM, XX },
2184 { "pminsw", MX, EM, XX },
2185 { "por", MX, EM, XX },
2186 { "paddsb", MX, EM, XX },
2187 { "paddsw", MX, EM, XX },
2188 { "pmaxsw", MX, EM, XX },
2189 { "pxor", MX, EM, XX },
2190 /* f0 */
2191 { "(bad)", XX, XX, XX },
2192 { "psllw", MX, EM, XX },
2193 { "pslld", MX, EM, XX },
2194 { "psllq", MX, EM, XX },
2195 { "pmuludq", MX, EM, XX },
2196 { "pmaddwd", MX, EM, XX },
2197 { "psadbw", MX, EM, XX },
2198 { PREGRP18 },
2199 /* f8 */
2200 { "psubb", MX, EM, XX },
2201 { "psubw", MX, EM, XX },
2202 { "psubd", MX, EM, XX },
2203 { "psubq", MX, EM, XX },
2204 { "paddb", MX, EM, XX },
2205 { "paddw", MX, EM, XX },
2206 { "paddd", MX, EM, XX },
2207 { "(bad)", XX, XX, XX }
2208 };
2209
2210 static const unsigned char onebyte_has_modrm[256] = {
2211 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2212 /* ------------------------------- */
2213 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
2214 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
2215 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
2216 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
2217 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
2218 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
2219 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
2220 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
2221 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
2222 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
2223 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
2224 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
2225 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
2226 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
2227 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
2228 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
2229 /* ------------------------------- */
2230 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2231 };
2232
2233 static const unsigned char twobyte_has_modrm[256] = {
2234 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2235 /* ------------------------------- */
2236 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
2237 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
2238 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
2239 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2240 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
2241 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
2242 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
2243 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
2244 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2245 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
2246 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
2247 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
2248 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
2249 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
2250 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
2251 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
2252 /* ------------------------------- */
2253 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2254 };
2255
2256 static const unsigned char twobyte_uses_SSE_prefix[256] = {
2257 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2258 /* ------------------------------- */
2259 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
2260 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
2261 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
2262 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2263 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
2264 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
2265 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
2266 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
2267 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2268 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
2269 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
2270 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
2271 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
2272 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
2273 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
2274 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
2275 /* ------------------------------- */
2276 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2277 };
2278
2279 static char obuf[100];
2280 static char *obufp;
2281 static char scratchbuf[100];
2282 static unsigned char *start_codep;
2283 static unsigned char *insn_codep;
2284 static unsigned char *codep;
2285 static disassemble_info *the_info;
2286 static int mod;
2287 static int rm;
2288 static int reg;
2289 static unsigned char need_modrm;
2290 static void oappend PARAMS ((const char *s));
2291
2292 /* If we are accessing mod/rm/reg without need_modrm set, then the
2293 values are stale. Hitting this abort likely indicates that you
2294 need to update onebyte_has_modrm or twobyte_has_modrm. */
2295 #define MODRM_CHECK if (!need_modrm) abort ()
2296
2297 static const char *names64[] = {
2298 "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi",
2299 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2300 };
2301 static const char *names32[] = {
2302 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
2303 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
2304 };
2305 static const char *names16[] = {
2306 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
2307 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
2308 };
2309 static const char *names8[] = {
2310 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
2311 };
2312 static const char *names8rex[] = {
2313 "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil",
2314 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
2315 };
2316 static const char *names_seg[] = {
2317 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2318 };
2319 static const char *index16[] = {
2320 "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
2321 };
2322
2323 static const struct dis386 grps[][8] = {
2324 /* GRP1b */
2325 {
2326 { "addA", Eb, Ib, XX },
2327 { "orA", Eb, Ib, XX },
2328 { "adcA", Eb, Ib, XX },
2329 { "sbbA", Eb, Ib, XX },
2330 { "andA", Eb, Ib, XX },
2331 { "subA", Eb, Ib, XX },
2332 { "xorA", Eb, Ib, XX },
2333 { "cmpA", Eb, Ib, XX }
2334 },
2335 /* GRP1S */
2336 {
2337 { "addQ", Ev, Iv, XX },
2338 { "orQ", Ev, Iv, XX },
2339 { "adcQ", Ev, Iv, XX },
2340 { "sbbQ", Ev, Iv, XX },
2341 { "andQ", Ev, Iv, XX },
2342 { "subQ", Ev, Iv, XX },
2343 { "xorQ", Ev, Iv, XX },
2344 { "cmpQ", Ev, Iv, XX }
2345 },
2346 /* GRP1Ss */
2347 {
2348 { "addQ", Ev, sIb, XX },
2349 { "orQ", Ev, sIb, XX },
2350 { "adcQ", Ev, sIb, XX },
2351 { "sbbQ", Ev, sIb, XX },
2352 { "andQ", Ev, sIb, XX },
2353 { "subQ", Ev, sIb, XX },
2354 { "xorQ", Ev, sIb, XX },
2355 { "cmpQ", Ev, sIb, XX }
2356 },
2357 /* GRP2b */
2358 {
2359 { "rolA", Eb, Ib, XX },
2360 { "rorA", Eb, Ib, XX },
2361 { "rclA", Eb, Ib, XX },
2362 { "rcrA", Eb, Ib, XX },
2363 { "shlA", Eb, Ib, XX },
2364 { "shrA", Eb, Ib, XX },
2365 { "(bad)", XX, XX, XX },
2366 { "sarA", Eb, Ib, XX },
2367 },
2368 /* GRP2S */
2369 {
2370 { "rolQ", Ev, Ib, XX },
2371 { "rorQ", Ev, Ib, XX },
2372 { "rclQ", Ev, Ib, XX },
2373 { "rcrQ", Ev, Ib, XX },
2374 { "shlQ", Ev, Ib, XX },
2375 { "shrQ", Ev, Ib, XX },
2376 { "(bad)", XX, XX, XX },
2377 { "sarQ", Ev, Ib, XX },
2378 },
2379 /* GRP2b_one */
2380 {
2381 { "rolA", Eb, XX, XX },
2382 { "rorA", Eb, XX, XX },
2383 { "rclA", Eb, XX, XX },
2384 { "rcrA", Eb, XX, XX },
2385 { "shlA", Eb, XX, XX },
2386 { "shrA", Eb, XX, XX },
2387 { "(bad)", XX, XX, XX },
2388 { "sarA", Eb, XX, XX },
2389 },
2390 /* GRP2S_one */
2391 {
2392 { "rolQ", Ev, XX, XX },
2393 { "rorQ", Ev, XX, XX },
2394 { "rclQ", Ev, XX, XX },
2395 { "rcrQ", Ev, XX, XX },
2396 { "shlQ", Ev, XX, XX },
2397 { "shrQ", Ev, XX, XX },
2398 { "(bad)", XX, XX, XX},
2399 { "sarQ", Ev, XX, XX },
2400 },
2401 /* GRP2b_cl */
2402 {
2403 { "rolA", Eb, CL, XX },
2404 { "rorA", Eb, CL, XX },
2405 { "rclA", Eb, CL, XX },
2406 { "rcrA", Eb, CL, XX },
2407 { "shlA", Eb, CL, XX },
2408 { "shrA", Eb, CL, XX },
2409 { "(bad)", XX, XX, XX },
2410 { "sarA", Eb, CL, XX },
2411 },
2412 /* GRP2S_cl */
2413 {
2414 { "rolQ", Ev, CL, XX },
2415 { "rorQ", Ev, CL, XX },
2416 { "rclQ", Ev, CL, XX },
2417 { "rcrQ", Ev, CL, XX },
2418 { "shlQ", Ev, CL, XX },
2419 { "shrQ", Ev, CL, XX },
2420 { "(bad)", XX, XX, XX },
2421 { "sarQ", Ev, CL, XX }
2422 },
2423 /* GRP3b */
2424 {
2425 { "testA", Eb, Ib, XX },
2426 { "(bad)", Eb, XX, XX },
2427 { "notA", Eb, XX, XX },
2428 { "negA", Eb, XX, XX },
2429 { "mulB", AL, Eb, XX },
2430 { "imulB", AL, Eb, XX },
2431 { "divB", AL, Eb, XX },
2432 { "idivB", AL, Eb, XX }
2433 },
2434 /* GRP3S */
2435 {
2436 { "testQ", Ev, Iv, XX },
2437 { "(bad)", XX, XX, XX },
2438 { "notQ", Ev, XX, XX },
2439 { "negQ", Ev, XX, XX },
2440 { "mulS", eAX, Ev, XX },
2441 { "imulS", eAX, Ev, XX },
2442 { "divS", eAX, Ev, XX },
2443 { "idivS", eAX, Ev, XX },
2444 },
2445 /* GRP4 */
2446 {
2447 { "incA", Eb, XX, XX },
2448 { "decA", Eb, XX, XX },
2449 { "(bad)", XX, XX, XX },
2450 { "(bad)", XX, XX, XX },
2451 { "(bad)", XX, XX, XX },
2452 { "(bad)", XX, XX, XX },
2453 { "(bad)", XX, XX, XX },
2454 { "(bad)", XX, XX, XX },
2455 },
2456 /* GRP5 */
2457 {
2458 { "incQ", Ev, XX, XX },
2459 { "decQ", Ev, XX, XX },
2460 { "callI", indirEv, XX, XX },
2461 { "lcallI", indirEv, XX, XX },
2462 { "jmpI", indirEv, XX, XX },
2463 { "ljmpI", indirEv, XX, XX },
2464 { "pushT", Ev, XX, XX },
2465 { "(bad)", XX, XX, XX },
2466 },
2467 /* GRP6 */
2468 {
2469 { "sldt", Ew, XX, XX },
2470 { "str", Ew, XX, XX },
2471 { "lldt", Ew, XX, XX },
2472 { "ltr", Ew, XX, XX },
2473 { "verr", Ew, XX, XX },
2474 { "verw", Ew, XX, XX },
2475 { "(bad)", XX, XX, XX },
2476 { "(bad)", XX, XX, XX }
2477 },
2478 /* GRP7 */
2479 {
2480 { "sgdt", Ew, XX, XX },
2481 { "sidt", Ew, XX, XX },
2482 { "lgdt", Ew, XX, XX },
2483 { "lidt", Ew, XX, XX },
2484 { "smsw", Ew, XX, XX },
2485 { "(bad)", XX, XX, XX },
2486 { "lmsw", Ew, XX, XX },
2487 { "invlpg", Ew, XX, XX },
2488 },
2489 /* GRP8 */
2490 {
2491 { "(bad)", XX, XX, XX },
2492 { "(bad)", XX, XX, XX },
2493 { "(bad)", XX, XX, XX },
2494 { "(bad)", XX, XX, XX },
2495 { "btQ", Ev, Ib, XX },
2496 { "btsQ", Ev, Ib, XX },
2497 { "btrQ", Ev, Ib, XX },
2498 { "btcQ", Ev, Ib, XX },
2499 },
2500 /* GRP9 */
2501 {
2502 { "(bad)", XX, XX, XX },
2503 { "cmpxchg8b", Ev, XX, XX },
2504 { "(bad)", XX, XX, XX },
2505 { "(bad)", XX, XX, XX },
2506 { "(bad)", XX, XX, XX },
2507 { "(bad)", XX, XX, XX },
2508 { "(bad)", XX, XX, XX },
2509 { "(bad)", XX, XX, XX },
2510 },
2511 /* GRP10 */
2512 {
2513 { "(bad)", XX, XX, XX },
2514 { "(bad)", XX, XX, XX },
2515 { "psrlw", MS, Ib, XX },
2516 { "(bad)", XX, XX, XX },
2517 { "psraw", MS, Ib, XX },
2518 { "(bad)", XX, XX, XX },
2519 { "psllw", MS, Ib, XX },
2520 { "(bad)", XX, XX, XX },
2521 },
2522 /* GRP11 */
2523 {
2524 { "(bad)", XX, XX, XX },
2525 { "(bad)", XX, XX, XX },
2526 { "psrld", MS, Ib, XX },
2527 { "(bad)", XX, XX, XX },
2528 { "psrad", MS, Ib, XX },
2529 { "(bad)", XX, XX, XX },
2530 { "pslld", MS, Ib, XX },
2531 { "(bad)", XX, XX, XX },
2532 },
2533 /* GRP12 */
2534 {
2535 { "(bad)", XX, XX, XX },
2536 { "(bad)", XX, XX, XX },
2537 { "psrlq", MS, Ib, XX },
2538 { "psrldq", MS, Ib, XX },
2539 { "(bad)", XX, XX, XX },
2540 { "(bad)", XX, XX, XX },
2541 { "psllq", MS, Ib, XX },
2542 { "pslldq", MS, Ib, XX },
2543 },
2544 /* GRP13 */
2545 {
2546 { "fxsave", Ev, XX, XX },
2547 { "fxrstor", Ev, XX, XX },
2548 { "ldmxcsr", Ev, XX, XX },
2549 { "stmxcsr", Ev, XX, XX },
2550 { "(bad)", XX, XX, XX },
2551 { "lfence", None, XX, XX },
2552 { "mfence", None, XX, XX },
2553 { "sfence", None, XX, XX },
2554 /* FIXME: the sfence with memory operand is clflush! */
2555 },
2556 /* GRP14 */
2557 {
2558 { "prefetchnta", Ev, XX, XX },
2559 { "prefetcht0", Ev, XX, XX },
2560 { "prefetcht1", Ev, XX, XX },
2561 { "prefetcht2", Ev, XX, XX },
2562 { "(bad)", XX, XX, XX },
2563 { "(bad)", XX, XX, XX },
2564 { "(bad)", XX, XX, XX },
2565 { "(bad)", XX, XX, XX },
2566 },
2567 /* GRPAMD */
2568 {
2569 { "prefetch", Eb, XX, XX },
2570 { "prefetchw", Eb, XX, XX },
2571 { "(bad)", XX, XX, XX },
2572 { "(bad)", XX, XX, XX },
2573 { "(bad)", XX, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "(bad)", XX, XX, XX },
2576 { "(bad)", XX, XX, XX },
2577 }
2578
2579 };
2580
2581 static const struct dis386 prefix_user_table[][4] = {
2582 /* PREGRP0 */
2583 {
2584 { "addps", XM, EX, XX },
2585 { "addss", XM, EX, XX },
2586 { "addpd", XM, EX, XX },
2587 { "addsd", XM, EX, XX },
2588 },
2589 /* PREGRP1 */
2590 {
2591 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
2592 { "", XM, EX, OPSIMD },
2593 { "", XM, EX, OPSIMD },
2594 { "", XM, EX, OPSIMD },
2595 },
2596 /* PREGRP2 */
2597 {
2598 { "cvtpi2ps", XM, EM, XX },
2599 { "cvtsi2ssY", XM, Ev, XX },
2600 { "cvtpi2pd", XM, EM, XX },
2601 { "cvtsi2sdY", XM, Ev, XX },
2602 },
2603 /* PREGRP3 */
2604 {
2605 { "cvtps2pi", MX, EX, XX },
2606 { "cvtss2siY", Gv, EX, XX },
2607 { "cvtpd2pi", MX, EX, XX },
2608 { "cvtsd2siY", Gv, EX, XX },
2609 },
2610 /* PREGRP4 */
2611 {
2612 { "cvttps2pi", MX, EX, XX },
2613 { "cvttss2siY", Gv, EX, XX },
2614 { "cvttpd2pi", MX, EX, XX },
2615 { "cvttsd2siY", Gv, EX, XX },
2616 },
2617 /* PREGRP5 */
2618 {
2619 { "divps", XM, EX, XX },
2620 { "divss", XM, EX, XX },
2621 { "divpd", XM, EX, XX },
2622 { "divsd", XM, EX, XX },
2623 },
2624 /* PREGRP6 */
2625 {
2626 { "maxps", XM, EX, XX },
2627 { "maxss", XM, EX, XX },
2628 { "maxpd", XM, EX, XX },
2629 { "maxsd", XM, EX, XX },
2630 },
2631 /* PREGRP7 */
2632 {
2633 { "minps", XM, EX, XX },
2634 { "minss", XM, EX, XX },
2635 { "minpd", XM, EX, XX },
2636 { "minsd", XM, EX, XX },
2637 },
2638 /* PREGRP8 */
2639 {
2640 { "movups", XM, EX, XX },
2641 { "movss", XM, EX, XX },
2642 { "movupd", XM, EX, XX },
2643 { "movsd", XM, EX, XX },
2644 },
2645 /* PREGRP9 */
2646 {
2647 { "movups", EX, XM, XX },
2648 { "movss", EX, XM, XX },
2649 { "movupd", EX, XM, XX },
2650 { "movsd", EX, XM, XX },
2651 },
2652 /* PREGRP10 */
2653 {
2654 { "mulps", XM, EX, XX },
2655 { "mulss", XM, EX, XX },
2656 { "mulpd", XM, EX, XX },
2657 { "mulsd", XM, EX, XX },
2658 },
2659 /* PREGRP11 */
2660 {
2661 { "rcpps", XM, EX, XX },
2662 { "rcpss", XM, EX, XX },
2663 { "(bad)", XM, EX, XX },
2664 { "(bad)", XM, EX, XX },
2665 },
2666 /* PREGRP12 */
2667 {
2668 { "rsqrtps", XM, EX, XX },
2669 { "rsqrtss", XM, EX, XX },
2670 { "(bad)", XM, EX, XX },
2671 { "(bad)", XM, EX, XX },
2672 },
2673 /* PREGRP13 */
2674 {
2675 { "sqrtps", XM, EX, XX },
2676 { "sqrtss", XM, EX, XX },
2677 { "sqrtpd", XM, EX, XX },
2678 { "sqrtsd", XM, EX, XX },
2679 },
2680 /* PREGRP14 */
2681 {
2682 { "subps", XM, EX, XX },
2683 { "subss", XM, EX, XX },
2684 { "subpd", XM, EX, XX },
2685 { "subsd", XM, EX, XX },
2686 },
2687 /* PREGRP15 */
2688 {
2689 { "(bad)", XM, EX, XX },
2690 { "cvtdq2pd", XM, EX, XX },
2691 { "cvttpd2dq", XM, EX, XX },
2692 { "cvtpd2dq", XM, EX, XX },
2693 },
2694 /* PREGRP16 */
2695 {
2696 { "cvtdq2ps", XM, EX, XX },
2697 { "cvttps2dq",XM, EX, XX },
2698 { "cvtps2dq",XM, EX, XX },
2699 { "(bad)", XM, EX, XX },
2700 },
2701 /* PREGRP17 */
2702 {
2703 { "cvtps2pd", XM, EX, XX },
2704 { "cvtss2sd", XM, EX, XX },
2705 { "cvtpd2ps", XM, EX, XX },
2706 { "cvtsd2ss", XM, EX, XX },
2707 },
2708 /* PREGRP18 */
2709 {
2710 { "maskmovq", MX, MS, XX },
2711 { "(bad)", XM, EX, XX },
2712 { "maskmovdqu", XM, EX, XX },
2713 { "(bad)", XM, EX, XX },
2714 },
2715 /* PREGRP19 */
2716 {
2717 { "movq", MX, EM, XX },
2718 { "movdqu", XM, EX, XX },
2719 { "movdqa", XM, EX, XX },
2720 { "(bad)", XM, EX, XX },
2721 },
2722 /* PREGRP20 */
2723 {
2724 { "movq", EM, MX, XX },
2725 { "movdqu", EX, XM, XX },
2726 { "movdqa", EX, XM, XX },
2727 { "(bad)", EX, XM, XX },
2728 },
2729 /* PREGRP21 */
2730 {
2731 { "(bad)", EX, XM, XX },
2732 { "movq2dq", XM, MS, XX },
2733 { "movq", EX, XM, XX },
2734 { "movdq2q", MX, XS, XX },
2735 },
2736 /* PREGRP22 */
2737 {
2738 { "pshufw", MX, EM, Ib },
2739 { "pshufhw", XM, EX, Ib },
2740 { "pshufd", XM, EX, Ib },
2741 { "pshuflw", XM, EX, Ib },
2742 },
2743 /* PREGRP23 */
2744 {
2745 { "movd", Ed, MX, XX },
2746 { "movq", XM, EX, XX },
2747 { "movd", Ed, XM, XX },
2748 { "(bad)", Ed, XM, XX },
2749 },
2750 /* PREGRP24 */
2751 {
2752 { "(bad)", MX, EX, XX },
2753 { "(bad)", XM, EX, XX },
2754 { "punpckhqdq", XM, EX, XX },
2755 { "(bad)", XM, EX, XX },
2756 },
2757 /* PREGRP25 */
2758 {
2759 { "movntq", Ev, MX, XX },
2760 { "(bad)", Ev, XM, XX },
2761 { "movntdq", Ev, XM, XX },
2762 { "(bad)", Ev, XM, XX },
2763 },
2764 /* PREGRP26 */
2765 {
2766 { "(bad)", MX, EX, XX },
2767 { "(bad)", XM, EX, XX },
2768 { "punpcklqdq", XM, EX, XX },
2769 { "(bad)", XM, EX, XX },
2770 },
2771 };
2772
2773 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2774
2775 static void
2776 ckprefix ()
2777 {
2778 int newrex;
2779 rex = 0;
2780 prefixes = 0;
2781 used_prefixes = 0;
2782 rex_used = 0;
2783 while (1)
2784 {
2785 FETCH_DATA (the_info, codep + 1);
2786 newrex = 0;
2787 switch (*codep)
2788 {
2789 /* REX prefixes family. */
2790 case 0x40:
2791 case 0x41:
2792 case 0x42:
2793 case 0x43:
2794 case 0x44:
2795 case 0x45:
2796 case 0x46:
2797 case 0x47:
2798 case 0x48:
2799 case 0x49:
2800 case 0x4a:
2801 case 0x4b:
2802 case 0x4c:
2803 case 0x4d:
2804 case 0x4e:
2805 case 0x4f:
2806 if (mode_64bit)
2807 newrex = *codep;
2808 else
2809 return;
2810 break;
2811 case 0xf3:
2812 prefixes |= PREFIX_REPZ;
2813 break;
2814 case 0xf2:
2815 prefixes |= PREFIX_REPNZ;
2816 break;
2817 case 0xf0:
2818 prefixes |= PREFIX_LOCK;
2819 break;
2820 case 0x2e:
2821 prefixes |= PREFIX_CS;
2822 break;
2823 case 0x36:
2824 prefixes |= PREFIX_SS;
2825 break;
2826 case 0x3e:
2827 prefixes |= PREFIX_DS;
2828 break;
2829 case 0x26:
2830 prefixes |= PREFIX_ES;
2831 break;
2832 case 0x64:
2833 prefixes |= PREFIX_FS;
2834 break;
2835 case 0x65:
2836 prefixes |= PREFIX_GS;
2837 break;
2838 case 0x66:
2839 prefixes |= PREFIX_DATA;
2840 break;
2841 case 0x67:
2842 prefixes |= PREFIX_ADDR;
2843 break;
2844 case FWAIT_OPCODE:
2845 /* fwait is really an instruction. If there are prefixes
2846 before the fwait, they belong to the fwait, *not* to the
2847 following instruction. */
2848 if (prefixes)
2849 {
2850 prefixes |= PREFIX_FWAIT;
2851 codep++;
2852 return;
2853 }
2854 prefixes = PREFIX_FWAIT;
2855 break;
2856 default:
2857 return;
2858 }
2859 /* Rex is ignored when followed by another prefix. */
2860 if (rex)
2861 {
2862 oappend (prefix_name (rex, 0));
2863 oappend (" ");
2864 }
2865 rex = newrex;
2866 codep++;
2867 }
2868 }
2869
2870 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
2871 prefix byte. */
2872
2873 static const char *
2874 prefix_name (pref, sizeflag)
2875 int pref;
2876 int sizeflag;
2877 {
2878 switch (pref)
2879 {
2880 /* REX prefixes family. */
2881 case 0x40:
2882 return "rex";
2883 case 0x41:
2884 return "rexZ";
2885 case 0x42:
2886 return "rexY";
2887 case 0x43:
2888 return "rexYZ";
2889 case 0x44:
2890 return "rexX";
2891 case 0x45:
2892 return "rexXZ";
2893 case 0x46:
2894 return "rexXY";
2895 case 0x47:
2896 return "rexXYZ";
2897 case 0x48:
2898 return "rex64";
2899 case 0x49:
2900 return "rex64Z";
2901 case 0x4a:
2902 return "rex64Y";
2903 case 0x4b:
2904 return "rex64YZ";
2905 case 0x4c:
2906 return "rex64X";
2907 case 0x4d:
2908 return "rex64XZ";
2909 case 0x4e:
2910 return "rex64XY";
2911 case 0x4f:
2912 return "rex64XYZ";
2913 case 0xf3:
2914 return "repz";
2915 case 0xf2:
2916 return "repnz";
2917 case 0xf0:
2918 return "lock";
2919 case 0x2e:
2920 return "cs";
2921 case 0x36:
2922 return "ss";
2923 case 0x3e:
2924 return "ds";
2925 case 0x26:
2926 return "es";
2927 case 0x64:
2928 return "fs";
2929 case 0x65:
2930 return "gs";
2931 case 0x66:
2932 return (sizeflag & DFLAG) ? "data16" : "data32";
2933 case 0x67:
2934 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2935 case FWAIT_OPCODE:
2936 return "fwait";
2937 default:
2938 return NULL;
2939 }
2940 }
2941
2942 static char op1out[100], op2out[100], op3out[100];
2943 static int op_ad, op_index[3];
2944 static unsigned int op_address[3];
2945 static unsigned int op_riprel[3];
2946 static bfd_vma start_pc;
2947
2948 \f
2949 /*
2950 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2951 * (see topic "Redundant prefixes" in the "Differences from 8086"
2952 * section of the "Virtual 8086 Mode" chapter.)
2953 * 'pc' should be the address of this instruction, it will
2954 * be used to print the target address if this is a relative jump or call
2955 * The function returns the length of this instruction in bytes.
2956 */
2957
2958 static int print_insn_i386
2959 PARAMS ((bfd_vma pc, disassemble_info *info));
2960
2961 static char intel_syntax;
2962 static char open_char;
2963 static char close_char;
2964 static char separator_char;
2965 static char scale_char;
2966
2967 int
2968 print_insn_i386_att (pc, info)
2969 bfd_vma pc;
2970 disassemble_info *info;
2971 {
2972 intel_syntax = 0;
2973 open_char = '(';
2974 close_char = ')';
2975 separator_char = ',';
2976 scale_char = ',';
2977
2978 return print_insn_i386 (pc, info);
2979 }
2980
2981 int
2982 print_insn_i386_intel (pc, info)
2983 bfd_vma pc;
2984 disassemble_info *info;
2985 {
2986 intel_syntax = 1;
2987 open_char = '[';
2988 close_char = ']';
2989 separator_char = '+';
2990 scale_char = '*';
2991
2992 return print_insn_i386 (pc, info);
2993 }
2994
2995 static int
2996 print_insn_i386 (pc, info)
2997 bfd_vma pc;
2998 disassemble_info *info;
2999 {
3000 const struct dis386 *dp;
3001 int i;
3002 int two_source_ops;
3003 char *first, *second, *third;
3004 int needcomma;
3005 unsigned char uses_SSE_prefix;
3006 VOLATILE int sizeflag;
3007 VOLATILE int orig_sizeflag;
3008
3009 struct dis_private priv;
3010 bfd_byte *inbuf = priv.the_buffer;
3011
3012 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
3013 || info->mach == bfd_mach_x86_64);
3014
3015 if (info->mach == bfd_mach_i386_i386
3016 || info->mach == bfd_mach_x86_64
3017 || info->mach == bfd_mach_i386_i386_intel_syntax
3018 || info->mach == bfd_mach_x86_64_intel_syntax)
3019 sizeflag = AFLAG|DFLAG;
3020 else if (info->mach == bfd_mach_i386_i8086)
3021 sizeflag = 0;
3022 else
3023 abort ();
3024 orig_sizeflag = sizeflag;
3025
3026 /* The output looks better if we put 7 bytes on a line, since that
3027 puts most long word instructions on a single line. */
3028 info->bytes_per_line = 7;
3029
3030 info->private_data = (PTR) &priv;
3031 priv.max_fetched = priv.the_buffer;
3032 priv.insn_start = pc;
3033
3034 obuf[0] = 0;
3035 op1out[0] = 0;
3036 op2out[0] = 0;
3037 op3out[0] = 0;
3038
3039 op_index[0] = op_index[1] = op_index[2] = -1;
3040
3041 the_info = info;
3042 start_pc = pc;
3043 start_codep = inbuf;
3044 codep = inbuf;
3045
3046 if (setjmp (priv.bailout) != 0)
3047 {
3048 const char *name;
3049
3050 /* Getting here means we tried for data but didn't get it. That
3051 means we have an incomplete instruction of some sort. Just
3052 print the first byte as a prefix or a .byte pseudo-op. */
3053 if (codep > inbuf)
3054 {
3055 name = prefix_name (inbuf[0], orig_sizeflag);
3056 if (name != NULL)
3057 (*info->fprintf_func) (info->stream, "%s", name);
3058 else
3059 {
3060 /* Just print the first byte as a .byte instruction. */
3061 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3062 (unsigned int) inbuf[0]);
3063 }
3064
3065 return 1;
3066 }
3067
3068 return -1;
3069 }
3070
3071 obufp = obuf;
3072 ckprefix ();
3073
3074 insn_codep = codep;
3075
3076 FETCH_DATA (info, codep + 1);
3077 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3078
3079 if ((prefixes & PREFIX_FWAIT)
3080 && ((*codep < 0xd8) || (*codep > 0xdf)))
3081 {
3082 const char *name;
3083
3084 /* fwait not followed by floating point instruction. Print the
3085 first prefix, which is probably fwait itself. */
3086 name = prefix_name (inbuf[0], orig_sizeflag);
3087 if (name == NULL)
3088 name = INTERNAL_DISASSEMBLER_ERROR;
3089 (*info->fprintf_func) (info->stream, "%s", name);
3090 return 1;
3091 }
3092
3093 if (*codep == 0x0f)
3094 {
3095 FETCH_DATA (info, codep + 2);
3096 if (intel_syntax)
3097 dp = &dis386_twobyte_intel[*++codep];
3098 else
3099 dp = &dis386_twobyte_att[*++codep];
3100 need_modrm = twobyte_has_modrm[*codep];
3101 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
3102 }
3103 else
3104 {
3105 if (intel_syntax)
3106 if (mode_64bit)
3107 dp = &dis386_64_intel[*codep];
3108 else
3109 dp = &dis386_intel[*codep];
3110 else
3111 if (mode_64bit)
3112 dp = &disx86_64_att[*codep];
3113 else
3114 dp = &dis386_att[*codep];
3115 need_modrm = onebyte_has_modrm[*codep];
3116 uses_SSE_prefix = 0;
3117 }
3118 codep++;
3119
3120 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
3121 {
3122 oappend ("repz ");
3123 used_prefixes |= PREFIX_REPZ;
3124 }
3125 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
3126 {
3127 oappend ("repnz ");
3128 used_prefixes |= PREFIX_REPNZ;
3129 }
3130 if (prefixes & PREFIX_LOCK)
3131 {
3132 oappend ("lock ");
3133 used_prefixes |= PREFIX_LOCK;
3134 }
3135
3136 if (prefixes & PREFIX_ADDR)
3137 {
3138 sizeflag ^= AFLAG;
3139 if (dp->bytemode2 != loop_jcxz_mode)
3140 {
3141 if (sizeflag & AFLAG)
3142 oappend ("addr32 ");
3143 else
3144 oappend ("addr16 ");
3145 used_prefixes |= PREFIX_ADDR;
3146 }
3147 }
3148
3149 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
3150 {
3151 sizeflag ^= DFLAG;
3152 if (dp->bytemode2 == cond_jump_mode && dp->bytemode1 == v_mode)
3153 {
3154 if (sizeflag & DFLAG)
3155 oappend ("data32 ");
3156 else
3157 oappend ("data16 ");
3158 used_prefixes |= PREFIX_DATA;
3159 }
3160 }
3161
3162 if (need_modrm)
3163 {
3164 FETCH_DATA (info, codep + 1);
3165 mod = (*codep >> 6) & 3;
3166 reg = (*codep >> 3) & 7;
3167 rm = *codep & 7;
3168 }
3169 else
3170 {
3171 mod = 0;
3172 reg = 0;
3173 rm = 0;
3174 }
3175
3176 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3177 {
3178 dofloat (sizeflag);
3179 }
3180 else
3181 {
3182 int index;
3183 if (dp->name == NULL)
3184 {
3185 switch(dp->bytemode2)
3186 {
3187 case USE_GROUPS:
3188 dp = &grps[dp->bytemode1][reg];
3189 break;
3190 case USE_PREFIX_USER_TABLE:
3191 index = 0;
3192 used_prefixes |= (prefixes & PREFIX_REPZ);
3193 if (prefixes & PREFIX_REPZ)
3194 index = 1;
3195 else
3196 {
3197 used_prefixes |= (prefixes & PREFIX_DATA);
3198 if (prefixes & PREFIX_DATA)
3199 index = 2;
3200 else
3201 {
3202 used_prefixes |= (prefixes & PREFIX_REPNZ);
3203 if (prefixes & PREFIX_REPNZ)
3204 index = 3;
3205 }
3206 }
3207 dp = &prefix_user_table[dp->bytemode1][index];
3208 break;
3209 default:
3210 oappend (INTERNAL_DISASSEMBLER_ERROR);
3211 break;
3212 }
3213 }
3214
3215 putop (dp->name, sizeflag);
3216
3217 obufp = op1out;
3218 op_ad = 2;
3219 if (dp->op1)
3220 (*dp->op1)(dp->bytemode1, sizeflag);
3221
3222 obufp = op2out;
3223 op_ad = 1;
3224 if (dp->op2)
3225 (*dp->op2)(dp->bytemode2, sizeflag);
3226
3227 obufp = op3out;
3228 op_ad = 0;
3229 if (dp->op3)
3230 (*dp->op3)(dp->bytemode3, sizeflag);
3231 }
3232
3233 /* See if any prefixes were not used. If so, print the first one
3234 separately. If we don't do this, we'll wind up printing an
3235 instruction stream which does not precisely correspond to the
3236 bytes we are disassembling. */
3237 if ((prefixes & ~used_prefixes) != 0)
3238 {
3239 const char *name;
3240
3241 name = prefix_name (inbuf[0], orig_sizeflag);
3242 if (name == NULL)
3243 name = INTERNAL_DISASSEMBLER_ERROR;
3244 (*info->fprintf_func) (info->stream, "%s", name);
3245 return 1;
3246 }
3247 if (rex & ~rex_used)
3248 {
3249 const char *name;
3250 name = prefix_name (rex | 0x40, orig_sizeflag);
3251 if (name == NULL)
3252 name = INTERNAL_DISASSEMBLER_ERROR;
3253 (*info->fprintf_func) (info->stream, "%s ", name);
3254 }
3255
3256 obufp = obuf + strlen (obuf);
3257 for (i = strlen (obuf); i < 6; i++)
3258 oappend (" ");
3259 oappend (" ");
3260 (*info->fprintf_func) (info->stream, "%s", obuf);
3261
3262 /* The enter and bound instructions are printed with operands in the same
3263 order as the intel book; everything else is printed in reverse order. */
3264 if (intel_syntax || two_source_ops)
3265 {
3266 first = op1out;
3267 second = op2out;
3268 third = op3out;
3269 op_ad = op_index[0];
3270 op_index[0] = op_index[2];
3271 op_index[2] = op_ad;
3272 }
3273 else
3274 {
3275 first = op3out;
3276 second = op2out;
3277 third = op1out;
3278 }
3279 needcomma = 0;
3280 if (*first)
3281 {
3282 if (op_index[0] != -1 && !op_riprel[0])
3283 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3284 else
3285 (*info->fprintf_func) (info->stream, "%s", first);
3286 needcomma = 1;
3287 }
3288 if (*second)
3289 {
3290 if (needcomma)
3291 (*info->fprintf_func) (info->stream, ",");
3292 if (op_index[1] != -1 && !op_riprel[1])
3293 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3294 else
3295 (*info->fprintf_func) (info->stream, "%s", second);
3296 needcomma = 1;
3297 }
3298 if (*third)
3299 {
3300 if (needcomma)
3301 (*info->fprintf_func) (info->stream, ",");
3302 if (op_index[2] != -1 && !op_riprel[2])
3303 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3304 else
3305 (*info->fprintf_func) (info->stream, "%s", third);
3306 }
3307 for (i = 0; i < 3; i++)
3308 if (op_index[i] != -1 && op_riprel[i])
3309 {
3310 (*info->fprintf_func) (info->stream, " # ");
3311 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3312 + op_address[op_index[i]]), info);
3313 }
3314 return codep - inbuf;
3315 }
3316
3317 static const char *float_mem_att[] = {
3318 /* d8 */
3319 "fadds",
3320 "fmuls",
3321 "fcoms",
3322 "fcomps",
3323 "fsubs",
3324 "fsubrs",
3325 "fdivs",
3326 "fdivrs",
3327 /* d9 */
3328 "flds",
3329 "(bad)",
3330 "fsts",
3331 "fstps",
3332 "fldenv",
3333 "fldcw",
3334 "fNstenv",
3335 "fNstcw",
3336 /* da */
3337 "fiaddl",
3338 "fimull",
3339 "ficoml",
3340 "ficompl",
3341 "fisubl",
3342 "fisubrl",
3343 "fidivl",
3344 "fidivrl",
3345 /* db */
3346 "fildl",
3347 "(bad)",
3348 "fistl",
3349 "fistpl",
3350 "(bad)",
3351 "fldt",
3352 "(bad)",
3353 "fstpt",
3354 /* dc */
3355 "faddl",
3356 "fmull",
3357 "fcoml",
3358 "fcompl",
3359 "fsubl",
3360 "fsubrl",
3361 "fdivl",
3362 "fdivrl",
3363 /* dd */
3364 "fldl",
3365 "(bad)",
3366 "fstl",
3367 "fstpl",
3368 "frstor",
3369 "(bad)",
3370 "fNsave",
3371 "fNstsw",
3372 /* de */
3373 "fiadd",
3374 "fimul",
3375 "ficom",
3376 "ficomp",
3377 "fisub",
3378 "fisubr",
3379 "fidiv",
3380 "fidivr",
3381 /* df */
3382 "fild",
3383 "(bad)",
3384 "fist",
3385 "fistp",
3386 "fbld",
3387 "fildll",
3388 "fbstp",
3389 "fistpll",
3390 };
3391
3392 static const char *float_mem_intel[] = {
3393 /* d8 */
3394 "fadd",
3395 "fmul",
3396 "fcom",
3397 "fcomp",
3398 "fsub",
3399 "fsubr",
3400 "fdiv",
3401 "fdivr",
3402 /* d9 */
3403 "fld",
3404 "(bad)",
3405 "fst",
3406 "fstp",
3407 "fldenv",
3408 "fldcw",
3409 "fNstenv",
3410 "fNstcw",
3411 /* da */
3412 "fiadd",
3413 "fimul",
3414 "ficom",
3415 "ficomp",
3416 "fisub",
3417 "fisubr",
3418 "fidiv",
3419 "fidivr",
3420 /* db */
3421 "fild",
3422 "(bad)",
3423 "fist",
3424 "fistp",
3425 "(bad)",
3426 "fld",
3427 "(bad)",
3428 "fstp",
3429 /* dc */
3430 "fadd",
3431 "fmul",
3432 "fcom",
3433 "fcomp",
3434 "fsub",
3435 "fsubr",
3436 "fdiv",
3437 "fdivr",
3438 /* dd */
3439 "fld",
3440 "(bad)",
3441 "fst",
3442 "fstp",
3443 "frstor",
3444 "(bad)",
3445 "fNsave",
3446 "fNstsw",
3447 /* de */
3448 "fiadd",
3449 "fimul",
3450 "ficom",
3451 "ficomp",
3452 "fisub",
3453 "fisubr",
3454 "fidiv",
3455 "fidivr",
3456 /* df */
3457 "fild",
3458 "(bad)",
3459 "fist",
3460 "fistp",
3461 "fbld",
3462 "fild",
3463 "fbstp",
3464 "fistpll",
3465 };
3466
3467 #define ST OP_ST, 0
3468 #define STi OP_STi, 0
3469
3470 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
3471 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
3472 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
3473 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
3474 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
3475 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
3476 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
3477 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
3478 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
3479
3480 static const struct dis386 float_reg[][8] = {
3481 /* d8 */
3482 {
3483 { "fadd", ST, STi, XX },
3484 { "fmul", ST, STi, XX },
3485 { "fcom", STi, XX, XX },
3486 { "fcomp", STi, XX, XX },
3487 { "fsub", ST, STi, XX },
3488 { "fsubr", ST, STi, XX },
3489 { "fdiv", ST, STi, XX },
3490 { "fdivr", ST, STi, XX },
3491 },
3492 /* d9 */
3493 {
3494 { "fld", STi, XX, XX },
3495 { "fxch", STi, XX, XX },
3496 { FGRPd9_2 },
3497 { "(bad)", XX, XX, XX },
3498 { FGRPd9_4 },
3499 { FGRPd9_5 },
3500 { FGRPd9_6 },
3501 { FGRPd9_7 },
3502 },
3503 /* da */
3504 {
3505 { "fcmovb", ST, STi, XX },
3506 { "fcmove", ST, STi, XX },
3507 { "fcmovbe",ST, STi, XX },
3508 { "fcmovu", ST, STi, XX },
3509 { "(bad)", XX, XX, XX },
3510 { FGRPda_5 },
3511 { "(bad)", XX, XX, XX },
3512 { "(bad)", XX, XX, XX },
3513 },
3514 /* db */
3515 {
3516 { "fcmovnb",ST, STi, XX },
3517 { "fcmovne",ST, STi, XX },
3518 { "fcmovnbe",ST, STi, XX },
3519 { "fcmovnu",ST, STi, XX },
3520 { FGRPdb_4 },
3521 { "fucomi", ST, STi, XX },
3522 { "fcomi", ST, STi, XX },
3523 { "(bad)", XX, XX, XX },
3524 },
3525 /* dc */
3526 {
3527 { "fadd", STi, ST, XX },
3528 { "fmul", STi, ST, XX },
3529 { "(bad)", XX, XX, XX },
3530 { "(bad)", XX, XX, XX },
3531 #if UNIXWARE_COMPAT
3532 { "fsub", STi, ST, XX },
3533 { "fsubr", STi, ST, XX },
3534 { "fdiv", STi, ST, XX },
3535 { "fdivr", STi, ST, XX },
3536 #else
3537 { "fsubr", STi, ST, XX },
3538 { "fsub", STi, ST, XX },
3539 { "fdivr", STi, ST, XX },
3540 { "fdiv", STi, ST, XX },
3541 #endif
3542 },
3543 /* dd */
3544 {
3545 { "ffree", STi, XX, XX },
3546 { "(bad)", XX, XX, XX },
3547 { "fst", STi, XX, XX },
3548 { "fstp", STi, XX, XX },
3549 { "fucom", STi, XX, XX },
3550 { "fucomp", STi, XX, XX },
3551 { "(bad)", XX, XX, XX },
3552 { "(bad)", XX, XX, XX },
3553 },
3554 /* de */
3555 {
3556 { "faddp", STi, ST, XX },
3557 { "fmulp", STi, ST, XX },
3558 { "(bad)", XX, XX, XX },
3559 { FGRPde_3 },
3560 #if UNIXWARE_COMPAT
3561 { "fsubp", STi, ST, XX },
3562 { "fsubrp", STi, ST, XX },
3563 { "fdivp", STi, ST, XX },
3564 { "fdivrp", STi, ST, XX },
3565 #else
3566 { "fsubrp", STi, ST, XX },
3567 { "fsubp", STi, ST, XX },
3568 { "fdivrp", STi, ST, XX },
3569 { "fdivp", STi, ST, XX },
3570 #endif
3571 },
3572 /* df */
3573 {
3574 { "ffreep", STi, XX, XX },
3575 { "(bad)", XX, XX, XX },
3576 { "(bad)", XX, XX, XX },
3577 { "(bad)", XX, XX, XX },
3578 { FGRPdf_4 },
3579 { "fucomip",ST, STi, XX },
3580 { "fcomip", ST, STi, XX },
3581 { "(bad)", XX, XX, XX },
3582 },
3583 };
3584
3585
3586 static char *fgrps[][8] = {
3587 /* d9_2 0 */
3588 {
3589 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3590 },
3591
3592 /* d9_4 1 */
3593 {
3594 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3595 },
3596
3597 /* d9_5 2 */
3598 {
3599 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3600 },
3601
3602 /* d9_6 3 */
3603 {
3604 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3605 },
3606
3607 /* d9_7 4 */
3608 {
3609 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3610 },
3611
3612 /* da_5 5 */
3613 {
3614 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3615 },
3616
3617 /* db_4 6 */
3618 {
3619 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3620 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3621 },
3622
3623 /* de_3 7 */
3624 {
3625 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3626 },
3627
3628 /* df_4 8 */
3629 {
3630 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3631 },
3632 };
3633
3634 static void
3635 dofloat (sizeflag)
3636 int sizeflag;
3637 {
3638 const struct dis386 *dp;
3639 unsigned char floatop;
3640
3641 floatop = codep[-1];
3642
3643 if (mod != 3)
3644 {
3645 if (intel_syntax)
3646 putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3647 else
3648 putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3649 obufp = op1out;
3650 if (floatop == 0xdb)
3651 OP_E (x_mode, sizeflag);
3652 else if (floatop == 0xdd)
3653 OP_E (d_mode, sizeflag);
3654 else
3655 OP_E (v_mode, sizeflag);
3656 return;
3657 }
3658 /* skip mod/rm byte */
3659 MODRM_CHECK;
3660 codep++;
3661
3662 dp = &float_reg[floatop - 0xd8][reg];
3663 if (dp->name == NULL)
3664 {
3665 putop (fgrps[dp->bytemode1][rm], sizeflag);
3666
3667 /* instruction fnstsw is only one with strange arg */
3668 if (floatop == 0xdf && codep[-1] == 0xe0)
3669 strcpy (op1out, names16[0]);
3670 }
3671 else
3672 {
3673 putop (dp->name, sizeflag);
3674
3675 obufp = op1out;
3676 if (dp->op1)
3677 (*dp->op1)(dp->bytemode1, sizeflag);
3678 obufp = op2out;
3679 if (dp->op2)
3680 (*dp->op2)(dp->bytemode2, sizeflag);
3681 }
3682 }
3683
3684 /* ARGSUSED */
3685 static void
3686 OP_ST (ignore, sizeflag)
3687 int ignore ATTRIBUTE_UNUSED;
3688 int sizeflag ATTRIBUTE_UNUSED;
3689 {
3690 oappend ("%st");
3691 }
3692
3693 /* ARGSUSED */
3694 static void
3695 OP_STi (ignore, sizeflag)
3696 int ignore ATTRIBUTE_UNUSED;
3697 int sizeflag ATTRIBUTE_UNUSED;
3698 {
3699 sprintf (scratchbuf, "%%st(%d)", rm);
3700 oappend (scratchbuf);
3701 }
3702
3703
3704 /* capital letters in template are macros */
3705 static void
3706 putop (template, sizeflag)
3707 const char *template;
3708 int sizeflag;
3709 {
3710 const char *p;
3711
3712 for (p = template; *p; p++)
3713 {
3714 switch (*p)
3715 {
3716 default:
3717 *obufp++ = *p;
3718 break;
3719 case 'A':
3720 if (intel_syntax)
3721 break;
3722 if (mod != 3
3723 #ifdef SUFFIX_ALWAYS
3724 || (sizeflag & SUFFIX_ALWAYS)
3725 #endif
3726 )
3727 *obufp++ = 'b';
3728 break;
3729 case 'B':
3730 if (intel_syntax)
3731 break;
3732 #ifdef SUFFIX_ALWAYS
3733 if (sizeflag & SUFFIX_ALWAYS)
3734 *obufp++ = 'b';
3735 #endif
3736 break;
3737 case 'E': /* For jcxz/jecxz */
3738 if (sizeflag & AFLAG)
3739 *obufp++ = 'e';
3740 used_prefixes |= (prefixes & PREFIX_ADDR);
3741 break;
3742 case 'F':
3743 if ((prefixes & PREFIX_ADDR)
3744 #ifdef SUFFIX_ALWAYS
3745 || (sizeflag & SUFFIX_ALWAYS)
3746 #endif
3747 )
3748 {
3749 if (sizeflag & AFLAG)
3750 *obufp++ = 'l';
3751 else
3752 *obufp++ = 'w';
3753 used_prefixes |= (prefixes & PREFIX_ADDR);
3754 }
3755 break;
3756 case 'H':
3757 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3758 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3759 {
3760 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3761 *obufp++ = ',';
3762 *obufp++ = 'p';
3763 if (prefixes & PREFIX_DS)
3764 *obufp++ = 't';
3765 else
3766 *obufp++ = 'n';
3767 }
3768 break;
3769 case 'I':
3770 if (intel_syntax)
3771 break;
3772 if (mode_64bit)
3773 *obufp++ = 'q';
3774 else
3775 {
3776 if ((prefixes & PREFIX_DATA)
3777 #ifdef SUFFIX_ALWAYS
3778 || (sizeflag & SUFFIX_ALWAYS)
3779 #endif
3780 )
3781 {
3782 if (sizeflag & DFLAG)
3783 *obufp++ = 'l';
3784 else
3785 *obufp++ = 'w';
3786 used_prefixes |= (prefixes & PREFIX_DATA);
3787 }
3788 }
3789 break;
3790 case 'L':
3791 if (intel_syntax)
3792 break;
3793 #ifdef SUFFIX_ALWAYS
3794 if (sizeflag & SUFFIX_ALWAYS)
3795 *obufp++ = 'l';
3796 #endif
3797 break;
3798 case 'N':
3799 if ((prefixes & PREFIX_FWAIT) == 0)
3800 *obufp++ = 'n';
3801 else
3802 used_prefixes |= PREFIX_FWAIT;
3803 break;
3804 case 'O':
3805 USED_REX (REX_MODE64);
3806 if (rex & REX_MODE64)
3807 *obufp++ = 'o';
3808 else
3809 *obufp++ = 'd';
3810 break;
3811 case 'P':
3812 if (intel_syntax)
3813 break;
3814 if ((prefixes & PREFIX_DATA)
3815 || (rex & REX_MODE64)
3816 #ifdef SUFFIX_ALWAYS
3817 || (sizeflag & SUFFIX_ALWAYS)
3818 #endif
3819 )
3820 {
3821 USED_REX (REX_MODE64);
3822 if (rex & REX_MODE64)
3823 *obufp++ = 'q';
3824 else
3825 {
3826 if (sizeflag & DFLAG)
3827 *obufp++ = 'l';
3828 else
3829 *obufp++ = 'w';
3830 used_prefixes |= (prefixes & PREFIX_DATA);
3831 }
3832 }
3833 break;
3834 case 'Q':
3835 if (intel_syntax)
3836 break;
3837 USED_REX (REX_MODE64);
3838 if (mod != 3
3839 #ifdef SUFFIX_ALWAYS
3840 || (sizeflag & SUFFIX_ALWAYS)
3841 #endif
3842 )
3843 {
3844 if (rex & REX_MODE64)
3845 *obufp++ = 'q';
3846 else
3847 {
3848 if (sizeflag & DFLAG)
3849 *obufp++ = 'l';
3850 else
3851 *obufp++ = 'w';
3852 used_prefixes |= (prefixes & PREFIX_DATA);
3853 }
3854 }
3855 break;
3856 case 'R':
3857 USED_REX (REX_MODE64);
3858 if (intel_syntax)
3859 {
3860 if (rex & REX_MODE64)
3861 {
3862 *obufp++ = 'q';
3863 *obufp++ = 't';
3864 }
3865 else if (sizeflag & DFLAG)
3866 {
3867 *obufp++ = 'd';
3868 *obufp++ = 'q';
3869 }
3870 else
3871 {
3872 *obufp++ = 'w';
3873 *obufp++ = 'd';
3874 }
3875 }
3876 else
3877 {
3878 if (rex & REX_MODE64)
3879 *obufp++ = 'q';
3880 else if (sizeflag & DFLAG)
3881 *obufp++ = 'l';
3882 else
3883 *obufp++ = 'w';
3884 }
3885 if (!(rex & REX_MODE64))
3886 used_prefixes |= (prefixes & PREFIX_DATA);
3887 break;
3888 case 'S':
3889 if (intel_syntax)
3890 break;
3891 #ifdef SUFFIX_ALWAYS
3892 if (sizeflag & SUFFIX_ALWAYS)
3893 {
3894 if (rex & REX_MODE64)
3895 *obufp++ = 'q';
3896 else
3897 {
3898 if (sizeflag & DFLAG)
3899 *obufp++ = 'l';
3900 else
3901 *obufp++ = 'w';
3902 used_prefixes |= (prefixes & PREFIX_DATA);
3903 }
3904 }
3905 #endif
3906 break;
3907 case 'T':
3908 if (intel_syntax)
3909 break;
3910 if (mode_64bit)
3911 *obufp++ = 'q';
3912 else if (mod != 3
3913 #ifdef SUFFIX_ALWAYS
3914 || (sizeflag & SUFFIX_ALWAYS)
3915 #endif
3916 )
3917 {
3918 if (sizeflag & DFLAG)
3919 *obufp++ = 'l';
3920 else
3921 *obufp++ = 'w';
3922 used_prefixes |= (prefixes & PREFIX_DATA);
3923 }
3924 break;
3925 case 'X':
3926 if (prefixes & PREFIX_DATA)
3927 *obufp++ = 'd';
3928 else
3929 *obufp++ = 's';
3930 used_prefixes |= (prefixes & PREFIX_DATA);
3931 break;
3932 case 'Y':
3933 if (intel_syntax)
3934 break;
3935 if (rex & REX_MODE64)
3936 {
3937 USED_REX (REX_MODE64);
3938 *obufp++ = 'q';
3939 }
3940 break;
3941 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3942 case 'W':
3943 /* operand size flag for cwtl, cbtw */
3944 USED_REX (0);
3945 if (rex)
3946 *obufp++ = 'l';
3947 else if (sizeflag & DFLAG)
3948 *obufp++ = 'w';
3949 else
3950 *obufp++ = 'b';
3951 if (intel_syntax)
3952 {
3953 if (rex)
3954 {
3955 *obufp++ = 'q';
3956 *obufp++ = 'e';
3957 }
3958 if (sizeflag & DFLAG)
3959 {
3960 *obufp++ = 'd';
3961 *obufp++ = 'e';
3962 }
3963 else
3964 {
3965 *obufp++ = 'w';
3966 }
3967 }
3968 if (!rex)
3969 used_prefixes |= (prefixes & PREFIX_DATA);
3970 break;
3971 }
3972 }
3973 *obufp = 0;
3974 }
3975
3976 static void
3977 oappend (s)
3978 const char *s;
3979 {
3980 strcpy (obufp, s);
3981 obufp += strlen (s);
3982 }
3983
3984 static void
3985 append_seg ()
3986 {
3987 if (prefixes & PREFIX_CS)
3988 {
3989 oappend ("%cs:");
3990 used_prefixes |= PREFIX_CS;
3991 }
3992 if (prefixes & PREFIX_DS)
3993 {
3994 oappend ("%ds:");
3995 used_prefixes |= PREFIX_DS;
3996 }
3997 if (prefixes & PREFIX_SS)
3998 {
3999 oappend ("%ss:");
4000 used_prefixes |= PREFIX_SS;
4001 }
4002 if (prefixes & PREFIX_ES)
4003 {
4004 oappend ("%es:");
4005 used_prefixes |= PREFIX_ES;
4006 }
4007 if (prefixes & PREFIX_FS)
4008 {
4009 oappend ("%fs:");
4010 used_prefixes |= PREFIX_FS;
4011 }
4012 if (prefixes & PREFIX_GS)
4013 {
4014 oappend ("%gs:");
4015 used_prefixes |= PREFIX_GS;
4016 }
4017 }
4018
4019 static void
4020 OP_indirE (bytemode, sizeflag)
4021 int bytemode;
4022 int sizeflag;
4023 {
4024 if (!intel_syntax)
4025 oappend ("*");
4026 OP_E (bytemode, sizeflag);
4027 }
4028
4029 static void
4030 print_operand_value (buf, hex, disp)
4031 char *buf;
4032 int hex;
4033 bfd_vma disp;
4034 {
4035 if (mode_64bit)
4036 {
4037 if (hex)
4038 {
4039 char tmp[30];
4040 int i;
4041 buf[0] = '0';
4042 buf[1] = 'x';
4043 sprintf_vma (tmp, disp);
4044 for (i = 0; tmp[i] == '0' && tmp[i+1]; i++);
4045 strcpy (buf + 2, tmp + i);
4046 }
4047 else
4048 {
4049 bfd_signed_vma v = disp;
4050 char tmp[30];
4051 int i;
4052 if (v < 0)
4053 {
4054 *(buf++) = '-';
4055 v = -disp;
4056 /* Check for possible overflow on 0x8000000000000000 */
4057 if (v < 0)
4058 {
4059 strcpy (buf, "9223372036854775808");
4060 return;
4061 }
4062 }
4063 if (!v)
4064 {
4065 strcpy (buf, "0");
4066 return;
4067 }
4068
4069 i = 0;
4070 tmp[29] = 0;
4071 while (v)
4072 {
4073 tmp[28-i] = (v % 10) + '0';
4074 v /= 10;
4075 i++;
4076 }
4077 strcpy (buf, tmp + 29 - i);
4078 }
4079 }
4080 else
4081 {
4082 if (hex)
4083 sprintf (buf, "0x%x", (unsigned int) disp);
4084 else
4085 sprintf (buf, "%d", (int) disp);
4086 }
4087 }
4088
4089 static void
4090 OP_E (bytemode, sizeflag)
4091 int bytemode;
4092 int sizeflag;
4093 {
4094 bfd_vma disp;
4095 int add = 0;
4096 int riprel = 0;
4097 USED_REX (REX_EXTZ);
4098 if (rex & REX_EXTZ)
4099 add += 8;
4100
4101 /* skip mod/rm byte */
4102 MODRM_CHECK;
4103 codep++;
4104
4105 if (mod == 3)
4106 {
4107 switch (bytemode)
4108 {
4109 case b_mode:
4110 USED_REX (0);
4111 if (rex)
4112 oappend (names8rex[rm + add]);
4113 else
4114 oappend (names8[rm + add]);
4115 break;
4116 case w_mode:
4117 oappend (names16[rm + add]);
4118 break;
4119 case d_mode:
4120 oappend (names32[rm + add]);
4121 break;
4122 case q_mode:
4123 oappend (names64[rm + add]);
4124 break;
4125 case m_mode:
4126 if (mode_64bit)
4127 oappend (names64[rm + add]);
4128 else
4129 oappend (names32[rm + add]);
4130 break;
4131 case v_mode:
4132 USED_REX (REX_MODE64);
4133 if (rex & REX_MODE64)
4134 oappend (names64[rm + add]);
4135 else if (sizeflag & DFLAG)
4136 oappend (names32[rm + add]);
4137 else
4138 oappend (names16[rm + add]);
4139 used_prefixes |= (prefixes & PREFIX_DATA);
4140 break;
4141 case 0:
4142 if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
4143 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
4144 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
4145 BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
4146 break;
4147 default:
4148 oappend (INTERNAL_DISASSEMBLER_ERROR);
4149 break;
4150 }
4151 return;
4152 }
4153
4154 disp = 0;
4155 append_seg ();
4156
4157 if (sizeflag & AFLAG) /* 32 bit address mode */
4158 {
4159 int havesib;
4160 int havebase;
4161 int base;
4162 int index = 0;
4163 int scale = 0;
4164
4165 havesib = 0;
4166 havebase = 1;
4167 base = rm;
4168
4169 if (base == 4)
4170 {
4171 havesib = 1;
4172 FETCH_DATA (the_info, codep + 1);
4173 scale = (*codep >> 6) & 3;
4174 index = (*codep >> 3) & 7;
4175 base = *codep & 7;
4176 USED_REX (REX_EXTY);
4177 USED_REX (REX_EXTZ);
4178 if (rex & REX_EXTY)
4179 index += 8;
4180 if (rex & REX_EXTZ)
4181 base += 8;
4182 codep++;
4183 }
4184
4185 switch (mod)
4186 {
4187 case 0:
4188 if ((base & 7) == 5)
4189 {
4190 havebase = 0;
4191 if (mode_64bit && !havesib)
4192 riprel = 1;
4193 disp = get32s ();
4194 }
4195 break;
4196 case 1:
4197 FETCH_DATA (the_info, codep + 1);
4198 disp = *codep++;
4199 if ((disp & 0x80) != 0)
4200 disp -= 0x100;
4201 break;
4202 case 2:
4203 disp = get32s ();
4204 break;
4205 }
4206
4207 if (!intel_syntax)
4208 if (mod != 0 || (base & 7) == 5)
4209 {
4210 print_operand_value (scratchbuf, !riprel, disp);
4211 oappend (scratchbuf);
4212 if (riprel)
4213 {
4214 set_op (disp, 1);
4215 oappend ("(%rip)");
4216 }
4217 }
4218
4219 if (havebase || (havesib && (index != 4 || scale != 0)))
4220 {
4221 if (intel_syntax)
4222 {
4223 switch (bytemode)
4224 {
4225 case b_mode:
4226 oappend ("BYTE PTR ");
4227 break;
4228 case w_mode:
4229 oappend ("WORD PTR ");
4230 break;
4231 case v_mode:
4232 oappend ("DWORD PTR ");
4233 break;
4234 case d_mode:
4235 oappend ("QWORD PTR ");
4236 break;
4237 case m_mode:
4238 if (mode_64bit)
4239 oappend ("DWORD PTR ");
4240 else
4241 oappend ("QWORD PTR ");
4242 break;
4243 case x_mode:
4244 oappend ("XWORD PTR ");
4245 break;
4246 default:
4247 break;
4248 }
4249 }
4250 *obufp++ = open_char;
4251 if (intel_syntax && riprel)
4252 oappend ("rip + ");
4253 *obufp = '\0';
4254 USED_REX (REX_EXTZ);
4255 if (!havesib && (rex & REX_EXTZ))
4256 base += 8;
4257 if (havebase)
4258 oappend (mode_64bit ? names64[base] : names32[base]);
4259 if (havesib)
4260 {
4261 if (index != 4)
4262 {
4263 if (intel_syntax)
4264 {
4265 if (havebase)
4266 {
4267 *obufp++ = separator_char;
4268 *obufp = '\0';
4269 }
4270 sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]);
4271 }
4272 else
4273 sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]);
4274 oappend (scratchbuf);
4275 }
4276 if (!intel_syntax
4277 || (intel_syntax
4278 && bytemode != b_mode
4279 && bytemode != w_mode
4280 && bytemode != v_mode))
4281 {
4282 *obufp++ = scale_char;
4283 *obufp = '\0';
4284 sprintf (scratchbuf, "%d", 1 << scale);
4285 oappend (scratchbuf);
4286 }
4287 }
4288 if (intel_syntax)
4289 if (mod != 0 || (base & 7) == 5)
4290 {
4291 /* Don't print zero displacements */
4292 if (disp != 0)
4293 {
4294 print_operand_value (scratchbuf, 0, disp);
4295 oappend (scratchbuf);
4296 }
4297 }
4298
4299 *obufp++ = close_char;
4300 *obufp = '\0';
4301 }
4302 else if (intel_syntax)
4303 {
4304 if (mod != 0 || (base & 7) == 5)
4305 {
4306 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4307 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4308 ;
4309 else
4310 {
4311 oappend (names_seg[3]);
4312 oappend (":");
4313 }
4314 print_operand_value (scratchbuf, 1, disp);
4315 oappend (scratchbuf);
4316 }
4317 }
4318 }
4319 else
4320 { /* 16 bit address mode */
4321 switch (mod)
4322 {
4323 case 0:
4324 if ((rm & 7) == 6)
4325 {
4326 disp = get16 ();
4327 if ((disp & 0x8000) != 0)
4328 disp -= 0x10000;
4329 }
4330 break;
4331 case 1:
4332 FETCH_DATA (the_info, codep + 1);
4333 disp = *codep++;
4334 if ((disp & 0x80) != 0)
4335 disp -= 0x100;
4336 break;
4337 case 2:
4338 disp = get16 ();
4339 if ((disp & 0x8000) != 0)
4340 disp -= 0x10000;
4341 break;
4342 }
4343
4344 if (!intel_syntax)
4345 if (mod != 0 || (rm & 7) == 6)
4346 {
4347 print_operand_value (scratchbuf, 0, disp);
4348 oappend (scratchbuf);
4349 }
4350
4351 if (mod != 0 || (rm & 7) != 6)
4352 {
4353 *obufp++ = open_char;
4354 *obufp = '\0';
4355 oappend (index16[rm + add]);
4356 *obufp++ = close_char;
4357 *obufp = '\0';
4358 }
4359 }
4360 }
4361
4362 static void
4363 OP_G (bytemode, sizeflag)
4364 int bytemode;
4365 int sizeflag;
4366 {
4367 int add = 0;
4368 USED_REX (REX_EXTX);
4369 if (rex & REX_EXTX)
4370 add += 8;
4371 switch (bytemode)
4372 {
4373 case b_mode:
4374 USED_REX (0);
4375 if (rex)
4376 oappend (names8rex[reg + add]);
4377 else
4378 oappend (names8[reg + add]);
4379 break;
4380 case w_mode:
4381 oappend (names16[reg + add]);
4382 break;
4383 case d_mode:
4384 oappend (names32[reg + add]);
4385 break;
4386 case q_mode:
4387 oappend (names64[reg + add]);
4388 break;
4389 case v_mode:
4390 USED_REX (REX_MODE64);
4391 if (rex & REX_MODE64)
4392 oappend (names64[reg + add]);
4393 else if (sizeflag & DFLAG)
4394 oappend (names32[reg + add]);
4395 else
4396 oappend (names16[reg + add]);
4397 used_prefixes |= (prefixes & PREFIX_DATA);
4398 break;
4399 default:
4400 oappend (INTERNAL_DISASSEMBLER_ERROR);
4401 break;
4402 }
4403 }
4404
4405 static bfd_vma
4406 get64 ()
4407 {
4408 bfd_vma x;
4409 #ifdef BFD64
4410 unsigned int a;
4411 unsigned int b;
4412
4413 FETCH_DATA (the_info, codep + 8);
4414 a = *codep++ & 0xff;
4415 a |= (*codep++ & 0xff) << 8;
4416 a |= (*codep++ & 0xff) << 16;
4417 a |= (*codep++ & 0xff) << 24;
4418 b = *codep++ & 0xff;
4419 b |= (*codep++ & 0xff) << 8;
4420 b |= (*codep++ & 0xff) << 16;
4421 b |= (*codep++ & 0xff) << 24;
4422 x = a + ((bfd_vma) b << 32);
4423 #else
4424 abort();
4425 x = 0;
4426 #endif
4427 return x;
4428 }
4429
4430 static bfd_signed_vma
4431 get32 ()
4432 {
4433 bfd_signed_vma x = 0;
4434
4435 FETCH_DATA (the_info, codep + 4);
4436 x = *codep++ & (bfd_signed_vma) 0xff;
4437 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4438 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4439 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4440 return x;
4441 }
4442
4443 static bfd_signed_vma
4444 get32s ()
4445 {
4446 bfd_signed_vma x = 0;
4447
4448 FETCH_DATA (the_info, codep + 4);
4449 x = *codep++ & (bfd_signed_vma) 0xff;
4450 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4451 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4452 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4453
4454 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4455
4456 return x;
4457 }
4458
4459 static int
4460 get16 ()
4461 {
4462 int x = 0;
4463
4464 FETCH_DATA (the_info, codep + 2);
4465 x = *codep++ & 0xff;
4466 x |= (*codep++ & 0xff) << 8;
4467 return x;
4468 }
4469
4470 static void
4471 set_op (op, riprel)
4472 unsigned int op;
4473 int riprel;
4474 {
4475 op_index[op_ad] = op_ad;
4476 op_address[op_ad] = op;
4477 op_riprel[op_ad] = riprel;
4478 }
4479
4480 static void
4481 OP_REG (code, sizeflag)
4482 int code;
4483 int sizeflag;
4484 {
4485 const char *s;
4486 int add = 0;
4487 USED_REX (REX_EXTZ);
4488 if (rex & REX_EXTZ)
4489 add = 8;
4490
4491 switch (code)
4492 {
4493 case indir_dx_reg:
4494 s = "(%dx)";
4495 break;
4496 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4497 case sp_reg: case bp_reg: case si_reg: case di_reg:
4498 s = names16[code - ax_reg + add];
4499 break;
4500 case es_reg: case ss_reg: case cs_reg:
4501 case ds_reg: case fs_reg: case gs_reg:
4502 s = names_seg[code - es_reg + add];
4503 break;
4504 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4505 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4506 USED_REX (0);
4507 if (rex)
4508 s = names8rex[code - al_reg + add];
4509 else
4510 s = names8[code - al_reg];
4511 break;
4512 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4513 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4514 USED_REX (REX_MODE64);
4515 if (rex & REX_MODE64)
4516 s = names64[code - eAX_reg + add];
4517 else if (sizeflag & DFLAG)
4518 s = names32[code - eAX_reg + add];
4519 else
4520 s = names16[code - eAX_reg + add];
4521 used_prefixes |= (prefixes & PREFIX_DATA);
4522 break;
4523 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4524 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
4525 s = names64[code - rAX_reg + add];
4526 break;
4527 default:
4528 s = INTERNAL_DISASSEMBLER_ERROR;
4529 break;
4530 }
4531 oappend (s);
4532 }
4533
4534 static void
4535 OP_IMREG (code, sizeflag)
4536 int code;
4537 int sizeflag;
4538 {
4539 const char *s;
4540
4541 switch (code)
4542 {
4543 case indir_dx_reg:
4544 s = "(%dx)";
4545 break;
4546 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4547 case sp_reg: case bp_reg: case si_reg: case di_reg:
4548 s = names16[code - ax_reg];
4549 break;
4550 case es_reg: case ss_reg: case cs_reg:
4551 case ds_reg: case fs_reg: case gs_reg:
4552 s = names_seg[code - es_reg];
4553 break;
4554 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4555 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4556 USED_REX (0);
4557 if (rex)
4558 s = names8rex[code - al_reg];
4559 else
4560 s = names8[code - al_reg];
4561 break;
4562 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4563 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4564 USED_REX (REX_MODE64);
4565 if (rex & REX_MODE64)
4566 s = names64[code - eAX_reg];
4567 else if (sizeflag & DFLAG)
4568 s = names32[code - eAX_reg];
4569 else
4570 s = names16[code - eAX_reg];
4571 used_prefixes |= (prefixes & PREFIX_DATA);
4572 break;
4573 default:
4574 s = INTERNAL_DISASSEMBLER_ERROR;
4575 break;
4576 }
4577 oappend (s);
4578 }
4579
4580 static void
4581 OP_I (bytemode, sizeflag)
4582 int bytemode;
4583 int sizeflag;
4584 {
4585 bfd_signed_vma op;
4586 bfd_signed_vma mask = -1;
4587
4588 switch (bytemode)
4589 {
4590 case b_mode:
4591 FETCH_DATA (the_info, codep + 1);
4592 op = *codep++;
4593 mask = 0xff;
4594 break;
4595 case q_mode:
4596 op = get32s ();
4597 break;
4598 case v_mode:
4599 USED_REX (REX_MODE64);
4600 if (rex & REX_MODE64)
4601 op = get32s ();
4602 else if (sizeflag & DFLAG)
4603 {
4604 op = get32 ();
4605 mask = 0xffffffff;
4606 }
4607 else
4608 {
4609 op = get16 ();
4610 mask = 0xfffff;
4611 }
4612 used_prefixes |= (prefixes & PREFIX_DATA);
4613 break;
4614 case w_mode:
4615 mask = 0xfffff;
4616 op = get16 ();
4617 break;
4618 default:
4619 oappend (INTERNAL_DISASSEMBLER_ERROR);
4620 return;
4621 }
4622
4623 op &= mask;
4624 scratchbuf[0] = '$';
4625 print_operand_value (scratchbuf + !intel_syntax, 1, op);
4626 oappend (scratchbuf);
4627 scratchbuf[0] = '\0';
4628 }
4629
4630 static void
4631 OP_I64 (bytemode, sizeflag)
4632 int bytemode;
4633 int sizeflag;
4634 {
4635 bfd_signed_vma op;
4636 bfd_signed_vma mask = -1;
4637
4638 switch (bytemode)
4639 {
4640 case b_mode:
4641 FETCH_DATA (the_info, codep + 1);
4642 op = *codep++;
4643 mask = 0xff;
4644 break;
4645 case v_mode:
4646 USED_REX (REX_MODE64);
4647 if (rex & REX_MODE64)
4648 op = get64 ();
4649 else if (sizeflag & DFLAG)
4650 {
4651 op = get32 ();
4652 mask = 0xffffffff;
4653 }
4654 else
4655 {
4656 op = get16 ();
4657 mask = 0xfffff;
4658 }
4659 used_prefixes |= (prefixes & PREFIX_DATA);
4660 break;
4661 case w_mode:
4662 mask = 0xfffff;
4663 op = get16 ();
4664 break;
4665 default:
4666 oappend (INTERNAL_DISASSEMBLER_ERROR);
4667 return;
4668 }
4669
4670 op &= mask;
4671 scratchbuf[0] = '$';
4672 print_operand_value (scratchbuf + !intel_syntax, 1, op);
4673 oappend (scratchbuf);
4674 scratchbuf[0] = '\0';
4675 }
4676
4677 static void
4678 OP_sI (bytemode, sizeflag)
4679 int bytemode;
4680 int sizeflag;
4681 {
4682 bfd_signed_vma op;
4683 bfd_signed_vma mask = -1;
4684
4685 switch (bytemode)
4686 {
4687 case b_mode:
4688 FETCH_DATA (the_info, codep + 1);
4689 op = *codep++;
4690 if ((op & 0x80) != 0)
4691 op -= 0x100;
4692 mask = 0xffffffff;
4693 break;
4694 case v_mode:
4695 USED_REX (REX_MODE64);
4696 if (rex & REX_MODE64)
4697 op = get32s ();
4698 else if (sizeflag & DFLAG)
4699 {
4700 op = get32s ();
4701 mask = 0xffffffff;
4702 }
4703 else
4704 {
4705 mask = 0xffffffff;
4706 op = get16();
4707 if ((op & 0x8000) != 0)
4708 op -= 0x10000;
4709 }
4710 used_prefixes |= (prefixes & PREFIX_DATA);
4711 break;
4712 case w_mode:
4713 op = get16 ();
4714 mask = 0xffffffff;
4715 if ((op & 0x8000) != 0)
4716 op -= 0x10000;
4717 break;
4718 default:
4719 oappend (INTERNAL_DISASSEMBLER_ERROR);
4720 return;
4721 }
4722
4723 scratchbuf[0] = '$';
4724 print_operand_value (scratchbuf + 1, 1, op);
4725 oappend (scratchbuf);
4726 }
4727
4728 static void
4729 OP_J (bytemode, sizeflag)
4730 int bytemode;
4731 int sizeflag;
4732 {
4733 bfd_vma disp;
4734 int mask = -1;
4735
4736 switch (bytemode)
4737 {
4738 case b_mode:
4739 FETCH_DATA (the_info, codep + 1);
4740 disp = *codep++;
4741 if ((disp & 0x80) != 0)
4742 disp -= 0x100;
4743 break;
4744 case v_mode:
4745 if (sizeflag & DFLAG)
4746 disp = get32s ();
4747 else
4748 {
4749 disp = get16 ();
4750 /* for some reason, a data16 prefix on a jump instruction
4751 means that the pc is masked to 16 bits after the
4752 displacement is added! */
4753 mask = 0xffff;
4754 }
4755 break;
4756 default:
4757 oappend (INTERNAL_DISASSEMBLER_ERROR);
4758 return;
4759 }
4760 disp = (start_pc + codep - start_codep + disp) & mask;
4761 set_op (disp, 0);
4762 print_operand_value (scratchbuf, 1, disp);
4763 oappend (scratchbuf);
4764 }
4765
4766 /* ARGSUSED */
4767 static void
4768 OP_SEG (dummy, sizeflag)
4769 int dummy ATTRIBUTE_UNUSED;
4770 int sizeflag ATTRIBUTE_UNUSED;
4771 {
4772 static char *sreg[] = {
4773 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
4774 };
4775
4776 oappend (sreg[reg]);
4777 }
4778
4779 /* ARGSUSED */
4780 static void
4781 OP_DIR (dummy, sizeflag)
4782 int dummy ATTRIBUTE_UNUSED;
4783 int sizeflag;
4784 {
4785 int seg, offset;
4786
4787 if (sizeflag & DFLAG)
4788 {
4789 offset = get32 ();
4790 seg = get16 ();
4791 }
4792 else
4793 {
4794 offset = get16 ();
4795 seg = get16 ();
4796 }
4797 used_prefixes |= (prefixes & PREFIX_DATA);
4798 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4799 oappend (scratchbuf);
4800 }
4801
4802 /* ARGSUSED */
4803 static void
4804 OP_OFF (ignored, sizeflag)
4805 int ignored ATTRIBUTE_UNUSED;
4806 int sizeflag;
4807 {
4808 bfd_vma off;
4809
4810 append_seg ();
4811
4812 if (sizeflag & AFLAG)
4813 off = get32 ();
4814 else
4815 off = get16 ();
4816
4817 if (intel_syntax)
4818 {
4819 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4820 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4821 {
4822 oappend (names_seg[3]);
4823 oappend (":");
4824 }
4825 }
4826 print_operand_value (scratchbuf, 1, off);
4827 oappend (scratchbuf);
4828 }
4829 /* ARGSUSED */
4830 static void
4831 OP_OFF64 (ignored, sizeflag)
4832 int ignored ATTRIBUTE_UNUSED;
4833 int sizeflag ATTRIBUTE_UNUSED;
4834 {
4835 bfd_vma off;
4836
4837 append_seg ();
4838
4839 off = get64();
4840
4841 if (intel_syntax)
4842 {
4843 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4844 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4845 {
4846 oappend (names_seg[3]);
4847 oappend (":");
4848 }
4849 }
4850 print_operand_value (scratchbuf, 1, off);
4851 oappend (scratchbuf);
4852 }
4853
4854 static void
4855 ptr_reg (code, sizeflag)
4856 int code;
4857 int sizeflag;
4858 {
4859 const char *s;
4860 oappend ("(");
4861 USED_REX (REX_MODE64);
4862 if (rex & REX_MODE64)
4863 s = names64[code - eAX_reg];
4864 else if (sizeflag & AFLAG)
4865 s = names32[code - eAX_reg];
4866 else
4867 s = names16[code - eAX_reg];
4868 oappend (s);
4869 oappend (")");
4870 }
4871
4872 static void
4873 OP_ESreg (code, sizeflag)
4874 int code;
4875 int sizeflag;
4876 {
4877 oappend ("%es:");
4878 ptr_reg (code, sizeflag);
4879 }
4880
4881 static void
4882 OP_DSreg (code, sizeflag)
4883 int code;
4884 int sizeflag;
4885 {
4886 if ((prefixes
4887 & (PREFIX_CS
4888 | PREFIX_DS
4889 | PREFIX_SS
4890 | PREFIX_ES
4891 | PREFIX_FS
4892 | PREFIX_GS)) == 0)
4893 prefixes |= PREFIX_DS;
4894 append_seg();
4895 ptr_reg (code, sizeflag);
4896 }
4897
4898 /* ARGSUSED */
4899 static void
4900 OP_C (dummy, sizeflag)
4901 int dummy ATTRIBUTE_UNUSED;
4902 int sizeflag ATTRIBUTE_UNUSED;
4903 {
4904 int add = 0;
4905 USED_REX (REX_EXTX);
4906 if (rex & REX_EXTX)
4907 add = 8;
4908 sprintf (scratchbuf, "%%cr%d", reg+add);
4909 oappend (scratchbuf);
4910 }
4911
4912 /* ARGSUSED */
4913 static void
4914 OP_D (dummy, sizeflag)
4915 int dummy ATTRIBUTE_UNUSED;
4916 int sizeflag ATTRIBUTE_UNUSED;
4917 {
4918 int add = 0;
4919 USED_REX (REX_EXTX);
4920 if (rex & REX_EXTX)
4921 add = 8;
4922 sprintf (scratchbuf, "%%db%d", reg+add);
4923 oappend (scratchbuf);
4924 }
4925
4926 /* ARGSUSED */
4927 static void
4928 OP_T (dummy, sizeflag)
4929 int dummy ATTRIBUTE_UNUSED;
4930 int sizeflag ATTRIBUTE_UNUSED;
4931 {
4932 sprintf (scratchbuf, "%%tr%d", reg);
4933 oappend (scratchbuf);
4934 }
4935
4936 static void
4937 OP_Rd (bytemode, sizeflag)
4938 int bytemode;
4939 int sizeflag;
4940 {
4941 if (mod == 3)
4942 OP_E (bytemode, sizeflag);
4943 else
4944 BadOp();
4945 }
4946
4947 static void
4948 OP_MMX (ignore, sizeflag)
4949 int ignore ATTRIBUTE_UNUSED;
4950 int sizeflag ATTRIBUTE_UNUSED;
4951 {
4952 int add = 0;
4953 USED_REX (REX_EXTX);
4954 if (rex & REX_EXTX)
4955 add = 8;
4956 used_prefixes |= (prefixes & PREFIX_DATA);
4957 if (prefixes & PREFIX_DATA)
4958 sprintf (scratchbuf, "%%xmm%d", reg + add);
4959 else
4960 sprintf (scratchbuf, "%%mm%d", reg + add);
4961 oappend (scratchbuf);
4962 }
4963
4964 static void
4965 OP_XMM (bytemode, sizeflag)
4966 int bytemode ATTRIBUTE_UNUSED;
4967 int sizeflag ATTRIBUTE_UNUSED;
4968 {
4969 int add = 0;
4970 USED_REX (REX_EXTX);
4971 if (rex & REX_EXTX)
4972 add = 8;
4973 sprintf (scratchbuf, "%%xmm%d", reg + add);
4974 oappend (scratchbuf);
4975 }
4976
4977 static void
4978 OP_EM (bytemode, sizeflag)
4979 int bytemode;
4980 int sizeflag;
4981 {
4982 int add = 0;
4983 if (mod != 3)
4984 {
4985 OP_E (bytemode, sizeflag);
4986 return;
4987 }
4988 USED_REX (REX_EXTZ);
4989 if (rex & REX_EXTZ)
4990 add = 8;
4991
4992 /* skip mod/rm byte */
4993 MODRM_CHECK;
4994 codep++;
4995 used_prefixes |= (prefixes & PREFIX_DATA);
4996 if (prefixes & PREFIX_DATA)
4997 sprintf (scratchbuf, "%%xmm%d", rm + add);
4998 else
4999 sprintf (scratchbuf, "%%mm%d", rm + add);
5000 oappend (scratchbuf);
5001 }
5002
5003 static void
5004 OP_EX (bytemode, sizeflag)
5005 int bytemode;
5006 int sizeflag;
5007 {
5008 int add = 0;
5009 if (mod != 3)
5010 {
5011 OP_E (bytemode, sizeflag);
5012 return;
5013 }
5014 USED_REX (REX_EXTZ);
5015 if (rex & REX_EXTZ)
5016 add = 8;
5017
5018 /* skip mod/rm byte */
5019 MODRM_CHECK;
5020 codep++;
5021 sprintf (scratchbuf, "%%xmm%d", rm + add);
5022 oappend (scratchbuf);
5023 }
5024
5025 static void
5026 OP_MS (bytemode, sizeflag)
5027 int bytemode;
5028 int sizeflag;
5029 {
5030 if (mod == 3)
5031 OP_EM (bytemode, sizeflag);
5032 else
5033 BadOp();
5034 }
5035
5036 static void
5037 OP_XS (bytemode, sizeflag)
5038 int bytemode;
5039 int sizeflag;
5040 {
5041 if (mod == 3)
5042 OP_EX (bytemode, sizeflag);
5043 else
5044 BadOp();
5045 }
5046
5047 static const char *Suffix3DNow[] = {
5048 /* 00 */ NULL, NULL, NULL, NULL,
5049 /* 04 */ NULL, NULL, NULL, NULL,
5050 /* 08 */ NULL, NULL, NULL, NULL,
5051 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
5052 /* 10 */ NULL, NULL, NULL, NULL,
5053 /* 14 */ NULL, NULL, NULL, NULL,
5054 /* 18 */ NULL, NULL, NULL, NULL,
5055 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
5056 /* 20 */ NULL, NULL, NULL, NULL,
5057 /* 24 */ NULL, NULL, NULL, NULL,
5058 /* 28 */ NULL, NULL, NULL, NULL,
5059 /* 2C */ NULL, NULL, NULL, NULL,
5060 /* 30 */ NULL, NULL, NULL, NULL,
5061 /* 34 */ NULL, NULL, NULL, NULL,
5062 /* 38 */ NULL, NULL, NULL, NULL,
5063 /* 3C */ NULL, NULL, NULL, NULL,
5064 /* 40 */ NULL, NULL, NULL, NULL,
5065 /* 44 */ NULL, NULL, NULL, NULL,
5066 /* 48 */ NULL, NULL, NULL, NULL,
5067 /* 4C */ NULL, NULL, NULL, NULL,
5068 /* 50 */ NULL, NULL, NULL, NULL,
5069 /* 54 */ NULL, NULL, NULL, NULL,
5070 /* 58 */ NULL, NULL, NULL, NULL,
5071 /* 5C */ NULL, NULL, NULL, NULL,
5072 /* 60 */ NULL, NULL, NULL, NULL,
5073 /* 64 */ NULL, NULL, NULL, NULL,
5074 /* 68 */ NULL, NULL, NULL, NULL,
5075 /* 6C */ NULL, NULL, NULL, NULL,
5076 /* 70 */ NULL, NULL, NULL, NULL,
5077 /* 74 */ NULL, NULL, NULL, NULL,
5078 /* 78 */ NULL, NULL, NULL, NULL,
5079 /* 7C */ NULL, NULL, NULL, NULL,
5080 /* 80 */ NULL, NULL, NULL, NULL,
5081 /* 84 */ NULL, NULL, NULL, NULL,
5082 /* 88 */ NULL, NULL, "pfnacc", NULL,
5083 /* 8C */ NULL, NULL, "pfpnacc", NULL,
5084 /* 90 */ "pfcmpge", NULL, NULL, NULL,
5085 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5086 /* 98 */ NULL, NULL, "pfsub", NULL,
5087 /* 9C */ NULL, NULL, "pfadd", NULL,
5088 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
5089 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5090 /* A8 */ NULL, NULL, "pfsubr", NULL,
5091 /* AC */ NULL, NULL, "pfacc", NULL,
5092 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
5093 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
5094 /* B8 */ NULL, NULL, NULL, "pswapd",
5095 /* BC */ NULL, NULL, NULL, "pavgusb",
5096 /* C0 */ NULL, NULL, NULL, NULL,
5097 /* C4 */ NULL, NULL, NULL, NULL,
5098 /* C8 */ NULL, NULL, NULL, NULL,
5099 /* CC */ NULL, NULL, NULL, NULL,
5100 /* D0 */ NULL, NULL, NULL, NULL,
5101 /* D4 */ NULL, NULL, NULL, NULL,
5102 /* D8 */ NULL, NULL, NULL, NULL,
5103 /* DC */ NULL, NULL, NULL, NULL,
5104 /* E0 */ NULL, NULL, NULL, NULL,
5105 /* E4 */ NULL, NULL, NULL, NULL,
5106 /* E8 */ NULL, NULL, NULL, NULL,
5107 /* EC */ NULL, NULL, NULL, NULL,
5108 /* F0 */ NULL, NULL, NULL, NULL,
5109 /* F4 */ NULL, NULL, NULL, NULL,
5110 /* F8 */ NULL, NULL, NULL, NULL,
5111 /* FC */ NULL, NULL, NULL, NULL,
5112 };
5113
5114 static void
5115 OP_3DNowSuffix (bytemode, sizeflag)
5116 int bytemode ATTRIBUTE_UNUSED;
5117 int sizeflag ATTRIBUTE_UNUSED;
5118 {
5119 const char *mnemonic;
5120
5121 FETCH_DATA (the_info, codep + 1);
5122 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5123 place where an 8-bit immediate would normally go. ie. the last
5124 byte of the instruction. */
5125 obufp = obuf + strlen(obuf);
5126 mnemonic = Suffix3DNow[*codep++ & 0xff];
5127 if (mnemonic)
5128 oappend (mnemonic);
5129 else
5130 {
5131 /* Since a variable sized modrm/sib chunk is between the start
5132 of the opcode (0x0f0f) and the opcode suffix, we need to do
5133 all the modrm processing first, and don't know until now that
5134 we have a bad opcode. This necessitates some cleaning up. */
5135 op1out[0] = '\0';
5136 op2out[0] = '\0';
5137 BadOp();
5138 }
5139 }
5140
5141
5142 static const char *simd_cmp_op [] = {
5143 "eq",
5144 "lt",
5145 "le",
5146 "unord",
5147 "neq",
5148 "nlt",
5149 "nle",
5150 "ord"
5151 };
5152
5153 static void
5154 OP_SIMD_Suffix (bytemode, sizeflag)
5155 int bytemode ATTRIBUTE_UNUSED;
5156 int sizeflag ATTRIBUTE_UNUSED;
5157 {
5158 unsigned int cmp_type;
5159
5160 FETCH_DATA (the_info, codep + 1);
5161 obufp = obuf + strlen(obuf);
5162 cmp_type = *codep++ & 0xff;
5163 if (cmp_type < 8)
5164 {
5165 char suffix1 = 'p', suffix2 = 's';
5166 used_prefixes |= (prefixes & PREFIX_REPZ);
5167 if (prefixes & PREFIX_REPZ)
5168 suffix1 = 's';
5169 else
5170 {
5171 used_prefixes |= (prefixes & PREFIX_DATA);
5172 if (prefixes & PREFIX_DATA)
5173 suffix2 = 'd';
5174 else
5175 {
5176 used_prefixes |= (prefixes & PREFIX_REPNZ);
5177 if (prefixes & PREFIX_REPNZ)
5178 suffix1 = 's', suffix2 = 'd';
5179 }
5180 }
5181 sprintf (scratchbuf, "cmp%s%c%c",
5182 simd_cmp_op[cmp_type], suffix1, suffix2);
5183 used_prefixes |= (prefixes & PREFIX_REPZ);
5184 oappend (scratchbuf);
5185 }
5186 else
5187 {
5188 /* We have a bad extension byte. Clean up. */
5189 op1out[0] = '\0';
5190 op2out[0] = '\0';
5191 BadOp();
5192 }
5193 }
5194
5195 static void
5196 SIMD_Fixup (extrachar, sizeflag)
5197 int extrachar;
5198 int sizeflag ATTRIBUTE_UNUSED;
5199 {
5200 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5201 forms of these instructions. */
5202 if (mod == 3)
5203 {
5204 char *p = obuf + strlen(obuf);
5205 *(p+1) = '\0';
5206 *p = *(p-1);
5207 *(p-1) = *(p-2);
5208 *(p-2) = *(p-3);
5209 *(p-3) = extrachar;
5210 }
5211 }
5212
5213 static void BadOp (void)
5214 {
5215 codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
5216 oappend ("(bad)");
5217 }
GDB Binutils - Deliverables
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