2007-08-31 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 July 1988
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
28
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
35
36 #include "sysdep.h"
37 #include "dis-asm.h"
38 #include "opintl.h"
39 #include "opcode/i386.h"
40
41 #include <setjmp.h>
42
43 static int fetch_data (struct disassemble_info *, bfd_byte *);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma, disassemble_info *);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma);
55 static void print_displacement (char *, bfd_vma);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma get64 (void);
59 static bfd_signed_vma get32 (void);
60 static bfd_signed_vma get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SVME_Fixup (int, int);
98 static void BadOp (void);
99 static void REP_Fixup (int, int);
100 static void CMPXCHG8B_Fixup (int, int);
101 static void XMM_Fixup (int, int);
102 static void CRC32_Fixup (int, int);
103
104 struct dis_private {
105 /* Points to first byte not fetched. */
106 bfd_byte *max_fetched;
107 bfd_byte the_buffer[MAX_MNEM_SIZE];
108 bfd_vma insn_start;
109 int orig_sizeflag;
110 jmp_buf bailout;
111 };
112
113 enum address_mode
114 {
115 mode_16bit,
116 mode_32bit,
117 mode_64bit
118 };
119
120 enum address_mode address_mode;
121
122 /* Flags for the prefixes for the current instruction. See below. */
123 static int prefixes;
124
125 /* REX prefix the current instruction. See below. */
126 static int rex;
127 /* Bits of REX we've already used. */
128 static int rex_used;
129 /* Mark parts used in the REX prefix. When we are testing for
130 empty prefix (for 8bit register REX extension), just mask it
131 out. Otherwise test for REX bit is excuse for existence of REX
132 only in case value is nonzero. */
133 #define USED_REX(value) \
134 { \
135 if (value) \
136 { \
137 if ((rex & value)) \
138 rex_used |= (value) | REX_OPCODE; \
139 } \
140 else \
141 rex_used |= REX_OPCODE; \
142 }
143
144 /* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146 static int used_prefixes;
147
148 /* Flags stored in PREFIXES. */
149 #define PREFIX_REPZ 1
150 #define PREFIX_REPNZ 2
151 #define PREFIX_LOCK 4
152 #define PREFIX_CS 8
153 #define PREFIX_SS 0x10
154 #define PREFIX_DS 0x20
155 #define PREFIX_ES 0x40
156 #define PREFIX_FS 0x80
157 #define PREFIX_GS 0x100
158 #define PREFIX_DATA 0x200
159 #define PREFIX_ADDR 0x400
160 #define PREFIX_FWAIT 0x800
161
162 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
164 on error. */
165 #define FETCH_DATA(info, addr) \
166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
167 ? 1 : fetch_data ((info), (addr)))
168
169 static int
170 fetch_data (struct disassemble_info *info, bfd_byte *addr)
171 {
172 int status;
173 struct dis_private *priv = (struct dis_private *) info->private_data;
174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
175
176 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
177 status = (*info->read_memory_func) (start,
178 priv->max_fetched,
179 addr - priv->max_fetched,
180 info);
181 else
182 status = -1;
183 if (status != 0)
184 {
185 /* If we did manage to read at least one byte, then
186 print_insn_i386 will do something sensible. Otherwise, print
187 an error. We do that here because this is where we know
188 STATUS. */
189 if (priv->max_fetched == priv->the_buffer)
190 (*info->memory_error_func) (status, start, info);
191 longjmp (priv->bailout, 1);
192 }
193 else
194 priv->max_fetched = addr;
195 return 1;
196 }
197
198 #define XX { NULL, 0 }
199
200 #define Eb { OP_E, b_mode }
201 #define Ev { OP_E, v_mode }
202 #define Ed { OP_E, d_mode }
203 #define Edq { OP_E, dq_mode }
204 #define Edqw { OP_E, dqw_mode }
205 #define Edqb { OP_E, dqb_mode }
206 #define Edqd { OP_E, dqd_mode }
207 #define Eq { OP_E, q_mode }
208 #define indirEv { OP_indirE, stack_v_mode }
209 #define indirEp { OP_indirE, f_mode }
210 #define stackEv { OP_E, stack_v_mode }
211 #define Em { OP_E, m_mode }
212 #define Ew { OP_E, w_mode }
213 #define M { OP_M, 0 } /* lea, lgdt, etc. */
214 #define Ma { OP_M, v_mode }
215 #define Mb { OP_M, b_mode }
216 #define Md { OP_M, d_mode }
217 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
218 #define Mq { OP_M, q_mode }
219 #define Gb { OP_G, b_mode }
220 #define Gv { OP_G, v_mode }
221 #define Gd { OP_G, d_mode }
222 #define Gdq { OP_G, dq_mode }
223 #define Gm { OP_G, m_mode }
224 #define Gw { OP_G, w_mode }
225 #define Rd { OP_R, d_mode }
226 #define Rm { OP_R, m_mode }
227 #define Ib { OP_I, b_mode }
228 #define sIb { OP_sI, b_mode } /* sign extened byte */
229 #define Iv { OP_I, v_mode }
230 #define Iq { OP_I, q_mode }
231 #define Iv64 { OP_I64, v_mode }
232 #define Iw { OP_I, w_mode }
233 #define I1 { OP_I, const_1_mode }
234 #define Jb { OP_J, b_mode }
235 #define Jv { OP_J, v_mode }
236 #define Cm { OP_C, m_mode }
237 #define Dm { OP_D, m_mode }
238 #define Td { OP_T, d_mode }
239 #define Skip_MODRM { OP_Skip_MODRM, 0 }
240
241 #define RMeAX { OP_REG, eAX_reg }
242 #define RMeBX { OP_REG, eBX_reg }
243 #define RMeCX { OP_REG, eCX_reg }
244 #define RMeDX { OP_REG, eDX_reg }
245 #define RMeSP { OP_REG, eSP_reg }
246 #define RMeBP { OP_REG, eBP_reg }
247 #define RMeSI { OP_REG, eSI_reg }
248 #define RMeDI { OP_REG, eDI_reg }
249 #define RMrAX { OP_REG, rAX_reg }
250 #define RMrBX { OP_REG, rBX_reg }
251 #define RMrCX { OP_REG, rCX_reg }
252 #define RMrDX { OP_REG, rDX_reg }
253 #define RMrSP { OP_REG, rSP_reg }
254 #define RMrBP { OP_REG, rBP_reg }
255 #define RMrSI { OP_REG, rSI_reg }
256 #define RMrDI { OP_REG, rDI_reg }
257 #define RMAL { OP_REG, al_reg }
258 #define RMAL { OP_REG, al_reg }
259 #define RMCL { OP_REG, cl_reg }
260 #define RMDL { OP_REG, dl_reg }
261 #define RMBL { OP_REG, bl_reg }
262 #define RMAH { OP_REG, ah_reg }
263 #define RMCH { OP_REG, ch_reg }
264 #define RMDH { OP_REG, dh_reg }
265 #define RMBH { OP_REG, bh_reg }
266 #define RMAX { OP_REG, ax_reg }
267 #define RMDX { OP_REG, dx_reg }
268
269 #define eAX { OP_IMREG, eAX_reg }
270 #define eBX { OP_IMREG, eBX_reg }
271 #define eCX { OP_IMREG, eCX_reg }
272 #define eDX { OP_IMREG, eDX_reg }
273 #define eSP { OP_IMREG, eSP_reg }
274 #define eBP { OP_IMREG, eBP_reg }
275 #define eSI { OP_IMREG, eSI_reg }
276 #define eDI { OP_IMREG, eDI_reg }
277 #define AL { OP_IMREG, al_reg }
278 #define CL { OP_IMREG, cl_reg }
279 #define DL { OP_IMREG, dl_reg }
280 #define BL { OP_IMREG, bl_reg }
281 #define AH { OP_IMREG, ah_reg }
282 #define CH { OP_IMREG, ch_reg }
283 #define DH { OP_IMREG, dh_reg }
284 #define BH { OP_IMREG, bh_reg }
285 #define AX { OP_IMREG, ax_reg }
286 #define DX { OP_IMREG, dx_reg }
287 #define zAX { OP_IMREG, z_mode_ax_reg }
288 #define indirDX { OP_IMREG, indir_dx_reg }
289
290 #define Sw { OP_SEG, w_mode }
291 #define Sv { OP_SEG, v_mode }
292 #define Ap { OP_DIR, 0 }
293 #define Ob { OP_OFF64, b_mode }
294 #define Ov { OP_OFF64, v_mode }
295 #define Xb { OP_DSreg, eSI_reg }
296 #define Xv { OP_DSreg, eSI_reg }
297 #define Xz { OP_DSreg, eSI_reg }
298 #define Yb { OP_ESreg, eDI_reg }
299 #define Yv { OP_ESreg, eDI_reg }
300 #define DSBX { OP_DSreg, eBX_reg }
301
302 #define es { OP_REG, es_reg }
303 #define ss { OP_REG, ss_reg }
304 #define cs { OP_REG, cs_reg }
305 #define ds { OP_REG, ds_reg }
306 #define fs { OP_REG, fs_reg }
307 #define gs { OP_REG, gs_reg }
308
309 #define MX { OP_MMX, 0 }
310 #define XM { OP_XMM, 0 }
311 #define EM { OP_EM, v_mode }
312 #define EMd { OP_EM, d_mode }
313 #define EMx { OP_EM, x_mode }
314 #define EXw { OP_EX, w_mode }
315 #define EXd { OP_EX, d_mode }
316 #define EXq { OP_EX, q_mode }
317 #define EXx { OP_EX, x_mode }
318 #define MS { OP_MS, v_mode }
319 #define XS { OP_XS, v_mode }
320 #define EMCq { OP_EMC, q_mode }
321 #define MXC { OP_MXC, 0 }
322 #define OPSUF { OP_3DNowSuffix, 0 }
323 #define OPSIMD { OP_SIMD_Suffix, 0 }
324 #define XMM0 { XMM_Fixup, 0 }
325
326 /* Used handle "rep" prefix for string instructions. */
327 #define Xbr { REP_Fixup, eSI_reg }
328 #define Xvr { REP_Fixup, eSI_reg }
329 #define Ybr { REP_Fixup, eDI_reg }
330 #define Yvr { REP_Fixup, eDI_reg }
331 #define Yzr { REP_Fixup, eDI_reg }
332 #define indirDXr { REP_Fixup, indir_dx_reg }
333 #define ALr { REP_Fixup, al_reg }
334 #define eAXr { REP_Fixup, eAX_reg }
335
336 #define cond_jump_flag { NULL, cond_jump_mode }
337 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
338
339 /* bits in sizeflag */
340 #define SUFFIX_ALWAYS 4
341 #define AFLAG 2
342 #define DFLAG 1
343
344 #define b_mode 1 /* byte operand */
345 #define v_mode 2 /* operand size depends on prefixes */
346 #define w_mode 3 /* word operand */
347 #define d_mode 4 /* double word operand */
348 #define q_mode 5 /* quad word operand */
349 #define t_mode 6 /* ten-byte operand */
350 #define x_mode 7 /* 16-byte XMM operand */
351 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
352 #define cond_jump_mode 9
353 #define loop_jcxz_mode 10
354 #define dq_mode 11 /* operand size depends on REX prefixes. */
355 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
356 #define f_mode 13 /* 4- or 6-byte pointer operand */
357 #define const_1_mode 14
358 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
359 #define z_mode 16 /* non-quad operand size depends on prefixes */
360 #define o_mode 17 /* 16-byte operand */
361 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
362 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
363
364 #define es_reg 100
365 #define cs_reg 101
366 #define ss_reg 102
367 #define ds_reg 103
368 #define fs_reg 104
369 #define gs_reg 105
370
371 #define eAX_reg 108
372 #define eCX_reg 109
373 #define eDX_reg 110
374 #define eBX_reg 111
375 #define eSP_reg 112
376 #define eBP_reg 113
377 #define eSI_reg 114
378 #define eDI_reg 115
379
380 #define al_reg 116
381 #define cl_reg 117
382 #define dl_reg 118
383 #define bl_reg 119
384 #define ah_reg 120
385 #define ch_reg 121
386 #define dh_reg 122
387 #define bh_reg 123
388
389 #define ax_reg 124
390 #define cx_reg 125
391 #define dx_reg 126
392 #define bx_reg 127
393 #define sp_reg 128
394 #define bp_reg 129
395 #define si_reg 130
396 #define di_reg 131
397
398 #define rAX_reg 132
399 #define rCX_reg 133
400 #define rDX_reg 134
401 #define rBX_reg 135
402 #define rSP_reg 136
403 #define rBP_reg 137
404 #define rSI_reg 138
405 #define rDI_reg 139
406
407 #define z_mode_ax_reg 149
408 #define indir_dx_reg 150
409
410 #define FLOATCODE 1
411 #define USE_GROUPS 2
412 #define USE_PREFIX_USER_TABLE 3
413 #define X86_64_SPECIAL 4
414 #define IS_3BYTE_OPCODE 5
415 #define USE_OPC_EXT_TABLE 6
416 #define USE_OPC_EXT_RM_TABLE 7
417
418 #define FLOAT NULL, { { NULL, FLOATCODE } }
419
420 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
421 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
422 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
423 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
424 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
425 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
426 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
427 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
428 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
429 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
430 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
431 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
432 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
433 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
434 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
435 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
436 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
437 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
438 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
439 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
440 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
441 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
442 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
443 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
444 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
445 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
446 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
447 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
448
449 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
450 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
451 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
452 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
453 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
454 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
455 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
456 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
457 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
458 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
459 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
460 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
461 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
462 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
463 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
464 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
465 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
466 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
467 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
468 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
469 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
470 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
471 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
472 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
473 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
474 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
475 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
476 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
477 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
478 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
479 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
480 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
481 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
482 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
483 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
484 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
485 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
486 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
487 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
488 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
489 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
490 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
491 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
492 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
493 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
494 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
495 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
496 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
497 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
498 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
499 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
500 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
501 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
502 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
503 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
504 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
505 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
506 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
507 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
508 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
509 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
510 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
511 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
512 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
513 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
514 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
515 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
516 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
517 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
518 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
519 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
520 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
521 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
522 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
523 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
524 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
525 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
526 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
527 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
528 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
529 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
530 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
531 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
532 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
533 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
534 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
535 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
536 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
537 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
538 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
539 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
540 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
541 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
542 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
543 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
544 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
545 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
546 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
547 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
548 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
549 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
550
551
552 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
553 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
554 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
555 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
556
557 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
558 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
559
560 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
561 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
562 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
563 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
564 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
565 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
566 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
567 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
568 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
569 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
570 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
571 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
572 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
573 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
574 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
575 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
576 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
577 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
578 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
579 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
580 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
581 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
582 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
583 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
584 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
585 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
586 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
587 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
588 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
589 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
590 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
591 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
592 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
593 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
594 #define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
595 #define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
596 #define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
597 #define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
598 #define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
599
600 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
601 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
602 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
603 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
604 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
605 #define OPC_EXT_RM_5 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
606
607 typedef void (*op_rtn) (int bytemode, int sizeflag);
608
609 struct dis386 {
610 const char *name;
611 struct
612 {
613 op_rtn rtn;
614 int bytemode;
615 } op[MAX_OPERANDS];
616 };
617
618 /* Upper case letters in the instruction names here are macros.
619 'A' => print 'b' if no register operands or suffix_always is true
620 'B' => print 'b' if suffix_always is true
621 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
622 . size prefix
623 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
624 . suffix_always is true
625 'E' => print 'e' if 32-bit form of jcxz
626 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
627 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
628 'H' => print ",pt" or ",pn" branch hint
629 'I' => honor following macro letter even in Intel mode (implemented only
630 . for some of the macro letters)
631 'J' => print 'l'
632 'K' => print 'd' or 'q' if rex prefix is present.
633 'L' => print 'l' if suffix_always is true
634 'N' => print 'n' if instruction has no wait "prefix"
635 'O' => print 'd' or 'o' (or 'q' in Intel mode)
636 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
637 . or suffix_always is true. print 'q' if rex prefix is present.
638 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
639 . is true
640 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
641 'S' => print 'w', 'l' or 'q' if suffix_always is true
642 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
643 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
644 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
645 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
646 'X' => print 's', 'd' depending on data16 prefix (for XMM)
647 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
648 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
649
650 Many of the above letters print nothing in Intel mode. See "putop"
651 for the details.
652
653 Braces '{' and '}', and vertical bars '|', indicate alternative
654 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
655 modes. In cases where there are only two alternatives, the X86_64
656 instruction is reserved, and "(bad)" is printed.
657 */
658
659 static const struct dis386 dis386[] = {
660 /* 00 */
661 { "addB", { Eb, Gb } },
662 { "addS", { Ev, Gv } },
663 { "addB", { Gb, Eb } },
664 { "addS", { Gv, Ev } },
665 { "addB", { AL, Ib } },
666 { "addS", { eAX, Iv } },
667 { "push{T|}", { es } },
668 { "pop{T|}", { es } },
669 /* 08 */
670 { "orB", { Eb, Gb } },
671 { "orS", { Ev, Gv } },
672 { "orB", { Gb, Eb } },
673 { "orS", { Gv, Ev } },
674 { "orB", { AL, Ib } },
675 { "orS", { eAX, Iv } },
676 { "push{T|}", { cs } },
677 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
678 /* 10 */
679 { "adcB", { Eb, Gb } },
680 { "adcS", { Ev, Gv } },
681 { "adcB", { Gb, Eb } },
682 { "adcS", { Gv, Ev } },
683 { "adcB", { AL, Ib } },
684 { "adcS", { eAX, Iv } },
685 { "push{T|}", { ss } },
686 { "pop{T|}", { ss } },
687 /* 18 */
688 { "sbbB", { Eb, Gb } },
689 { "sbbS", { Ev, Gv } },
690 { "sbbB", { Gb, Eb } },
691 { "sbbS", { Gv, Ev } },
692 { "sbbB", { AL, Ib } },
693 { "sbbS", { eAX, Iv } },
694 { "push{T|}", { ds } },
695 { "pop{T|}", { ds } },
696 /* 20 */
697 { "andB", { Eb, Gb } },
698 { "andS", { Ev, Gv } },
699 { "andB", { Gb, Eb } },
700 { "andS", { Gv, Ev } },
701 { "andB", { AL, Ib } },
702 { "andS", { eAX, Iv } },
703 { "(bad)", { XX } }, /* SEG ES prefix */
704 { "daa{|}", { XX } },
705 /* 28 */
706 { "subB", { Eb, Gb } },
707 { "subS", { Ev, Gv } },
708 { "subB", { Gb, Eb } },
709 { "subS", { Gv, Ev } },
710 { "subB", { AL, Ib } },
711 { "subS", { eAX, Iv } },
712 { "(bad)", { XX } }, /* SEG CS prefix */
713 { "das{|}", { XX } },
714 /* 30 */
715 { "xorB", { Eb, Gb } },
716 { "xorS", { Ev, Gv } },
717 { "xorB", { Gb, Eb } },
718 { "xorS", { Gv, Ev } },
719 { "xorB", { AL, Ib } },
720 { "xorS", { eAX, Iv } },
721 { "(bad)", { XX } }, /* SEG SS prefix */
722 { "aaa{|}", { XX } },
723 /* 38 */
724 { "cmpB", { Eb, Gb } },
725 { "cmpS", { Ev, Gv } },
726 { "cmpB", { Gb, Eb } },
727 { "cmpS", { Gv, Ev } },
728 { "cmpB", { AL, Ib } },
729 { "cmpS", { eAX, Iv } },
730 { "(bad)", { XX } }, /* SEG DS prefix */
731 { "aas{|}", { XX } },
732 /* 40 */
733 { "inc{S|}", { RMeAX } },
734 { "inc{S|}", { RMeCX } },
735 { "inc{S|}", { RMeDX } },
736 { "inc{S|}", { RMeBX } },
737 { "inc{S|}", { RMeSP } },
738 { "inc{S|}", { RMeBP } },
739 { "inc{S|}", { RMeSI } },
740 { "inc{S|}", { RMeDI } },
741 /* 48 */
742 { "dec{S|}", { RMeAX } },
743 { "dec{S|}", { RMeCX } },
744 { "dec{S|}", { RMeDX } },
745 { "dec{S|}", { RMeBX } },
746 { "dec{S|}", { RMeSP } },
747 { "dec{S|}", { RMeBP } },
748 { "dec{S|}", { RMeSI } },
749 { "dec{S|}", { RMeDI } },
750 /* 50 */
751 { "pushV", { RMrAX } },
752 { "pushV", { RMrCX } },
753 { "pushV", { RMrDX } },
754 { "pushV", { RMrBX } },
755 { "pushV", { RMrSP } },
756 { "pushV", { RMrBP } },
757 { "pushV", { RMrSI } },
758 { "pushV", { RMrDI } },
759 /* 58 */
760 { "popV", { RMrAX } },
761 { "popV", { RMrCX } },
762 { "popV", { RMrDX } },
763 { "popV", { RMrBX } },
764 { "popV", { RMrSP } },
765 { "popV", { RMrBP } },
766 { "popV", { RMrSI } },
767 { "popV", { RMrDI } },
768 /* 60 */
769 { X86_64_0 },
770 { X86_64_1 },
771 { X86_64_2 },
772 { X86_64_3 },
773 { "(bad)", { XX } }, /* seg fs */
774 { "(bad)", { XX } }, /* seg gs */
775 { "(bad)", { XX } }, /* op size prefix */
776 { "(bad)", { XX } }, /* adr size prefix */
777 /* 68 */
778 { "pushT", { Iq } },
779 { "imulS", { Gv, Ev, Iv } },
780 { "pushT", { sIb } },
781 { "imulS", { Gv, Ev, sIb } },
782 { "ins{b||b|}", { Ybr, indirDX } },
783 { "ins{R||G|}", { Yzr, indirDX } },
784 { "outs{b||b|}", { indirDXr, Xb } },
785 { "outs{R||G|}", { indirDXr, Xz } },
786 /* 70 */
787 { "joH", { Jb, XX, cond_jump_flag } },
788 { "jnoH", { Jb, XX, cond_jump_flag } },
789 { "jbH", { Jb, XX, cond_jump_flag } },
790 { "jaeH", { Jb, XX, cond_jump_flag } },
791 { "jeH", { Jb, XX, cond_jump_flag } },
792 { "jneH", { Jb, XX, cond_jump_flag } },
793 { "jbeH", { Jb, XX, cond_jump_flag } },
794 { "jaH", { Jb, XX, cond_jump_flag } },
795 /* 78 */
796 { "jsH", { Jb, XX, cond_jump_flag } },
797 { "jnsH", { Jb, XX, cond_jump_flag } },
798 { "jpH", { Jb, XX, cond_jump_flag } },
799 { "jnpH", { Jb, XX, cond_jump_flag } },
800 { "jlH", { Jb, XX, cond_jump_flag } },
801 { "jgeH", { Jb, XX, cond_jump_flag } },
802 { "jleH", { Jb, XX, cond_jump_flag } },
803 { "jgH", { Jb, XX, cond_jump_flag } },
804 /* 80 */
805 { GRP1b },
806 { GRP1S },
807 { "(bad)", { XX } },
808 { GRP1Ss },
809 { "testB", { Eb, Gb } },
810 { "testS", { Ev, Gv } },
811 { "xchgB", { Eb, Gb } },
812 { "xchgS", { Ev, Gv } },
813 /* 88 */
814 { "movB", { Eb, Gb } },
815 { "movS", { Ev, Gv } },
816 { "movB", { Gb, Eb } },
817 { "movS", { Gv, Ev } },
818 { "movD", { Sv, Sw } },
819 { OPC_EXT_0 },
820 { "movD", { Sw, Sv } },
821 { GRP1a },
822 /* 90 */
823 { PREGRP38 },
824 { "xchgS", { RMeCX, eAX } },
825 { "xchgS", { RMeDX, eAX } },
826 { "xchgS", { RMeBX, eAX } },
827 { "xchgS", { RMeSP, eAX } },
828 { "xchgS", { RMeBP, eAX } },
829 { "xchgS", { RMeSI, eAX } },
830 { "xchgS", { RMeDI, eAX } },
831 /* 98 */
832 { "cW{t||t|}R", { XX } },
833 { "cR{t||t|}O", { XX } },
834 { "Jcall{T|}", { Ap } },
835 { "(bad)", { XX } }, /* fwait */
836 { "pushfT", { XX } },
837 { "popfT", { XX } },
838 { "sahf{|}", { XX } },
839 { "lahf{|}", { XX } },
840 /* a0 */
841 { "movB", { AL, Ob } },
842 { "movS", { eAX, Ov } },
843 { "movB", { Ob, AL } },
844 { "movS", { Ov, eAX } },
845 { "movs{b||b|}", { Ybr, Xb } },
846 { "movs{R||R|}", { Yvr, Xv } },
847 { "cmps{b||b|}", { Xb, Yb } },
848 { "cmps{R||R|}", { Xv, Yv } },
849 /* a8 */
850 { "testB", { AL, Ib } },
851 { "testS", { eAX, Iv } },
852 { "stosB", { Ybr, AL } },
853 { "stosS", { Yvr, eAX } },
854 { "lodsB", { ALr, Xb } },
855 { "lodsS", { eAXr, Xv } },
856 { "scasB", { AL, Yb } },
857 { "scasS", { eAX, Yv } },
858 /* b0 */
859 { "movB", { RMAL, Ib } },
860 { "movB", { RMCL, Ib } },
861 { "movB", { RMDL, Ib } },
862 { "movB", { RMBL, Ib } },
863 { "movB", { RMAH, Ib } },
864 { "movB", { RMCH, Ib } },
865 { "movB", { RMDH, Ib } },
866 { "movB", { RMBH, Ib } },
867 /* b8 */
868 { "movS", { RMeAX, Iv64 } },
869 { "movS", { RMeCX, Iv64 } },
870 { "movS", { RMeDX, Iv64 } },
871 { "movS", { RMeBX, Iv64 } },
872 { "movS", { RMeSP, Iv64 } },
873 { "movS", { RMeBP, Iv64 } },
874 { "movS", { RMeSI, Iv64 } },
875 { "movS", { RMeDI, Iv64 } },
876 /* c0 */
877 { GRP2b },
878 { GRP2S },
879 { "retT", { Iw } },
880 { "retT", { XX } },
881 { OPC_EXT_1 },
882 { OPC_EXT_2 },
883 { GRP11_C6 },
884 { GRP11_C7 },
885 /* c8 */
886 { "enterT", { Iw, Ib } },
887 { "leaveT", { XX } },
888 { "lretP", { Iw } },
889 { "lretP", { XX } },
890 { "int3", { XX } },
891 { "int", { Ib } },
892 { "into{|}", { XX } },
893 { "iretP", { XX } },
894 /* d0 */
895 { GRP2b_one },
896 { GRP2S_one },
897 { GRP2b_cl },
898 { GRP2S_cl },
899 { "aam{|}", { sIb } },
900 { "aad{|}", { sIb } },
901 { "(bad)", { XX } },
902 { "xlat", { DSBX } },
903 /* d8 */
904 { FLOAT },
905 { FLOAT },
906 { FLOAT },
907 { FLOAT },
908 { FLOAT },
909 { FLOAT },
910 { FLOAT },
911 { FLOAT },
912 /* e0 */
913 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
914 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
915 { "loopFH", { Jb, XX, loop_jcxz_flag } },
916 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
917 { "inB", { AL, Ib } },
918 { "inG", { zAX, Ib } },
919 { "outB", { Ib, AL } },
920 { "outG", { Ib, zAX } },
921 /* e8 */
922 { "callT", { Jv } },
923 { "jmpT", { Jv } },
924 { "Jjmp{T|}", { Ap } },
925 { "jmp", { Jb } },
926 { "inB", { AL, indirDX } },
927 { "inG", { zAX, indirDX } },
928 { "outB", { indirDX, AL } },
929 { "outG", { indirDX, zAX } },
930 /* f0 */
931 { "(bad)", { XX } }, /* lock prefix */
932 { "icebp", { XX } },
933 { "(bad)", { XX } }, /* repne */
934 { "(bad)", { XX } }, /* repz */
935 { "hlt", { XX } },
936 { "cmc", { XX } },
937 { GRP3b },
938 { GRP3S },
939 /* f8 */
940 { "clc", { XX } },
941 { "stc", { XX } },
942 { "cli", { XX } },
943 { "sti", { XX } },
944 { "cld", { XX } },
945 { "std", { XX } },
946 { GRP4 },
947 { GRP5 },
948 };
949
950 static const struct dis386 dis386_twobyte[] = {
951 /* 00 */
952 { GRP6 },
953 { GRP7 },
954 { "larS", { Gv, Ew } },
955 { "lslS", { Gv, Ew } },
956 { "(bad)", { XX } },
957 { "syscall", { XX } },
958 { "clts", { XX } },
959 { "sysretP", { XX } },
960 /* 08 */
961 { "invd", { XX } },
962 { "wbinvd", { XX } },
963 { "(bad)", { XX } },
964 { "ud2a", { XX } },
965 { "(bad)", { XX } },
966 { GRPAMD },
967 { "femms", { XX } },
968 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
969 /* 10 */
970 { PREGRP8 },
971 { PREGRP9 },
972 { PREGRP30 },
973 { OPC_EXT_34 },
974 { "unpcklpX", { XM, EXq } },
975 { "unpckhpX", { XM, EXq } },
976 { PREGRP31 },
977 { OPC_EXT_35 },
978 /* 18 */
979 { GRP16 },
980 { "(bad)", { XX } },
981 { "(bad)", { XX } },
982 { "(bad)", { XX } },
983 { "(bad)", { XX } },
984 { "(bad)", { XX } },
985 { "(bad)", { XX } },
986 { "nopQ", { Ev } },
987 /* 20 */
988 { "movZ", { Rm, Cm } },
989 { "movZ", { Rm, Dm } },
990 { "movZ", { Cm, Rm } },
991 { "movZ", { Dm, Rm } },
992 { "movL", { Rd, Td } },
993 { "(bad)", { XX } },
994 { "movL", { Td, Rd } },
995 { "(bad)", { XX } },
996 /* 28 */
997 { "movapX", { XM, EXx } },
998 { "movapX", { EXx, XM } },
999 { PREGRP2 },
1000 { PREGRP33 },
1001 { PREGRP4 },
1002 { PREGRP3 },
1003 { PREGRP93 },
1004 { PREGRP94 },
1005 /* 30 */
1006 { "wrmsr", { XX } },
1007 { "rdtsc", { XX } },
1008 { "rdmsr", { XX } },
1009 { "rdpmc", { XX } },
1010 { "sysenter", { XX } },
1011 { "sysexit", { XX } },
1012 { "(bad)", { XX } },
1013 { "(bad)", { XX } },
1014 /* 38 */
1015 { THREE_BYTE_0 },
1016 { "(bad)", { XX } },
1017 { THREE_BYTE_1 },
1018 { "(bad)", { XX } },
1019 { "(bad)", { XX } },
1020 { "(bad)", { XX } },
1021 { "(bad)", { XX } },
1022 { "(bad)", { XX } },
1023 /* 40 */
1024 { "cmovo", { Gv, Ev } },
1025 { "cmovno", { Gv, Ev } },
1026 { "cmovb", { Gv, Ev } },
1027 { "cmovae", { Gv, Ev } },
1028 { "cmove", { Gv, Ev } },
1029 { "cmovne", { Gv, Ev } },
1030 { "cmovbe", { Gv, Ev } },
1031 { "cmova", { Gv, Ev } },
1032 /* 48 */
1033 { "cmovs", { Gv, Ev } },
1034 { "cmovns", { Gv, Ev } },
1035 { "cmovp", { Gv, Ev } },
1036 { "cmovnp", { Gv, Ev } },
1037 { "cmovl", { Gv, Ev } },
1038 { "cmovge", { Gv, Ev } },
1039 { "cmovle", { Gv, Ev } },
1040 { "cmovg", { Gv, Ev } },
1041 /* 50 */
1042 { "movmskpX", { Gdq, XS } },
1043 { PREGRP13 },
1044 { PREGRP12 },
1045 { PREGRP11 },
1046 { "andpX", { XM, EXx } },
1047 { "andnpX", { XM, EXx } },
1048 { "orpX", { XM, EXx } },
1049 { "xorpX", { XM, EXx } },
1050 /* 58 */
1051 { PREGRP0 },
1052 { PREGRP10 },
1053 { PREGRP17 },
1054 { PREGRP16 },
1055 { PREGRP14 },
1056 { PREGRP7 },
1057 { PREGRP5 },
1058 { PREGRP6 },
1059 /* 60 */
1060 { PREGRP95 },
1061 { PREGRP96 },
1062 { PREGRP97 },
1063 { "packsswb", { MX, EM } },
1064 { "pcmpgtb", { MX, EM } },
1065 { "pcmpgtw", { MX, EM } },
1066 { "pcmpgtd", { MX, EM } },
1067 { "packuswb", { MX, EM } },
1068 /* 68 */
1069 { "punpckhbw", { MX, EM } },
1070 { "punpckhwd", { MX, EM } },
1071 { "punpckhdq", { MX, EM } },
1072 { "packssdw", { MX, EM } },
1073 { PREGRP26 },
1074 { PREGRP24 },
1075 { "movK", { MX, Edq } },
1076 { PREGRP19 },
1077 /* 70 */
1078 { PREGRP22 },
1079 { GRP12 },
1080 { GRP13 },
1081 { GRP14 },
1082 { "pcmpeqb", { MX, EM } },
1083 { "pcmpeqw", { MX, EM } },
1084 { "pcmpeqd", { MX, EM } },
1085 { "emms", { XX } },
1086 /* 78 */
1087 { PREGRP34 },
1088 { PREGRP35 },
1089 { "(bad)", { XX } },
1090 { "(bad)", { XX } },
1091 { PREGRP28 },
1092 { PREGRP29 },
1093 { PREGRP23 },
1094 { PREGRP20 },
1095 /* 80 */
1096 { "joH", { Jv, XX, cond_jump_flag } },
1097 { "jnoH", { Jv, XX, cond_jump_flag } },
1098 { "jbH", { Jv, XX, cond_jump_flag } },
1099 { "jaeH", { Jv, XX, cond_jump_flag } },
1100 { "jeH", { Jv, XX, cond_jump_flag } },
1101 { "jneH", { Jv, XX, cond_jump_flag } },
1102 { "jbeH", { Jv, XX, cond_jump_flag } },
1103 { "jaH", { Jv, XX, cond_jump_flag } },
1104 /* 88 */
1105 { "jsH", { Jv, XX, cond_jump_flag } },
1106 { "jnsH", { Jv, XX, cond_jump_flag } },
1107 { "jpH", { Jv, XX, cond_jump_flag } },
1108 { "jnpH", { Jv, XX, cond_jump_flag } },
1109 { "jlH", { Jv, XX, cond_jump_flag } },
1110 { "jgeH", { Jv, XX, cond_jump_flag } },
1111 { "jleH", { Jv, XX, cond_jump_flag } },
1112 { "jgH", { Jv, XX, cond_jump_flag } },
1113 /* 90 */
1114 { "seto", { Eb } },
1115 { "setno", { Eb } },
1116 { "setb", { Eb } },
1117 { "setae", { Eb } },
1118 { "sete", { Eb } },
1119 { "setne", { Eb } },
1120 { "setbe", { Eb } },
1121 { "seta", { Eb } },
1122 /* 98 */
1123 { "sets", { Eb } },
1124 { "setns", { Eb } },
1125 { "setp", { Eb } },
1126 { "setnp", { Eb } },
1127 { "setl", { Eb } },
1128 { "setge", { Eb } },
1129 { "setle", { Eb } },
1130 { "setg", { Eb } },
1131 /* a0 */
1132 { "pushT", { fs } },
1133 { "popT", { fs } },
1134 { "cpuid", { XX } },
1135 { "btS", { Ev, Gv } },
1136 { "shldS", { Ev, Gv, Ib } },
1137 { "shldS", { Ev, Gv, CL } },
1138 { GRPPADLCK2 },
1139 { GRPPADLCK1 },
1140 /* a8 */
1141 { "pushT", { gs } },
1142 { "popT", { gs } },
1143 { "rsm", { XX } },
1144 { "btsS", { Ev, Gv } },
1145 { "shrdS", { Ev, Gv, Ib } },
1146 { "shrdS", { Ev, Gv, CL } },
1147 { GRP15 },
1148 { "imulS", { Gv, Ev } },
1149 /* b0 */
1150 { "cmpxchgB", { Eb, Gb } },
1151 { "cmpxchgS", { Ev, Gv } },
1152 { OPC_EXT_3 },
1153 { "btrS", { Ev, Gv } },
1154 { OPC_EXT_4 },
1155 { OPC_EXT_5 },
1156 { "movz{bR|x|bR|x}", { Gv, Eb } },
1157 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1158 /* b8 */
1159 { PREGRP37 },
1160 { "ud2b", { XX } },
1161 { GRP8 },
1162 { "btcS", { Ev, Gv } },
1163 { "bsfS", { Gv, Ev } },
1164 { PREGRP36 },
1165 { "movs{bR|x|bR|x}", { Gv, Eb } },
1166 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1167 /* c0 */
1168 { "xaddB", { Eb, Gb } },
1169 { "xaddS", { Ev, Gv } },
1170 { PREGRP1 },
1171 { "movntiS", { Ev, Gv } },
1172 { "pinsrw", { MX, Edqw, Ib } },
1173 { "pextrw", { Gdq, MS, Ib } },
1174 { "shufpX", { XM, EXx, Ib } },
1175 { GRP9 },
1176 /* c8 */
1177 { "bswap", { RMeAX } },
1178 { "bswap", { RMeCX } },
1179 { "bswap", { RMeDX } },
1180 { "bswap", { RMeBX } },
1181 { "bswap", { RMeSP } },
1182 { "bswap", { RMeBP } },
1183 { "bswap", { RMeSI } },
1184 { "bswap", { RMeDI } },
1185 /* d0 */
1186 { PREGRP27 },
1187 { "psrlw", { MX, EM } },
1188 { "psrld", { MX, EM } },
1189 { "psrlq", { MX, EM } },
1190 { "paddq", { MX, EM } },
1191 { "pmullw", { MX, EM } },
1192 { PREGRP21 },
1193 { "pmovmskb", { Gdq, MS } },
1194 /* d8 */
1195 { "psubusb", { MX, EM } },
1196 { "psubusw", { MX, EM } },
1197 { "pminub", { MX, EM } },
1198 { "pand", { MX, EM } },
1199 { "paddusb", { MX, EM } },
1200 { "paddusw", { MX, EM } },
1201 { "pmaxub", { MX, EM } },
1202 { "pandn", { MX, EM } },
1203 /* e0 */
1204 { "pavgb", { MX, EM } },
1205 { "psraw", { MX, EM } },
1206 { "psrad", { MX, EM } },
1207 { "pavgw", { MX, EM } },
1208 { "pmulhuw", { MX, EM } },
1209 { "pmulhw", { MX, EM } },
1210 { PREGRP15 },
1211 { PREGRP25 },
1212 /* e8 */
1213 { "psubsb", { MX, EM } },
1214 { "psubsw", { MX, EM } },
1215 { "pminsw", { MX, EM } },
1216 { "por", { MX, EM } },
1217 { "paddsb", { MX, EM } },
1218 { "paddsw", { MX, EM } },
1219 { "pmaxsw", { MX, EM } },
1220 { "pxor", { MX, EM } },
1221 /* f0 */
1222 { PREGRP32 },
1223 { "psllw", { MX, EM } },
1224 { "pslld", { MX, EM } },
1225 { "psllq", { MX, EM } },
1226 { "pmuludq", { MX, EM } },
1227 { "pmaddwd", { MX, EM } },
1228 { "psadbw", { MX, EM } },
1229 { PREGRP18 },
1230 /* f8 */
1231 { "psubb", { MX, EM } },
1232 { "psubw", { MX, EM } },
1233 { "psubd", { MX, EM } },
1234 { "psubq", { MX, EM } },
1235 { "paddb", { MX, EM } },
1236 { "paddw", { MX, EM } },
1237 { "paddd", { MX, EM } },
1238 { "(bad)", { XX } },
1239 };
1240
1241 static const unsigned char onebyte_has_modrm[256] = {
1242 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1243 /* ------------------------------- */
1244 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1245 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1246 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1247 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1248 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1249 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1250 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1251 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1252 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1253 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1254 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1255 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1256 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1257 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1258 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1259 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1260 /* ------------------------------- */
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262 };
1263
1264 static const unsigned char twobyte_has_modrm[256] = {
1265 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1266 /* ------------------------------- */
1267 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1268 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1269 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1270 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1271 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1272 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1273 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1274 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1275 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1276 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1277 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1278 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1279 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1280 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1281 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1282 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1283 /* ------------------------------- */
1284 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1285 };
1286
1287 static char obuf[100];
1288 static char *obufp;
1289 static char scratchbuf[100];
1290 static unsigned char *start_codep;
1291 static unsigned char *insn_codep;
1292 static unsigned char *codep;
1293 static const char *lock_prefix;
1294 static const char *data_prefix;
1295 static const char *addr_prefix;
1296 static const char *repz_prefix;
1297 static const char *repnz_prefix;
1298 static disassemble_info *the_info;
1299 static struct
1300 {
1301 int mod;
1302 int reg;
1303 int rm;
1304 }
1305 modrm;
1306 static unsigned char need_modrm;
1307
1308 /* If we are accessing mod/rm/reg without need_modrm set, then the
1309 values are stale. Hitting this abort likely indicates that you
1310 need to update onebyte_has_modrm or twobyte_has_modrm. */
1311 #define MODRM_CHECK if (!need_modrm) abort ()
1312
1313 static const char **names64;
1314 static const char **names32;
1315 static const char **names16;
1316 static const char **names8;
1317 static const char **names8rex;
1318 static const char **names_seg;
1319 static const char **index16;
1320
1321 static const char *intel_names64[] = {
1322 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1323 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1324 };
1325 static const char *intel_names32[] = {
1326 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1327 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1328 };
1329 static const char *intel_names16[] = {
1330 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1331 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1332 };
1333 static const char *intel_names8[] = {
1334 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1335 };
1336 static const char *intel_names8rex[] = {
1337 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1338 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1339 };
1340 static const char *intel_names_seg[] = {
1341 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1342 };
1343 static const char *intel_index16[] = {
1344 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1345 };
1346
1347 static const char *att_names64[] = {
1348 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1349 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1350 };
1351 static const char *att_names32[] = {
1352 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1353 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1354 };
1355 static const char *att_names16[] = {
1356 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1357 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1358 };
1359 static const char *att_names8[] = {
1360 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1361 };
1362 static const char *att_names8rex[] = {
1363 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1364 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1365 };
1366 static const char *att_names_seg[] = {
1367 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1368 };
1369 static const char *att_index16[] = {
1370 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1371 };
1372
1373 static const struct dis386 grps[][8] = {
1374 /* GRP1a */
1375 {
1376 { "popU", { stackEv } },
1377 { "(bad)", { XX } },
1378 { "(bad)", { XX } },
1379 { "(bad)", { XX } },
1380 { "(bad)", { XX } },
1381 { "(bad)", { XX } },
1382 { "(bad)", { XX } },
1383 { "(bad)", { XX } },
1384 },
1385 /* GRP1b */
1386 {
1387 { "addA", { Eb, Ib } },
1388 { "orA", { Eb, Ib } },
1389 { "adcA", { Eb, Ib } },
1390 { "sbbA", { Eb, Ib } },
1391 { "andA", { Eb, Ib } },
1392 { "subA", { Eb, Ib } },
1393 { "xorA", { Eb, Ib } },
1394 { "cmpA", { Eb, Ib } },
1395 },
1396 /* GRP1S */
1397 {
1398 { "addQ", { Ev, Iv } },
1399 { "orQ", { Ev, Iv } },
1400 { "adcQ", { Ev, Iv } },
1401 { "sbbQ", { Ev, Iv } },
1402 { "andQ", { Ev, Iv } },
1403 { "subQ", { Ev, Iv } },
1404 { "xorQ", { Ev, Iv } },
1405 { "cmpQ", { Ev, Iv } },
1406 },
1407 /* GRP1Ss */
1408 {
1409 { "addQ", { Ev, sIb } },
1410 { "orQ", { Ev, sIb } },
1411 { "adcQ", { Ev, sIb } },
1412 { "sbbQ", { Ev, sIb } },
1413 { "andQ", { Ev, sIb } },
1414 { "subQ", { Ev, sIb } },
1415 { "xorQ", { Ev, sIb } },
1416 { "cmpQ", { Ev, sIb } },
1417 },
1418 /* GRP2b */
1419 {
1420 { "rolA", { Eb, Ib } },
1421 { "rorA", { Eb, Ib } },
1422 { "rclA", { Eb, Ib } },
1423 { "rcrA", { Eb, Ib } },
1424 { "shlA", { Eb, Ib } },
1425 { "shrA", { Eb, Ib } },
1426 { "(bad)", { XX } },
1427 { "sarA", { Eb, Ib } },
1428 },
1429 /* GRP2S */
1430 {
1431 { "rolQ", { Ev, Ib } },
1432 { "rorQ", { Ev, Ib } },
1433 { "rclQ", { Ev, Ib } },
1434 { "rcrQ", { Ev, Ib } },
1435 { "shlQ", { Ev, Ib } },
1436 { "shrQ", { Ev, Ib } },
1437 { "(bad)", { XX } },
1438 { "sarQ", { Ev, Ib } },
1439 },
1440 /* GRP2b_one */
1441 {
1442 { "rolA", { Eb, I1 } },
1443 { "rorA", { Eb, I1 } },
1444 { "rclA", { Eb, I1 } },
1445 { "rcrA", { Eb, I1 } },
1446 { "shlA", { Eb, I1 } },
1447 { "shrA", { Eb, I1 } },
1448 { "(bad)", { XX } },
1449 { "sarA", { Eb, I1 } },
1450 },
1451 /* GRP2S_one */
1452 {
1453 { "rolQ", { Ev, I1 } },
1454 { "rorQ", { Ev, I1 } },
1455 { "rclQ", { Ev, I1 } },
1456 { "rcrQ", { Ev, I1 } },
1457 { "shlQ", { Ev, I1 } },
1458 { "shrQ", { Ev, I1 } },
1459 { "(bad)", { XX } },
1460 { "sarQ", { Ev, I1 } },
1461 },
1462 /* GRP2b_cl */
1463 {
1464 { "rolA", { Eb, CL } },
1465 { "rorA", { Eb, CL } },
1466 { "rclA", { Eb, CL } },
1467 { "rcrA", { Eb, CL } },
1468 { "shlA", { Eb, CL } },
1469 { "shrA", { Eb, CL } },
1470 { "(bad)", { XX } },
1471 { "sarA", { Eb, CL } },
1472 },
1473 /* GRP2S_cl */
1474 {
1475 { "rolQ", { Ev, CL } },
1476 { "rorQ", { Ev, CL } },
1477 { "rclQ", { Ev, CL } },
1478 { "rcrQ", { Ev, CL } },
1479 { "shlQ", { Ev, CL } },
1480 { "shrQ", { Ev, CL } },
1481 { "(bad)", { XX } },
1482 { "sarQ", { Ev, CL } },
1483 },
1484 /* GRP3b */
1485 {
1486 { "testA", { Eb, Ib } },
1487 { "(bad)", { Eb } },
1488 { "notA", { Eb } },
1489 { "negA", { Eb } },
1490 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1491 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1492 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1493 { "idivA", { Eb } }, /* and idiv for consistency. */
1494 },
1495 /* GRP3S */
1496 {
1497 { "testQ", { Ev, Iv } },
1498 { "(bad)", { XX } },
1499 { "notQ", { Ev } },
1500 { "negQ", { Ev } },
1501 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1502 { "imulQ", { Ev } },
1503 { "divQ", { Ev } },
1504 { "idivQ", { Ev } },
1505 },
1506 /* GRP4 */
1507 {
1508 { "incA", { Eb } },
1509 { "decA", { Eb } },
1510 { "(bad)", { XX } },
1511 { "(bad)", { XX } },
1512 { "(bad)", { XX } },
1513 { "(bad)", { XX } },
1514 { "(bad)", { XX } },
1515 { "(bad)", { XX } },
1516 },
1517 /* GRP5 */
1518 {
1519 { "incQ", { Ev } },
1520 { "decQ", { Ev } },
1521 { "callT", { indirEv } },
1522 { "JcallT", { indirEp } },
1523 { "jmpT", { indirEv } },
1524 { "JjmpT", { indirEp } },
1525 { "pushU", { stackEv } },
1526 { "(bad)", { XX } },
1527 },
1528 /* GRP6 */
1529 {
1530 { "sldtD", { Sv } },
1531 { "strD", { Sv } },
1532 { "lldt", { Ew } },
1533 { "ltr", { Ew } },
1534 { "verr", { Ew } },
1535 { "verw", { Ew } },
1536 { "(bad)", { XX } },
1537 { "(bad)", { XX } },
1538 },
1539 /* GRP7 */
1540 {
1541 { OPC_EXT_6 },
1542 { OPC_EXT_7 },
1543 { OPC_EXT_8 },
1544 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1545 { "smswD", { Sv } },
1546 { "(bad)", { XX } },
1547 { "lmsw", { Ew } },
1548 { OPC_EXT_38 },
1549 },
1550 /* GRP8 */
1551 {
1552 { "(bad)", { XX } },
1553 { "(bad)", { XX } },
1554 { "(bad)", { XX } },
1555 { "(bad)", { XX } },
1556 { "btQ", { Ev, Ib } },
1557 { "btsQ", { Ev, Ib } },
1558 { "btrQ", { Ev, Ib } },
1559 { "btcQ", { Ev, Ib } },
1560 },
1561 /* GRP9 */
1562 {
1563 { "(bad)", { XX } },
1564 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1565 { "(bad)", { XX } },
1566 { "(bad)", { XX } },
1567 { "(bad)", { XX } },
1568 { "(bad)", { XX } },
1569 { OPC_EXT_9 },
1570 { OPC_EXT_10 },
1571 },
1572 /* GRP11_C6 */
1573 {
1574 { "movA", { Eb, Ib } },
1575 { "(bad)", { XX } },
1576 { "(bad)", { XX } },
1577 { "(bad)", { XX } },
1578 { "(bad)", { XX } },
1579 { "(bad)", { XX } },
1580 { "(bad)", { XX } },
1581 { "(bad)", { XX } },
1582 },
1583 /* GRP11_C7 */
1584 {
1585 { "movQ", { Ev, Iv } },
1586 { "(bad)", { XX } },
1587 { "(bad)", { XX } },
1588 { "(bad)", { XX } },
1589 { "(bad)", { XX } },
1590 { "(bad)", { XX } },
1591 { "(bad)", { XX } },
1592 { "(bad)", { XX } },
1593 },
1594 /* GRP12 */
1595 {
1596 { "(bad)", { XX } },
1597 { "(bad)", { XX } },
1598 { OPC_EXT_11 },
1599 { "(bad)", { XX } },
1600 { OPC_EXT_12 },
1601 { "(bad)", { XX } },
1602 { OPC_EXT_13 },
1603 { "(bad)", { XX } },
1604 },
1605 /* GRP13 */
1606 {
1607 { "(bad)", { XX } },
1608 { "(bad)", { XX } },
1609 { OPC_EXT_14 },
1610 { "(bad)", { XX } },
1611 { OPC_EXT_15 },
1612 { "(bad)", { XX } },
1613 { OPC_EXT_16 },
1614 { "(bad)", { XX } },
1615 },
1616 /* GRP14 */
1617 {
1618 { "(bad)", { XX } },
1619 { "(bad)", { XX } },
1620 { OPC_EXT_17 },
1621 { OPC_EXT_18 },
1622 { "(bad)", { XX } },
1623 { "(bad)", { XX } },
1624 { OPC_EXT_19 },
1625 { OPC_EXT_20 },
1626 },
1627 /* GRP15 */
1628 {
1629 { OPC_EXT_21 },
1630 { OPC_EXT_22 },
1631 { OPC_EXT_23 },
1632 { OPC_EXT_24 },
1633 { "(bad)", { XX } },
1634 { OPC_EXT_25 },
1635 { OPC_EXT_26 },
1636 { OPC_EXT_27 },
1637 },
1638 /* GRP16 */
1639 {
1640 { OPC_EXT_28 },
1641 { OPC_EXT_29 },
1642 { OPC_EXT_30 },
1643 { OPC_EXT_31 },
1644 { "(bad)", { XX } },
1645 { "(bad)", { XX } },
1646 { "(bad)", { XX } },
1647 { "(bad)", { XX } },
1648 },
1649 /* GRPAMD */
1650 {
1651 { "prefetch", { Eb } },
1652 { "prefetchw", { Eb } },
1653 { "(bad)", { XX } },
1654 { "(bad)", { XX } },
1655 { "(bad)", { XX } },
1656 { "(bad)", { XX } },
1657 { "(bad)", { XX } },
1658 { "(bad)", { XX } },
1659 },
1660 /* GRPPADLCK1 */
1661 {
1662 { "xstore-rng", { { OP_0f07, 0 } } },
1663 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1664 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1665 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1666 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1667 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1668 { "(bad)", { { OP_0f07, 0 } } },
1669 { "(bad)", { { OP_0f07, 0 } } },
1670 },
1671 /* GRPPADLCK2 */
1672 {
1673 { "montmul", { { OP_0f07, 0 } } },
1674 { "xsha1", { { OP_0f07, 0 } } },
1675 { "xsha256", { { OP_0f07, 0 } } },
1676 { "(bad)", { { OP_0f07, 0 } } },
1677 { "(bad)", { { OP_0f07, 0 } } },
1678 { "(bad)", { { OP_0f07, 0 } } },
1679 { "(bad)", { { OP_0f07, 0 } } },
1680 { "(bad)", { { OP_0f07, 0 } } },
1681 }
1682 };
1683
1684 static const struct dis386 prefix_user_table[][4] = {
1685 /* PREGRP0 */
1686 {
1687 { "addps", { XM, EXx } },
1688 { "addss", { XM, EXd } },
1689 { "addpd", { XM, EXx } },
1690 { "addsd", { XM, EXq } },
1691 },
1692 /* PREGRP1 */
1693 {
1694 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1695 { "", { XM, EXd, OPSIMD } },
1696 { "", { XM, EXx, OPSIMD } },
1697 { "", { XM, EXq, OPSIMD } },
1698 },
1699 /* PREGRP2 */
1700 {
1701 { "cvtpi2ps", { XM, EMCq } },
1702 { "cvtsi2ssY", { XM, Ev } },
1703 { "cvtpi2pd", { XM, EMCq } },
1704 { "cvtsi2sdY", { XM, Ev } },
1705 },
1706 /* PREGRP3 */
1707 {
1708 { "cvtps2pi", { MXC, EXq } },
1709 { "cvtss2siY", { Gv, EXd } },
1710 { "cvtpd2pi", { MXC, EXx } },
1711 { "cvtsd2siY", { Gv, EXq } },
1712 },
1713 /* PREGRP4 */
1714 {
1715 { "cvttps2pi", { MXC, EXq } },
1716 { "cvttss2siY", { Gv, EXd } },
1717 { "cvttpd2pi", { MXC, EXx } },
1718 { "cvttsd2siY", { Gv, EXq } },
1719 },
1720 /* PREGRP5 */
1721 {
1722 { "divps", { XM, EXx } },
1723 { "divss", { XM, EXd } },
1724 { "divpd", { XM, EXx } },
1725 { "divsd", { XM, EXq } },
1726 },
1727 /* PREGRP6 */
1728 {
1729 { "maxps", { XM, EXx } },
1730 { "maxss", { XM, EXd } },
1731 { "maxpd", { XM, EXx } },
1732 { "maxsd", { XM, EXq } },
1733 },
1734 /* PREGRP7 */
1735 {
1736 { "minps", { XM, EXx } },
1737 { "minss", { XM, EXd } },
1738 { "minpd", { XM, EXx } },
1739 { "minsd", { XM, EXq } },
1740 },
1741 /* PREGRP8 */
1742 {
1743 { "movups", { XM, EXx } },
1744 { "movss", { XM, EXd } },
1745 { "movupd", { XM, EXx } },
1746 { "movsd", { XM, EXq } },
1747 },
1748 /* PREGRP9 */
1749 {
1750 { "movups", { EXx, XM } },
1751 { "movss", { EXd, XM } },
1752 { "movupd", { EXx, XM } },
1753 { "movsd", { EXq, XM } },
1754 },
1755 /* PREGRP10 */
1756 {
1757 { "mulps", { XM, EXx } },
1758 { "mulss", { XM, EXd } },
1759 { "mulpd", { XM, EXx } },
1760 { "mulsd", { XM, EXq } },
1761 },
1762 /* PREGRP11 */
1763 {
1764 { "rcpps", { XM, EXx } },
1765 { "rcpss", { XM, EXd } },
1766 { "(bad)", { XM, EXx } },
1767 { "(bad)", { XM, EXx } },
1768 },
1769 /* PREGRP12 */
1770 {
1771 { "rsqrtps",{ XM, EXx } },
1772 { "rsqrtss",{ XM, EXd } },
1773 { "(bad)", { XM, EXx } },
1774 { "(bad)", { XM, EXx } },
1775 },
1776 /* PREGRP13 */
1777 {
1778 { "sqrtps", { XM, EXx } },
1779 { "sqrtss", { XM, EXd } },
1780 { "sqrtpd", { XM, EXx } },
1781 { "sqrtsd", { XM, EXq } },
1782 },
1783 /* PREGRP14 */
1784 {
1785 { "subps", { XM, EXx } },
1786 { "subss", { XM, EXd } },
1787 { "subpd", { XM, EXx } },
1788 { "subsd", { XM, EXq } },
1789 },
1790 /* PREGRP15 */
1791 {
1792 { "(bad)", { XM, EXx } },
1793 { "cvtdq2pd", { XM, EXq } },
1794 { "cvttpd2dq", { XM, EXx } },
1795 { "cvtpd2dq", { XM, EXx } },
1796 },
1797 /* PREGRP16 */
1798 {
1799 { "cvtdq2ps", { XM, EXx } },
1800 { "cvttps2dq", { XM, EXx } },
1801 { "cvtps2dq", { XM, EXx } },
1802 { "(bad)", { XM, EXx } },
1803 },
1804 /* PREGRP17 */
1805 {
1806 { "cvtps2pd", { XM, EXq } },
1807 { "cvtss2sd", { XM, EXd } },
1808 { "cvtpd2ps", { XM, EXx } },
1809 { "cvtsd2ss", { XM, EXq } },
1810 },
1811 /* PREGRP18 */
1812 {
1813 { "maskmovq", { MX, MS } },
1814 { "(bad)", { XM, EXx } },
1815 { "maskmovdqu", { XM, XS } },
1816 { "(bad)", { XM, EXx } },
1817 },
1818 /* PREGRP19 */
1819 {
1820 { "movq", { MX, EM } },
1821 { "movdqu", { XM, EXx } },
1822 { "movdqa", { XM, EXx } },
1823 { "(bad)", { XM, EXx } },
1824 },
1825 /* PREGRP20 */
1826 {
1827 { "movq", { EM, MX } },
1828 { "movdqu", { EXx, XM } },
1829 { "movdqa", { EXx, XM } },
1830 { "(bad)", { EXx, XM } },
1831 },
1832 /* PREGRP21 */
1833 {
1834 { "(bad)", { EXx, XM } },
1835 { "movq2dq",{ XM, MS } },
1836 { "movq", { EXq, XM } },
1837 { "movdq2q",{ MX, XS } },
1838 },
1839 /* PREGRP22 */
1840 {
1841 { "pshufw", { MX, EM, Ib } },
1842 { "pshufhw",{ XM, EXx, Ib } },
1843 { "pshufd", { XM, EXx, Ib } },
1844 { "pshuflw",{ XM, EXx, Ib } },
1845 },
1846 /* PREGRP23 */
1847 {
1848 { "movK", { Edq, MX } },
1849 { "movq", { XM, EXq } },
1850 { "movK", { Edq, XM } },
1851 { "(bad)", { Ed, XM } },
1852 },
1853 /* PREGRP24 */
1854 {
1855 { "(bad)", { MX, EXx } },
1856 { "(bad)", { XM, EXx } },
1857 { "punpckhqdq", { XM, EXx } },
1858 { "(bad)", { XM, EXx } },
1859 },
1860 /* PREGRP25 */
1861 {
1862 { "movntq", { EM, MX } },
1863 { "(bad)", { EM, XM } },
1864 { "movntdq",{ EM, XM } },
1865 { "(bad)", { EM, XM } },
1866 },
1867 /* PREGRP26 */
1868 {
1869 { "(bad)", { MX, EXx } },
1870 { "(bad)", { XM, EXx } },
1871 { "punpcklqdq", { XM, EXx } },
1872 { "(bad)", { XM, EXx } },
1873 },
1874 /* PREGRP27 */
1875 {
1876 { "(bad)", { MX, EXx } },
1877 { "(bad)", { XM, EXx } },
1878 { "addsubpd", { XM, EXx } },
1879 { "addsubps", { XM, EXx } },
1880 },
1881 /* PREGRP28 */
1882 {
1883 { "(bad)", { MX, EXx } },
1884 { "(bad)", { XM, EXx } },
1885 { "haddpd", { XM, EXx } },
1886 { "haddps", { XM, EXx } },
1887 },
1888 /* PREGRP29 */
1889 {
1890 { "(bad)", { MX, EXx } },
1891 { "(bad)", { XM, EXx } },
1892 { "hsubpd", { XM, EXx } },
1893 { "hsubps", { XM, EXx } },
1894 },
1895 /* PREGRP30 */
1896 {
1897 { OPC_EXT_36 },
1898 { "movsldup", { XM, EXx } },
1899 { "movlpd", { XM, EXq } },
1900 { "movddup", { XM, EXq } },
1901 },
1902 /* PREGRP31 */
1903 {
1904 { OPC_EXT_37 },
1905 { "movshdup", { XM, EXx } },
1906 { "movhpd", { XM, EXq } },
1907 { "(bad)", { XM, EXq } },
1908 },
1909 /* PREGRP32 */
1910 {
1911 { "(bad)", { XM, EXx } },
1912 { "(bad)", { XM, EXx } },
1913 { "(bad)", { XM, EXx } },
1914 { OPC_EXT_32 },
1915 },
1916 /* PREGRP33 */
1917 {
1918 {"movntps", { Ev, XM } },
1919 {"movntss", { Ed, XM } },
1920 {"movntpd", { Ev, XM } },
1921 {"movntsd", { Eq, XM } },
1922 },
1923
1924 /* PREGRP34 */
1925 {
1926 {"vmread", { Em, Gm } },
1927 {"(bad)", { XX } },
1928 {"extrq", { XS, Ib, Ib } },
1929 {"insertq", { XM, XS, Ib, Ib } },
1930 },
1931
1932 /* PREGRP35 */
1933 {
1934 {"vmwrite", { Gm, Em } },
1935 {"(bad)", { XX } },
1936 {"extrq", { XM, XS } },
1937 {"insertq", { XM, XS } },
1938 },
1939
1940 /* PREGRP36 */
1941 {
1942 { "bsrS", { Gv, Ev } },
1943 { "lzcntS", { Gv, Ev } },
1944 { "bsrS", { Gv, Ev } },
1945 { "(bad)", { XX } },
1946 },
1947
1948 /* PREGRP37 */
1949 {
1950 { "(bad)", { XX } },
1951 { "popcntS", { Gv, Ev } },
1952 { "(bad)", { XX } },
1953 { "(bad)", { XX } },
1954 },
1955
1956 /* PREGRP38 */
1957 {
1958 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1959 { "pause", { XX } },
1960 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1961 { "(bad)", { XX } },
1962 },
1963
1964 /* PREGRP39 */
1965 {
1966 { "(bad)", { XX } },
1967 { "(bad)", { XX } },
1968 { "pblendvb", {XM, EXx, XMM0 } },
1969 { "(bad)", { XX } },
1970 },
1971
1972 /* PREGRP40 */
1973 {
1974 { "(bad)", { XX } },
1975 { "(bad)", { XX } },
1976 { "blendvps", {XM, EXx, XMM0 } },
1977 { "(bad)", { XX } },
1978 },
1979
1980 /* PREGRP41 */
1981 {
1982 { "(bad)", { XX } },
1983 { "(bad)", { XX } },
1984 { "blendvpd", { XM, EXx, XMM0 } },
1985 { "(bad)", { XX } },
1986 },
1987
1988 /* PREGRP42 */
1989 {
1990 { "(bad)", { XX } },
1991 { "(bad)", { XX } },
1992 { "ptest", { XM, EXx } },
1993 { "(bad)", { XX } },
1994 },
1995
1996 /* PREGRP43 */
1997 {
1998 { "(bad)", { XX } },
1999 { "(bad)", { XX } },
2000 { "pmovsxbw", { XM, EXq } },
2001 { "(bad)", { XX } },
2002 },
2003
2004 /* PREGRP44 */
2005 {
2006 { "(bad)", { XX } },
2007 { "(bad)", { XX } },
2008 { "pmovsxbd", { XM, EXd } },
2009 { "(bad)", { XX } },
2010 },
2011
2012 /* PREGRP45 */
2013 {
2014 { "(bad)", { XX } },
2015 { "(bad)", { XX } },
2016 { "pmovsxbq", { XM, EXw } },
2017 { "(bad)", { XX } },
2018 },
2019
2020 /* PREGRP46 */
2021 {
2022 { "(bad)", { XX } },
2023 { "(bad)", { XX } },
2024 { "pmovsxwd", { XM, EXq } },
2025 { "(bad)", { XX } },
2026 },
2027
2028 /* PREGRP47 */
2029 {
2030 { "(bad)", { XX } },
2031 { "(bad)", { XX } },
2032 { "pmovsxwq", { XM, EXd } },
2033 { "(bad)", { XX } },
2034 },
2035
2036 /* PREGRP48 */
2037 {
2038 { "(bad)", { XX } },
2039 { "(bad)", { XX } },
2040 { "pmovsxdq", { XM, EXq } },
2041 { "(bad)", { XX } },
2042 },
2043
2044 /* PREGRP49 */
2045 {
2046 { "(bad)", { XX } },
2047 { "(bad)", { XX } },
2048 { "pmuldq", { XM, EXx } },
2049 { "(bad)", { XX } },
2050 },
2051
2052 /* PREGRP50 */
2053 {
2054 { "(bad)", { XX } },
2055 { "(bad)", { XX } },
2056 { "pcmpeqq", { XM, EXx } },
2057 { "(bad)", { XX } },
2058 },
2059
2060 /* PREGRP51 */
2061 {
2062 { "(bad)", { XX } },
2063 { "(bad)", { XX } },
2064 { "movntdqa", { XM, EM } },
2065 { "(bad)", { XX } },
2066 },
2067
2068 /* PREGRP52 */
2069 {
2070 { "(bad)", { XX } },
2071 { "(bad)", { XX } },
2072 { "packusdw", { XM, EXx } },
2073 { "(bad)", { XX } },
2074 },
2075
2076 /* PREGRP53 */
2077 {
2078 { "(bad)", { XX } },
2079 { "(bad)", { XX } },
2080 { "pmovzxbw", { XM, EXq } },
2081 { "(bad)", { XX } },
2082 },
2083
2084 /* PREGRP54 */
2085 {
2086 { "(bad)", { XX } },
2087 { "(bad)", { XX } },
2088 { "pmovzxbd", { XM, EXd } },
2089 { "(bad)", { XX } },
2090 },
2091
2092 /* PREGRP55 */
2093 {
2094 { "(bad)", { XX } },
2095 { "(bad)", { XX } },
2096 { "pmovzxbq", { XM, EXw } },
2097 { "(bad)", { XX } },
2098 },
2099
2100 /* PREGRP56 */
2101 {
2102 { "(bad)", { XX } },
2103 { "(bad)", { XX } },
2104 { "pmovzxwd", { XM, EXq } },
2105 { "(bad)", { XX } },
2106 },
2107
2108 /* PREGRP57 */
2109 {
2110 { "(bad)", { XX } },
2111 { "(bad)", { XX } },
2112 { "pmovzxwq", { XM, EXd } },
2113 { "(bad)", { XX } },
2114 },
2115
2116 /* PREGRP58 */
2117 {
2118 { "(bad)", { XX } },
2119 { "(bad)", { XX } },
2120 { "pmovzxdq", { XM, EXq } },
2121 { "(bad)", { XX } },
2122 },
2123
2124 /* PREGRP59 */
2125 {
2126 { "(bad)", { XX } },
2127 { "(bad)", { XX } },
2128 { "pminsb", { XM, EXx } },
2129 { "(bad)", { XX } },
2130 },
2131
2132 /* PREGRP60 */
2133 {
2134 { "(bad)", { XX } },
2135 { "(bad)", { XX } },
2136 { "pminsd", { XM, EXx } },
2137 { "(bad)", { XX } },
2138 },
2139
2140 /* PREGRP61 */
2141 {
2142 { "(bad)", { XX } },
2143 { "(bad)", { XX } },
2144 { "pminuw", { XM, EXx } },
2145 { "(bad)", { XX } },
2146 },
2147
2148 /* PREGRP62 */
2149 {
2150 { "(bad)", { XX } },
2151 { "(bad)", { XX } },
2152 { "pminud", { XM, EXx } },
2153 { "(bad)", { XX } },
2154 },
2155
2156 /* PREGRP63 */
2157 {
2158 { "(bad)", { XX } },
2159 { "(bad)", { XX } },
2160 { "pmaxsb", { XM, EXx } },
2161 { "(bad)", { XX } },
2162 },
2163
2164 /* PREGRP64 */
2165 {
2166 { "(bad)", { XX } },
2167 { "(bad)", { XX } },
2168 { "pmaxsd", { XM, EXx } },
2169 { "(bad)", { XX } },
2170 },
2171
2172 /* PREGRP65 */
2173 {
2174 { "(bad)", { XX } },
2175 { "(bad)", { XX } },
2176 { "pmaxuw", { XM, EXx } },
2177 { "(bad)", { XX } },
2178 },
2179
2180 /* PREGRP66 */
2181 {
2182 { "(bad)", { XX } },
2183 { "(bad)", { XX } },
2184 { "pmaxud", { XM, EXx } },
2185 { "(bad)", { XX } },
2186 },
2187
2188 /* PREGRP67 */
2189 {
2190 { "(bad)", { XX } },
2191 { "(bad)", { XX } },
2192 { "pmulld", { XM, EXx } },
2193 { "(bad)", { XX } },
2194 },
2195
2196 /* PREGRP68 */
2197 {
2198 { "(bad)", { XX } },
2199 { "(bad)", { XX } },
2200 { "phminposuw", { XM, EXx } },
2201 { "(bad)", { XX } },
2202 },
2203
2204 /* PREGRP69 */
2205 {
2206 { "(bad)", { XX } },
2207 { "(bad)", { XX } },
2208 { "roundps", { XM, EXx, Ib } },
2209 { "(bad)", { XX } },
2210 },
2211
2212 /* PREGRP70 */
2213 {
2214 { "(bad)", { XX } },
2215 { "(bad)", { XX } },
2216 { "roundpd", { XM, EXx, Ib } },
2217 { "(bad)", { XX } },
2218 },
2219
2220 /* PREGRP71 */
2221 {
2222 { "(bad)", { XX } },
2223 { "(bad)", { XX } },
2224 { "roundss", { XM, EXd, Ib } },
2225 { "(bad)", { XX } },
2226 },
2227
2228 /* PREGRP72 */
2229 {
2230 { "(bad)", { XX } },
2231 { "(bad)", { XX } },
2232 { "roundsd", { XM, EXq, Ib } },
2233 { "(bad)", { XX } },
2234 },
2235
2236 /* PREGRP73 */
2237 {
2238 { "(bad)", { XX } },
2239 { "(bad)", { XX } },
2240 { "blendps", { XM, EXx, Ib } },
2241 { "(bad)", { XX } },
2242 },
2243
2244 /* PREGRP74 */
2245 {
2246 { "(bad)", { XX } },
2247 { "(bad)", { XX } },
2248 { "blendpd", { XM, EXx, Ib } },
2249 { "(bad)", { XX } },
2250 },
2251
2252 /* PREGRP75 */
2253 {
2254 { "(bad)", { XX } },
2255 { "(bad)", { XX } },
2256 { "pblendw", { XM, EXx, Ib } },
2257 { "(bad)", { XX } },
2258 },
2259
2260 /* PREGRP76 */
2261 {
2262 { "(bad)", { XX } },
2263 { "(bad)", { XX } },
2264 { "pextrb", { Edqb, XM, Ib } },
2265 { "(bad)", { XX } },
2266 },
2267
2268 /* PREGRP77 */
2269 {
2270 { "(bad)", { XX } },
2271 { "(bad)", { XX } },
2272 { "pextrw", { Edqw, XM, Ib } },
2273 { "(bad)", { XX } },
2274 },
2275
2276 /* PREGRP78 */
2277 {
2278 { "(bad)", { XX } },
2279 { "(bad)", { XX } },
2280 { "pextrK", { Edq, XM, Ib } },
2281 { "(bad)", { XX } },
2282 },
2283
2284 /* PREGRP79 */
2285 {
2286 { "(bad)", { XX } },
2287 { "(bad)", { XX } },
2288 { "extractps", { Edqd, XM, Ib } },
2289 { "(bad)", { XX } },
2290 },
2291
2292 /* PREGRP80 */
2293 {
2294 { "(bad)", { XX } },
2295 { "(bad)", { XX } },
2296 { "pinsrb", { XM, Edqb, Ib } },
2297 { "(bad)", { XX } },
2298 },
2299
2300 /* PREGRP81 */
2301 {
2302 { "(bad)", { XX } },
2303 { "(bad)", { XX } },
2304 { "insertps", { XM, EXd, Ib } },
2305 { "(bad)", { XX } },
2306 },
2307
2308 /* PREGRP82 */
2309 {
2310 { "(bad)", { XX } },
2311 { "(bad)", { XX } },
2312 { "pinsrK", { XM, Edq, Ib } },
2313 { "(bad)", { XX } },
2314 },
2315
2316 /* PREGRP83 */
2317 {
2318 { "(bad)", { XX } },
2319 { "(bad)", { XX } },
2320 { "dpps", { XM, EXx, Ib } },
2321 { "(bad)", { XX } },
2322 },
2323
2324 /* PREGRP84 */
2325 {
2326 { "(bad)", { XX } },
2327 { "(bad)", { XX } },
2328 { "dppd", { XM, EXx, Ib } },
2329 { "(bad)", { XX } },
2330 },
2331
2332 /* PREGRP85 */
2333 {
2334 { "(bad)", { XX } },
2335 { "(bad)", { XX } },
2336 { "mpsadbw", { XM, EXx, Ib } },
2337 { "(bad)", { XX } },
2338 },
2339
2340 /* PREGRP86 */
2341 {
2342 { "(bad)", { XX } },
2343 { "(bad)", { XX } },
2344 { "pcmpgtq", { XM, EXx } },
2345 { "(bad)", { XX } },
2346 },
2347
2348 /* PREGRP87 */
2349 {
2350 { "(bad)", { XX } },
2351 { "(bad)", { XX } },
2352 { "(bad)", { XX } },
2353 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2354 },
2355
2356 /* PREGRP88 */
2357 {
2358 { "(bad)", { XX } },
2359 { "(bad)", { XX } },
2360 { "(bad)", { XX } },
2361 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2362 },
2363
2364 /* PREGRP89 */
2365 {
2366 { "(bad)", { XX } },
2367 { "(bad)", { XX } },
2368 { "pcmpestrm", { XM, EXx, Ib } },
2369 { "(bad)", { XX } },
2370 },
2371
2372 /* PREGRP90 */
2373 {
2374 { "(bad)", { XX } },
2375 { "(bad)", { XX } },
2376 { "pcmpestri", { XM, EXx, Ib } },
2377 { "(bad)", { XX } },
2378 },
2379
2380 /* PREGRP91 */
2381 {
2382 { "(bad)", { XX } },
2383 { "(bad)", { XX } },
2384 { "pcmpistrm", { XM, EXx, Ib } },
2385 { "(bad)", { XX } },
2386 },
2387
2388 /* PREGRP92 */
2389 {
2390 { "(bad)", { XX } },
2391 { "(bad)", { XX } },
2392 { "pcmpistri", { XM, EXx, Ib } },
2393 { "(bad)", { XX } },
2394 },
2395
2396 /* PREGRP93 */
2397 {
2398 { "ucomiss",{ XM, EXd } },
2399 { "(bad)", { XX } },
2400 { "ucomisd",{ XM, EXq } },
2401 { "(bad)", { XX } },
2402 },
2403
2404 /* PREGRP94 */
2405 {
2406 { "comiss", { XM, EXd } },
2407 { "(bad)", { XX } },
2408 { "comisd", { XM, EXq } },
2409 { "(bad)", { XX } },
2410 },
2411
2412 /* PREGRP95 */
2413 {
2414 { "punpcklbw",{ MX, EMd } },
2415 { "(bad)", { XX } },
2416 { "punpcklbw",{ MX, EMx } },
2417 { "(bad)", { XX } },
2418 },
2419
2420 /* PREGRP96 */
2421 {
2422 { "punpcklwd",{ MX, EMd } },
2423 { "(bad)", { XX } },
2424 { "punpcklwd",{ MX, EMx } },
2425 { "(bad)", { XX } },
2426 },
2427
2428 /* PREGRP97 */
2429 {
2430 { "punpckldq",{ MX, EMd } },
2431 { "(bad)", { XX } },
2432 { "punpckldq",{ MX, EMx } },
2433 { "(bad)", { XX } },
2434 },
2435
2436 /* PREGRP98 */
2437 {
2438 { "vmptrld",{ Mq } },
2439 { "vmxon", { Mq } },
2440 { "vmclear",{ Mq } },
2441 { "(bad)", { XX } },
2442 },
2443
2444 /* PREGRP99 */
2445 {
2446 { "(bad)", { XX } },
2447 { "(bad)", { XX } },
2448 { "psrldq", { MS, Ib } },
2449 { "(bad)", { XX } },
2450 },
2451
2452 /* PREGRP100 */
2453 {
2454 { "(bad)", { XX } },
2455 { "(bad)", { XX } },
2456 { "pslldq", { MS, Ib } },
2457 { "(bad)", { XX } },
2458 },
2459 };
2460
2461 static const struct dis386 x86_64_table[][2] = {
2462 {
2463 { "pusha{P|}", { XX } },
2464 { "(bad)", { XX } },
2465 },
2466 {
2467 { "popa{P|}", { XX } },
2468 { "(bad)", { XX } },
2469 },
2470 {
2471 { OPC_EXT_33 },
2472 { "(bad)", { XX } },
2473 },
2474 {
2475 { "arpl", { Ew, Gw } },
2476 { "movs{||lq|xd}", { Gv, Ed } },
2477 },
2478 };
2479
2480 static const struct dis386 three_byte_table[][256] = {
2481 /* THREE_BYTE_0 */
2482 {
2483 /* 00 */
2484 { "pshufb", { MX, EM } },
2485 { "phaddw", { MX, EM } },
2486 { "phaddd", { MX, EM } },
2487 { "phaddsw", { MX, EM } },
2488 { "pmaddubsw", { MX, EM } },
2489 { "phsubw", { MX, EM } },
2490 { "phsubd", { MX, EM } },
2491 { "phsubsw", { MX, EM } },
2492 /* 08 */
2493 { "psignb", { MX, EM } },
2494 { "psignw", { MX, EM } },
2495 { "psignd", { MX, EM } },
2496 { "pmulhrsw", { MX, EM } },
2497 { "(bad)", { XX } },
2498 { "(bad)", { XX } },
2499 { "(bad)", { XX } },
2500 { "(bad)", { XX } },
2501 /* 10 */
2502 { PREGRP39 },
2503 { "(bad)", { XX } },
2504 { "(bad)", { XX } },
2505 { "(bad)", { XX } },
2506 { PREGRP40 },
2507 { PREGRP41 },
2508 { "(bad)", { XX } },
2509 { PREGRP42 },
2510 /* 18 */
2511 { "(bad)", { XX } },
2512 { "(bad)", { XX } },
2513 { "(bad)", { XX } },
2514 { "(bad)", { XX } },
2515 { "pabsb", { MX, EM } },
2516 { "pabsw", { MX, EM } },
2517 { "pabsd", { MX, EM } },
2518 { "(bad)", { XX } },
2519 /* 20 */
2520 { PREGRP43 },
2521 { PREGRP44 },
2522 { PREGRP45 },
2523 { PREGRP46 },
2524 { PREGRP47 },
2525 { PREGRP48 },
2526 { "(bad)", { XX } },
2527 { "(bad)", { XX } },
2528 /* 28 */
2529 { PREGRP49 },
2530 { PREGRP50 },
2531 { PREGRP51 },
2532 { PREGRP52 },
2533 { "(bad)", { XX } },
2534 { "(bad)", { XX } },
2535 { "(bad)", { XX } },
2536 { "(bad)", { XX } },
2537 /* 30 */
2538 { PREGRP53 },
2539 { PREGRP54 },
2540 { PREGRP55 },
2541 { PREGRP56 },
2542 { PREGRP57 },
2543 { PREGRP58 },
2544 { "(bad)", { XX } },
2545 { PREGRP86 },
2546 /* 38 */
2547 { PREGRP59 },
2548 { PREGRP60 },
2549 { PREGRP61 },
2550 { PREGRP62 },
2551 { PREGRP63 },
2552 { PREGRP64 },
2553 { PREGRP65 },
2554 { PREGRP66 },
2555 /* 40 */
2556 { PREGRP67 },
2557 { PREGRP68 },
2558 { "(bad)", { XX } },
2559 { "(bad)", { XX } },
2560 { "(bad)", { XX } },
2561 { "(bad)", { XX } },
2562 { "(bad)", { XX } },
2563 { "(bad)", { XX } },
2564 /* 48 */
2565 { "(bad)", { XX } },
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "(bad)", { XX } },
2569 { "(bad)", { XX } },
2570 { "(bad)", { XX } },
2571 { "(bad)", { XX } },
2572 { "(bad)", { XX } },
2573 /* 50 */
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 { "(bad)", { XX } },
2579 { "(bad)", { XX } },
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 /* 58 */
2583 { "(bad)", { XX } },
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 { "(bad)", { XX } },
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2591 /* 60 */
2592 { "(bad)", { XX } },
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2600 /* 68 */
2601 { "(bad)", { XX } },
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "(bad)", { XX } },
2607 { "(bad)", { XX } },
2608 { "(bad)", { XX } },
2609 /* 70 */
2610 { "(bad)", { XX } },
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 { "(bad)", { XX } },
2616 { "(bad)", { XX } },
2617 { "(bad)", { XX } },
2618 /* 78 */
2619 { "(bad)", { XX } },
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 { "(bad)", { XX } },
2625 { "(bad)", { XX } },
2626 { "(bad)", { XX } },
2627 /* 80 */
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
2634 { "(bad)", { XX } },
2635 { "(bad)", { XX } },
2636 /* 88 */
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 { "(bad)", { XX } },
2643 { "(bad)", { XX } },
2644 { "(bad)", { XX } },
2645 /* 90 */
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 { "(bad)", { XX } },
2651 { "(bad)", { XX } },
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 /* 98 */
2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 { "(bad)", { XX } },
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2663 /* a0 */
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2672 /* a8 */
2673 { "(bad)", { XX } },
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 { "(bad)", { XX } },
2678 { "(bad)", { XX } },
2679 { "(bad)", { XX } },
2680 { "(bad)", { XX } },
2681 /* b0 */
2682 { "(bad)", { XX } },
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 { "(bad)", { XX } },
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2690 /* b8 */
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2699 /* c0 */
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2708 /* c8 */
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2717 /* d0 */
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2726 /* d8 */
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 /* e0 */
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 /* e8 */
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2753 /* f0 */
2754 { PREGRP87 },
2755 { PREGRP88 },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2762 /* f8 */
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
2769 { "(bad)", { XX } },
2770 { "(bad)", { XX } },
2771 },
2772 /* THREE_BYTE_1 */
2773 {
2774 /* 00 */
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
2778 { "(bad)", { XX } },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 /* 08 */
2784 { PREGRP69 },
2785 { PREGRP70 },
2786 { PREGRP71 },
2787 { PREGRP72 },
2788 { PREGRP73 },
2789 { PREGRP74 },
2790 { PREGRP75 },
2791 { "palignr", { MX, EM, Ib } },
2792 /* 10 */
2793 { "(bad)", { XX } },
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
2796 { "(bad)", { XX } },
2797 { PREGRP76 },
2798 { PREGRP77 },
2799 { PREGRP78 },
2800 { PREGRP79 },
2801 /* 18 */
2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2810 /* 20 */
2811 { PREGRP80 },
2812 { PREGRP81 },
2813 { PREGRP82 },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 /* 28 */
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2828 /* 30 */
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 /* 38 */
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2846 /* 40 */
2847 { PREGRP83 },
2848 { PREGRP84 },
2849 { PREGRP85 },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 /* 48 */
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2864 /* 50 */
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 /* 58 */
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2882 /* 60 */
2883 { PREGRP89 },
2884 { PREGRP90 },
2885 { PREGRP91 },
2886 { PREGRP92 },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 /* 68 */
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 /* 70 */
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 /* 78 */
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2918 /* 80 */
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2927 /* 88 */
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 /* 90 */
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 /* 98 */
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 /* a0 */
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 /* a8 */
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 /* b0 */
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 /* b8 */
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 /* c0 */
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 /* c8 */
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 /* d0 */
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
3017 /* d8 */
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 /* e0 */
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 /* e8 */
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3044 /* f0 */
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 /* f8 */
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 }
3063 };
3064
3065 static const struct dis386 opc_ext_table[][2] = {
3066 {
3067 /* OPC_EXT_0 */
3068 { "leaS", { Gv, M } },
3069 { "(bad)", { XX } },
3070 },
3071 {
3072 /* OPC_EXT_1 */
3073 { "les{S|}", { Gv, Mp } },
3074 { "(bad)", { XX } },
3075 },
3076 {
3077 /* OPC_EXT_2 */
3078 { "ldsS", { Gv, Mp } },
3079 { "(bad)", { XX } },
3080 },
3081 {
3082 /* OPC_EXT_3 */
3083 { "lssS", { Gv, Mp } },
3084 { "(bad)", { XX } },
3085 },
3086 {
3087 /* OPC_EXT_4 */
3088 { "lfsS", { Gv, Mp } },
3089 { "(bad)", { XX } },
3090 },
3091 {
3092 /* OPC_EXT_5 */
3093 { "lgsS", { Gv, Mp } },
3094 { "(bad)", { XX } },
3095 },
3096 {
3097 /* OPC_EXT_6 */
3098 { "sgdt{Q|IQ||}", { M } },
3099 { OPC_EXT_RM_0 },
3100 },
3101 {
3102 /* OPC_EXT_7 */
3103 { "sidt{Q|IQ||}", { M } },
3104 { OPC_EXT_RM_1 },
3105 },
3106 {
3107 /* OPC_EXT_8 */
3108 { "lgdt{Q|Q||}", { M } },
3109 { "(bad)", { XX } },
3110 },
3111 {
3112 /* OPC_EXT_9 */
3113 { PREGRP98 },
3114 { "(bad)", { XX } },
3115 },
3116 {
3117 /* OPC_EXT_10 */
3118 { "vmptrst", { Mq } },
3119 { "(bad)", { XX } },
3120 },
3121 {
3122 /* OPC_EXT_11 */
3123 { "(bad)", { XX } },
3124 { "psrlw", { MS, Ib } },
3125 },
3126 {
3127 /* OPC_EXT_12 */
3128 { "(bad)", { XX } },
3129 { "psraw", { MS, Ib } },
3130 },
3131 {
3132 /* OPC_EXT_13 */
3133 { "(bad)", { XX } },
3134 { "psllw", { MS, Ib } },
3135 },
3136 {
3137 /* OPC_EXT_14 */
3138 { "(bad)", { XX } },
3139 { "psrld", { MS, Ib } },
3140 },
3141 {
3142 /* OPC_EXT_15 */
3143 { "(bad)", { XX } },
3144 { "psrad", { MS, Ib } },
3145 },
3146 {
3147 /* OPC_EXT_16 */
3148 { "(bad)", { XX } },
3149 { "pslld", { MS, Ib } },
3150 },
3151 {
3152 /* OPC_EXT_17 */
3153 { "(bad)", { XX } },
3154 { "psrlq", { MS, Ib } },
3155 },
3156 {
3157 /* OPC_EXT_18 */
3158 { "(bad)", { XX } },
3159 { PREGRP99 },
3160 },
3161 {
3162 /* OPC_EXT_19 */
3163 { "(bad)", { XX } },
3164 { "psllq", { MS, Ib } },
3165 },
3166 {
3167 /* OPC_EXT_20 */
3168 { "(bad)", { XX } },
3169 { PREGRP100 },
3170 },
3171 {
3172 /* OPC_EXT_21 */
3173 { "fxsave", { M } },
3174 { "(bad)", { XX } },
3175 },
3176 {
3177 /* OPC_EXT_22 */
3178 { "fxrstor", { M } },
3179 { "(bad)", { XX } },
3180 },
3181 {
3182 /* OPC_EXT_23 */
3183 { "ldmxcsr", { Md } },
3184 { "(bad)", { XX } },
3185 },
3186 {
3187 /* OPC_EXT_24 */
3188 { "stmxcsr", { Md } },
3189 { "(bad)", { XX } },
3190 },
3191 {
3192 /* OPC_EXT_25 */
3193 { "(bad)", { XX } },
3194 { OPC_EXT_RM_2 },
3195 },
3196 {
3197 /* OPC_EXT_26 */
3198 { "(bad)", { XX } },
3199 { OPC_EXT_RM_3 },
3200 },
3201 {
3202 /* OPC_EXT_27 */
3203 { "clflush", { Mb } },
3204 { OPC_EXT_RM_4 },
3205 },
3206 {
3207 /* OPC_EXT_28 */
3208 { "prefetchnta", { Mb } },
3209 { "(bad)", { XX } },
3210 },
3211 {
3212 /* OPC_EXT_29 */
3213 { "prefetcht0", { Mb } },
3214 { "(bad)", { XX } },
3215 },
3216 {
3217 /* OPC_EXT_30 */
3218 { "prefetcht1", { Mb } },
3219 { "(bad)", { XX } },
3220 },
3221 {
3222 /* OPC_EXT_31 */
3223 { "prefetcht2", { Mb } },
3224 { "(bad)", { XX } },
3225 },
3226 {
3227 /* OPC_EXT_32 */
3228 { "lddqu", { XM, M } },
3229 { "(bad)", { XX } },
3230 },
3231 {
3232 /* OPC_EXT_33 */
3233 { "bound{S|}", { Gv, Ma } },
3234 { "(bad)", { XX } },
3235 },
3236 {
3237 /* OPC_EXT_34 */
3238 { "movlpX", { EXq, XM } },
3239 { "(bad)", { XX } },
3240 },
3241 {
3242 /* OPC_EXT_35 */
3243 { "movhpX", { EXq, XM } },
3244 { "(bad)", { XX } },
3245 },
3246 {
3247 /* OPC_EXT_36 */
3248 { "movlpX", { XM, EXq } },
3249 { "movhlpX", { XM, EXq } },
3250 },
3251 {
3252 /* OPC_EXT_37 */
3253 { "movhpX", { XM, EXq } },
3254 { "movlhpX", { XM, EXq } },
3255 },
3256 {
3257 /* OPC_EXT_38 */
3258 { "invlpg", { Mb } },
3259 { OPC_EXT_RM_5 },
3260 },
3261 };
3262
3263 static const struct dis386 opc_ext_rm_table[][8] = {
3264 {
3265 /* OPC_EXT_RM_0 */
3266 { "(bad)", { XX } },
3267 { "vmcall", { Skip_MODRM } },
3268 { "vmlaunch", { Skip_MODRM } },
3269 { "vmresume", { Skip_MODRM } },
3270 { "vmxoff", { Skip_MODRM } },
3271 { "(bad)", { XX } },
3272 { "(bad)", { XX } },
3273 { "(bad)", { XX } },
3274 },
3275 {
3276 /* OPC_EXT_RM_1 */
3277 { "monitor", { { OP_Monitor, 0 } } },
3278 { "mwait", { { OP_Mwait, 0 } } },
3279 { "(bad)", { XX } },
3280 { "(bad)", { XX } },
3281 { "(bad)", { XX } },
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3285 },
3286 {
3287 /* OPC_EXT_RM_2 */
3288 { "lfence", { Skip_MODRM } },
3289 { "(bad)", { XX } },
3290 { "(bad)", { XX } },
3291 { "(bad)", { XX } },
3292 { "(bad)", { XX } },
3293 { "(bad)", { XX } },
3294 { "(bad)", { XX } },
3295 { "(bad)", { XX } },
3296 },
3297 {
3298 /* OPC_EXT_RM_3 */
3299 { "mfence", { Skip_MODRM } },
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 { "(bad)", { XX } },
3303 { "(bad)", { XX } },
3304 { "(bad)", { XX } },
3305 { "(bad)", { XX } },
3306 { "(bad)", { XX } },
3307 },
3308 {
3309 /* OPC_EXT_RM_4 */
3310 { "sfence", { Skip_MODRM } },
3311 { "(bad)", { XX } },
3312 { "(bad)", { XX } },
3313 { "(bad)", { XX } },
3314 { "(bad)", { XX } },
3315 { "(bad)", { XX } },
3316 { "(bad)", { XX } },
3317 { "(bad)", { XX } },
3318 },
3319 {
3320 /* OPC_EXT_RM_5 */
3321 { "swapgs", { Skip_MODRM } },
3322 { "rdtscp", { Skip_MODRM } },
3323 { "(bad)", { XX } },
3324 { "(bad)", { XX } },
3325 { "(bad)", { XX } },
3326 { "(bad)", { XX } },
3327 { "(bad)", { XX } },
3328 { "(bad)", { XX } },
3329 },
3330 };
3331
3332 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3333
3334 static void
3335 ckprefix (void)
3336 {
3337 int newrex;
3338 rex = 0;
3339 prefixes = 0;
3340 used_prefixes = 0;
3341 rex_used = 0;
3342 while (1)
3343 {
3344 FETCH_DATA (the_info, codep + 1);
3345 newrex = 0;
3346 switch (*codep)
3347 {
3348 /* REX prefixes family. */
3349 case 0x40:
3350 case 0x41:
3351 case 0x42:
3352 case 0x43:
3353 case 0x44:
3354 case 0x45:
3355 case 0x46:
3356 case 0x47:
3357 case 0x48:
3358 case 0x49:
3359 case 0x4a:
3360 case 0x4b:
3361 case 0x4c:
3362 case 0x4d:
3363 case 0x4e:
3364 case 0x4f:
3365 if (address_mode == mode_64bit)
3366 newrex = *codep;
3367 else
3368 return;
3369 break;
3370 case 0xf3:
3371 prefixes |= PREFIX_REPZ;
3372 break;
3373 case 0xf2:
3374 prefixes |= PREFIX_REPNZ;
3375 break;
3376 case 0xf0:
3377 prefixes |= PREFIX_LOCK;
3378 break;
3379 case 0x2e:
3380 prefixes |= PREFIX_CS;
3381 break;
3382 case 0x36:
3383 prefixes |= PREFIX_SS;
3384 break;
3385 case 0x3e:
3386 prefixes |= PREFIX_DS;
3387 break;
3388 case 0x26:
3389 prefixes |= PREFIX_ES;
3390 break;
3391 case 0x64:
3392 prefixes |= PREFIX_FS;
3393 break;
3394 case 0x65:
3395 prefixes |= PREFIX_GS;
3396 break;
3397 case 0x66:
3398 prefixes |= PREFIX_DATA;
3399 break;
3400 case 0x67:
3401 prefixes |= PREFIX_ADDR;
3402 break;
3403 case FWAIT_OPCODE:
3404 /* fwait is really an instruction. If there are prefixes
3405 before the fwait, they belong to the fwait, *not* to the
3406 following instruction. */
3407 if (prefixes || rex)
3408 {
3409 prefixes |= PREFIX_FWAIT;
3410 codep++;
3411 return;
3412 }
3413 prefixes = PREFIX_FWAIT;
3414 break;
3415 default:
3416 return;
3417 }
3418 /* Rex is ignored when followed by another prefix. */
3419 if (rex)
3420 {
3421 rex_used = rex;
3422 return;
3423 }
3424 rex = newrex;
3425 codep++;
3426 }
3427 }
3428
3429 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3430 prefix byte. */
3431
3432 static const char *
3433 prefix_name (int pref, int sizeflag)
3434 {
3435 static const char *rexes [16] =
3436 {
3437 "rex", /* 0x40 */
3438 "rex.B", /* 0x41 */
3439 "rex.X", /* 0x42 */
3440 "rex.XB", /* 0x43 */
3441 "rex.R", /* 0x44 */
3442 "rex.RB", /* 0x45 */
3443 "rex.RX", /* 0x46 */
3444 "rex.RXB", /* 0x47 */
3445 "rex.W", /* 0x48 */
3446 "rex.WB", /* 0x49 */
3447 "rex.WX", /* 0x4a */
3448 "rex.WXB", /* 0x4b */
3449 "rex.WR", /* 0x4c */
3450 "rex.WRB", /* 0x4d */
3451 "rex.WRX", /* 0x4e */
3452 "rex.WRXB", /* 0x4f */
3453 };
3454
3455 switch (pref)
3456 {
3457 /* REX prefixes family. */
3458 case 0x40:
3459 case 0x41:
3460 case 0x42:
3461 case 0x43:
3462 case 0x44:
3463 case 0x45:
3464 case 0x46:
3465 case 0x47:
3466 case 0x48:
3467 case 0x49:
3468 case 0x4a:
3469 case 0x4b:
3470 case 0x4c:
3471 case 0x4d:
3472 case 0x4e:
3473 case 0x4f:
3474 return rexes [pref - 0x40];
3475 case 0xf3:
3476 return "repz";
3477 case 0xf2:
3478 return "repnz";
3479 case 0xf0:
3480 return "lock";
3481 case 0x2e:
3482 return "cs";
3483 case 0x36:
3484 return "ss";
3485 case 0x3e:
3486 return "ds";
3487 case 0x26:
3488 return "es";
3489 case 0x64:
3490 return "fs";
3491 case 0x65:
3492 return "gs";
3493 case 0x66:
3494 return (sizeflag & DFLAG) ? "data16" : "data32";
3495 case 0x67:
3496 if (address_mode == mode_64bit)
3497 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3498 else
3499 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3500 case FWAIT_OPCODE:
3501 return "fwait";
3502 default:
3503 return NULL;
3504 }
3505 }
3506
3507 static char op_out[MAX_OPERANDS][100];
3508 static int op_ad, op_index[MAX_OPERANDS];
3509 static int two_source_ops;
3510 static bfd_vma op_address[MAX_OPERANDS];
3511 static bfd_vma op_riprel[MAX_OPERANDS];
3512 static bfd_vma start_pc;
3513
3514 /*
3515 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3516 * (see topic "Redundant prefixes" in the "Differences from 8086"
3517 * section of the "Virtual 8086 Mode" chapter.)
3518 * 'pc' should be the address of this instruction, it will
3519 * be used to print the target address if this is a relative jump or call
3520 * The function returns the length of this instruction in bytes.
3521 */
3522
3523 static char intel_syntax;
3524 static char open_char;
3525 static char close_char;
3526 static char separator_char;
3527 static char scale_char;
3528
3529 /* Here for backwards compatibility. When gdb stops using
3530 print_insn_i386_att and print_insn_i386_intel these functions can
3531 disappear, and print_insn_i386 be merged into print_insn. */
3532 int
3533 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
3534 {
3535 intel_syntax = 0;
3536
3537 return print_insn (pc, info);
3538 }
3539
3540 int
3541 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
3542 {
3543 intel_syntax = 1;
3544
3545 return print_insn (pc, info);
3546 }
3547
3548 int
3549 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3550 {
3551 intel_syntax = -1;
3552
3553 return print_insn (pc, info);
3554 }
3555
3556 void
3557 print_i386_disassembler_options (FILE *stream)
3558 {
3559 fprintf (stream, _("\n\
3560 The following i386/x86-64 specific disassembler options are supported for use\n\
3561 with the -M switch (multiple options should be separated by commas):\n"));
3562
3563 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3564 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3565 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3566 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3567 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3568 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3569 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3570 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3571 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3572 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3573 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3574 }
3575
3576 /* Get a pointer to struct dis386 with a valid name. */
3577
3578 static const struct dis386 *
3579 get_valid_dis386 (const struct dis386 *dp)
3580 {
3581 int index;
3582
3583 if (dp->name != NULL)
3584 return dp;
3585
3586 switch (dp->op[0].bytemode)
3587 {
3588 case USE_GROUPS:
3589 dp = &grps[dp->op[1].bytemode][modrm.reg];
3590 break;
3591
3592 case USE_PREFIX_USER_TABLE:
3593 index = 0;
3594 used_prefixes |= (prefixes & PREFIX_REPZ);
3595 if (prefixes & PREFIX_REPZ)
3596 {
3597 index = 1;
3598 repz_prefix = NULL;
3599 }
3600 else
3601 {
3602 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3603 PREFIX_DATA. */
3604 used_prefixes |= (prefixes & PREFIX_REPNZ);
3605 if (prefixes & PREFIX_REPNZ)
3606 {
3607 index = 3;
3608 repnz_prefix = NULL;
3609 }
3610 else
3611 {
3612 used_prefixes |= (prefixes & PREFIX_DATA);
3613 if (prefixes & PREFIX_DATA)
3614 {
3615 index = 2;
3616 data_prefix = NULL;
3617 }
3618 }
3619 }
3620 dp = &prefix_user_table[dp->op[1].bytemode][index];
3621 break;
3622
3623 case X86_64_SPECIAL:
3624 index = address_mode == mode_64bit ? 1 : 0;
3625 dp = &x86_64_table[dp->op[1].bytemode][index];
3626 break;
3627
3628 case USE_OPC_EXT_TABLE:
3629 index = modrm.mod == 0x3 ? 1 : 0;
3630 dp = &opc_ext_table[dp->op[1].bytemode][index];
3631 break;
3632
3633 case USE_OPC_EXT_RM_TABLE:
3634 index = modrm.rm;
3635 dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
3636 break;
3637
3638 default:
3639 oappend (INTERNAL_DISASSEMBLER_ERROR);
3640 return NULL;
3641 }
3642
3643 if (dp->name != NULL)
3644 return dp;
3645 else
3646 return get_valid_dis386 (dp);
3647 }
3648
3649 static int
3650 print_insn (bfd_vma pc, disassemble_info *info)
3651 {
3652 const struct dis386 *dp;
3653 int i;
3654 char *op_txt[MAX_OPERANDS];
3655 int needcomma;
3656 int sizeflag;
3657 const char *p;
3658 struct dis_private priv;
3659 unsigned char op;
3660 char prefix_obuf[32];
3661 char *prefix_obufp;
3662
3663 if (info->mach == bfd_mach_x86_64_intel_syntax
3664 || info->mach == bfd_mach_x86_64)
3665 address_mode = mode_64bit;
3666 else
3667 address_mode = mode_32bit;
3668
3669 if (intel_syntax == (char) -1)
3670 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3671 || info->mach == bfd_mach_x86_64_intel_syntax);
3672
3673 if (info->mach == bfd_mach_i386_i386
3674 || info->mach == bfd_mach_x86_64
3675 || info->mach == bfd_mach_i386_i386_intel_syntax
3676 || info->mach == bfd_mach_x86_64_intel_syntax)
3677 priv.orig_sizeflag = AFLAG | DFLAG;
3678 else if (info->mach == bfd_mach_i386_i8086)
3679 priv.orig_sizeflag = 0;
3680 else
3681 abort ();
3682
3683 for (p = info->disassembler_options; p != NULL; )
3684 {
3685 if (CONST_STRNEQ (p, "x86-64"))
3686 {
3687 address_mode = mode_64bit;
3688 priv.orig_sizeflag = AFLAG | DFLAG;
3689 }
3690 else if (CONST_STRNEQ (p, "i386"))
3691 {
3692 address_mode = mode_32bit;
3693 priv.orig_sizeflag = AFLAG | DFLAG;
3694 }
3695 else if (CONST_STRNEQ (p, "i8086"))
3696 {
3697 address_mode = mode_16bit;
3698 priv.orig_sizeflag = 0;
3699 }
3700 else if (CONST_STRNEQ (p, "intel"))
3701 {
3702 intel_syntax = 1;
3703 }
3704 else if (CONST_STRNEQ (p, "att"))
3705 {
3706 intel_syntax = 0;
3707 }
3708 else if (CONST_STRNEQ (p, "addr"))
3709 {
3710 if (address_mode == mode_64bit)
3711 {
3712 if (p[4] == '3' && p[5] == '2')
3713 priv.orig_sizeflag &= ~AFLAG;
3714 else if (p[4] == '6' && p[5] == '4')
3715 priv.orig_sizeflag |= AFLAG;
3716 }
3717 else
3718 {
3719 if (p[4] == '1' && p[5] == '6')
3720 priv.orig_sizeflag &= ~AFLAG;
3721 else if (p[4] == '3' && p[5] == '2')
3722 priv.orig_sizeflag |= AFLAG;
3723 }
3724 }
3725 else if (CONST_STRNEQ (p, "data"))
3726 {
3727 if (p[4] == '1' && p[5] == '6')
3728 priv.orig_sizeflag &= ~DFLAG;
3729 else if (p[4] == '3' && p[5] == '2')
3730 priv.orig_sizeflag |= DFLAG;
3731 }
3732 else if (CONST_STRNEQ (p, "suffix"))
3733 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3734
3735 p = strchr (p, ',');
3736 if (p != NULL)
3737 p++;
3738 }
3739
3740 if (intel_syntax)
3741 {
3742 names64 = intel_names64;
3743 names32 = intel_names32;
3744 names16 = intel_names16;
3745 names8 = intel_names8;
3746 names8rex = intel_names8rex;
3747 names_seg = intel_names_seg;
3748 index16 = intel_index16;
3749 open_char = '[';
3750 close_char = ']';
3751 separator_char = '+';
3752 scale_char = '*';
3753 }
3754 else
3755 {
3756 names64 = att_names64;
3757 names32 = att_names32;
3758 names16 = att_names16;
3759 names8 = att_names8;
3760 names8rex = att_names8rex;
3761 names_seg = att_names_seg;
3762 index16 = att_index16;
3763 open_char = '(';
3764 close_char = ')';
3765 separator_char = ',';
3766 scale_char = ',';
3767 }
3768
3769 /* The output looks better if we put 7 bytes on a line, since that
3770 puts most long word instructions on a single line. */
3771 info->bytes_per_line = 7;
3772
3773 info->private_data = &priv;
3774 priv.max_fetched = priv.the_buffer;
3775 priv.insn_start = pc;
3776
3777 obuf[0] = 0;
3778 for (i = 0; i < MAX_OPERANDS; ++i)
3779 {
3780 op_out[i][0] = 0;
3781 op_index[i] = -1;
3782 }
3783
3784 the_info = info;
3785 start_pc = pc;
3786 start_codep = priv.the_buffer;
3787 codep = priv.the_buffer;
3788
3789 if (setjmp (priv.bailout) != 0)
3790 {
3791 const char *name;
3792
3793 /* Getting here means we tried for data but didn't get it. That
3794 means we have an incomplete instruction of some sort. Just
3795 print the first byte as a prefix or a .byte pseudo-op. */
3796 if (codep > priv.the_buffer)
3797 {
3798 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3799 if (name != NULL)
3800 (*info->fprintf_func) (info->stream, "%s", name);
3801 else
3802 {
3803 /* Just print the first byte as a .byte instruction. */
3804 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3805 (unsigned int) priv.the_buffer[0]);
3806 }
3807
3808 return 1;
3809 }
3810
3811 return -1;
3812 }
3813
3814 obufp = obuf;
3815 ckprefix ();
3816
3817 insn_codep = codep;
3818 sizeflag = priv.orig_sizeflag;
3819
3820 FETCH_DATA (info, codep + 1);
3821 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3822
3823 if (((prefixes & PREFIX_FWAIT)
3824 && ((*codep < 0xd8) || (*codep > 0xdf)))
3825 || (rex && rex_used))
3826 {
3827 const char *name;
3828
3829 /* fwait not followed by floating point instruction, or rex followed
3830 by other prefixes. Print the first prefix. */
3831 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3832 if (name == NULL)
3833 name = INTERNAL_DISASSEMBLER_ERROR;
3834 (*info->fprintf_func) (info->stream, "%s", name);
3835 return 1;
3836 }
3837
3838 op = 0;
3839 if (*codep == 0x0f)
3840 {
3841 unsigned char threebyte;
3842 FETCH_DATA (info, codep + 2);
3843 threebyte = *++codep;
3844 dp = &dis386_twobyte[threebyte];
3845 need_modrm = twobyte_has_modrm[*codep];
3846 codep++;
3847 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3848 {
3849 FETCH_DATA (info, codep + 2);
3850 op = *codep++;
3851 }
3852 }
3853 else
3854 {
3855 dp = &dis386[*codep];
3856 need_modrm = onebyte_has_modrm[*codep];
3857 codep++;
3858 }
3859
3860 if ((prefixes & PREFIX_REPZ))
3861 {
3862 repz_prefix = "repz ";
3863 used_prefixes |= PREFIX_REPZ;
3864 }
3865 else
3866 repz_prefix = NULL;
3867
3868 if ((prefixes & PREFIX_REPNZ))
3869 {
3870 repnz_prefix = "repnz ";
3871 used_prefixes |= PREFIX_REPNZ;
3872 }
3873 else
3874 repnz_prefix = NULL;
3875
3876 if ((prefixes & PREFIX_LOCK))
3877 {
3878 lock_prefix = "lock ";
3879 used_prefixes |= PREFIX_LOCK;
3880 }
3881 else
3882 lock_prefix = NULL;
3883
3884 addr_prefix = NULL;
3885 if (prefixes & PREFIX_ADDR)
3886 {
3887 sizeflag ^= AFLAG;
3888 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3889 {
3890 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3891 addr_prefix = "addr32 ";
3892 else
3893 addr_prefix = "addr16 ";
3894 used_prefixes |= PREFIX_ADDR;
3895 }
3896 }
3897
3898 data_prefix = NULL;
3899 if ((prefixes & PREFIX_DATA))
3900 {
3901 sizeflag ^= DFLAG;
3902 if (dp->op[2].bytemode == cond_jump_mode
3903 && dp->op[0].bytemode == v_mode
3904 && !intel_syntax)
3905 {
3906 if (sizeflag & DFLAG)
3907 data_prefix = "data32 ";
3908 else
3909 data_prefix = "data16 ";
3910 used_prefixes |= PREFIX_DATA;
3911 }
3912 }
3913
3914 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3915 {
3916 dp = &three_byte_table[dp->op[1].bytemode][op];
3917 modrm.mod = (*codep >> 6) & 3;
3918 modrm.reg = (*codep >> 3) & 7;
3919 modrm.rm = *codep & 7;
3920 }
3921 else if (need_modrm)
3922 {
3923 FETCH_DATA (info, codep + 1);
3924 modrm.mod = (*codep >> 6) & 3;
3925 modrm.reg = (*codep >> 3) & 7;
3926 modrm.rm = *codep & 7;
3927 }
3928
3929 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3930 {
3931 dofloat (sizeflag);
3932 }
3933 else
3934 {
3935 dp = get_valid_dis386 (dp);
3936 if (dp != NULL && putop (dp->name, sizeflag) == 0)
3937 {
3938 for (i = 0; i < MAX_OPERANDS; ++i)
3939 {
3940 obufp = op_out[i];
3941 op_ad = MAX_OPERANDS - 1 - i;
3942 if (dp->op[i].rtn)
3943 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3944 }
3945 }
3946 }
3947
3948 /* See if any prefixes were not used. If so, print the first one
3949 separately. If we don't do this, we'll wind up printing an
3950 instruction stream which does not precisely correspond to the
3951 bytes we are disassembling. */
3952 if ((prefixes & ~used_prefixes) != 0)
3953 {
3954 const char *name;
3955
3956 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3957 if (name == NULL)
3958 name = INTERNAL_DISASSEMBLER_ERROR;
3959 (*info->fprintf_func) (info->stream, "%s", name);
3960 return 1;
3961 }
3962 if (rex & ~rex_used)
3963 {
3964 const char *name;
3965 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3966 if (name == NULL)
3967 name = INTERNAL_DISASSEMBLER_ERROR;
3968 (*info->fprintf_func) (info->stream, "%s ", name);
3969 }
3970
3971 prefix_obuf[0] = 0;
3972 prefix_obufp = prefix_obuf;
3973 if (lock_prefix)
3974 prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
3975 if (repz_prefix)
3976 prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
3977 if (repnz_prefix)
3978 prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
3979 if (addr_prefix)
3980 prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
3981 if (data_prefix)
3982 prefix_obufp = stpcpy (prefix_obufp, data_prefix);
3983
3984 if (prefix_obuf[0] != 0)
3985 (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
3986
3987 obufp = obuf + strlen (obuf);
3988 for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
3989 oappend (" ");
3990 oappend (" ");
3991 (*info->fprintf_func) (info->stream, "%s", obuf);
3992
3993 /* The enter and bound instructions are printed with operands in the same
3994 order as the intel book; everything else is printed in reverse order. */
3995 if (intel_syntax || two_source_ops)
3996 {
3997 bfd_vma riprel;
3998
3999 for (i = 0; i < MAX_OPERANDS; ++i)
4000 op_txt[i] = op_out[i];
4001
4002 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4003 {
4004 op_ad = op_index[i];
4005 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4006 op_index[MAX_OPERANDS - 1 - i] = op_ad;
4007 riprel = op_riprel[i];
4008 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4009 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4010 }
4011 }
4012 else
4013 {
4014 for (i = 0; i < MAX_OPERANDS; ++i)
4015 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4016 }
4017
4018 needcomma = 0;
4019 for (i = 0; i < MAX_OPERANDS; ++i)
4020 if (*op_txt[i])
4021 {
4022 if (needcomma)
4023 (*info->fprintf_func) (info->stream, ",");
4024 if (op_index[i] != -1 && !op_riprel[i])
4025 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4026 else
4027 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4028 needcomma = 1;
4029 }
4030
4031 for (i = 0; i < MAX_OPERANDS; i++)
4032 if (op_index[i] != -1 && op_riprel[i])
4033 {
4034 (*info->fprintf_func) (info->stream, " # ");
4035 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4036 + op_address[op_index[i]]), info);
4037 break;
4038 }
4039 return codep - priv.the_buffer;
4040 }
4041
4042 static const char *float_mem[] = {
4043 /* d8 */
4044 "fadd{s||s|}",
4045 "fmul{s||s|}",
4046 "fcom{s||s|}",
4047 "fcomp{s||s|}",
4048 "fsub{s||s|}",
4049 "fsubr{s||s|}",
4050 "fdiv{s||s|}",
4051 "fdivr{s||s|}",
4052 /* d9 */
4053 "fld{s||s|}",
4054 "(bad)",
4055 "fst{s||s|}",
4056 "fstp{s||s|}",
4057 "fldenvIC",
4058 "fldcw",
4059 "fNstenvIC",
4060 "fNstcw",
4061 /* da */
4062 "fiadd{l||l|}",
4063 "fimul{l||l|}",
4064 "ficom{l||l|}",
4065 "ficomp{l||l|}",
4066 "fisub{l||l|}",
4067 "fisubr{l||l|}",
4068 "fidiv{l||l|}",
4069 "fidivr{l||l|}",
4070 /* db */
4071 "fild{l||l|}",
4072 "fisttp{l||l|}",
4073 "fist{l||l|}",
4074 "fistp{l||l|}",
4075 "(bad)",
4076 "fld{t||t|}",
4077 "(bad)",
4078 "fstp{t||t|}",
4079 /* dc */
4080 "fadd{l||l|}",
4081 "fmul{l||l|}",
4082 "fcom{l||l|}",
4083 "fcomp{l||l|}",
4084 "fsub{l||l|}",
4085 "fsubr{l||l|}",
4086 "fdiv{l||l|}",
4087 "fdivr{l||l|}",
4088 /* dd */
4089 "fld{l||l|}",
4090 "fisttp{ll||ll|}",
4091 "fst{l||l|}",
4092 "fstp{l||l|}",
4093 "frstorIC",
4094 "(bad)",
4095 "fNsaveIC",
4096 "fNstsw",
4097 /* de */
4098 "fiadd",
4099 "fimul",
4100 "ficom",
4101 "ficomp",
4102 "fisub",
4103 "fisubr",
4104 "fidiv",
4105 "fidivr",
4106 /* df */
4107 "fild",
4108 "fisttp",
4109 "fist",
4110 "fistp",
4111 "fbld",
4112 "fild{ll||ll|}",
4113 "fbstp",
4114 "fistp{ll||ll|}",
4115 };
4116
4117 static const unsigned char float_mem_mode[] = {
4118 /* d8 */
4119 d_mode,
4120 d_mode,
4121 d_mode,
4122 d_mode,
4123 d_mode,
4124 d_mode,
4125 d_mode,
4126 d_mode,
4127 /* d9 */
4128 d_mode,
4129 0,
4130 d_mode,
4131 d_mode,
4132 0,
4133 w_mode,
4134 0,
4135 w_mode,
4136 /* da */
4137 d_mode,
4138 d_mode,
4139 d_mode,
4140 d_mode,
4141 d_mode,
4142 d_mode,
4143 d_mode,
4144 d_mode,
4145 /* db */
4146 d_mode,
4147 d_mode,
4148 d_mode,
4149 d_mode,
4150 0,
4151 t_mode,
4152 0,
4153 t_mode,
4154 /* dc */
4155 q_mode,
4156 q_mode,
4157 q_mode,
4158 q_mode,
4159 q_mode,
4160 q_mode,
4161 q_mode,
4162 q_mode,
4163 /* dd */
4164 q_mode,
4165 q_mode,
4166 q_mode,
4167 q_mode,
4168 0,
4169 0,
4170 0,
4171 w_mode,
4172 /* de */
4173 w_mode,
4174 w_mode,
4175 w_mode,
4176 w_mode,
4177 w_mode,
4178 w_mode,
4179 w_mode,
4180 w_mode,
4181 /* df */
4182 w_mode,
4183 w_mode,
4184 w_mode,
4185 w_mode,
4186 t_mode,
4187 q_mode,
4188 t_mode,
4189 q_mode
4190 };
4191
4192 #define ST { OP_ST, 0 }
4193 #define STi { OP_STi, 0 }
4194
4195 #define FGRPd9_2 NULL, { { NULL, 0 } }
4196 #define FGRPd9_4 NULL, { { NULL, 1 } }
4197 #define FGRPd9_5 NULL, { { NULL, 2 } }
4198 #define FGRPd9_6 NULL, { { NULL, 3 } }
4199 #define FGRPd9_7 NULL, { { NULL, 4 } }
4200 #define FGRPda_5 NULL, { { NULL, 5 } }
4201 #define FGRPdb_4 NULL, { { NULL, 6 } }
4202 #define FGRPde_3 NULL, { { NULL, 7 } }
4203 #define FGRPdf_4 NULL, { { NULL, 8 } }
4204
4205 static const struct dis386 float_reg[][8] = {
4206 /* d8 */
4207 {
4208 { "fadd", { ST, STi } },
4209 { "fmul", { ST, STi } },
4210 { "fcom", { STi } },
4211 { "fcomp", { STi } },
4212 { "fsub", { ST, STi } },
4213 { "fsubr", { ST, STi } },
4214 { "fdiv", { ST, STi } },
4215 { "fdivr", { ST, STi } },
4216 },
4217 /* d9 */
4218 {
4219 { "fld", { STi } },
4220 { "fxch", { STi } },
4221 { FGRPd9_2 },
4222 { "(bad)", { XX } },
4223 { FGRPd9_4 },
4224 { FGRPd9_5 },
4225 { FGRPd9_6 },
4226 { FGRPd9_7 },
4227 },
4228 /* da */
4229 {
4230 { "fcmovb", { ST, STi } },
4231 { "fcmove", { ST, STi } },
4232 { "fcmovbe",{ ST, STi } },
4233 { "fcmovu", { ST, STi } },
4234 { "(bad)", { XX } },
4235 { FGRPda_5 },
4236 { "(bad)", { XX } },
4237 { "(bad)", { XX } },
4238 },
4239 /* db */
4240 {
4241 { "fcmovnb",{ ST, STi } },
4242 { "fcmovne",{ ST, STi } },
4243 { "fcmovnbe",{ ST, STi } },
4244 { "fcmovnu",{ ST, STi } },
4245 { FGRPdb_4 },
4246 { "fucomi", { ST, STi } },
4247 { "fcomi", { ST, STi } },
4248 { "(bad)", { XX } },
4249 },
4250 /* dc */
4251 {
4252 { "fadd", { STi, ST } },
4253 { "fmul", { STi, ST } },
4254 { "(bad)", { XX } },
4255 { "(bad)", { XX } },
4256 #if SYSV386_COMPAT
4257 { "fsub", { STi, ST } },
4258 { "fsubr", { STi, ST } },
4259 { "fdiv", { STi, ST } },
4260 { "fdivr", { STi, ST } },
4261 #else
4262 { "fsubr", { STi, ST } },
4263 { "fsub", { STi, ST } },
4264 { "fdivr", { STi, ST } },
4265 { "fdiv", { STi, ST } },
4266 #endif
4267 },
4268 /* dd */
4269 {
4270 { "ffree", { STi } },
4271 { "(bad)", { XX } },
4272 { "fst", { STi } },
4273 { "fstp", { STi } },
4274 { "fucom", { STi } },
4275 { "fucomp", { STi } },
4276 { "(bad)", { XX } },
4277 { "(bad)", { XX } },
4278 },
4279 /* de */
4280 {
4281 { "faddp", { STi, ST } },
4282 { "fmulp", { STi, ST } },
4283 { "(bad)", { XX } },
4284 { FGRPde_3 },
4285 #if SYSV386_COMPAT
4286 { "fsubp", { STi, ST } },
4287 { "fsubrp", { STi, ST } },
4288 { "fdivp", { STi, ST } },
4289 { "fdivrp", { STi, ST } },
4290 #else
4291 { "fsubrp", { STi, ST } },
4292 { "fsubp", { STi, ST } },
4293 { "fdivrp", { STi, ST } },
4294 { "fdivp", { STi, ST } },
4295 #endif
4296 },
4297 /* df */
4298 {
4299 { "ffreep", { STi } },
4300 { "(bad)", { XX } },
4301 { "(bad)", { XX } },
4302 { "(bad)", { XX } },
4303 { FGRPdf_4 },
4304 { "fucomip", { ST, STi } },
4305 { "fcomip", { ST, STi } },
4306 { "(bad)", { XX } },
4307 },
4308 };
4309
4310 static char *fgrps[][8] = {
4311 /* d9_2 0 */
4312 {
4313 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4314 },
4315
4316 /* d9_4 1 */
4317 {
4318 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4319 },
4320
4321 /* d9_5 2 */
4322 {
4323 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4324 },
4325
4326 /* d9_6 3 */
4327 {
4328 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4329 },
4330
4331 /* d9_7 4 */
4332 {
4333 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4334 },
4335
4336 /* da_5 5 */
4337 {
4338 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4339 },
4340
4341 /* db_4 6 */
4342 {
4343 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4344 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4345 },
4346
4347 /* de_3 7 */
4348 {
4349 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4350 },
4351
4352 /* df_4 8 */
4353 {
4354 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4355 },
4356 };
4357
4358 static void
4359 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
4360 int sizeflag ATTRIBUTE_UNUSED)
4361 {
4362 /* Skip mod/rm byte. */
4363 MODRM_CHECK;
4364 codep++;
4365 }
4366
4367 static void
4368 dofloat (int sizeflag)
4369 {
4370 const struct dis386 *dp;
4371 unsigned char floatop;
4372
4373 floatop = codep[-1];
4374
4375 if (modrm.mod != 3)
4376 {
4377 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4378
4379 putop (float_mem[fp_indx], sizeflag);
4380 obufp = op_out[0];
4381 op_ad = 2;
4382 OP_E (float_mem_mode[fp_indx], sizeflag);
4383 return;
4384 }
4385 /* Skip mod/rm byte. */
4386 MODRM_CHECK;
4387 codep++;
4388
4389 dp = &float_reg[floatop - 0xd8][modrm.reg];
4390 if (dp->name == NULL)
4391 {
4392 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4393
4394 /* Instruction fnstsw is only one with strange arg. */
4395 if (floatop == 0xdf && codep[-1] == 0xe0)
4396 strcpy (op_out[0], names16[0]);
4397 }
4398 else
4399 {
4400 putop (dp->name, sizeflag);
4401
4402 obufp = op_out[0];
4403 op_ad = 2;
4404 if (dp->op[0].rtn)
4405 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4406
4407 obufp = op_out[1];
4408 op_ad = 1;
4409 if (dp->op[1].rtn)
4410 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4411 }
4412 }
4413
4414 static void
4415 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4416 {
4417 oappend ("%st" + intel_syntax);
4418 }
4419
4420 static void
4421 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4422 {
4423 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
4424 oappend (scratchbuf + intel_syntax);
4425 }
4426
4427 /* Capital letters in template are macros. */
4428 static int
4429 putop (const char *template, int sizeflag)
4430 {
4431 const char *p;
4432 int alt = 0;
4433
4434 for (p = template; *p; p++)
4435 {
4436 switch (*p)
4437 {
4438 default:
4439 *obufp++ = *p;
4440 break;
4441 case '{':
4442 alt = 0;
4443 if (intel_syntax)
4444 alt += 1;
4445 if (address_mode == mode_64bit)
4446 alt += 2;
4447 while (alt != 0)
4448 {
4449 while (*++p != '|')
4450 {
4451 if (*p == '}')
4452 {
4453 /* Alternative not valid. */
4454 strcpy (obuf, "(bad)");
4455 obufp = obuf + 5;
4456 return 1;
4457 }
4458 else if (*p == '\0')
4459 abort ();
4460 }
4461 alt--;
4462 }
4463 /* Fall through. */
4464 case 'I':
4465 alt = 1;
4466 continue;
4467 case '|':
4468 while (*++p != '}')
4469 {
4470 if (*p == '\0')
4471 abort ();
4472 }
4473 break;
4474 case '}':
4475 break;
4476 case 'A':
4477 if (intel_syntax)
4478 break;
4479 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4480 *obufp++ = 'b';
4481 break;
4482 case 'B':
4483 if (intel_syntax)
4484 break;
4485 if (sizeflag & SUFFIX_ALWAYS)
4486 *obufp++ = 'b';
4487 break;
4488 case 'C':
4489 if (intel_syntax && !alt)
4490 break;
4491 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4492 {
4493 if (sizeflag & DFLAG)
4494 *obufp++ = intel_syntax ? 'd' : 'l';
4495 else
4496 *obufp++ = intel_syntax ? 'w' : 's';
4497 used_prefixes |= (prefixes & PREFIX_DATA);
4498 }
4499 break;
4500 case 'D':
4501 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4502 break;
4503 USED_REX (REX_W);
4504 if (modrm.mod == 3)
4505 {
4506 if (rex & REX_W)
4507 *obufp++ = 'q';
4508 else if (sizeflag & DFLAG)
4509 *obufp++ = intel_syntax ? 'd' : 'l';
4510 else
4511 *obufp++ = 'w';
4512 used_prefixes |= (prefixes & PREFIX_DATA);
4513 }
4514 else
4515 *obufp++ = 'w';
4516 break;
4517 case 'E': /* For jcxz/jecxz */
4518 if (address_mode == mode_64bit)
4519 {
4520 if (sizeflag & AFLAG)
4521 *obufp++ = 'r';
4522 else
4523 *obufp++ = 'e';
4524 }
4525 else
4526 if (sizeflag & AFLAG)
4527 *obufp++ = 'e';
4528 used_prefixes |= (prefixes & PREFIX_ADDR);
4529 break;
4530 case 'F':
4531 if (intel_syntax)
4532 break;
4533 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4534 {
4535 if (sizeflag & AFLAG)
4536 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4537 else
4538 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4539 used_prefixes |= (prefixes & PREFIX_ADDR);
4540 }
4541 break;
4542 case 'G':
4543 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4544 break;
4545 if ((rex & REX_W) || (sizeflag & DFLAG))
4546 *obufp++ = 'l';
4547 else
4548 *obufp++ = 'w';
4549 if (!(rex & REX_W))
4550 used_prefixes |= (prefixes & PREFIX_DATA);
4551 break;
4552 case 'H':
4553 if (intel_syntax)
4554 break;
4555 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4556 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4557 {
4558 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4559 *obufp++ = ',';
4560 *obufp++ = 'p';
4561 if (prefixes & PREFIX_DS)
4562 *obufp++ = 't';
4563 else
4564 *obufp++ = 'n';
4565 }
4566 break;
4567 case 'J':
4568 if (intel_syntax)
4569 break;
4570 *obufp++ = 'l';
4571 break;
4572 case 'K':
4573 USED_REX (REX_W);
4574 if (rex & REX_W)
4575 *obufp++ = 'q';
4576 else
4577 *obufp++ = 'd';
4578 break;
4579 case 'Z':
4580 if (intel_syntax)
4581 break;
4582 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4583 {
4584 *obufp++ = 'q';
4585 break;
4586 }
4587 /* Fall through. */
4588 case 'L':
4589 if (intel_syntax)
4590 break;
4591 if (sizeflag & SUFFIX_ALWAYS)
4592 *obufp++ = 'l';
4593 break;
4594 case 'N':
4595 if ((prefixes & PREFIX_FWAIT) == 0)
4596 *obufp++ = 'n';
4597 else
4598 used_prefixes |= PREFIX_FWAIT;
4599 break;
4600 case 'O':
4601 USED_REX (REX_W);
4602 if (rex & REX_W)
4603 *obufp++ = 'o';
4604 else if (intel_syntax && (sizeflag & DFLAG))
4605 *obufp++ = 'q';
4606 else
4607 *obufp++ = 'd';
4608 if (!(rex & REX_W))
4609 used_prefixes |= (prefixes & PREFIX_DATA);
4610 break;
4611 case 'T':
4612 if (intel_syntax)
4613 break;
4614 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4615 {
4616 *obufp++ = 'q';
4617 break;
4618 }
4619 /* Fall through. */
4620 case 'P':
4621 if (intel_syntax)
4622 break;
4623 if ((prefixes & PREFIX_DATA)
4624 || (rex & REX_W)
4625 || (sizeflag & SUFFIX_ALWAYS))
4626 {
4627 USED_REX (REX_W);
4628 if (rex & REX_W)
4629 *obufp++ = 'q';
4630 else
4631 {
4632 if (sizeflag & DFLAG)
4633 *obufp++ = 'l';
4634 else
4635 *obufp++ = 'w';
4636 }
4637 used_prefixes |= (prefixes & PREFIX_DATA);
4638 }
4639 break;
4640 case 'U':
4641 if (intel_syntax)
4642 break;
4643 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4644 {
4645 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4646 *obufp++ = 'q';
4647 break;
4648 }
4649 /* Fall through. */
4650 case 'Q':
4651 if (intel_syntax && !alt)
4652 break;
4653 USED_REX (REX_W);
4654 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4655 {
4656 if (rex & REX_W)
4657 *obufp++ = 'q';
4658 else
4659 {
4660 if (sizeflag & DFLAG)
4661 *obufp++ = intel_syntax ? 'd' : 'l';
4662 else
4663 *obufp++ = 'w';
4664 }
4665 used_prefixes |= (prefixes & PREFIX_DATA);
4666 }
4667 break;
4668 case 'R':
4669 USED_REX (REX_W);
4670 if (rex & REX_W)
4671 *obufp++ = 'q';
4672 else if (sizeflag & DFLAG)
4673 {
4674 if (intel_syntax)
4675 *obufp++ = 'd';
4676 else
4677 *obufp++ = 'l';
4678 }
4679 else
4680 *obufp++ = 'w';
4681 if (intel_syntax && !p[1]
4682 && ((rex & REX_W) || (sizeflag & DFLAG)))
4683 *obufp++ = 'e';
4684 if (!(rex & REX_W))
4685 used_prefixes |= (prefixes & PREFIX_DATA);
4686 break;
4687 case 'V':
4688 if (intel_syntax)
4689 break;
4690 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4691 {
4692 if (sizeflag & SUFFIX_ALWAYS)
4693 *obufp++ = 'q';
4694 break;
4695 }
4696 /* Fall through. */
4697 case 'S':
4698 if (intel_syntax)
4699 break;
4700 if (sizeflag & SUFFIX_ALWAYS)
4701 {
4702 if (rex & REX_W)
4703 *obufp++ = 'q';
4704 else
4705 {
4706 if (sizeflag & DFLAG)
4707 *obufp++ = 'l';
4708 else
4709 *obufp++ = 'w';
4710 used_prefixes |= (prefixes & PREFIX_DATA);
4711 }
4712 }
4713 break;
4714 case 'X':
4715 if (prefixes & PREFIX_DATA)
4716 *obufp++ = 'd';
4717 else
4718 *obufp++ = 's';
4719 used_prefixes |= (prefixes & PREFIX_DATA);
4720 break;
4721 case 'Y':
4722 if (intel_syntax)
4723 break;
4724 if (rex & REX_W)
4725 {
4726 USED_REX (REX_W);
4727 *obufp++ = 'q';
4728 }
4729 break;
4730 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4731 case 'W':
4732 /* operand size flag for cwtl, cbtw */
4733 USED_REX (REX_W);
4734 if (rex & REX_W)
4735 {
4736 if (intel_syntax)
4737 *obufp++ = 'd';
4738 else
4739 *obufp++ = 'l';
4740 }
4741 else if (sizeflag & DFLAG)
4742 *obufp++ = 'w';
4743 else
4744 *obufp++ = 'b';
4745 if (!(rex & REX_W))
4746 used_prefixes |= (prefixes & PREFIX_DATA);
4747 break;
4748 }
4749 alt = 0;
4750 }
4751 *obufp = 0;
4752 return 0;
4753 }
4754
4755 static void
4756 oappend (const char *s)
4757 {
4758 strcpy (obufp, s);
4759 obufp += strlen (s);
4760 }
4761
4762 static void
4763 append_seg (void)
4764 {
4765 if (prefixes & PREFIX_CS)
4766 {
4767 used_prefixes |= PREFIX_CS;
4768 oappend ("%cs:" + intel_syntax);
4769 }
4770 if (prefixes & PREFIX_DS)
4771 {
4772 used_prefixes |= PREFIX_DS;
4773 oappend ("%ds:" + intel_syntax);
4774 }
4775 if (prefixes & PREFIX_SS)
4776 {
4777 used_prefixes |= PREFIX_SS;
4778 oappend ("%ss:" + intel_syntax);
4779 }
4780 if (prefixes & PREFIX_ES)
4781 {
4782 used_prefixes |= PREFIX_ES;
4783 oappend ("%es:" + intel_syntax);
4784 }
4785 if (prefixes & PREFIX_FS)
4786 {
4787 used_prefixes |= PREFIX_FS;
4788 oappend ("%fs:" + intel_syntax);
4789 }
4790 if (prefixes & PREFIX_GS)
4791 {
4792 used_prefixes |= PREFIX_GS;
4793 oappend ("%gs:" + intel_syntax);
4794 }
4795 }
4796
4797 static void
4798 OP_indirE (int bytemode, int sizeflag)
4799 {
4800 if (!intel_syntax)
4801 oappend ("*");
4802 OP_E (bytemode, sizeflag);
4803 }
4804
4805 static void
4806 print_operand_value (char *buf, int hex, bfd_vma disp)
4807 {
4808 if (address_mode == mode_64bit)
4809 {
4810 if (hex)
4811 {
4812 char tmp[30];
4813 int i;
4814 buf[0] = '0';
4815 buf[1] = 'x';
4816 sprintf_vma (tmp, disp);
4817 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
4818 strcpy (buf + 2, tmp + i);
4819 }
4820 else
4821 {
4822 bfd_signed_vma v = disp;
4823 char tmp[30];
4824 int i;
4825 if (v < 0)
4826 {
4827 *(buf++) = '-';
4828 v = -disp;
4829 /* Check for possible overflow on 0x8000000000000000. */
4830 if (v < 0)
4831 {
4832 strcpy (buf, "9223372036854775808");
4833 return;
4834 }
4835 }
4836 if (!v)
4837 {
4838 strcpy (buf, "0");
4839 return;
4840 }
4841
4842 i = 0;
4843 tmp[29] = 0;
4844 while (v)
4845 {
4846 tmp[28 - i] = (v % 10) + '0';
4847 v /= 10;
4848 i++;
4849 }
4850 strcpy (buf, tmp + 29 - i);
4851 }
4852 }
4853 else
4854 {
4855 if (hex)
4856 sprintf (buf, "0x%x", (unsigned int) disp);
4857 else
4858 sprintf (buf, "%d", (int) disp);
4859 }
4860 }
4861
4862 /* Put DISP in BUF as signed hex number. */
4863
4864 static void
4865 print_displacement (char *buf, bfd_vma disp)
4866 {
4867 bfd_signed_vma val = disp;
4868 char tmp[30];
4869 int i, j = 0;
4870
4871 if (val < 0)
4872 {
4873 buf[j++] = '-';
4874 val = -disp;
4875
4876 /* Check for possible overflow. */
4877 if (val < 0)
4878 {
4879 switch (address_mode)
4880 {
4881 case mode_64bit:
4882 strcpy (buf + j, "0x8000000000000000");
4883 break;
4884 case mode_32bit:
4885 strcpy (buf + j, "0x80000000");
4886 break;
4887 case mode_16bit:
4888 strcpy (buf + j, "0x8000");
4889 break;
4890 }
4891 return;
4892 }
4893 }
4894
4895 buf[j++] = '0';
4896 buf[j++] = 'x';
4897
4898 sprintf_vma (tmp, val);
4899 for (i = 0; tmp[i] == '0'; i++)
4900 continue;
4901 if (tmp[i] == '\0')
4902 i--;
4903 strcpy (buf + j, tmp + i);
4904 }
4905
4906 static void
4907 intel_operand_size (int bytemode, int sizeflag)
4908 {
4909 switch (bytemode)
4910 {
4911 case b_mode:
4912 case dqb_mode:
4913 oappend ("BYTE PTR ");
4914 break;
4915 case w_mode:
4916 case dqw_mode:
4917 oappend ("WORD PTR ");
4918 break;
4919 case stack_v_mode:
4920 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4921 {
4922 oappend ("QWORD PTR ");
4923 used_prefixes |= (prefixes & PREFIX_DATA);
4924 break;
4925 }
4926 /* FALLTHRU */
4927 case v_mode:
4928 case dq_mode:
4929 USED_REX (REX_W);
4930 if (rex & REX_W)
4931 oappend ("QWORD PTR ");
4932 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4933 oappend ("DWORD PTR ");
4934 else
4935 oappend ("WORD PTR ");
4936 used_prefixes |= (prefixes & PREFIX_DATA);
4937 break;
4938 case z_mode:
4939 if ((rex & REX_W) || (sizeflag & DFLAG))
4940 *obufp++ = 'D';
4941 oappend ("WORD PTR ");
4942 if (!(rex & REX_W))
4943 used_prefixes |= (prefixes & PREFIX_DATA);
4944 break;
4945 case d_mode:
4946 case dqd_mode:
4947 oappend ("DWORD PTR ");
4948 break;
4949 case q_mode:
4950 oappend ("QWORD PTR ");
4951 break;
4952 case m_mode:
4953 if (address_mode == mode_64bit)
4954 oappend ("QWORD PTR ");
4955 else
4956 oappend ("DWORD PTR ");
4957 break;
4958 case f_mode:
4959 if (sizeflag & DFLAG)
4960 oappend ("FWORD PTR ");
4961 else
4962 oappend ("DWORD PTR ");
4963 used_prefixes |= (prefixes & PREFIX_DATA);
4964 break;
4965 case t_mode:
4966 oappend ("TBYTE PTR ");
4967 break;
4968 case x_mode:
4969 oappend ("XMMWORD PTR ");
4970 break;
4971 case o_mode:
4972 oappend ("OWORD PTR ");
4973 break;
4974 default:
4975 break;
4976 }
4977 }
4978
4979 static void
4980 OP_E (int bytemode, int sizeflag)
4981 {
4982 bfd_vma disp;
4983 int add = 0;
4984 int riprel = 0;
4985 USED_REX (REX_B);
4986 if (rex & REX_B)
4987 add += 8;
4988
4989 /* Skip mod/rm byte. */
4990 MODRM_CHECK;
4991 codep++;
4992
4993 if (modrm.mod == 3)
4994 {
4995 switch (bytemode)
4996 {
4997 case b_mode:
4998 USED_REX (0);
4999 if (rex)
5000 oappend (names8rex[modrm.rm + add]);
5001 else
5002 oappend (names8[modrm.rm + add]);
5003 break;
5004 case w_mode:
5005 oappend (names16[modrm.rm + add]);
5006 break;
5007 case d_mode:
5008 oappend (names32[modrm.rm + add]);
5009 break;
5010 case q_mode:
5011 oappend (names64[modrm.rm + add]);
5012 break;
5013 case m_mode:
5014 if (address_mode == mode_64bit)
5015 oappend (names64[modrm.rm + add]);
5016 else
5017 oappend (names32[modrm.rm + add]);
5018 break;
5019 case stack_v_mode:
5020 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5021 {
5022 oappend (names64[modrm.rm + add]);
5023 used_prefixes |= (prefixes & PREFIX_DATA);
5024 break;
5025 }
5026 bytemode = v_mode;
5027 /* FALLTHRU */
5028 case v_mode:
5029 case dq_mode:
5030 case dqb_mode:
5031 case dqd_mode:
5032 case dqw_mode:
5033 USED_REX (REX_W);
5034 if (rex & REX_W)
5035 oappend (names64[modrm.rm + add]);
5036 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5037 oappend (names32[modrm.rm + add]);
5038 else
5039 oappend (names16[modrm.rm + add]);
5040 used_prefixes |= (prefixes & PREFIX_DATA);
5041 break;
5042 case 0:
5043 break;
5044 default:
5045 oappend (INTERNAL_DISASSEMBLER_ERROR);
5046 break;
5047 }
5048 return;
5049 }
5050
5051 disp = 0;
5052 if (intel_syntax)
5053 intel_operand_size (bytemode, sizeflag);
5054 append_seg ();
5055
5056 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5057 {
5058 /* 32/64 bit address mode */
5059 int havedisp;
5060 int havesib;
5061 int havebase;
5062 int base;
5063 int index = 0;
5064 int scale = 0;
5065
5066 havesib = 0;
5067 havebase = 1;
5068 base = modrm.rm;
5069
5070 if (base == 4)
5071 {
5072 havesib = 1;
5073 FETCH_DATA (the_info, codep + 1);
5074 index = (*codep >> 3) & 7;
5075 if (address_mode == mode_64bit || index != 0x4)
5076 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5077 scale = (*codep >> 6) & 3;
5078 base = *codep & 7;
5079 USED_REX (REX_X);
5080 if (rex & REX_X)
5081 index += 8;
5082 codep++;
5083 }
5084 base += add;
5085
5086 switch (modrm.mod)
5087 {
5088 case 0:
5089 if ((base & 7) == 5)
5090 {
5091 havebase = 0;
5092 if (address_mode == mode_64bit && !havesib)
5093 riprel = 1;
5094 disp = get32s ();
5095 }
5096 break;
5097 case 1:
5098 FETCH_DATA (the_info, codep + 1);
5099 disp = *codep++;
5100 if ((disp & 0x80) != 0)
5101 disp -= 0x100;
5102 break;
5103 case 2:
5104 disp = get32s ();
5105 break;
5106 }
5107
5108 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5109
5110 if (!intel_syntax)
5111 if (modrm.mod != 0 || (base & 7) == 5)
5112 {
5113 if (havedisp || riprel)
5114 print_displacement (scratchbuf, disp);
5115 else
5116 print_operand_value (scratchbuf, 1, disp);
5117 oappend (scratchbuf);
5118 if (riprel)
5119 {
5120 set_op (disp, 1);
5121 oappend ("(%rip)");
5122 }
5123 }
5124
5125 if (havedisp || (intel_syntax && riprel))
5126 {
5127 *obufp++ = open_char;
5128 if (intel_syntax && riprel)
5129 {
5130 set_op (disp, 1);
5131 oappend ("rip");
5132 }
5133 *obufp = '\0';
5134 if (havebase)
5135 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5136 ? names64[base] : names32[base]);
5137 if (havesib)
5138 {
5139 if (index != 4)
5140 {
5141 if (!intel_syntax || havebase)
5142 {
5143 *obufp++ = separator_char;
5144 *obufp = '\0';
5145 }
5146 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5147 ? names64[index] : names32[index]);
5148 }
5149 if (scale != 0 || (!intel_syntax && index != 4))
5150 {
5151 *obufp++ = scale_char;
5152 *obufp = '\0';
5153 sprintf (scratchbuf, "%d", 1 << scale);
5154 oappend (scratchbuf);
5155 }
5156 }
5157 if (intel_syntax
5158 && (disp || modrm.mod != 0 || (base & 7) == 5))
5159 {
5160 if ((bfd_signed_vma) disp >= 0)
5161 {
5162 *obufp++ = '+';
5163 *obufp = '\0';
5164 }
5165 else if (modrm.mod != 1)
5166 {
5167 *obufp++ = '-';
5168 *obufp = '\0';
5169 disp = - (bfd_signed_vma) disp;
5170 }
5171
5172 print_displacement (scratchbuf, disp);
5173 oappend (scratchbuf);
5174 }
5175
5176 *obufp++ = close_char;
5177 *obufp = '\0';
5178 }
5179 else if (intel_syntax)
5180 {
5181 if (modrm.mod != 0 || (base & 7) == 5)
5182 {
5183 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5184 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5185 ;
5186 else
5187 {
5188 oappend (names_seg[ds_reg - es_reg]);
5189 oappend (":");
5190 }
5191 print_operand_value (scratchbuf, 1, disp);
5192 oappend (scratchbuf);
5193 }
5194 }
5195 }
5196 else
5197 { /* 16 bit address mode */
5198 switch (modrm.mod)
5199 {
5200 case 0:
5201 if (modrm.rm == 6)
5202 {
5203 disp = get16 ();
5204 if ((disp & 0x8000) != 0)
5205 disp -= 0x10000;
5206 }
5207 break;
5208 case 1:
5209 FETCH_DATA (the_info, codep + 1);
5210 disp = *codep++;
5211 if ((disp & 0x80) != 0)
5212 disp -= 0x100;
5213 break;
5214 case 2:
5215 disp = get16 ();
5216 if ((disp & 0x8000) != 0)
5217 disp -= 0x10000;
5218 break;
5219 }
5220
5221 if (!intel_syntax)
5222 if (modrm.mod != 0 || modrm.rm == 6)
5223 {
5224 print_displacement (scratchbuf, disp);
5225 oappend (scratchbuf);
5226 }
5227
5228 if (modrm.mod != 0 || modrm.rm != 6)
5229 {
5230 *obufp++ = open_char;
5231 *obufp = '\0';
5232 oappend (index16[modrm.rm]);
5233 if (intel_syntax
5234 && (disp || modrm.mod != 0 || modrm.rm == 6))
5235 {
5236 if ((bfd_signed_vma) disp >= 0)
5237 {
5238 *obufp++ = '+';
5239 *obufp = '\0';
5240 }
5241 else if (modrm.mod != 1)
5242 {
5243 *obufp++ = '-';
5244 *obufp = '\0';
5245 disp = - (bfd_signed_vma) disp;
5246 }
5247
5248 print_displacement (scratchbuf, disp);
5249 oappend (scratchbuf);
5250 }
5251
5252 *obufp++ = close_char;
5253 *obufp = '\0';
5254 }
5255 else if (intel_syntax)
5256 {
5257 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5258 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5259 ;
5260 else
5261 {
5262 oappend (names_seg[ds_reg - es_reg]);
5263 oappend (":");
5264 }
5265 print_operand_value (scratchbuf, 1, disp & 0xffff);
5266 oappend (scratchbuf);
5267 }
5268 }
5269 }
5270
5271 static void
5272 OP_G (int bytemode, int sizeflag)
5273 {
5274 int add = 0;
5275 USED_REX (REX_R);
5276 if (rex & REX_R)
5277 add += 8;
5278 switch (bytemode)
5279 {
5280 case b_mode:
5281 USED_REX (0);
5282 if (rex)
5283 oappend (names8rex[modrm.reg + add]);
5284 else
5285 oappend (names8[modrm.reg + add]);
5286 break;
5287 case w_mode:
5288 oappend (names16[modrm.reg + add]);
5289 break;
5290 case d_mode:
5291 oappend (names32[modrm.reg + add]);
5292 break;
5293 case q_mode:
5294 oappend (names64[modrm.reg + add]);
5295 break;
5296 case v_mode:
5297 case dq_mode:
5298 case dqb_mode:
5299 case dqd_mode:
5300 case dqw_mode:
5301 USED_REX (REX_W);
5302 if (rex & REX_W)
5303 oappend (names64[modrm.reg + add]);
5304 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5305 oappend (names32[modrm.reg + add]);
5306 else
5307 oappend (names16[modrm.reg + add]);
5308 used_prefixes |= (prefixes & PREFIX_DATA);
5309 break;
5310 case m_mode:
5311 if (address_mode == mode_64bit)
5312 oappend (names64[modrm.reg + add]);
5313 else
5314 oappend (names32[modrm.reg + add]);
5315 break;
5316 default:
5317 oappend (INTERNAL_DISASSEMBLER_ERROR);
5318 break;
5319 }
5320 }
5321
5322 static bfd_vma
5323 get64 (void)
5324 {
5325 bfd_vma x;
5326 #ifdef BFD64
5327 unsigned int a;
5328 unsigned int b;
5329
5330 FETCH_DATA (the_info, codep + 8);
5331 a = *codep++ & 0xff;
5332 a |= (*codep++ & 0xff) << 8;
5333 a |= (*codep++ & 0xff) << 16;
5334 a |= (*codep++ & 0xff) << 24;
5335 b = *codep++ & 0xff;
5336 b |= (*codep++ & 0xff) << 8;
5337 b |= (*codep++ & 0xff) << 16;
5338 b |= (*codep++ & 0xff) << 24;
5339 x = a + ((bfd_vma) b << 32);
5340 #else
5341 abort ();
5342 x = 0;
5343 #endif
5344 return x;
5345 }
5346
5347 static bfd_signed_vma
5348 get32 (void)
5349 {
5350 bfd_signed_vma x = 0;
5351
5352 FETCH_DATA (the_info, codep + 4);
5353 x = *codep++ & (bfd_signed_vma) 0xff;
5354 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5355 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5356 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5357 return x;
5358 }
5359
5360 static bfd_signed_vma
5361 get32s (void)
5362 {
5363 bfd_signed_vma x = 0;
5364
5365 FETCH_DATA (the_info, codep + 4);
5366 x = *codep++ & (bfd_signed_vma) 0xff;
5367 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5368 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5369 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5370
5371 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5372
5373 return x;
5374 }
5375
5376 static int
5377 get16 (void)
5378 {
5379 int x = 0;
5380
5381 FETCH_DATA (the_info, codep + 2);
5382 x = *codep++ & 0xff;
5383 x |= (*codep++ & 0xff) << 8;
5384 return x;
5385 }
5386
5387 static void
5388 set_op (bfd_vma op, int riprel)
5389 {
5390 op_index[op_ad] = op_ad;
5391 if (address_mode == mode_64bit)
5392 {
5393 op_address[op_ad] = op;
5394 op_riprel[op_ad] = riprel;
5395 }
5396 else
5397 {
5398 /* Mask to get a 32-bit address. */
5399 op_address[op_ad] = op & 0xffffffff;
5400 op_riprel[op_ad] = riprel & 0xffffffff;
5401 }
5402 }
5403
5404 static void
5405 OP_REG (int code, int sizeflag)
5406 {
5407 const char *s;
5408 int add = 0;
5409 USED_REX (REX_B);
5410 if (rex & REX_B)
5411 add = 8;
5412
5413 switch (code)
5414 {
5415 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5416 case sp_reg: case bp_reg: case si_reg: case di_reg:
5417 s = names16[code - ax_reg + add];
5418 break;
5419 case es_reg: case ss_reg: case cs_reg:
5420 case ds_reg: case fs_reg: case gs_reg:
5421 s = names_seg[code - es_reg + add];
5422 break;
5423 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5424 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5425 USED_REX (0);
5426 if (rex)
5427 s = names8rex[code - al_reg + add];
5428 else
5429 s = names8[code - al_reg];
5430 break;
5431 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5432 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5433 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5434 {
5435 s = names64[code - rAX_reg + add];
5436 break;
5437 }
5438 code += eAX_reg - rAX_reg;
5439 /* Fall through. */
5440 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5441 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5442 USED_REX (REX_W);
5443 if (rex & REX_W)
5444 s = names64[code - eAX_reg + add];
5445 else if (sizeflag & DFLAG)
5446 s = names32[code - eAX_reg + add];
5447 else
5448 s = names16[code - eAX_reg + add];
5449 used_prefixes |= (prefixes & PREFIX_DATA);
5450 break;
5451 default:
5452 s = INTERNAL_DISASSEMBLER_ERROR;
5453 break;
5454 }
5455 oappend (s);
5456 }
5457
5458 static void
5459 OP_IMREG (int code, int sizeflag)
5460 {
5461 const char *s;
5462
5463 switch (code)
5464 {
5465 case indir_dx_reg:
5466 if (intel_syntax)
5467 s = "dx";
5468 else
5469 s = "(%dx)";
5470 break;
5471 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5472 case sp_reg: case bp_reg: case si_reg: case di_reg:
5473 s = names16[code - ax_reg];
5474 break;
5475 case es_reg: case ss_reg: case cs_reg:
5476 case ds_reg: case fs_reg: case gs_reg:
5477 s = names_seg[code - es_reg];
5478 break;
5479 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5480 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5481 USED_REX (0);
5482 if (rex)
5483 s = names8rex[code - al_reg];
5484 else
5485 s = names8[code - al_reg];
5486 break;
5487 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5488 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5489 USED_REX (REX_W);
5490 if (rex & REX_W)
5491 s = names64[code - eAX_reg];
5492 else if (sizeflag & DFLAG)
5493 s = names32[code - eAX_reg];
5494 else
5495 s = names16[code - eAX_reg];
5496 used_prefixes |= (prefixes & PREFIX_DATA);
5497 break;
5498 case z_mode_ax_reg:
5499 if ((rex & REX_W) || (sizeflag & DFLAG))
5500 s = *names32;
5501 else
5502 s = *names16;
5503 if (!(rex & REX_W))
5504 used_prefixes |= (prefixes & PREFIX_DATA);
5505 break;
5506 default:
5507 s = INTERNAL_DISASSEMBLER_ERROR;
5508 break;
5509 }
5510 oappend (s);
5511 }
5512
5513 static void
5514 OP_I (int bytemode, int sizeflag)
5515 {
5516 bfd_signed_vma op;
5517 bfd_signed_vma mask = -1;
5518
5519 switch (bytemode)
5520 {
5521 case b_mode:
5522 FETCH_DATA (the_info, codep + 1);
5523 op = *codep++;
5524 mask = 0xff;
5525 break;
5526 case q_mode:
5527 if (address_mode == mode_64bit)
5528 {
5529 op = get32s ();
5530 break;
5531 }
5532 /* Fall through. */
5533 case v_mode:
5534 USED_REX (REX_W);
5535 if (rex & REX_W)
5536 op = get32s ();
5537 else if (sizeflag & DFLAG)
5538 {
5539 op = get32 ();
5540 mask = 0xffffffff;
5541 }
5542 else
5543 {
5544 op = get16 ();
5545 mask = 0xfffff;
5546 }
5547 used_prefixes |= (prefixes & PREFIX_DATA);
5548 break;
5549 case w_mode:
5550 mask = 0xfffff;
5551 op = get16 ();
5552 break;
5553 case const_1_mode:
5554 if (intel_syntax)
5555 oappend ("1");
5556 return;
5557 default:
5558 oappend (INTERNAL_DISASSEMBLER_ERROR);
5559 return;
5560 }
5561
5562 op &= mask;
5563 scratchbuf[0] = '$';
5564 print_operand_value (scratchbuf + 1, 1, op);
5565 oappend (scratchbuf + intel_syntax);
5566 scratchbuf[0] = '\0';
5567 }
5568
5569 static void
5570 OP_I64 (int bytemode, int sizeflag)
5571 {
5572 bfd_signed_vma op;
5573 bfd_signed_vma mask = -1;
5574
5575 if (address_mode != mode_64bit)
5576 {
5577 OP_I (bytemode, sizeflag);
5578 return;
5579 }
5580
5581 switch (bytemode)
5582 {
5583 case b_mode:
5584 FETCH_DATA (the_info, codep + 1);
5585 op = *codep++;
5586 mask = 0xff;
5587 break;
5588 case v_mode:
5589 USED_REX (REX_W);
5590 if (rex & REX_W)
5591 op = get64 ();
5592 else if (sizeflag & DFLAG)
5593 {
5594 op = get32 ();
5595 mask = 0xffffffff;
5596 }
5597 else
5598 {
5599 op = get16 ();
5600 mask = 0xfffff;
5601 }
5602 used_prefixes |= (prefixes & PREFIX_DATA);
5603 break;
5604 case w_mode:
5605 mask = 0xfffff;
5606 op = get16 ();
5607 break;
5608 default:
5609 oappend (INTERNAL_DISASSEMBLER_ERROR);
5610 return;
5611 }
5612
5613 op &= mask;
5614 scratchbuf[0] = '$';
5615 print_operand_value (scratchbuf + 1, 1, op);
5616 oappend (scratchbuf + intel_syntax);
5617 scratchbuf[0] = '\0';
5618 }
5619
5620 static void
5621 OP_sI (int bytemode, int sizeflag)
5622 {
5623 bfd_signed_vma op;
5624 bfd_signed_vma mask = -1;
5625
5626 switch (bytemode)
5627 {
5628 case b_mode:
5629 FETCH_DATA (the_info, codep + 1);
5630 op = *codep++;
5631 if ((op & 0x80) != 0)
5632 op -= 0x100;
5633 mask = 0xffffffff;
5634 break;
5635 case v_mode:
5636 USED_REX (REX_W);
5637 if (rex & REX_W)
5638 op = get32s ();
5639 else if (sizeflag & DFLAG)
5640 {
5641 op = get32s ();
5642 mask = 0xffffffff;
5643 }
5644 else
5645 {
5646 mask = 0xffffffff;
5647 op = get16 ();
5648 if ((op & 0x8000) != 0)
5649 op -= 0x10000;
5650 }
5651 used_prefixes |= (prefixes & PREFIX_DATA);
5652 break;
5653 case w_mode:
5654 op = get16 ();
5655 mask = 0xffffffff;
5656 if ((op & 0x8000) != 0)
5657 op -= 0x10000;
5658 break;
5659 default:
5660 oappend (INTERNAL_DISASSEMBLER_ERROR);
5661 return;
5662 }
5663
5664 scratchbuf[0] = '$';
5665 print_operand_value (scratchbuf + 1, 1, op);
5666 oappend (scratchbuf + intel_syntax);
5667 }
5668
5669 static void
5670 OP_J (int bytemode, int sizeflag)
5671 {
5672 bfd_vma disp;
5673 bfd_vma mask = -1;
5674 bfd_vma segment = 0;
5675
5676 switch (bytemode)
5677 {
5678 case b_mode:
5679 FETCH_DATA (the_info, codep + 1);
5680 disp = *codep++;
5681 if ((disp & 0x80) != 0)
5682 disp -= 0x100;
5683 break;
5684 case v_mode:
5685 if ((sizeflag & DFLAG) || (rex & REX_W))
5686 disp = get32s ();
5687 else
5688 {
5689 disp = get16 ();
5690 if ((disp & 0x8000) != 0)
5691 disp -= 0x10000;
5692 /* In 16bit mode, address is wrapped around at 64k within
5693 the same segment. Otherwise, a data16 prefix on a jump
5694 instruction means that the pc is masked to 16 bits after
5695 the displacement is added! */
5696 mask = 0xffff;
5697 if ((prefixes & PREFIX_DATA) == 0)
5698 segment = ((start_pc + codep - start_codep)
5699 & ~((bfd_vma) 0xffff));
5700 }
5701 used_prefixes |= (prefixes & PREFIX_DATA);
5702 break;
5703 default:
5704 oappend (INTERNAL_DISASSEMBLER_ERROR);
5705 return;
5706 }
5707 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5708 set_op (disp, 0);
5709 print_operand_value (scratchbuf, 1, disp);
5710 oappend (scratchbuf);
5711 }
5712
5713 static void
5714 OP_SEG (int bytemode, int sizeflag)
5715 {
5716 if (bytemode == w_mode)
5717 oappend (names_seg[modrm.reg]);
5718 else
5719 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5720 }
5721
5722 static void
5723 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5724 {
5725 int seg, offset;
5726
5727 if (sizeflag & DFLAG)
5728 {
5729 offset = get32 ();
5730 seg = get16 ();
5731 }
5732 else
5733 {
5734 offset = get16 ();
5735 seg = get16 ();
5736 }
5737 used_prefixes |= (prefixes & PREFIX_DATA);
5738 if (intel_syntax)
5739 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
5740 else
5741 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
5742 oappend (scratchbuf);
5743 }
5744
5745 static void
5746 OP_OFF (int bytemode, int sizeflag)
5747 {
5748 bfd_vma off;
5749
5750 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5751 intel_operand_size (bytemode, sizeflag);
5752 append_seg ();
5753
5754 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5755 off = get32 ();
5756 else
5757 off = get16 ();
5758
5759 if (intel_syntax)
5760 {
5761 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5762 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5763 {
5764 oappend (names_seg[ds_reg - es_reg]);
5765 oappend (":");
5766 }
5767 }
5768 print_operand_value (scratchbuf, 1, off);
5769 oappend (scratchbuf);
5770 }
5771
5772 static void
5773 OP_OFF64 (int bytemode, int sizeflag)
5774 {
5775 bfd_vma off;
5776
5777 if (address_mode != mode_64bit
5778 || (prefixes & PREFIX_ADDR))
5779 {
5780 OP_OFF (bytemode, sizeflag);
5781 return;
5782 }
5783
5784 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5785 intel_operand_size (bytemode, sizeflag);
5786 append_seg ();
5787
5788 off = get64 ();
5789
5790 if (intel_syntax)
5791 {
5792 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5793 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5794 {
5795 oappend (names_seg[ds_reg - es_reg]);
5796 oappend (":");
5797 }
5798 }
5799 print_operand_value (scratchbuf, 1, off);
5800 oappend (scratchbuf);
5801 }
5802
5803 static void
5804 ptr_reg (int code, int sizeflag)
5805 {
5806 const char *s;
5807
5808 *obufp++ = open_char;
5809 used_prefixes |= (prefixes & PREFIX_ADDR);
5810 if (address_mode == mode_64bit)
5811 {
5812 if (!(sizeflag & AFLAG))
5813 s = names32[code - eAX_reg];
5814 else
5815 s = names64[code - eAX_reg];
5816 }
5817 else if (sizeflag & AFLAG)
5818 s = names32[code - eAX_reg];
5819 else
5820 s = names16[code - eAX_reg];
5821 oappend (s);
5822 *obufp++ = close_char;
5823 *obufp = 0;
5824 }
5825
5826 static void
5827 OP_ESreg (int code, int sizeflag)
5828 {
5829 if (intel_syntax)
5830 {
5831 switch (codep[-1])
5832 {
5833 case 0x6d: /* insw/insl */
5834 intel_operand_size (z_mode, sizeflag);
5835 break;
5836 case 0xa5: /* movsw/movsl/movsq */
5837 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5838 case 0xab: /* stosw/stosl */
5839 case 0xaf: /* scasw/scasl */
5840 intel_operand_size (v_mode, sizeflag);
5841 break;
5842 default:
5843 intel_operand_size (b_mode, sizeflag);
5844 }
5845 }
5846 oappend ("%es:" + intel_syntax);
5847 ptr_reg (code, sizeflag);
5848 }
5849
5850 static void
5851 OP_DSreg (int code, int sizeflag)
5852 {
5853 if (intel_syntax)
5854 {
5855 switch (codep[-1])
5856 {
5857 case 0x6f: /* outsw/outsl */
5858 intel_operand_size (z_mode, sizeflag);
5859 break;
5860 case 0xa5: /* movsw/movsl/movsq */
5861 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5862 case 0xad: /* lodsw/lodsl/lodsq */
5863 intel_operand_size (v_mode, sizeflag);
5864 break;
5865 default:
5866 intel_operand_size (b_mode, sizeflag);
5867 }
5868 }
5869 if ((prefixes
5870 & (PREFIX_CS
5871 | PREFIX_DS
5872 | PREFIX_SS
5873 | PREFIX_ES
5874 | PREFIX_FS
5875 | PREFIX_GS)) == 0)
5876 prefixes |= PREFIX_DS;
5877 append_seg ();
5878 ptr_reg (code, sizeflag);
5879 }
5880
5881 static void
5882 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5883 {
5884 int add = 0;
5885 if (rex & REX_R)
5886 {
5887 USED_REX (REX_R);
5888 add = 8;
5889 }
5890 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5891 {
5892 lock_prefix = NULL;
5893 used_prefixes |= PREFIX_LOCK;
5894 add = 8;
5895 }
5896 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
5897 oappend (scratchbuf + intel_syntax);
5898 }
5899
5900 static void
5901 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5902 {
5903 int add = 0;
5904 USED_REX (REX_R);
5905 if (rex & REX_R)
5906 add = 8;
5907 if (intel_syntax)
5908 sprintf (scratchbuf, "db%d", modrm.reg + add);
5909 else
5910 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
5911 oappend (scratchbuf);
5912 }
5913
5914 static void
5915 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5916 {
5917 sprintf (scratchbuf, "%%tr%d", modrm.reg);
5918 oappend (scratchbuf + intel_syntax);
5919 }
5920
5921 static void
5922 OP_R (int bytemode, int sizeflag)
5923 {
5924 if (modrm.mod == 3)
5925 OP_E (bytemode, sizeflag);
5926 else
5927 BadOp ();
5928 }
5929
5930 static void
5931 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5932 {
5933 used_prefixes |= (prefixes & PREFIX_DATA);
5934 if (prefixes & PREFIX_DATA)
5935 {
5936 int add = 0;
5937 USED_REX (REX_R);
5938 if (rex & REX_R)
5939 add = 8;
5940 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5941 }
5942 else
5943 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5944 oappend (scratchbuf + intel_syntax);
5945 }
5946
5947 static void
5948 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5949 {
5950 int add = 0;
5951 USED_REX (REX_R);
5952 if (rex & REX_R)
5953 add = 8;
5954 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5955 oappend (scratchbuf + intel_syntax);
5956 }
5957
5958 static void
5959 OP_EM (int bytemode, int sizeflag)
5960 {
5961 if (modrm.mod != 3)
5962 {
5963 if (intel_syntax && bytemode == v_mode)
5964 {
5965 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5966 used_prefixes |= (prefixes & PREFIX_DATA);
5967 }
5968 OP_E (bytemode, sizeflag);
5969 return;
5970 }
5971
5972 /* Skip mod/rm byte. */
5973 MODRM_CHECK;
5974 codep++;
5975 used_prefixes |= (prefixes & PREFIX_DATA);
5976 if (prefixes & PREFIX_DATA)
5977 {
5978 int add = 0;
5979
5980 USED_REX (REX_B);
5981 if (rex & REX_B)
5982 add = 8;
5983 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
5984 }
5985 else
5986 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5987 oappend (scratchbuf + intel_syntax);
5988 }
5989
5990 /* cvt* are the only instructions in sse2 which have
5991 both SSE and MMX operands and also have 0x66 prefix
5992 in their opcode. 0x66 was originally used to differentiate
5993 between SSE and MMX instruction(operands). So we have to handle the
5994 cvt* separately using OP_EMC and OP_MXC */
5995 static void
5996 OP_EMC (int bytemode, int sizeflag)
5997 {
5998 if (modrm.mod != 3)
5999 {
6000 if (intel_syntax && bytemode == v_mode)
6001 {
6002 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6003 used_prefixes |= (prefixes & PREFIX_DATA);
6004 }
6005 OP_E (bytemode, sizeflag);
6006 return;
6007 }
6008
6009 /* Skip mod/rm byte. */
6010 MODRM_CHECK;
6011 codep++;
6012 used_prefixes |= (prefixes & PREFIX_DATA);
6013 sprintf (scratchbuf, "%%mm%d", modrm.rm);
6014 oappend (scratchbuf + intel_syntax);
6015 }
6016
6017 static void
6018 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6019 {
6020 used_prefixes |= (prefixes & PREFIX_DATA);
6021 sprintf (scratchbuf, "%%mm%d", modrm.reg);
6022 oappend (scratchbuf + intel_syntax);
6023 }
6024
6025 static void
6026 OP_EX (int bytemode, int sizeflag)
6027 {
6028 int add = 0;
6029 if (modrm.mod != 3)
6030 {
6031 OP_E (bytemode, sizeflag);
6032 return;
6033 }
6034 USED_REX (REX_B);
6035 if (rex & REX_B)
6036 add = 8;
6037
6038 /* Skip mod/rm byte. */
6039 MODRM_CHECK;
6040 codep++;
6041 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
6042 oappend (scratchbuf + intel_syntax);
6043 }
6044
6045 static void
6046 OP_MS (int bytemode, int sizeflag)
6047 {
6048 if (modrm.mod == 3)
6049 OP_EM (bytemode, sizeflag);
6050 else
6051 BadOp ();
6052 }
6053
6054 static void
6055 OP_XS (int bytemode, int sizeflag)
6056 {
6057 if (modrm.mod == 3)
6058 OP_EX (bytemode, sizeflag);
6059 else
6060 BadOp ();
6061 }
6062
6063 static void
6064 OP_M (int bytemode, int sizeflag)
6065 {
6066 if (modrm.mod == 3)
6067 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6068 BadOp ();
6069 else
6070 OP_E (bytemode, sizeflag);
6071 }
6072
6073 static void
6074 OP_0f07 (int bytemode, int sizeflag)
6075 {
6076 if (modrm.mod != 3 || modrm.rm != 0)
6077 BadOp ();
6078 else
6079 OP_E (bytemode, sizeflag);
6080 }
6081
6082 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6083 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6084
6085 static void
6086 NOP_Fixup1 (int bytemode, int sizeflag)
6087 {
6088 if ((prefixes & PREFIX_DATA) != 0
6089 || (rex != 0
6090 && rex != 0x48
6091 && address_mode == mode_64bit))
6092 OP_REG (bytemode, sizeflag);
6093 else
6094 strcpy (obuf, "nop");
6095 }
6096
6097 static void
6098 NOP_Fixup2 (int bytemode, int sizeflag)
6099 {
6100 if ((prefixes & PREFIX_DATA) != 0
6101 || (rex != 0
6102 && rex != 0x48
6103 && address_mode == mode_64bit))
6104 OP_IMREG (bytemode, sizeflag);
6105 }
6106
6107 static const char *const Suffix3DNow[] = {
6108 /* 00 */ NULL, NULL, NULL, NULL,
6109 /* 04 */ NULL, NULL, NULL, NULL,
6110 /* 08 */ NULL, NULL, NULL, NULL,
6111 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6112 /* 10 */ NULL, NULL, NULL, NULL,
6113 /* 14 */ NULL, NULL, NULL, NULL,
6114 /* 18 */ NULL, NULL, NULL, NULL,
6115 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
6116 /* 20 */ NULL, NULL, NULL, NULL,
6117 /* 24 */ NULL, NULL, NULL, NULL,
6118 /* 28 */ NULL, NULL, NULL, NULL,
6119 /* 2C */ NULL, NULL, NULL, NULL,
6120 /* 30 */ NULL, NULL, NULL, NULL,
6121 /* 34 */ NULL, NULL, NULL, NULL,
6122 /* 38 */ NULL, NULL, NULL, NULL,
6123 /* 3C */ NULL, NULL, NULL, NULL,
6124 /* 40 */ NULL, NULL, NULL, NULL,
6125 /* 44 */ NULL, NULL, NULL, NULL,
6126 /* 48 */ NULL, NULL, NULL, NULL,
6127 /* 4C */ NULL, NULL, NULL, NULL,
6128 /* 50 */ NULL, NULL, NULL, NULL,
6129 /* 54 */ NULL, NULL, NULL, NULL,
6130 /* 58 */ NULL, NULL, NULL, NULL,
6131 /* 5C */ NULL, NULL, NULL, NULL,
6132 /* 60 */ NULL, NULL, NULL, NULL,
6133 /* 64 */ NULL, NULL, NULL, NULL,
6134 /* 68 */ NULL, NULL, NULL, NULL,
6135 /* 6C */ NULL, NULL, NULL, NULL,
6136 /* 70 */ NULL, NULL, NULL, NULL,
6137 /* 74 */ NULL, NULL, NULL, NULL,
6138 /* 78 */ NULL, NULL, NULL, NULL,
6139 /* 7C */ NULL, NULL, NULL, NULL,
6140 /* 80 */ NULL, NULL, NULL, NULL,
6141 /* 84 */ NULL, NULL, NULL, NULL,
6142 /* 88 */ NULL, NULL, "pfnacc", NULL,
6143 /* 8C */ NULL, NULL, "pfpnacc", NULL,
6144 /* 90 */ "pfcmpge", NULL, NULL, NULL,
6145 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6146 /* 98 */ NULL, NULL, "pfsub", NULL,
6147 /* 9C */ NULL, NULL, "pfadd", NULL,
6148 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
6149 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6150 /* A8 */ NULL, NULL, "pfsubr", NULL,
6151 /* AC */ NULL, NULL, "pfacc", NULL,
6152 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
6153 /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
6154 /* B8 */ NULL, NULL, NULL, "pswapd",
6155 /* BC */ NULL, NULL, NULL, "pavgusb",
6156 /* C0 */ NULL, NULL, NULL, NULL,
6157 /* C4 */ NULL, NULL, NULL, NULL,
6158 /* C8 */ NULL, NULL, NULL, NULL,
6159 /* CC */ NULL, NULL, NULL, NULL,
6160 /* D0 */ NULL, NULL, NULL, NULL,
6161 /* D4 */ NULL, NULL, NULL, NULL,
6162 /* D8 */ NULL, NULL, NULL, NULL,
6163 /* DC */ NULL, NULL, NULL, NULL,
6164 /* E0 */ NULL, NULL, NULL, NULL,
6165 /* E4 */ NULL, NULL, NULL, NULL,
6166 /* E8 */ NULL, NULL, NULL, NULL,
6167 /* EC */ NULL, NULL, NULL, NULL,
6168 /* F0 */ NULL, NULL, NULL, NULL,
6169 /* F4 */ NULL, NULL, NULL, NULL,
6170 /* F8 */ NULL, NULL, NULL, NULL,
6171 /* FC */ NULL, NULL, NULL, NULL,
6172 };
6173
6174 static void
6175 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6176 {
6177 const char *mnemonic;
6178
6179 FETCH_DATA (the_info, codep + 1);
6180 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6181 place where an 8-bit immediate would normally go. ie. the last
6182 byte of the instruction. */
6183 obufp = obuf + strlen (obuf);
6184 mnemonic = Suffix3DNow[*codep++ & 0xff];
6185 if (mnemonic)
6186 oappend (mnemonic);
6187 else
6188 {
6189 /* Since a variable sized modrm/sib chunk is between the start
6190 of the opcode (0x0f0f) and the opcode suffix, we need to do
6191 all the modrm processing first, and don't know until now that
6192 we have a bad opcode. This necessitates some cleaning up. */
6193 op_out[0][0] = '\0';
6194 op_out[1][0] = '\0';
6195 BadOp ();
6196 }
6197 }
6198
6199 static const char *simd_cmp_op[] = {
6200 "eq",
6201 "lt",
6202 "le",
6203 "unord",
6204 "neq",
6205 "nlt",
6206 "nle",
6207 "ord"
6208 };
6209
6210 static void
6211 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6212 {
6213 unsigned int cmp_type;
6214
6215 FETCH_DATA (the_info, codep + 1);
6216 obufp = obuf + strlen (obuf);
6217 cmp_type = *codep++ & 0xff;
6218 if (cmp_type < 8)
6219 {
6220 char suffix1 = 'p', suffix2 = 's';
6221 used_prefixes |= (prefixes & PREFIX_REPZ);
6222 if (prefixes & PREFIX_REPZ)
6223 suffix1 = 's';
6224 else
6225 {
6226 used_prefixes |= (prefixes & PREFIX_DATA);
6227 if (prefixes & PREFIX_DATA)
6228 suffix2 = 'd';
6229 else
6230 {
6231 used_prefixes |= (prefixes & PREFIX_REPNZ);
6232 if (prefixes & PREFIX_REPNZ)
6233 suffix1 = 's', suffix2 = 'd';
6234 }
6235 }
6236 sprintf (scratchbuf, "cmp%s%c%c",
6237 simd_cmp_op[cmp_type], suffix1, suffix2);
6238 used_prefixes |= (prefixes & PREFIX_REPZ);
6239 oappend (scratchbuf);
6240 }
6241 else
6242 {
6243 /* We have a bad extension byte. Clean up. */
6244 op_out[0][0] = '\0';
6245 op_out[1][0] = '\0';
6246 BadOp ();
6247 }
6248 }
6249
6250 static void
6251 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
6252 int sizeflag ATTRIBUTE_UNUSED)
6253 {
6254 /* mwait %eax,%ecx */
6255 if (!intel_syntax)
6256 {
6257 const char **names = (address_mode == mode_64bit
6258 ? names64 : names32);
6259 strcpy (op_out[0], names[0]);
6260 strcpy (op_out[1], names[1]);
6261 two_source_ops = 1;
6262 }
6263 /* Skip mod/rm byte. */
6264 MODRM_CHECK;
6265 codep++;
6266 }
6267
6268 static void
6269 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
6270 int sizeflag ATTRIBUTE_UNUSED)
6271 {
6272 /* monitor %eax,%ecx,%edx" */
6273 if (!intel_syntax)
6274 {
6275 const char **op1_names;
6276 const char **names = (address_mode == mode_64bit
6277 ? names64 : names32);
6278
6279 if (!(prefixes & PREFIX_ADDR))
6280 op1_names = (address_mode == mode_16bit
6281 ? names16 : names);
6282 else
6283 {
6284 /* Remove "addr16/addr32". */
6285 addr_prefix = NULL;
6286 op1_names = (address_mode != mode_32bit
6287 ? names32 : names16);
6288 used_prefixes |= PREFIX_ADDR;
6289 }
6290 strcpy (op_out[0], op1_names[0]);
6291 strcpy (op_out[1], names[1]);
6292 strcpy (op_out[2], names[2]);
6293 two_source_ops = 1;
6294 }
6295 /* Skip mod/rm byte. */
6296 MODRM_CHECK;
6297 codep++;
6298 }
6299
6300 static void
6301 SVME_Fixup (int bytemode, int sizeflag)
6302 {
6303 const char *alt;
6304 char *p;
6305
6306 switch (*codep)
6307 {
6308 case 0xd8:
6309 alt = "vmrun";
6310 break;
6311 case 0xd9:
6312 alt = "vmmcall";
6313 break;
6314 case 0xda:
6315 alt = "vmload";
6316 break;
6317 case 0xdb:
6318 alt = "vmsave";
6319 break;
6320 case 0xdc:
6321 alt = "stgi";
6322 break;
6323 case 0xdd:
6324 alt = "clgi";
6325 break;
6326 case 0xde:
6327 alt = "skinit";
6328 break;
6329 case 0xdf:
6330 alt = "invlpga";
6331 break;
6332 default:
6333 OP_M (bytemode, sizeflag);
6334 return;
6335 }
6336 /* Override "lidt". */
6337 p = obuf + strlen (obuf) - 4;
6338 /* We might have a suffix. */
6339 if (*p == 'i')
6340 --p;
6341 strcpy (p, alt);
6342 if (!(prefixes & PREFIX_ADDR))
6343 {
6344 ++codep;
6345 return;
6346 }
6347 used_prefixes |= PREFIX_ADDR;
6348 switch (*codep++)
6349 {
6350 case 0xdf:
6351 strcpy (op_out[1], names32[1]);
6352 two_source_ops = 1;
6353 /* Fall through. */
6354 case 0xd8:
6355 case 0xda:
6356 case 0xdb:
6357 *obufp++ = open_char;
6358 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6359 alt = names32[0];
6360 else
6361 alt = names16[0];
6362 strcpy (obufp, alt);
6363 obufp += strlen (alt);
6364 *obufp++ = close_char;
6365 *obufp = '\0';
6366 break;
6367 }
6368 }
6369
6370 static void
6371 BadOp (void)
6372 {
6373 /* Throw away prefixes and 1st. opcode byte. */
6374 codep = insn_codep + 1;
6375 oappend ("(bad)");
6376 }
6377
6378 static void
6379 REP_Fixup (int bytemode, int sizeflag)
6380 {
6381 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6382 lods and stos. */
6383 if (prefixes & PREFIX_REPZ)
6384 repz_prefix = "rep ";
6385
6386 switch (bytemode)
6387 {
6388 case al_reg:
6389 case eAX_reg:
6390 case indir_dx_reg:
6391 OP_IMREG (bytemode, sizeflag);
6392 break;
6393 case eDI_reg:
6394 OP_ESreg (bytemode, sizeflag);
6395 break;
6396 case eSI_reg:
6397 OP_DSreg (bytemode, sizeflag);
6398 break;
6399 default:
6400 abort ();
6401 break;
6402 }
6403 }
6404
6405 static void
6406 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6407 {
6408 USED_REX (REX_W);
6409 if (rex & REX_W)
6410 {
6411 /* Change cmpxchg8b to cmpxchg16b. */
6412 char *p = obuf + strlen (obuf) - 2;
6413 strcpy (p, "16b");
6414 bytemode = o_mode;
6415 }
6416 OP_M (bytemode, sizeflag);
6417 }
6418
6419 static void
6420 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6421 {
6422 sprintf (scratchbuf, "%%xmm%d", reg);
6423 oappend (scratchbuf + intel_syntax);
6424 }
6425
6426 static void
6427 CRC32_Fixup (int bytemode, int sizeflag)
6428 {
6429 /* Add proper suffix to "crc32". */
6430 char *p = obuf + strlen (obuf);
6431
6432 switch (bytemode)
6433 {
6434 case b_mode:
6435 if (intel_syntax)
6436 break;
6437
6438 *p++ = 'b';
6439 break;
6440 case v_mode:
6441 if (intel_syntax)
6442 break;
6443
6444 USED_REX (REX_W);
6445 if (rex & REX_W)
6446 *p++ = 'q';
6447 else if (sizeflag & DFLAG)
6448 *p++ = 'l';
6449 else
6450 *p++ = 'w';
6451 used_prefixes |= (prefixes & PREFIX_DATA);
6452 break;
6453 default:
6454 oappend (INTERNAL_DISASSEMBLER_ERROR);
6455 break;
6456 }
6457 *p = '\0';
6458
6459 if (modrm.mod == 3)
6460 {
6461 int add;
6462
6463 /* Skip mod/rm byte. */
6464 MODRM_CHECK;
6465 codep++;
6466
6467 USED_REX (REX_B);
6468 add = (rex & REX_B) ? 8 : 0;
6469 if (bytemode == b_mode)
6470 {
6471 USED_REX (0);
6472 if (rex)
6473 oappend (names8rex[modrm.rm + add]);
6474 else
6475 oappend (names8[modrm.rm + add]);
6476 }
6477 else
6478 {
6479 USED_REX (REX_W);
6480 if (rex & REX_W)
6481 oappend (names64[modrm.rm + add]);
6482 else if ((prefixes & PREFIX_DATA))
6483 oappend (names16[modrm.rm + add]);
6484 else
6485 oappend (names32[modrm.rm + add]);
6486 }
6487 }
6488 else
6489 OP_E (bytemode, sizeflag);
6490 }
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