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[deliverable/binutils-gdb.git] / opcodes / iq2000-asm.c
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "iq2000-desc.h"
34 #include "iq2000-opc.h"
35 #include "opintl.h"
36 #include "xregex.h"
37 #include "libiberty.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 static const char * parse_insn_normal
46 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
47 \f
48 /* -- assembler routines inserted here. */
49
50 /* -- asm.c */
51 static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
52 static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
53 static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
54 static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
55
56 /* Special check to ensure that instruction exists for given machine */
57 int
58 iq2000_cgen_insn_supported (cd, insn)
59 CGEN_CPU_DESC cd;
60 CGEN_INSN *insn;
61 {
62 int machs = cd->machs;
63
64 return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
65 }
66
67 static int iq2000_cgen_isa_register (strp)
68 const char **strp;
69 {
70 int len;
71 int ch1, ch2;
72 if (**strp == 'r' || **strp == 'R')
73 {
74 len = strlen (*strp);
75 if (len == 2)
76 {
77 ch1 = (*strp)[1];
78 if ('0' <= ch1 && ch1 <= '9')
79 return 1;
80 }
81 else if (len == 3)
82 {
83 ch1 = (*strp)[1];
84 ch2 = (*strp)[2];
85 if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
86 return 1;
87 if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
88 return 1;
89 }
90 }
91 if (**strp == '%' && tolower((*strp)[1]) != 'l' && tolower((*strp)[1]) != 'h')
92 return 1;
93 return 0;
94 }
95
96 /* Handle negated literal. */
97
98 static const char *
99 parse_mimm (cd, strp, opindex, valuep)
100 CGEN_CPU_DESC cd;
101 const char **strp;
102 int opindex;
103 long *valuep;
104 {
105 const char *errmsg;
106 long value;
107
108 /* Verify this isn't a register */
109 if (iq2000_cgen_isa_register (strp))
110 errmsg = _("immediate value cannot be register");
111 else
112 {
113 long value;
114
115 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
116 if (errmsg == NULL)
117 {
118 long x = (-value) & 0xFFFF0000;
119 if (x != 0 && x != 0xFFFF0000)
120 errmsg = _("immediate value out of range");
121 else
122 *valuep = (-value & 0xFFFF);
123 }
124 }
125 return errmsg;
126 }
127
128 /* Handle signed/unsigned literal. */
129
130 static const char *
131 parse_imm (cd, strp, opindex, valuep)
132 CGEN_CPU_DESC cd;
133 const char **strp;
134 int opindex;
135 unsigned long *valuep;
136 {
137 const char *errmsg;
138 long value;
139
140 if (iq2000_cgen_isa_register (strp))
141 errmsg = _("immediate value cannot be register");
142 else
143 {
144 long value;
145
146 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
147 if (errmsg == NULL)
148 {
149 long x = value & 0xFFFF0000;
150 if (x != 0 && x != 0xFFFF0000)
151 errmsg = _("immediate value out of range");
152 else
153 *valuep = (value & 0xFFFF);
154 }
155 }
156 return errmsg;
157 }
158
159 /* Handle iq10 21-bit jmp offset. */
160
161 static const char *
162 parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
163 CGEN_CPU_DESC cd;
164 const char **strp;
165 int opindex;
166 int reloc;
167 enum cgen_parse_operand_result *type_addr;
168 unsigned long *valuep;
169 {
170 const char *errmsg;
171 bfd_vma value;
172 enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
173
174 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
175 &result_type, &value);
176 if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
177 {
178 /* check value is within 23-bits (remembering that 2-bit shift right will occur) */
179 if (value > 0x7fffff)
180 return _("21-bit offset out of range");
181 }
182 *valuep = (value & 0x7FFFFF);
183 return errmsg;
184 }
185
186 /* Handle high(). */
187
188 static const char *
189 parse_hi16 (cd, strp, opindex, valuep)
190 CGEN_CPU_DESC cd;
191 const char **strp;
192 int opindex;
193 unsigned long *valuep;
194 {
195 if (strncasecmp (*strp, "%hi(", 4) == 0)
196 {
197 enum cgen_parse_operand_result result_type;
198 bfd_vma value;
199 const char *errmsg;
200
201 *strp += 4;
202 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
203 &result_type, &value);
204 if (**strp != ')')
205 return _("missing `)'");
206
207 ++*strp;
208 if (errmsg == NULL
209 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
210 {
211 /* if value has top-bit of %lo on, then it will
212 sign-propagate and so we compensate by adding
213 1 to the resultant %hi value */
214 if (value & 0x8000)
215 value += 0x10000;
216 value >>= 16;
217 }
218 *valuep = value;
219
220 return errmsg;
221 }
222
223 /* we add %uhi in case a user just wants the high 16-bits or is using
224 an insn like ori for %lo which does not sign-propagate */
225 if (strncasecmp (*strp, "%uhi(", 5) == 0)
226 {
227 enum cgen_parse_operand_result result_type;
228 bfd_vma value;
229 const char *errmsg;
230
231 *strp += 5;
232 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
233 &result_type, &value);
234 if (**strp != ')')
235 return _("missing `)'");
236
237 ++*strp;
238 if (errmsg == NULL
239 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
240 {
241 value >>= 16;
242 }
243 *valuep = value;
244
245 return errmsg;
246 }
247
248 return parse_imm (cd, strp, opindex, valuep);
249 }
250
251 /* Handle %lo in a signed context.
252 The signedness of the value doesn't matter to %lo(), but this also
253 handles the case where %lo() isn't present. */
254
255 static const char *
256 parse_lo16 (cd, strp, opindex, valuep)
257 CGEN_CPU_DESC cd;
258 const char **strp;
259 int opindex;
260 long *valuep;
261 {
262 if (strncasecmp (*strp, "%lo(", 4) == 0)
263 {
264 const char *errmsg;
265 enum cgen_parse_operand_result result_type;
266 bfd_vma value;
267
268 *strp += 4;
269 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
270 &result_type, &value);
271 if (**strp != ')')
272 return _("missing `)'");
273 ++*strp;
274 if (errmsg == NULL
275 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
276 value &= 0xffff;
277 *valuep = value;
278 return errmsg;
279 }
280
281 return parse_imm (cd, strp, opindex, valuep);
282 }
283
284 /* Handle %lo in a negated signed context.
285 The signedness of the value doesn't matter to %lo(), but this also
286 handles the case where %lo() isn't present. */
287
288 static const char *
289 parse_mlo16 (cd, strp, opindex, valuep)
290 CGEN_CPU_DESC cd;
291 const char **strp;
292 int opindex;
293 long *valuep;
294 {
295 if (strncasecmp (*strp, "%lo(", 4) == 0)
296 {
297 const char *errmsg;
298 enum cgen_parse_operand_result result_type;
299 bfd_vma value;
300
301 *strp += 4;
302 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
303 &result_type, &value);
304 if (**strp != ')')
305 return _("missing `)'");
306 ++*strp;
307 if (errmsg == NULL
308 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
309 value = (-value) & 0xffff;
310 *valuep = value;
311 return errmsg;
312 }
313
314 return parse_mimm (cd, strp, opindex, valuep);
315 }
316
317 /* -- */
318
319 const char * iq2000_cgen_parse_operand
320 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
321
322 /* Main entry point for operand parsing.
323
324 This function is basically just a big switch statement. Earlier versions
325 used tables to look up the function to use, but
326 - if the table contains both assembler and disassembler functions then
327 the disassembler contains much of the assembler and vice-versa,
328 - there's a lot of inlining possibilities as things grow,
329 - using a switch statement avoids the function call overhead.
330
331 This function could be moved into `parse_insn_normal', but keeping it
332 separate makes clear the interface between `parse_insn_normal' and each of
333 the handlers. */
334
335 const char *
336 iq2000_cgen_parse_operand (cd, opindex, strp, fields)
337 CGEN_CPU_DESC cd;
338 int opindex;
339 const char ** strp;
340 CGEN_FIELDS * fields;
341 {
342 const char * errmsg = NULL;
343 /* Used by scalar operands that still need to be parsed. */
344 long junk ATTRIBUTE_UNUSED;
345
346 switch (opindex)
347 {
348 case IQ2000_OPERAND_BASE :
349 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
350 break;
351 case IQ2000_OPERAND_BASEOFF :
352 {
353 bfd_vma value;
354 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
355 fields->f_imm = value;
356 }
357 break;
358 case IQ2000_OPERAND_BITNUM :
359 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt);
360 break;
361 case IQ2000_OPERAND_BYTECOUNT :
362 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount);
363 break;
364 case IQ2000_OPERAND_CAM_Y :
365 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y);
366 break;
367 case IQ2000_OPERAND_CAM_Z :
368 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z);
369 break;
370 case IQ2000_OPERAND_CM_3FUNC :
371 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func);
372 break;
373 case IQ2000_OPERAND_CM_3Z :
374 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z);
375 break;
376 case IQ2000_OPERAND_CM_4FUNC :
377 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func);
378 break;
379 case IQ2000_OPERAND_CM_4Z :
380 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z);
381 break;
382 case IQ2000_OPERAND_COUNT :
383 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count);
384 break;
385 case IQ2000_OPERAND_EXECODE :
386 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode);
387 break;
388 case IQ2000_OPERAND_HI16 :
389 errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm);
390 break;
391 case IQ2000_OPERAND_IMM :
392 errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm);
393 break;
394 case IQ2000_OPERAND_INDEX :
395 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_INDEX, &fields->f_index);
396 break;
397 case IQ2000_OPERAND_JMPTARG :
398 {
399 bfd_vma value;
400 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
401 fields->f_jtarg = value;
402 }
403 break;
404 case IQ2000_OPERAND_JMPTARGQ10 :
405 {
406 bfd_vma value;
407 errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
408 fields->f_jtargq10 = value;
409 }
410 break;
411 case IQ2000_OPERAND_LO16 :
412 errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm);
413 break;
414 case IQ2000_OPERAND_MASK :
415 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask);
416 break;
417 case IQ2000_OPERAND_MASKL :
418 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl);
419 break;
420 case IQ2000_OPERAND_MASKQ10 :
421 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10);
422 break;
423 case IQ2000_OPERAND_MASKR :
424 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs);
425 break;
426 case IQ2000_OPERAND_MLO16 :
427 errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm);
428 break;
429 case IQ2000_OPERAND_OFFSET :
430 {
431 bfd_vma value;
432 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
433 fields->f_offset = value;
434 }
435 break;
436 case IQ2000_OPERAND_RD :
437 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
438 break;
439 case IQ2000_OPERAND_RD_RS :
440 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
441 break;
442 case IQ2000_OPERAND_RD_RT :
443 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
444 break;
445 case IQ2000_OPERAND_RS :
446 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
447 break;
448 case IQ2000_OPERAND_RT :
449 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
450 break;
451 case IQ2000_OPERAND_RT_RS :
452 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
453 break;
454 case IQ2000_OPERAND_SHAMT :
455 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt);
456 break;
457
458 default :
459 /* xgettext:c-format */
460 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
461 abort ();
462 }
463
464 return errmsg;
465 }
466
467 cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
468 {
469 parse_insn_normal,
470 };
471
472 void
473 iq2000_cgen_init_asm (cd)
474 CGEN_CPU_DESC cd;
475 {
476 iq2000_cgen_init_opcode_table (cd);
477 iq2000_cgen_init_ibld_table (cd);
478 cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
479 cd->parse_operand = iq2000_cgen_parse_operand;
480 #ifdef CGEN_ASM_INIT_HOOK
481 CGEN_ASM_INIT_HOOK
482 #endif
483 }
484
485 \f
486
487 /* Regex construction routine.
488
489 This translates an opcode syntax string into a regex string,
490 by replacing any non-character syntax element (such as an
491 opcode) with the pattern '.*'
492
493 It then compiles the regex and stores it in the opcode, for
494 later use by iq2000_cgen_assemble_insn
495
496 Returns NULL for success, an error message for failure. */
497
498 char *
499 iq2000_cgen_build_insn_regex (insn)
500 CGEN_INSN *insn;
501 {
502 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
503 const char *mnem = CGEN_INSN_MNEMONIC (insn);
504 char rxbuf[CGEN_MAX_RX_ELEMENTS];
505 char *rx = rxbuf;
506 const CGEN_SYNTAX_CHAR_TYPE *syn;
507 int reg_err;
508
509 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
510
511 /* Mnemonics come first in the syntax string. */
512 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
513 return _("missing mnemonic in syntax string");
514 ++syn;
515
516 /* Generate a case sensitive regular expression that emulates case
517 insensitive matching in the "C" locale. We cannot generate a case
518 insensitive regular expression because in Turkish locales, 'i' and 'I'
519 are not equal modulo case conversion. */
520
521 /* Copy the literal mnemonic out of the insn. */
522 for (; *mnem; mnem++)
523 {
524 char c = *mnem;
525
526 if (ISALPHA (c))
527 {
528 *rx++ = '[';
529 *rx++ = TOLOWER (c);
530 *rx++ = TOUPPER (c);
531 *rx++ = ']';
532 }
533 else
534 *rx++ = c;
535 }
536
537 /* Copy any remaining literals from the syntax string into the rx. */
538 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
539 {
540 if (CGEN_SYNTAX_CHAR_P (* syn))
541 {
542 char c = CGEN_SYNTAX_CHAR (* syn);
543
544 switch (c)
545 {
546 /* Escape any regex metacharacters in the syntax. */
547 case '.': case '[': case '\\':
548 case '*': case '^': case '$':
549
550 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
551 case '?': case '{': case '}':
552 case '(': case ')': case '*':
553 case '|': case '+': case ']':
554 #endif
555 *rx++ = '\\';
556 *rx++ = c;
557 break;
558
559 default:
560 if (ISALPHA (c))
561 {
562 *rx++ = '[';
563 *rx++ = TOLOWER (c);
564 *rx++ = TOUPPER (c);
565 *rx++ = ']';
566 }
567 else
568 *rx++ = c;
569 break;
570 }
571 }
572 else
573 {
574 /* Replace non-syntax fields with globs. */
575 *rx++ = '.';
576 *rx++ = '*';
577 }
578 }
579
580 /* Trailing whitespace ok. */
581 * rx++ = '[';
582 * rx++ = ' ';
583 * rx++ = '\t';
584 * rx++ = ']';
585 * rx++ = '*';
586
587 /* But anchor it after that. */
588 * rx++ = '$';
589 * rx = '\0';
590
591 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
592 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
593
594 if (reg_err == 0)
595 return NULL;
596 else
597 {
598 static char msg[80];
599
600 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
601 regfree ((regex_t *) CGEN_INSN_RX (insn));
602 free (CGEN_INSN_RX (insn));
603 (CGEN_INSN_RX (insn)) = NULL;
604 return msg;
605 }
606 }
607
608 \f
609 /* Default insn parser.
610
611 The syntax string is scanned and operands are parsed and stored in FIELDS.
612 Relocs are queued as we go via other callbacks.
613
614 ??? Note that this is currently an all-or-nothing parser. If we fail to
615 parse the instruction, we return 0 and the caller will start over from
616 the beginning. Backtracking will be necessary in parsing subexpressions,
617 but that can be handled there. Not handling backtracking here may get
618 expensive in the case of the m68k. Deal with later.
619
620 Returns NULL for success, an error message for failure. */
621
622 static const char *
623 parse_insn_normal (cd, insn, strp, fields)
624 CGEN_CPU_DESC cd;
625 const CGEN_INSN *insn;
626 const char **strp;
627 CGEN_FIELDS *fields;
628 {
629 /* ??? Runtime added insns not handled yet. */
630 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
631 const char *str = *strp;
632 const char *errmsg;
633 const char *p;
634 const CGEN_SYNTAX_CHAR_TYPE * syn;
635 #ifdef CGEN_MNEMONIC_OPERANDS
636 /* FIXME: wip */
637 int past_opcode_p;
638 #endif
639
640 /* For now we assume the mnemonic is first (there are no leading operands).
641 We can parse it without needing to set up operand parsing.
642 GAS's input scrubber will ensure mnemonics are lowercase, but we may
643 not be called from GAS. */
644 p = CGEN_INSN_MNEMONIC (insn);
645 while (*p && TOLOWER (*p) == TOLOWER (*str))
646 ++p, ++str;
647
648 if (* p)
649 return _("unrecognized instruction");
650
651 #ifndef CGEN_MNEMONIC_OPERANDS
652 if (* str && ! ISSPACE (* str))
653 return _("unrecognized instruction");
654 #endif
655
656 CGEN_INIT_PARSE (cd);
657 cgen_init_parse_operand (cd);
658 #ifdef CGEN_MNEMONIC_OPERANDS
659 past_opcode_p = 0;
660 #endif
661
662 /* We don't check for (*str != '\0') here because we want to parse
663 any trailing fake arguments in the syntax string. */
664 syn = CGEN_SYNTAX_STRING (syntax);
665
666 /* Mnemonics come first for now, ensure valid string. */
667 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
668 abort ();
669
670 ++syn;
671
672 while (* syn != 0)
673 {
674 /* Non operand chars must match exactly. */
675 if (CGEN_SYNTAX_CHAR_P (* syn))
676 {
677 /* FIXME: While we allow for non-GAS callers above, we assume the
678 first char after the mnemonic part is a space. */
679 /* FIXME: We also take inappropriate advantage of the fact that
680 GAS's input scrubber will remove extraneous blanks. */
681 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
682 {
683 #ifdef CGEN_MNEMONIC_OPERANDS
684 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
685 past_opcode_p = 1;
686 #endif
687 ++ syn;
688 ++ str;
689 }
690 else if (*str)
691 {
692 /* Syntax char didn't match. Can't be this insn. */
693 static char msg [80];
694
695 /* xgettext:c-format */
696 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
697 CGEN_SYNTAX_CHAR(*syn), *str);
698 return msg;
699 }
700 else
701 {
702 /* Ran out of input. */
703 static char msg [80];
704
705 /* xgettext:c-format */
706 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
707 CGEN_SYNTAX_CHAR(*syn));
708 return msg;
709 }
710 continue;
711 }
712
713 /* We have an operand of some sort. */
714 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
715 &str, fields);
716 if (errmsg)
717 return errmsg;
718
719 /* Done with this operand, continue with next one. */
720 ++ syn;
721 }
722
723 /* If we're at the end of the syntax string, we're done. */
724 if (* syn == 0)
725 {
726 /* FIXME: For the moment we assume a valid `str' can only contain
727 blanks now. IE: We needn't try again with a longer version of
728 the insn and it is assumed that longer versions of insns appear
729 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
730 while (ISSPACE (* str))
731 ++ str;
732
733 if (* str != '\0')
734 return _("junk at end of line"); /* FIXME: would like to include `str' */
735
736 return NULL;
737 }
738
739 /* We couldn't parse it. */
740 return _("unrecognized instruction");
741 }
742 \f
743 /* Main entry point.
744 This routine is called for each instruction to be assembled.
745 STR points to the insn to be assembled.
746 We assume all necessary tables have been initialized.
747 The assembled instruction, less any fixups, is stored in BUF.
748 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
749 still needs to be converted to target byte order, otherwise BUF is an array
750 of bytes in target byte order.
751 The result is a pointer to the insn's entry in the opcode table,
752 or NULL if an error occured (an error message will have already been
753 printed).
754
755 Note that when processing (non-alias) macro-insns,
756 this function recurses.
757
758 ??? It's possible to make this cpu-independent.
759 One would have to deal with a few minor things.
760 At this point in time doing so would be more of a curiosity than useful
761 [for example this file isn't _that_ big], but keeping the possibility in
762 mind helps keep the design clean. */
763
764 const CGEN_INSN *
765 iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg)
766 CGEN_CPU_DESC cd;
767 const char *str;
768 CGEN_FIELDS *fields;
769 CGEN_INSN_BYTES_PTR buf;
770 char **errmsg;
771 {
772 const char *start;
773 CGEN_INSN_LIST *ilist;
774 const char *parse_errmsg = NULL;
775 const char *insert_errmsg = NULL;
776 int recognized_mnemonic = 0;
777
778 /* Skip leading white space. */
779 while (ISSPACE (* str))
780 ++ str;
781
782 /* The instructions are stored in hashed lists.
783 Get the first in the list. */
784 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
785
786 /* Keep looking until we find a match. */
787 start = str;
788 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
789 {
790 const CGEN_INSN *insn = ilist->insn;
791 recognized_mnemonic = 1;
792
793 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
794 /* Not usually needed as unsupported opcodes
795 shouldn't be in the hash lists. */
796 /* Is this insn supported by the selected cpu? */
797 if (! iq2000_cgen_insn_supported (cd, insn))
798 continue;
799 #endif
800 /* If the RELAX attribute is set, this is an insn that shouldn't be
801 chosen immediately. Instead, it is used during assembler/linker
802 relaxation if possible. */
803 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
804 continue;
805
806 str = start;
807
808 /* Skip this insn if str doesn't look right lexically. */
809 if (CGEN_INSN_RX (insn) != NULL &&
810 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
811 continue;
812
813 /* Allow parse/insert handlers to obtain length of insn. */
814 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
815
816 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
817 if (parse_errmsg != NULL)
818 continue;
819
820 /* ??? 0 is passed for `pc'. */
821 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
822 (bfd_vma) 0);
823 if (insert_errmsg != NULL)
824 continue;
825
826 /* It is up to the caller to actually output the insn and any
827 queued relocs. */
828 return insn;
829 }
830
831 {
832 static char errbuf[150];
833 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
834 const char *tmp_errmsg;
835
836 /* If requesting verbose error messages, use insert_errmsg.
837 Failing that, use parse_errmsg. */
838 tmp_errmsg = (insert_errmsg ? insert_errmsg :
839 parse_errmsg ? parse_errmsg :
840 recognized_mnemonic ?
841 _("unrecognized form of instruction") :
842 _("unrecognized instruction"));
843
844 if (strlen (start) > 50)
845 /* xgettext:c-format */
846 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
847 else
848 /* xgettext:c-format */
849 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
850 #else
851 if (strlen (start) > 50)
852 /* xgettext:c-format */
853 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
854 else
855 /* xgettext:c-format */
856 sprintf (errbuf, _("bad instruction `%.50s'"), start);
857 #endif
858
859 *errmsg = errbuf;
860 return NULL;
861 }
862 }
863 \f
864 #if 0 /* This calls back to GAS which we can't do without care. */
865
866 /* Record each member of OPVALS in the assembler's symbol table.
867 This lets GAS parse registers for us.
868 ??? Interesting idea but not currently used. */
869
870 /* Record each member of OPVALS in the assembler's symbol table.
871 FIXME: Not currently used. */
872
873 void
874 iq2000_cgen_asm_hash_keywords (cd, opvals)
875 CGEN_CPU_DESC cd;
876 CGEN_KEYWORD *opvals;
877 {
878 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
879 const CGEN_KEYWORD_ENTRY * ke;
880
881 while ((ke = cgen_keyword_search_next (& search)) != NULL)
882 {
883 #if 0 /* Unnecessary, should be done in the search routine. */
884 if (! iq2000_cgen_opval_supported (ke))
885 continue;
886 #endif
887 cgen_asm_record_register (cd, ke->name, ke->value);
888 }
889 }
890
891 #endif /* 0 */
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