* cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bit
[deliverable/binutils-gdb.git] / opcodes / iq2000-asm.c
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "iq2000-desc.h"
35 #include "iq2000-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52
53 #include "safe-ctype.h"
54
55 static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
56
57 /* Special check to ensure that instruction exists for given machine. */
58
59 int
60 iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
61 {
62 int machs = cd->machs;
63
64 return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0;
65 }
66
67 static int
68 iq2000_cgen_isa_register (const char **strp)
69 {
70 int len;
71 int ch1, ch2;
72
73 if (**strp == 'r' || **strp == 'R')
74 {
75 len = strlen (*strp);
76 if (len == 2)
77 {
78 ch1 = (*strp)[1];
79 if ('0' <= ch1 && ch1 <= '9')
80 return 1;
81 }
82 else if (len == 3)
83 {
84 ch1 = (*strp)[1];
85 ch2 = (*strp)[2];
86 if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
87 return 1;
88 if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
89 return 1;
90 }
91 }
92 if (**strp == '%'
93 && TOLOWER ((*strp)[1]) != 'l'
94 && TOLOWER ((*strp)[1]) != 'h')
95 return 1;
96 return 0;
97 }
98
99 /* Handle negated literal. */
100
101 static const char *
102 parse_mimm (CGEN_CPU_DESC cd,
103 const char **strp,
104 int opindex,
105 unsigned long *valuep)
106 {
107 const char *errmsg;
108
109 /* Verify this isn't a register. */
110 if (iq2000_cgen_isa_register (strp))
111 errmsg = _("immediate value cannot be register");
112 else
113 {
114 long value;
115
116 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
117 if (errmsg == NULL)
118 {
119 long x = (-value) & 0xFFFF0000;
120
121 if (x != 0 && x != (long) 0xFFFF0000)
122 errmsg = _("immediate value out of range");
123 else
124 *valuep = (-value & 0xFFFF);
125 }
126 }
127 return errmsg;
128 }
129
130 /* Handle signed/unsigned literal. */
131
132 static const char *
133 parse_imm (CGEN_CPU_DESC cd,
134 const char **strp,
135 int opindex,
136 unsigned long *valuep)
137 {
138 const char *errmsg;
139
140 if (iq2000_cgen_isa_register (strp))
141 errmsg = _("immediate value cannot be register");
142 else
143 {
144 long value;
145
146 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
147 if (errmsg == NULL)
148 {
149 long x = value & 0xFFFF0000;
150
151 if (x != 0 && x != (long) 0xFFFF0000)
152 errmsg = _("immediate value out of range");
153 else
154 *valuep = (value & 0xFFFF);
155 }
156 }
157 return errmsg;
158 }
159
160 /* Handle iq10 21-bit jmp offset. */
161
162 static const char *
163 parse_jtargq10 (CGEN_CPU_DESC cd,
164 const char **strp,
165 int opindex,
166 int reloc ATTRIBUTE_UNUSED,
167 enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED,
168 bfd_vma *valuep)
169 {
170 const char *errmsg;
171 bfd_vma value;
172 enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
173
174 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
175 & result_type, & value);
176 if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
177 {
178 /* Check value is within 23-bits
179 (remembering that 2-bit shift right will occur). */
180 if (value > 0x7fffff)
181 return _("21-bit offset out of range");
182 }
183 *valuep = (value & 0x7FFFFF);
184 return errmsg;
185 }
186
187 /* Handle high(). */
188
189 static const char *
190 parse_hi16 (CGEN_CPU_DESC cd,
191 const char **strp,
192 int opindex,
193 unsigned long *valuep)
194 {
195 if (strncasecmp (*strp, "%hi(", 4) == 0)
196 {
197 enum cgen_parse_operand_result result_type;
198 bfd_vma value;
199 const char *errmsg;
200
201 *strp += 4;
202 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
203 & result_type, & value);
204 if (**strp != ')')
205 return MISSING_CLOSING_PARENTHESIS;
206
207 ++*strp;
208 if (errmsg == NULL
209 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
210 {
211 /* If value has top-bit of %lo on, then it will
212 sign-propagate and so we compensate by adding
213 1 to the resultant %hi value. */
214 if (value & 0x8000)
215 value += 0x10000;
216 value >>= 16;
217 value &= 0xffff;
218 }
219 *valuep = value;
220
221 return errmsg;
222 }
223
224 /* We add %uhi in case a user just wants the high 16-bits or is using
225 an insn like ori for %lo which does not sign-propagate. */
226 if (strncasecmp (*strp, "%uhi(", 5) == 0)
227 {
228 enum cgen_parse_operand_result result_type;
229 bfd_vma value;
230 const char *errmsg;
231
232 *strp += 5;
233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
234 & result_type, & value);
235 if (**strp != ')')
236 return MISSING_CLOSING_PARENTHESIS;
237
238 ++*strp;
239 if (errmsg == NULL
240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
241 value >>= 16;
242
243 value &= 0xffff;
244 *valuep = value;
245
246 return errmsg;
247 }
248
249 return parse_imm (cd, strp, opindex, valuep);
250 }
251
252 /* Handle %lo in a signed context.
253 The signedness of the value doesn't matter to %lo(), but this also
254 handles the case where %lo() isn't present. */
255
256 static const char *
257 parse_lo16 (CGEN_CPU_DESC cd,
258 const char **strp,
259 int opindex,
260 unsigned long *valuep)
261 {
262 if (strncasecmp (*strp, "%lo(", 4) == 0)
263 {
264 const char *errmsg;
265 enum cgen_parse_operand_result result_type;
266 bfd_vma value;
267
268 *strp += 4;
269 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
270 & result_type, & value);
271 if (**strp != ')')
272 return MISSING_CLOSING_PARENTHESIS;
273 ++*strp;
274 if (errmsg == NULL
275 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
276 value &= 0xffff;
277 *valuep = value;
278 return errmsg;
279 }
280
281 return parse_imm (cd, strp, opindex, valuep);
282 }
283
284 /* Handle %lo in a negated signed context.
285 The signedness of the value doesn't matter to %lo(), but this also
286 handles the case where %lo() isn't present. */
287
288 static const char *
289 parse_mlo16 (CGEN_CPU_DESC cd,
290 const char **strp,
291 int opindex,
292 unsigned long *valuep)
293 {
294 if (strncasecmp (*strp, "%lo(", 4) == 0)
295 {
296 const char *errmsg;
297 enum cgen_parse_operand_result result_type;
298 bfd_vma value;
299
300 *strp += 4;
301 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
302 & result_type, & value);
303 if (**strp != ')')
304 return MISSING_CLOSING_PARENTHESIS;
305 ++*strp;
306 if (errmsg == NULL
307 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
308 value = (-value) & 0xffff;
309 *valuep = value;
310 return errmsg;
311 }
312
313 return parse_mimm (cd, strp, opindex, valuep);
314 }
315
316 /* -- */
317
318 const char * iq2000_cgen_parse_operand
319 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
320
321 /* Main entry point for operand parsing.
322
323 This function is basically just a big switch statement. Earlier versions
324 used tables to look up the function to use, but
325 - if the table contains both assembler and disassembler functions then
326 the disassembler contains much of the assembler and vice-versa,
327 - there's a lot of inlining possibilities as things grow,
328 - using a switch statement avoids the function call overhead.
329
330 This function could be moved into `parse_insn_normal', but keeping it
331 separate makes clear the interface between `parse_insn_normal' and each of
332 the handlers. */
333
334 const char *
335 iq2000_cgen_parse_operand (CGEN_CPU_DESC cd,
336 int opindex,
337 const char ** strp,
338 CGEN_FIELDS * fields)
339 {
340 const char * errmsg = NULL;
341 /* Used by scalar operands that still need to be parsed. */
342 long junk ATTRIBUTE_UNUSED;
343
344 switch (opindex)
345 {
346 case IQ2000_OPERAND__INDEX :
347 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index));
348 break;
349 case IQ2000_OPERAND_BASE :
350 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
351 break;
352 case IQ2000_OPERAND_BASEOFF :
353 {
354 bfd_vma value = 0;
355 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
356 fields->f_imm = value;
357 }
358 break;
359 case IQ2000_OPERAND_BITNUM :
360 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt));
361 break;
362 case IQ2000_OPERAND_BYTECOUNT :
363 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount));
364 break;
365 case IQ2000_OPERAND_CAM_Y :
366 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y));
367 break;
368 case IQ2000_OPERAND_CAM_Z :
369 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z));
370 break;
371 case IQ2000_OPERAND_CM_3FUNC :
372 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func));
373 break;
374 case IQ2000_OPERAND_CM_3Z :
375 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z));
376 break;
377 case IQ2000_OPERAND_CM_4FUNC :
378 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func));
379 break;
380 case IQ2000_OPERAND_CM_4Z :
381 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z));
382 break;
383 case IQ2000_OPERAND_COUNT :
384 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count));
385 break;
386 case IQ2000_OPERAND_EXECODE :
387 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode));
388 break;
389 case IQ2000_OPERAND_HI16 :
390 errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm));
391 break;
392 case IQ2000_OPERAND_IMM :
393 errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm));
394 break;
395 case IQ2000_OPERAND_JMPTARG :
396 {
397 bfd_vma value = 0;
398 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
399 fields->f_jtarg = value;
400 }
401 break;
402 case IQ2000_OPERAND_JMPTARGQ10 :
403 {
404 bfd_vma value = 0;
405 errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
406 fields->f_jtargq10 = value;
407 }
408 break;
409 case IQ2000_OPERAND_LO16 :
410 errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm));
411 break;
412 case IQ2000_OPERAND_MASK :
413 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask));
414 break;
415 case IQ2000_OPERAND_MASKL :
416 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl));
417 break;
418 case IQ2000_OPERAND_MASKQ10 :
419 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10));
420 break;
421 case IQ2000_OPERAND_MASKR :
422 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs));
423 break;
424 case IQ2000_OPERAND_MLO16 :
425 errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm));
426 break;
427 case IQ2000_OPERAND_OFFSET :
428 {
429 bfd_vma value = 0;
430 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
431 fields->f_offset = value;
432 }
433 break;
434 case IQ2000_OPERAND_RD :
435 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
436 break;
437 case IQ2000_OPERAND_RD_RS :
438 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
439 break;
440 case IQ2000_OPERAND_RD_RT :
441 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
442 break;
443 case IQ2000_OPERAND_RS :
444 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
445 break;
446 case IQ2000_OPERAND_RT :
447 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
448 break;
449 case IQ2000_OPERAND_RT_RS :
450 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
451 break;
452 case IQ2000_OPERAND_SHAMT :
453 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt));
454 break;
455
456 default :
457 /* xgettext:c-format */
458 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
459 abort ();
460 }
461
462 return errmsg;
463 }
464
465 cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
466 {
467 parse_insn_normal,
468 };
469
470 void
471 iq2000_cgen_init_asm (CGEN_CPU_DESC cd)
472 {
473 iq2000_cgen_init_opcode_table (cd);
474 iq2000_cgen_init_ibld_table (cd);
475 cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
476 cd->parse_operand = iq2000_cgen_parse_operand;
477 }
478
479 \f
480
481 /* Regex construction routine.
482
483 This translates an opcode syntax string into a regex string,
484 by replacing any non-character syntax element (such as an
485 opcode) with the pattern '.*'
486
487 It then compiles the regex and stores it in the opcode, for
488 later use by iq2000_cgen_assemble_insn
489
490 Returns NULL for success, an error message for failure. */
491
492 char *
493 iq2000_cgen_build_insn_regex (CGEN_INSN *insn)
494 {
495 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
496 const char *mnem = CGEN_INSN_MNEMONIC (insn);
497 char rxbuf[CGEN_MAX_RX_ELEMENTS];
498 char *rx = rxbuf;
499 const CGEN_SYNTAX_CHAR_TYPE *syn;
500 int reg_err;
501
502 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
503
504 /* Mnemonics come first in the syntax string. */
505 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
506 return _("missing mnemonic in syntax string");
507 ++syn;
508
509 /* Generate a case sensitive regular expression that emulates case
510 insensitive matching in the "C" locale. We cannot generate a case
511 insensitive regular expression because in Turkish locales, 'i' and 'I'
512 are not equal modulo case conversion. */
513
514 /* Copy the literal mnemonic out of the insn. */
515 for (; *mnem; mnem++)
516 {
517 char c = *mnem;
518
519 if (ISALPHA (c))
520 {
521 *rx++ = '[';
522 *rx++ = TOLOWER (c);
523 *rx++ = TOUPPER (c);
524 *rx++ = ']';
525 }
526 else
527 *rx++ = c;
528 }
529
530 /* Copy any remaining literals from the syntax string into the rx. */
531 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
532 {
533 if (CGEN_SYNTAX_CHAR_P (* syn))
534 {
535 char c = CGEN_SYNTAX_CHAR (* syn);
536
537 switch (c)
538 {
539 /* Escape any regex metacharacters in the syntax. */
540 case '.': case '[': case '\\':
541 case '*': case '^': case '$':
542
543 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
544 case '?': case '{': case '}':
545 case '(': case ')': case '*':
546 case '|': case '+': case ']':
547 #endif
548 *rx++ = '\\';
549 *rx++ = c;
550 break;
551
552 default:
553 if (ISALPHA (c))
554 {
555 *rx++ = '[';
556 *rx++ = TOLOWER (c);
557 *rx++ = TOUPPER (c);
558 *rx++ = ']';
559 }
560 else
561 *rx++ = c;
562 break;
563 }
564 }
565 else
566 {
567 /* Replace non-syntax fields with globs. */
568 *rx++ = '.';
569 *rx++ = '*';
570 }
571 }
572
573 /* Trailing whitespace ok. */
574 * rx++ = '[';
575 * rx++ = ' ';
576 * rx++ = '\t';
577 * rx++ = ']';
578 * rx++ = '*';
579
580 /* But anchor it after that. */
581 * rx++ = '$';
582 * rx = '\0';
583
584 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
585 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
586
587 if (reg_err == 0)
588 return NULL;
589 else
590 {
591 static char msg[80];
592
593 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
594 regfree ((regex_t *) CGEN_INSN_RX (insn));
595 free (CGEN_INSN_RX (insn));
596 (CGEN_INSN_RX (insn)) = NULL;
597 return msg;
598 }
599 }
600
601 \f
602 /* Default insn parser.
603
604 The syntax string is scanned and operands are parsed and stored in FIELDS.
605 Relocs are queued as we go via other callbacks.
606
607 ??? Note that this is currently an all-or-nothing parser. If we fail to
608 parse the instruction, we return 0 and the caller will start over from
609 the beginning. Backtracking will be necessary in parsing subexpressions,
610 but that can be handled there. Not handling backtracking here may get
611 expensive in the case of the m68k. Deal with later.
612
613 Returns NULL for success, an error message for failure. */
614
615 static const char *
616 parse_insn_normal (CGEN_CPU_DESC cd,
617 const CGEN_INSN *insn,
618 const char **strp,
619 CGEN_FIELDS *fields)
620 {
621 /* ??? Runtime added insns not handled yet. */
622 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
623 const char *str = *strp;
624 const char *errmsg;
625 const char *p;
626 const CGEN_SYNTAX_CHAR_TYPE * syn;
627 #ifdef CGEN_MNEMONIC_OPERANDS
628 /* FIXME: wip */
629 int past_opcode_p;
630 #endif
631
632 /* For now we assume the mnemonic is first (there are no leading operands).
633 We can parse it without needing to set up operand parsing.
634 GAS's input scrubber will ensure mnemonics are lowercase, but we may
635 not be called from GAS. */
636 p = CGEN_INSN_MNEMONIC (insn);
637 while (*p && TOLOWER (*p) == TOLOWER (*str))
638 ++p, ++str;
639
640 if (* p)
641 return _("unrecognized instruction");
642
643 #ifndef CGEN_MNEMONIC_OPERANDS
644 if (* str && ! ISSPACE (* str))
645 return _("unrecognized instruction");
646 #endif
647
648 CGEN_INIT_PARSE (cd);
649 cgen_init_parse_operand (cd);
650 #ifdef CGEN_MNEMONIC_OPERANDS
651 past_opcode_p = 0;
652 #endif
653
654 /* We don't check for (*str != '\0') here because we want to parse
655 any trailing fake arguments in the syntax string. */
656 syn = CGEN_SYNTAX_STRING (syntax);
657
658 /* Mnemonics come first for now, ensure valid string. */
659 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
660 abort ();
661
662 ++syn;
663
664 while (* syn != 0)
665 {
666 /* Non operand chars must match exactly. */
667 if (CGEN_SYNTAX_CHAR_P (* syn))
668 {
669 /* FIXME: While we allow for non-GAS callers above, we assume the
670 first char after the mnemonic part is a space. */
671 /* FIXME: We also take inappropriate advantage of the fact that
672 GAS's input scrubber will remove extraneous blanks. */
673 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
674 {
675 #ifdef CGEN_MNEMONIC_OPERANDS
676 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
677 past_opcode_p = 1;
678 #endif
679 ++ syn;
680 ++ str;
681 }
682 else if (*str)
683 {
684 /* Syntax char didn't match. Can't be this insn. */
685 static char msg [80];
686
687 /* xgettext:c-format */
688 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
689 CGEN_SYNTAX_CHAR(*syn), *str);
690 return msg;
691 }
692 else
693 {
694 /* Ran out of input. */
695 static char msg [80];
696
697 /* xgettext:c-format */
698 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
699 CGEN_SYNTAX_CHAR(*syn));
700 return msg;
701 }
702 continue;
703 }
704
705 /* We have an operand of some sort. */
706 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
707 &str, fields);
708 if (errmsg)
709 return errmsg;
710
711 /* Done with this operand, continue with next one. */
712 ++ syn;
713 }
714
715 /* If we're at the end of the syntax string, we're done. */
716 if (* syn == 0)
717 {
718 /* FIXME: For the moment we assume a valid `str' can only contain
719 blanks now. IE: We needn't try again with a longer version of
720 the insn and it is assumed that longer versions of insns appear
721 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
722 while (ISSPACE (* str))
723 ++ str;
724
725 if (* str != '\0')
726 return _("junk at end of line"); /* FIXME: would like to include `str' */
727
728 return NULL;
729 }
730
731 /* We couldn't parse it. */
732 return _("unrecognized instruction");
733 }
734 \f
735 /* Main entry point.
736 This routine is called for each instruction to be assembled.
737 STR points to the insn to be assembled.
738 We assume all necessary tables have been initialized.
739 The assembled instruction, less any fixups, is stored in BUF.
740 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
741 still needs to be converted to target byte order, otherwise BUF is an array
742 of bytes in target byte order.
743 The result is a pointer to the insn's entry in the opcode table,
744 or NULL if an error occured (an error message will have already been
745 printed).
746
747 Note that when processing (non-alias) macro-insns,
748 this function recurses.
749
750 ??? It's possible to make this cpu-independent.
751 One would have to deal with a few minor things.
752 At this point in time doing so would be more of a curiosity than useful
753 [for example this file isn't _that_ big], but keeping the possibility in
754 mind helps keep the design clean. */
755
756 const CGEN_INSN *
757 iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd,
758 const char *str,
759 CGEN_FIELDS *fields,
760 CGEN_INSN_BYTES_PTR buf,
761 char **errmsg)
762 {
763 const char *start;
764 CGEN_INSN_LIST *ilist;
765 const char *parse_errmsg = NULL;
766 const char *insert_errmsg = NULL;
767 int recognized_mnemonic = 0;
768
769 /* Skip leading white space. */
770 while (ISSPACE (* str))
771 ++ str;
772
773 /* The instructions are stored in hashed lists.
774 Get the first in the list. */
775 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
776
777 /* Keep looking until we find a match. */
778 start = str;
779 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
780 {
781 const CGEN_INSN *insn = ilist->insn;
782 recognized_mnemonic = 1;
783
784 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
785 /* Not usually needed as unsupported opcodes
786 shouldn't be in the hash lists. */
787 /* Is this insn supported by the selected cpu? */
788 if (! iq2000_cgen_insn_supported (cd, insn))
789 continue;
790 #endif
791 /* If the RELAXED attribute is set, this is an insn that shouldn't be
792 chosen immediately. Instead, it is used during assembler/linker
793 relaxation if possible. */
794 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
795 continue;
796
797 str = start;
798
799 /* Skip this insn if str doesn't look right lexically. */
800 if (CGEN_INSN_RX (insn) != NULL &&
801 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
802 continue;
803
804 /* Allow parse/insert handlers to obtain length of insn. */
805 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
806
807 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
808 if (parse_errmsg != NULL)
809 continue;
810
811 /* ??? 0 is passed for `pc'. */
812 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
813 (bfd_vma) 0);
814 if (insert_errmsg != NULL)
815 continue;
816
817 /* It is up to the caller to actually output the insn and any
818 queued relocs. */
819 return insn;
820 }
821
822 {
823 static char errbuf[150];
824 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
825 const char *tmp_errmsg;
826
827 /* If requesting verbose error messages, use insert_errmsg.
828 Failing that, use parse_errmsg. */
829 tmp_errmsg = (insert_errmsg ? insert_errmsg :
830 parse_errmsg ? parse_errmsg :
831 recognized_mnemonic ?
832 _("unrecognized form of instruction") :
833 _("unrecognized instruction"));
834
835 if (strlen (start) > 50)
836 /* xgettext:c-format */
837 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
838 else
839 /* xgettext:c-format */
840 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
841 #else
842 if (strlen (start) > 50)
843 /* xgettext:c-format */
844 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
845 else
846 /* xgettext:c-format */
847 sprintf (errbuf, _("bad instruction `%.50s'"), start);
848 #endif
849
850 *errmsg = errbuf;
851 return NULL;
852 }
853 }
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