1 /* Instruction opcode table for m32c.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
29 #include "m32c-desc.h"
31 #include "libiberty.h"
35 m32c_asm_hash (const char *mnem
)
39 /* The length of the mnemonic for the Jcnd insns is 1. Hash jsri. */
40 if (mnem
[0] == 'j' && mnem
[1] != 's')
43 /* Don't hash scCND */
44 if (mnem
[0] == 's' && mnem
[1] == 'c')
47 /* Don't hash bmCND */
48 if (mnem
[0] == 'b' && mnem
[1] == 'm')
51 for (h
= 0; *mnem
&& *mnem
!= ' ' && *mnem
!= ':'; ++mnem
)
53 return h
% CGEN_ASM_HASH_SIZE
;
57 /* The hash functions are recorded here to help keep assembler code out of
58 the disassembler and vice versa. */
60 static int asm_hash_insn_p (const CGEN_INSN
*);
61 static unsigned int asm_hash_insn (const char *);
62 static int dis_hash_insn_p (const CGEN_INSN
*);
63 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
65 /* Instruction formats. */
67 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
68 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
70 #define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
72 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
76 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
77 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
80 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
81 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
84 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
85 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
88 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
89 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
92 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
93 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
96 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
97 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
100 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
101 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
104 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
105 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
108 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
109 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
112 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
113 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
116 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
117 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
120 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
121 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
124 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
125 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
128 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
129 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
132 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
133 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
136 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
137 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
140 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
141 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
144 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
145 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
148 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
149 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
152 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
153 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
156 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
157 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
160 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
161 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
164 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
165 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
168 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
169 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
172 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
173 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
176 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
177 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
180 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
181 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
184 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
185 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
188 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
189 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
192 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
193 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
196 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
197 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
200 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
201 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
204 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
205 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
208 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
209 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
212 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
213 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
216 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
220 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
221 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
224 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
225 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
228 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
229 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
232 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
233 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
236 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
237 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
240 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
241 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
244 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
245 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
248 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
249 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
252 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
253 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
256 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
257 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
260 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
261 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
264 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
265 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
268 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
269 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
272 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
273 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
276 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
277 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
280 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
281 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
284 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
285 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
288 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
289 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
292 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
293 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
296 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
297 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
300 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
301 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
304 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
305 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
308 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
309 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
312 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
313 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
316 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
317 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
320 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
321 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
324 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
325 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
328 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
329 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
332 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
333 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
336 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
337 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
340 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
341 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
344 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
345 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
348 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
349 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
352 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
353 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
356 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
357 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
360 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
361 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
364 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
365 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
368 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
369 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
372 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
373 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
376 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
377 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
380 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
381 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
384 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
385 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
388 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
389 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
392 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
393 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
396 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
397 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
400 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
401 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
404 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
405 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
408 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
409 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
412 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
413 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
416 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
417 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
420 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
421 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
424 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
425 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
428 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
429 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
432 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
433 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
436 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
437 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
440 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
441 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
444 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
445 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
448 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
449 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
452 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
453 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
456 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
457 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
460 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
461 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
464 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
465 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
468 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
469 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
472 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
473 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
476 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
477 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
480 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
481 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
484 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
485 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
488 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
489 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
492 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
493 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
496 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
497 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
500 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
501 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
504 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
505 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
508 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
509 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
512 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
513 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
516 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
517 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
520 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
521 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
524 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
525 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
528 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
529 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
532 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
533 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
536 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
537 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
540 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
541 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
544 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
545 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
548 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
549 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
552 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
553 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
556 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
557 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
560 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
561 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
564 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
565 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
568 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
569 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
572 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
573 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
576 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
577 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
580 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
581 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
584 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
585 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
588 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
589 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
592 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
593 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
596 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
597 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
600 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
601 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
604 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
605 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
608 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
609 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
612 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
613 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
616 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
617 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
620 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
621 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
624 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
625 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
628 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
629 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
632 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
633 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
636 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
637 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
640 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
641 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
644 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
645 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
648 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
649 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
652 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
653 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
656 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
657 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
660 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
661 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
664 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
665 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
668 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
669 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
672 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
673 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
676 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
677 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
680 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
681 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
684 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
685 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
688 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
689 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
692 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
693 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
696 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
697 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
700 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI ATTRIBUTE_UNUSED
= {
701 16, 16, 0xfffd, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN_EXT
) }, { F (F_15_1
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
704 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI ATTRIBUTE_UNUSED
= {
705 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
708 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
709 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
712 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
713 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
716 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
717 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
720 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
721 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
724 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
725 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
728 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI ATTRIBUTE_UNUSED
= {
729 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
732 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
733 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
736 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
737 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
740 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
741 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
744 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
745 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
748 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
749 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
752 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
753 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
756 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
757 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
760 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
761 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
764 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
765 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
768 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
769 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
772 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
773 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
776 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
777 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
780 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
781 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
784 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
785 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
788 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
789 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
792 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
793 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
796 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
797 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
800 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
801 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
804 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
805 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
808 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
809 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
812 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
813 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
816 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
817 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
820 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
821 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
824 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
825 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
828 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
829 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
832 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
833 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
836 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
837 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
840 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
841 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
844 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
845 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
848 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
849 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
852 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
853 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
856 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
857 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
860 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
861 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
864 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
865 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
868 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
869 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
872 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
873 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
876 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
877 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
880 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
881 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
884 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
885 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
888 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
889 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
892 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
893 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
896 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
897 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
900 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
901 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
904 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
905 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
908 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
909 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
912 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
913 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
916 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
917 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
920 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
921 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
924 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
925 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
928 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
929 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
932 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
933 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
936 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
937 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
940 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
941 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
944 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
945 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
948 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
949 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
952 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
953 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
956 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
957 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
960 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
961 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
964 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
965 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
968 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
969 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
972 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
973 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
976 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
977 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
980 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
981 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
984 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
985 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
988 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
989 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
992 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
993 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
996 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
997 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1000 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1001 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1004 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1005 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1008 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1009 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1012 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1013 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1016 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1017 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1020 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1021 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1024 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1025 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1028 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1029 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1032 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1033 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1036 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1037 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1040 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1041 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1044 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1045 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1048 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1049 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1052 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1053 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1056 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1057 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1060 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1061 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1064 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1065 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1068 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1069 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1072 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1073 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1076 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1077 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1080 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1081 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1084 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1085 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1088 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1089 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1092 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1093 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1096 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1097 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1100 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1101 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1104 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1105 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1108 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1109 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1112 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1113 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1116 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1117 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1120 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1121 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1124 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1125 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1128 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1129 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1132 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1133 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1136 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1137 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1140 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1141 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1144 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1145 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1148 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1149 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1152 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1153 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1156 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1157 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1160 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1161 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1164 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1165 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1168 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1169 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1172 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1173 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1176 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1177 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1180 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1181 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1184 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1185 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1188 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1189 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1192 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1193 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1196 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1197 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1200 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1201 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1204 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1205 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1208 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1209 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1212 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1213 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1216 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1217 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1220 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1221 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1224 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1225 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1228 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1229 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1232 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1233 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1236 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1237 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1240 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1241 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1244 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1245 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1248 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1249 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1252 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1253 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1256 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1257 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1260 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1261 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1264 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1265 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1268 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1269 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1272 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1273 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1276 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1277 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1280 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1281 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1284 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1285 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1288 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1289 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1292 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1293 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1296 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1297 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1300 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1301 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1304 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1305 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1308 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1309 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1312 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1313 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1316 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1317 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1320 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1321 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1324 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1325 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1328 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1329 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1332 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1333 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1336 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1337 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1340 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1341 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1344 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1345 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1348 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1349 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1352 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1353 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1356 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1357 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1360 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1361 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1364 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1365 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1368 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1369 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1372 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1373 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1376 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1377 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1380 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1381 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1384 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1385 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1388 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1389 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1392 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1393 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1396 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1397 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1400 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1401 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1404 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1405 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1408 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1409 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1412 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1413 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1416 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1417 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1420 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1421 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1424 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1425 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1428 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1429 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1432 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1433 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1436 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1437 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1440 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1441 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1444 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1445 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1448 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1449 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1452 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1453 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1456 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1457 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1460 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1461 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1464 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1465 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1468 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1469 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1472 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1473 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1476 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1477 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1480 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1481 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1484 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1485 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1488 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1489 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1492 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1493 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1496 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1497 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1500 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1501 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1504 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1505 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1508 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1509 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1512 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1513 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1516 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1517 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1520 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1521 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1524 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1525 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1528 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1529 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1532 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1533 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1536 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1537 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1540 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1541 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1544 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1545 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1548 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1549 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1552 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1553 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1556 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1557 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1560 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1561 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1564 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1565 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1568 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1569 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1572 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1573 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1576 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1577 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1580 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1581 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1584 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1585 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1588 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1589 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1592 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1593 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1596 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1597 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1600 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1601 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1604 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1605 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1608 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1609 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1612 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1613 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1616 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1617 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1620 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1621 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1624 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1625 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1628 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1629 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1632 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1633 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1636 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1637 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1640 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1641 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1644 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1645 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1648 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1649 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1652 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1653 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1656 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1657 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1660 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1661 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1664 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1665 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1668 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1669 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1672 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1673 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1676 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1677 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1680 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1681 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1684 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1685 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1688 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1689 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1692 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1693 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1696 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1697 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1700 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1701 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1704 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1705 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1708 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1709 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1712 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1713 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1716 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1717 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1720 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1721 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1724 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1725 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1728 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1729 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1732 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1733 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1736 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1737 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1740 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1741 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1744 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1745 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1748 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1749 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1752 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1753 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1756 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1757 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1760 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1761 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1764 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1765 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1768 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1769 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1772 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1773 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1776 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1777 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1780 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1781 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1784 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1785 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1788 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1789 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1792 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1793 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1796 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1797 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1800 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1801 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1804 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1805 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1808 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1809 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1812 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1813 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1816 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1817 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1820 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1821 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1824 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1825 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1828 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1829 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1832 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1833 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1836 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1837 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1840 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1841 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1844 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1845 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1848 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1849 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1852 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1853 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1856 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1857 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1860 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1861 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1864 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1865 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1868 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1869 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1872 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1873 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1876 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1877 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1880 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1881 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1884 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1885 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1888 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1889 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1892 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1893 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1896 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1897 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1900 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1901 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1904 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1905 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1908 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1909 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1912 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1913 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1916 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1917 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1920 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1921 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1924 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1925 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1928 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1929 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1932 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1933 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1936 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1937 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1940 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1941 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1944 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1945 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1948 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1949 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1952 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1953 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1956 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1957 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1960 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1961 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1964 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1965 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1968 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1969 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1972 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1973 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1976 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1977 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1980 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1981 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1984 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1985 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1988 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1989 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1992 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1993 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1996 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1997 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2000 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2001 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2004 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2005 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2008 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2009 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2012 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2013 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2016 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2017 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2020 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2021 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2024 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2025 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2028 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2029 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2032 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2033 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2036 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2037 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2040 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2041 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2044 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2045 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2048 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2049 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2052 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2053 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2056 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2057 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2060 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2061 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2064 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2065 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2068 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2069 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2072 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2073 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2076 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2077 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2080 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2081 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2084 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2085 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2088 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2089 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2092 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2093 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2096 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2097 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2100 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2101 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2104 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2105 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2108 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2109 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2112 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2113 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2116 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2117 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2120 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2121 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2124 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2125 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2128 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2129 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2132 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2133 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2136 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2137 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2140 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2141 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2144 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2145 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2148 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2149 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2152 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2153 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2156 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2157 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2160 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2161 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2164 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2165 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2168 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2169 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2172 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2173 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2176 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2177 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2180 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2181 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2184 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2185 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2188 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2189 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2192 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2193 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2196 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2197 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2200 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2201 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2204 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2205 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2208 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2209 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2212 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2213 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2216 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2217 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2220 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2221 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2224 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2225 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2228 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2229 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2232 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2233 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2236 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2237 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2240 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2241 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2244 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2245 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2248 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2249 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2252 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2253 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2256 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2257 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2260 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2261 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2264 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2265 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2268 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2269 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2272 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2273 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2276 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2277 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2280 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2281 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2284 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2285 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2288 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2289 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2292 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2293 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2296 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2297 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2300 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2301 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2304 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2305 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2308 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2309 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2312 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2313 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2316 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2317 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2320 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2321 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2324 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2325 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2328 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2329 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2332 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2333 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2336 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2337 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2340 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2341 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2344 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2345 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2348 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2349 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2352 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2353 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2356 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2357 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2360 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2361 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2364 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2365 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2368 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2369 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2372 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2373 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2376 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2377 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2380 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2381 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2384 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2385 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2388 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2389 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2392 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2393 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2396 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2397 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2400 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2401 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2404 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2405 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2408 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2409 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2412 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2413 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2416 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2417 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2420 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2421 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2424 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2425 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2428 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2429 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2432 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2433 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2436 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2437 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2440 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2441 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2444 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2445 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2448 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2449 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2452 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2453 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2456 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2457 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2460 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2461 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2464 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2465 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2468 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2469 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2472 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2473 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2476 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2477 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2480 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2481 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2484 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2485 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2488 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2489 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2492 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2493 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2496 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2497 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2500 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2501 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2504 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2505 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2508 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2509 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2512 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2513 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2516 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2517 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2520 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2521 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2524 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2525 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2528 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2529 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2532 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2533 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2536 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2537 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2540 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2541 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2544 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2545 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2548 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2549 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2552 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2553 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2556 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2557 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2560 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2561 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2564 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2565 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2568 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2569 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2572 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2573 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2576 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2577 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2580 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2581 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2584 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2585 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2588 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2589 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2592 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2593 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2596 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2597 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2600 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2601 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2604 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2605 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2608 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2609 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2612 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2613 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2616 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2617 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2620 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2621 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2624 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2625 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2628 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2629 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2632 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2633 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2636 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2637 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2640 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2641 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2644 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2645 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2648 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2649 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2652 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2653 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2656 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2657 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2660 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2661 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2664 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2665 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2668 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2669 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2672 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2673 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2676 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2677 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2680 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2681 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2684 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2685 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2688 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2689 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2692 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2693 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2696 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2697 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2700 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2701 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2704 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2705 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2708 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2709 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2712 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2713 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2716 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2717 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2720 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2721 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2724 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2725 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2728 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2729 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2732 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2733 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2736 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2737 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2740 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2741 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2744 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2745 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2748 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2749 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2752 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2753 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2756 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2757 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2760 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2761 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2764 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2765 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2768 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2769 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2772 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2773 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2776 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2777 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2780 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2781 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2784 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2785 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2788 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2789 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2792 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2793 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2796 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2797 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2800 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2801 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2804 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2805 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2808 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2809 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2812 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2813 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2816 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2817 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2820 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2821 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2824 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2825 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2828 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2829 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2832 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2833 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2836 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2837 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2840 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2841 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2844 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2845 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2848 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2849 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2852 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2853 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2856 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2857 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2860 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2861 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2864 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2865 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2868 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2869 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2872 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2873 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2876 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
2877 32, 40, 0xff000000, { { F (F_0_2
) }, { F (F_DSP_24_S16
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2880 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
2881 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S16
) }, { 0 } }
2884 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2885 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2888 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2889 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2892 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
2893 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_24_S8
) }, { 0 } }
2896 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
2897 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
2900 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2901 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2904 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2905 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2908 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2909 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2912 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2913 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2916 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2917 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2920 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2921 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2924 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2925 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2928 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2929 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2932 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2933 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2936 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2937 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2940 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2941 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2944 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2945 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2948 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2949 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2952 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2953 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2956 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2957 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2960 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2961 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2964 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2965 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2968 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2969 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2972 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2973 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2976 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2977 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2980 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2981 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2984 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2985 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2988 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2989 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2992 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2993 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2996 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2997 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3000 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3001 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3004 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3005 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3008 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3009 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3012 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3013 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3016 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3017 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3020 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3021 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3024 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3025 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3028 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3029 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3032 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3033 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3036 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3037 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3040 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3041 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3044 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3045 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3048 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3049 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3052 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3053 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3056 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3057 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3060 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3061 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3064 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3065 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3068 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3069 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3072 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3073 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3076 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3077 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3080 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3081 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3084 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3085 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3088 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3089 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3092 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3093 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3096 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3097 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3100 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3101 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3104 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3105 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3108 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3109 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3112 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3113 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3116 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3117 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3120 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3121 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3124 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3125 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3128 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3129 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3132 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3133 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3136 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3137 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3140 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3141 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3144 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3145 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3148 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3149 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3152 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3153 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3156 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3157 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3160 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3161 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3164 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3165 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3168 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3169 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3172 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3173 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3176 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3177 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3180 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3181 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3184 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3185 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3188 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3189 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3192 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3193 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3196 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3197 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3200 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3201 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3204 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3205 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3208 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3209 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3212 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3213 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3216 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3220 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3221 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3224 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3225 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3228 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3229 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3232 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3233 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3236 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3237 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3240 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3241 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3244 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3245 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3248 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3249 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3252 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3253 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3256 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3257 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3260 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3261 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3264 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3265 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3268 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3269 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3272 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3273 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3276 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3277 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3280 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3281 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3284 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3285 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3288 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3289 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3292 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3293 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3296 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3297 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3300 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3301 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3304 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3305 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3308 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3309 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3312 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3313 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3316 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3317 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3320 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3321 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3324 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3325 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3328 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3329 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3332 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3333 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3336 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3337 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3340 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3341 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3344 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3345 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3348 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3349 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3352 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3353 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3356 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3357 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3360 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3361 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3364 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3365 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3368 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3369 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3372 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3373 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3376 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3377 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3380 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3381 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3384 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3385 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3388 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3389 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3392 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3393 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3396 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3397 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3400 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3401 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3404 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3405 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3408 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3409 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3412 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3413 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3416 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3417 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3420 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3421 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3424 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3425 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3428 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3429 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3432 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3433 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3436 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3437 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3440 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3441 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3444 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3445 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3448 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3449 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3452 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3453 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3456 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3457 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3460 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3461 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3464 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3465 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3468 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3469 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3472 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3473 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3476 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3477 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3480 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3481 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3484 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3485 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3488 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3489 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3492 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3493 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3496 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3497 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3500 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3501 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3504 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3505 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3508 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3509 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3512 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3513 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3516 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3517 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3520 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3521 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3524 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3525 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3528 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3529 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3532 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3533 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3536 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3537 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3540 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3541 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3544 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3545 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3548 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3549 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3552 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3553 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3556 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3557 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3560 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3561 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3564 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3565 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3568 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3569 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3572 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3573 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3576 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3577 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3580 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3581 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3584 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3585 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3588 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3589 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3592 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3593 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3596 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3597 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3600 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3601 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3604 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3605 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3608 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3609 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3612 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3613 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3616 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3617 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3620 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3621 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3624 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3625 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3628 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3629 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3632 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3633 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3636 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3637 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3640 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3641 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3644 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3645 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3648 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3649 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3652 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3653 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3656 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3657 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3660 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3661 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3664 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3665 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3668 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3669 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3672 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3673 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3676 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3677 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3680 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3681 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3684 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3685 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3688 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3689 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3692 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3693 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3696 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3697 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3700 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3701 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3704 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3705 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3708 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3709 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3712 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3713 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3716 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3717 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3720 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3721 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3724 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3725 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3728 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3729 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3732 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3733 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3736 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3737 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3740 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3741 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3744 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3745 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3748 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3749 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3752 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3753 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3756 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3757 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3760 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3761 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3764 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3765 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3768 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3769 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3772 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3773 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3776 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3777 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3780 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3781 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3784 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3785 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3788 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3789 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3792 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3793 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3796 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3797 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3800 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3801 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3804 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3805 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3808 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3809 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3812 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3813 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3816 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3817 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3820 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3821 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3824 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3825 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3828 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3829 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3832 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3833 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3836 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3837 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3840 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3841 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3844 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3845 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3848 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3849 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3852 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3853 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3856 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3857 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3860 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3861 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3864 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3865 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3868 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3869 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3872 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3873 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3876 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3877 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3880 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3881 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3884 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3885 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3888 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3889 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3892 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3893 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3896 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3897 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3900 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3901 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3904 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3905 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3908 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3909 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3912 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3913 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3916 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3917 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3920 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3921 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3924 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3925 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3928 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3929 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3932 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3933 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3936 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3937 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3940 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3941 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3944 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3945 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3948 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3949 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3952 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3953 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3956 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3957 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3960 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3961 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3964 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3965 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3968 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3969 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3972 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3973 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3976 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3977 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3980 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3981 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3984 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3985 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3988 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3989 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3992 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3993 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3996 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3997 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4000 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4001 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4004 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4005 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4008 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4009 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4012 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4013 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4016 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4017 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4020 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4021 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4024 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4025 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4028 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4029 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4032 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4033 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4036 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4037 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4040 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4041 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4044 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4045 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4048 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4049 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4052 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4053 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4056 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4057 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4060 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4061 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4064 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4065 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4068 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4069 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4072 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4073 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4076 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4077 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4080 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4081 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4084 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4085 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4088 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4089 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4092 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4093 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4096 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4097 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4100 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4101 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4104 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4105 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4108 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4109 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4112 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4113 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4116 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4117 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4120 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4121 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4124 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4125 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4128 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4129 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4132 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4133 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4136 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4137 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4140 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4141 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4144 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4145 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4148 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4149 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4152 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4153 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4156 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4157 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4160 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4161 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4164 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4165 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4168 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4169 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4172 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4173 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4176 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4177 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4180 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4181 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4184 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4185 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4188 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4189 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4192 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4193 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4196 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4197 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4200 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4201 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4204 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4205 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4208 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4209 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4212 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4213 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4216 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4217 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4220 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4221 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4224 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4225 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4228 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4229 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4232 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4233 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4236 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4237 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4240 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4241 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4244 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4245 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4248 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4249 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4252 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4253 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4256 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4257 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4260 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4261 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4264 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4265 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4268 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4269 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4272 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4273 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4276 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4277 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4280 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4281 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4284 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4285 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4288 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4289 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4292 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4293 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4296 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4297 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4300 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4301 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4304 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4305 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4308 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4309 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4312 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4313 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4316 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4317 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4320 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4321 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4324 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4325 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4328 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4329 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4332 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4333 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4336 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4337 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4340 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4341 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4344 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4345 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4348 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4349 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4352 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4353 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4356 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4357 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4360 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4361 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4364 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4365 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4368 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4369 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4372 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4373 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4376 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4377 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4380 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4381 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4384 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4385 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4388 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4389 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4392 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4393 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4396 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4397 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4400 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4401 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4404 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4405 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4408 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4409 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4412 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4413 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4416 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4417 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4420 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4421 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4424 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4425 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4428 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4429 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4432 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4433 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4436 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4437 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4440 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4441 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4444 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4445 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4448 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4449 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4452 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4453 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4456 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4457 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4460 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4461 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4464 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4465 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4468 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4469 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4472 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4473 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4476 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4477 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4480 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4481 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4484 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4485 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4488 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4489 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4492 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4493 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4496 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4497 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4500 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4501 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4504 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4505 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4508 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4509 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4512 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4513 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4516 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4517 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4520 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4521 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4524 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4525 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4528 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4529 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4532 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4533 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4536 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4537 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4540 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4541 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4544 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4545 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4548 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4549 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4552 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4553 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4556 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4557 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4560 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4561 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4564 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4565 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4568 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4569 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4572 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4573 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4576 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4577 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4580 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4581 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4584 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4585 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4588 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4589 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4592 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4593 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4596 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4597 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4600 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4601 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4604 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4605 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4608 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4609 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4612 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4613 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4616 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4617 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4620 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4621 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4624 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4625 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4628 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4629 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4632 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4633 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4636 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4637 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4640 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4641 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4644 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4645 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4648 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4649 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4652 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4653 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4656 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4657 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4660 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4661 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4664 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4665 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4668 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4669 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4672 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4673 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4676 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4677 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4680 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4681 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4684 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4685 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4688 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4689 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4692 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4693 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4696 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4697 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4700 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4701 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4704 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4705 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4708 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4709 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4712 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4713 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4716 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4717 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4720 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4721 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4724 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4725 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4728 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4729 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4732 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4733 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4736 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4737 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4740 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4741 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4744 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4745 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4748 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4749 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4752 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4753 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4756 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4757 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4760 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4761 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4764 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4765 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4768 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4769 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4772 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
4773 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4776 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
4777 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4780 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4781 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4784 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4785 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_S8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4788 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4789 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U16
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4792 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4793 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4796 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4797 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4800 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4801 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4804 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4805 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4808 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4809 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4812 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4813 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4816 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4817 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4820 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4821 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4824 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4825 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4828 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4829 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4832 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4833 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4836 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4837 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4840 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4841 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4844 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4845 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4848 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4849 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4852 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4853 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4856 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4857 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4860 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4861 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4864 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4865 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4868 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4869 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4872 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4873 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4876 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4877 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4880 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4881 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4884 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4885 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4888 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4889 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4892 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4893 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4896 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4897 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4900 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4901 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4904 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4905 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4908 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4909 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4912 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4913 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4916 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4917 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4920 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4921 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4924 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4925 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4928 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
4929 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4932 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
4933 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4936 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
4937 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4940 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
4941 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4944 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
4945 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4948 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
4949 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4952 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
4953 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4956 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
4957 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4960 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
4961 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4964 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
4965 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4968 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
4969 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4972 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
4973 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4976 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
4977 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4980 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
4981 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4984 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4985 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4988 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
4989 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4992 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4993 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4996 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4997 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5000 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5001 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5004 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5005 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5008 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5009 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5012 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5013 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5016 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5017 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5020 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5021 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5024 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5025 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5028 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5029 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5032 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5033 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5036 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5037 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5040 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5041 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5044 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5045 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5048 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5049 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5052 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5053 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5056 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5057 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5060 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5061 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5064 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5065 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5068 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5069 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5072 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5073 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5076 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5077 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5080 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5081 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5084 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5085 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5088 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5089 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5092 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5093 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5096 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5097 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5100 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5101 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5104 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5105 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5108 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5109 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5112 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5113 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5116 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5117 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5120 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5121 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5124 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5125 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5128 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5129 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5132 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5133 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5136 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5137 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5140 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5141 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5144 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5145 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5148 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5149 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5152 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5153 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5156 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5157 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5160 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5161 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5164 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5165 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5168 static const CGEN_IFMT ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5169 16, 16, 0xff30, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5172 static const CGEN_IFMT ifmt_sccnd_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5173 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5176 static const CGEN_IFMT ifmt_sccnd_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5177 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5180 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5181 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5184 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5185 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5188 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5189 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5192 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5193 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5196 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5197 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5200 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5201 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5204 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5205 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5208 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5209 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5212 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5213 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5216 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5217 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5220 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5221 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5224 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5225 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5228 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5229 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5232 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5233 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5236 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5237 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5240 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5241 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5244 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5245 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5248 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5249 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5252 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5253 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5256 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5257 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5260 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5261 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5264 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5265 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5268 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5269 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5272 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5273 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5276 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5277 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5280 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5281 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5284 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5285 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5288 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5289 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5292 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5293 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5296 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5297 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5300 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5301 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5304 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5305 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5308 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5309 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5312 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5313 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5316 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5317 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5320 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5321 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5324 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5325 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5328 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5329 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5332 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5333 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5336 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5337 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5340 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5341 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5344 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5345 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5348 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5349 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5352 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5353 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5356 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5357 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5360 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5361 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5364 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5365 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5368 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5369 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5372 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5373 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5376 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5377 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5380 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5381 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5384 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5385 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5388 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5389 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5392 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
5393 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5396 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5397 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5400 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5401 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5404 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5405 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5408 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5409 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5412 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5413 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5416 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5417 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5420 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5421 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5424 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5425 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5428 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5429 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5432 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5433 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5436 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5437 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5440 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5441 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5444 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5445 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5448 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5449 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5452 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5453 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5456 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5457 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5460 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5461 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5464 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5465 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5468 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5469 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5472 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5473 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5476 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5477 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5480 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5481 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5484 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5485 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5488 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5489 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5492 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5493 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5496 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5497 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5500 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5501 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5504 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5505 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5508 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5509 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5512 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5513 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5516 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5517 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5520 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5521 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5524 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5525 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5528 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5529 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5532 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5533 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5536 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5537 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5540 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5541 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5544 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5545 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5548 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5549 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5552 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5553 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5556 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5557 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5560 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5561 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5564 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5565 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5568 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5569 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5572 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5573 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5576 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5577 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5580 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5581 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5584 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5585 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5588 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5589 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5592 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI ATTRIBUTE_UNUSED
= {
5593 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5596 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5597 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5600 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5601 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5604 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5605 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5608 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5609 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5612 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5613 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5616 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI ATTRIBUTE_UNUSED
= {
5617 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5620 static const CGEN_IFMT ifmt_push16_b_s_an_An16_push_S_derived ATTRIBUTE_UNUSED
= {
5621 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5624 static const CGEN_IFMT ifmt_push16_b_s_rn_Rn16_push_S_derived ATTRIBUTE_UNUSED
= {
5625 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5628 static const CGEN_IFMT ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived ATTRIBUTE_UNUSED
= {
5629 8, 8, 0xfb, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_5_1
) }, { F (F_4_1
) }, { 0 } }
5632 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5633 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5636 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5637 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5640 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
5641 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5644 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
5645 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5648 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
5649 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5652 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5653 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { 0 } }
5656 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5657 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { 0 } }
5660 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI ATTRIBUTE_UNUSED
= {
5661 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { 0 } }
5664 static const CGEN_IFMT ifmt_mulex_dst32_R3_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5665 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5668 static const CGEN_IFMT ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5669 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5672 static const CGEN_IFMT ifmt_mulu_l_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5673 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5676 static const CGEN_IFMT ifmt_mulu_l_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
5677 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5680 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5681 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5684 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5685 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5688 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5689 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5692 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5693 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5696 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5697 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5700 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5701 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5704 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5705 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5708 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5709 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5712 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5713 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5716 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5717 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5720 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5721 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5724 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5725 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5728 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5729 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5732 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5733 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5736 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5737 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5740 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5741 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5744 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5745 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5748 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5749 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5752 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5753 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5756 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5757 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5760 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5761 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5764 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5765 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5768 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5769 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5772 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5773 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5776 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5777 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5780 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5781 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5784 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5785 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5788 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5789 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5792 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5793 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5796 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5797 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5800 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5801 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5804 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5805 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5808 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5809 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5812 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5813 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5816 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5817 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5820 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5821 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5824 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5825 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5828 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5829 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5832 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5833 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5836 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5837 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5840 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5841 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5844 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5845 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5848 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5849 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5852 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5853 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5856 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5857 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5860 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5861 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5864 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5865 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5868 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5869 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5872 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5873 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5876 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5877 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5880 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5881 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5884 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5885 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5888 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5889 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5892 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5893 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5896 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5897 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5900 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5901 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5904 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5905 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5908 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5909 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5912 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5913 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5916 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5917 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5920 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5921 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5924 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5925 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5928 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5929 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5932 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5933 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5936 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5937 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5940 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5941 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5944 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5945 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5948 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5949 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5952 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5953 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5956 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5957 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5960 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5961 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5964 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5965 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5968 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5969 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5972 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
5973 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5976 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
5977 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5980 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI ATTRIBUTE_UNUSED
= {
5981 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5984 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5985 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5988 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5989 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5992 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5993 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5996 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5997 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6000 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
6001 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6004 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6005 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6008 static const CGEN_IFMT ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
6009 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6012 static const CGEN_IFMT ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
6013 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6016 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6017 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6020 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6021 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6024 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6025 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6028 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6029 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6032 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6033 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6036 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6037 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6040 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6041 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6044 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6045 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6048 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6049 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6052 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6053 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6056 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6057 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6060 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6061 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6064 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6065 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6068 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6069 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6072 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6073 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6076 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6077 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6080 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6081 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6084 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6085 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6088 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6089 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6092 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6093 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6096 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6097 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6100 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6101 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6104 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6105 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6108 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6109 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6112 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6113 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6116 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6117 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6120 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6121 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6124 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6125 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6128 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6129 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6132 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6133 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6136 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6137 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6140 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6141 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6144 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6145 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6148 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6149 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6152 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6153 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6156 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6157 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6160 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6161 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6164 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6165 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6168 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6169 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6172 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6173 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6176 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6177 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6180 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6181 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6184 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6185 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6188 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6189 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6192 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6193 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6196 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6197 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6200 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6201 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6204 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6205 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6208 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6209 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6212 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6213 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6216 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6217 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6220 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6221 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6224 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6225 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6228 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6229 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6232 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6233 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6236 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6237 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6240 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6241 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6244 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6245 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6248 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6249 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6252 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6253 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6256 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6257 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6260 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6261 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6264 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6265 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6268 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6269 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6272 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6273 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6276 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6277 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6280 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6281 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6284 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6285 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6288 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6289 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6292 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6293 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6296 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6297 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6300 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6301 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6304 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6305 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6308 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6309 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6312 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6313 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6316 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6317 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6320 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6321 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6324 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6325 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6328 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6329 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6332 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6333 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6336 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6337 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6340 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6341 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6344 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6345 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6348 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6349 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6352 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6353 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6356 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6357 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6360 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6361 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6364 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6365 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6368 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6369 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6372 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6373 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6376 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6377 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6380 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6381 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6384 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6385 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6388 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6389 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6392 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6393 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6396 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6397 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6400 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6401 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6404 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6405 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6408 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6409 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6412 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6413 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6416 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6417 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6420 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6421 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6424 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6425 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6428 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6429 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6432 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6433 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6436 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6437 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6440 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6441 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6444 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6445 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6448 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6449 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6452 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6453 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6456 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6457 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6460 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6461 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6464 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6465 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6468 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6469 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6472 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6473 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6476 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6477 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6480 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6481 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6484 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6485 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6488 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6489 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6492 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6493 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6496 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6497 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6500 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6501 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6504 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6505 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6508 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6509 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6512 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6513 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6516 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6517 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6520 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6521 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6524 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6525 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6528 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6529 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6532 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6533 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6536 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6537 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6540 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6541 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6544 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6545 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6548 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6549 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6552 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6553 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6556 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6557 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6560 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6561 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6564 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6565 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6568 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6569 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6572 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6573 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6576 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6577 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6580 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6581 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6584 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6585 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6588 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6589 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6592 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6593 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6596 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6597 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6600 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6601 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6604 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6605 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6608 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6609 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6612 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6613 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6616 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6617 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6620 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6621 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6624 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6625 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6628 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6629 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6632 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6633 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6636 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6637 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6640 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6641 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6644 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6645 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6648 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6649 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6652 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6653 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6656 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6657 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6660 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6661 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6664 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6665 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6668 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6669 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6672 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6673 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6676 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6677 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6680 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6681 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6684 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6685 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6688 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6689 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6692 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6693 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6696 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6697 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6700 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6701 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6704 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6705 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6708 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6709 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6712 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6713 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6716 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6717 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6720 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6721 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6724 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6725 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6728 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6729 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6732 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6733 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6736 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6737 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6740 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6741 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6744 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6745 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6748 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6749 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6752 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6753 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6756 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6757 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6760 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6761 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6764 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6765 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6768 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6769 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6772 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6773 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6776 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6777 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6780 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6781 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6784 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6785 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6788 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6789 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6792 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6793 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6796 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6797 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6800 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6801 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6804 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6805 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6808 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6809 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6812 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6813 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6816 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6817 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6820 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6821 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6824 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6825 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6828 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6829 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6832 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6833 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6836 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6837 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6840 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6841 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6844 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6845 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6848 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6849 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6852 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6853 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6856 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6857 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6860 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6861 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6864 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6865 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6868 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6869 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6872 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6873 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6876 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6877 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6880 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6881 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6884 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6885 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6888 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6889 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6892 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6893 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6896 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6897 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6900 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
6901 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6904 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6905 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6908 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6909 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6912 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6913 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6916 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6917 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6920 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6921 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6924 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6925 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6928 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6929 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6932 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6933 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6936 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6937 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6940 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6941 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6944 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6945 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6948 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6949 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6952 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6953 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6956 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6957 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6960 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6961 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6964 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6965 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6968 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6969 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6972 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6973 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6976 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6977 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6980 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6981 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6984 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6985 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6988 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6989 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6992 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6993 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6996 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
6997 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7000 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7001 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7004 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7005 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7008 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7009 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7012 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7013 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7016 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7017 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7020 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7021 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7024 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7025 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7028 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7029 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7032 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7033 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7036 static const CGEN_IFMT ifmt_stc16_src_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7037 16, 16, 0xff8c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7040 static const CGEN_IFMT ifmt_stc16_src_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7041 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7044 static const CGEN_IFMT ifmt_stc16_src_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7045 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7048 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7049 24, 24, 0xff8e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7052 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7053 32, 32, 0xff8e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7056 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7057 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7060 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7061 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7064 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7065 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7068 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7069 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7072 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI ATTRIBUTE_UNUSED
= {
7073 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7076 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI ATTRIBUTE_UNUSED
= {
7077 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7080 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI ATTRIBUTE_UNUSED
= {
7081 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7084 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_An_relative_SI ATTRIBUTE_UNUSED
= {
7085 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7088 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_SB_relative_SI ATTRIBUTE_UNUSED
= {
7089 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7092 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_absolute_SI ATTRIBUTE_UNUSED
= {
7093 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7096 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI ATTRIBUTE_UNUSED
= {
7097 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7100 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
7101 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7104 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
7105 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7108 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7109 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7112 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7113 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7116 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
7117 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7120 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7121 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7124 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7125 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7128 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
7129 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7132 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7133 32, 56, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7136 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7137 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7140 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
7141 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7144 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7145 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7148 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7149 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7152 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7153 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7156 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7157 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7160 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7161 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7164 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7165 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7168 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7169 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7172 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7173 32, 80, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7176 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7177 32, 80, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7180 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7181 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7184 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7185 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7188 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
7189 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7192 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7193 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7196 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7197 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7200 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7201 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7204 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7205 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7208 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7209 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7212 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7213 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7216 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7220 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7221 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7224 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7225 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7228 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed ATTRIBUTE_UNUSED
= {
7229 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7232 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed ATTRIBUTE_UNUSED
= {
7233 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7236 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed ATTRIBUTE_UNUSED
= {
7237 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7240 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7241 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7244 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7245 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7248 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7249 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7252 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7253 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7256 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7257 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7260 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7261 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7264 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7265 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7268 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7269 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7272 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7273 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7276 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7277 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7280 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_direct ATTRIBUTE_UNUSED
= {
7281 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7284 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7285 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7288 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7289 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7292 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7293 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7296 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7297 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7300 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7301 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7304 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7305 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7308 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7309 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7312 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7313 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7316 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7317 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7320 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7321 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7324 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7325 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7328 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7329 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7332 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7333 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7336 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7337 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7340 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7341 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7344 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7345 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7348 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7349 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7352 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7353 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7356 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7357 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7360 static const CGEN_IFMT ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S ATTRIBUTE_UNUSED
= {
7361 16, 16, 0xf800, { { F (F_0_2
) }, { F (F_BITBASE16_U11_S
) }, { F (F_2_2
) }, { F (F_4_1
) }, { 0 } }
7364 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7365 24, 24, 0xff3800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7368 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7369 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7372 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7373 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7376 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7377 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7380 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7381 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7384 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7385 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7388 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7389 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7392 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7393 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7396 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7397 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7400 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7401 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7404 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7405 32, 48, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7408 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7409 32, 48, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7412 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7413 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7416 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct ATTRIBUTE_UNUSED
= {
7417 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7420 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7421 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7424 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7425 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7428 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7429 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7432 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7433 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7436 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7437 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7440 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7441 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7444 static const CGEN_IFMT ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7445 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7448 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7449 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7452 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7453 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7456 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7457 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7460 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7461 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7464 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7465 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7468 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7469 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7472 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7473 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7476 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7477 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7480 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7481 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7484 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7485 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7488 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7489 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7492 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7493 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7496 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7497 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7500 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7501 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7504 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7505 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7508 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7509 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7512 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7513 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7516 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7517 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7520 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7521 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7524 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7525 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7528 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7529 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7532 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7533 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7536 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7537 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7540 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7541 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7544 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7545 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7548 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7549 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7552 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7553 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7556 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7557 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7560 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7561 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7564 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7565 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7568 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7569 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7572 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7573 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7576 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7577 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7580 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
7581 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7584 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7585 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7588 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7589 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7592 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
7593 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7596 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
7597 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7600 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
7601 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7604 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
7605 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7608 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
7609 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7612 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
7613 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7616 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI ATTRIBUTE_UNUSED
= {
7617 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7620 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI ATTRIBUTE_UNUSED
= {
7621 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7624 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7625 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7628 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7629 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7632 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7633 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7636 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7637 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7640 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7641 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7644 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7645 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7648 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7649 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7652 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7653 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7656 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7657 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7660 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7661 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7664 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7665 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7668 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7669 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7672 static const CGEN_IFMT ifmt_add16_wQ_sp ATTRIBUTE_UNUSED
= {
7673 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7676 static const CGEN_IFMT ifmt_add16_b_G_sp ATTRIBUTE_UNUSED
= {
7677 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7680 static const CGEN_IFMT ifmt_add16_w_G_sp ATTRIBUTE_UNUSED
= {
7681 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7684 static const CGEN_IFMT ifmt_add32_l_imm3_Q ATTRIBUTE_UNUSED
= {
7685 8, 8, 0xce, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { 0 } }
7688 static const CGEN_IFMT ifmt_add32_l_imm8_S ATTRIBUTE_UNUSED
= {
7689 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7692 static const CGEN_IFMT ifmt_add32_l_imm16_G ATTRIBUTE_UNUSED
= {
7693 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7696 static const CGEN_IFMT ifmt_dadc16_b_r0h_r0l ATTRIBUTE_UNUSED
= {
7697 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7700 static const CGEN_IFMT ifmt_bm16_c ATTRIBUTE_UNUSED
= {
7701 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { 0 } }
7704 static const CGEN_IFMT ifmt_bm32_c ATTRIBUTE_UNUSED
= {
7705 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_COND32
) }, { F (F_10_3
) }, { 0 } }
7708 static const CGEN_IFMT ifmt_brk16 ATTRIBUTE_UNUSED
= {
7709 8, 8, 0xff, { { F (F_0_4
) }, { F (F_4_4
) }, { 0 } }
7712 static const CGEN_IFMT ifmt_btst_s ATTRIBUTE_UNUSED
= {
7713 24, 24, 0xce0000, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { F (F_DSP_8_U16
) }, { 0 } }
7716 static const CGEN_IFMT ifmt_dec16_w ATTRIBUTE_UNUSED
= {
7717 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_DST16_AN_S
) }, { F (F_5_3
) }, { 0 } }
7720 static const CGEN_IFMT ifmt_div32_b_Imm_16_QI ATTRIBUTE_UNUSED
= {
7721 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7724 static const CGEN_IFMT ifmt_div32_w_Imm_16_HI ATTRIBUTE_UNUSED
= {
7725 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7728 static const CGEN_IFMT ifmt_enter16 ATTRIBUTE_UNUSED
= {
7729 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7732 static const CGEN_IFMT ifmt_enter32 ATTRIBUTE_UNUSED
= {
7733 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U8
) }, { 0 } }
7736 static const CGEN_IFMT ifmt_fclr16 ATTRIBUTE_UNUSED
= {
7737 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7740 static const CGEN_IFMT ifmt_fclr ATTRIBUTE_UNUSED
= {
7741 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7744 static const CGEN_IFMT ifmt_int16 ATTRIBUTE_UNUSED
= {
7745 16, 16, 0xffc0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_2
) }, { F (F_DSP_10_U6
) }, { 0 } }
7748 static const CGEN_IFMT ifmt_int32 ATTRIBUTE_UNUSED
= {
7749 16, 16, 0xff03, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U6
) }, { F (F_14_2
) }, { 0 } }
7752 static const CGEN_IFMT ifmt_jcnd16_5 ATTRIBUTE_UNUSED
= {
7753 16, 16, 0xf800, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_COND16J_5
) }, { F (F_LAB_8_8
) }, { 0 } }
7756 static const CGEN_IFMT ifmt_jcnd16 ATTRIBUTE_UNUSED
= {
7757 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { F (F_LAB_16_8
) }, { 0 } }
7760 static const CGEN_IFMT ifmt_jcnd32 ATTRIBUTE_UNUSED
= {
7761 16, 16, 0x8e00, { { F (F_0_1
) }, { F (F_COND32J
) }, { F (F_4_3
) }, { F (F_LAB_8_8
) }, { 0 } }
7764 static const CGEN_IFMT ifmt_jmp16_s ATTRIBUTE_UNUSED
= {
7765 8, 8, 0xf8, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_LAB_5_3
) }, { 0 } }
7768 static const CGEN_IFMT ifmt_jmp16_b ATTRIBUTE_UNUSED
= {
7769 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_8
) }, { 0 } }
7772 static const CGEN_IFMT ifmt_jmp16_w ATTRIBUTE_UNUSED
= {
7773 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_16
) }, { 0 } }
7776 static const CGEN_IFMT ifmt_jmp16_a ATTRIBUTE_UNUSED
= {
7777 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_24
) }, { 0 } }
7780 static const CGEN_IFMT ifmt_jmps16 ATTRIBUTE_UNUSED
= {
7781 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { 0 } }
7784 static const CGEN_IFMT ifmt_jmp32_s ATTRIBUTE_UNUSED
= {
7785 8, 8, 0xce, { { F (F_0_2
) }, { F (F_LAB32_JMP_S
) }, { F (F_4_3
) }, { 0 } }
7788 static const CGEN_IFMT ifmt_ldc16_imm16 ATTRIBUTE_UNUSED
= {
7789 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7792 static const CGEN_IFMT ifmt_ldc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7793 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { F (F_DSP_16_S16
) }, { 0 } }
7796 static const CGEN_IFMT ifmt_ldc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7797 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7800 static const CGEN_IFMT ifmt_ldc32_imm16_cr3 ATTRIBUTE_UNUSED
= {
7801 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7804 static const CGEN_IFMT ifmt_ldctx16 ATTRIBUTE_UNUSED
= {
7805 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { 0 } }
7808 static const CGEN_IFMT ifmt_ldipl16_imm ATTRIBUTE_UNUSED
= {
7809 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_IMM_13_U3
) }, { 0 } }
7812 static const CGEN_IFMT ifmt_mov16_w_S_imm_a0 ATTRIBUTE_UNUSED
= {
7813 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S16
) }, { 0 } }
7816 static const CGEN_IFMT ifmt_mov32_l_a0 ATTRIBUTE_UNUSED
= {
7817 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S24
) }, { 0 } }
7820 static const CGEN_IFMT ifmt_popc16_imm16 ATTRIBUTE_UNUSED
= {
7821 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7824 static const CGEN_IFMT ifmt_popc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7825 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7828 static const CGEN_IFMT ifmt_popc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7829 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7832 static const CGEN_IFMT ifmt_popm16 ATTRIBUTE_UNUSED
= {
7833 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7836 static const CGEN_IFMT ifmt_pushm16 ATTRIBUTE_UNUSED
= {
7837 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7840 static const CGEN_IFMT ifmt_push32_l_imm ATTRIBUTE_UNUSED
= {
7841 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7844 static const CGEN_IFMT ifmt_sha16_L_imm_r2r0 ATTRIBUTE_UNUSED
= {
7845 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7848 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_r0h ATTRIBUTE_UNUSED
= {
7849 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { 0 } }
7852 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8sb ATTRIBUTE_UNUSED
= {
7853 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7856 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8fb ATTRIBUTE_UNUSED
= {
7857 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7860 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_abs16 ATTRIBUTE_UNUSED
= {
7861 32, 40, 0xff000000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U16
) }, { 0 } }
7866 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
7867 #define A(a) (1 << CGEN_INSN_##a)
7869 #define A(a) (1 << CGEN_INSN_/**/a)
7871 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
7872 #define OPERAND(op) M32C_OPERAND_##op
7874 #define OPERAND(op) M32C_OPERAND_/**/op
7876 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
7877 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
7879 /* The instruction table. */
7881 static const CGEN_OPCODE m32c_cgen_insn_opcode_table
[MAX_INSNS
] =
7883 /* Special null first entry.
7884 A `num' value of zero is thus invalid.
7885 Also, the special `invalid' insn resides here. */
7886 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
7887 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
7890 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7891 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980b00 }
7893 /* extz ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
7896 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7897 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982b00 }
7899 /* extz ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
7902 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7903 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983b00 }
7905 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
7908 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7909 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908b00 }
7911 /* extz ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
7914 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7915 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190ab00 }
7917 /* extz ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
7920 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7921 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190bb00 }
7923 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
7926 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7927 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900b00 }
7929 /* extz ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
7932 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7933 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902b00 }
7935 /* extz ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
7938 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7939 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903b00 }
7941 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
7944 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7945 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920b00 }
7947 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7950 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7951 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922b00 }
7953 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7956 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7957 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923b00 }
7959 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
7962 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7963 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940b00 }
7965 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7968 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7969 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942b00 }
7971 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7974 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7975 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943b00 }
7977 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
7980 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7981 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960b00 }
7983 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
7986 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7987 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962b00 }
7989 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
7992 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7993 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963b00 }
7995 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
7998 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
7999 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928b00 }
8001 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8004 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8005 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192ab00 }
8007 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8010 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8011 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192bb00 }
8013 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8016 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8017 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948b00 }
8019 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8022 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8023 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194ab00 }
8025 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8028 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8029 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194bb00 }
8031 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8034 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8035 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192cb00 }
8037 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8040 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8041 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192eb00 }
8043 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8046 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8047 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192fb00 }
8049 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8052 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8053 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194cb00 }
8055 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8058 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8059 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194eb00 }
8061 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8064 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8065 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194fb00 }
8067 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8070 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8071 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196cb00 }
8073 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8076 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8077 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196eb00 }
8079 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8082 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8083 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196fb00 }
8085 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8088 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8089 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968b00 }
8091 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8094 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8095 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196ab00 }
8097 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8100 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8101 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196bb00 }
8103 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8106 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8107 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80b00 }
8109 /* extz ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8112 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8113 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82b00 }
8115 /* extz ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8118 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8119 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83b00 }
8121 /* extz ${Dsp-24-u16},$Dst32RnPrefixedHI */
8124 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8125 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83b00 }
8127 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8130 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8131 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08b00 }
8133 /* extz ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8136 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8137 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0ab00 }
8139 /* extz ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8142 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8143 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0bb00 }
8145 /* extz ${Dsp-24-u16},$Dst32AnPrefixedHI */
8148 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8149 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0bb00 }
8151 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8154 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8155 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00b00 }
8157 /* extz ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8160 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8161 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02b00 }
8163 /* extz ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8166 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8167 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03b00 }
8169 /* extz ${Dsp-24-u16},[$Dst32AnPrefixed] */
8172 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8173 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03b00 }
8175 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8178 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8179 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20b00 }
8181 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8184 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8185 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22b00 }
8187 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8190 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8191 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23b00 }
8193 /* extz ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8196 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8197 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23b00 }
8199 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
8202 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8203 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40b00 }
8205 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8208 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8209 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42b00 }
8211 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8214 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8215 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43b00 }
8217 /* extz ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
8220 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8221 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43b00 }
8223 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
8226 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8227 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60b00 }
8229 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8232 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8233 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62b00 }
8235 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8238 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8239 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63b00 }
8241 /* extz ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
8244 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8245 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63b00 }
8247 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
8250 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8251 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28b00 }
8253 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
8256 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8257 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2ab00 }
8259 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
8262 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8263 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2bb00 }
8265 /* extz ${Dsp-24-u16},${Dsp-40-u8}[sb] */
8268 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8269 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2bb00 }
8271 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
8274 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8275 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48b00 }
8277 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
8280 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8281 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4ab00 }
8283 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
8286 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8287 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4bb00 }
8289 /* extz ${Dsp-24-u16},${Dsp-40-u16}[sb] */
8292 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8293 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4bb00 }
8295 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
8298 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8299 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2cb00 }
8301 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
8304 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8305 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2eb00 }
8307 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
8310 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8311 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2fb00 }
8313 /* extz ${Dsp-24-u16},${Dsp-40-s8}[fb] */
8316 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8317 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2fb00 }
8319 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
8322 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8323 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4cb00 }
8325 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
8328 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8329 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4eb00 }
8331 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
8334 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8335 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4fb00 }
8337 /* extz ${Dsp-24-u16},${Dsp-40-s16}[fb] */
8340 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8341 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4fb00 }
8343 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
8346 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
8347 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6cb00 }
8349 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16} */
8352 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8353 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6eb00 }
8355 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16} */
8358 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8359 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6fb00 }
8361 /* extz ${Dsp-24-u16},${Dsp-40-u16} */
8364 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
8365 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6fb00 }
8367 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
8370 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
8371 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68b00 }
8373 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24} */
8376 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8377 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6ab00 }
8379 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24} */
8382 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8383 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6bb00 }
8385 /* extz ${Dsp-24-u16},${Dsp-40-u24} */
8388 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
8389 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6bb00 }
8391 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8394 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8395 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80b00 }
8397 /* extz ${Dsp-24-u24},$Dst32RnPrefixedHI */
8400 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8401 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82b00 }
8403 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8406 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8407 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08b00 }
8409 /* extz ${Dsp-24-u24},$Dst32AnPrefixedHI */
8412 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8413 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0ab00 }
8415 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8418 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8419 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00b00 }
8421 /* extz ${Dsp-24-u24},[$Dst32AnPrefixed] */
8424 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8425 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02b00 }
8427 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
8430 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8431 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20b00 }
8433 /* extz ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
8436 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8437 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22b00 }
8439 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
8442 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8443 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40b00 }
8445 /* extz ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
8448 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8449 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42b00 }
8451 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
8454 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8455 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60b00 }
8457 /* extz ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
8460 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8461 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62b00 }
8463 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
8466 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8467 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28b00 }
8469 /* extz ${Dsp-24-u24},${Dsp-48-u8}[sb] */
8472 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8473 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2ab00 }
8475 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
8478 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8479 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48b00 }
8481 /* extz ${Dsp-24-u24},${Dsp-48-u16}[sb] */
8484 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8485 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4ab00 }
8487 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
8490 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8491 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2cb00 }
8493 /* extz ${Dsp-24-u24},${Dsp-48-s8}[fb] */
8496 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8497 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2eb00 }
8499 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
8502 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8503 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4cb00 }
8505 /* extz ${Dsp-24-u24},${Dsp-48-s16}[fb] */
8508 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8509 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4eb00 }
8511 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
8514 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
8515 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6cb00 }
8517 /* extz ${Dsp-24-u24},${Dsp-48-u16} */
8520 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
8521 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6eb00 }
8523 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
8526 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
8527 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68b00 }
8529 /* extz ${Dsp-24-u24},${Dsp-48-u24} */
8532 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
8533 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6ab00 }
8535 /* extz $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
8538 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8539 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c80b }
8541 /* extz [$Src32AnPrefixed],$Dst32RnPrefixedHI */
8544 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8545 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1880b }
8547 /* extz $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
8550 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8551 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c08b }
8553 /* extz [$Src32AnPrefixed],$Dst32AnPrefixedHI */
8556 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8557 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1808b }
8559 /* extz $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
8562 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8563 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c00b }
8565 /* extz [$Src32AnPrefixed],[$Dst32AnPrefixed] */
8568 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8569 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1800b }
8571 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
8574 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8575 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20b00 }
8577 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
8580 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8581 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820b00 }
8583 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
8586 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8587 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40b00 }
8589 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
8592 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8593 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840b00 }
8595 /* extz $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
8598 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8599 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60b00 }
8601 /* extz [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
8604 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8605 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860b00 }
8607 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
8610 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8611 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28b00 }
8613 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
8616 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8617 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828b00 }
8619 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
8622 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8623 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48b00 }
8625 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
8628 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8629 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848b00 }
8631 /* extz $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
8634 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8635 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2cb00 }
8637 /* extz [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
8640 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8641 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182cb00 }
8643 /* extz $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
8646 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8647 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4cb00 }
8649 /* extz [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
8652 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8653 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184cb00 }
8655 /* extz $Src32RnPrefixedQI,${Dsp-24-u16} */
8658 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
8659 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6cb00 }
8661 /* extz [$Src32AnPrefixed],${Dsp-24-u16} */
8664 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
8665 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186cb00 }
8667 /* extz $Src32RnPrefixedQI,${Dsp-24-u24} */
8670 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
8671 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68b00 }
8673 /* extz [$Src32AnPrefixed],${Dsp-24-u24} */
8676 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
8677 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868b00 }
8679 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8682 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8683 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980700 }
8685 /* exts.b ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
8688 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8689 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982700 }
8691 /* exts.b ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
8694 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8695 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983700 }
8697 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8700 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8701 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908700 }
8703 /* exts.b ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
8706 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8707 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190a700 }
8709 /* exts.b ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
8712 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8713 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190b700 }
8715 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8718 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8719 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900700 }
8721 /* exts.b ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
8724 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8725 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902700 }
8727 /* exts.b ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
8730 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8731 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903700 }
8733 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
8736 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8737 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920700 }
8739 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8742 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8743 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922700 }
8745 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8748 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8749 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923700 }
8751 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
8754 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8755 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940700 }
8757 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8760 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8761 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942700 }
8763 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8766 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8767 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943700 }
8769 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
8772 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8773 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960700 }
8775 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8778 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8779 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962700 }
8781 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8784 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8785 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963700 }
8787 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
8790 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8791 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928700 }
8793 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8796 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8797 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192a700 }
8799 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8802 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8803 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192b700 }
8805 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8808 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8809 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948700 }
8811 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8814 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8815 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194a700 }
8817 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8820 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8821 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194b700 }
8823 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8826 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8827 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192c700 }
8829 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8832 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8833 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192e700 }
8835 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8838 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8839 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192f700 }
8841 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8844 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8845 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194c700 }
8847 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8850 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8851 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194e700 }
8853 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8856 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8857 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194f700 }
8859 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8862 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8863 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196c700 }
8865 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8868 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8869 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196e700 }
8871 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8874 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8875 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196f700 }
8877 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8880 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8881 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968700 }
8883 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8886 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8887 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196a700 }
8889 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8892 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8893 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196b700 }
8895 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8898 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8899 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80700 }
8901 /* exts.b ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8904 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8905 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82700 }
8907 /* exts.b ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8910 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8911 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83700 }
8913 /* exts.b ${Dsp-24-u16},$Dst32RnPrefixedHI */
8916 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8917 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83700 }
8919 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8922 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8923 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08700 }
8925 /* exts.b ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8928 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8929 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0a700 }
8931 /* exts.b ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8934 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8935 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0b700 }
8937 /* exts.b ${Dsp-24-u16},$Dst32AnPrefixedHI */
8940 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8941 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0b700 }
8943 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8946 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8947 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00700 }
8949 /* exts.b ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8952 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8953 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02700 }
8955 /* exts.b ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8958 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8959 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03700 }
8961 /* exts.b ${Dsp-24-u16},[$Dst32AnPrefixed] */
8964 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8965 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03700 }
8967 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8970 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8971 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20700 }
8973 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8976 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8977 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22700 }
8979 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8982 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8983 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23700 }
8985 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8988 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8989 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23700 }
8991 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
8994 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8995 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40700 }
8997 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
9000 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9001 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42700 }
9003 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
9006 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9007 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43700 }
9009 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
9012 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9013 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43700 }
9015 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
9018 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9019 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60700 }
9021 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9024 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9025 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62700 }
9027 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9030 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9031 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63700 }
9033 /* exts.b ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
9036 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9037 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63700 }
9039 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
9042 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9043 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28700 }
9045 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
9048 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9049 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2a700 }
9051 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
9054 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9055 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2b700 }
9057 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[sb] */
9060 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9061 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2b700 }
9063 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
9066 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9067 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48700 }
9069 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
9072 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9073 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4a700 }
9075 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
9078 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9079 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4b700 }
9081 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[sb] */
9084 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9085 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4b700 }
9087 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
9090 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9091 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2c700 }
9093 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
9096 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9097 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2e700 }
9099 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
9102 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9103 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2f700 }
9105 /* exts.b ${Dsp-24-u16},${Dsp-40-s8}[fb] */
9108 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9109 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2f700 }
9111 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
9114 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9115 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4c700 }
9117 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
9120 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9121 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4e700 }
9123 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
9126 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9127 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4f700 }
9129 /* exts.b ${Dsp-24-u16},${Dsp-40-s16}[fb] */
9132 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9133 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4f700 }
9135 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
9138 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
9139 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6c700 }
9141 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16} */
9144 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9145 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6e700 }
9147 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16} */
9150 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9151 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6f700 }
9153 /* exts.b ${Dsp-24-u16},${Dsp-40-u16} */
9156 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
9157 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6f700 }
9159 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
9162 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
9163 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68700 }
9165 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24} */
9168 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9169 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6a700 }
9171 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24} */
9174 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9175 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6b700 }
9177 /* exts.b ${Dsp-24-u16},${Dsp-40-u24} */
9180 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
9181 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6b700 }
9183 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
9186 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9187 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80700 }
9189 /* exts.b ${Dsp-24-u24},$Dst32RnPrefixedHI */
9192 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9193 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82700 }
9195 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
9198 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9199 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08700 }
9201 /* exts.b ${Dsp-24-u24},$Dst32AnPrefixedHI */
9204 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9205 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0a700 }
9207 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
9210 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9211 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00700 }
9213 /* exts.b ${Dsp-24-u24},[$Dst32AnPrefixed] */
9216 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9217 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02700 }
9219 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
9222 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9223 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20700 }
9225 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
9228 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9229 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22700 }
9231 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
9234 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9235 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40700 }
9237 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
9240 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9241 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42700 }
9243 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
9246 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9247 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60700 }
9249 /* exts.b ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
9252 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9253 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62700 }
9255 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
9258 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9259 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28700 }
9261 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[sb] */
9264 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9265 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2a700 }
9267 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
9270 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9271 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48700 }
9273 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[sb] */
9276 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9277 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4a700 }
9279 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
9282 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9283 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2c700 }
9285 /* exts.b ${Dsp-24-u24},${Dsp-48-s8}[fb] */
9288 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9289 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2e700 }
9291 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
9294 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9295 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4c700 }
9297 /* exts.b ${Dsp-24-u24},${Dsp-48-s16}[fb] */
9300 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9301 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4e700 }
9303 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
9306 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
9307 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6c700 }
9309 /* exts.b ${Dsp-24-u24},${Dsp-48-u16} */
9312 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
9313 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6e700 }
9315 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
9318 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
9319 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68700 }
9321 /* exts.b ${Dsp-24-u24},${Dsp-48-u24} */
9324 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
9325 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6a700 }
9327 /* exts.b $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
9330 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9331 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c807 }
9333 /* exts.b [$Src32AnPrefixed],$Dst32RnPrefixedHI */
9336 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9337 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x18807 }
9339 /* exts.b $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
9342 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9343 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c087 }
9345 /* exts.b [$Src32AnPrefixed],$Dst32AnPrefixedHI */
9348 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9349 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x18087 }
9351 /* exts.b $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
9354 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9355 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c007 }
9357 /* exts.b [$Src32AnPrefixed],[$Dst32AnPrefixed] */
9360 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9361 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x18007 }
9363 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
9366 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9367 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20700 }
9369 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
9372 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9373 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820700 }
9375 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
9378 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9379 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40700 }
9381 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
9384 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9385 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840700 }
9387 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
9390 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9391 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60700 }
9393 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
9396 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9397 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860700 }
9399 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
9402 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9403 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28700 }
9405 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
9408 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9409 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828700 }
9411 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
9414 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9415 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48700 }
9417 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
9420 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9421 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848700 }
9423 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
9426 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9427 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2c700 }
9429 /* exts.b [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
9432 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9433 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182c700 }
9435 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
9438 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9439 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4c700 }
9441 /* exts.b [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
9444 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9445 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184c700 }
9447 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16} */
9450 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
9451 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6c700 }
9453 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16} */
9456 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9457 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186c700 }
9459 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24} */
9462 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
9463 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68700 }
9465 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24} */
9468 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9469 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868700 }
9471 /* exts.w $Dst32RnExtUnprefixedHI */
9474 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDHI
), 0 } },
9475 & ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI
, { 0xc99e }
9477 /* exts.w $Dst32AnUnprefixedSI */
9480 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
9481 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc19e }
9483 /* exts.w [$Dst32AnExtUnprefixed] */
9486 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9487 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI
, { 0xc11e }
9489 /* exts.w ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9492 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9493 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI
, { 0xc31e00 }
9495 /* exts.w ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9498 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9499 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI
, { 0xc51e0000 }
9501 /* exts.w ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9504 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9505 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI
, { 0xc71e0000 }
9507 /* exts.w ${Dsp-16-u8}[sb] */
9510 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9511 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI
, { 0xc39e00 }
9513 /* exts.w ${Dsp-16-u16}[sb] */
9516 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9517 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI
, { 0xc59e0000 }
9519 /* exts.w ${Dsp-16-s8}[fb] */
9522 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9523 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI
, { 0xc3de00 }
9525 /* exts.w ${Dsp-16-s16}[fb] */
9528 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9529 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI
, { 0xc5de0000 }
9531 /* exts.w ${Dsp-16-u16} */
9534 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9535 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI
, { 0xc7de0000 }
9537 /* exts.w ${Dsp-16-u24} */
9540 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9541 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI
, { 0xc79e0000 }
9543 /* exts.b $Dst32RnExtUnprefixedQI */
9546 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDQI
), 0 } },
9547 & ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI
, { 0xc89e }
9549 /* exts.b $Dst32AnUnprefixedHI */
9552 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
9553 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc09e }
9555 /* exts.b [$Dst32AnExtUnprefixed] */
9558 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9559 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI
, { 0xc01e }
9561 /* exts.b ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9564 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9565 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI
, { 0xc21e00 }
9567 /* exts.b ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9570 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9571 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI
, { 0xc41e0000 }
9573 /* exts.b ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9576 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9577 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI
, { 0xc61e0000 }
9579 /* exts.b ${Dsp-16-u8}[sb] */
9582 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9583 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI
, { 0xc29e00 }
9585 /* exts.b ${Dsp-16-u16}[sb] */
9588 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9589 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI
, { 0xc49e0000 }
9591 /* exts.b ${Dsp-16-s8}[fb] */
9594 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9595 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI
, { 0xc2de00 }
9597 /* exts.b ${Dsp-16-s16}[fb] */
9600 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9601 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI
, { 0xc4de0000 }
9603 /* exts.b ${Dsp-16-u16} */
9606 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9607 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI
, { 0xc6de0000 }
9609 /* exts.b ${Dsp-16-u24} */
9612 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9613 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI
, { 0xc69e0000 }
9615 /* exts.b $Dst16RnExtQI */
9618 { { MNEM
, ' ', OP (DST16RNEXTQI
), 0 } },
9619 & ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI
, { 0x7c60 }
9621 /* exts.b [$Dst16An] */
9624 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
9625 & ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI
, { 0x7c66 }
9627 /* exts.b ${Dsp-16-u8}[$Dst16An] */
9630 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
9631 & ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI
, { 0x7c6800 }
9633 /* exts.b ${Dsp-16-u16}[$Dst16An] */
9636 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
9637 & ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI
, { 0x7c6c0000 }
9639 /* exts.b ${Dsp-16-u8}[sb] */
9642 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9643 & ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI
, { 0x7c6a00 }
9645 /* exts.b ${Dsp-16-u16}[sb] */
9648 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9649 & ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI
, { 0x7c6e0000 }
9651 /* exts.b ${Dsp-16-s8}[fb] */
9654 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9655 & ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI
, { 0x7c6b00 }
9657 /* exts.b ${Dsp-16-u16} */
9660 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9661 & ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI
, { 0x7c6f0000 }
9663 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9667 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990900 }
9669 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
9672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9673 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992900 }
9675 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
9678 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9679 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993900 }
9681 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9685 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918900 }
9687 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
9690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9691 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a900 }
9693 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
9696 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9697 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b900 }
9699 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9703 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910900 }
9705 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
9708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9709 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912900 }
9711 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
9714 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9715 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913900 }
9717 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9721 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93090000 }
9723 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9727 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93290000 }
9729 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9732 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9733 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93390000 }
9735 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9739 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95090000 }
9741 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9745 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95290000 }
9747 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9750 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9751 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95390000 }
9753 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9757 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97090000 }
9759 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9763 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97290000 }
9765 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9768 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9769 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97390000 }
9771 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
9774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9775 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93890000 }
9777 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
9780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9781 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a90000 }
9783 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
9786 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9787 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b90000 }
9789 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
9792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9793 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95890000 }
9795 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
9798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9799 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a90000 }
9801 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
9804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9805 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b90000 }
9807 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
9810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9811 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c90000 }
9813 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
9816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9817 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e90000 }
9819 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
9822 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9823 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f90000 }
9825 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
9828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9829 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c90000 }
9831 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
9834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9835 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e90000 }
9837 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
9840 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9841 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f90000 }
9843 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
9846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9847 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c90000 }
9849 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
9852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9853 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e90000 }
9855 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
9858 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9859 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f90000 }
9861 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
9864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9865 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97890000 }
9867 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
9870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9871 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a90000 }
9873 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
9876 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9877 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b90000 }
9879 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9883 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9090000 }
9885 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
9888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9889 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9290000 }
9891 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
9894 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9895 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9390000 }
9897 /* xor.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
9900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9901 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9390000 }
9903 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9907 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1890000 }
9909 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
9912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9913 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a90000 }
9915 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
9918 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9919 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b90000 }
9921 /* xor.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
9924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9925 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b90000 }
9927 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9931 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1090000 }
9933 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
9936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9937 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1290000 }
9939 /* xor.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
9942 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9943 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1390000 }
9945 /* xor.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
9948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9949 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1390000 }
9951 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9955 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3090000 }
9957 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9961 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3290000 }
9963 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9966 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9967 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3390000 }
9969 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
9972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9973 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3390000 }
9975 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9979 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5090000 }
9981 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9985 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5290000 }
9987 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9990 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9991 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5390000 }
9993 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
9996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9997 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5390000 }
9999 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10003 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7090000 }
10005 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10009 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7290000 }
10011 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10014 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10015 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7390000 }
10017 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10021 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7390000 }
10023 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10027 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3890000 }
10029 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10033 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a90000 }
10035 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10038 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10039 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b90000 }
10041 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10045 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b90000 }
10047 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10051 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5890000 }
10053 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10057 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a90000 }
10059 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10062 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10063 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b90000 }
10065 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10069 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b90000 }
10071 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10075 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c90000 }
10077 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10081 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e90000 }
10083 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10086 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10087 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f90000 }
10089 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10093 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f90000 }
10095 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10099 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c90000 }
10101 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10105 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e90000 }
10107 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10110 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10111 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f90000 }
10113 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10117 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f90000 }
10119 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10123 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c90000 }
10125 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
10128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10129 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e90000 }
10131 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
10134 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10135 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f90000 }
10137 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
10140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
10141 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f90000 }
10143 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
10146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
10147 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7890000 }
10149 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
10152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10153 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a90000 }
10155 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
10158 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10159 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b90000 }
10161 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
10164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
10165 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b90000 }
10167 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10171 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9090000 }
10173 /* xor.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
10176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10177 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9290000 }
10179 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10183 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1890000 }
10185 /* xor.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
10188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10189 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a90000 }
10191 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10195 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1090000 }
10197 /* xor.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
10200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10201 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1290000 }
10203 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
10206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10207 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3090000 }
10209 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
10212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10213 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3290000 }
10215 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
10218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10219 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5090000 }
10221 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
10224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10225 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5290000 }
10227 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
10230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10231 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7090000 }
10233 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
10236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10237 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7290000 }
10239 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
10242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10243 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3890000 }
10245 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
10248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10249 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a90000 }
10251 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
10254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10255 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5890000 }
10257 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
10260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10261 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a90000 }
10263 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
10266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10267 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c90000 }
10269 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
10272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10273 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e90000 }
10275 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
10278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10279 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c90000 }
10281 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
10284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10285 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e90000 }
10287 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
10290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
10291 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c90000 }
10293 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
10296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
10297 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e90000 }
10299 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
10302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
10303 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7890000 }
10305 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
10308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
10309 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a90000 }
10311 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
10314 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10315 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc909 }
10317 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
10320 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10321 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8929 }
10323 /* xor.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10326 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10327 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8909 }
10329 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
10332 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10333 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc189 }
10335 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
10338 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10339 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a9 }
10341 /* xor.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10344 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10345 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8189 }
10347 /* xor.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
10350 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10351 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc109 }
10353 /* xor.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
10356 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10357 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8129 }
10359 /* xor.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10362 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10363 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8109 }
10365 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10368 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10369 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30900 }
10371 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10374 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10375 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832900 }
10377 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
10380 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10381 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830900 }
10383 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10386 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10387 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5090000 }
10389 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10392 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10393 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85290000 }
10395 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
10398 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10399 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85090000 }
10401 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10404 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10405 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7090000 }
10407 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10410 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10411 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87290000 }
10413 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
10416 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10417 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87090000 }
10419 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
10422 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10423 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38900 }
10425 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
10428 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10429 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a900 }
10431 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
10434 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10435 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838900 }
10437 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
10440 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10441 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5890000 }
10443 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
10446 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10447 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a90000 }
10449 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
10452 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10453 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85890000 }
10455 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
10458 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10459 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c900 }
10461 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
10464 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10465 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e900 }
10467 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
10470 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10471 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c900 }
10473 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
10476 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10477 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c90000 }
10479 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
10482 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10483 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e90000 }
10485 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
10488 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10489 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c90000 }
10491 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
10494 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10495 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c90000 }
10497 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
10500 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10501 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e90000 }
10503 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
10506 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
10507 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c90000 }
10509 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
10512 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10513 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7890000 }
10515 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
10518 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10519 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a90000 }
10521 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
10524 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
10525 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87890000 }
10527 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10531 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980900 }
10533 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
10536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10537 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982900 }
10539 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
10542 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10543 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983900 }
10545 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10549 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908900 }
10551 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
10554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10555 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a900 }
10557 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
10560 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10561 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b900 }
10563 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10567 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900900 }
10569 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
10572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10573 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902900 }
10575 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
10578 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10579 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903900 }
10581 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10585 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92090000 }
10587 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10591 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92290000 }
10593 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10596 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10597 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92390000 }
10599 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10603 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94090000 }
10605 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10609 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94290000 }
10611 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10614 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10615 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94390000 }
10617 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10621 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96090000 }
10623 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10627 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96290000 }
10629 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10632 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10633 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96390000 }
10635 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
10638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10639 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92890000 }
10641 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
10644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10645 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a90000 }
10647 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
10650 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10651 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b90000 }
10653 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
10656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10657 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94890000 }
10659 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
10662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10663 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a90000 }
10665 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
10668 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10669 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b90000 }
10671 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
10674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10675 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c90000 }
10677 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
10680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10681 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e90000 }
10683 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
10686 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10687 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f90000 }
10689 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
10692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10693 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c90000 }
10695 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
10698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10699 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e90000 }
10701 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
10704 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10705 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f90000 }
10707 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
10710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
10711 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c90000 }
10713 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
10716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10717 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e90000 }
10719 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
10722 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10723 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f90000 }
10725 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
10728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
10729 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96890000 }
10731 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
10734 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10735 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a90000 }
10737 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
10740 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10741 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b90000 }
10743 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10747 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8090000 }
10749 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
10752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10753 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8290000 }
10755 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
10758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10759 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8390000 }
10761 /* xor.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
10764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10765 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8390000 }
10767 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10771 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0890000 }
10773 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
10776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10777 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a90000 }
10779 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
10782 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10783 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b90000 }
10785 /* xor.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
10788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10789 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b90000 }
10791 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10795 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0090000 }
10797 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
10800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10801 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0290000 }
10803 /* xor.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
10806 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10807 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0390000 }
10809 /* xor.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
10812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10813 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0390000 }
10815 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10819 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2090000 }
10821 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10825 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2290000 }
10827 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10831 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2390000 }
10833 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
10836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10837 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2390000 }
10839 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10843 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4090000 }
10845 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10849 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4290000 }
10851 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10854 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10855 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4390000 }
10857 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
10860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10861 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4390000 }
10863 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10867 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6090000 }
10869 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10873 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6290000 }
10875 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10878 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10879 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6390000 }
10881 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10885 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6390000 }
10887 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10891 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2890000 }
10893 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10897 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a90000 }
10899 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10903 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b90000 }
10905 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10909 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b90000 }
10911 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10915 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4890000 }
10917 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10921 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a90000 }
10923 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10926 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10927 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b90000 }
10929 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10933 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b90000 }
10935 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10939 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c90000 }
10941 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10945 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e90000 }
10947 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10950 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10951 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f90000 }
10953 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10957 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f90000 }
10959 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10963 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c90000 }
10965 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10969 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e90000 }
10971 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10974 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10975 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f90000 }
10977 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10981 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f90000 }
10983 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10987 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c90000 }
10989 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
10992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10993 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e90000 }
10995 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
10998 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10999 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f90000 }
11001 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
11004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11005 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f90000 }
11007 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
11010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
11011 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6890000 }
11013 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
11016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11017 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a90000 }
11019 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
11022 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11023 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b90000 }
11025 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
11028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
11029 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b90000 }
11031 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11035 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8090000 }
11037 /* xor.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
11040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11041 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8290000 }
11043 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11047 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0890000 }
11049 /* xor.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
11052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11053 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a90000 }
11055 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11059 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0090000 }
11061 /* xor.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
11064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11065 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0290000 }
11067 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
11070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11071 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2090000 }
11073 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
11076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11077 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2290000 }
11079 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
11082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11083 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4090000 }
11085 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
11088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11089 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4290000 }
11091 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
11094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11095 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6090000 }
11097 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
11100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11101 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6290000 }
11103 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
11106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11107 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2890000 }
11109 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
11112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11113 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a90000 }
11115 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
11118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11119 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4890000 }
11121 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
11124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11125 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a90000 }
11127 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
11130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11131 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c90000 }
11133 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
11136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11137 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e90000 }
11139 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
11142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11143 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c90000 }
11145 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
11148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11149 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e90000 }
11151 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
11154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
11155 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c90000 }
11157 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
11160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
11161 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e90000 }
11163 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
11166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
11167 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6890000 }
11169 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
11172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
11173 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a90000 }
11175 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
11178 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11179 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc809 }
11181 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
11184 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11185 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8829 }
11187 /* xor.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11190 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11191 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8809 }
11193 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
11196 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11197 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc089 }
11199 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
11202 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11203 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a9 }
11205 /* xor.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11208 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11209 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8089 }
11211 /* xor.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
11214 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11215 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc009 }
11217 /* xor.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
11220 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11221 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8029 }
11223 /* xor.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11226 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11227 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8009 }
11229 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11232 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11233 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20900 }
11235 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11238 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11239 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822900 }
11241 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
11244 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11245 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820900 }
11247 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11250 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11251 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4090000 }
11253 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11256 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11257 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84290000 }
11259 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
11262 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11263 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84090000 }
11265 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11268 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11269 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6090000 }
11271 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11274 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11275 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86290000 }
11277 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
11280 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11281 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86090000 }
11283 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
11286 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11287 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28900 }
11289 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
11292 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11293 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a900 }
11295 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
11298 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11299 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828900 }
11301 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
11304 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11305 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4890000 }
11307 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
11310 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11311 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a90000 }
11313 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
11316 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11317 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84890000 }
11319 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
11322 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11323 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c900 }
11325 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
11328 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11329 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e900 }
11331 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
11334 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11335 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c900 }
11337 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
11340 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11341 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c90000 }
11343 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
11346 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11347 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e90000 }
11349 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
11352 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11353 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c90000 }
11355 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
11358 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11359 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c90000 }
11361 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
11364 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11365 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e90000 }
11367 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
11370 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
11371 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c90000 }
11373 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
11376 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11377 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6890000 }
11379 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
11382 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11383 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a90000 }
11385 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
11388 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
11389 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86890000 }
11391 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
11394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11395 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x898000 }
11397 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
11400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11401 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89a000 }
11403 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
11406 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11407 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x89b000 }
11409 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
11412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11413 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x898400 }
11415 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
11418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11419 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x89a400 }
11421 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
11424 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11425 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x89b400 }
11427 /* xor.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11431 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x898600 }
11433 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11437 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x89a600 }
11439 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11442 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11443 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x89b600 }
11445 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11449 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x89880000 }
11451 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11455 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89a80000 }
11457 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11460 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11461 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89b80000 }
11463 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11467 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x898c0000 }
11469 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11473 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89ac0000 }
11475 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11478 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11479 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89bc0000 }
11481 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11485 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x898a0000 }
11487 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11491 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89aa0000 }
11493 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11496 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11497 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89ba0000 }
11499 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11503 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x898e0000 }
11505 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
11508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11509 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89ae0000 }
11511 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
11514 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11515 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89be0000 }
11517 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
11520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11521 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x898b0000 }
11523 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
11526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11527 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89ab0000 }
11529 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
11532 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11533 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89bb0000 }
11535 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
11538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
11539 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x898f0000 }
11541 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
11544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11545 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x89af0000 }
11547 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
11550 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11551 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x89bf0000 }
11553 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
11556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11557 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x89c00000 }
11559 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
11562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11563 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89e00000 }
11565 /* xor.w${G} ${Dsp-16-u16},$Dst16RnHI */
11568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
11569 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x89f00000 }
11571 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
11574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11575 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x89c40000 }
11577 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
11580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11581 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x89e40000 }
11583 /* xor.w${G} ${Dsp-16-u16},$Dst16AnHI */
11586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
11587 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x89f40000 }
11589 /* xor.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
11592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11593 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x89c60000 }
11595 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
11598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11599 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x89e60000 }
11601 /* xor.w${G} ${Dsp-16-u16},[$Dst16An] */
11604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
11605 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x89f60000 }
11607 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
11610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11611 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x89c80000 }
11613 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
11616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11617 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x89e80000 }
11619 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
11622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11623 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x89f80000 }
11625 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
11628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11629 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x89cc0000 }
11631 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
11634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11635 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x89ec0000 }
11637 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
11640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11641 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x89fc0000 }
11643 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
11646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11647 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ca0000 }
11649 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
11652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11653 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ea0000 }
11655 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
11658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11659 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x89fa0000 }
11661 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
11664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11665 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ce0000 }
11667 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
11670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11671 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ee0000 }
11673 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
11676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11677 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x89fe0000 }
11679 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
11682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11683 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89cb0000 }
11685 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
11688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11689 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89eb0000 }
11691 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
11694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11695 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x89fb0000 }
11697 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
11700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
11701 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x89cf0000 }
11703 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
11706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
11707 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x89ef0000 }
11709 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
11712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11713 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x89ff0000 }
11715 /* xor.w${G} $Src16RnHI,$Dst16RnHI */
11718 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
11719 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8900 }
11721 /* xor.w${G} $Src16AnHI,$Dst16RnHI */
11724 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
11725 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8940 }
11727 /* xor.w${G} [$Src16An],$Dst16RnHI */
11730 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11731 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8960 }
11733 /* xor.w${G} $Src16RnHI,$Dst16AnHI */
11736 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
11737 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8904 }
11739 /* xor.w${G} $Src16AnHI,$Dst16AnHI */
11742 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
11743 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8944 }
11745 /* xor.w${G} [$Src16An],$Dst16AnHI */
11748 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11749 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8964 }
11751 /* xor.w${G} $Src16RnHI,[$Dst16An] */
11754 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11755 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8906 }
11757 /* xor.w${G} $Src16AnHI,[$Dst16An] */
11760 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11761 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8946 }
11763 /* xor.w${G} [$Src16An],[$Dst16An] */
11766 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11767 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8966 }
11769 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
11772 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11773 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x890800 }
11775 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
11778 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11779 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x894800 }
11781 /* xor.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
11784 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11785 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x896800 }
11787 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
11790 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11791 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x890c0000 }
11793 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
11796 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11797 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x894c0000 }
11799 /* xor.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
11802 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11803 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x896c0000 }
11805 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
11808 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11809 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x890a00 }
11811 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
11814 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11815 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x894a00 }
11817 /* xor.w${G} [$Src16An],${Dsp-16-u8}[sb] */
11820 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11821 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x896a00 }
11823 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
11826 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11827 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x890e0000 }
11829 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
11832 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11833 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x894e0000 }
11835 /* xor.w${G} [$Src16An],${Dsp-16-u16}[sb] */
11838 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11839 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x896e0000 }
11841 /* xor.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
11844 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11845 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x890b00 }
11847 /* xor.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
11850 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11851 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x894b00 }
11853 /* xor.w${G} [$Src16An],${Dsp-16-s8}[fb] */
11856 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11857 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x896b00 }
11859 /* xor.w${G} $Src16RnHI,${Dsp-16-u16} */
11862 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
11863 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x890f0000 }
11865 /* xor.w${G} $Src16AnHI,${Dsp-16-u16} */
11868 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
11869 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x894f0000 }
11871 /* xor.w${G} [$Src16An],${Dsp-16-u16} */
11874 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
11875 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x896f0000 }
11877 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
11880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
11881 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x888000 }
11883 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
11886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11887 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88a000 }
11889 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
11892 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11893 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x88b000 }
11895 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
11898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
11899 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x888400 }
11901 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
11904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11905 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x88a400 }
11907 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
11910 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11911 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x88b400 }
11913 /* xor.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11917 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x888600 }
11919 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11923 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x88a600 }
11925 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11928 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11929 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x88b600 }
11931 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11935 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x88880000 }
11937 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11941 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88a80000 }
11943 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11946 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11947 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88b80000 }
11949 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11953 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x888c0000 }
11955 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11959 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88ac0000 }
11961 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11964 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11965 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88bc0000 }
11967 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11971 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x888a0000 }
11973 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11977 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88aa0000 }
11979 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11982 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11983 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88ba0000 }
11985 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11989 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x888e0000 }
11991 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
11994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11995 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88ae0000 }
11997 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
12000 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
12001 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88be0000 }
12003 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
12006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12007 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x888b0000 }
12009 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
12012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12013 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88ab0000 }
12015 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
12018 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12019 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88bb0000 }
12021 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
12024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
12025 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x888f0000 }
12027 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
12030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12031 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x88af0000 }
12033 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
12036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12037 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x88bf0000 }
12039 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
12042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12043 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x88c00000 }
12045 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
12048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
12049 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88e00000 }
12051 /* xor.b${G} ${Dsp-16-u16},$Dst16RnQI */
12054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
12055 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x88f00000 }
12057 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
12060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12061 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x88c40000 }
12063 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
12066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
12067 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x88e40000 }
12069 /* xor.b${G} ${Dsp-16-u16},$Dst16AnQI */
12072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
12073 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x88f40000 }
12075 /* xor.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
12078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12079 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x88c60000 }
12081 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
12084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
12085 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x88e60000 }
12087 /* xor.b${G} ${Dsp-16-u16},[$Dst16An] */
12090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
12091 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x88f60000 }
12093 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
12096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12097 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x88c80000 }
12099 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
12102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12103 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x88e80000 }
12105 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
12108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12109 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x88f80000 }
12111 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
12114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12115 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x88cc0000 }
12117 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
12120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12121 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x88ec0000 }
12123 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
12126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12127 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x88fc0000 }
12129 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
12132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12133 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ca0000 }
12135 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
12138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12139 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ea0000 }
12141 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
12144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12145 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x88fa0000 }
12147 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
12150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12151 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ce0000 }
12153 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
12156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12157 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ee0000 }
12159 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
12162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12163 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x88fe0000 }
12165 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
12168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12169 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88cb0000 }
12171 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
12174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12175 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88eb0000 }
12177 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
12180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12181 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x88fb0000 }
12183 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
12186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
12187 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x88cf0000 }
12189 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
12192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
12193 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x88ef0000 }
12195 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
12198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
12199 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x88ff0000 }
12201 /* xor.b${G} $Src16RnQI,$Dst16RnQI */
12204 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
12205 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8800 }
12207 /* xor.b${G} $Src16AnQI,$Dst16RnQI */
12210 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
12211 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8840 }
12213 /* xor.b${G} [$Src16An],$Dst16RnQI */
12216 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12217 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8860 }
12219 /* xor.b${G} $Src16RnQI,$Dst16AnQI */
12222 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
12223 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8804 }
12225 /* xor.b${G} $Src16AnQI,$Dst16AnQI */
12228 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
12229 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8844 }
12231 /* xor.b${G} [$Src16An],$Dst16AnQI */
12234 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12235 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8864 }
12237 /* xor.b${G} $Src16RnQI,[$Dst16An] */
12240 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12241 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8806 }
12243 /* xor.b${G} $Src16AnQI,[$Dst16An] */
12246 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12247 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8846 }
12249 /* xor.b${G} [$Src16An],[$Dst16An] */
12252 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12253 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8866 }
12255 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
12258 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12259 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x880800 }
12261 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
12264 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12265 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x884800 }
12267 /* xor.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
12270 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12271 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x886800 }
12273 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
12276 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12277 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x880c0000 }
12279 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
12282 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12283 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x884c0000 }
12285 /* xor.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
12288 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12289 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x886c0000 }
12291 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
12294 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12295 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x880a00 }
12297 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
12300 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12301 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x884a00 }
12303 /* xor.b${G} [$Src16An],${Dsp-16-u8}[sb] */
12306 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12307 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x886a00 }
12309 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
12312 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12313 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x880e0000 }
12315 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
12318 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12319 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x884e0000 }
12321 /* xor.b${G} [$Src16An],${Dsp-16-u16}[sb] */
12324 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12325 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x886e0000 }
12327 /* xor.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
12330 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12331 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x880b00 }
12333 /* xor.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
12336 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12337 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x884b00 }
12339 /* xor.b${G} [$Src16An],${Dsp-16-s8}[fb] */
12342 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12343 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x886b00 }
12345 /* xor.b${G} $Src16RnQI,${Dsp-16-u16} */
12348 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
12349 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x880f0000 }
12351 /* xor.b${G} $Src16AnQI,${Dsp-16-u16} */
12354 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
12355 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x884f0000 }
12357 /* xor.b${G} [$Src16An],${Dsp-16-u16} */
12360 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
12361 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x886f0000 }
12363 /* xor.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
12366 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12367 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990e0000 }
12369 /* xor.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
12372 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12373 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918e0000 }
12375 /* xor.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
12378 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12379 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910e0000 }
12381 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12384 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12385 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930e0000 }
12387 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12390 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12391 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938e0000 }
12393 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12396 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12397 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ce0000 }
12399 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12402 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12403 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950e0000 }
12405 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12408 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12409 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958e0000 }
12411 /* xor.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
12414 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12415 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ce0000 }
12417 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12420 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12421 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ce0000 }
12423 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12426 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12427 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970e0000 }
12429 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24} */
12432 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
12433 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978e0000 }
12435 /* xor.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
12438 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
12439 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980e00 }
12441 /* xor.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
12444 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
12445 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908e00 }
12447 /* xor.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
12450 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12451 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900e00 }
12453 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12456 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12457 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920e0000 }
12459 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12462 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12463 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928e0000 }
12465 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12468 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12469 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ce0000 }
12471 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12474 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12475 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940e0000 }
12477 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12480 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12481 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948e0000 }
12483 /* xor.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
12486 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12487 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ce0000 }
12489 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12492 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12493 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ce0000 }
12495 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12498 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12499 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960e0000 }
12501 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24} */
12504 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
12505 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968e0000 }
12507 /* xor.w${G} #${Imm-16-HI},$Dst16RnHI */
12510 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
12511 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77100000 }
12513 /* xor.w${G} #${Imm-16-HI},$Dst16AnHI */
12516 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
12517 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77140000 }
12519 /* xor.w${G} #${Imm-16-HI},[$Dst16An] */
12522 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
12523 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77160000 }
12525 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
12528 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12529 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77180000 }
12531 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12534 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12535 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x771a0000 }
12537 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12540 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12541 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x771b0000 }
12543 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
12546 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12547 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x771c0000 }
12549 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12552 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12553 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x771e0000 }
12555 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12558 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12559 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x771f0000 }
12561 /* xor.b${G} #${Imm-16-QI},$Dst16RnQI */
12564 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
12565 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x761000 }
12567 /* xor.b${G} #${Imm-16-QI},$Dst16AnQI */
12570 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
12571 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x761400 }
12573 /* xor.b${G} #${Imm-16-QI},[$Dst16An] */
12576 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
12577 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x761600 }
12579 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
12582 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12583 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76180000 }
12585 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12588 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12589 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x761a0000 }
12591 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12594 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12595 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x761b0000 }
12597 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
12600 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12601 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x761c0000 }
12603 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12606 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12607 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x761e0000 }
12609 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12612 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12613 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x761f0000 }
12615 /* xchg.w r3,$Dst32RnUnprefixedHI */
12618 { { MNEM
, ' ', 'r', '3', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12619 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90d }
12621 /* xchg.w r3,$Dst32AnUnprefixedHI */
12624 { { MNEM
, ' ', 'r', '3', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12625 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18d }
12627 /* xchg.w r3,[$Dst32AnUnprefixed] */
12630 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12631 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10d }
12633 /* xchg.w r3,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12636 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12637 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30d00 }
12639 /* xchg.w r3,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12642 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12643 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50d0000 }
12645 /* xchg.w r3,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12648 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12649 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70d0000 }
12651 /* xchg.w r3,${Dsp-16-u8}[sb] */
12654 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12655 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38d00 }
12657 /* xchg.w r3,${Dsp-16-u16}[sb] */
12660 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12661 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58d0000 }
12663 /* xchg.w r3,${Dsp-16-s8}[fb] */
12666 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12667 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cd00 }
12669 /* xchg.w r3,${Dsp-16-s16}[fb] */
12672 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12673 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cd0000 }
12675 /* xchg.w r3,${Dsp-16-u16} */
12678 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
12679 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cd0000 }
12681 /* xchg.w r3,${Dsp-16-u24} */
12684 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), 0 } },
12685 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78d0000 }
12687 /* xchg.w r2,$Dst32RnUnprefixedHI */
12690 { { MNEM
, ' ', 'r', '2', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12691 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90c }
12693 /* xchg.w r2,$Dst32AnUnprefixedHI */
12696 { { MNEM
, ' ', 'r', '2', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12697 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18c }
12699 /* xchg.w r2,[$Dst32AnUnprefixed] */
12702 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12703 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10c }
12705 /* xchg.w r2,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12708 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12709 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30c00 }
12711 /* xchg.w r2,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12714 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12715 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50c0000 }
12717 /* xchg.w r2,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12720 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12721 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70c0000 }
12723 /* xchg.w r2,${Dsp-16-u8}[sb] */
12726 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12727 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38c00 }
12729 /* xchg.w r2,${Dsp-16-u16}[sb] */
12732 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12733 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58c0000 }
12735 /* xchg.w r2,${Dsp-16-s8}[fb] */
12738 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12739 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cc00 }
12741 /* xchg.w r2,${Dsp-16-s16}[fb] */
12744 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12745 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cc0000 }
12747 /* xchg.w r2,${Dsp-16-u16} */
12750 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
12751 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cc0000 }
12753 /* xchg.w r2,${Dsp-16-u24} */
12756 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), 0 } },
12757 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78c0000 }
12759 /* xchg.w a1,$Dst32RnUnprefixedHI */
12762 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12763 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90b }
12765 /* xchg.w a1,$Dst32AnUnprefixedHI */
12768 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12769 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18b }
12771 /* xchg.w a1,[$Dst32AnUnprefixed] */
12774 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12775 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10b }
12777 /* xchg.w a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12780 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12781 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30b00 }
12783 /* xchg.w a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12786 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12787 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50b0000 }
12789 /* xchg.w a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12792 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12793 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70b0000 }
12795 /* xchg.w a1,${Dsp-16-u8}[sb] */
12798 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12799 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38b00 }
12801 /* xchg.w a1,${Dsp-16-u16}[sb] */
12804 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12805 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58b0000 }
12807 /* xchg.w a1,${Dsp-16-s8}[fb] */
12810 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12811 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cb00 }
12813 /* xchg.w a1,${Dsp-16-s16}[fb] */
12816 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12817 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cb0000 }
12819 /* xchg.w a1,${Dsp-16-u16} */
12822 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
12823 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cb0000 }
12825 /* xchg.w a1,${Dsp-16-u24} */
12828 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
12829 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78b0000 }
12831 /* xchg.w a0,$Dst32RnUnprefixedHI */
12834 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12835 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90a }
12837 /* xchg.w a0,$Dst32AnUnprefixedHI */
12840 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12841 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18a }
12843 /* xchg.w a0,[$Dst32AnUnprefixed] */
12846 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12847 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10a }
12849 /* xchg.w a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12852 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12853 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30a00 }
12855 /* xchg.w a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12858 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12859 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50a0000 }
12861 /* xchg.w a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12864 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12865 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70a0000 }
12867 /* xchg.w a0,${Dsp-16-u8}[sb] */
12870 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12871 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38a00 }
12873 /* xchg.w a0,${Dsp-16-u16}[sb] */
12876 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12877 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58a0000 }
12879 /* xchg.w a0,${Dsp-16-s8}[fb] */
12882 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12883 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3ca00 }
12885 /* xchg.w a0,${Dsp-16-s16}[fb] */
12888 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12889 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5ca0000 }
12891 /* xchg.w a0,${Dsp-16-u16} */
12894 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
12895 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7ca0000 }
12897 /* xchg.w a0,${Dsp-16-u24} */
12900 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
12901 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78a0000 }
12903 /* xchg.w r1,$Dst32RnUnprefixedHI */
12906 { { MNEM
, ' ', 'r', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12907 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd909 }
12909 /* xchg.w r1,$Dst32AnUnprefixedHI */
12912 { { MNEM
, ' ', 'r', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12913 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd189 }
12915 /* xchg.w r1,[$Dst32AnUnprefixed] */
12918 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12919 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd109 }
12921 /* xchg.w r1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12924 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12925 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30900 }
12927 /* xchg.w r1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12930 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12931 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5090000 }
12933 /* xchg.w r1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12936 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12937 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7090000 }
12939 /* xchg.w r1,${Dsp-16-u8}[sb] */
12942 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12943 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38900 }
12945 /* xchg.w r1,${Dsp-16-u16}[sb] */
12948 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12949 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5890000 }
12951 /* xchg.w r1,${Dsp-16-s8}[fb] */
12954 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12955 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c900 }
12957 /* xchg.w r1,${Dsp-16-s16}[fb] */
12960 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12961 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c90000 }
12963 /* xchg.w r1,${Dsp-16-u16} */
12966 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
12967 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c90000 }
12969 /* xchg.w r1,${Dsp-16-u24} */
12972 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), 0 } },
12973 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7890000 }
12975 /* xchg.w r0,$Dst32RnUnprefixedHI */
12978 { { MNEM
, ' ', 'r', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12979 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd908 }
12981 /* xchg.w r0,$Dst32AnUnprefixedHI */
12984 { { MNEM
, ' ', 'r', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12985 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd188 }
12987 /* xchg.w r0,[$Dst32AnUnprefixed] */
12990 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12991 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd108 }
12993 /* xchg.w r0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12996 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12997 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30800 }
12999 /* xchg.w r0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13002 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13003 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5080000 }
13005 /* xchg.w r0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13008 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13009 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7080000 }
13011 /* xchg.w r0,${Dsp-16-u8}[sb] */
13014 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13015 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38800 }
13017 /* xchg.w r0,${Dsp-16-u16}[sb] */
13020 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13021 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5880000 }
13023 /* xchg.w r0,${Dsp-16-s8}[fb] */
13026 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13027 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c800 }
13029 /* xchg.w r0,${Dsp-16-s16}[fb] */
13032 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13033 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c80000 }
13035 /* xchg.w r0,${Dsp-16-u16} */
13038 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13039 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c80000 }
13041 /* xchg.w r0,${Dsp-16-u24} */
13044 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), 0 } },
13045 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7880000 }
13047 /* xchg.b r1h,$Dst32RnUnprefixedQI */
13050 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13051 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80d }
13053 /* xchg.b r1h,$Dst32AnUnprefixedQI */
13056 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13057 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08d }
13059 /* xchg.b r1h,[$Dst32AnUnprefixed] */
13062 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13063 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00d }
13065 /* xchg.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13068 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13069 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20d00 }
13071 /* xchg.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13074 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13075 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40d0000 }
13077 /* xchg.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13080 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13081 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60d0000 }
13083 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13086 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13087 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28d00 }
13089 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13092 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13093 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48d0000 }
13095 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13098 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13099 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cd00 }
13101 /* xchg.b r1h,${Dsp-16-s16}[fb] */
13104 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13105 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cd0000 }
13107 /* xchg.b r1h,${Dsp-16-u16} */
13110 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13111 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cd0000 }
13113 /* xchg.b r1h,${Dsp-16-u24} */
13116 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
13117 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68d0000 }
13119 /* xchg.b r0h,$Dst32RnUnprefixedQI */
13122 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13123 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80c }
13125 /* xchg.b r0h,$Dst32AnUnprefixedQI */
13128 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13129 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08c }
13131 /* xchg.b r0h,[$Dst32AnUnprefixed] */
13134 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13135 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00c }
13137 /* xchg.b r0h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13140 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13141 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20c00 }
13143 /* xchg.b r0h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13146 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13147 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40c0000 }
13149 /* xchg.b r0h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13152 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13153 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60c0000 }
13155 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13158 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13159 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28c00 }
13161 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13164 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13165 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48c0000 }
13167 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13170 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13171 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cc00 }
13173 /* xchg.b r0h,${Dsp-16-s16}[fb] */
13176 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13177 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cc0000 }
13179 /* xchg.b r0h,${Dsp-16-u16} */
13182 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13183 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cc0000 }
13185 /* xchg.b r0h,${Dsp-16-u24} */
13188 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), 0 } },
13189 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68c0000 }
13191 /* xchg.b a1,$Dst32RnUnprefixedQI */
13194 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13195 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80b }
13197 /* xchg.b a1,$Dst32AnUnprefixedQI */
13200 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13201 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08b }
13203 /* xchg.b a1,[$Dst32AnUnprefixed] */
13206 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13207 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00b }
13209 /* xchg.b a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13212 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13213 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20b00 }
13215 /* xchg.b a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13218 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13219 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40b0000 }
13221 /* xchg.b a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13224 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13225 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60b0000 }
13227 /* xchg.b a1,${Dsp-16-u8}[sb] */
13230 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13231 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28b00 }
13233 /* xchg.b a1,${Dsp-16-u16}[sb] */
13236 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13237 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48b0000 }
13239 /* xchg.b a1,${Dsp-16-s8}[fb] */
13242 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13243 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cb00 }
13245 /* xchg.b a1,${Dsp-16-s16}[fb] */
13248 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13249 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cb0000 }
13251 /* xchg.b a1,${Dsp-16-u16} */
13254 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
13255 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cb0000 }
13257 /* xchg.b a1,${Dsp-16-u24} */
13260 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
13261 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68b0000 }
13263 /* xchg.b a0,$Dst32RnUnprefixedQI */
13266 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13267 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80a }
13269 /* xchg.b a0,$Dst32AnUnprefixedQI */
13272 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13273 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08a }
13275 /* xchg.b a0,[$Dst32AnUnprefixed] */
13278 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13279 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00a }
13281 /* xchg.b a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13284 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13285 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20a00 }
13287 /* xchg.b a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13290 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13291 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40a0000 }
13293 /* xchg.b a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13296 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13297 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60a0000 }
13299 /* xchg.b a0,${Dsp-16-u8}[sb] */
13302 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13303 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28a00 }
13305 /* xchg.b a0,${Dsp-16-u16}[sb] */
13308 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13309 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48a0000 }
13311 /* xchg.b a0,${Dsp-16-s8}[fb] */
13314 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13315 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2ca00 }
13317 /* xchg.b a0,${Dsp-16-s16}[fb] */
13320 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13321 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4ca0000 }
13323 /* xchg.b a0,${Dsp-16-u16} */
13326 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
13327 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6ca0000 }
13329 /* xchg.b a0,${Dsp-16-u24} */
13332 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
13333 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68a0000 }
13335 /* xchg.b r1l,$Dst32RnUnprefixedQI */
13338 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13339 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd809 }
13341 /* xchg.b r1l,$Dst32AnUnprefixedQI */
13344 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13345 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd089 }
13347 /* xchg.b r1l,[$Dst32AnUnprefixed] */
13350 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13351 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd009 }
13353 /* xchg.b r1l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13356 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13357 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20900 }
13359 /* xchg.b r1l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13362 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13363 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4090000 }
13365 /* xchg.b r1l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13368 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13369 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6090000 }
13371 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13374 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13375 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28900 }
13377 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13380 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13381 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4890000 }
13383 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13386 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13387 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c900 }
13389 /* xchg.b r1l,${Dsp-16-s16}[fb] */
13392 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13393 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c90000 }
13395 /* xchg.b r1l,${Dsp-16-u16} */
13398 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13399 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c90000 }
13401 /* xchg.b r1l,${Dsp-16-u24} */
13404 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), 0 } },
13405 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6890000 }
13407 /* xchg.b r0l,$Dst32RnUnprefixedQI */
13410 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13411 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd808 }
13413 /* xchg.b r0l,$Dst32AnUnprefixedQI */
13416 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13417 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd088 }
13419 /* xchg.b r0l,[$Dst32AnUnprefixed] */
13422 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13423 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd008 }
13425 /* xchg.b r0l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13428 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13429 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20800 }
13431 /* xchg.b r0l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13434 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13435 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4080000 }
13437 /* xchg.b r0l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13440 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13441 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6080000 }
13443 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13446 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13447 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28800 }
13449 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13452 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13453 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4880000 }
13455 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13458 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13459 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c800 }
13461 /* xchg.b r0l,${Dsp-16-s16}[fb] */
13464 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13465 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c80000 }
13467 /* xchg.b r0l,${Dsp-16-u16} */
13470 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13471 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c80000 }
13473 /* xchg.b r0l,${Dsp-16-u24} */
13476 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), 0 } },
13477 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6880000 }
13479 /* xchg.w r3,$Dst16RnHI */
13482 { { MNEM
, ' ', 'r', '3', ',', OP (DST16RNHI
), 0 } },
13483 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b30 }
13485 /* xchg.w r3,$Dst16AnHI */
13488 { { MNEM
, ' ', 'r', '3', ',', OP (DST16ANHI
), 0 } },
13489 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b34 }
13491 /* xchg.w r3,[$Dst16An] */
13494 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST16AN
), ']', 0 } },
13495 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b36 }
13497 /* xchg.w r3,${Dsp-16-u8}[$Dst16An] */
13500 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13501 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b3800 }
13503 /* xchg.w r3,${Dsp-16-u16}[$Dst16An] */
13506 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13507 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b3c0000 }
13509 /* xchg.w r3,${Dsp-16-u8}[sb] */
13512 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13513 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b3a00 }
13515 /* xchg.w r3,${Dsp-16-u16}[sb] */
13518 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13519 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b3e0000 }
13521 /* xchg.w r3,${Dsp-16-s8}[fb] */
13524 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13525 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b3b00 }
13527 /* xchg.w r3,${Dsp-16-u16} */
13530 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
13531 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b3f0000 }
13533 /* xchg.w r2,$Dst16RnHI */
13536 { { MNEM
, ' ', 'r', '2', ',', OP (DST16RNHI
), 0 } },
13537 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b20 }
13539 /* xchg.w r2,$Dst16AnHI */
13542 { { MNEM
, ' ', 'r', '2', ',', OP (DST16ANHI
), 0 } },
13543 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b24 }
13545 /* xchg.w r2,[$Dst16An] */
13548 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST16AN
), ']', 0 } },
13549 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b26 }
13551 /* xchg.w r2,${Dsp-16-u8}[$Dst16An] */
13554 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13555 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b2800 }
13557 /* xchg.w r2,${Dsp-16-u16}[$Dst16An] */
13560 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13561 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b2c0000 }
13563 /* xchg.w r2,${Dsp-16-u8}[sb] */
13566 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13567 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b2a00 }
13569 /* xchg.w r2,${Dsp-16-u16}[sb] */
13572 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13573 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b2e0000 }
13575 /* xchg.w r2,${Dsp-16-s8}[fb] */
13578 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13579 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b2b00 }
13581 /* xchg.w r2,${Dsp-16-u16} */
13584 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
13585 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b2f0000 }
13587 /* xchg.w r1,$Dst16RnHI */
13590 { { MNEM
, ' ', 'r', '1', ',', OP (DST16RNHI
), 0 } },
13591 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b10 }
13593 /* xchg.w r1,$Dst16AnHI */
13596 { { MNEM
, ' ', 'r', '1', ',', OP (DST16ANHI
), 0 } },
13597 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b14 }
13599 /* xchg.w r1,[$Dst16An] */
13602 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST16AN
), ']', 0 } },
13603 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b16 }
13605 /* xchg.w r1,${Dsp-16-u8}[$Dst16An] */
13608 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13609 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b1800 }
13611 /* xchg.w r1,${Dsp-16-u16}[$Dst16An] */
13614 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13615 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b1c0000 }
13617 /* xchg.w r1,${Dsp-16-u8}[sb] */
13620 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13621 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b1a00 }
13623 /* xchg.w r1,${Dsp-16-u16}[sb] */
13626 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13627 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b1e0000 }
13629 /* xchg.w r1,${Dsp-16-s8}[fb] */
13632 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13633 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b1b00 }
13635 /* xchg.w r1,${Dsp-16-u16} */
13638 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
13639 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b1f0000 }
13641 /* xchg.w r0,$Dst16RnHI */
13644 { { MNEM
, ' ', 'r', '0', ',', OP (DST16RNHI
), 0 } },
13645 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b00 }
13647 /* xchg.w r0,$Dst16AnHI */
13650 { { MNEM
, ' ', 'r', '0', ',', OP (DST16ANHI
), 0 } },
13651 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b04 }
13653 /* xchg.w r0,[$Dst16An] */
13656 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST16AN
), ']', 0 } },
13657 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b06 }
13659 /* xchg.w r0,${Dsp-16-u8}[$Dst16An] */
13662 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13663 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b0800 }
13665 /* xchg.w r0,${Dsp-16-u16}[$Dst16An] */
13668 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13669 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b0c0000 }
13671 /* xchg.w r0,${Dsp-16-u8}[sb] */
13674 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13675 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b0a00 }
13677 /* xchg.w r0,${Dsp-16-u16}[sb] */
13680 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13681 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b0e0000 }
13683 /* xchg.w r0,${Dsp-16-s8}[fb] */
13686 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13687 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b0b00 }
13689 /* xchg.w r0,${Dsp-16-u16} */
13692 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13693 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b0f0000 }
13695 /* xchg.b r1h,$Dst16RnQI */
13698 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
13699 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a30 }
13701 /* xchg.b r1h,$Dst16AnQI */
13704 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
13705 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a34 }
13707 /* xchg.b r1h,[$Dst16An] */
13710 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13711 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a36 }
13713 /* xchg.b r1h,${Dsp-16-u8}[$Dst16An] */
13716 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13717 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a3800 }
13719 /* xchg.b r1h,${Dsp-16-u16}[$Dst16An] */
13722 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13723 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a3c0000 }
13725 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13728 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13729 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a3a00 }
13731 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13734 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13735 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a3e0000 }
13737 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13740 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13741 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a3b00 }
13743 /* xchg.b r1h,${Dsp-16-u16} */
13746 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13747 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a3f0000 }
13749 /* xchg.b r1l,$Dst16RnQI */
13752 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16RNQI
), 0 } },
13753 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a20 }
13755 /* xchg.b r1l,$Dst16AnQI */
13758 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16ANQI
), 0 } },
13759 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a24 }
13761 /* xchg.b r1l,[$Dst16An] */
13764 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13765 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a26 }
13767 /* xchg.b r1l,${Dsp-16-u8}[$Dst16An] */
13770 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13771 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a2800 }
13773 /* xchg.b r1l,${Dsp-16-u16}[$Dst16An] */
13776 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13777 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a2c0000 }
13779 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13782 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13783 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a2a00 }
13785 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13788 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13789 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a2e0000 }
13791 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13794 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13795 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a2b00 }
13797 /* xchg.b r1l,${Dsp-16-u16} */
13800 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13801 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a2f0000 }
13803 /* xchg.b r0h,$Dst16RnQI */
13806 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16RNQI
), 0 } },
13807 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a10 }
13809 /* xchg.b r0h,$Dst16AnQI */
13812 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16ANQI
), 0 } },
13813 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a14 }
13815 /* xchg.b r0h,[$Dst16An] */
13818 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13819 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a16 }
13821 /* xchg.b r0h,${Dsp-16-u8}[$Dst16An] */
13824 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13825 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a1800 }
13827 /* xchg.b r0h,${Dsp-16-u16}[$Dst16An] */
13830 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13831 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a1c0000 }
13833 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13836 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13837 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a1a00 }
13839 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13842 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13843 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a1e0000 }
13845 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13848 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13849 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a1b00 }
13851 /* xchg.b r0h,${Dsp-16-u16} */
13854 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13855 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a1f0000 }
13857 /* xchg.b r0l,$Dst16RnQI */
13860 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
13861 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a00 }
13863 /* xchg.b r0l,$Dst16AnQI */
13866 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
13867 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a04 }
13869 /* xchg.b r0l,[$Dst16An] */
13872 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13873 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a06 }
13875 /* xchg.b r0l,${Dsp-16-u8}[$Dst16An] */
13878 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13879 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a0800 }
13881 /* xchg.b r0l,${Dsp-16-u16}[$Dst16An] */
13884 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13885 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a0c0000 }
13887 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13890 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13891 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a0a00 }
13893 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13896 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13897 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a0e0000 }
13899 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13902 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13903 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a0b00 }
13905 /* xchg.b r0l,${Dsp-16-u16} */
13908 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13909 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a0f0000 }
13911 /* tst.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
13914 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13915 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2d000000 }
13917 /* tst.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
13920 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13921 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3d000000 }
13923 /* tst.w${S} #${Imm-24-HI},${Dsp-8-u16} */
13926 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
13927 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1d000000 }
13929 /* tst.w${S} #${Imm-8-HI},r0 */
13932 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
13933 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xd0000 }
13935 /* tst.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
13938 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13939 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2c0000 }
13941 /* tst.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
13944 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13945 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3c0000 }
13947 /* tst.b${S} #${Imm-24-QI},${Dsp-8-u16} */
13950 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
13951 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1c000000 }
13953 /* tst.b${S} #${Imm-8-QI},r0l */
13956 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
13957 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xc00 }
13959 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
13962 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13963 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990900 }
13965 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
13968 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13969 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992900 }
13971 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
13974 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13975 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993900 }
13977 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
13980 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13981 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918900 }
13983 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
13986 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13987 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a900 }
13989 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
13992 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13993 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b900 }
13995 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
13998 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
13999 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910900 }
14001 /* tst.w${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14004 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14005 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912900 }
14007 /* tst.w${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14010 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14011 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913900 }
14013 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14016 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14017 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930900 }
14019 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14022 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14023 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932900 }
14025 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14028 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14029 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933900 }
14031 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14034 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14035 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950900 }
14037 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14040 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14041 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952900 }
14043 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14046 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14047 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953900 }
14049 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14052 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14053 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970900 }
14055 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14058 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14059 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972900 }
14061 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14064 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14065 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973900 }
14067 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14070 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14071 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938900 }
14073 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14076 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14077 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a900 }
14079 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14082 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14083 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b900 }
14085 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14088 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14089 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958900 }
14091 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14094 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14095 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a900 }
14097 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14100 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14101 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b900 }
14103 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14106 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14107 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c900 }
14109 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14112 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14113 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e900 }
14115 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14118 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14119 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f900 }
14121 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14124 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14125 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c900 }
14127 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
14130 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14131 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e900 }
14133 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
14136 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14137 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f900 }
14139 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
14142 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
14143 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c900 }
14145 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
14148 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14149 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e900 }
14151 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
14154 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14155 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f900 }
14157 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
14160 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
14161 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978900 }
14163 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
14166 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14167 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a900 }
14169 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
14172 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14173 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b900 }
14175 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14178 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14179 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90900 }
14181 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
14184 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14185 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92900 }
14187 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
14190 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14191 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93900 }
14193 /* tst.w${G} ${Dsp-24-u16},$Dst32RnPrefixedHI */
14196 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14197 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93900 }
14199 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14202 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14203 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18900 }
14205 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
14208 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14209 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a900 }
14211 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
14214 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14215 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b900 }
14217 /* tst.w${G} ${Dsp-24-u16},$Dst32AnPrefixedHI */
14220 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14221 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b900 }
14223 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14226 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14227 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10900 }
14229 /* tst.w${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
14232 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14233 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12900 }
14235 /* tst.w${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
14238 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14239 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13900 }
14241 /* tst.w${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
14244 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14245 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13900 }
14247 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
14250 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14251 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30900 }
14253 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14256 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14257 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32900 }
14259 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14262 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14263 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33900 }
14265 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
14268 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14269 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33900 }
14271 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
14274 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14275 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50900 }
14277 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14280 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14281 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52900 }
14283 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14286 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14287 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53900 }
14289 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
14292 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14293 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53900 }
14295 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
14298 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14299 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70900 }
14301 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14304 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14305 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72900 }
14307 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14310 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14311 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73900 }
14313 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
14316 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14317 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73900 }
14319 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
14322 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14323 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38900 }
14325 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
14328 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14329 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a900 }
14331 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
14334 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14335 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b900 }
14337 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
14340 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14341 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b900 }
14343 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
14346 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14347 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58900 }
14349 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
14352 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14353 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a900 }
14355 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
14358 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14359 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b900 }
14361 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
14364 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14365 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b900 }
14367 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
14370 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14371 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c900 }
14373 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
14376 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14377 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e900 }
14379 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
14382 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14383 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f900 }
14385 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
14388 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14389 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f900 }
14391 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
14394 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14395 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c900 }
14397 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
14400 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14401 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e900 }
14403 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
14406 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14407 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f900 }
14409 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
14412 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14413 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f900 }
14415 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
14418 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
14419 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c900 }
14421 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
14424 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14425 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e900 }
14427 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
14430 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14431 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f900 }
14433 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16} */
14436 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
14437 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f900 }
14439 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
14442 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
14443 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78900 }
14445 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
14448 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14449 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a900 }
14451 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
14454 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14455 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b900 }
14457 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24} */
14460 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
14461 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b900 }
14463 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14466 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14467 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90900 }
14469 /* tst.w${G} ${Dsp-24-u24},$Dst32RnPrefixedHI */
14472 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14473 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92900 }
14475 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14478 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14479 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18900 }
14481 /* tst.w${G} ${Dsp-24-u24},$Dst32AnPrefixedHI */
14484 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14485 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a900 }
14487 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14490 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14491 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10900 }
14493 /* tst.w${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
14496 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14497 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12900 }
14499 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
14502 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14503 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30900 }
14505 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
14508 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14509 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32900 }
14511 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
14514 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14515 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50900 }
14517 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
14520 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14521 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52900 }
14523 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
14526 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14527 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70900 }
14529 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
14532 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14533 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72900 }
14535 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
14538 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14539 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38900 }
14541 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
14544 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14545 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a900 }
14547 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
14550 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14551 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58900 }
14553 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
14556 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14557 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a900 }
14559 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
14562 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14563 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c900 }
14565 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
14568 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14569 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e900 }
14571 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
14574 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14575 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c900 }
14577 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
14580 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14581 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e900 }
14583 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
14586 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
14587 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c900 }
14589 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16} */
14592 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
14593 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e900 }
14595 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
14598 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
14599 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78900 }
14601 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24} */
14604 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
14605 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a900 }
14607 /* tst.w${G} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
14610 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14611 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c909 }
14613 /* tst.w${G} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
14616 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14617 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18929 }
14619 /* tst.w${G} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
14622 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14623 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18909 }
14625 /* tst.w${G} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
14628 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14629 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c189 }
14631 /* tst.w${G} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
14634 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14635 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a9 }
14637 /* tst.w${G} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
14640 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14641 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18189 }
14643 /* tst.w${G} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
14646 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14647 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c109 }
14649 /* tst.w${G} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
14652 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14653 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18129 }
14655 /* tst.w${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
14658 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14659 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18109 }
14661 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14664 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14665 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30900 }
14667 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14670 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14671 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832900 }
14673 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
14676 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14677 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830900 }
14679 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14682 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14683 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50900 }
14685 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14688 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14689 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852900 }
14691 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
14694 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14695 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850900 }
14697 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14700 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14701 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70900 }
14703 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14706 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14707 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872900 }
14709 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
14712 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14713 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870900 }
14715 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
14718 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14719 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38900 }
14721 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
14724 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14725 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a900 }
14727 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
14730 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14731 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838900 }
14733 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
14736 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14737 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58900 }
14739 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
14742 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14743 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a900 }
14745 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
14748 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14749 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858900 }
14751 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
14754 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14755 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c900 }
14757 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
14760 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14761 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e900 }
14763 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
14766 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14767 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c900 }
14769 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
14772 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14773 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c900 }
14775 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
14778 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14779 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e900 }
14781 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
14784 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14785 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c900 }
14787 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16} */
14790 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14791 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c900 }
14793 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16} */
14796 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14797 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e900 }
14799 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16} */
14802 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
14803 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c900 }
14805 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24} */
14808 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14809 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78900 }
14811 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24} */
14814 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14815 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a900 }
14817 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24} */
14820 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
14821 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878900 }
14823 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
14826 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14827 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980900 }
14829 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
14832 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14833 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982900 }
14835 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
14838 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14839 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983900 }
14841 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
14844 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14845 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908900 }
14847 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
14850 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14851 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a900 }
14853 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
14856 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14857 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b900 }
14859 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14862 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14863 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900900 }
14865 /* tst.b${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14868 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14869 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902900 }
14871 /* tst.b${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14874 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14875 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903900 }
14877 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14880 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14881 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920900 }
14883 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14886 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14887 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922900 }
14889 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14892 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14893 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923900 }
14895 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14898 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14899 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940900 }
14901 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14904 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14905 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942900 }
14907 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14910 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14911 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943900 }
14913 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14916 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14917 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960900 }
14919 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14922 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14923 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962900 }
14925 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14928 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14929 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963900 }
14931 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14934 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14935 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928900 }
14937 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14940 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14941 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a900 }
14943 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14946 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14947 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b900 }
14949 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14952 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14953 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948900 }
14955 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14958 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14959 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a900 }
14961 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14964 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14965 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b900 }
14967 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14970 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14971 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c900 }
14973 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14976 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14977 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e900 }
14979 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14982 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14983 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f900 }
14985 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14988 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14989 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c900 }
14991 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
14994 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14995 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e900 }
14997 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
15000 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
15001 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f900 }
15003 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
15006 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
15007 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c900 }
15009 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
15012 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15013 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e900 }
15015 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
15018 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15019 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f900 }
15021 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
15024 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
15025 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968900 }
15027 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
15030 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15031 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a900 }
15033 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
15036 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15037 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b900 }
15039 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15042 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15043 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80900 }
15045 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
15048 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15049 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82900 }
15051 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
15054 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15055 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83900 }
15057 /* tst.b${G} ${Dsp-24-u16},$Dst32RnPrefixedQI */
15060 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15061 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83900 }
15063 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15066 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15067 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08900 }
15069 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
15072 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15073 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a900 }
15075 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
15078 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15079 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b900 }
15081 /* tst.b${G} ${Dsp-24-u16},$Dst32AnPrefixedQI */
15084 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15085 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b900 }
15087 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15090 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15091 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00900 }
15093 /* tst.b${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
15096 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15097 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02900 }
15099 /* tst.b${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
15102 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15103 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03900 }
15105 /* tst.b${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
15108 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15109 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03900 }
15111 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
15114 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15115 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20900 }
15117 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15120 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15121 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22900 }
15123 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15126 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15127 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23900 }
15129 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
15132 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15133 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23900 }
15135 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
15138 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15139 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40900 }
15141 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15144 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15145 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42900 }
15147 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15150 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15151 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43900 }
15153 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
15156 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15157 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43900 }
15159 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
15162 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15163 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60900 }
15165 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15168 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15169 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62900 }
15171 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15174 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15175 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63900 }
15177 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
15180 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15181 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63900 }
15183 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
15186 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15187 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28900 }
15189 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
15192 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15193 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a900 }
15195 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
15198 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15199 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b900 }
15201 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
15204 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15205 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b900 }
15207 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
15210 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15211 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48900 }
15213 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
15216 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15217 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a900 }
15219 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
15222 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15223 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b900 }
15225 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
15228 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15229 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b900 }
15231 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
15234 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15235 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c900 }
15237 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
15240 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15241 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e900 }
15243 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
15246 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15247 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f900 }
15249 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
15252 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15253 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f900 }
15255 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
15258 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15259 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c900 }
15261 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
15264 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15265 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e900 }
15267 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
15270 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15271 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f900 }
15273 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
15276 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15277 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f900 }
15279 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
15282 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
15283 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c900 }
15285 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
15288 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15289 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e900 }
15291 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
15294 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15295 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f900 }
15297 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16} */
15300 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
15301 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f900 }
15303 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
15306 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
15307 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68900 }
15309 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
15312 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15313 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a900 }
15315 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
15318 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15319 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b900 }
15321 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24} */
15324 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
15325 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b900 }
15327 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15330 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15331 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80900 }
15333 /* tst.b${G} ${Dsp-24-u24},$Dst32RnPrefixedQI */
15336 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15337 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82900 }
15339 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15342 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15343 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08900 }
15345 /* tst.b${G} ${Dsp-24-u24},$Dst32AnPrefixedQI */
15348 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15349 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a900 }
15351 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15354 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15355 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00900 }
15357 /* tst.b${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
15360 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15361 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02900 }
15363 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
15366 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15367 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20900 }
15369 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
15372 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15373 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22900 }
15375 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
15378 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15379 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40900 }
15381 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
15384 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15385 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42900 }
15387 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
15390 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15391 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60900 }
15393 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
15396 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15397 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62900 }
15399 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
15402 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15403 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28900 }
15405 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
15408 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15409 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a900 }
15411 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
15414 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15415 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48900 }
15417 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
15420 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15421 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a900 }
15423 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
15426 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15427 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c900 }
15429 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
15432 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15433 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e900 }
15435 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
15438 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15439 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c900 }
15441 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
15444 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15445 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e900 }
15447 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
15450 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
15451 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c900 }
15453 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16} */
15456 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
15457 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e900 }
15459 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
15462 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
15463 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68900 }
15465 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24} */
15468 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
15469 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a900 }
15471 /* tst.b${G} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
15474 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15475 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c809 }
15477 /* tst.b${G} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
15480 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15481 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18829 }
15483 /* tst.b${G} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
15486 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15487 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18809 }
15489 /* tst.b${G} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
15492 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15493 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c089 }
15495 /* tst.b${G} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
15498 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15499 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a9 }
15501 /* tst.b${G} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
15504 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15505 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18089 }
15507 /* tst.b${G} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
15510 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15511 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c009 }
15513 /* tst.b${G} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
15516 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15517 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18029 }
15519 /* tst.b${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
15522 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15523 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18009 }
15525 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15528 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15529 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20900 }
15531 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15534 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15535 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822900 }
15537 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
15540 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15541 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820900 }
15543 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15546 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15547 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40900 }
15549 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15552 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15553 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842900 }
15555 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
15558 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15559 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840900 }
15561 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15564 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15565 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60900 }
15567 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15570 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15571 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862900 }
15573 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
15576 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15577 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860900 }
15579 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
15582 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15583 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28900 }
15585 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
15588 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15589 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a900 }
15591 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
15594 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15595 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828900 }
15597 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
15600 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15601 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48900 }
15603 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
15606 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15607 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a900 }
15609 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
15612 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15613 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848900 }
15615 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
15618 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15619 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c900 }
15621 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
15624 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15625 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e900 }
15627 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
15630 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15631 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c900 }
15633 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
15636 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15637 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c900 }
15639 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
15642 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15643 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e900 }
15645 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
15648 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15649 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c900 }
15651 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16} */
15654 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15655 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c900 }
15657 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16} */
15660 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15661 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e900 }
15663 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16} */
15666 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
15667 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c900 }
15669 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24} */
15672 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15673 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68900 }
15675 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24} */
15678 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15679 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a900 }
15681 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24} */
15684 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
15685 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868900 }
15687 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
15690 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15691 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x818000 }
15693 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
15696 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15697 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81a000 }
15699 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
15702 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15703 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x81b000 }
15705 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
15708 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15709 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x818400 }
15711 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
15714 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15715 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x81a400 }
15717 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
15720 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15721 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x81b400 }
15723 /* tst.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
15726 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15727 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x818600 }
15729 /* tst.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
15732 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15733 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x81a600 }
15735 /* tst.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
15738 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15739 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x81b600 }
15741 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
15744 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15745 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x81880000 }
15747 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
15750 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15751 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81a80000 }
15753 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
15756 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15757 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81b80000 }
15759 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
15762 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15763 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x818c0000 }
15765 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
15768 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15769 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81ac0000 }
15771 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
15774 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15775 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81bc0000 }
15777 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
15780 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15781 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x818a0000 }
15783 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
15786 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15787 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81aa0000 }
15789 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
15792 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15793 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81ba0000 }
15795 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
15798 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15799 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x818e0000 }
15801 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
15804 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15805 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81ae0000 }
15807 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
15810 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15811 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81be0000 }
15813 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
15816 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15817 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x818b0000 }
15819 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
15822 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15823 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81ab0000 }
15825 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
15828 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15829 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81bb0000 }
15831 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
15834 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
15835 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x818f0000 }
15837 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
15840 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15841 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x81af0000 }
15843 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
15846 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15847 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x81bf0000 }
15849 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
15852 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15853 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x81c00000 }
15855 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
15858 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15859 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81e00000 }
15861 /* tst.w${X} ${Dsp-16-u16},$Dst16RnHI */
15864 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
15865 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x81f00000 }
15867 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
15870 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15871 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x81c40000 }
15873 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
15876 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15877 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x81e40000 }
15879 /* tst.w${X} ${Dsp-16-u16},$Dst16AnHI */
15882 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
15883 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x81f40000 }
15885 /* tst.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
15888 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15889 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x81c60000 }
15891 /* tst.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
15894 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15895 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x81e60000 }
15897 /* tst.w${X} ${Dsp-16-u16},[$Dst16An] */
15900 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
15901 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x81f60000 }
15903 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
15906 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15907 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x81c80000 }
15909 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
15912 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15913 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x81e80000 }
15915 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
15918 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15919 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x81f80000 }
15921 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
15924 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15925 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x81cc0000 }
15927 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
15930 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15931 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x81ec0000 }
15933 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
15936 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15937 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x81fc0000 }
15939 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
15942 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15943 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ca0000 }
15945 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
15948 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15949 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ea0000 }
15951 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
15954 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15955 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x81fa0000 }
15957 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
15960 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15961 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ce0000 }
15963 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
15966 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15967 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ee0000 }
15969 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
15972 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15973 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x81fe0000 }
15975 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
15978 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15979 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81cb0000 }
15981 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
15984 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15985 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81eb0000 }
15987 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
15990 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15991 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x81fb0000 }
15993 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
15996 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
15997 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x81cf0000 }
15999 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
16002 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16003 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x81ef0000 }
16005 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
16008 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16009 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x81ff0000 }
16011 /* tst.w${X} $Src16RnHI,$Dst16RnHI */
16014 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
16015 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8100 }
16017 /* tst.w${X} $Src16AnHI,$Dst16RnHI */
16020 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
16021 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8140 }
16023 /* tst.w${X} [$Src16An],$Dst16RnHI */
16026 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
16027 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8160 }
16029 /* tst.w${X} $Src16RnHI,$Dst16AnHI */
16032 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
16033 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8104 }
16035 /* tst.w${X} $Src16AnHI,$Dst16AnHI */
16038 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
16039 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8144 }
16041 /* tst.w${X} [$Src16An],$Dst16AnHI */
16044 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
16045 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8164 }
16047 /* tst.w${X} $Src16RnHI,[$Dst16An] */
16050 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16051 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8106 }
16053 /* tst.w${X} $Src16AnHI,[$Dst16An] */
16056 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16057 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8146 }
16059 /* tst.w${X} [$Src16An],[$Dst16An] */
16062 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16063 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8166 }
16065 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
16068 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16069 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x810800 }
16071 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
16074 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16075 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x814800 }
16077 /* tst.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16080 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16081 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x816800 }
16083 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
16086 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16087 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x810c0000 }
16089 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
16092 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16093 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x814c0000 }
16095 /* tst.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16098 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16099 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x816c0000 }
16101 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
16104 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16105 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x810a00 }
16107 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
16110 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16111 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x814a00 }
16113 /* tst.w${X} [$Src16An],${Dsp-16-u8}[sb] */
16116 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16117 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x816a00 }
16119 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
16122 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16123 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x810e0000 }
16125 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
16128 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16129 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x814e0000 }
16131 /* tst.w${X} [$Src16An],${Dsp-16-u16}[sb] */
16134 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16135 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x816e0000 }
16137 /* tst.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
16140 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16141 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x810b00 }
16143 /* tst.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
16146 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16147 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x814b00 }
16149 /* tst.w${X} [$Src16An],${Dsp-16-s8}[fb] */
16152 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16153 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x816b00 }
16155 /* tst.w${X} $Src16RnHI,${Dsp-16-u16} */
16158 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
16159 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x810f0000 }
16161 /* tst.w${X} $Src16AnHI,${Dsp-16-u16} */
16164 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
16165 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x814f0000 }
16167 /* tst.w${X} [$Src16An],${Dsp-16-u16} */
16170 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16171 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x816f0000 }
16173 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
16176 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16177 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x808000 }
16179 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
16182 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16183 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80a000 }
16185 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
16188 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16189 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x80b000 }
16191 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
16194 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16195 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x808400 }
16197 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
16200 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16201 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x80a400 }
16203 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
16206 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16207 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x80b400 }
16209 /* tst.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
16212 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16213 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x808600 }
16215 /* tst.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
16218 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16219 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x80a600 }
16221 /* tst.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
16224 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16225 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x80b600 }
16227 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
16230 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16231 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x80880000 }
16233 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
16236 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16237 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80a80000 }
16239 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
16242 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16243 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80b80000 }
16245 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
16248 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16249 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x808c0000 }
16251 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
16254 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16255 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80ac0000 }
16257 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
16260 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16261 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80bc0000 }
16263 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
16266 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16267 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x808a0000 }
16269 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
16272 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16273 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80aa0000 }
16275 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
16278 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16279 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80ba0000 }
16281 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
16284 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16285 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x808e0000 }
16287 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
16290 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16291 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80ae0000 }
16293 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
16296 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16297 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80be0000 }
16299 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
16302 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16303 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x808b0000 }
16305 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
16308 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16309 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80ab0000 }
16311 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
16314 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16315 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80bb0000 }
16317 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
16320 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
16321 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x808f0000 }
16323 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
16326 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16327 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x80af0000 }
16329 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
16332 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16333 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x80bf0000 }
16335 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
16338 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16339 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x80c00000 }
16341 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
16344 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16345 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80e00000 }
16347 /* tst.b${X} ${Dsp-16-u16},$Dst16RnQI */
16350 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
16351 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x80f00000 }
16353 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
16356 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16357 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x80c40000 }
16359 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
16362 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16363 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x80e40000 }
16365 /* tst.b${X} ${Dsp-16-u16},$Dst16AnQI */
16368 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
16369 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x80f40000 }
16371 /* tst.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
16374 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16375 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x80c60000 }
16377 /* tst.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
16380 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16381 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x80e60000 }
16383 /* tst.b${X} ${Dsp-16-u16},[$Dst16An] */
16386 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
16387 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x80f60000 }
16389 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
16392 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16393 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x80c80000 }
16395 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
16398 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16399 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x80e80000 }
16401 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
16404 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16405 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x80f80000 }
16407 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
16410 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16411 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x80cc0000 }
16413 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
16416 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16417 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x80ec0000 }
16419 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
16422 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16423 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x80fc0000 }
16425 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
16428 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16429 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ca0000 }
16431 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
16434 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16435 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ea0000 }
16437 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
16440 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16441 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x80fa0000 }
16443 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
16446 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16447 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ce0000 }
16449 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
16452 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16453 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ee0000 }
16455 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
16458 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16459 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x80fe0000 }
16461 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
16464 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16465 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80cb0000 }
16467 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
16470 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16471 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80eb0000 }
16473 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
16476 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16477 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x80fb0000 }
16479 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
16482 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
16483 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x80cf0000 }
16485 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
16488 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16489 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x80ef0000 }
16491 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
16494 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16495 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x80ff0000 }
16497 /* tst.b${X} $Src16RnQI,$Dst16RnQI */
16500 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
16501 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8000 }
16503 /* tst.b${X} $Src16AnQI,$Dst16RnQI */
16506 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
16507 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8040 }
16509 /* tst.b${X} [$Src16An],$Dst16RnQI */
16512 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16513 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8060 }
16515 /* tst.b${X} $Src16RnQI,$Dst16AnQI */
16518 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
16519 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8004 }
16521 /* tst.b${X} $Src16AnQI,$Dst16AnQI */
16524 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
16525 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8044 }
16527 /* tst.b${X} [$Src16An],$Dst16AnQI */
16530 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16531 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8064 }
16533 /* tst.b${X} $Src16RnQI,[$Dst16An] */
16536 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16537 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8006 }
16539 /* tst.b${X} $Src16AnQI,[$Dst16An] */
16542 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16543 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8046 }
16545 /* tst.b${X} [$Src16An],[$Dst16An] */
16548 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16549 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8066 }
16551 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
16554 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16555 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x800800 }
16557 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
16560 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16561 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x804800 }
16563 /* tst.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16566 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16567 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x806800 }
16569 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
16572 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16573 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x800c0000 }
16575 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
16578 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16579 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x804c0000 }
16581 /* tst.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16584 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16585 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x806c0000 }
16587 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
16590 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16591 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x800a00 }
16593 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
16596 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16597 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x804a00 }
16599 /* tst.b${X} [$Src16An],${Dsp-16-u8}[sb] */
16602 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16603 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x806a00 }
16605 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
16608 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16609 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x800e0000 }
16611 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
16614 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16615 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x804e0000 }
16617 /* tst.b${X} [$Src16An],${Dsp-16-u16}[sb] */
16620 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16621 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x806e0000 }
16623 /* tst.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
16626 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16627 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x800b00 }
16629 /* tst.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
16632 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16633 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x804b00 }
16635 /* tst.b${X} [$Src16An],${Dsp-16-s8}[fb] */
16638 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16639 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x806b00 }
16641 /* tst.b${X} $Src16RnQI,${Dsp-16-u16} */
16644 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
16645 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x800f0000 }
16647 /* tst.b${X} $Src16AnQI,${Dsp-16-u16} */
16650 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
16651 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x804f0000 }
16653 /* tst.b${X} [$Src16An],${Dsp-16-u16} */
16656 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16657 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x806f0000 }
16659 /* tst.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
16662 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
16663 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993e0000 }
16665 /* tst.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
16668 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
16669 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91be0000 }
16671 /* tst.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
16674 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16675 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913e0000 }
16677 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16680 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16681 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933e0000 }
16683 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16686 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16687 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93be0000 }
16689 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16692 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16693 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93fe0000 }
16695 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16698 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16699 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953e0000 }
16701 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16704 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16705 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95be0000 }
16707 /* tst.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
16710 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16711 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95fe0000 }
16713 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16716 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16717 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97fe0000 }
16719 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16722 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16723 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973e0000 }
16725 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24} */
16728 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
16729 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97be0000 }
16731 /* tst.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
16734 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
16735 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983e00 }
16737 /* tst.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
16740 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
16741 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90be00 }
16743 /* tst.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
16746 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16747 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903e00 }
16749 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16752 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16753 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923e0000 }
16755 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16758 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16759 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92be0000 }
16761 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16764 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16765 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92fe0000 }
16767 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16770 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16771 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943e0000 }
16773 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16776 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16777 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94be0000 }
16779 /* tst.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
16782 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16783 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94fe0000 }
16785 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16788 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16789 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96fe0000 }
16791 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16794 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16795 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963e0000 }
16797 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24} */
16800 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
16801 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96be0000 }
16803 /* tst.w${G} #${Imm-16-HI},$Dst16RnHI */
16806 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
16807 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77000000 }
16809 /* tst.w${G} #${Imm-16-HI},$Dst16AnHI */
16812 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
16813 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77040000 }
16815 /* tst.w${G} #${Imm-16-HI},[$Dst16An] */
16818 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
16819 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77060000 }
16821 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
16824 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16825 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77080000 }
16827 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16830 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16831 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x770a0000 }
16833 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16836 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16837 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x770b0000 }
16839 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
16842 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16843 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x770c0000 }
16845 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16848 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16849 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x770e0000 }
16851 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16854 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16855 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x770f0000 }
16857 /* tst.b${G} #${Imm-16-QI},$Dst16RnQI */
16860 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
16861 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x760000 }
16863 /* tst.b${G} #${Imm-16-QI},$Dst16AnQI */
16866 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
16867 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x760400 }
16869 /* tst.b${G} #${Imm-16-QI},[$Dst16An] */
16872 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
16873 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x760600 }
16875 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
16878 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16879 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76080000 }
16881 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16884 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16885 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x760a0000 }
16887 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16890 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16891 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x760b0000 }
16893 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
16896 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16897 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x760c0000 }
16899 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16902 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16903 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x760e0000 }
16905 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16908 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16909 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x760f0000 }
16911 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
16914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16915 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980000 }
16917 /* subx${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
16920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16921 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982000 }
16923 /* subx${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
16926 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16927 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983000 }
16929 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
16932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16933 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908000 }
16935 /* subx${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
16938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16939 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a000 }
16941 /* subx${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
16944 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16945 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b000 }
16947 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
16950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16951 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900000 }
16953 /* subx${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
16956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16957 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902000 }
16959 /* subx${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
16962 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16963 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903000 }
16965 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16969 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92000000 }
16971 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16975 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92200000 }
16977 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16980 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16981 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92300000 }
16983 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16987 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94000000 }
16989 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16993 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94200000 }
16995 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16998 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16999 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94300000 }
17001 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17005 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96000000 }
17007 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17011 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96200000 }
17013 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17016 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17017 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96300000 }
17019 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
17022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17023 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92800000 }
17025 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
17028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17029 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a00000 }
17031 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
17034 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17035 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b00000 }
17037 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
17040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17041 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94800000 }
17043 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
17046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17047 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a00000 }
17049 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
17052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17053 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b00000 }
17055 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
17058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17059 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c00000 }
17061 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
17064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17065 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e00000 }
17067 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
17070 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17071 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f00000 }
17073 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
17076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17077 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c00000 }
17079 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
17082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17083 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e00000 }
17085 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
17088 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17089 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f00000 }
17091 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
17094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
17095 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c00000 }
17097 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
17100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17101 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e00000 }
17103 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
17106 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17107 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f00000 }
17109 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
17112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
17113 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96800000 }
17115 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
17118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17119 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a00000 }
17121 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
17124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17125 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b00000 }
17127 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17131 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8000000 }
17133 /* subx${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
17136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17137 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8200000 }
17139 /* subx${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
17142 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17143 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8300000 }
17145 /* subx${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
17148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17149 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8300000 }
17151 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17155 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0800000 }
17157 /* subx${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
17160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17161 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a00000 }
17163 /* subx${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
17166 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17167 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b00000 }
17169 /* subx${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
17172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17173 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b00000 }
17175 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17179 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0000000 }
17181 /* subx${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
17184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17185 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0200000 }
17187 /* subx${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
17190 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17191 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0300000 }
17193 /* subx${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
17196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17197 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0300000 }
17199 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17203 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2000000 }
17205 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17209 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2200000 }
17211 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17214 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17215 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2300000 }
17217 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
17220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17221 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2300000 }
17223 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17227 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4000000 }
17229 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17233 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4200000 }
17235 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17238 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17239 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4300000 }
17241 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
17244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17245 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4300000 }
17247 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17251 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6000000 }
17253 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17257 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6200000 }
17259 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17262 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17263 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6300000 }
17265 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
17268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17269 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6300000 }
17271 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
17274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17275 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2800000 }
17277 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
17280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17281 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a00000 }
17283 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
17286 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17287 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b00000 }
17289 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
17292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17293 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b00000 }
17295 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
17298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17299 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4800000 }
17301 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
17304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17305 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a00000 }
17307 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
17310 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17311 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b00000 }
17313 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
17316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17317 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b00000 }
17319 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
17322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17323 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c00000 }
17325 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
17328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17329 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e00000 }
17331 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
17334 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17335 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f00000 }
17337 /* subx${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
17340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17341 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f00000 }
17343 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
17346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17347 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c00000 }
17349 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
17352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17353 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e00000 }
17355 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
17358 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17359 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f00000 }
17361 /* subx${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
17364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17365 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f00000 }
17367 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
17370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
17371 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c00000 }
17373 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
17376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17377 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e00000 }
17379 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
17382 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17383 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f00000 }
17385 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16} */
17388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
17389 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f00000 }
17391 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
17394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
17395 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6800000 }
17397 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
17400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17401 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a00000 }
17403 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
17406 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17407 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b00000 }
17409 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24} */
17412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
17413 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b00000 }
17415 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17419 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8000000 }
17421 /* subx${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
17424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17425 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8200000 }
17427 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17431 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0800000 }
17433 /* subx${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
17436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17437 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a00000 }
17439 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17443 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0000000 }
17445 /* subx${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
17448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17449 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0200000 }
17451 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
17454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17455 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2000000 }
17457 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
17460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17461 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2200000 }
17463 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
17466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17467 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4000000 }
17469 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
17472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17473 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4200000 }
17475 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
17478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17479 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6000000 }
17481 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
17484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17485 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6200000 }
17487 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
17490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17491 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2800000 }
17493 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
17496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17497 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a00000 }
17499 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
17502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17503 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4800000 }
17505 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
17508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17509 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a00000 }
17511 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
17514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17515 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c00000 }
17517 /* subx${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
17520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17521 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e00000 }
17523 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
17526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17527 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c00000 }
17529 /* subx${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
17532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17533 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e00000 }
17535 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
17538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
17539 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c00000 }
17541 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16} */
17544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
17545 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e00000 }
17547 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
17550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
17551 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6800000 }
17553 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24} */
17556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
17557 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a00000 }
17559 /* subx${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
17562 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17563 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc800 }
17565 /* subx${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
17568 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17569 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8820 }
17571 /* subx${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17574 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17575 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8800 }
17577 /* subx${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
17580 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17581 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc080 }
17583 /* subx${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
17586 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17587 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a0 }
17589 /* subx${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17592 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17593 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8080 }
17595 /* subx${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
17598 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17599 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc000 }
17601 /* subx${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
17604 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17605 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8020 }
17607 /* subx${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17610 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17611 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8000 }
17613 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17616 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17617 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20000 }
17619 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17622 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17623 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822000 }
17625 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
17628 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17629 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820000 }
17631 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17634 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17635 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4000000 }
17637 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17640 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17641 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84200000 }
17643 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
17646 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17647 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84000000 }
17649 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17652 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17653 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6000000 }
17655 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17658 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17659 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86200000 }
17661 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
17664 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17665 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86000000 }
17667 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
17670 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17671 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28000 }
17673 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
17676 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17677 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a000 }
17679 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
17682 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17683 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828000 }
17685 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
17688 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17689 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4800000 }
17691 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
17694 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17695 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a00000 }
17697 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
17700 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17701 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84800000 }
17703 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
17706 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17707 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c000 }
17709 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
17712 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17713 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e000 }
17715 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
17718 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17719 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c000 }
17721 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
17724 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17725 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c00000 }
17727 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
17730 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17731 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e00000 }
17733 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
17736 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17737 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c00000 }
17739 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
17742 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17743 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c00000 }
17745 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
17748 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17749 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e00000 }
17751 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
17754 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
17755 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c00000 }
17757 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
17760 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17761 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6800000 }
17763 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
17766 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17767 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a00000 }
17769 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
17772 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
17773 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86800000 }
17775 /* subx${G} #${Imm-16-QI},$Dst32RnUnprefixedSI */
17778 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17779 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x981100 }
17781 /* subx${G} #${Imm-16-QI},$Dst32AnUnprefixedSI */
17784 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17785 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x909100 }
17787 /* subx${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
17790 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17791 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x901100 }
17793 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17796 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17797 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92110000 }
17799 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
17802 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17803 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92910000 }
17805 /* subx${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
17808 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17809 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92d10000 }
17811 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17814 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17815 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94110000 }
17817 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
17820 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17821 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94910000 }
17823 /* subx${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
17826 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17827 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94d10000 }
17829 /* subx${G} #${Imm-32-QI},${Dsp-16-u16} */
17832 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
17833 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96d10000 }
17835 /* subx${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17838 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17839 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96110000 }
17841 /* subx${G} #${Imm-40-QI},${Dsp-16-u24} */
17844 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
17845 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96910000 }
17847 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32RnUnprefixedHI */
17850 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
17851 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993f0000 }
17853 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32AnUnprefixedHI */
17856 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
17857 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91bf0000 }
17859 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},[$Dst32AnUnprefixed] */
17862 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17863 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913f0000 }
17865 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17868 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17869 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933f0000 }
17871 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[sb] */
17874 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17875 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93bf0000 }
17877 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-s8}[fb] */
17880 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17881 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ff0000 }
17883 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17886 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17887 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953f0000 }
17889 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[sb] */
17892 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17893 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95bf0000 }
17895 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-s16}[fb] */
17898 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17899 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ff0000 }
17901 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16} */
17904 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), 0 } },
17905 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ff0000 }
17907 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17910 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17911 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973f0000 }
17913 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24} */
17916 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), 0 } },
17917 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97bf0000 }
17919 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32RnUnprefixedQI */
17922 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
17923 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983f0000 }
17925 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32AnUnprefixedQI */
17928 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
17929 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90bf0000 }
17931 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},[$Dst32AnUnprefixed] */
17934 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17935 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903f0000 }
17937 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17940 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17941 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923f0000 }
17943 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[sb] */
17946 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17947 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92bf0000 }
17949 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-s8}[fb] */
17952 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17953 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ff0000 }
17955 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17958 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17959 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943f0000 }
17961 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[sb] */
17964 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17965 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94bf0000 }
17967 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-s16}[fb] */
17970 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17971 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ff0000 }
17973 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16} */
17976 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), 0 } },
17977 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ff0000 }
17979 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17982 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17983 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963f0000 }
17985 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24} */
17988 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), 0 } },
17989 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96bf0000 }
17991 /* stz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
17994 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
17995 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990f0000 }
17997 /* stz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
18000 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18001 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918f0000 }
18003 /* stz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18006 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18007 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910f0000 }
18009 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18012 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18013 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930f0000 }
18015 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18018 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18019 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938f0000 }
18021 /* stz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18024 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18025 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93cf0000 }
18027 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18030 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18031 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950f0000 }
18033 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18036 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18037 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958f0000 }
18039 /* stz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18042 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18043 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95cf0000 }
18045 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18048 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18049 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97cf0000 }
18051 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18054 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18055 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970f0000 }
18057 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18060 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18061 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978f0000 }
18063 /* stz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18066 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18067 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980f00 }
18069 /* stz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18072 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18073 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908f00 }
18075 /* stz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18078 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18079 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900f00 }
18081 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18084 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18085 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920f0000 }
18087 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18090 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18091 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928f0000 }
18093 /* stz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18096 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18097 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92cf0000 }
18099 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18102 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18103 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940f0000 }
18105 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18108 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18109 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948f0000 }
18111 /* stz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18114 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18115 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94cf0000 }
18117 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18120 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18121 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96cf0000 }
18123 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18126 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18127 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960f0000 }
18129 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18132 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18133 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968f0000 }
18135 /* stz${S} #${Imm-8-QI},r0l */
18138 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18139 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xcc00 }
18141 /* stz${S} #${Imm-8-QI},r0h */
18144 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18145 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xcb00 }
18147 /* stz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18150 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18151 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xcd0000 }
18153 /* stz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18156 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18157 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xce0000 }
18159 /* stz${S} #${Imm-8-QI},${Dsp-16-u16} */
18162 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18163 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xcf000000 }
18165 /* stnz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
18168 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18169 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x991f0000 }
18171 /* stnz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
18174 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18175 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919f0000 }
18177 /* stnz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18180 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18181 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x911f0000 }
18183 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18186 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18187 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931f0000 }
18189 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18192 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18193 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939f0000 }
18195 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18198 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18199 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93df0000 }
18201 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18204 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18205 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951f0000 }
18207 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18210 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18211 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959f0000 }
18213 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18216 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18217 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95df0000 }
18219 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18222 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18223 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97df0000 }
18225 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18228 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18229 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971f0000 }
18231 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18234 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18235 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x979f0000 }
18237 /* stnz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18240 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18241 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x981f00 }
18243 /* stnz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18246 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18247 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x909f00 }
18249 /* stnz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18252 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18253 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x901f00 }
18255 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18258 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18259 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921f0000 }
18261 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18264 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18265 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929f0000 }
18267 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18270 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18271 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92df0000 }
18273 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18276 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18277 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941f0000 }
18279 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18282 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18283 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949f0000 }
18285 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18288 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18289 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94df0000 }
18291 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18294 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18295 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96df0000 }
18297 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18300 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18301 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961f0000 }
18303 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18306 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18307 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x969f0000 }
18309 /* stnz${S} #${Imm-8-QI},r0l */
18312 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18313 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xd400 }
18315 /* stnz${S} #${Imm-8-QI},r0h */
18318 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18319 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xd300 }
18321 /* stnz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18324 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18325 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xd50000 }
18327 /* stnz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18330 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18331 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xd60000 }
18333 /* stnz${S} #${Imm-8-QI},${Dsp-16-u16} */
18336 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18337 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xd7000000 }
18339 /* shlnc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18342 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18343 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x882100 }
18345 /* shlnc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18348 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18349 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80a100 }
18351 /* shlnc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18354 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18355 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x802100 }
18357 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18360 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18361 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82210000 }
18363 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18366 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18367 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a10000 }
18369 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18372 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18373 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e10000 }
18375 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18378 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18379 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84210000 }
18381 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18384 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18385 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a10000 }
18387 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18390 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18391 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e10000 }
18393 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18396 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18397 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e10000 }
18399 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18402 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18403 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86210000 }
18405 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18408 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18409 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a10000 }
18411 /* shl.l r1h,$Dst32RnUnprefixedSI */
18414 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18415 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc801 }
18417 /* shl.l r1h,$Dst32AnUnprefixedSI */
18420 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18421 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc081 }
18423 /* shl.l r1h,[$Dst32AnUnprefixed] */
18426 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18427 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc001 }
18429 /* shl.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18432 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18433 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20100 }
18435 /* shl.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18438 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18439 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4010000 }
18441 /* shl.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18444 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18445 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6010000 }
18447 /* shl.l r1h,${Dsp-16-u8}[sb] */
18450 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18451 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28100 }
18453 /* shl.l r1h,${Dsp-16-u16}[sb] */
18456 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18457 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4810000 }
18459 /* shl.l r1h,${Dsp-16-s8}[fb] */
18462 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18463 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c100 }
18465 /* shl.l r1h,${Dsp-16-s16}[fb] */
18468 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18469 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c10000 }
18471 /* shl.l r1h,${Dsp-16-u16} */
18474 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18475 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c10000 }
18477 /* shl.l r1h,${Dsp-16-u24} */
18480 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18481 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6810000 }
18483 /* shl.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18486 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18487 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x982100 }
18489 /* shl.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18492 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18493 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90a100 }
18495 /* shl.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18498 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18499 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x902100 }
18501 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18504 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18505 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92210000 }
18507 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18510 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18511 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92a10000 }
18513 /* shl.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18516 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18517 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92e10000 }
18519 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18522 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18523 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94210000 }
18525 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18528 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18529 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94a10000 }
18531 /* shl.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18534 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18535 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94e10000 }
18537 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18540 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18541 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96e10000 }
18543 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18546 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18547 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96210000 }
18549 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18552 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18553 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96a10000 }
18555 /* shl.w r1h,$Dst32RnUnprefixedHI */
18558 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18559 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93e }
18561 /* shl.w r1h,$Dst32AnUnprefixedHI */
18564 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18565 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1be }
18567 /* shl.w r1h,[$Dst32AnUnprefixed] */
18570 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18571 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13e }
18573 /* shl.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18576 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18577 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33e00 }
18579 /* shl.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18582 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18583 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53e0000 }
18585 /* shl.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18588 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18589 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73e0000 }
18591 /* shl.w r1h,${Dsp-16-u8}[sb] */
18594 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18595 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3be00 }
18597 /* shl.w r1h,${Dsp-16-u16}[sb] */
18600 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18601 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5be0000 }
18603 /* shl.w r1h,${Dsp-16-s8}[fb] */
18606 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18607 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3fe00 }
18609 /* shl.w r1h,${Dsp-16-s16}[fb] */
18612 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18613 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5fe0000 }
18615 /* shl.w r1h,${Dsp-16-u16} */
18618 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18619 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7fe0000 }
18621 /* shl.w r1h,${Dsp-16-u24} */
18624 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18625 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7be0000 }
18627 /* shl.b r1h,$Dst32RnUnprefixedQI */
18630 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18631 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83e }
18633 /* shl.b r1h,$Dst32AnUnprefixedQI */
18636 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18637 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0be }
18639 /* shl.b r1h,[$Dst32AnUnprefixed] */
18642 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18643 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03e }
18645 /* shl.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18648 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18649 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23e00 }
18651 /* shl.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18654 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18655 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43e0000 }
18657 /* shl.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18660 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18661 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63e0000 }
18663 /* shl.b r1h,${Dsp-16-u8}[sb] */
18666 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18667 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2be00 }
18669 /* shl.b r1h,${Dsp-16-u16}[sb] */
18672 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18673 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4be0000 }
18675 /* shl.b r1h,${Dsp-16-s8}[fb] */
18678 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18679 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2fe00 }
18681 /* shl.b r1h,${Dsp-16-s16}[fb] */
18684 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18685 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4fe0000 }
18687 /* shl.b r1h,${Dsp-16-u16} */
18690 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18691 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6fe0000 }
18693 /* shl.b r1h,${Dsp-16-u24} */
18696 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18697 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6be0000 }
18699 /* shl.w r1h,$Dst16RnHI */
18702 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
18703 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75e0 }
18705 /* shl.w r1h,$Dst16AnHI */
18708 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
18709 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75e4 }
18711 /* shl.w r1h,[$Dst16An] */
18714 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18715 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75e6 }
18717 /* shl.w r1h,${Dsp-16-u8}[$Dst16An] */
18720 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18721 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75e800 }
18723 /* shl.w r1h,${Dsp-16-u16}[$Dst16An] */
18726 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18727 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75ec0000 }
18729 /* shl.w r1h,${Dsp-16-u8}[sb] */
18732 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18733 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75ea00 }
18735 /* shl.w r1h,${Dsp-16-u16}[sb] */
18738 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18739 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75ee0000 }
18741 /* shl.w r1h,${Dsp-16-s8}[fb] */
18744 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18745 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75eb00 }
18747 /* shl.w r1h,${Dsp-16-u16} */
18750 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18751 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ef0000 }
18753 /* shl.b r1h,$Dst16RnQI */
18756 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
18757 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74e0 }
18759 /* shl.b r1h,$Dst16AnQI */
18762 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
18763 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74e4 }
18765 /* shl.b r1h,[$Dst16An] */
18768 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18769 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74e6 }
18771 /* shl.b r1h,${Dsp-16-u8}[$Dst16An] */
18774 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18775 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74e800 }
18777 /* shl.b r1h,${Dsp-16-u16}[$Dst16An] */
18780 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18781 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74ec0000 }
18783 /* shl.b r1h,${Dsp-16-u8}[sb] */
18786 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18787 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74ea00 }
18789 /* shl.b r1h,${Dsp-16-u16}[sb] */
18792 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18793 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74ee0000 }
18795 /* shl.b r1h,${Dsp-16-s8}[fb] */
18798 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18799 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74eb00 }
18801 /* shl.b r1h,${Dsp-16-u16} */
18804 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18805 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ef0000 }
18807 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
18810 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18811 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe900 }
18813 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
18816 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18817 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe180 }
18819 /* shl.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18822 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18823 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe100 }
18825 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18828 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18829 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe30000 }
18831 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18834 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18835 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5000000 }
18837 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18840 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18841 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7000000 }
18843 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18846 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18847 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe38000 }
18849 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18852 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18853 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5800000 }
18855 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18858 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18859 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3c000 }
18861 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18864 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18865 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5c00000 }
18867 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18870 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18871 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7c00000 }
18873 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18876 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18877 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7800000 }
18879 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
18882 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18883 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe800 }
18885 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
18888 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18889 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe080 }
18891 /* shl.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18894 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18895 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe000 }
18897 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18900 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18901 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe20000 }
18903 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18906 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18907 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4000000 }
18909 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18912 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18913 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6000000 }
18915 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18918 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18919 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe28000 }
18921 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18924 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18925 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4800000 }
18927 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18930 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18931 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2c000 }
18933 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18936 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18937 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4c00000 }
18939 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18942 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18943 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6c00000 }
18945 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18948 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18949 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6800000 }
18951 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
18954 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
18955 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe900 }
18957 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
18960 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
18961 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe904 }
18963 /* shl.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
18966 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
18967 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe906 }
18969 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
18972 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18973 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe90800 }
18975 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
18978 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18979 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe90c0000 }
18981 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
18984 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18985 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe90a00 }
18987 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
18990 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18991 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe90e0000 }
18993 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
18996 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18997 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe90b00 }
18999 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19002 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19003 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe90f0000 }
19005 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19008 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19009 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe800 }
19011 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19014 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19015 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe804 }
19017 /* shl.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19020 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19021 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe806 }
19023 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19026 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19027 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe80800 }
19029 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19032 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19033 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe80c0000 }
19035 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19038 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19039 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe80a00 }
19041 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19044 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19045 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe80e0000 }
19047 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19050 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19051 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe80b00 }
19053 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19056 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19057 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe80f0000 }
19059 /* shanc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19062 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19063 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xc82100 }
19065 /* shanc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19068 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19069 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc0a100 }
19071 /* shanc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19074 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19075 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xc02100 }
19077 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19080 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19081 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc2210000 }
19083 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19086 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19087 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc2a10000 }
19089 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19092 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19093 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2e10000 }
19095 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19098 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19099 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4210000 }
19101 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19104 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19105 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4a10000 }
19107 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19110 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19111 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4e10000 }
19113 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19116 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19117 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6e10000 }
19119 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19122 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19123 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6210000 }
19125 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19128 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19129 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6a10000 }
19131 /* sha.l r1h,$Dst32RnUnprefixedSI */
19134 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19135 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc811 }
19137 /* sha.l r1h,$Dst32AnUnprefixedSI */
19140 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19141 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc091 }
19143 /* sha.l r1h,[$Dst32AnUnprefixed] */
19146 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19147 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc011 }
19149 /* sha.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19152 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19153 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc21100 }
19155 /* sha.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19158 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19159 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4110000 }
19161 /* sha.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19164 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19165 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6110000 }
19167 /* sha.l r1h,${Dsp-16-u8}[sb] */
19170 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19171 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc29100 }
19173 /* sha.l r1h,${Dsp-16-u16}[sb] */
19176 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19177 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4910000 }
19179 /* sha.l r1h,${Dsp-16-s8}[fb] */
19182 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19183 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2d100 }
19185 /* sha.l r1h,${Dsp-16-s16}[fb] */
19188 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19189 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4d10000 }
19191 /* sha.l r1h,${Dsp-16-u16} */
19194 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19195 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6d10000 }
19197 /* sha.l r1h,${Dsp-16-u24} */
19200 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19201 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6910000 }
19203 /* sha.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19206 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19207 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa82100 }
19209 /* sha.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19212 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19213 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0a100 }
19215 /* sha.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19218 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19219 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa02100 }
19221 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19224 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19225 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2210000 }
19227 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19230 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19231 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2a10000 }
19233 /* sha.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19236 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19237 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2e10000 }
19239 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19242 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19243 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4210000 }
19245 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19248 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19249 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4a10000 }
19251 /* sha.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19254 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19255 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4e10000 }
19257 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19260 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19261 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6e10000 }
19263 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19266 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19267 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6210000 }
19269 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19272 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19273 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6a10000 }
19275 /* sha.w r1h,$Dst32RnUnprefixedHI */
19278 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19279 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb93e }
19281 /* sha.w r1h,$Dst32AnUnprefixedHI */
19284 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19285 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1be }
19287 /* sha.w r1h,[$Dst32AnUnprefixed] */
19290 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19291 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb13e }
19293 /* sha.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19296 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19297 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb33e00 }
19299 /* sha.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19302 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19303 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb53e0000 }
19305 /* sha.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19308 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19309 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb73e0000 }
19311 /* sha.w r1h,${Dsp-16-u8}[sb] */
19314 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19315 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3be00 }
19317 /* sha.w r1h,${Dsp-16-u16}[sb] */
19320 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19321 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5be0000 }
19323 /* sha.w r1h,${Dsp-16-s8}[fb] */
19326 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19327 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3fe00 }
19329 /* sha.w r1h,${Dsp-16-s16}[fb] */
19332 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19333 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5fe0000 }
19335 /* sha.w r1h,${Dsp-16-u16} */
19338 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19339 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7fe0000 }
19341 /* sha.w r1h,${Dsp-16-u24} */
19344 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19345 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7be0000 }
19347 /* sha.b r1h,$Dst32RnUnprefixedQI */
19350 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19351 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb83e }
19353 /* sha.b r1h,$Dst32AnUnprefixedQI */
19356 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19357 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0be }
19359 /* sha.b r1h,[$Dst32AnUnprefixed] */
19362 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19363 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb03e }
19365 /* sha.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19368 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19369 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb23e00 }
19371 /* sha.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19374 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19375 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb43e0000 }
19377 /* sha.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19380 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19381 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb63e0000 }
19383 /* sha.b r1h,${Dsp-16-u8}[sb] */
19386 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19387 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2be00 }
19389 /* sha.b r1h,${Dsp-16-u16}[sb] */
19392 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19393 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4be0000 }
19395 /* sha.b r1h,${Dsp-16-s8}[fb] */
19398 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19399 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2fe00 }
19401 /* sha.b r1h,${Dsp-16-s16}[fb] */
19404 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19405 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4fe0000 }
19407 /* sha.b r1h,${Dsp-16-u16} */
19410 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19411 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6fe0000 }
19413 /* sha.b r1h,${Dsp-16-u24} */
19416 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19417 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6be0000 }
19419 /* sha.w r1h,$Dst16RnHI */
19422 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
19423 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75f0 }
19425 /* sha.w r1h,$Dst16AnHI */
19428 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
19429 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75f4 }
19431 /* sha.w r1h,[$Dst16An] */
19434 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19435 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75f6 }
19437 /* sha.w r1h,${Dsp-16-u8}[$Dst16An] */
19440 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19441 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75f800 }
19443 /* sha.w r1h,${Dsp-16-u16}[$Dst16An] */
19446 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19447 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75fc0000 }
19449 /* sha.w r1h,${Dsp-16-u8}[sb] */
19452 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19453 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75fa00 }
19455 /* sha.w r1h,${Dsp-16-u16}[sb] */
19458 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19459 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75fe0000 }
19461 /* sha.w r1h,${Dsp-16-s8}[fb] */
19464 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19465 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75fb00 }
19467 /* sha.w r1h,${Dsp-16-u16} */
19470 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19471 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ff0000 }
19473 /* sha.b r1h,$Dst16RnQI */
19476 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
19477 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74f0 }
19479 /* sha.b r1h,$Dst16AnQI */
19482 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
19483 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74f4 }
19485 /* sha.b r1h,[$Dst16An] */
19488 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19489 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74f6 }
19491 /* sha.b r1h,${Dsp-16-u8}[$Dst16An] */
19494 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19495 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74f800 }
19497 /* sha.b r1h,${Dsp-16-u16}[$Dst16An] */
19500 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19501 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74fc0000 }
19503 /* sha.b r1h,${Dsp-16-u8}[sb] */
19506 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19507 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74fa00 }
19509 /* sha.b r1h,${Dsp-16-u16}[sb] */
19512 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19513 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74fe0000 }
19515 /* sha.b r1h,${Dsp-16-s8}[fb] */
19518 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19519 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74fb00 }
19521 /* sha.b r1h,${Dsp-16-u16} */
19524 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19525 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ff0000 }
19527 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
19530 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19531 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf900 }
19533 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
19536 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19537 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf180 }
19539 /* sha.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19542 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19543 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf100 }
19545 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19548 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19549 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf30000 }
19551 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19554 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19555 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5000000 }
19557 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19560 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19561 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7000000 }
19563 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19566 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19567 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf38000 }
19569 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19572 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19573 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5800000 }
19575 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19578 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19579 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3c000 }
19581 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19584 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19585 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5c00000 }
19587 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19590 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19591 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7c00000 }
19593 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19596 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19597 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7800000 }
19599 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
19602 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19603 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf800 }
19605 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
19608 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19609 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf080 }
19611 /* sha.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19614 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19615 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf000 }
19617 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19620 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19621 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf20000 }
19623 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19626 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19627 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4000000 }
19629 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19632 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19633 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6000000 }
19635 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19638 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19639 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf28000 }
19641 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19644 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19645 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4800000 }
19647 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19650 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19651 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2c000 }
19653 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19656 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19657 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4c00000 }
19659 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19662 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19663 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6c00000 }
19665 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19668 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19669 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6800000 }
19671 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
19674 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
19675 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xf100 }
19677 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
19680 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
19681 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xf104 }
19683 /* sha.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
19686 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19687 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xf106 }
19689 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19692 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19693 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xf10800 }
19695 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19698 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19699 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xf10c0000 }
19701 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19704 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19705 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xf10a00 }
19707 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19710 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19711 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xf10e0000 }
19713 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19716 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19717 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xf10b00 }
19719 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19722 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19723 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xf10f0000 }
19725 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19728 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19729 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xf000 }
19731 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19734 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19735 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xf004 }
19737 /* sha.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19740 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19741 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xf006 }
19743 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19746 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19747 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xf00800 }
19749 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19752 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19753 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xf00c0000 }
19755 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19758 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19759 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xf00a00 }
19761 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19764 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19765 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xf00e0000 }
19767 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19770 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19771 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xf00b00 }
19773 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19776 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19777 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xf00f0000 }
19779 /* sc${sccond32} $Dst32RnUnprefixedHI */
19782 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
19783 & ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI
, { 0xd930 }
19785 /* sc${sccond32} $Dst32AnUnprefixedHI */
19788 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
19789 & ifmt_sccnd_dst32_An_direct_Unprefixed_HI
, { 0xd1b0 }
19791 /* sc${sccond32} [$Dst32AnUnprefixed] */
19794 { { MNEM
, OP (SCCOND32
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19795 & ifmt_sccnd_dst32_An_indirect_Unprefixed_HI
, { 0xd130 }
19797 /* sc${sccond32} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
19800 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19801 & ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd33000 }
19803 /* sc${sccond32} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
19806 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19807 & ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5300000 }
19809 /* sc${sccond32} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
19812 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19813 & ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7300000 }
19815 /* sc${sccond32} ${Dsp-16-u8}[sb] */
19818 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19819 & ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd3b000 }
19821 /* sc${sccond32} ${Dsp-16-u16}[sb] */
19824 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19825 & ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5b00000 }
19827 /* sc${sccond32} ${Dsp-16-s8}[fb] */
19830 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19831 & ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3f000 }
19833 /* sc${sccond32} ${Dsp-16-s16}[fb] */
19836 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19837 & ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5f00000 }
19839 /* sc${sccond32} ${Dsp-16-u16} */
19842 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), 0 } },
19843 & ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7f00000 }
19845 /* sc${sccond32} ${Dsp-16-u24} */
19848 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), 0 } },
19849 & ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7b00000 }
19851 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19854 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19855 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
19857 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19860 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19861 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
19863 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19866 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19867 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
19869 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19872 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19873 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
19875 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19878 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19879 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
19881 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19884 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19885 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
19887 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19890 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19891 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
19893 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19896 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19897 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
19899 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19902 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19903 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
19905 /* sbjnz.w #${Imm-12-s4n},$Dst32RnUnprefixedHI,${Lab-16-8} */
19908 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19909 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
19911 /* sbjnz.w #${Imm-12-s4n},$Dst32AnUnprefixedHI,${Lab-16-8} */
19914 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19915 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
19917 /* sbjnz.w #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
19920 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
19921 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
19923 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19926 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19927 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
19929 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19932 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19933 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
19935 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19938 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19939 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
19941 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19944 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19945 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
19947 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19950 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19951 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
19953 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19956 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19957 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
19959 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19962 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19963 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
19965 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19968 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19969 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
19971 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19974 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19975 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
19977 /* sbjnz.b #${Imm-12-s4n},$Dst32RnUnprefixedQI,${Lab-16-8} */
19980 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19981 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
19983 /* sbjnz.b #${Imm-12-s4n},$Dst32AnUnprefixedQI,${Lab-16-8} */
19986 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19987 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
19989 /* sbjnz.b #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
19992 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
19993 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
19995 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
19998 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
19999 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
20001 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20004 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20005 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
20007 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20010 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20011 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
20013 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20016 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20017 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
20019 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20022 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20023 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
20025 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20028 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20029 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
20031 /* sbjnz.w #${Imm-8-s4n},$Dst16RnHI,${Lab-16-8} */
20034 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
20035 & ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
20037 /* sbjnz.w #${Imm-8-s4n},$Dst16AnHI,${Lab-16-8} */
20040 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
20041 & ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
20043 /* sbjnz.w #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20046 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20047 & ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
20049 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
20052 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
20053 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
20055 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20058 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20059 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
20061 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20064 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20065 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
20067 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20070 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20071 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
20073 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20076 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20077 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
20079 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20082 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20083 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
20085 /* sbjnz.b #${Imm-8-s4n},$Dst16RnQI,${Lab-16-8} */
20088 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
20089 & ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
20091 /* sbjnz.b #${Imm-8-s4n},$Dst16AnQI,${Lab-16-8} */
20094 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
20095 & ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
20097 /* sbjnz.b #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20100 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20101 & ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
20103 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20106 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20107 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990600 }
20109 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
20112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20113 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992600 }
20115 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
20118 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20119 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993600 }
20121 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20125 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918600 }
20127 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
20130 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20131 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a600 }
20133 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
20136 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20137 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b600 }
20139 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20143 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910600 }
20145 /* sbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
20148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20149 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912600 }
20151 /* sbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
20154 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20155 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913600 }
20157 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
20160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20161 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930600 }
20163 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20167 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932600 }
20169 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20172 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20173 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933600 }
20175 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
20178 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20179 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950600 }
20181 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20185 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952600 }
20187 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20190 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20191 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953600 }
20193 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
20196 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20197 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970600 }
20199 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20202 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20203 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972600 }
20205 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20208 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20209 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973600 }
20211 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
20214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20215 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938600 }
20217 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
20220 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20221 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a600 }
20223 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
20226 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20227 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b600 }
20229 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
20232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20233 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958600 }
20235 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
20238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20239 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a600 }
20241 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
20244 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20245 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b600 }
20247 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
20250 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20251 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c600 }
20253 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
20256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20257 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e600 }
20259 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
20262 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20263 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f600 }
20265 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
20268 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20269 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c600 }
20271 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
20274 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20275 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e600 }
20277 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
20280 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20281 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f600 }
20283 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
20286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
20287 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c600 }
20289 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
20292 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20293 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e600 }
20295 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
20298 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20299 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f600 }
20301 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
20304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
20305 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978600 }
20307 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
20310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20311 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a600 }
20313 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
20316 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20317 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b600 }
20319 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20323 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90600 }
20325 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
20328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20329 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92600 }
20331 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
20334 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20335 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93600 }
20337 /* sbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
20340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20341 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93600 }
20343 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20346 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20347 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18600 }
20349 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
20352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20353 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a600 }
20355 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
20358 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20359 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b600 }
20361 /* sbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
20364 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20365 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b600 }
20367 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20371 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10600 }
20373 /* sbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
20376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20377 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12600 }
20379 /* sbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
20382 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20383 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13600 }
20385 /* sbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
20388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20389 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13600 }
20391 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
20394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20395 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30600 }
20397 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20401 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32600 }
20403 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20406 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20407 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33600 }
20409 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
20412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20413 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33600 }
20415 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
20418 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20419 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50600 }
20421 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20425 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52600 }
20427 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20430 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20431 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53600 }
20433 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
20436 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20437 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53600 }
20439 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
20442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20443 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70600 }
20445 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20449 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72600 }
20451 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20454 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20455 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73600 }
20457 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
20460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20461 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73600 }
20463 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
20466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20467 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38600 }
20469 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
20472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20473 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a600 }
20475 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
20478 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20479 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b600 }
20481 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
20484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20485 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b600 }
20487 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
20490 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20491 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58600 }
20493 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
20496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20497 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a600 }
20499 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
20502 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20503 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b600 }
20505 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
20508 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20509 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b600 }
20511 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
20514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20515 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c600 }
20517 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
20520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20521 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e600 }
20523 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
20526 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20527 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f600 }
20529 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
20532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20533 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f600 }
20535 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
20538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20539 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c600 }
20541 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
20544 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20545 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e600 }
20547 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
20550 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20551 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f600 }
20553 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
20556 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20557 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f600 }
20559 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
20562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
20563 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c600 }
20565 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
20568 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20569 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e600 }
20571 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
20574 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20575 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f600 }
20577 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
20580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
20581 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f600 }
20583 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
20586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
20587 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78600 }
20589 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
20592 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20593 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a600 }
20595 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
20598 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20599 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b600 }
20601 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
20604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
20605 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b600 }
20607 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20610 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20611 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90600 }
20613 /* sbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
20616 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20617 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92600 }
20619 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20623 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18600 }
20625 /* sbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
20628 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20629 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a600 }
20631 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20635 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10600 }
20637 /* sbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
20640 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20641 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12600 }
20643 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
20646 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20647 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30600 }
20649 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
20652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20653 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32600 }
20655 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
20658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20659 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50600 }
20661 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
20664 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20665 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52600 }
20667 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
20670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20671 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70600 }
20673 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
20676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20677 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72600 }
20679 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
20682 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20683 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38600 }
20685 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
20688 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20689 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a600 }
20691 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
20694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20695 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58600 }
20697 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
20700 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20701 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a600 }
20703 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
20706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20707 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c600 }
20709 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
20712 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20713 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e600 }
20715 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
20718 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20719 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c600 }
20721 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
20724 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20725 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e600 }
20727 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
20730 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
20731 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c600 }
20733 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
20736 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
20737 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e600 }
20739 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
20742 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
20743 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78600 }
20745 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
20748 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
20749 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a600 }
20751 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
20754 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20755 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c906 }
20757 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
20760 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20761 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18926 }
20763 /* sbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
20766 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20767 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18906 }
20769 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
20772 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20773 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c186 }
20775 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
20778 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20779 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a6 }
20781 /* sbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
20784 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20785 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18186 }
20787 /* sbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
20790 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20791 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c106 }
20793 /* sbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
20796 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20797 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18126 }
20799 /* sbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
20802 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20803 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18106 }
20805 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20808 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20809 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30600 }
20811 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20814 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20815 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832600 }
20817 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
20820 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20821 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830600 }
20823 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20826 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20827 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50600 }
20829 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20832 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20833 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852600 }
20835 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
20838 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20839 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850600 }
20841 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20844 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20845 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70600 }
20847 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20850 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20851 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872600 }
20853 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
20856 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20857 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870600 }
20859 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
20862 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20863 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38600 }
20865 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
20868 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20869 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a600 }
20871 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
20874 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20875 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838600 }
20877 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
20880 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20881 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58600 }
20883 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
20886 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20887 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a600 }
20889 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
20892 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20893 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858600 }
20895 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
20898 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20899 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c600 }
20901 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
20904 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20905 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e600 }
20907 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
20910 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20911 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c600 }
20913 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
20916 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20917 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c600 }
20919 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
20922 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20923 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e600 }
20925 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
20928 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20929 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c600 }
20931 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
20934 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20935 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c600 }
20937 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
20940 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20941 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e600 }
20943 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
20946 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
20947 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c600 }
20949 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
20952 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20953 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78600 }
20955 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
20958 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20959 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a600 }
20961 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
20964 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
20965 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878600 }
20967 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
20970 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20971 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980600 }
20973 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
20976 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20977 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982600 }
20979 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
20982 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20983 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983600 }
20985 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
20988 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20989 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908600 }
20991 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
20994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20995 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a600 }
20997 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
21000 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21001 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b600 }
21003 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21006 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21007 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900600 }
21009 /* sbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
21012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21013 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902600 }
21015 /* sbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
21018 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21019 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903600 }
21021 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
21024 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21025 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920600 }
21027 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21031 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922600 }
21033 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21036 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21037 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923600 }
21039 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
21042 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21043 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940600 }
21045 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21048 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21049 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942600 }
21051 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21054 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21055 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943600 }
21057 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
21060 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21061 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960600 }
21063 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21067 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962600 }
21069 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21072 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21073 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963600 }
21075 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
21078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21079 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928600 }
21081 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
21084 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21085 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a600 }
21087 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
21090 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21091 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b600 }
21093 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
21096 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21097 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948600 }
21099 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
21102 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21103 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a600 }
21105 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
21108 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21109 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b600 }
21111 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
21114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21115 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c600 }
21117 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
21120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21121 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e600 }
21123 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
21126 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21127 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f600 }
21129 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
21132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21133 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c600 }
21135 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
21138 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21139 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e600 }
21141 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
21144 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21145 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f600 }
21147 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
21150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
21151 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c600 }
21153 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
21156 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21157 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e600 }
21159 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
21162 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21163 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f600 }
21165 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
21168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
21169 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968600 }
21171 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
21174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21175 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a600 }
21177 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
21180 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21181 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b600 }
21183 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21187 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80600 }
21189 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
21192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21193 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82600 }
21195 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
21198 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21199 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83600 }
21201 /* sbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
21204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21205 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83600 }
21207 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21210 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21211 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08600 }
21213 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
21216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21217 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a600 }
21219 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
21222 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21223 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b600 }
21225 /* sbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
21228 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21229 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b600 }
21231 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21234 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21235 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00600 }
21237 /* sbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
21240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21241 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02600 }
21243 /* sbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
21246 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21247 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03600 }
21249 /* sbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
21252 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21253 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03600 }
21255 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
21258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21259 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20600 }
21261 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21265 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22600 }
21267 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21270 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21271 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23600 }
21273 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
21276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21277 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23600 }
21279 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
21282 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21283 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40600 }
21285 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21289 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42600 }
21291 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21294 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21295 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43600 }
21297 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
21300 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21301 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43600 }
21303 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
21306 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21307 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60600 }
21309 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21313 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62600 }
21315 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21318 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21319 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63600 }
21321 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
21324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21325 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63600 }
21327 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
21330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21331 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28600 }
21333 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
21336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21337 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a600 }
21339 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
21342 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21343 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b600 }
21345 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
21348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21349 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b600 }
21351 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
21354 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21355 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48600 }
21357 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
21360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21361 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a600 }
21363 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
21366 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21367 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b600 }
21369 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
21372 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21373 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b600 }
21375 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
21378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21379 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c600 }
21381 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
21384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21385 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e600 }
21387 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
21390 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21391 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f600 }
21393 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
21396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21397 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f600 }
21399 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
21402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21403 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c600 }
21405 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
21408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21409 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e600 }
21411 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
21414 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21415 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f600 }
21417 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
21420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21421 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f600 }
21423 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
21426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
21427 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c600 }
21429 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
21432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21433 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e600 }
21435 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
21438 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21439 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f600 }
21441 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
21444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
21445 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f600 }
21447 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
21450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
21451 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68600 }
21453 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
21456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21457 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a600 }
21459 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
21462 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21463 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b600 }
21465 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
21468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
21469 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b600 }
21471 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21475 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80600 }
21477 /* sbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
21480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21481 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82600 }
21483 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21487 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08600 }
21489 /* sbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
21492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21493 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a600 }
21495 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21499 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00600 }
21501 /* sbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
21504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21505 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02600 }
21507 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
21510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21511 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20600 }
21513 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
21516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21517 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22600 }
21519 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
21522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21523 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40600 }
21525 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
21528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21529 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42600 }
21531 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
21534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21535 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60600 }
21537 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
21540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21541 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62600 }
21543 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
21546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21547 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28600 }
21549 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
21552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21553 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a600 }
21555 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
21558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21559 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48600 }
21561 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
21564 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21565 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a600 }
21567 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
21570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21571 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c600 }
21573 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
21576 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21577 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e600 }
21579 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
21582 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21583 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c600 }
21585 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
21588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21589 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e600 }
21591 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
21594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
21595 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c600 }
21597 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
21600 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
21601 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e600 }
21603 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
21606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
21607 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68600 }
21609 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
21612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
21613 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a600 }
21615 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
21618 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21619 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c806 }
21621 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
21624 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21625 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18826 }
21627 /* sbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
21630 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21631 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18806 }
21633 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
21636 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21637 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c086 }
21639 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
21642 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21643 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a6 }
21645 /* sbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
21648 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21649 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18086 }
21651 /* sbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
21654 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21655 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c006 }
21657 /* sbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
21660 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21661 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18026 }
21663 /* sbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
21666 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21667 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18006 }
21669 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21672 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21673 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20600 }
21675 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21678 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21679 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822600 }
21681 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
21684 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21685 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820600 }
21687 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21690 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21691 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40600 }
21693 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21696 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21697 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842600 }
21699 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
21702 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21703 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840600 }
21705 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21708 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21709 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60600 }
21711 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21714 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21715 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862600 }
21717 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
21720 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21721 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860600 }
21723 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
21726 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21727 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28600 }
21729 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
21732 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21733 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a600 }
21735 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
21738 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21739 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828600 }
21741 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
21744 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21745 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48600 }
21747 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
21750 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21751 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a600 }
21753 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
21756 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21757 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848600 }
21759 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
21762 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21763 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c600 }
21765 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
21768 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21769 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e600 }
21771 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
21774 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21775 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c600 }
21777 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
21780 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21781 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c600 }
21783 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
21786 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21787 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e600 }
21789 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
21792 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21793 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c600 }
21795 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
21798 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21799 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c600 }
21801 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
21804 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21805 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e600 }
21807 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
21810 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
21811 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c600 }
21813 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
21816 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21817 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68600 }
21819 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
21822 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21823 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a600 }
21825 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
21828 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
21829 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868600 }
21831 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
21834 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
21835 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb98000 }
21837 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
21840 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21841 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9a000 }
21843 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
21846 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21847 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb9b000 }
21849 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
21852 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
21853 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb98400 }
21855 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
21858 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21859 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb9a400 }
21861 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
21864 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21865 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb9b400 }
21867 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
21870 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
21871 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb98600 }
21873 /* sbb.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
21876 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21877 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9a600 }
21879 /* sbb.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
21882 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21883 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb9b600 }
21885 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
21888 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21889 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9880000 }
21891 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
21894 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21895 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9a80000 }
21897 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
21900 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21901 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9b80000 }
21903 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
21906 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21907 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb98c0000 }
21909 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
21912 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21913 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9ac0000 }
21915 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
21918 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21919 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9bc0000 }
21921 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
21924 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21925 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb98a0000 }
21927 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
21930 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21931 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9aa0000 }
21933 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
21936 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21937 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9ba0000 }
21939 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
21942 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21943 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb98e0000 }
21945 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
21948 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21949 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9ae0000 }
21951 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
21954 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21955 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9be0000 }
21957 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
21960 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21961 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb98b0000 }
21963 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
21966 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21967 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9ab0000 }
21969 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
21972 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21973 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9bb0000 }
21975 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
21978 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
21979 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb98f0000 }
21981 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
21984 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21985 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9af0000 }
21987 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
21990 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21991 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9bf0000 }
21993 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
21996 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
21997 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb9c00000 }
21999 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
22002 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
22003 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9e00000 }
22005 /* sbb.w${X} ${Dsp-16-u16},$Dst16RnHI */
22008 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
22009 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb9f00000 }
22011 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
22014 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22015 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb9c40000 }
22017 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
22020 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
22021 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb9e40000 }
22023 /* sbb.w${X} ${Dsp-16-u16},$Dst16AnHI */
22026 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
22027 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb9f40000 }
22029 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22032 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22033 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb9c60000 }
22035 /* sbb.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22038 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22039 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9e60000 }
22041 /* sbb.w${X} ${Dsp-16-u16},[$Dst16An] */
22044 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22045 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb9f60000 }
22047 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22050 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22051 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9c80000 }
22053 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22056 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22057 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9e80000 }
22059 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22062 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22063 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb9f80000 }
22065 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22068 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22069 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9cc0000 }
22071 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22074 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22075 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9ec0000 }
22077 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22080 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22081 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb9fc0000 }
22083 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22086 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22087 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ca0000 }
22089 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22092 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22093 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ea0000 }
22095 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22098 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22099 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb9fa0000 }
22101 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22104 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22105 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ce0000 }
22107 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22110 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22111 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ee0000 }
22113 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22116 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22117 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb9fe0000 }
22119 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22122 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22123 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9cb0000 }
22125 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22128 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22129 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9eb0000 }
22131 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22134 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22135 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb9fb0000 }
22137 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22140 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22141 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb9cf0000 }
22143 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22146 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22147 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb9ef0000 }
22149 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
22152 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22153 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb9ff0000 }
22155 /* sbb.w${X} $Src16RnHI,$Dst16RnHI */
22158 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
22159 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb900 }
22161 /* sbb.w${X} $Src16AnHI,$Dst16RnHI */
22164 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
22165 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb940 }
22167 /* sbb.w${X} [$Src16An],$Dst16RnHI */
22170 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
22171 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb960 }
22173 /* sbb.w${X} $Src16RnHI,$Dst16AnHI */
22176 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
22177 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb904 }
22179 /* sbb.w${X} $Src16AnHI,$Dst16AnHI */
22182 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
22183 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb944 }
22185 /* sbb.w${X} [$Src16An],$Dst16AnHI */
22188 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22189 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb964 }
22191 /* sbb.w${X} $Src16RnHI,[$Dst16An] */
22194 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22195 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb906 }
22197 /* sbb.w${X} $Src16AnHI,[$Dst16An] */
22200 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22201 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb946 }
22203 /* sbb.w${X} [$Src16An],[$Dst16An] */
22206 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22207 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb966 }
22209 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
22212 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22213 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb90800 }
22215 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
22218 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22219 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb94800 }
22221 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22224 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22225 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb96800 }
22227 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
22230 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22231 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb90c0000 }
22233 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
22236 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22237 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb94c0000 }
22239 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22242 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22243 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb96c0000 }
22245 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
22248 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22249 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb90a00 }
22251 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
22254 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22255 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb94a00 }
22257 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[sb] */
22260 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22261 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb96a00 }
22263 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
22266 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22267 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb90e0000 }
22269 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
22272 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22273 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb94e0000 }
22275 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[sb] */
22278 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22279 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb96e0000 }
22281 /* sbb.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
22284 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22285 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb90b00 }
22287 /* sbb.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
22290 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22291 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb94b00 }
22293 /* sbb.w${X} [$Src16An],${Dsp-16-s8}[fb] */
22296 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22297 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb96b00 }
22299 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16} */
22302 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
22303 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb90f0000 }
22305 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16} */
22308 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
22309 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb94f0000 }
22311 /* sbb.w${X} [$Src16An],${Dsp-16-u16} */
22314 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22315 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb96f0000 }
22317 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
22320 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22321 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb88000 }
22323 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
22326 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22327 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8a000 }
22329 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
22332 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22333 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb8b000 }
22335 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
22338 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22339 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb88400 }
22341 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
22344 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22345 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb8a400 }
22347 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
22350 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22351 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb8b400 }
22353 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
22356 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22357 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb88600 }
22359 /* sbb.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
22362 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22363 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8a600 }
22365 /* sbb.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
22368 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22369 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb8b600 }
22371 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
22374 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22375 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8880000 }
22377 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
22380 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22381 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8a80000 }
22383 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
22386 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22387 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8b80000 }
22389 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
22392 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22393 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb88c0000 }
22395 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
22398 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22399 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8ac0000 }
22401 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
22404 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22405 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8bc0000 }
22407 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
22410 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22411 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb88a0000 }
22413 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
22416 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22417 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8aa0000 }
22419 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
22422 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22423 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8ba0000 }
22425 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
22428 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22429 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb88e0000 }
22431 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
22434 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22435 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8ae0000 }
22437 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
22440 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22441 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8be0000 }
22443 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
22446 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22447 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb88b0000 }
22449 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
22452 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22453 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8ab0000 }
22455 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
22458 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22459 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8bb0000 }
22461 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
22464 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
22465 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb88f0000 }
22467 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
22470 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22471 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8af0000 }
22473 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
22476 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22477 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8bf0000 }
22479 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
22482 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22483 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb8c00000 }
22485 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
22488 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22489 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8e00000 }
22491 /* sbb.b${X} ${Dsp-16-u16},$Dst16RnQI */
22494 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
22495 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb8f00000 }
22497 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
22500 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22501 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb8c40000 }
22503 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
22506 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22507 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb8e40000 }
22509 /* sbb.b${X} ${Dsp-16-u16},$Dst16AnQI */
22512 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
22513 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb8f40000 }
22515 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22518 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22519 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb8c60000 }
22521 /* sbb.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22524 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22525 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8e60000 }
22527 /* sbb.b${X} ${Dsp-16-u16},[$Dst16An] */
22530 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22531 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb8f60000 }
22533 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22536 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22537 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8c80000 }
22539 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22542 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22543 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8e80000 }
22545 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22548 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22549 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb8f80000 }
22551 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22554 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22555 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8cc0000 }
22557 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22560 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22561 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8ec0000 }
22563 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22566 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22567 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb8fc0000 }
22569 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22572 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22573 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ca0000 }
22575 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22578 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22579 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ea0000 }
22581 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22584 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22585 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb8fa0000 }
22587 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22590 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22591 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ce0000 }
22593 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22596 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22597 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ee0000 }
22599 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22602 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22603 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb8fe0000 }
22605 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22608 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22609 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8cb0000 }
22611 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22614 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22615 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8eb0000 }
22617 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22620 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22621 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb8fb0000 }
22623 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22626 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22627 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb8cf0000 }
22629 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22632 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22633 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb8ef0000 }
22635 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
22638 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22639 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb8ff0000 }
22641 /* sbb.b${X} $Src16RnQI,$Dst16RnQI */
22644 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
22645 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb800 }
22647 /* sbb.b${X} $Src16AnQI,$Dst16RnQI */
22650 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
22651 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb840 }
22653 /* sbb.b${X} [$Src16An],$Dst16RnQI */
22656 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22657 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb860 }
22659 /* sbb.b${X} $Src16RnQI,$Dst16AnQI */
22662 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
22663 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb804 }
22665 /* sbb.b${X} $Src16AnQI,$Dst16AnQI */
22668 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
22669 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb844 }
22671 /* sbb.b${X} [$Src16An],$Dst16AnQI */
22674 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22675 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb864 }
22677 /* sbb.b${X} $Src16RnQI,[$Dst16An] */
22680 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22681 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb806 }
22683 /* sbb.b${X} $Src16AnQI,[$Dst16An] */
22686 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22687 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb846 }
22689 /* sbb.b${X} [$Src16An],[$Dst16An] */
22692 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22693 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb866 }
22695 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
22698 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22699 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb80800 }
22701 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
22704 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22705 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb84800 }
22707 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22710 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22711 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb86800 }
22713 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
22716 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22717 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb80c0000 }
22719 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
22722 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22723 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb84c0000 }
22725 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22728 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22729 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb86c0000 }
22731 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
22734 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22735 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb80a00 }
22737 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
22740 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22741 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb84a00 }
22743 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[sb] */
22746 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22747 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb86a00 }
22749 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
22752 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22753 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb80e0000 }
22755 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
22758 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22759 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb84e0000 }
22761 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[sb] */
22764 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22765 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb86e0000 }
22767 /* sbb.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
22770 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22771 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb80b00 }
22773 /* sbb.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
22776 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22777 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb84b00 }
22779 /* sbb.b${X} [$Src16An],${Dsp-16-s8}[fb] */
22782 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22783 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb86b00 }
22785 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16} */
22788 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
22789 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb80f0000 }
22791 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16} */
22794 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
22795 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb84f0000 }
22797 /* sbb.b${X} [$Src16An],${Dsp-16-u16} */
22800 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22801 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb86f0000 }
22803 /* sbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
22806 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
22807 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1992e00 }
22809 /* sbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
22812 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
22813 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x191ae00 }
22815 /* sbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
22818 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22819 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1912e00 }
22821 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22824 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22825 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1932e00 }
22827 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
22830 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22831 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x193ae00 }
22833 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
22836 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22837 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ee00 }
22839 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22842 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22843 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1952e00 }
22845 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
22848 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22849 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x195ae00 }
22851 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
22854 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22855 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ee00 }
22857 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
22860 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
22861 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ee00 }
22863 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22866 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22867 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1972e00 }
22869 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
22872 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
22873 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x197ae00 }
22875 /* sbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
22878 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
22879 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1982e00 }
22881 /* sbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
22884 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
22885 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x190ae00 }
22887 /* sbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
22890 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22891 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1902e00 }
22893 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22896 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22897 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1922e00 }
22899 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
22902 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22903 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x192ae00 }
22905 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
22908 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22909 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ee00 }
22911 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22914 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22915 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1942e00 }
22917 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
22920 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22921 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x194ae00 }
22923 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
22926 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22927 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ee00 }
22929 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
22932 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
22933 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ee00 }
22935 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22938 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22939 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1962e00 }
22941 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
22944 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
22945 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x196ae00 }
22947 /* sbb.w${X} #${Imm-16-HI},$Dst16RnHI */
22950 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
22951 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77700000 }
22953 /* sbb.w${X} #${Imm-16-HI},$Dst16AnHI */
22956 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
22957 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77740000 }
22959 /* sbb.w${X} #${Imm-16-HI},[$Dst16An] */
22962 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
22963 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77760000 }
22965 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
22968 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22969 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77780000 }
22971 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
22974 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22975 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x777a0000 }
22977 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
22980 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22981 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x777b0000 }
22983 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
22986 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22987 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x777c0000 }
22989 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
22992 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22993 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x777e0000 }
22995 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16} */
22998 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
22999 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x777f0000 }
23001 /* sbb.b${X} #${Imm-16-QI},$Dst16RnQI */
23004 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
23005 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x767000 }
23007 /* sbb.b${X} #${Imm-16-QI},$Dst16AnQI */
23010 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
23011 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x767400 }
23013 /* sbb.b${X} #${Imm-16-QI},[$Dst16An] */
23016 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
23017 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x767600 }
23019 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
23022 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23023 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76780000 }
23025 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
23028 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23029 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x767a0000 }
23031 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
23034 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23035 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x767b0000 }
23037 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
23040 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23041 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x767c0000 }
23043 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
23046 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23047 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x767e0000 }
23049 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16} */
23052 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
23053 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x767f0000 }
23055 /* rot.w r1h,$Dst32RnUnprefixedHI */
23058 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23059 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93f }
23061 /* rot.w r1h,$Dst32AnUnprefixedHI */
23064 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23065 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1bf }
23067 /* rot.w r1h,[$Dst32AnUnprefixed] */
23070 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23071 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13f }
23073 /* rot.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23076 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23077 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33f00 }
23079 /* rot.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23082 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23083 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53f0000 }
23085 /* rot.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23088 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23089 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73f0000 }
23091 /* rot.w r1h,${Dsp-16-u8}[sb] */
23094 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23095 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3bf00 }
23097 /* rot.w r1h,${Dsp-16-u16}[sb] */
23100 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23101 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5bf0000 }
23103 /* rot.w r1h,${Dsp-16-s8}[fb] */
23106 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23107 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ff00 }
23109 /* rot.w r1h,${Dsp-16-s16}[fb] */
23112 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23113 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ff0000 }
23115 /* rot.w r1h,${Dsp-16-u16} */
23118 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23119 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ff0000 }
23121 /* rot.w r1h,${Dsp-16-u24} */
23124 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23125 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7bf0000 }
23127 /* rot.b r1h,$Dst32RnUnprefixedQI */
23130 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23131 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83f }
23133 /* rot.b r1h,$Dst32AnUnprefixedQI */
23136 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23137 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0bf }
23139 /* rot.b r1h,[$Dst32AnUnprefixed] */
23142 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23143 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03f }
23145 /* rot.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23148 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23149 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23f00 }
23151 /* rot.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23154 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23155 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43f0000 }
23157 /* rot.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23160 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23161 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63f0000 }
23163 /* rot.b r1h,${Dsp-16-u8}[sb] */
23166 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23167 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2bf00 }
23169 /* rot.b r1h,${Dsp-16-u16}[sb] */
23172 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23173 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4bf0000 }
23175 /* rot.b r1h,${Dsp-16-s8}[fb] */
23178 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23179 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ff00 }
23181 /* rot.b r1h,${Dsp-16-s16}[fb] */
23184 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23185 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ff0000 }
23187 /* rot.b r1h,${Dsp-16-u16} */
23190 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23191 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ff0000 }
23193 /* rot.b r1h,${Dsp-16-u24} */
23196 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23197 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6bf0000 }
23199 /* rot.w r1h,$Dst16RnHI */
23202 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
23203 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7560 }
23205 /* rot.w r1h,$Dst16AnHI */
23208 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
23209 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7564 }
23211 /* rot.w r1h,[$Dst16An] */
23214 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23215 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7566 }
23217 /* rot.w r1h,${Dsp-16-u8}[$Dst16An] */
23220 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23221 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x756800 }
23223 /* rot.w r1h,${Dsp-16-u16}[$Dst16An] */
23226 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23227 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x756c0000 }
23229 /* rot.w r1h,${Dsp-16-u8}[sb] */
23232 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23233 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x756a00 }
23235 /* rot.w r1h,${Dsp-16-u16}[sb] */
23238 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23239 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x756e0000 }
23241 /* rot.w r1h,${Dsp-16-s8}[fb] */
23244 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23245 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x756b00 }
23247 /* rot.w r1h,${Dsp-16-u16} */
23250 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23251 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x756f0000 }
23253 /* rot.b r1h,$Dst16RnQI */
23256 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
23257 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7460 }
23259 /* rot.b r1h,$Dst16AnQI */
23262 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
23263 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7464 }
23265 /* rot.b r1h,[$Dst16An] */
23268 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23269 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7466 }
23271 /* rot.b r1h,${Dsp-16-u8}[$Dst16An] */
23274 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23275 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x746800 }
23277 /* rot.b r1h,${Dsp-16-u16}[$Dst16An] */
23280 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23281 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x746c0000 }
23283 /* rot.b r1h,${Dsp-16-u8}[sb] */
23286 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23287 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x746a00 }
23289 /* rot.b r1h,${Dsp-16-u16}[sb] */
23292 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23293 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x746e0000 }
23295 /* rot.b r1h,${Dsp-16-s8}[fb] */
23298 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23299 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x746b00 }
23301 /* rot.b r1h,${Dsp-16-u16} */
23304 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23305 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x746f0000 }
23307 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
23310 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23311 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe920 }
23313 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
23316 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23317 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1a0 }
23319 /* rot.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23322 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23323 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe120 }
23325 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23328 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23329 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe32000 }
23331 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23334 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23335 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5200000 }
23337 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23340 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23341 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7200000 }
23343 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23346 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23347 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3a000 }
23349 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23352 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23353 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5a00000 }
23355 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23358 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23359 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3e000 }
23361 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23364 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23365 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5e00000 }
23367 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23370 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23371 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7e00000 }
23373 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23376 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23377 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7a00000 }
23379 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
23382 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23383 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe820 }
23385 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
23388 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23389 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0a0 }
23391 /* rot.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23394 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23395 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe020 }
23397 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23400 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23401 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe22000 }
23403 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23406 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23407 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4200000 }
23409 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23412 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23413 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6200000 }
23415 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23418 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23419 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2a000 }
23421 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23424 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23425 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4a00000 }
23427 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23430 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23431 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2e000 }
23433 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23436 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23437 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4e00000 }
23439 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23442 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23443 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6e00000 }
23445 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23448 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23449 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6a00000 }
23451 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
23454 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
23455 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe100 }
23457 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
23460 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
23461 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe104 }
23463 /* rot.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
23466 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23467 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe106 }
23469 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23472 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23473 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe10800 }
23475 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23478 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23479 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe10c0000 }
23481 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23484 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23485 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe10a00 }
23487 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23490 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23491 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe10e0000 }
23493 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23496 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23497 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe10b00 }
23499 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23502 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23503 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe10f0000 }
23505 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
23508 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
23509 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe000 }
23511 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
23514 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
23515 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe004 }
23517 /* rot.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
23520 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23521 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe006 }
23523 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23526 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23527 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe00800 }
23529 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23532 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23533 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe00c0000 }
23535 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23538 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23539 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe00a00 }
23541 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23544 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23545 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe00e0000 }
23547 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23550 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23551 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe00b00 }
23553 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23556 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23557 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe00f0000 }
23559 /* rorc.w $Dst32RnUnprefixedHI */
23562 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23563 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92e }
23565 /* rorc.w $Dst32AnUnprefixedHI */
23568 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23569 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1ae }
23571 /* rorc.w [$Dst32AnUnprefixed] */
23574 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23575 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12e }
23577 /* rorc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23580 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23581 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32e00 }
23583 /* rorc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23586 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23587 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52e0000 }
23589 /* rorc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23592 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23593 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72e0000 }
23595 /* rorc.w ${Dsp-16-u8}[sb] */
23598 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23599 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3ae00 }
23601 /* rorc.w ${Dsp-16-u16}[sb] */
23604 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23605 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5ae0000 }
23607 /* rorc.w ${Dsp-16-s8}[fb] */
23610 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23611 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ee00 }
23613 /* rorc.w ${Dsp-16-s16}[fb] */
23616 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23617 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ee0000 }
23619 /* rorc.w ${Dsp-16-u16} */
23622 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23623 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ee0000 }
23625 /* rorc.w ${Dsp-16-u24} */
23628 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23629 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7ae0000 }
23631 /* rorc.b $Dst32RnUnprefixedQI */
23634 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23635 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82e }
23637 /* rorc.b $Dst32AnUnprefixedQI */
23640 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23641 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0ae }
23643 /* rorc.b [$Dst32AnUnprefixed] */
23646 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23647 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02e }
23649 /* rorc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23652 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23653 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22e00 }
23655 /* rorc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23658 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23659 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42e0000 }
23661 /* rorc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23664 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23665 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62e0000 }
23667 /* rorc.b ${Dsp-16-u8}[sb] */
23670 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23671 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2ae00 }
23673 /* rorc.b ${Dsp-16-u16}[sb] */
23676 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23677 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4ae0000 }
23679 /* rorc.b ${Dsp-16-s8}[fb] */
23682 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23683 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ee00 }
23685 /* rorc.b ${Dsp-16-s16}[fb] */
23688 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23689 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ee0000 }
23691 /* rorc.b ${Dsp-16-u16} */
23694 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23695 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ee0000 }
23697 /* rorc.b ${Dsp-16-u24} */
23700 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23701 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6ae0000 }
23703 /* rorc.w $Dst16RnHI */
23706 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23707 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77b0 }
23709 /* rorc.w $Dst16AnHI */
23712 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23713 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77b4 }
23715 /* rorc.w [$Dst16An] */
23718 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23719 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77b6 }
23721 /* rorc.w ${Dsp-16-u8}[$Dst16An] */
23724 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23725 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77b800 }
23727 /* rorc.w ${Dsp-16-u16}[$Dst16An] */
23730 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23731 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77bc0000 }
23733 /* rorc.w ${Dsp-16-u8}[sb] */
23736 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23737 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ba00 }
23739 /* rorc.w ${Dsp-16-u16}[sb] */
23742 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23743 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77be0000 }
23745 /* rorc.w ${Dsp-16-s8}[fb] */
23748 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23749 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77bb00 }
23751 /* rorc.w ${Dsp-16-u16} */
23754 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23755 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77bf0000 }
23757 /* rorc.b $Dst16RnQI */
23760 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
23761 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76b0 }
23763 /* rorc.b $Dst16AnQI */
23766 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
23767 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76b4 }
23769 /* rorc.b [$Dst16An] */
23772 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23773 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76b6 }
23775 /* rorc.b ${Dsp-16-u8}[$Dst16An] */
23778 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23779 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76b800 }
23781 /* rorc.b ${Dsp-16-u16}[$Dst16An] */
23784 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23785 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76bc0000 }
23787 /* rorc.b ${Dsp-16-u8}[sb] */
23790 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23791 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ba00 }
23793 /* rorc.b ${Dsp-16-u16}[sb] */
23796 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23797 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76be0000 }
23799 /* rorc.b ${Dsp-16-s8}[fb] */
23802 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23803 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76bb00 }
23805 /* rorc.b ${Dsp-16-u16} */
23808 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23809 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76bf0000 }
23811 /* rolc.w $Dst32RnUnprefixedHI */
23814 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23815 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92e }
23817 /* rolc.w $Dst32AnUnprefixedHI */
23820 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23821 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1ae }
23823 /* rolc.w [$Dst32AnUnprefixed] */
23826 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23827 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12e }
23829 /* rolc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23832 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23833 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32e00 }
23835 /* rolc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23838 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23839 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52e0000 }
23841 /* rolc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23844 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23845 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72e0000 }
23847 /* rolc.w ${Dsp-16-u8}[sb] */
23850 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23851 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3ae00 }
23853 /* rolc.w ${Dsp-16-u16}[sb] */
23856 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23857 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5ae0000 }
23859 /* rolc.w ${Dsp-16-s8}[fb] */
23862 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23863 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ee00 }
23865 /* rolc.w ${Dsp-16-s16}[fb] */
23868 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23869 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ee0000 }
23871 /* rolc.w ${Dsp-16-u16} */
23874 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23875 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ee0000 }
23877 /* rolc.w ${Dsp-16-u24} */
23880 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23881 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7ae0000 }
23883 /* rolc.b $Dst32RnUnprefixedQI */
23886 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23887 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82e }
23889 /* rolc.b $Dst32AnUnprefixedQI */
23892 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23893 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0ae }
23895 /* rolc.b [$Dst32AnUnprefixed] */
23898 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23899 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02e }
23901 /* rolc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23904 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23905 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22e00 }
23907 /* rolc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23910 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23911 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42e0000 }
23913 /* rolc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23916 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23917 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62e0000 }
23919 /* rolc.b ${Dsp-16-u8}[sb] */
23922 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23923 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2ae00 }
23925 /* rolc.b ${Dsp-16-u16}[sb] */
23928 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23929 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4ae0000 }
23931 /* rolc.b ${Dsp-16-s8}[fb] */
23934 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23935 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ee00 }
23937 /* rolc.b ${Dsp-16-s16}[fb] */
23940 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23941 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ee0000 }
23943 /* rolc.b ${Dsp-16-u16} */
23946 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23947 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ee0000 }
23949 /* rolc.b ${Dsp-16-u24} */
23952 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23953 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6ae0000 }
23955 /* rolc.w $Dst16RnHI */
23958 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23959 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77a0 }
23961 /* rolc.w $Dst16AnHI */
23964 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23965 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77a4 }
23967 /* rolc.w [$Dst16An] */
23970 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23971 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77a6 }
23973 /* rolc.w ${Dsp-16-u8}[$Dst16An] */
23976 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23977 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77a800 }
23979 /* rolc.w ${Dsp-16-u16}[$Dst16An] */
23982 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23983 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ac0000 }
23985 /* rolc.w ${Dsp-16-u8}[sb] */
23988 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23989 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77aa00 }
23991 /* rolc.w ${Dsp-16-u16}[sb] */
23994 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23995 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ae0000 }
23997 /* rolc.w ${Dsp-16-s8}[fb] */
24000 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24001 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77ab00 }
24003 /* rolc.w ${Dsp-16-u16} */
24006 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24007 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77af0000 }
24009 /* rolc.b $Dst16RnQI */
24012 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
24013 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76a0 }
24015 /* rolc.b $Dst16AnQI */
24018 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
24019 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76a4 }
24021 /* rolc.b [$Dst16An] */
24024 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24025 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76a6 }
24027 /* rolc.b ${Dsp-16-u8}[$Dst16An] */
24030 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24031 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76a800 }
24033 /* rolc.b ${Dsp-16-u16}[$Dst16An] */
24036 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24037 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ac0000 }
24039 /* rolc.b ${Dsp-16-u8}[sb] */
24042 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24043 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76aa00 }
24045 /* rolc.b ${Dsp-16-u16}[sb] */
24048 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24049 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ae0000 }
24051 /* rolc.b ${Dsp-16-s8}[fb] */
24054 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24055 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76ab00 }
24057 /* rolc.b ${Dsp-16-u16} */
24060 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24061 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76af0000 }
24063 /* pusha [$Dst32AnUnprefixed] */
24066 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24067 & ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xb001 }
24069 /* pusha ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24072 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24073 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xb20100 }
24075 /* pusha ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24078 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24079 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xb4010000 }
24081 /* pusha ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24084 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24085 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xb6010000 }
24087 /* pusha ${Dsp-16-u8}[sb] */
24090 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24091 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xb28100 }
24093 /* pusha ${Dsp-16-u16}[sb] */
24096 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24097 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xb4810000 }
24099 /* pusha ${Dsp-16-s8}[fb] */
24102 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24103 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xb2c100 }
24105 /* pusha ${Dsp-16-s16}[fb] */
24108 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24109 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xb4c10000 }
24111 /* pusha ${Dsp-16-u16} */
24114 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24115 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xb6c10000 }
24117 /* pusha ${Dsp-16-u24} */
24120 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24121 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xb6810000 }
24123 /* pusha [$Dst16An] */
24126 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24127 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0x7d96 }
24129 /* pusha ${Dsp-16-u8}[$Dst16An] */
24132 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24133 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0x7d9800 }
24135 /* pusha ${Dsp-16-u16}[$Dst16An] */
24138 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24139 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0x7d9c0000 }
24141 /* pusha ${Dsp-16-u8}[sb] */
24144 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24145 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0x7d9a00 }
24147 /* pusha ${Dsp-16-u16}[sb] */
24150 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24151 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0x7d9e0000 }
24153 /* pusha ${Dsp-16-s8}[fb] */
24156 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24157 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0x7d9b00 }
24159 /* pusha ${Dsp-16-u16} */
24162 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24163 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0x7d9f0000 }
24165 /* push.l $Dst32RnUnprefixedSI */
24168 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
24169 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xa801 }
24171 /* push.l $Dst32AnUnprefixedSI */
24174 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
24175 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa081 }
24177 /* push.l [$Dst32AnUnprefixed] */
24180 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24181 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xa001 }
24183 /* push.l ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24186 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24187 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa20100 }
24189 /* push.l ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24192 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24193 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4010000 }
24195 /* push.l ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24198 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24199 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6010000 }
24201 /* push.l ${Dsp-16-u8}[sb] */
24204 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24205 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa28100 }
24207 /* push.l ${Dsp-16-u16}[sb] */
24210 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24211 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4810000 }
24213 /* push.l ${Dsp-16-s8}[fb] */
24216 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24217 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2c100 }
24219 /* push.l ${Dsp-16-s16}[fb] */
24222 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24223 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4c10000 }
24225 /* push.l ${Dsp-16-u16} */
24228 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24229 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6c10000 }
24231 /* push.l ${Dsp-16-u24} */
24234 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24235 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6810000 }
24237 /* push.w${S} ${An16-push-S} */
24240 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24241 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xc2 }
24243 /* push.b${S} ${Rn16-push-S} */
24246 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24247 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x82 }
24249 /* push.w $Dst32RnUnprefixedHI */
24252 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24253 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90e }
24255 /* push.w $Dst32AnUnprefixedHI */
24258 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24259 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18e }
24261 /* push.w [$Dst32AnUnprefixed] */
24264 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24265 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10e }
24267 /* push.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24270 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24271 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30e00 }
24273 /* push.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24276 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24277 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50e0000 }
24279 /* push.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24282 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24283 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70e0000 }
24285 /* push.w ${Dsp-16-u8}[sb] */
24288 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24289 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38e00 }
24291 /* push.w ${Dsp-16-u16}[sb] */
24294 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24295 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58e0000 }
24297 /* push.w ${Dsp-16-s8}[fb] */
24300 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24301 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ce00 }
24303 /* push.w ${Dsp-16-s16}[fb] */
24306 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24307 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ce0000 }
24309 /* push.w ${Dsp-16-u16} */
24312 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24313 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ce0000 }
24315 /* push.w ${Dsp-16-u24} */
24318 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24319 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78e0000 }
24321 /* push.b $Dst32RnUnprefixedQI */
24324 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24325 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc80e }
24327 /* push.b $Dst32AnUnprefixedQI */
24330 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24331 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc08e }
24333 /* push.b [$Dst32AnUnprefixed] */
24336 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24337 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc00e }
24339 /* push.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24342 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24343 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20e00 }
24345 /* push.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24348 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24349 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40e0000 }
24351 /* push.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24354 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24355 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60e0000 }
24357 /* push.b ${Dsp-16-u8}[sb] */
24360 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24361 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28e00 }
24363 /* push.b ${Dsp-16-u16}[sb] */
24366 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24367 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48e0000 }
24369 /* push.b ${Dsp-16-s8}[fb] */
24372 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24373 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ce00 }
24375 /* push.b ${Dsp-16-s16}[fb] */
24378 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24379 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ce0000 }
24381 /* push.b ${Dsp-16-u16} */
24384 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24385 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ce0000 }
24387 /* push.b ${Dsp-16-u24} */
24390 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24391 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68e0000 }
24393 /* push.w${G} $Dst16RnHI */
24396 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24397 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7540 }
24399 /* push.w${G} $Dst16AnHI */
24402 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24403 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7544 }
24405 /* push.w${G} [$Dst16An] */
24408 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24409 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7546 }
24411 /* push.w${G} ${Dsp-16-u8}[$Dst16An] */
24414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24415 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x754800 }
24417 /* push.w${G} ${Dsp-16-u16}[$Dst16An] */
24420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24421 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x754c0000 }
24423 /* push.w${G} ${Dsp-16-u8}[sb] */
24426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24427 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x754a00 }
24429 /* push.w${G} ${Dsp-16-u16}[sb] */
24432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24433 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x754e0000 }
24435 /* push.w${G} ${Dsp-16-s8}[fb] */
24438 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24439 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x754b00 }
24441 /* push.w${G} ${Dsp-16-u16} */
24444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24445 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x754f0000 }
24447 /* push.b${G} $Dst16RnQI */
24450 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24451 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7440 }
24453 /* push.b${G} $Dst16AnQI */
24456 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24457 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7444 }
24459 /* push.b${G} [$Dst16An] */
24462 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24463 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7446 }
24465 /* push.b${G} ${Dsp-16-u8}[$Dst16An] */
24468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24469 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x744800 }
24471 /* push.b${G} ${Dsp-16-u16}[$Dst16An] */
24474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24475 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x744c0000 }
24477 /* push.b${G} ${Dsp-16-u8}[sb] */
24480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24481 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x744a00 }
24483 /* push.b${G} ${Dsp-16-u16}[sb] */
24486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24487 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x744e0000 }
24489 /* push.b${G} ${Dsp-16-s8}[fb] */
24492 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24493 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x744b00 }
24495 /* push.b${G} ${Dsp-16-u16} */
24498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24499 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x744f0000 }
24501 /* pop.w${S} ${An16-push-S} */
24504 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24505 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xd2 }
24507 /* pop.b${S} ${Rn16-push-S} */
24510 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24511 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x92 }
24513 /* pop.w $Dst32RnUnprefixedHI */
24516 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24517 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92f }
24519 /* pop.w $Dst32AnUnprefixedHI */
24522 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24523 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1af }
24525 /* pop.w [$Dst32AnUnprefixed] */
24528 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24529 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12f }
24531 /* pop.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24534 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24535 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32f00 }
24537 /* pop.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24540 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24541 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52f0000 }
24543 /* pop.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24546 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24547 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72f0000 }
24549 /* pop.w ${Dsp-16-u8}[sb] */
24552 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24553 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3af00 }
24555 /* pop.w ${Dsp-16-u16}[sb] */
24558 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24559 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5af0000 }
24561 /* pop.w ${Dsp-16-s8}[fb] */
24564 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24565 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ef00 }
24567 /* pop.w ${Dsp-16-s16}[fb] */
24570 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24571 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ef0000 }
24573 /* pop.w ${Dsp-16-u16} */
24576 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24577 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ef0000 }
24579 /* pop.w ${Dsp-16-u24} */
24582 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24583 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7af0000 }
24585 /* pop.b $Dst32RnUnprefixedQI */
24588 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24589 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82f }
24591 /* pop.b $Dst32AnUnprefixedQI */
24594 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24595 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0af }
24597 /* pop.b [$Dst32AnUnprefixed] */
24600 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24601 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02f }
24603 /* pop.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24606 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24607 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22f00 }
24609 /* pop.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24612 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24613 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42f0000 }
24615 /* pop.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24618 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24619 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62f0000 }
24621 /* pop.b ${Dsp-16-u8}[sb] */
24624 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24625 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2af00 }
24627 /* pop.b ${Dsp-16-u16}[sb] */
24630 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24631 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4af0000 }
24633 /* pop.b ${Dsp-16-s8}[fb] */
24636 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24637 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ef00 }
24639 /* pop.b ${Dsp-16-s16}[fb] */
24642 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24643 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ef0000 }
24645 /* pop.b ${Dsp-16-u16} */
24648 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24649 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ef0000 }
24651 /* pop.b ${Dsp-16-u24} */
24654 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24655 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6af0000 }
24657 /* pop.w${G} $Dst16RnHI */
24660 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24661 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75d0 }
24663 /* pop.w${G} $Dst16AnHI */
24666 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24667 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75d4 }
24669 /* pop.w${G} [$Dst16An] */
24672 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24673 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75d6 }
24675 /* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
24678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24679 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75d800 }
24681 /* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
24684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24685 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75dc0000 }
24687 /* pop.w${G} ${Dsp-16-u8}[sb] */
24690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24691 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75da00 }
24693 /* pop.w${G} ${Dsp-16-u16}[sb] */
24696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24697 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75de0000 }
24699 /* pop.w${G} ${Dsp-16-s8}[fb] */
24702 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24703 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75db00 }
24705 /* pop.w${G} ${Dsp-16-u16} */
24708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24709 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75df0000 }
24711 /* pop.b${G} $Dst16RnQI */
24714 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24715 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74d0 }
24717 /* pop.b${G} $Dst16AnQI */
24720 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24721 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74d4 }
24723 /* pop.b${G} [$Dst16An] */
24726 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24727 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74d6 }
24729 /* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
24732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24733 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74d800 }
24735 /* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
24738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24739 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74dc0000 }
24741 /* pop.b${G} ${Dsp-16-u8}[sb] */
24744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24745 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74da00 }
24747 /* pop.b${G} ${Dsp-16-u16}[sb] */
24750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24751 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74de0000 }
24753 /* pop.b${G} ${Dsp-16-s8}[fb] */
24756 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24757 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74db00 }
24759 /* pop.b${G} ${Dsp-16-u16} */
24762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24763 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74df0000 }
24765 /* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
24768 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
24769 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x18 }
24771 /* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
24774 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24775 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1900 }
24777 /* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
24780 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24781 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1a00 }
24783 /* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
24786 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
24787 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x1b0000 }
24789 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
24792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24793 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990500 }
24795 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
24798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24799 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992500 }
24801 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
24804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24805 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993500 }
24807 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
24810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24811 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918500 }
24813 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
24816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24817 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a500 }
24819 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
24822 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24823 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b500 }
24825 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
24828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24829 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910500 }
24831 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
24834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24835 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912500 }
24837 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
24840 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24841 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913500 }
24843 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24847 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93050000 }
24849 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24853 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93250000 }
24855 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24858 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24859 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93350000 }
24861 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24865 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95050000 }
24867 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24871 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95250000 }
24873 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24876 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24877 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95350000 }
24879 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24883 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97050000 }
24885 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24889 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97250000 }
24891 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24894 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24895 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97350000 }
24897 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
24900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24901 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93850000 }
24903 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
24906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24907 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a50000 }
24909 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
24912 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24913 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b50000 }
24915 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
24918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24919 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95850000 }
24921 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
24924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24925 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a50000 }
24927 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
24930 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24931 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b50000 }
24933 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
24936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24937 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c50000 }
24939 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
24942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24943 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e50000 }
24945 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
24948 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24949 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f50000 }
24951 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
24954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24955 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c50000 }
24957 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
24960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24961 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e50000 }
24963 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
24966 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24967 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f50000 }
24969 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
24972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
24973 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c50000 }
24975 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
24978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24979 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e50000 }
24981 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
24984 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24985 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f50000 }
24987 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
24990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
24991 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97850000 }
24993 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
24996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
24997 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a50000 }
24999 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
25002 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25003 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b50000 }
25005 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25009 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9050000 }
25011 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
25014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25015 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9250000 }
25017 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
25020 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25021 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9350000 }
25023 /* or.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
25026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25027 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9350000 }
25029 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25033 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1850000 }
25035 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
25038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25039 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a50000 }
25041 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
25044 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25045 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b50000 }
25047 /* or.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
25050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25051 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b50000 }
25053 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25057 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1050000 }
25059 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25063 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1250000 }
25065 /* or.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25068 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25069 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1350000 }
25071 /* or.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25075 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1350000 }
25077 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25081 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3050000 }
25083 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25087 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3250000 }
25089 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25092 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25093 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3350000 }
25095 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25099 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3350000 }
25101 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25105 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5050000 }
25107 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25111 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5250000 }
25113 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25116 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25117 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5350000 }
25119 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25123 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5350000 }
25125 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25129 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7050000 }
25131 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25135 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7250000 }
25137 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25140 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25141 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7350000 }
25143 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
25146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25147 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7350000 }
25149 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
25152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25153 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3850000 }
25155 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
25158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25159 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a50000 }
25161 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
25164 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25165 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b50000 }
25167 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
25170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25171 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b50000 }
25173 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
25176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25177 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5850000 }
25179 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
25182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25183 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a50000 }
25185 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
25188 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25189 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b50000 }
25191 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
25194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25195 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b50000 }
25197 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
25200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25201 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c50000 }
25203 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
25206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25207 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e50000 }
25209 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
25212 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25213 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f50000 }
25215 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
25218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25219 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f50000 }
25221 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
25224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25225 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c50000 }
25227 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
25230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25231 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e50000 }
25233 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
25236 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25237 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f50000 }
25239 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
25242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25243 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f50000 }
25245 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
25248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
25249 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c50000 }
25251 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
25254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25255 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e50000 }
25257 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
25260 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25261 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f50000 }
25263 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
25266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
25267 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f50000 }
25269 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
25272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
25273 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7850000 }
25275 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
25278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25279 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a50000 }
25281 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
25284 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25285 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b50000 }
25287 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
25290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
25291 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b50000 }
25293 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25297 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9050000 }
25299 /* or.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
25302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25303 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9250000 }
25305 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25309 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1850000 }
25311 /* or.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
25314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25315 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a50000 }
25317 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25321 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1050000 }
25323 /* or.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
25326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25327 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1250000 }
25329 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
25332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25333 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3050000 }
25335 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
25338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25339 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3250000 }
25341 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
25344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25345 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5050000 }
25347 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
25350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25351 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5250000 }
25353 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
25356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25357 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7050000 }
25359 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
25362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25363 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7250000 }
25365 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
25368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25369 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3850000 }
25371 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
25374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25375 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a50000 }
25377 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
25380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25381 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5850000 }
25383 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
25386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25387 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a50000 }
25389 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
25392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25393 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c50000 }
25395 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
25398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25399 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e50000 }
25401 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
25404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25405 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c50000 }
25407 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
25410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25411 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e50000 }
25413 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
25416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
25417 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c50000 }
25419 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
25422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
25423 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e50000 }
25425 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
25428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
25429 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7850000 }
25431 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
25434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
25435 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a50000 }
25437 /* or.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
25440 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25441 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc905 }
25443 /* or.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
25446 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25447 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8925 }
25449 /* or.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25452 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25453 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8905 }
25455 /* or.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
25458 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25459 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc185 }
25461 /* or.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
25464 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25465 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a5 }
25467 /* or.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25470 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25471 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8185 }
25473 /* or.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
25476 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25477 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc105 }
25479 /* or.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
25482 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25483 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8125 }
25485 /* or.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25488 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25489 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8105 }
25491 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25494 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25495 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30500 }
25497 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25500 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25501 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832500 }
25503 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
25506 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25507 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830500 }
25509 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25512 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25513 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5050000 }
25515 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25518 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25519 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85250000 }
25521 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
25524 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25525 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85050000 }
25527 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25530 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25531 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7050000 }
25533 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25536 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25537 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87250000 }
25539 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
25542 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25543 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87050000 }
25545 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
25548 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25549 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38500 }
25551 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
25554 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25555 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a500 }
25557 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
25560 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25561 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838500 }
25563 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
25566 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25567 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5850000 }
25569 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
25572 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25573 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a50000 }
25575 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
25578 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25579 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85850000 }
25581 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
25584 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25585 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c500 }
25587 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
25590 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25591 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e500 }
25593 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
25596 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25597 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c500 }
25599 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
25602 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25603 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c50000 }
25605 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
25608 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25609 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e50000 }
25611 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
25614 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25615 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c50000 }
25617 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
25620 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25621 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c50000 }
25623 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
25626 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25627 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e50000 }
25629 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
25632 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
25633 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c50000 }
25635 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
25638 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25639 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7850000 }
25641 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
25644 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25645 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a50000 }
25647 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
25650 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
25651 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87850000 }
25653 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25657 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980500 }
25659 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
25662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25663 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982500 }
25665 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
25668 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25669 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983500 }
25671 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25675 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908500 }
25677 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
25680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25681 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a500 }
25683 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
25686 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25687 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b500 }
25689 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25693 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900500 }
25695 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
25698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25699 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902500 }
25701 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
25704 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25705 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903500 }
25707 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25711 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92050000 }
25713 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25717 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92250000 }
25719 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25722 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25723 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92350000 }
25725 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25729 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94050000 }
25731 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25734 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25735 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94250000 }
25737 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25740 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25741 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94350000 }
25743 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25747 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96050000 }
25749 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25753 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96250000 }
25755 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25759 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96350000 }
25761 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
25764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25765 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92850000 }
25767 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
25770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25771 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a50000 }
25773 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
25776 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25777 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b50000 }
25779 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
25782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25783 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94850000 }
25785 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
25788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25789 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a50000 }
25791 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
25794 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25795 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b50000 }
25797 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
25800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25801 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c50000 }
25803 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
25806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25807 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e50000 }
25809 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
25812 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25813 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f50000 }
25815 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
25818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25819 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c50000 }
25821 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
25824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25825 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e50000 }
25827 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
25830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25831 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f50000 }
25833 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
25836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
25837 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c50000 }
25839 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
25842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25843 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e50000 }
25845 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
25848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25849 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f50000 }
25851 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
25854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
25855 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96850000 }
25857 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
25860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25861 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a50000 }
25863 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
25866 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25867 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b50000 }
25869 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25873 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8050000 }
25875 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
25878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25879 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8250000 }
25881 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
25884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25885 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8350000 }
25887 /* or.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
25890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25891 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8350000 }
25893 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25897 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0850000 }
25899 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
25902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25903 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a50000 }
25905 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
25908 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25909 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b50000 }
25911 /* or.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
25914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25915 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b50000 }
25917 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25921 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0050000 }
25923 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25927 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0250000 }
25929 /* or.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25932 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25933 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0350000 }
25935 /* or.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25939 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0350000 }
25941 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25945 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2050000 }
25947 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25951 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2250000 }
25953 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25956 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25957 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2350000 }
25959 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25963 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2350000 }
25965 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25969 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4050000 }
25971 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25975 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4250000 }
25977 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25980 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25981 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4350000 }
25983 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25987 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4350000 }
25989 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25993 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6050000 }
25995 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25999 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6250000 }
26001 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
26004 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26005 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6350000 }
26007 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
26010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26011 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6350000 }
26013 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
26016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26017 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2850000 }
26019 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26023 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a50000 }
26025 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
26028 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26029 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b50000 }
26031 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26035 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b50000 }
26037 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
26040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26041 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4850000 }
26043 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26047 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a50000 }
26049 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
26052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26053 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b50000 }
26055 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26059 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b50000 }
26061 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
26064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26065 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c50000 }
26067 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26071 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e50000 }
26073 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
26076 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26077 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f50000 }
26079 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26083 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f50000 }
26085 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
26088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26089 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c50000 }
26091 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
26094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26095 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e50000 }
26097 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
26100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26101 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f50000 }
26103 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
26106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26107 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f50000 }
26109 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
26112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
26113 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c50000 }
26115 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26119 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e50000 }
26121 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
26124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26125 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f50000 }
26127 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
26130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26131 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f50000 }
26133 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
26136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
26137 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6850000 }
26139 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
26142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26143 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a50000 }
26145 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
26148 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26149 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b50000 }
26151 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
26154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
26155 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b50000 }
26157 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26161 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8050000 }
26163 /* or.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
26166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26167 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8250000 }
26169 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26173 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0850000 }
26175 /* or.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
26178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26179 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a50000 }
26181 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26185 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0050000 }
26187 /* or.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
26190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26191 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0250000 }
26193 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
26196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26197 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2050000 }
26199 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
26202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26203 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2250000 }
26205 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
26208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26209 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4050000 }
26211 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
26214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26215 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4250000 }
26217 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
26220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26221 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6050000 }
26223 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
26226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26227 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6250000 }
26229 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
26232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26233 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2850000 }
26235 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
26238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26239 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a50000 }
26241 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
26244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26245 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4850000 }
26247 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
26250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26251 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a50000 }
26253 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
26256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26257 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c50000 }
26259 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
26262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26263 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e50000 }
26265 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
26268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26269 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c50000 }
26271 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
26274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26275 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e50000 }
26277 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
26280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
26281 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c50000 }
26283 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
26286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
26287 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e50000 }
26289 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
26292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
26293 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6850000 }
26295 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
26298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
26299 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a50000 }
26301 /* or.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
26304 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26305 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc805 }
26307 /* or.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
26310 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26311 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8825 }
26313 /* or.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26316 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26317 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8805 }
26319 /* or.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
26322 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26323 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc085 }
26325 /* or.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
26328 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26329 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a5 }
26331 /* or.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26334 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26335 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8085 }
26337 /* or.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
26340 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26341 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc005 }
26343 /* or.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
26346 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26347 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8025 }
26349 /* or.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26352 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26353 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8005 }
26355 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26358 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26359 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20500 }
26361 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26364 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26365 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822500 }
26367 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
26370 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26371 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820500 }
26373 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26376 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26377 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4050000 }
26379 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26382 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26383 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84250000 }
26385 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
26388 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26389 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84050000 }
26391 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26394 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26395 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6050000 }
26397 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26400 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26401 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86250000 }
26403 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
26406 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26407 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86050000 }
26409 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
26412 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26413 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28500 }
26415 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
26418 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26419 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a500 }
26421 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
26424 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26425 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828500 }
26427 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
26430 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26431 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4850000 }
26433 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
26436 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26437 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a50000 }
26439 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
26442 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26443 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84850000 }
26445 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
26448 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26449 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c500 }
26451 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
26454 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26455 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e500 }
26457 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
26460 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26461 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c500 }
26463 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
26466 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26467 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c50000 }
26469 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
26472 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26473 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e50000 }
26475 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
26478 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26479 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c50000 }
26481 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
26484 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26485 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c50000 }
26487 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
26490 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26491 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e50000 }
26493 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
26496 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
26497 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c50000 }
26499 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
26502 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26503 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6850000 }
26505 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
26508 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26509 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a50000 }
26511 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
26514 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
26515 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86850000 }
26517 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
26520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26521 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x998000 }
26523 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
26526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26527 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99a000 }
26529 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
26532 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26533 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x99b000 }
26535 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
26538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26539 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x998400 }
26541 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
26544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26545 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x99a400 }
26547 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
26550 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26551 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x99b400 }
26553 /* or.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
26556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26557 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x998600 }
26559 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
26562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26563 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x99a600 }
26565 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
26568 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26569 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x99b600 }
26571 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
26574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26575 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x99880000 }
26577 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
26580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26581 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99a80000 }
26583 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
26586 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26587 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99b80000 }
26589 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
26592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26593 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x998c0000 }
26595 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
26598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26599 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99ac0000 }
26601 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
26604 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26605 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99bc0000 }
26607 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
26610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26611 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x998a0000 }
26613 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
26616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26617 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99aa0000 }
26619 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
26622 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26623 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99ba0000 }
26625 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
26628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26629 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x998e0000 }
26631 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
26634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26635 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99ae0000 }
26637 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
26640 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26641 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99be0000 }
26643 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
26646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26647 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x998b0000 }
26649 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
26652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26653 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99ab0000 }
26655 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
26658 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26659 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99bb0000 }
26661 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
26664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
26665 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x998f0000 }
26667 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
26670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26671 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x99af0000 }
26673 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
26676 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26677 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x99bf0000 }
26679 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
26682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26683 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x99c00000 }
26685 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
26688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26689 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99e00000 }
26691 /* or.w${G} ${Dsp-16-u16},$Dst16RnHI */
26694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
26695 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x99f00000 }
26697 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
26700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26701 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x99c40000 }
26703 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
26706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26707 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x99e40000 }
26709 /* or.w${G} ${Dsp-16-u16},$Dst16AnHI */
26712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
26713 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x99f40000 }
26715 /* or.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
26718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26719 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x99c60000 }
26721 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
26724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26725 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x99e60000 }
26727 /* or.w${G} ${Dsp-16-u16},[$Dst16An] */
26730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
26731 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x99f60000 }
26733 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
26736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26737 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x99c80000 }
26739 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
26742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26743 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x99e80000 }
26745 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
26748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26749 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x99f80000 }
26751 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
26754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26755 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x99cc0000 }
26757 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
26760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26761 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x99ec0000 }
26763 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
26766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26767 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x99fc0000 }
26769 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
26772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26773 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ca0000 }
26775 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26779 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ea0000 }
26781 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26785 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x99fa0000 }
26787 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
26790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26791 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ce0000 }
26793 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26797 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ee0000 }
26799 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26803 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x99fe0000 }
26805 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
26808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26809 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99cb0000 }
26811 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26815 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99eb0000 }
26817 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26821 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x99fb0000 }
26823 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
26826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
26827 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x99cf0000 }
26829 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26833 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x99ef0000 }
26835 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
26838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26839 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x99ff0000 }
26841 /* or.w${G} $Src16RnHI,$Dst16RnHI */
26844 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
26845 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9900 }
26847 /* or.w${G} $Src16AnHI,$Dst16RnHI */
26850 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
26851 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9940 }
26853 /* or.w${G} [$Src16An],$Dst16RnHI */
26856 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26857 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9960 }
26859 /* or.w${G} $Src16RnHI,$Dst16AnHI */
26862 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
26863 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9904 }
26865 /* or.w${G} $Src16AnHI,$Dst16AnHI */
26868 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
26869 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9944 }
26871 /* or.w${G} [$Src16An],$Dst16AnHI */
26874 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26875 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9964 }
26877 /* or.w${G} $Src16RnHI,[$Dst16An] */
26880 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26881 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9906 }
26883 /* or.w${G} $Src16AnHI,[$Dst16An] */
26886 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26887 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9946 }
26889 /* or.w${G} [$Src16An],[$Dst16An] */
26892 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26893 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9966 }
26895 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
26898 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26899 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x990800 }
26901 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
26904 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26905 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x994800 }
26907 /* or.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
26910 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26911 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x996800 }
26913 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
26916 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26917 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x990c0000 }
26919 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
26922 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26923 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x994c0000 }
26925 /* or.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
26928 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26929 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x996c0000 }
26931 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
26934 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26935 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x990a00 }
26937 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
26940 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26941 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x994a00 }
26943 /* or.w${G} [$Src16An],${Dsp-16-u8}[sb] */
26946 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26947 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x996a00 }
26949 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
26952 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26953 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x990e0000 }
26955 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
26958 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26959 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x994e0000 }
26961 /* or.w${G} [$Src16An],${Dsp-16-u16}[sb] */
26964 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26965 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x996e0000 }
26967 /* or.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
26970 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26971 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x990b00 }
26973 /* or.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
26976 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26977 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x994b00 }
26979 /* or.w${G} [$Src16An],${Dsp-16-s8}[fb] */
26982 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26983 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x996b00 }
26985 /* or.w${G} $Src16RnHI,${Dsp-16-u16} */
26988 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
26989 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x990f0000 }
26991 /* or.w${G} $Src16AnHI,${Dsp-16-u16} */
26994 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
26995 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x994f0000 }
26997 /* or.w${G} [$Src16An],${Dsp-16-u16} */
27000 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
27001 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x996f0000 }
27003 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
27006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27007 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x988000 }
27009 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
27012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27013 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98a000 }
27015 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
27018 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27019 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x98b000 }
27021 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
27024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27025 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x988400 }
27027 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
27030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27031 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x98a400 }
27033 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
27036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27037 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x98b400 }
27039 /* or.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
27042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27043 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x988600 }
27045 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
27048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27049 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x98a600 }
27051 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
27054 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27055 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x98b600 }
27057 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
27060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27061 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x98880000 }
27063 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
27066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27067 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98a80000 }
27069 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
27072 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27073 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98b80000 }
27075 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
27078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27079 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x988c0000 }
27081 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
27084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27085 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98ac0000 }
27087 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
27090 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27091 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98bc0000 }
27093 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
27096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27097 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x988a0000 }
27099 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
27102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27103 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98aa0000 }
27105 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
27108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27109 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98ba0000 }
27111 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
27114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27115 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x988e0000 }
27117 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
27120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27121 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98ae0000 }
27123 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
27126 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27127 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98be0000 }
27129 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
27132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27133 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x988b0000 }
27135 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
27138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27139 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98ab0000 }
27141 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
27144 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27145 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98bb0000 }
27147 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
27150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
27151 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x988f0000 }
27153 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
27156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27157 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x98af0000 }
27159 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
27162 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27163 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x98bf0000 }
27165 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
27168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27169 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x98c00000 }
27171 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
27174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27175 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98e00000 }
27177 /* or.b${G} ${Dsp-16-u16},$Dst16RnQI */
27180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
27181 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x98f00000 }
27183 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
27186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27187 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x98c40000 }
27189 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
27192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27193 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x98e40000 }
27195 /* or.b${G} ${Dsp-16-u16},$Dst16AnQI */
27198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
27199 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x98f40000 }
27201 /* or.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
27204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27205 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x98c60000 }
27207 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
27210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27211 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x98e60000 }
27213 /* or.b${G} ${Dsp-16-u16},[$Dst16An] */
27216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
27217 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x98f60000 }
27219 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
27222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27223 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x98c80000 }
27225 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
27228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27229 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x98e80000 }
27231 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
27234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27235 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x98f80000 }
27237 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
27240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27241 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x98cc0000 }
27243 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
27246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27247 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x98ec0000 }
27249 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
27252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27253 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x98fc0000 }
27255 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
27258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27259 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ca0000 }
27261 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
27264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27265 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ea0000 }
27267 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
27270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27271 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x98fa0000 }
27273 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
27276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27277 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ce0000 }
27279 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
27282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27283 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ee0000 }
27285 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
27288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27289 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x98fe0000 }
27291 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
27294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27295 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98cb0000 }
27297 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
27300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27301 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98eb0000 }
27303 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
27306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27307 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x98fb0000 }
27309 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
27312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
27313 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x98cf0000 }
27315 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
27318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
27319 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x98ef0000 }
27321 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
27324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
27325 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x98ff0000 }
27327 /* or.b${G} $Src16RnQI,$Dst16RnQI */
27330 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
27331 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9800 }
27333 /* or.b${G} $Src16AnQI,$Dst16RnQI */
27336 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
27337 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9840 }
27339 /* or.b${G} [$Src16An],$Dst16RnQI */
27342 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27343 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9860 }
27345 /* or.b${G} $Src16RnQI,$Dst16AnQI */
27348 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
27349 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9804 }
27351 /* or.b${G} $Src16AnQI,$Dst16AnQI */
27354 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
27355 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9844 }
27357 /* or.b${G} [$Src16An],$Dst16AnQI */
27360 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27361 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9864 }
27363 /* or.b${G} $Src16RnQI,[$Dst16An] */
27366 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27367 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9806 }
27369 /* or.b${G} $Src16AnQI,[$Dst16An] */
27372 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27373 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9846 }
27375 /* or.b${G} [$Src16An],[$Dst16An] */
27378 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27379 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9866 }
27381 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
27384 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27385 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x980800 }
27387 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
27390 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27391 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x984800 }
27393 /* or.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
27396 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27397 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x986800 }
27399 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
27402 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27403 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x980c0000 }
27405 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
27408 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27409 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x984c0000 }
27411 /* or.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
27414 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27415 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x986c0000 }
27417 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
27420 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27421 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x980a00 }
27423 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
27426 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27427 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x984a00 }
27429 /* or.b${G} [$Src16An],${Dsp-16-u8}[sb] */
27432 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27433 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x986a00 }
27435 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
27438 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27439 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x980e0000 }
27441 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
27444 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27445 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x984e0000 }
27447 /* or.b${G} [$Src16An],${Dsp-16-u16}[sb] */
27450 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27451 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x986e0000 }
27453 /* or.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
27456 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27457 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x980b00 }
27459 /* or.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
27462 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27463 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x984b00 }
27465 /* or.b${G} [$Src16An],${Dsp-16-s8}[fb] */
27468 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27469 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x986b00 }
27471 /* or.b${G} $Src16RnQI,${Dsp-16-u16} */
27474 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
27475 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x980f0000 }
27477 /* or.b${G} $Src16AnQI,${Dsp-16-u16} */
27480 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
27481 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x984f0000 }
27483 /* or.b${G} [$Src16An],${Dsp-16-u16} */
27486 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
27487 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x986f0000 }
27489 /* or.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
27492 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27493 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x65000000 }
27495 /* or.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
27498 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27499 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x75000000 }
27501 /* or.w${S} #${Imm-24-HI},${Dsp-8-u16} */
27504 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
27505 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x55000000 }
27507 /* or.w${S} #${Imm-8-HI},r0 */
27510 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
27511 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x450000 }
27513 /* or.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
27516 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27517 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x640000 }
27519 /* or.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
27522 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27523 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x740000 }
27525 /* or.b${S} #${Imm-24-QI},${Dsp-8-u16} */
27528 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
27529 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x54000000 }
27531 /* or.b${S} #${Imm-8-QI},r0l */
27534 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27535 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4400 }
27537 /* or.b${S} #${Imm-8-QI},r0l */
27540 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27541 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9c00 }
27543 /* or.b${S} #${Imm-8-QI},r0h */
27546 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
27547 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9b00 }
27549 /* or.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
27552 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27553 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x9d0000 }
27555 /* or.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
27558 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27559 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x9e0000 }
27561 /* or.b${S} #${Imm-8-QI},${Dsp-16-u16} */
27564 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
27565 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x9f000000 }
27567 /* or.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
27570 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
27571 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892f0000 }
27573 /* or.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
27576 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
27577 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81af0000 }
27579 /* or.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
27582 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27583 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812f0000 }
27585 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27588 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27589 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832f0000 }
27591 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27594 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27595 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83af0000 }
27597 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27600 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27601 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ef0000 }
27603 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27606 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27607 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852f0000 }
27609 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27612 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27613 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85af0000 }
27615 /* or.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
27618 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27619 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ef0000 }
27621 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27624 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27625 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ef0000 }
27627 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27630 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27631 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872f0000 }
27633 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24} */
27636 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
27637 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87af0000 }
27639 /* or.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
27642 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
27643 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882f00 }
27645 /* or.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
27648 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
27649 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80af00 }
27651 /* or.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
27654 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27655 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802f00 }
27657 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27660 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27661 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822f0000 }
27663 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27666 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27667 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82af0000 }
27669 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27672 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27673 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ef0000 }
27675 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27678 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27679 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842f0000 }
27681 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27684 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27685 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84af0000 }
27687 /* or.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
27690 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27691 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ef0000 }
27693 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27696 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27697 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ef0000 }
27699 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27702 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27703 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862f0000 }
27705 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24} */
27708 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
27709 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86af0000 }
27711 /* or.w${G} #${Imm-16-HI},$Dst16RnHI */
27714 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
27715 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77300000 }
27717 /* or.w${G} #${Imm-16-HI},$Dst16AnHI */
27720 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
27721 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77340000 }
27723 /* or.w${G} #${Imm-16-HI},[$Dst16An] */
27726 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
27727 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77360000 }
27729 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
27732 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27733 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77380000 }
27735 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27738 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27739 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x773a0000 }
27741 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27744 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27745 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x773b0000 }
27747 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
27750 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27751 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x773c0000 }
27753 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27756 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27757 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x773e0000 }
27759 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27762 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27763 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x773f0000 }
27765 /* or.b${G} #${Imm-16-QI},$Dst16RnQI */
27768 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
27769 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x763000 }
27771 /* or.b${G} #${Imm-16-QI},$Dst16AnQI */
27774 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
27775 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x763400 }
27777 /* or.b${G} #${Imm-16-QI},[$Dst16An] */
27780 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
27781 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x763600 }
27783 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
27786 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27787 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76380000 }
27789 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27792 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27793 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x763a0000 }
27795 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27798 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27799 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x763b0000 }
27801 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
27804 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27805 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x763c0000 }
27807 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27810 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27811 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x763e0000 }
27813 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27816 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27817 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x763f0000 }
27822 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
27823 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xbc }
27828 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
27829 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xbb }
27831 /* not.b:s ${Dsp-8-u8}[sb] */
27834 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27835 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xbd00 }
27837 /* not.b:s ${Dsp-8-s8}[fb] */
27840 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27841 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xbe00 }
27843 /* not.b:s ${Dsp-8-u16} */
27846 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
27847 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xbf0000 }
27849 /* not.w${G} $Dst32RnUnprefixedHI */
27852 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
27853 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91e }
27855 /* not.w${G} $Dst32AnUnprefixedHI */
27858 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
27859 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19e }
27861 /* not.w${G} [$Dst32AnUnprefixed] */
27864 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27865 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11e }
27867 /* not.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27871 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31e00 }
27873 /* not.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27877 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51e0000 }
27879 /* not.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27883 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71e0000 }
27885 /* not.w${G} ${Dsp-16-u8}[sb] */
27888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27889 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39e00 }
27891 /* not.w${G} ${Dsp-16-u16}[sb] */
27894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27895 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59e0000 }
27897 /* not.w${G} ${Dsp-16-s8}[fb] */
27900 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27901 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3de00 }
27903 /* not.w${G} ${Dsp-16-s16}[fb] */
27906 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27907 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5de0000 }
27909 /* not.w${G} ${Dsp-16-u16} */
27912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27913 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7de0000 }
27915 /* not.w${G} ${Dsp-16-u24} */
27918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27919 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79e0000 }
27921 /* not.b${G} $Dst32RnUnprefixedQI */
27924 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
27925 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81e }
27927 /* not.b${G} $Dst32AnUnprefixedQI */
27930 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
27931 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09e }
27933 /* not.b${G} [$Dst32AnUnprefixed] */
27936 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27937 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01e }
27939 /* not.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27943 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21e00 }
27945 /* not.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27949 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41e0000 }
27951 /* not.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27955 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61e0000 }
27957 /* not.b${G} ${Dsp-16-u8}[sb] */
27960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27961 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29e00 }
27963 /* not.b${G} ${Dsp-16-u16}[sb] */
27966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27967 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49e0000 }
27969 /* not.b${G} ${Dsp-16-s8}[fb] */
27972 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27973 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2de00 }
27975 /* not.b${G} ${Dsp-16-s16}[fb] */
27978 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27979 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4de0000 }
27981 /* not.b${G} ${Dsp-16-u16} */
27984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27985 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6de0000 }
27987 /* not.b${G} ${Dsp-16-u24} */
27990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27991 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69e0000 }
27993 /* not.w${G} $Dst16RnHI */
27996 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
27997 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7570 }
27999 /* not.w${G} $Dst16AnHI */
28002 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
28003 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7574 }
28005 /* not.w${G} [$Dst16An] */
28008 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28009 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7576 }
28011 /* not.w${G} ${Dsp-16-u8}[$Dst16An] */
28014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28015 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x757800 }
28017 /* not.w${G} ${Dsp-16-u16}[$Dst16An] */
28020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28021 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x757c0000 }
28023 /* not.w${G} ${Dsp-16-u8}[sb] */
28026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28027 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x757a00 }
28029 /* not.w${G} ${Dsp-16-u16}[sb] */
28032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28033 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x757e0000 }
28035 /* not.w${G} ${Dsp-16-s8}[fb] */
28038 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28039 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x757b00 }
28041 /* not.w${G} ${Dsp-16-u16} */
28044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28045 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x757f0000 }
28047 /* not.b${G} $Dst16RnQI */
28050 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
28051 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7470 }
28053 /* not.b${G} $Dst16AnQI */
28056 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
28057 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7474 }
28059 /* not.b${G} [$Dst16An] */
28062 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28063 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7476 }
28065 /* not.b${G} ${Dsp-16-u8}[$Dst16An] */
28068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28069 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x747800 }
28071 /* not.b${G} ${Dsp-16-u16}[$Dst16An] */
28074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28075 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x747c0000 }
28077 /* not.b${G} ${Dsp-16-u8}[sb] */
28080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28081 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x747a00 }
28083 /* not.b${G} ${Dsp-16-u16}[sb] */
28086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28087 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x747e0000 }
28089 /* not.b${G} ${Dsp-16-s8}[fb] */
28092 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28093 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x747b00 }
28095 /* not.b${G} ${Dsp-16-u16} */
28098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28099 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x747f0000 }
28101 /* neg.w $Dst32RnUnprefixedHI */
28104 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
28105 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92f }
28107 /* neg.w $Dst32AnUnprefixedHI */
28110 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
28111 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1af }
28113 /* neg.w [$Dst32AnUnprefixed] */
28116 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28117 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12f }
28119 /* neg.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28122 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28123 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32f00 }
28125 /* neg.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28128 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28129 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52f0000 }
28131 /* neg.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28134 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28135 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72f0000 }
28137 /* neg.w ${Dsp-16-u8}[sb] */
28140 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28141 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3af00 }
28143 /* neg.w ${Dsp-16-u16}[sb] */
28146 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28147 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5af0000 }
28149 /* neg.w ${Dsp-16-s8}[fb] */
28152 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28153 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ef00 }
28155 /* neg.w ${Dsp-16-s16}[fb] */
28158 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28159 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ef0000 }
28161 /* neg.w ${Dsp-16-u16} */
28164 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28165 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ef0000 }
28167 /* neg.w ${Dsp-16-u24} */
28170 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28171 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7af0000 }
28173 /* neg.b $Dst32RnUnprefixedQI */
28176 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
28177 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82f }
28179 /* neg.b $Dst32AnUnprefixedQI */
28182 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
28183 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0af }
28185 /* neg.b [$Dst32AnUnprefixed] */
28188 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28189 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02f }
28191 /* neg.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28194 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28195 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22f00 }
28197 /* neg.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28200 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28201 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42f0000 }
28203 /* neg.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28206 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28207 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62f0000 }
28209 /* neg.b ${Dsp-16-u8}[sb] */
28212 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28213 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2af00 }
28215 /* neg.b ${Dsp-16-u16}[sb] */
28218 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28219 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4af0000 }
28221 /* neg.b ${Dsp-16-s8}[fb] */
28224 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28225 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ef00 }
28227 /* neg.b ${Dsp-16-s16}[fb] */
28230 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28231 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ef0000 }
28233 /* neg.b ${Dsp-16-u16} */
28236 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28237 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ef0000 }
28239 /* neg.b ${Dsp-16-u24} */
28242 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28243 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6af0000 }
28245 /* neg.w $Dst16RnHI */
28248 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
28249 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7550 }
28251 /* neg.w $Dst16AnHI */
28254 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
28255 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7554 }
28257 /* neg.w [$Dst16An] */
28260 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28261 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7556 }
28263 /* neg.w ${Dsp-16-u8}[$Dst16An] */
28266 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28267 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x755800 }
28269 /* neg.w ${Dsp-16-u16}[$Dst16An] */
28272 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28273 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x755c0000 }
28275 /* neg.w ${Dsp-16-u8}[sb] */
28278 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28279 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x755a00 }
28281 /* neg.w ${Dsp-16-u16}[sb] */
28284 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28285 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x755e0000 }
28287 /* neg.w ${Dsp-16-s8}[fb] */
28290 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28291 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x755b00 }
28293 /* neg.w ${Dsp-16-u16} */
28296 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28297 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x755f0000 }
28299 /* neg.b $Dst16RnQI */
28302 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
28303 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7450 }
28305 /* neg.b $Dst16AnQI */
28308 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
28309 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7454 }
28311 /* neg.b [$Dst16An] */
28314 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28315 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7456 }
28317 /* neg.b ${Dsp-16-u8}[$Dst16An] */
28320 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28321 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x745800 }
28323 /* neg.b ${Dsp-16-u16}[$Dst16An] */
28326 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28327 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x745c0000 }
28329 /* neg.b ${Dsp-16-u8}[sb] */
28332 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28333 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x745a00 }
28335 /* neg.b ${Dsp-16-u16}[sb] */
28338 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28339 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x745e0000 }
28341 /* neg.b ${Dsp-16-s8}[fb] */
28344 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28345 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x745b00 }
28347 /* neg.b ${Dsp-16-u16} */
28350 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28351 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x745f0000 }
28353 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28357 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990400 }
28359 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
28362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28363 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992400 }
28365 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
28368 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28369 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993400 }
28371 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28375 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918400 }
28377 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
28380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28381 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a400 }
28383 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
28386 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28387 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b400 }
28389 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28393 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910400 }
28395 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
28398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28399 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912400 }
28401 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
28404 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28405 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913400 }
28407 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28411 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93040000 }
28413 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28417 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93240000 }
28419 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28422 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28423 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93340000 }
28425 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28429 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95040000 }
28431 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28435 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95240000 }
28437 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28441 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95340000 }
28443 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28447 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97040000 }
28449 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28453 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97240000 }
28455 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28458 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28459 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97340000 }
28461 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
28464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28465 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93840000 }
28467 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
28470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28471 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a40000 }
28473 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
28476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28477 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b40000 }
28479 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
28482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28483 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95840000 }
28485 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
28488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28489 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a40000 }
28491 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
28494 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28495 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b40000 }
28497 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
28500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28501 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c40000 }
28503 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
28506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28507 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e40000 }
28509 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
28512 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28513 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f40000 }
28515 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
28518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28519 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c40000 }
28521 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
28524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28525 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e40000 }
28527 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
28530 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28531 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f40000 }
28533 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
28536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
28537 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c40000 }
28539 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
28542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28543 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e40000 }
28545 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
28548 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28549 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f40000 }
28551 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
28554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
28555 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97840000 }
28557 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
28560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28561 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a40000 }
28563 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
28566 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28567 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b40000 }
28569 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28573 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9040000 }
28575 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
28578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28579 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9240000 }
28581 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
28584 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28585 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9340000 }
28587 /* mulu.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
28590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28591 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9340000 }
28593 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28597 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1840000 }
28599 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
28602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28603 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a40000 }
28605 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
28608 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28609 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b40000 }
28611 /* mulu.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
28614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28615 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b40000 }
28617 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28621 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1040000 }
28623 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
28626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28627 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1240000 }
28629 /* mulu.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
28632 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28633 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1340000 }
28635 /* mulu.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
28638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28639 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1340000 }
28641 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28645 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3040000 }
28647 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28651 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3240000 }
28653 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28656 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28657 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3340000 }
28659 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
28662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28663 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3340000 }
28665 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28669 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5040000 }
28671 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28675 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5240000 }
28677 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28680 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28681 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5340000 }
28683 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
28686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28687 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5340000 }
28689 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28693 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7040000 }
28695 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28699 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7240000 }
28701 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28704 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28705 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7340000 }
28707 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
28710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28711 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7340000 }
28713 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
28716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28717 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3840000 }
28719 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
28722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28723 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a40000 }
28725 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
28728 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28729 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b40000 }
28731 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
28734 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28735 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b40000 }
28737 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
28740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28741 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5840000 }
28743 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
28746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28747 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a40000 }
28749 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
28752 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28753 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b40000 }
28755 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
28758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28759 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b40000 }
28761 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
28764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28765 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c40000 }
28767 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
28770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28771 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e40000 }
28773 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
28776 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28777 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f40000 }
28779 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
28782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28783 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f40000 }
28785 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
28788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28789 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c40000 }
28791 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
28794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28795 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e40000 }
28797 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
28800 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28801 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f40000 }
28803 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
28806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28807 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f40000 }
28809 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
28812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
28813 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c40000 }
28815 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
28818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28819 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e40000 }
28821 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
28824 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28825 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f40000 }
28827 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
28830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
28831 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f40000 }
28833 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
28836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
28837 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7840000 }
28839 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
28842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28843 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a40000 }
28845 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
28848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28849 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b40000 }
28851 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
28854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
28855 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b40000 }
28857 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28861 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9040000 }
28863 /* mulu.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
28866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28867 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9240000 }
28869 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28873 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1840000 }
28875 /* mulu.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
28878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28879 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a40000 }
28881 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28885 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1040000 }
28887 /* mulu.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
28890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28891 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1240000 }
28893 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
28896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28897 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3040000 }
28899 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
28902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28903 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3240000 }
28905 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
28908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28909 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5040000 }
28911 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
28914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28915 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5240000 }
28917 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
28920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28921 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7040000 }
28923 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
28926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28927 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7240000 }
28929 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
28932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28933 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3840000 }
28935 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
28938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28939 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a40000 }
28941 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
28944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28945 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5840000 }
28947 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
28950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28951 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a40000 }
28953 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
28956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28957 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c40000 }
28959 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
28962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28963 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e40000 }
28965 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
28968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28969 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c40000 }
28971 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
28974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28975 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e40000 }
28977 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
28980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
28981 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c40000 }
28983 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
28986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
28987 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e40000 }
28989 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
28992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
28993 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7840000 }
28995 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
28998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
28999 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a40000 }
29001 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
29004 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29005 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc904 }
29007 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
29010 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29011 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8924 }
29013 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
29016 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29017 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8904 }
29019 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
29022 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29023 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc184 }
29025 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
29028 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29029 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a4 }
29031 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
29034 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29035 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8184 }
29037 /* mulu.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
29040 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29041 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc104 }
29043 /* mulu.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
29046 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29047 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8124 }
29049 /* mulu.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29052 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29053 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8104 }
29055 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29058 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29059 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30400 }
29061 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29064 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29065 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832400 }
29067 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29070 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29071 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830400 }
29073 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29076 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29077 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5040000 }
29079 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29082 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29083 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85240000 }
29085 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29088 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29089 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85040000 }
29091 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29094 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29095 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7040000 }
29097 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29100 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29101 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87240000 }
29103 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29106 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29107 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87040000 }
29109 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
29112 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29113 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38400 }
29115 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
29118 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29119 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a400 }
29121 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29124 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29125 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838400 }
29127 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
29130 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29131 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5840000 }
29133 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
29136 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29137 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a40000 }
29139 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
29142 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29143 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85840000 }
29145 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
29148 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29149 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c400 }
29151 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
29154 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29155 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e400 }
29157 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
29160 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29161 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c400 }
29163 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
29166 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29167 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c40000 }
29169 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
29172 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29173 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e40000 }
29175 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
29178 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29179 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c40000 }
29181 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
29184 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29185 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c40000 }
29187 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
29190 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29191 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e40000 }
29193 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
29196 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
29197 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c40000 }
29199 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
29202 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29203 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7840000 }
29205 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
29208 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29209 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a40000 }
29211 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
29214 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
29215 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87840000 }
29217 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29221 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980400 }
29223 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
29226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29227 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982400 }
29229 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
29232 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29233 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983400 }
29235 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29239 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908400 }
29241 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
29244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29245 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a400 }
29247 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
29250 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29251 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b400 }
29253 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29257 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900400 }
29259 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
29262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29263 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902400 }
29265 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
29268 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29269 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903400 }
29271 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29275 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92040000 }
29277 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29281 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92240000 }
29283 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29286 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29287 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92340000 }
29289 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29293 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94040000 }
29295 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29299 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94240000 }
29301 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29304 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29305 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94340000 }
29307 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29311 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96040000 }
29313 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29317 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96240000 }
29319 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29322 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29323 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96340000 }
29325 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
29328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29329 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92840000 }
29331 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
29334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29335 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a40000 }
29337 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
29340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29341 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b40000 }
29343 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
29346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29347 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94840000 }
29349 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
29352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29353 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a40000 }
29355 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
29358 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29359 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b40000 }
29361 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
29364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29365 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c40000 }
29367 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
29370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29371 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e40000 }
29373 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
29376 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29377 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f40000 }
29379 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
29382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29383 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c40000 }
29385 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
29388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29389 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e40000 }
29391 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
29394 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29395 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f40000 }
29397 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
29400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
29401 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c40000 }
29403 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
29406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29407 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e40000 }
29409 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
29412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29413 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f40000 }
29415 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
29418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
29419 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96840000 }
29421 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
29424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29425 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a40000 }
29427 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
29430 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29431 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b40000 }
29433 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29437 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8040000 }
29439 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
29442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29443 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8240000 }
29445 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
29448 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29449 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8340000 }
29451 /* mulu.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
29454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29455 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8340000 }
29457 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29461 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0840000 }
29463 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
29466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29467 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a40000 }
29469 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
29472 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29473 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b40000 }
29475 /* mulu.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
29478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29479 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b40000 }
29481 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29485 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0040000 }
29487 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
29490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29491 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0240000 }
29493 /* mulu.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
29496 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29497 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0340000 }
29499 /* mulu.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
29502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29503 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0340000 }
29505 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29509 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2040000 }
29511 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29515 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2240000 }
29517 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29520 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29521 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2340000 }
29523 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
29526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29527 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2340000 }
29529 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29533 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4040000 }
29535 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29539 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4240000 }
29541 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29544 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29545 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4340000 }
29547 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
29550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29551 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4340000 }
29553 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29557 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6040000 }
29559 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29563 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6240000 }
29565 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29568 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29569 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6340000 }
29571 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
29574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29575 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6340000 }
29577 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
29580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29581 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2840000 }
29583 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
29586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29587 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a40000 }
29589 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
29592 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29593 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b40000 }
29595 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
29598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29599 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b40000 }
29601 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
29604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29605 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4840000 }
29607 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
29610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29611 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a40000 }
29613 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
29616 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29617 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b40000 }
29619 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
29622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29623 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b40000 }
29625 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
29628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29629 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c40000 }
29631 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
29634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29635 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e40000 }
29637 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
29640 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29641 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f40000 }
29643 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
29646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29647 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f40000 }
29649 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
29652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29653 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c40000 }
29655 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
29658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29659 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e40000 }
29661 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
29664 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29665 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f40000 }
29667 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
29670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29671 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f40000 }
29673 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
29676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
29677 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c40000 }
29679 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
29682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29683 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e40000 }
29685 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
29688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29689 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f40000 }
29691 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
29694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
29695 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f40000 }
29697 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
29700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
29701 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6840000 }
29703 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
29706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29707 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a40000 }
29709 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
29712 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29713 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b40000 }
29715 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
29718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
29719 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b40000 }
29721 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29725 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8040000 }
29727 /* mulu.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
29730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29731 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8240000 }
29733 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29737 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0840000 }
29739 /* mulu.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
29742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29743 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a40000 }
29745 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29749 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0040000 }
29751 /* mulu.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
29754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29755 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0240000 }
29757 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
29760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29761 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2040000 }
29763 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
29766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29767 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2240000 }
29769 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
29772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29773 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4040000 }
29775 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
29778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29779 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4240000 }
29781 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
29784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29785 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6040000 }
29787 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
29790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29791 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6240000 }
29793 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
29796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29797 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2840000 }
29799 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
29802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29803 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a40000 }
29805 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
29808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29809 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4840000 }
29811 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
29814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29815 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a40000 }
29817 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
29820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29821 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c40000 }
29823 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
29826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29827 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e40000 }
29829 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
29832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29833 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c40000 }
29835 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
29838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29839 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e40000 }
29841 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
29844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
29845 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c40000 }
29847 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
29850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
29851 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e40000 }
29853 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
29856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
29857 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6840000 }
29859 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
29862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
29863 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a40000 }
29865 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
29868 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29869 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc804 }
29871 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
29874 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29875 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8824 }
29877 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29880 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29881 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8804 }
29883 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
29886 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29887 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc084 }
29889 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
29892 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29893 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a4 }
29895 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29898 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29899 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8084 }
29901 /* mulu.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
29904 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29905 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc004 }
29907 /* mulu.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
29910 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29911 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8024 }
29913 /* mulu.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29916 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29917 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8004 }
29919 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29922 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29923 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20400 }
29925 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29928 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29929 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822400 }
29931 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29934 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29935 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820400 }
29937 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29940 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29941 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4040000 }
29943 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29946 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29947 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84240000 }
29949 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29952 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29953 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84040000 }
29955 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29958 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29959 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6040000 }
29961 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29964 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29965 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86240000 }
29967 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29970 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29971 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86040000 }
29973 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
29976 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29977 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28400 }
29979 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
29982 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29983 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a400 }
29985 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29988 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29989 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828400 }
29991 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
29994 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29995 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4840000 }
29997 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
30000 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30001 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a40000 }
30003 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
30006 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30007 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84840000 }
30009 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
30012 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30013 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c400 }
30015 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
30018 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30019 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e400 }
30021 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
30024 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30025 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c400 }
30027 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
30030 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30031 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c40000 }
30033 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
30036 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30037 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e40000 }
30039 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
30042 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30043 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c40000 }
30045 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
30048 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30049 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c40000 }
30051 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
30054 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30055 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e40000 }
30057 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
30060 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
30061 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c40000 }
30063 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
30066 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30067 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6840000 }
30069 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
30072 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30073 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a40000 }
30075 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
30078 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
30079 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86840000 }
30081 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
30084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30085 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x718000 }
30087 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
30090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30091 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71a000 }
30093 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
30096 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30097 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x71b000 }
30099 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
30102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30103 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x718400 }
30105 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
30108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30109 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x71a400 }
30111 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
30114 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30115 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x71b400 }
30117 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30121 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x718600 }
30123 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30127 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x71a600 }
30129 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30133 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x71b600 }
30135 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30139 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x71880000 }
30141 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30145 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71a80000 }
30147 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30150 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30151 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71b80000 }
30153 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30157 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x718c0000 }
30159 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30163 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71ac0000 }
30165 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30168 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30169 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71bc0000 }
30171 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30175 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x718a0000 }
30177 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30181 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71aa0000 }
30183 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30186 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30187 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71ba0000 }
30189 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30193 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x718e0000 }
30195 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30199 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71ae0000 }
30201 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30204 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30205 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71be0000 }
30207 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30211 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x718b0000 }
30213 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30217 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71ab0000 }
30219 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30222 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30223 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71bb0000 }
30225 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30229 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x718f0000 }
30231 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30235 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x71af0000 }
30237 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30240 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30241 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x71bf0000 }
30243 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
30246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30247 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x71c00000 }
30249 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
30252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30253 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71e00000 }
30255 /* mulu.w${G} ${Dsp-16-u16},$Dst16RnHI */
30258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
30259 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x71f00000 }
30261 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
30264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30265 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x71c40000 }
30267 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
30270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30271 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x71e40000 }
30273 /* mulu.w${G} ${Dsp-16-u16},$Dst16AnHI */
30276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
30277 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x71f40000 }
30279 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30283 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x71c60000 }
30285 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30289 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x71e60000 }
30291 /* mulu.w${G} ${Dsp-16-u16},[$Dst16An] */
30294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30295 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x71f60000 }
30297 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30301 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x71c80000 }
30303 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30307 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x71e80000 }
30309 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30313 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x71f80000 }
30315 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30319 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x71cc0000 }
30321 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30325 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x71ec0000 }
30327 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30331 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x71fc0000 }
30333 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30337 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ca0000 }
30339 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30343 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ea0000 }
30345 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30349 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x71fa0000 }
30351 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30355 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ce0000 }
30357 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30361 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ee0000 }
30363 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30367 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x71fe0000 }
30369 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30373 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71cb0000 }
30375 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30379 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71eb0000 }
30381 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30385 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x71fb0000 }
30387 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30391 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x71cf0000 }
30393 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30397 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x71ef0000 }
30399 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
30402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30403 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x71ff0000 }
30405 /* mulu.w${G} $Src16RnHI,$Dst16RnHI */
30408 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
30409 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7100 }
30411 /* mulu.w${G} $Src16AnHI,$Dst16RnHI */
30414 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
30415 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7140 }
30417 /* mulu.w${G} [$Src16An],$Dst16RnHI */
30420 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30421 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7160 }
30423 /* mulu.w${G} $Src16RnHI,$Dst16AnHI */
30426 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
30427 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7104 }
30429 /* mulu.w${G} $Src16AnHI,$Dst16AnHI */
30432 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
30433 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7144 }
30435 /* mulu.w${G} [$Src16An],$Dst16AnHI */
30438 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30439 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7164 }
30441 /* mulu.w${G} $Src16RnHI,[$Dst16An] */
30444 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30445 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7106 }
30447 /* mulu.w${G} $Src16AnHI,[$Dst16An] */
30450 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30451 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7146 }
30453 /* mulu.w${G} [$Src16An],[$Dst16An] */
30456 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30457 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7166 }
30459 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
30462 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30463 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x710800 }
30465 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
30468 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30469 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x714800 }
30471 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30474 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30475 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x716800 }
30477 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
30480 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30481 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x710c0000 }
30483 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
30486 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30487 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x714c0000 }
30489 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30492 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30493 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x716c0000 }
30495 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
30498 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30499 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x710a00 }
30501 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
30504 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30505 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x714a00 }
30507 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[sb] */
30510 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30511 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x716a00 }
30513 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
30516 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30517 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x710e0000 }
30519 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
30522 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30523 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x714e0000 }
30525 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[sb] */
30528 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30529 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x716e0000 }
30531 /* mulu.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
30534 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30535 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x710b00 }
30537 /* mulu.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
30540 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30541 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x714b00 }
30543 /* mulu.w${G} [$Src16An],${Dsp-16-s8}[fb] */
30546 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30547 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x716b00 }
30549 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16} */
30552 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
30553 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x710f0000 }
30555 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16} */
30558 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
30559 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x714f0000 }
30561 /* mulu.w${G} [$Src16An],${Dsp-16-u16} */
30564 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
30565 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x716f0000 }
30567 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
30570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30571 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x708000 }
30573 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
30576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30577 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70a000 }
30579 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
30582 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30583 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x70b000 }
30585 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
30588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30589 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x708400 }
30591 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
30594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30595 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x70a400 }
30597 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
30600 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30601 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x70b400 }
30603 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30607 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x708600 }
30609 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30613 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x70a600 }
30615 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30618 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30619 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x70b600 }
30621 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30625 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x70880000 }
30627 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30631 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70a80000 }
30633 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30636 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30637 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70b80000 }
30639 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30643 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x708c0000 }
30645 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30649 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70ac0000 }
30651 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30654 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30655 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70bc0000 }
30657 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30661 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x708a0000 }
30663 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30667 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70aa0000 }
30669 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30672 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30673 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70ba0000 }
30675 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30679 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x708e0000 }
30681 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30685 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70ae0000 }
30687 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30690 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30691 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70be0000 }
30693 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30697 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x708b0000 }
30699 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30703 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70ab0000 }
30705 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30708 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30709 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70bb0000 }
30711 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30715 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x708f0000 }
30717 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30721 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x70af0000 }
30723 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30726 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30727 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x70bf0000 }
30729 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
30732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30733 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x70c00000 }
30735 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
30738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30739 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70e00000 }
30741 /* mulu.b${G} ${Dsp-16-u16},$Dst16RnQI */
30744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
30745 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x70f00000 }
30747 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
30750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30751 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x70c40000 }
30753 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
30756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30757 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x70e40000 }
30759 /* mulu.b${G} ${Dsp-16-u16},$Dst16AnQI */
30762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
30763 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x70f40000 }
30765 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30769 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x70c60000 }
30771 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30775 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x70e60000 }
30777 /* mulu.b${G} ${Dsp-16-u16},[$Dst16An] */
30780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30781 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x70f60000 }
30783 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30787 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x70c80000 }
30789 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30793 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x70e80000 }
30795 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30799 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x70f80000 }
30801 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30805 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x70cc0000 }
30807 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30811 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x70ec0000 }
30813 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30817 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x70fc0000 }
30819 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30823 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ca0000 }
30825 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30829 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ea0000 }
30831 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30835 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x70fa0000 }
30837 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30841 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ce0000 }
30843 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30847 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ee0000 }
30849 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30853 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x70fe0000 }
30855 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30859 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70cb0000 }
30861 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30865 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70eb0000 }
30867 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30871 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x70fb0000 }
30873 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30877 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x70cf0000 }
30879 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30883 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x70ef0000 }
30885 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
30888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30889 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x70ff0000 }
30891 /* mulu.b${G} $Src16RnQI,$Dst16RnQI */
30894 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
30895 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7000 }
30897 /* mulu.b${G} $Src16AnQI,$Dst16RnQI */
30900 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
30901 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7040 }
30903 /* mulu.b${G} [$Src16An],$Dst16RnQI */
30906 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30907 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7060 }
30909 /* mulu.b${G} $Src16RnQI,$Dst16AnQI */
30912 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
30913 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7004 }
30915 /* mulu.b${G} $Src16AnQI,$Dst16AnQI */
30918 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
30919 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7044 }
30921 /* mulu.b${G} [$Src16An],$Dst16AnQI */
30924 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30925 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7064 }
30927 /* mulu.b${G} $Src16RnQI,[$Dst16An] */
30930 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30931 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7006 }
30933 /* mulu.b${G} $Src16AnQI,[$Dst16An] */
30936 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30937 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7046 }
30939 /* mulu.b${G} [$Src16An],[$Dst16An] */
30942 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30943 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7066 }
30945 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
30948 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30949 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x700800 }
30951 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
30954 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30955 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x704800 }
30957 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30960 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30961 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x706800 }
30963 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
30966 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30967 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x700c0000 }
30969 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
30972 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30973 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x704c0000 }
30975 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30978 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30979 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x706c0000 }
30981 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
30984 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30985 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x700a00 }
30987 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
30990 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30991 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x704a00 }
30993 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[sb] */
30996 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30997 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x706a00 }
30999 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
31002 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31003 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x700e0000 }
31005 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
31008 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31009 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x704e0000 }
31011 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[sb] */
31014 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31015 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x706e0000 }
31017 /* mulu.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
31020 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31021 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x700b00 }
31023 /* mulu.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
31026 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31027 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x704b00 }
31029 /* mulu.b${G} [$Src16An],${Dsp-16-s8}[fb] */
31032 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31033 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x706b00 }
31035 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16} */
31038 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
31039 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x700f0000 }
31041 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16} */
31044 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
31045 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x704f0000 }
31047 /* mulu.b${G} [$Src16An],${Dsp-16-u16} */
31050 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
31051 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x706f0000 }
31053 /* mulu.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
31056 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31057 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x890f0000 }
31059 /* mulu.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
31062 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31063 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818f0000 }
31065 /* mulu.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
31068 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31069 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x810f0000 }
31071 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31074 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31075 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830f0000 }
31077 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31080 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31081 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838f0000 }
31083 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31086 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31087 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cf0000 }
31089 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31092 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31093 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850f0000 }
31095 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31098 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31099 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858f0000 }
31101 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
31104 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31105 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cf0000 }
31107 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31110 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31111 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cf0000 }
31113 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31116 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31117 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870f0000 }
31119 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24} */
31122 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
31123 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x878f0000 }
31125 /* mulu.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
31128 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
31129 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x880f00 }
31131 /* mulu.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
31134 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
31135 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x808f00 }
31137 /* mulu.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
31140 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31141 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x800f00 }
31143 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31146 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31147 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820f0000 }
31149 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31152 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31153 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828f0000 }
31155 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31158 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31159 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cf0000 }
31161 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31164 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31165 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840f0000 }
31167 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31170 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31171 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848f0000 }
31173 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
31176 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31177 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cf0000 }
31179 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31182 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31183 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cf0000 }
31185 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31188 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31189 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860f0000 }
31191 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24} */
31194 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
31195 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x868f0000 }
31197 /* mulu.w${G} #${Imm-16-HI},$Dst16RnHI */
31200 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
31201 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d400000 }
31203 /* mulu.w${G} #${Imm-16-HI},$Dst16AnHI */
31206 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
31207 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d440000 }
31209 /* mulu.w${G} #${Imm-16-HI},[$Dst16An] */
31212 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
31213 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d460000 }
31215 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
31218 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31219 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d480000 }
31221 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31224 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31225 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d4a0000 }
31227 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31230 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31231 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d4b0000 }
31233 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
31236 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31237 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d4c0000 }
31239 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31242 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31243 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d4e0000 }
31245 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31248 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31249 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d4f0000 }
31251 /* mulu.b${G} #${Imm-16-QI},$Dst16RnQI */
31254 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
31255 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c4000 }
31257 /* mulu.b${G} #${Imm-16-QI},$Dst16AnQI */
31260 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
31261 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c4400 }
31263 /* mulu.b${G} #${Imm-16-QI},[$Dst16An] */
31266 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
31267 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c4600 }
31269 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
31272 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31273 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c480000 }
31275 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31278 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31279 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c4a0000 }
31281 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31284 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31285 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c4b0000 }
31287 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
31290 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31291 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c4c0000 }
31293 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31296 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31297 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c4e0000 }
31299 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31302 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31303 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c4f0000 }
31308 { { MNEM
, ' ', OP (R3
), 0 } },
31309 & ifmt_mulex_dst32_R3_direct_Unprefixed_HI
, { 0xc97e }
31311 /* mulex $Dst32AnUnprefixedHI */
31314 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
31315 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1be }
31317 /* mulex [$Dst32AnUnprefixed] */
31320 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31321 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc13e }
31323 /* mulex ${Dsp-16-u8}[$Dst32AnUnprefixed] */
31326 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31327 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc33e00 }
31329 /* mulex ${Dsp-16-u16}[$Dst32AnUnprefixed] */
31332 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31333 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc53e0000 }
31335 /* mulex ${Dsp-16-u24}[$Dst32AnUnprefixed] */
31338 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31339 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc73e0000 }
31341 /* mulex ${Dsp-16-u8}[sb] */
31344 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31345 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3be00 }
31347 /* mulex ${Dsp-16-u16}[sb] */
31350 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31351 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5be0000 }
31353 /* mulex ${Dsp-16-s8}[fb] */
31356 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31357 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3fe00 }
31359 /* mulex ${Dsp-16-s16}[fb] */
31362 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31363 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5fe0000 }
31365 /* mulex ${Dsp-16-u16} */
31368 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
31369 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7fe0000 }
31371 /* mulex ${Dsp-16-u24} */
31374 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
31375 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7be0000 }
31377 /* mulu.l $Dst32RnPrefixedSI,r2r0 */
31380 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31381 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1890f }
31383 /* mulu.l $Dst32AnPrefixedSI,r2r0 */
31386 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31387 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1818f }
31389 /* mulu.l [$Dst32AnPrefixed],r2r0 */
31392 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31393 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1810f }
31395 /* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31398 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31399 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1830f00 }
31401 /* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31404 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31405 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1850f00 }
31407 /* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31410 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31411 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1870f00 }
31413 /* mulu.l ${Dsp-24-u8}[sb],r2r0 */
31416 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31417 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1838f00 }
31419 /* mulu.l ${Dsp-24-u16}[sb],r2r0 */
31422 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31423 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1858f00 }
31425 /* mulu.l ${Dsp-24-s8}[fb],r2r0 */
31428 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31429 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183cf00 }
31431 /* mulu.l ${Dsp-24-s16}[fb],r2r0 */
31434 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31435 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185cf00 }
31437 /* mulu.l ${Dsp-24-u16},r2r0 */
31440 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31441 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187cf00 }
31443 /* mulu.l ${Dsp-24-u24},r2r0 */
31446 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31447 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1878f00 }
31449 /* mul.l $Dst32RnPrefixedSI,r2r0 */
31452 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31453 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1891f }
31455 /* mul.l $Dst32AnPrefixedSI,r2r0 */
31458 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31459 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1819f }
31461 /* mul.l [$Dst32AnPrefixed],r2r0 */
31464 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31465 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1811f }
31467 /* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31470 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31471 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1831f00 }
31473 /* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31476 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31477 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1851f00 }
31479 /* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31482 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31483 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1871f00 }
31485 /* mul.l ${Dsp-24-u8}[sb],r2r0 */
31488 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31489 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1839f00 }
31491 /* mul.l ${Dsp-24-u16}[sb],r2r0 */
31494 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31495 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1859f00 }
31497 /* mul.l ${Dsp-24-s8}[fb],r2r0 */
31500 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31501 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183df00 }
31503 /* mul.l ${Dsp-24-s16}[fb],r2r0 */
31506 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31507 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185df00 }
31509 /* mul.l ${Dsp-24-u16},r2r0 */
31512 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31513 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187df00 }
31515 /* mul.l ${Dsp-24-u24},r2r0 */
31518 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31519 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1879f00 }
31521 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31525 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990c00 }
31527 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
31530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31531 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992c00 }
31533 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
31536 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31537 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993c00 }
31539 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31543 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918c00 }
31545 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
31548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31549 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ac00 }
31551 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
31554 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31555 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bc00 }
31557 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31561 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910c00 }
31563 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
31566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31567 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912c00 }
31569 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
31572 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31573 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913c00 }
31575 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31579 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930c0000 }
31581 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31585 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932c0000 }
31587 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31590 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31591 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933c0000 }
31593 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31597 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950c0000 }
31599 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31603 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952c0000 }
31605 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31608 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31609 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953c0000 }
31611 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31615 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970c0000 }
31617 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31621 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972c0000 }
31623 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31626 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31627 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973c0000 }
31629 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
31632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31633 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938c0000 }
31635 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
31638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31639 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ac0000 }
31641 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
31644 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31645 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bc0000 }
31647 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
31650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31651 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958c0000 }
31653 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
31656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31657 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ac0000 }
31659 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
31662 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31663 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bc0000 }
31665 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
31668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31669 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cc0000 }
31671 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
31674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31675 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ec0000 }
31677 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
31680 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31681 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fc0000 }
31683 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
31686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31687 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cc0000 }
31689 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
31692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31693 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ec0000 }
31695 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
31698 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31699 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fc0000 }
31701 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
31704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
31705 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cc0000 }
31707 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
31710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31711 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ec0000 }
31713 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
31716 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31717 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fc0000 }
31719 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
31722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
31723 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978c0000 }
31725 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
31728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31729 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ac0000 }
31731 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
31734 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31735 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bc0000 }
31737 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31741 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90c0000 }
31743 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
31746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31747 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92c0000 }
31749 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
31752 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31753 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93c0000 }
31755 /* mul.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
31758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31759 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93c0000 }
31761 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31765 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18c0000 }
31767 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
31770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31771 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ac0000 }
31773 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
31776 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31777 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bc0000 }
31779 /* mul.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
31782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31783 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bc0000 }
31785 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31789 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10c0000 }
31791 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
31794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31795 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12c0000 }
31797 /* mul.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
31800 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31801 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13c0000 }
31803 /* mul.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
31806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31807 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13c0000 }
31809 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31813 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30c0000 }
31815 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31819 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32c0000 }
31821 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31824 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31825 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33c0000 }
31827 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
31830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31831 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33c0000 }
31833 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31837 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50c0000 }
31839 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31843 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52c0000 }
31845 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31849 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53c0000 }
31851 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
31854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31855 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53c0000 }
31857 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31861 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70c0000 }
31863 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31867 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72c0000 }
31869 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31872 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31873 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73c0000 }
31875 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
31878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31879 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73c0000 }
31881 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
31884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31885 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38c0000 }
31887 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
31890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31891 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ac0000 }
31893 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
31896 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31897 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bc0000 }
31899 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
31902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31903 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bc0000 }
31905 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
31908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31909 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58c0000 }
31911 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
31914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31915 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ac0000 }
31917 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
31920 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31921 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bc0000 }
31923 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
31926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31927 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bc0000 }
31929 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
31932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31933 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cc0000 }
31935 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
31938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31939 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ec0000 }
31941 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
31944 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31945 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fc0000 }
31947 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
31950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31951 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fc0000 }
31953 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
31956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31957 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cc0000 }
31959 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
31962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31963 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ec0000 }
31965 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
31968 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31969 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fc0000 }
31971 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
31974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31975 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fc0000 }
31977 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
31980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
31981 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cc0000 }
31983 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
31986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
31987 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ec0000 }
31989 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
31992 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
31993 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fc0000 }
31995 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
31998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
31999 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fc0000 }
32001 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32005 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78c0000 }
32007 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32011 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ac0000 }
32013 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32016 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32017 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bc0000 }
32019 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
32022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32023 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bc0000 }
32025 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32029 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90c0000 }
32031 /* mul.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
32034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32035 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92c0000 }
32037 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32041 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18c0000 }
32043 /* mul.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
32046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32047 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ac0000 }
32049 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32053 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10c0000 }
32055 /* mul.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32059 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12c0000 }
32061 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32065 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30c0000 }
32067 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32071 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32c0000 }
32073 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32077 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50c0000 }
32079 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32083 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52c0000 }
32085 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32089 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70c0000 }
32091 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32095 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72c0000 }
32097 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32101 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38c0000 }
32103 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32107 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ac0000 }
32109 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32113 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58c0000 }
32115 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32119 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ac0000 }
32121 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32125 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cc0000 }
32127 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
32130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32131 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ec0000 }
32133 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
32136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32137 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cc0000 }
32139 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
32142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32143 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ec0000 }
32145 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
32148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
32149 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cc0000 }
32151 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
32154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
32155 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ec0000 }
32157 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
32160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
32161 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78c0000 }
32163 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
32166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
32167 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ac0000 }
32169 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
32172 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32173 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90c }
32175 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
32178 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32179 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892c }
32181 /* mul.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32184 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32185 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890c }
32187 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
32190 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32191 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18c }
32193 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
32196 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32197 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ac }
32199 /* mul.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32202 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32203 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818c }
32205 /* mul.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
32208 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32209 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10c }
32211 /* mul.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
32214 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32215 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812c }
32217 /* mul.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32220 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32221 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810c }
32223 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32226 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32227 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30c00 }
32229 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32232 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32233 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832c00 }
32235 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
32238 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32239 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830c00 }
32241 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32244 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32245 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50c0000 }
32247 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32250 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32251 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852c0000 }
32253 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
32256 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32257 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850c0000 }
32259 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32262 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32263 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70c0000 }
32265 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32268 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32269 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872c0000 }
32271 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
32274 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32275 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870c0000 }
32277 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
32280 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32281 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38c00 }
32283 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
32286 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32287 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ac00 }
32289 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
32292 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32293 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838c00 }
32295 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
32298 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32299 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58c0000 }
32301 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
32304 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32305 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ac0000 }
32307 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
32310 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32311 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858c0000 }
32313 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
32316 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32317 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cc00 }
32319 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
32322 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32323 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ec00 }
32325 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
32328 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32329 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cc00 }
32331 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
32334 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32335 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cc0000 }
32337 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
32340 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32341 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ec0000 }
32343 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
32346 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32347 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cc0000 }
32349 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
32352 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32353 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cc0000 }
32355 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
32358 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32359 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ec0000 }
32361 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
32364 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
32365 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cc0000 }
32367 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
32370 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32371 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78c0000 }
32373 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
32376 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32377 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ac0000 }
32379 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
32382 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
32383 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878c0000 }
32385 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32389 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980c00 }
32391 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
32394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32395 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982c00 }
32397 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
32400 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32401 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983c00 }
32403 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32407 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908c00 }
32409 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
32412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32413 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ac00 }
32415 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
32418 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32419 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bc00 }
32421 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32425 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900c00 }
32427 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
32430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32431 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902c00 }
32433 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
32436 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32437 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903c00 }
32439 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32443 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920c0000 }
32445 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32449 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922c0000 }
32451 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32454 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32455 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923c0000 }
32457 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32461 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940c0000 }
32463 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32467 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942c0000 }
32469 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32472 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32473 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943c0000 }
32475 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32479 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960c0000 }
32481 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32485 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962c0000 }
32487 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32490 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32491 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963c0000 }
32493 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
32496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32497 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928c0000 }
32499 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
32502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32503 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ac0000 }
32505 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
32508 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32509 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bc0000 }
32511 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
32514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32515 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948c0000 }
32517 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
32520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32521 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ac0000 }
32523 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
32526 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32527 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bc0000 }
32529 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
32532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32533 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cc0000 }
32535 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
32538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32539 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ec0000 }
32541 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
32544 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32545 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fc0000 }
32547 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
32550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32551 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cc0000 }
32553 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
32556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32557 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ec0000 }
32559 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
32562 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32563 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fc0000 }
32565 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
32568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
32569 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cc0000 }
32571 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
32574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32575 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ec0000 }
32577 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
32580 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32581 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fc0000 }
32583 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
32586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
32587 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968c0000 }
32589 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
32592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32593 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ac0000 }
32595 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
32598 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32599 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bc0000 }
32601 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32605 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80c0000 }
32607 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
32610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32611 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82c0000 }
32613 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
32616 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32617 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83c0000 }
32619 /* mul.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
32622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32623 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83c0000 }
32625 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32629 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08c0000 }
32631 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
32634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32635 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ac0000 }
32637 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
32640 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32641 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bc0000 }
32643 /* mul.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
32646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32647 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bc0000 }
32649 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32653 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00c0000 }
32655 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
32658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32659 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02c0000 }
32661 /* mul.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
32664 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32665 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03c0000 }
32667 /* mul.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
32670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32671 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03c0000 }
32673 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32677 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20c0000 }
32679 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32683 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22c0000 }
32685 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32689 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23c0000 }
32691 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
32694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32695 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23c0000 }
32697 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32701 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40c0000 }
32703 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32707 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42c0000 }
32709 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32712 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32713 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43c0000 }
32715 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
32718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32719 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43c0000 }
32721 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32725 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60c0000 }
32727 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32731 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62c0000 }
32733 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32736 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32737 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63c0000 }
32739 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
32742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32743 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63c0000 }
32745 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
32748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32749 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28c0000 }
32751 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
32754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32755 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ac0000 }
32757 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
32760 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32761 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bc0000 }
32763 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
32766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32767 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bc0000 }
32769 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
32772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32773 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48c0000 }
32775 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
32778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32779 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ac0000 }
32781 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
32784 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32785 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bc0000 }
32787 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
32790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32791 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bc0000 }
32793 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
32796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32797 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cc0000 }
32799 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
32802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32803 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ec0000 }
32805 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
32808 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32809 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fc0000 }
32811 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
32814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32815 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fc0000 }
32817 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
32820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32821 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cc0000 }
32823 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
32826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32827 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ec0000 }
32829 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
32832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32833 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fc0000 }
32835 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
32838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32839 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fc0000 }
32841 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
32844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
32845 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cc0000 }
32847 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
32850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32851 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ec0000 }
32853 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
32856 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32857 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fc0000 }
32859 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
32862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
32863 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fc0000 }
32865 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32869 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68c0000 }
32871 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32875 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ac0000 }
32877 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32880 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32881 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bc0000 }
32883 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
32886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32887 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bc0000 }
32889 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32893 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80c0000 }
32895 /* mul.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
32898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32899 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82c0000 }
32901 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32905 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08c0000 }
32907 /* mul.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
32910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32911 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ac0000 }
32913 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32917 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00c0000 }
32919 /* mul.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32923 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02c0000 }
32925 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32929 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20c0000 }
32931 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32935 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22c0000 }
32937 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32941 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40c0000 }
32943 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32947 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42c0000 }
32949 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32953 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60c0000 }
32955 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32959 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62c0000 }
32961 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32965 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28c0000 }
32967 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32971 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ac0000 }
32973 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32977 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48c0000 }
32979 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32983 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ac0000 }
32985 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32989 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cc0000 }
32991 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
32994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32995 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ec0000 }
32997 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
33000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
33001 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cc0000 }
33003 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
33006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
33007 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ec0000 }
33009 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
33012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
33013 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cc0000 }
33015 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
33018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
33019 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ec0000 }
33021 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
33024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
33025 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68c0000 }
33027 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
33030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
33031 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ac0000 }
33033 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
33036 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33037 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80c }
33039 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
33042 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33043 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882c }
33045 /* mul.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
33048 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33049 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880c }
33051 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
33054 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33055 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08c }
33057 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
33060 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33061 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ac }
33063 /* mul.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
33066 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33067 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808c }
33069 /* mul.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
33072 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33073 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00c }
33075 /* mul.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
33078 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33079 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802c }
33081 /* mul.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
33084 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33085 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800c }
33087 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33090 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33091 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20c00 }
33093 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33096 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33097 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822c00 }
33099 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
33102 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33103 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820c00 }
33105 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33108 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33109 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40c0000 }
33111 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33114 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33115 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842c0000 }
33117 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
33120 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33121 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840c0000 }
33123 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33126 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33127 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60c0000 }
33129 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33132 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33133 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862c0000 }
33135 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
33138 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33139 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860c0000 }
33141 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
33144 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33145 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28c00 }
33147 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
33150 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33151 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ac00 }
33153 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
33156 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33157 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828c00 }
33159 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
33162 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33163 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48c0000 }
33165 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
33168 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33169 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ac0000 }
33171 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
33174 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33175 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848c0000 }
33177 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
33180 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33181 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cc00 }
33183 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
33186 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33187 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ec00 }
33189 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
33192 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33193 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cc00 }
33195 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
33198 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33199 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cc0000 }
33201 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
33204 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33205 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ec0000 }
33207 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
33210 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33211 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cc0000 }
33213 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
33216 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33217 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cc0000 }
33219 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
33222 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33223 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ec0000 }
33225 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
33228 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
33229 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cc0000 }
33231 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
33234 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33235 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68c0000 }
33237 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
33240 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33241 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ac0000 }
33243 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
33246 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
33247 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868c0000 }
33249 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
33252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33253 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x798000 }
33255 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
33258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33259 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79a000 }
33261 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
33264 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33265 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x79b000 }
33267 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
33270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33271 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x798400 }
33273 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
33276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33277 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x79a400 }
33279 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
33282 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33283 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x79b400 }
33285 /* mul.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33289 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x798600 }
33291 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33295 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x79a600 }
33297 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33300 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33301 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x79b600 }
33303 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33307 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x79880000 }
33309 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33313 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79a80000 }
33315 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33318 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33319 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79b80000 }
33321 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33325 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x798c0000 }
33327 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33331 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79ac0000 }
33333 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33336 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33337 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79bc0000 }
33339 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33343 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x798a0000 }
33345 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33349 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79aa0000 }
33351 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33354 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33355 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79ba0000 }
33357 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33361 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x798e0000 }
33363 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33367 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79ae0000 }
33369 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33372 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33373 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79be0000 }
33375 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33379 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x798b0000 }
33381 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33385 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79ab0000 }
33387 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33390 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33391 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79bb0000 }
33393 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33397 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x798f0000 }
33399 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33403 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x79af0000 }
33405 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33408 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33409 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x79bf0000 }
33411 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
33414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33415 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x79c00000 }
33417 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
33420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33421 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79e00000 }
33423 /* mul.w${G} ${Dsp-16-u16},$Dst16RnHI */
33426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
33427 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x79f00000 }
33429 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
33432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33433 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x79c40000 }
33435 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
33438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33439 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x79e40000 }
33441 /* mul.w${G} ${Dsp-16-u16},$Dst16AnHI */
33444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
33445 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x79f40000 }
33447 /* mul.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33451 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x79c60000 }
33453 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33457 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x79e60000 }
33459 /* mul.w${G} ${Dsp-16-u16},[$Dst16An] */
33462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33463 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x79f60000 }
33465 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33469 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x79c80000 }
33471 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33475 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x79e80000 }
33477 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33481 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x79f80000 }
33483 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33487 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x79cc0000 }
33489 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33493 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x79ec0000 }
33495 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33499 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x79fc0000 }
33501 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33505 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ca0000 }
33507 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
33510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33511 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ea0000 }
33513 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
33516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33517 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x79fa0000 }
33519 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
33522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33523 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ce0000 }
33525 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
33528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33529 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ee0000 }
33531 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
33534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33535 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x79fe0000 }
33537 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
33540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33541 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79cb0000 }
33543 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
33546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33547 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79eb0000 }
33549 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
33552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33553 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x79fb0000 }
33555 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
33558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
33559 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x79cf0000 }
33561 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
33564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
33565 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x79ef0000 }
33567 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
33570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
33571 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x79ff0000 }
33573 /* mul.w${G} $Src16RnHI,$Dst16RnHI */
33576 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
33577 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7900 }
33579 /* mul.w${G} $Src16AnHI,$Dst16RnHI */
33582 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
33583 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7940 }
33585 /* mul.w${G} [$Src16An],$Dst16RnHI */
33588 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33589 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7960 }
33591 /* mul.w${G} $Src16RnHI,$Dst16AnHI */
33594 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
33595 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7904 }
33597 /* mul.w${G} $Src16AnHI,$Dst16AnHI */
33600 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
33601 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7944 }
33603 /* mul.w${G} [$Src16An],$Dst16AnHI */
33606 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33607 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7964 }
33609 /* mul.w${G} $Src16RnHI,[$Dst16An] */
33612 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33613 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7906 }
33615 /* mul.w${G} $Src16AnHI,[$Dst16An] */
33618 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33619 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7946 }
33621 /* mul.w${G} [$Src16An],[$Dst16An] */
33624 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33625 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7966 }
33627 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
33630 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33631 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x790800 }
33633 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
33636 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33637 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x794800 }
33639 /* mul.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
33642 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33643 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x796800 }
33645 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
33648 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33649 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x790c0000 }
33651 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
33654 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33655 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x794c0000 }
33657 /* mul.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
33660 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33661 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x796c0000 }
33663 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
33666 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33667 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x790a00 }
33669 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
33672 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33673 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x794a00 }
33675 /* mul.w${G} [$Src16An],${Dsp-16-u8}[sb] */
33678 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33679 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x796a00 }
33681 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
33684 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33685 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x790e0000 }
33687 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
33690 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33691 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x794e0000 }
33693 /* mul.w${G} [$Src16An],${Dsp-16-u16}[sb] */
33696 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33697 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x796e0000 }
33699 /* mul.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
33702 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33703 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x790b00 }
33705 /* mul.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
33708 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33709 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x794b00 }
33711 /* mul.w${G} [$Src16An],${Dsp-16-s8}[fb] */
33714 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33715 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x796b00 }
33717 /* mul.w${G} $Src16RnHI,${Dsp-16-u16} */
33720 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
33721 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x790f0000 }
33723 /* mul.w${G} $Src16AnHI,${Dsp-16-u16} */
33726 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
33727 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x794f0000 }
33729 /* mul.w${G} [$Src16An],${Dsp-16-u16} */
33732 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
33733 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x796f0000 }
33735 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
33738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33739 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x788000 }
33741 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
33744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33745 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78a000 }
33747 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
33750 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33751 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x78b000 }
33753 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
33756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33757 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x788400 }
33759 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
33762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33763 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x78a400 }
33765 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
33768 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33769 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x78b400 }
33771 /* mul.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33775 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x788600 }
33777 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33781 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x78a600 }
33783 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33786 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33787 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x78b600 }
33789 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33793 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x78880000 }
33795 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33799 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78a80000 }
33801 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33805 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78b80000 }
33807 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33811 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x788c0000 }
33813 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33817 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78ac0000 }
33819 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33822 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33823 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78bc0000 }
33825 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33829 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x788a0000 }
33831 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33835 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78aa0000 }
33837 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33840 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33841 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78ba0000 }
33843 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33847 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x788e0000 }
33849 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33853 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78ae0000 }
33855 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33858 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33859 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78be0000 }
33861 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33865 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x788b0000 }
33867 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33871 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78ab0000 }
33873 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33876 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33877 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78bb0000 }
33879 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33883 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x788f0000 }
33885 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33889 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x78af0000 }
33891 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33894 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33895 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x78bf0000 }
33897 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
33900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33901 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x78c00000 }
33903 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
33906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33907 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78e00000 }
33909 /* mul.b${G} ${Dsp-16-u16},$Dst16RnQI */
33912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
33913 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x78f00000 }
33915 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
33918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33919 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x78c40000 }
33921 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
33924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33925 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x78e40000 }
33927 /* mul.b${G} ${Dsp-16-u16},$Dst16AnQI */
33930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
33931 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x78f40000 }
33933 /* mul.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33937 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x78c60000 }
33939 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33943 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x78e60000 }
33945 /* mul.b${G} ${Dsp-16-u16},[$Dst16An] */
33948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33949 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x78f60000 }
33951 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33955 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x78c80000 }
33957 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33961 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x78e80000 }
33963 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33967 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x78f80000 }
33969 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33973 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x78cc0000 }
33975 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33979 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x78ec0000 }
33981 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33985 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x78fc0000 }
33987 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33991 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ca0000 }
33993 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
33996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33997 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ea0000 }
33999 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
34002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
34003 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x78fa0000 }
34005 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
34008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34009 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ce0000 }
34011 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
34014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34015 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ee0000 }
34017 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
34020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34021 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x78fe0000 }
34023 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
34026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34027 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78cb0000 }
34029 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
34032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34033 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78eb0000 }
34035 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
34038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34039 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x78fb0000 }
34041 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
34044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
34045 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x78cf0000 }
34047 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
34050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
34051 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x78ef0000 }
34053 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
34056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
34057 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x78ff0000 }
34059 /* mul.b${G} $Src16RnQI,$Dst16RnQI */
34062 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
34063 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7800 }
34065 /* mul.b${G} $Src16AnQI,$Dst16RnQI */
34068 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
34069 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7840 }
34071 /* mul.b${G} [$Src16An],$Dst16RnQI */
34074 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
34075 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7860 }
34077 /* mul.b${G} $Src16RnQI,$Dst16AnQI */
34080 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
34081 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7804 }
34083 /* mul.b${G} $Src16AnQI,$Dst16AnQI */
34086 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
34087 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7844 }
34089 /* mul.b${G} [$Src16An],$Dst16AnQI */
34092 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
34093 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7864 }
34095 /* mul.b${G} $Src16RnQI,[$Dst16An] */
34098 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34099 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7806 }
34101 /* mul.b${G} $Src16AnQI,[$Dst16An] */
34104 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34105 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7846 }
34107 /* mul.b${G} [$Src16An],[$Dst16An] */
34110 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
34111 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7866 }
34113 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
34116 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34117 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x780800 }
34119 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
34122 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34123 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x784800 }
34125 /* mul.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
34128 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34129 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x786800 }
34131 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
34134 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34135 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x780c0000 }
34137 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
34140 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34141 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x784c0000 }
34143 /* mul.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
34146 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34147 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x786c0000 }
34149 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
34152 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34153 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x780a00 }
34155 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
34158 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34159 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x784a00 }
34161 /* mul.b${G} [$Src16An],${Dsp-16-u8}[sb] */
34164 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34165 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x786a00 }
34167 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
34170 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34171 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x780e0000 }
34173 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
34176 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34177 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x784e0000 }
34179 /* mul.b${G} [$Src16An],${Dsp-16-u16}[sb] */
34182 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34183 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x786e0000 }
34185 /* mul.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
34188 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34189 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x780b00 }
34191 /* mul.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
34194 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34195 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x784b00 }
34197 /* mul.b${G} [$Src16An],${Dsp-16-s8}[fb] */
34200 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34201 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x786b00 }
34203 /* mul.b${G} $Src16RnQI,${Dsp-16-u16} */
34206 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
34207 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x780f0000 }
34209 /* mul.b${G} $Src16AnQI,${Dsp-16-u16} */
34212 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
34213 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x784f0000 }
34215 /* mul.b${G} [$Src16An],${Dsp-16-u16} */
34218 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
34219 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x786f0000 }
34221 /* mul.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
34224 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
34225 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x891f0000 }
34227 /* mul.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
34230 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
34231 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819f0000 }
34233 /* mul.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
34236 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34237 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x811f0000 }
34239 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34242 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34243 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831f0000 }
34245 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34248 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34249 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839f0000 }
34251 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34254 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34255 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83df0000 }
34257 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34260 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34261 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851f0000 }
34263 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34266 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34267 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859f0000 }
34269 /* mul.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
34272 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34273 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85df0000 }
34275 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34278 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34279 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87df0000 }
34281 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34284 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34285 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871f0000 }
34287 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24} */
34290 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
34291 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x879f0000 }
34293 /* mul.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
34296 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
34297 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x881f00 }
34299 /* mul.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
34302 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
34303 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x809f00 }
34305 /* mul.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34308 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34309 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x801f00 }
34311 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34314 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34315 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821f0000 }
34317 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34320 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34321 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829f0000 }
34323 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34326 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34327 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82df0000 }
34329 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34332 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34333 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841f0000 }
34335 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34338 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34339 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849f0000 }
34341 /* mul.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34344 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34345 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84df0000 }
34347 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34350 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34351 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86df0000 }
34353 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34356 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34357 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861f0000 }
34359 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24} */
34362 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34363 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x869f0000 }
34365 /* mul.w${G} #${Imm-16-HI},$Dst16RnHI */
34368 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
34369 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d500000 }
34371 /* mul.w${G} #${Imm-16-HI},$Dst16AnHI */
34374 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
34375 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d540000 }
34377 /* mul.w${G} #${Imm-16-HI},[$Dst16An] */
34380 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
34381 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d560000 }
34383 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
34386 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34387 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d580000 }
34389 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34392 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34393 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d5a0000 }
34395 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34398 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34399 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d5b0000 }
34401 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
34404 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34405 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d5c0000 }
34407 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34410 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34411 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d5e0000 }
34413 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34416 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34417 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d5f0000 }
34419 /* mul.b${G} #${Imm-16-QI},$Dst16RnQI */
34422 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
34423 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c5000 }
34425 /* mul.b${G} #${Imm-16-QI},$Dst16AnQI */
34428 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
34429 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c5400 }
34431 /* mul.b${G} #${Imm-16-QI},[$Dst16An] */
34434 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
34435 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c5600 }
34437 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
34440 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34441 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c580000 }
34443 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34446 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34447 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c5a0000 }
34449 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34452 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34453 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c5b0000 }
34455 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
34458 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34459 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c5c0000 }
34461 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34464 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34465 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c5e0000 }
34467 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34470 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34471 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c5f0000 }
34473 /* movx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
34476 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
34477 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb81100 }
34479 /* movx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
34482 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
34483 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb09100 }
34485 /* movx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34488 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34489 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb01100 }
34491 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34494 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34495 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2110000 }
34497 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34500 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34501 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2910000 }
34503 /* movx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34506 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34507 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2d10000 }
34509 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34512 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34513 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4110000 }
34515 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34518 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34519 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4910000 }
34521 /* movx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34524 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34525 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4d10000 }
34527 /* movx${X} #${Imm-32-QI},${Dsp-16-u16} */
34530 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34531 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6d10000 }
34533 /* movx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34536 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34537 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6110000 }
34539 /* movx${X} #${Imm-40-QI},${Dsp-16-u24} */
34542 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34543 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6910000 }
34545 /* movhh $Dst32RnPrefixedQI,r0l */
34548 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34549 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a83e }
34551 /* movhh $Dst32AnPrefixedQI,r0l */
34554 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34555 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0be }
34557 /* movhh [$Dst32AnPrefixed],r0l */
34560 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34561 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a03e }
34563 /* movhh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34566 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34567 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a23e00 }
34569 /* movhh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34572 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34573 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a43e00 }
34575 /* movhh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34578 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34579 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a63e00 }
34581 /* movhh ${Dsp-24-u8}[sb],r0l */
34584 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34585 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2be00 }
34587 /* movhh ${Dsp-24-u16}[sb],r0l */
34590 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34591 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4be00 }
34593 /* movhh ${Dsp-24-s8}[fb],r0l */
34596 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34597 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2fe00 }
34599 /* movhh ${Dsp-24-s16}[fb],r0l */
34602 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34603 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4fe00 }
34605 /* movhh ${Dsp-24-u16},r0l */
34608 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34609 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6fe00 }
34611 /* movhh ${Dsp-24-u24},r0l */
34614 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34615 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6be00 }
34617 /* movhl $Dst32RnPrefixedQI,r0l */
34620 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34621 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a82e }
34623 /* movhl $Dst32AnPrefixedQI,r0l */
34626 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34627 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0ae }
34629 /* movhl [$Dst32AnPrefixed],r0l */
34632 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34633 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a02e }
34635 /* movhl ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34638 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34639 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a22e00 }
34641 /* movhl ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34644 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34645 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a42e00 }
34647 /* movhl ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34650 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34651 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a62e00 }
34653 /* movhl ${Dsp-24-u8}[sb],r0l */
34656 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34657 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2ae00 }
34659 /* movhl ${Dsp-24-u16}[sb],r0l */
34662 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34663 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4ae00 }
34665 /* movhl ${Dsp-24-s8}[fb],r0l */
34668 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34669 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ee00 }
34671 /* movhl ${Dsp-24-s16}[fb],r0l */
34674 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34675 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ee00 }
34677 /* movhl ${Dsp-24-u16},r0l */
34680 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34681 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ee00 }
34683 /* movhl ${Dsp-24-u24},r0l */
34686 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34687 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6ae00 }
34689 /* movlh $Dst32RnPrefixedQI,r0l */
34692 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34693 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a81e }
34695 /* movlh $Dst32AnPrefixedQI,r0l */
34698 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34699 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a09e }
34701 /* movlh [$Dst32AnPrefixed],r0l */
34704 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34705 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a01e }
34707 /* movlh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34710 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34711 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a21e00 }
34713 /* movlh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34716 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34717 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a41e00 }
34719 /* movlh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34722 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34723 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a61e00 }
34725 /* movlh ${Dsp-24-u8}[sb],r0l */
34728 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34729 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a29e00 }
34731 /* movlh ${Dsp-24-u16}[sb],r0l */
34734 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34735 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a49e00 }
34737 /* movlh ${Dsp-24-s8}[fb],r0l */
34740 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34741 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2de00 }
34743 /* movlh ${Dsp-24-s16}[fb],r0l */
34746 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34747 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4de00 }
34749 /* movlh ${Dsp-24-u16},r0l */
34752 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34753 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6de00 }
34755 /* movlh ${Dsp-24-u24},r0l */
34758 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34759 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a69e00 }
34761 /* movll $Dst32RnPrefixedQI,r0l */
34764 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34765 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a80e }
34767 /* movll $Dst32AnPrefixedQI,r0l */
34770 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34771 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a08e }
34773 /* movll [$Dst32AnPrefixed],r0l */
34776 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34777 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a00e }
34779 /* movll ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34782 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34783 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a20e00 }
34785 /* movll ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34788 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34789 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a40e00 }
34791 /* movll ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34794 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34795 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a60e00 }
34797 /* movll ${Dsp-24-u8}[sb],r0l */
34800 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34801 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a28e00 }
34803 /* movll ${Dsp-24-u16}[sb],r0l */
34806 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34807 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a48e00 }
34809 /* movll ${Dsp-24-s8}[fb],r0l */
34812 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34813 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ce00 }
34815 /* movll ${Dsp-24-s16}[fb],r0l */
34818 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34819 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ce00 }
34821 /* movll ${Dsp-24-u16},r0l */
34824 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34825 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ce00 }
34827 /* movll ${Dsp-24-u24},r0l */
34830 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34831 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a68e00 }
34833 /* movhh r0l,$Dst32RnPrefixedQI */
34836 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34837 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b83e }
34839 /* movhh r0l,$Dst32AnPrefixedQI */
34842 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34843 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0be }
34845 /* movhh r0l,[$Dst32AnPrefixed] */
34848 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34849 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b03e }
34851 /* movhh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34854 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34855 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b23e00 }
34857 /* movhh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34860 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34861 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b43e00 }
34863 /* movhh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34866 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34867 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b63e00 }
34869 /* movhh r0l,${Dsp-24-u8}[sb] */
34872 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34873 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2be00 }
34875 /* movhh r0l,${Dsp-24-u16}[sb] */
34878 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34879 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4be00 }
34881 /* movhh r0l,${Dsp-24-s8}[fb] */
34884 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34885 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2fe00 }
34887 /* movhh r0l,${Dsp-24-s16}[fb] */
34890 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34891 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4fe00 }
34893 /* movhh r0l,${Dsp-24-u16} */
34896 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34897 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6fe00 }
34899 /* movhh r0l,${Dsp-24-u24} */
34902 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34903 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6be00 }
34905 /* movhl r0l,$Dst32RnPrefixedQI */
34908 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34909 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b82e }
34911 /* movhl r0l,$Dst32AnPrefixedQI */
34914 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34915 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0ae }
34917 /* movhl r0l,[$Dst32AnPrefixed] */
34920 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34921 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b02e }
34923 /* movhl r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34926 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34927 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b22e00 }
34929 /* movhl r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34932 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34933 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b42e00 }
34935 /* movhl r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34938 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34939 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b62e00 }
34941 /* movhl r0l,${Dsp-24-u8}[sb] */
34944 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34945 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2ae00 }
34947 /* movhl r0l,${Dsp-24-u16}[sb] */
34950 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34951 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4ae00 }
34953 /* movhl r0l,${Dsp-24-s8}[fb] */
34956 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34957 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ee00 }
34959 /* movhl r0l,${Dsp-24-s16}[fb] */
34962 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34963 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ee00 }
34965 /* movhl r0l,${Dsp-24-u16} */
34968 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34969 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ee00 }
34971 /* movhl r0l,${Dsp-24-u24} */
34974 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34975 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6ae00 }
34977 /* movlh r0l,$Dst32RnPrefixedQI */
34980 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34981 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b81e }
34983 /* movlh r0l,$Dst32AnPrefixedQI */
34986 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34987 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b09e }
34989 /* movlh r0l,[$Dst32AnPrefixed] */
34992 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34993 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b01e }
34995 /* movlh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34998 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34999 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b21e00 }
35001 /* movlh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35004 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35005 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b41e00 }
35007 /* movlh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35010 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35011 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b61e00 }
35013 /* movlh r0l,${Dsp-24-u8}[sb] */
35016 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35017 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b29e00 }
35019 /* movlh r0l,${Dsp-24-u16}[sb] */
35022 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35023 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b49e00 }
35025 /* movlh r0l,${Dsp-24-s8}[fb] */
35028 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35029 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2de00 }
35031 /* movlh r0l,${Dsp-24-s16}[fb] */
35034 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35035 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4de00 }
35037 /* movlh r0l,${Dsp-24-u16} */
35040 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35041 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6de00 }
35043 /* movlh r0l,${Dsp-24-u24} */
35046 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35047 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b69e00 }
35049 /* movll r0l,$Dst32RnPrefixedQI */
35052 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
35053 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b80e }
35055 /* movll r0l,$Dst32AnPrefixedQI */
35058 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
35059 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b08e }
35061 /* movll r0l,[$Dst32AnPrefixed] */
35064 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
35065 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b00e }
35067 /* movll r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
35070 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35071 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b20e00 }
35073 /* movll r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35076 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35077 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b40e00 }
35079 /* movll r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35082 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35083 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b60e00 }
35085 /* movll r0l,${Dsp-24-u8}[sb] */
35088 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35089 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b28e00 }
35091 /* movll r0l,${Dsp-24-u16}[sb] */
35094 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35095 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b48e00 }
35097 /* movll r0l,${Dsp-24-s8}[fb] */
35100 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35101 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ce00 }
35103 /* movll r0l,${Dsp-24-s16}[fb] */
35106 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35107 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ce00 }
35109 /* movll r0l,${Dsp-24-u16} */
35112 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35113 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ce00 }
35115 /* movll r0l,${Dsp-24-u24} */
35118 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35119 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b68e00 }
35121 /* movhh $Dst16RnQI,r0l */
35124 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35125 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c30 }
35127 /* movhh $Dst16AnQI,r0l */
35130 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35131 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c34 }
35133 /* movhh [$Dst16An],r0l */
35136 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35137 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c36 }
35139 /* movhh ${Dsp-16-u8}[$Dst16An],r0l */
35142 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35143 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c3800 }
35145 /* movhh ${Dsp-16-u16}[$Dst16An],r0l */
35148 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35149 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c3c0000 }
35151 /* movhh ${Dsp-16-u8}[sb],r0l */
35154 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35155 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c3a00 }
35157 /* movhh ${Dsp-16-u16}[sb],r0l */
35160 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35161 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c3e0000 }
35163 /* movhh ${Dsp-16-s8}[fb],r0l */
35166 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35167 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c3b00 }
35169 /* movhh ${Dsp-16-u16},r0l */
35172 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35173 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c3f0000 }
35175 /* movhl $Dst16RnQI,r0l */
35178 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35179 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c10 }
35181 /* movhl $Dst16AnQI,r0l */
35184 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35185 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c14 }
35187 /* movhl [$Dst16An],r0l */
35190 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35191 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c16 }
35193 /* movhl ${Dsp-16-u8}[$Dst16An],r0l */
35196 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35197 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c1800 }
35199 /* movhl ${Dsp-16-u16}[$Dst16An],r0l */
35202 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35203 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c1c0000 }
35205 /* movhl ${Dsp-16-u8}[sb],r0l */
35208 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35209 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c1a00 }
35211 /* movhl ${Dsp-16-u16}[sb],r0l */
35214 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35215 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c1e0000 }
35217 /* movhl ${Dsp-16-s8}[fb],r0l */
35220 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35221 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c1b00 }
35223 /* movhl ${Dsp-16-u16},r0l */
35226 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35227 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c1f0000 }
35229 /* movlh $Dst16RnQI,r0l */
35232 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35233 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c20 }
35235 /* movlh $Dst16AnQI,r0l */
35238 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35239 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c24 }
35241 /* movlh [$Dst16An],r0l */
35244 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35245 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c26 }
35247 /* movlh ${Dsp-16-u8}[$Dst16An],r0l */
35250 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35251 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c2800 }
35253 /* movlh ${Dsp-16-u16}[$Dst16An],r0l */
35256 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35257 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c2c0000 }
35259 /* movlh ${Dsp-16-u8}[sb],r0l */
35262 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35263 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c2a00 }
35265 /* movlh ${Dsp-16-u16}[sb],r0l */
35268 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35269 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c2e0000 }
35271 /* movlh ${Dsp-16-s8}[fb],r0l */
35274 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35275 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c2b00 }
35277 /* movlh ${Dsp-16-u16},r0l */
35280 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35281 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c2f0000 }
35283 /* movll $Dst16RnQI,r0l */
35286 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35287 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c00 }
35289 /* movll $Dst16AnQI,r0l */
35292 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35293 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c04 }
35295 /* movll [$Dst16An],r0l */
35298 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35299 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c06 }
35301 /* movll ${Dsp-16-u8}[$Dst16An],r0l */
35304 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35305 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c0800 }
35307 /* movll ${Dsp-16-u16}[$Dst16An],r0l */
35310 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35311 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c0c0000 }
35313 /* movll ${Dsp-16-u8}[sb],r0l */
35316 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35317 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c0a00 }
35319 /* movll ${Dsp-16-u16}[sb],r0l */
35322 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35323 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c0e0000 }
35325 /* movll ${Dsp-16-s8}[fb],r0l */
35328 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35329 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c0b00 }
35331 /* movll ${Dsp-16-u16},r0l */
35334 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35335 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c0f0000 }
35337 /* movhh r0l,$Dst16RnQI */
35340 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35341 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7cb0 }
35343 /* movhh r0l,$Dst16AnQI */
35346 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35347 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7cb4 }
35349 /* movhh r0l,[$Dst16An] */
35352 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35353 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7cb6 }
35355 /* movhh r0l,${Dsp-16-u8}[$Dst16An] */
35358 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35359 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7cb800 }
35361 /* movhh r0l,${Dsp-16-u16}[$Dst16An] */
35364 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35365 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cbc0000 }
35367 /* movhh r0l,${Dsp-16-u8}[sb] */
35370 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35371 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7cba00 }
35373 /* movhh r0l,${Dsp-16-u16}[sb] */
35376 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35377 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cbe0000 }
35379 /* movhh r0l,${Dsp-16-s8}[fb] */
35382 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35383 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cbb00 }
35385 /* movhh r0l,${Dsp-16-u16} */
35388 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35389 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7cbf0000 }
35391 /* movhl r0l,$Dst16RnQI */
35394 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35395 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c90 }
35397 /* movhl r0l,$Dst16AnQI */
35400 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35401 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c94 }
35403 /* movhl r0l,[$Dst16An] */
35406 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35407 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c96 }
35409 /* movhl r0l,${Dsp-16-u8}[$Dst16An] */
35412 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35413 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c9800 }
35415 /* movhl r0l,${Dsp-16-u16}[$Dst16An] */
35418 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35419 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c9c0000 }
35421 /* movhl r0l,${Dsp-16-u8}[sb] */
35424 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35425 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c9a00 }
35427 /* movhl r0l,${Dsp-16-u16}[sb] */
35430 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35431 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c9e0000 }
35433 /* movhl r0l,${Dsp-16-s8}[fb] */
35436 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35437 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c9b00 }
35439 /* movhl r0l,${Dsp-16-u16} */
35442 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35443 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c9f0000 }
35445 /* movlh r0l,$Dst16RnQI */
35448 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35449 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7ca0 }
35451 /* movlh r0l,$Dst16AnQI */
35454 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35455 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7ca4 }
35457 /* movlh r0l,[$Dst16An] */
35460 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35461 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7ca6 }
35463 /* movlh r0l,${Dsp-16-u8}[$Dst16An] */
35466 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35467 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7ca800 }
35469 /* movlh r0l,${Dsp-16-u16}[$Dst16An] */
35472 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35473 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cac0000 }
35475 /* movlh r0l,${Dsp-16-u8}[sb] */
35478 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35479 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7caa00 }
35481 /* movlh r0l,${Dsp-16-u16}[sb] */
35484 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35485 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cae0000 }
35487 /* movlh r0l,${Dsp-16-s8}[fb] */
35490 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35491 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cab00 }
35493 /* movlh r0l,${Dsp-16-u16} */
35496 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35497 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7caf0000 }
35499 /* movll r0l,$Dst16RnQI */
35502 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35503 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c80 }
35505 /* movll r0l,$Dst16AnQI */
35508 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35509 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c84 }
35511 /* movll r0l,[$Dst16An] */
35514 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35515 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c86 }
35517 /* movll r0l,${Dsp-16-u8}[$Dst16An] */
35520 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35521 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c8800 }
35523 /* movll r0l,${Dsp-16-u16}[$Dst16An] */
35526 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35527 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c8c0000 }
35529 /* movll r0l,${Dsp-16-u8}[sb] */
35532 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35533 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c8a00 }
35535 /* movll r0l,${Dsp-16-u16}[sb] */
35538 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35539 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c8e0000 }
35541 /* movll r0l,${Dsp-16-s8}[fb] */
35544 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35545 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c8b00 }
35547 /* movll r0l,${Dsp-16-u16} */
35550 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35551 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c8f0000 }
35553 /* mova [$Dst32AnUnprefixed],a1 */
35556 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35557 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11b }
35559 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a1 */
35562 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35563 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31b00 }
35565 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a1 */
35568 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35569 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51b0000 }
35571 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a1 */
35574 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35575 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71b0000 }
35577 /* mova ${Dsp-16-u8}[sb],a1 */
35580 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35581 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39b00 }
35583 /* mova ${Dsp-16-u16}[sb],a1 */
35586 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35587 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59b0000 }
35589 /* mova ${Dsp-16-s8}[fb],a1 */
35592 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35593 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3db00 }
35595 /* mova ${Dsp-16-s16}[fb],a1 */
35598 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35599 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5db0000 }
35601 /* mova ${Dsp-16-u16},a1 */
35604 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35605 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7db0000 }
35607 /* mova ${Dsp-16-u24},a1 */
35610 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '1', 0 } },
35611 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79b0000 }
35613 /* mova [$Dst32AnUnprefixed],a0 */
35616 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35617 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11a }
35619 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a0 */
35622 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35623 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31a00 }
35625 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a0 */
35628 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35629 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51a0000 }
35631 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a0 */
35634 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35635 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71a0000 }
35637 /* mova ${Dsp-16-u8}[sb],a0 */
35640 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35641 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39a00 }
35643 /* mova ${Dsp-16-u16}[sb],a0 */
35646 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35647 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59a0000 }
35649 /* mova ${Dsp-16-s8}[fb],a0 */
35652 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35653 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3da00 }
35655 /* mova ${Dsp-16-s16}[fb],a0 */
35658 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35659 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5da0000 }
35661 /* mova ${Dsp-16-u16},a0 */
35664 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35665 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7da0000 }
35667 /* mova ${Dsp-16-u24},a0 */
35670 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '0', 0 } },
35671 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79a0000 }
35673 /* mova [$Dst32AnUnprefixed],r3r1 */
35676 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35677 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd119 }
35679 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r3r1 */
35682 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35683 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31900 }
35685 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r3r1 */
35688 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35689 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5190000 }
35691 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r3r1 */
35694 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35695 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7190000 }
35697 /* mova ${Dsp-16-u8}[sb],r3r1 */
35700 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35701 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39900 }
35703 /* mova ${Dsp-16-u16}[sb],r3r1 */
35706 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35707 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5990000 }
35709 /* mova ${Dsp-16-s8}[fb],r3r1 */
35712 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35713 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d900 }
35715 /* mova ${Dsp-16-s16}[fb],r3r1 */
35718 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35719 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d90000 }
35721 /* mova ${Dsp-16-u16},r3r1 */
35724 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 'r', '1', 0 } },
35725 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d90000 }
35727 /* mova ${Dsp-16-u24},r3r1 */
35730 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '3', 'r', '1', 0 } },
35731 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7990000 }
35733 /* mova [$Dst32AnUnprefixed],r2r0 */
35736 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35737 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd118 }
35739 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r2r0 */
35742 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35743 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31800 }
35745 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r2r0 */
35748 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35749 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5180000 }
35751 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r2r0 */
35754 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35755 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7180000 }
35757 /* mova ${Dsp-16-u8}[sb],r2r0 */
35760 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35761 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39800 }
35763 /* mova ${Dsp-16-u16}[sb],r2r0 */
35766 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35767 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5980000 }
35769 /* mova ${Dsp-16-s8}[fb],r2r0 */
35772 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35773 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d800 }
35775 /* mova ${Dsp-16-s16}[fb],r2r0 */
35778 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35779 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d80000 }
35781 /* mova ${Dsp-16-u16},r2r0 */
35784 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 'r', '0', 0 } },
35785 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d80000 }
35787 /* mova ${Dsp-16-u24},r2r0 */
35790 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '2', 'r', '0', 0 } },
35791 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7980000 }
35793 /* mova [$Dst16An],a1 */
35796 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35797 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb56 }
35799 /* mova ${Dsp-16-u8}[$Dst16An],a1 */
35802 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35803 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb5800 }
35805 /* mova ${Dsp-16-u16}[$Dst16An],a1 */
35808 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35809 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb5c0000 }
35811 /* mova ${Dsp-16-u8}[sb],a1 */
35814 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35815 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb5a00 }
35817 /* mova ${Dsp-16-u16}[sb],a1 */
35820 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35821 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb5e0000 }
35823 /* mova ${Dsp-16-s8}[fb],a1 */
35826 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35827 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb5b00 }
35829 /* mova ${Dsp-16-u16},a1 */
35832 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35833 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb5f0000 }
35835 /* mova [$Dst16An],a0 */
35838 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35839 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb46 }
35841 /* mova ${Dsp-16-u8}[$Dst16An],a0 */
35844 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35845 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb4800 }
35847 /* mova ${Dsp-16-u16}[$Dst16An],a0 */
35850 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35851 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb4c0000 }
35853 /* mova ${Dsp-16-u8}[sb],a0 */
35856 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35857 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb4a00 }
35859 /* mova ${Dsp-16-u16}[sb],a0 */
35862 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35863 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb4e0000 }
35865 /* mova ${Dsp-16-s8}[fb],a0 */
35868 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35869 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb4b00 }
35871 /* mova ${Dsp-16-u16},a0 */
35874 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35875 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb4f0000 }
35877 /* mova [$Dst16An],r3 */
35880 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35881 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb36 }
35883 /* mova ${Dsp-16-u8}[$Dst16An],r3 */
35886 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35887 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb3800 }
35889 /* mova ${Dsp-16-u16}[$Dst16An],r3 */
35892 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35893 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb3c0000 }
35895 /* mova ${Dsp-16-u8}[sb],r3 */
35898 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35899 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb3a00 }
35901 /* mova ${Dsp-16-u16}[sb],r3 */
35904 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35905 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb3e0000 }
35907 /* mova ${Dsp-16-s8}[fb],r3 */
35910 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 0 } },
35911 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb3b00 }
35913 /* mova ${Dsp-16-u16},r3 */
35916 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 0 } },
35917 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb3f0000 }
35919 /* mova [$Dst16An],r2 */
35922 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35923 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb26 }
35925 /* mova ${Dsp-16-u8}[$Dst16An],r2 */
35928 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35929 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb2800 }
35931 /* mova ${Dsp-16-u16}[$Dst16An],r2 */
35934 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35935 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb2c0000 }
35937 /* mova ${Dsp-16-u8}[sb],r2 */
35940 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35941 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb2a00 }
35943 /* mova ${Dsp-16-u16}[sb],r2 */
35946 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35947 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb2e0000 }
35949 /* mova ${Dsp-16-s8}[fb],r2 */
35952 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 0 } },
35953 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb2b00 }
35955 /* mova ${Dsp-16-u16},r2 */
35958 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 0 } },
35959 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb2f0000 }
35961 /* mova [$Dst16An],r1 */
35964 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35965 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb16 }
35967 /* mova ${Dsp-16-u8}[$Dst16An],r1 */
35970 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35971 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb1800 }
35973 /* mova ${Dsp-16-u16}[$Dst16An],r1 */
35976 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35977 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb1c0000 }
35979 /* mova ${Dsp-16-u8}[sb],r1 */
35982 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35983 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb1a00 }
35985 /* mova ${Dsp-16-u16}[sb],r1 */
35988 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35989 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb1e0000 }
35991 /* mova ${Dsp-16-s8}[fb],r1 */
35994 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
35995 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb1b00 }
35997 /* mova ${Dsp-16-u16},r1 */
36000 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '1', 0 } },
36001 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb1f0000 }
36003 /* mova [$Dst16An],r0 */
36006 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36007 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb06 }
36009 /* mova ${Dsp-16-u8}[$Dst16An],r0 */
36012 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36013 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb0800 }
36015 /* mova ${Dsp-16-u16}[$Dst16An],r0 */
36018 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36019 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb0c0000 }
36021 /* mova ${Dsp-16-u8}[sb],r0 */
36024 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36025 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb0a00 }
36027 /* mova ${Dsp-16-u16}[sb],r0 */
36030 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36031 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb0e0000 }
36033 /* mova ${Dsp-16-s8}[fb],r0 */
36036 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36037 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb0b00 }
36039 /* mova ${Dsp-16-u16},r0 */
36042 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 0 } },
36043 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb0f0000 }
36045 /* mov.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36049 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30f0000 }
36051 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36055 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38f0000 }
36057 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36060 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36061 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3cf0000 }
36063 /* mov.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36067 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50f0000 }
36069 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36073 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58f0000 }
36075 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36078 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36079 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5cf0000 }
36081 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36085 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7cf0000 }
36087 /* mov.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36091 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70f0000 }
36093 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36097 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78f0000 }
36099 /* mov.w${G} $Dst32RnUnprefixedHI,${Dsp-16-s8}[sp] */
36102 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36103 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xa90f00 }
36105 /* mov.w${G} $Dst32AnUnprefixedHI,${Dsp-16-s8}[sp] */
36108 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36109 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18f00 }
36111 /* mov.w${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36114 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36115 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xa10f00 }
36117 /* mov.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36121 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20f0000 }
36123 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36127 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28f0000 }
36129 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36133 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2cf0000 }
36135 /* mov.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36139 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40f0000 }
36141 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36145 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48f0000 }
36147 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36150 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36151 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4cf0000 }
36153 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36157 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6cf0000 }
36159 /* mov.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36163 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60f0000 }
36165 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36169 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68f0000 }
36171 /* mov.b${G} $Dst32RnUnprefixedQI,${Dsp-16-s8}[sp] */
36174 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36175 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xa80f00 }
36177 /* mov.b${G} $Dst32AnUnprefixedQI,${Dsp-16-s8}[sp] */
36180 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36181 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xa08f00 }
36183 /* mov.b${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36186 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36187 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xa00f00 }
36189 /* mov.w${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36193 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75380000 }
36195 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36199 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x753a0000 }
36201 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36204 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36205 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x753b0000 }
36207 /* mov.w${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36211 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x753c0000 }
36213 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36217 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x753e0000 }
36219 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36223 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x753f0000 }
36225 /* mov.w${G} $Dst16RnHI,${Dsp-16-s8}[sp] */
36228 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36229 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x753000 }
36231 /* mov.w${G} $Dst16AnHI,${Dsp-16-s8}[sp] */
36234 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36235 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x753400 }
36237 /* mov.w${G} [$Dst16An],${Dsp-16-s8}[sp] */
36240 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36241 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x753600 }
36243 /* mov.b${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36247 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74380000 }
36249 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36253 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x743a0000 }
36255 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36258 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36259 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x743b0000 }
36261 /* mov.b${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36265 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x743c0000 }
36267 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36271 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x743e0000 }
36273 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36277 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x743f0000 }
36279 /* mov.b${G} $Dst16RnQI,${Dsp-16-s8}[sp] */
36282 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36283 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x743000 }
36285 /* mov.b${G} $Dst16AnQI,${Dsp-16-s8}[sp] */
36288 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36289 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x743400 }
36291 /* mov.b${G} [$Dst16An],${Dsp-16-s8}[sp] */
36294 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36295 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x743600 }
36297 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36300 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36301 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30f0000 }
36303 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36306 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36307 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38f0000 }
36309 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36312 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36313 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3cf0000 }
36315 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36318 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36319 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50f0000 }
36321 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36324 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36325 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58f0000 }
36327 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36330 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36331 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5cf0000 }
36333 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36336 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36337 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7cf0000 }
36339 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36342 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36343 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70f0000 }
36345 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36348 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36349 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78f0000 }
36351 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedHI */
36354 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
36355 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xb90f00 }
36357 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedHI */
36360 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
36361 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18f00 }
36363 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36366 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36367 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xb10f00 }
36369 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36372 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36373 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20f0000 }
36375 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36378 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36379 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28f0000 }
36381 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36384 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36385 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2cf0000 }
36387 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36390 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36391 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40f0000 }
36393 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36396 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36397 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48f0000 }
36399 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36402 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36403 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4cf0000 }
36405 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36408 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36409 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6cf0000 }
36411 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36414 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36415 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60f0000 }
36417 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36420 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36421 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68f0000 }
36423 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedQI */
36426 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
36427 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xb80f00 }
36429 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedQI */
36432 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
36433 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xb08f00 }
36435 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36438 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36439 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xb00f00 }
36441 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36444 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36445 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75b80000 }
36447 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36450 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36451 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x75ba0000 }
36453 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36456 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36457 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x75bb0000 }
36459 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36462 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36463 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x75bc0000 }
36465 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36468 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36469 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x75be0000 }
36471 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36474 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36475 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x75bf0000 }
36477 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16RnHI */
36480 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNHI
), 0 } },
36481 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x75b000 }
36483 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16AnHI */
36486 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANHI
), 0 } },
36487 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x75b400 }
36489 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36492 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36493 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x75b600 }
36495 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36498 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36499 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74b80000 }
36501 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36504 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36505 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x74ba0000 }
36507 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36510 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36511 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x74bb0000 }
36513 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36516 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36517 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x74bc0000 }
36519 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36522 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36523 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x74be0000 }
36525 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36528 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36529 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x74bf0000 }
36531 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16RnQI */
36534 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNQI
), 0 } },
36535 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x74b000 }
36537 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16AnQI */
36540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANQI
), 0 } },
36541 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x74b400 }
36543 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36546 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36547 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x74b600 }
36549 /* mov.l${S} ${Dsp-8-u8}[sb],a1 */
36552 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
36553 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6900 }
36555 /* mov.l${S} ${Dsp-8-s8}[fb],a1 */
36558 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
36559 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7900 }
36561 /* mov.l${S} ${Dsp-8-u8}[sb],a0 */
36564 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
36565 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6800 }
36567 /* mov.l${S} ${Dsp-8-s8}[fb],a0 */
36570 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
36571 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7800 }
36573 /* mov.l${S} ${Dsp-8-u16},a1 */
36576 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '1', 0 } },
36577 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x590000 }
36579 /* mov.l${S} ${Dsp-8-u16},a0 */
36582 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '0', 0 } },
36583 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x580000 }
36585 /* mov.w${S} r0,${Dsp-8-u8}[sb] */
36588 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36589 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2100 }
36591 /* mov.w${S} r0,${Dsp-8-s8}[fb] */
36594 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36595 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3100 }
36597 /* mov.b${S} r0l,${Dsp-8-u8}[sb] */
36600 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36601 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2000 }
36603 /* mov.b${S} r0l,${Dsp-8-s8}[fb] */
36606 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36607 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3000 }
36609 /* mov.w${S} r0,${Dsp-8-u16} */
36612 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U16
), 0 } },
36613 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x110000 }
36615 /* mov.b${S} r0l,${Dsp-8-u16} */
36618 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U16
), 0 } },
36619 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x100000 }
36621 /* mov.w${S} ${Dsp-8-u8}[sb],r1 */
36624 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
36625 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6f00 }
36627 /* mov.w${S} ${Dsp-8-s8}[fb],r1 */
36630 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
36631 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7f00 }
36633 /* mov.b${S} ${Dsp-8-u8}[sb],r1l */
36636 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 'l', 0 } },
36637 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6e00 }
36639 /* mov.b${S} ${Dsp-8-s8}[fb],r1l */
36642 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 'l', 0 } },
36643 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7e00 }
36645 /* mov.w${S} ${Dsp-8-u16},r1 */
36648 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 0 } },
36649 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5f0000 }
36651 /* mov.b${S} ${Dsp-8-u16},r1l */
36654 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 'l', 0 } },
36655 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5e0000 }
36657 /* mov.w${S} r0,r1 */
36660 { { MNEM
, OP (S
), ' ', 'r', '0', ',', 'r', '1', 0 } },
36661 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x4f }
36663 /* mov.b${S} r0l,r1l */
36666 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'r', '1', 'l', 0 } },
36667 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x4e }
36669 /* mov.w${S} ${Dsp-8-u8}[sb],r0 */
36672 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36673 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2900 }
36675 /* mov.w${S} ${Dsp-8-s8}[fb],r0 */
36678 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36679 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3900 }
36681 /* mov.b${S} ${Dsp-8-u8}[sb],r0l */
36684 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
36685 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2800 }
36687 /* mov.b${S} ${Dsp-8-s8}[fb],r0l */
36690 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
36691 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3800 }
36693 /* mov.w${S} ${Dsp-8-u16},r0 */
36696 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 0 } },
36697 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x190000 }
36699 /* mov.b${S} ${Dsp-8-u16},r0l */
36702 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 'l', 0 } },
36703 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x180000 }
36705 /* mov.b${S} ${SrcDst16-r0l-r0h-S-normal} */
36708 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
36709 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x8 }
36711 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
36714 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36715 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x900 }
36717 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
36720 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36721 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0xa00 }
36723 /* mov.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
36726 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
36727 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0xb0000 }
36729 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u8}[sb] */
36732 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36733 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x100 }
36735 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-s8}[fb] */
36738 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36739 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x200 }
36741 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u16} */
36744 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U16
), 0 } },
36745 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x30000 }
36747 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36751 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990300 }
36753 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
36756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36757 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992300 }
36759 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
36762 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36763 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993300 }
36765 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36769 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918300 }
36771 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
36774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36775 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a300 }
36777 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
36780 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36781 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b300 }
36783 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
36786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36787 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910300 }
36789 /* mov.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
36792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36793 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912300 }
36795 /* mov.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
36798 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36799 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913300 }
36801 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36805 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93030000 }
36807 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36811 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93230000 }
36813 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36816 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36817 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93330000 }
36819 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36823 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95030000 }
36825 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36829 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95230000 }
36831 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36834 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36835 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95330000 }
36837 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36841 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97030000 }
36843 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36847 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97230000 }
36849 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36852 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36853 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97330000 }
36855 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
36858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36859 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93830000 }
36861 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
36864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36865 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a30000 }
36867 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
36870 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36871 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b30000 }
36873 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
36876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36877 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95830000 }
36879 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
36882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36883 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a30000 }
36885 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
36888 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36889 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b30000 }
36891 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
36894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36895 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c30000 }
36897 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
36900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36901 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e30000 }
36903 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
36906 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36907 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f30000 }
36909 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
36912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36913 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c30000 }
36915 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
36918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36919 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e30000 }
36921 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
36924 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36925 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f30000 }
36927 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
36930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
36931 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c30000 }
36933 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
36936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36937 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e30000 }
36939 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
36942 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36943 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f30000 }
36945 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
36948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
36949 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97830000 }
36951 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
36954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36955 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a30000 }
36957 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
36960 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36961 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b30000 }
36963 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36967 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9030000 }
36969 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
36972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36973 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9230000 }
36975 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
36978 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36979 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9330000 }
36981 /* mov.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
36984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36985 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9330000 }
36987 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36991 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1830000 }
36993 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
36996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36997 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a30000 }
36999 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
37002 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37003 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b30000 }
37005 /* mov.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
37008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37009 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b30000 }
37011 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37015 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1030000 }
37017 /* mov.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37021 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1230000 }
37023 /* mov.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37026 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37027 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1330000 }
37029 /* mov.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37033 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1330000 }
37035 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37039 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3030000 }
37041 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37045 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3230000 }
37047 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37050 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37051 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3330000 }
37053 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37057 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3330000 }
37059 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37063 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5030000 }
37065 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37069 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5230000 }
37071 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37074 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37075 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5330000 }
37077 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37081 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5330000 }
37083 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37087 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7030000 }
37089 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37093 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7230000 }
37095 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37098 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37099 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7330000 }
37101 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37105 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7330000 }
37107 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
37110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37111 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3830000 }
37113 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
37116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37117 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a30000 }
37119 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
37122 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37123 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b30000 }
37125 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
37128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37129 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b30000 }
37131 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
37134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37135 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5830000 }
37137 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
37140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37141 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a30000 }
37143 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
37146 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37147 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b30000 }
37149 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
37152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37153 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b30000 }
37155 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
37158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37159 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c30000 }
37161 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
37164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37165 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e30000 }
37167 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
37170 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37171 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f30000 }
37173 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
37176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37177 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f30000 }
37179 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
37182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37183 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c30000 }
37185 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
37188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37189 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e30000 }
37191 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
37194 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37195 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f30000 }
37197 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
37200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37201 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f30000 }
37203 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
37206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
37207 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c30000 }
37209 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
37212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37213 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e30000 }
37215 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
37218 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37219 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f30000 }
37221 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
37224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
37225 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f30000 }
37227 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
37230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
37231 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7830000 }
37233 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
37236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37237 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a30000 }
37239 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
37242 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37243 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b30000 }
37245 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
37248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
37249 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b30000 }
37251 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37255 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9030000 }
37257 /* mov.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
37260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37261 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9230000 }
37263 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37267 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1830000 }
37269 /* mov.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
37272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37273 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a30000 }
37275 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37279 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1030000 }
37281 /* mov.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
37284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37285 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1230000 }
37287 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
37290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37291 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3030000 }
37293 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
37296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37297 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3230000 }
37299 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
37302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37303 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5030000 }
37305 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
37308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37309 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5230000 }
37311 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
37314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37315 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7030000 }
37317 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
37320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37321 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7230000 }
37323 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
37326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37327 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3830000 }
37329 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
37332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37333 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a30000 }
37335 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
37338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37339 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5830000 }
37341 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
37344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37345 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a30000 }
37347 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
37350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37351 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c30000 }
37353 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
37356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37357 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e30000 }
37359 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
37362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37363 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c30000 }
37365 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
37368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37369 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e30000 }
37371 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
37374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
37375 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c30000 }
37377 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
37380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
37381 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e30000 }
37383 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
37386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
37387 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7830000 }
37389 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
37392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
37393 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a30000 }
37395 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
37398 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37399 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc903 }
37401 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
37404 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37405 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8923 }
37407 /* mov.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37410 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37411 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8903 }
37413 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
37416 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37417 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc183 }
37419 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
37422 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37423 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a3 }
37425 /* mov.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37428 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37429 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8183 }
37431 /* mov.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
37434 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37435 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc103 }
37437 /* mov.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
37440 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37441 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8123 }
37443 /* mov.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37446 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37447 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8103 }
37449 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37452 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37453 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30300 }
37455 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37458 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37459 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832300 }
37461 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
37464 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37465 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830300 }
37467 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37470 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37471 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5030000 }
37473 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37476 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37477 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85230000 }
37479 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
37482 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37483 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85030000 }
37485 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37488 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37489 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7030000 }
37491 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37494 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37495 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87230000 }
37497 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
37500 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37501 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87030000 }
37503 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
37506 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37507 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38300 }
37509 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
37512 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37513 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a300 }
37515 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
37518 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37519 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838300 }
37521 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
37524 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37525 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5830000 }
37527 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
37530 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37531 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a30000 }
37533 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
37536 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37537 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85830000 }
37539 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
37542 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37543 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c300 }
37545 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
37548 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37549 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e300 }
37551 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
37554 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37555 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c300 }
37557 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
37560 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37561 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c30000 }
37563 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
37566 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37567 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e30000 }
37569 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
37572 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37573 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c30000 }
37575 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
37578 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37579 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c30000 }
37581 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
37584 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37585 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e30000 }
37587 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
37590 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
37591 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c30000 }
37593 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
37596 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37597 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7830000 }
37599 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
37602 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37603 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a30000 }
37605 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
37608 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
37609 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87830000 }
37611 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16AnQI-S} */
37614 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37615 & ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI
, { 0x3100 }
37617 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16AnQI-S} */
37620 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37621 & ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI
, { 0x3200 }
37623 /* mov.b${S} ${Dsp-8-u16},${Dst16AnQI-S} */
37626 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16ANQI_S
), 0 } },
37627 & ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI
, { 0x330000 }
37629 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37633 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990b00 }
37635 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
37638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37639 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992b00 }
37641 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
37644 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37645 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993b00 }
37647 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37651 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918b00 }
37653 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
37656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37657 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ab00 }
37659 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
37662 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37663 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bb00 }
37665 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37669 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910b00 }
37671 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
37674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37675 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912b00 }
37677 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
37680 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37681 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913b00 }
37683 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37687 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930b0000 }
37689 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37693 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932b0000 }
37695 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37698 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37699 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933b0000 }
37701 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37705 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950b0000 }
37707 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37711 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952b0000 }
37713 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37716 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37717 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953b0000 }
37719 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37723 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970b0000 }
37725 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37729 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972b0000 }
37731 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37734 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37735 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973b0000 }
37737 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
37740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37741 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938b0000 }
37743 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
37746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37747 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ab0000 }
37749 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
37752 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37753 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bb0000 }
37755 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
37758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37759 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958b0000 }
37761 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
37764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37765 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ab0000 }
37767 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
37770 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37771 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bb0000 }
37773 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
37776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37777 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cb0000 }
37779 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
37782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37783 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93eb0000 }
37785 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
37788 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37789 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fb0000 }
37791 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
37794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37795 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cb0000 }
37797 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
37800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37801 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95eb0000 }
37803 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
37806 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37807 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fb0000 }
37809 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
37812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
37813 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cb0000 }
37815 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
37818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37819 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97eb0000 }
37821 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
37824 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37825 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fb0000 }
37827 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
37830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
37831 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978b0000 }
37833 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
37836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37837 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ab0000 }
37839 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
37842 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37843 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bb0000 }
37845 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37849 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90b0000 }
37851 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
37854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37855 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92b0000 }
37857 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
37860 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37861 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93b0000 }
37863 /* mov.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
37866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37867 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93b0000 }
37869 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37873 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18b0000 }
37875 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
37878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37879 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ab0000 }
37881 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
37884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37885 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bb0000 }
37887 /* mov.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
37890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37891 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bb0000 }
37893 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37897 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10b0000 }
37899 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37903 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12b0000 }
37905 /* mov.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37908 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37909 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13b0000 }
37911 /* mov.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37915 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13b0000 }
37917 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37921 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30b0000 }
37923 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37927 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32b0000 }
37929 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37932 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37933 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33b0000 }
37935 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37939 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33b0000 }
37941 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37945 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50b0000 }
37947 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37951 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52b0000 }
37953 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37956 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37957 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53b0000 }
37959 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37963 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53b0000 }
37965 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37969 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70b0000 }
37971 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37975 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72b0000 }
37977 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37980 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37981 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73b0000 }
37983 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37987 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73b0000 }
37989 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
37992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37993 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38b0000 }
37995 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
37998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37999 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ab0000 }
38001 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38004 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38005 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bb0000 }
38007 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38011 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bb0000 }
38013 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38017 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58b0000 }
38019 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38023 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ab0000 }
38025 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38028 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38029 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bb0000 }
38031 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38035 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bb0000 }
38037 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38041 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cb0000 }
38043 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38047 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3eb0000 }
38049 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38053 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fb0000 }
38055 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38059 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fb0000 }
38061 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38065 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cb0000 }
38067 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38071 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5eb0000 }
38073 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38076 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38077 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fb0000 }
38079 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38083 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fb0000 }
38085 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38089 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cb0000 }
38091 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38095 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7eb0000 }
38097 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38101 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fb0000 }
38103 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
38106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38107 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fb0000 }
38109 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38113 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78b0000 }
38115 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38119 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ab0000 }
38121 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38125 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bb0000 }
38127 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
38130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
38131 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bb0000 }
38133 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38137 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90b0000 }
38139 /* mov.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
38142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38143 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92b0000 }
38145 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38149 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18b0000 }
38151 /* mov.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
38154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38155 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ab0000 }
38157 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38161 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10b0000 }
38163 /* mov.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
38166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38167 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12b0000 }
38169 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
38172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38173 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30b0000 }
38175 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
38178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38179 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32b0000 }
38181 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
38184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38185 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50b0000 }
38187 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
38190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38191 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52b0000 }
38193 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
38196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38197 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70b0000 }
38199 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
38202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38203 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72b0000 }
38205 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
38208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38209 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38b0000 }
38211 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
38214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38215 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ab0000 }
38217 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
38220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38221 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58b0000 }
38223 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
38226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38227 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ab0000 }
38229 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
38232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38233 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cb0000 }
38235 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
38238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38239 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3eb0000 }
38241 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
38244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38245 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cb0000 }
38247 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
38250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38251 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5eb0000 }
38253 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
38256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
38257 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cb0000 }
38259 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
38262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
38263 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7eb0000 }
38265 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
38268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
38269 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78b0000 }
38271 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
38274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
38275 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ab0000 }
38277 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
38280 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38281 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90b }
38283 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
38286 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38287 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892b }
38289 /* mov.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38292 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38293 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890b }
38295 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
38298 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38299 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18b }
38301 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
38304 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38305 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ab }
38307 /* mov.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38310 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38311 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818b }
38313 /* mov.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
38316 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38317 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10b }
38319 /* mov.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
38322 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38323 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812b }
38325 /* mov.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38328 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38329 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810b }
38331 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38334 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38335 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30b00 }
38337 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38340 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38341 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832b00 }
38343 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
38346 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38347 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830b00 }
38349 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38352 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38353 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50b0000 }
38355 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38358 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38359 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852b0000 }
38361 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
38364 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38365 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850b0000 }
38367 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38370 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38371 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70b0000 }
38373 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38376 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38377 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872b0000 }
38379 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
38382 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38383 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870b0000 }
38385 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
38388 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38389 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38b00 }
38391 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
38394 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38395 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ab00 }
38397 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
38400 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38401 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838b00 }
38403 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
38406 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38407 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58b0000 }
38409 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
38412 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38413 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ab0000 }
38415 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
38418 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38419 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858b0000 }
38421 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
38424 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38425 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cb00 }
38427 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
38430 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38431 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83eb00 }
38433 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
38436 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38437 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cb00 }
38439 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
38442 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38443 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cb0000 }
38445 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
38448 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38449 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85eb0000 }
38451 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
38454 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38455 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cb0000 }
38457 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
38460 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38461 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cb0000 }
38463 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
38466 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38467 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87eb0000 }
38469 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
38472 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
38473 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cb0000 }
38475 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
38478 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38479 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78b0000 }
38481 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
38484 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38485 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ab0000 }
38487 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
38490 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
38491 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878b0000 }
38493 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38497 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980b00 }
38499 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
38502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38503 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982b00 }
38505 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
38508 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38509 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983b00 }
38511 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38515 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908b00 }
38517 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
38520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38521 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ab00 }
38523 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
38526 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38527 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bb00 }
38529 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38533 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900b00 }
38535 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
38538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38539 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902b00 }
38541 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
38544 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38545 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903b00 }
38547 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38551 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920b0000 }
38553 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38557 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922b0000 }
38559 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38562 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38563 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923b0000 }
38565 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38569 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940b0000 }
38571 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38575 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942b0000 }
38577 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38580 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38581 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943b0000 }
38583 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38587 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960b0000 }
38589 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38593 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962b0000 }
38595 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38598 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38599 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963b0000 }
38601 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
38604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38605 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928b0000 }
38607 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
38610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38611 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ab0000 }
38613 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
38616 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38617 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bb0000 }
38619 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
38622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38623 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948b0000 }
38625 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
38628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38629 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ab0000 }
38631 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
38634 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38635 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bb0000 }
38637 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
38640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38641 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cb0000 }
38643 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
38646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38647 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92eb0000 }
38649 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
38652 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38653 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fb0000 }
38655 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
38658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38659 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cb0000 }
38661 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
38664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38665 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94eb0000 }
38667 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
38670 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38671 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fb0000 }
38673 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
38676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
38677 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cb0000 }
38679 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
38682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38683 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96eb0000 }
38685 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
38688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38689 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fb0000 }
38691 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
38694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
38695 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968b0000 }
38697 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
38700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38701 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ab0000 }
38703 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
38706 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38707 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bb0000 }
38709 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38713 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80b0000 }
38715 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
38718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38719 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82b0000 }
38721 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
38724 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38725 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83b0000 }
38727 /* mov.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
38730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38731 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83b0000 }
38733 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38737 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08b0000 }
38739 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
38742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38743 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ab0000 }
38745 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
38748 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38749 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bb0000 }
38751 /* mov.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
38754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38755 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bb0000 }
38757 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38761 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00b0000 }
38763 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
38766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38767 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02b0000 }
38769 /* mov.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
38772 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38773 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03b0000 }
38775 /* mov.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
38778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38779 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03b0000 }
38781 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38785 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20b0000 }
38787 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38791 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22b0000 }
38793 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38796 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38797 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23b0000 }
38799 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
38802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38803 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23b0000 }
38805 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38809 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40b0000 }
38811 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38815 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42b0000 }
38817 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38820 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38821 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43b0000 }
38823 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
38826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38827 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43b0000 }
38829 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38833 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60b0000 }
38835 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38839 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62b0000 }
38841 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38844 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38845 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63b0000 }
38847 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
38850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38851 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63b0000 }
38853 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
38856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38857 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28b0000 }
38859 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
38862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38863 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ab0000 }
38865 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38868 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38869 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bb0000 }
38871 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38875 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bb0000 }
38877 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38881 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48b0000 }
38883 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38887 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ab0000 }
38889 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38892 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38893 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bb0000 }
38895 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38899 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bb0000 }
38901 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38905 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cb0000 }
38907 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38911 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2eb0000 }
38913 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38916 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38917 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fb0000 }
38919 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38923 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fb0000 }
38925 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38929 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cb0000 }
38931 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38935 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4eb0000 }
38937 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38940 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38941 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fb0000 }
38943 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38947 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fb0000 }
38949 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38953 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cb0000 }
38955 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38959 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6eb0000 }
38961 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38964 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38965 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fb0000 }
38967 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
38970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38971 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fb0000 }
38973 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38977 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68b0000 }
38979 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38983 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ab0000 }
38985 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38988 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38989 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bb0000 }
38991 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
38994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
38995 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bb0000 }
38997 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
39000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39001 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80b0000 }
39003 /* mov.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
39006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39007 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82b0000 }
39009 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39013 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08b0000 }
39015 /* mov.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
39018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39019 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ab0000 }
39021 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39025 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00b0000 }
39027 /* mov.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
39030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39031 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02b0000 }
39033 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
39036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39037 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20b0000 }
39039 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
39042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39043 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22b0000 }
39045 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
39048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39049 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40b0000 }
39051 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
39054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39055 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42b0000 }
39057 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
39060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39061 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60b0000 }
39063 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
39066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39067 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62b0000 }
39069 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
39072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39073 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28b0000 }
39075 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
39078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39079 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ab0000 }
39081 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
39084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39085 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48b0000 }
39087 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
39090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39091 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ab0000 }
39093 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
39096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39097 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cb0000 }
39099 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
39102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39103 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2eb0000 }
39105 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
39108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39109 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cb0000 }
39111 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
39114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39115 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4eb0000 }
39117 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
39120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
39121 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cb0000 }
39123 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
39126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
39127 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6eb0000 }
39129 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
39132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
39133 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68b0000 }
39135 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
39138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
39139 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ab0000 }
39141 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
39144 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39145 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80b }
39147 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
39150 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39151 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882b }
39153 /* mov.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
39156 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39157 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880b }
39159 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
39162 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39163 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08b }
39165 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
39168 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39169 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ab }
39171 /* mov.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39174 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39175 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808b }
39177 /* mov.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
39180 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39181 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00b }
39183 /* mov.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
39186 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39187 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802b }
39189 /* mov.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39192 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39193 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800b }
39195 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39198 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39199 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20b00 }
39201 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39204 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39205 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822b00 }
39207 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
39210 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39211 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820b00 }
39213 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39216 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39217 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40b0000 }
39219 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39222 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39223 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842b0000 }
39225 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
39228 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39229 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840b0000 }
39231 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39234 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39235 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60b0000 }
39237 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39240 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39241 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862b0000 }
39243 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
39246 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39247 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860b0000 }
39249 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
39252 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39253 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28b00 }
39255 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
39258 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39259 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ab00 }
39261 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
39264 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39265 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828b00 }
39267 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
39270 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39271 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48b0000 }
39273 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
39276 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39277 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ab0000 }
39279 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
39282 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39283 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848b0000 }
39285 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
39288 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39289 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cb00 }
39291 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
39294 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39295 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82eb00 }
39297 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
39300 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39301 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cb00 }
39303 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
39306 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39307 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cb0000 }
39309 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
39312 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39313 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84eb0000 }
39315 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
39318 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39319 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cb0000 }
39321 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
39324 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39325 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cb0000 }
39327 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
39330 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39331 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86eb0000 }
39333 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
39336 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
39337 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cb0000 }
39339 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
39342 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39343 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68b0000 }
39345 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
39348 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39349 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ab0000 }
39351 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
39354 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
39355 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868b0000 }
39357 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
39360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39361 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x738000 }
39363 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
39366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39367 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73a000 }
39369 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
39372 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39373 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x73b000 }
39375 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
39378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39379 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x738400 }
39381 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
39384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39385 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x73a400 }
39387 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
39390 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39391 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x73b400 }
39393 /* mov.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39397 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x738600 }
39399 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39403 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x73a600 }
39405 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39408 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39409 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x73b600 }
39411 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39415 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x73880000 }
39417 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39421 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73a80000 }
39423 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39426 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39427 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73b80000 }
39429 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39433 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x738c0000 }
39435 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39439 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73ac0000 }
39441 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39444 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39445 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73bc0000 }
39447 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39451 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x738a0000 }
39453 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39457 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73aa0000 }
39459 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39462 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39463 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73ba0000 }
39465 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39469 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x738e0000 }
39471 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39475 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73ae0000 }
39477 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39480 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39481 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73be0000 }
39483 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39487 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x738b0000 }
39489 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39493 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73ab0000 }
39495 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39498 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39499 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73bb0000 }
39501 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39505 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x738f0000 }
39507 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
39510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39511 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x73af0000 }
39513 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
39516 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39517 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x73bf0000 }
39519 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
39522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39523 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x73c00000 }
39525 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
39528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39529 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73e00000 }
39531 /* mov.w${G} ${Dsp-16-u16},$Dst16RnHI */
39534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
39535 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x73f00000 }
39537 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
39540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39541 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x73c40000 }
39543 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
39546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39547 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x73e40000 }
39549 /* mov.w${G} ${Dsp-16-u16},$Dst16AnHI */
39552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
39553 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x73f40000 }
39555 /* mov.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
39558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39559 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x73c60000 }
39561 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
39564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39565 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x73e60000 }
39567 /* mov.w${G} ${Dsp-16-u16},[$Dst16An] */
39570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
39571 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x73f60000 }
39573 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
39576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39577 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x73c80000 }
39579 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
39582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39583 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x73e80000 }
39585 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
39588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39589 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x73f80000 }
39591 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
39594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39595 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x73cc0000 }
39597 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
39600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39601 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x73ec0000 }
39603 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
39606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39607 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x73fc0000 }
39609 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
39612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39613 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ca0000 }
39615 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
39618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39619 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ea0000 }
39621 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
39624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39625 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x73fa0000 }
39627 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
39630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39631 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ce0000 }
39633 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
39636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39637 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ee0000 }
39639 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
39642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39643 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x73fe0000 }
39645 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
39648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39649 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73cb0000 }
39651 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
39654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39655 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73eb0000 }
39657 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
39660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39661 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x73fb0000 }
39663 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
39666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
39667 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x73cf0000 }
39669 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
39672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
39673 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x73ef0000 }
39675 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
39678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
39679 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x73ff0000 }
39681 /* mov.w${G} $Src16RnHI,$Dst16RnHI */
39684 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
39685 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7300 }
39687 /* mov.w${G} $Src16AnHI,$Dst16RnHI */
39690 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
39691 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7340 }
39693 /* mov.w${G} [$Src16An],$Dst16RnHI */
39696 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39697 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7360 }
39699 /* mov.w${G} $Src16RnHI,$Dst16AnHI */
39702 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
39703 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7304 }
39705 /* mov.w${G} $Src16AnHI,$Dst16AnHI */
39708 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
39709 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7344 }
39711 /* mov.w${G} [$Src16An],$Dst16AnHI */
39714 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39715 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7364 }
39717 /* mov.w${G} $Src16RnHI,[$Dst16An] */
39720 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39721 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7306 }
39723 /* mov.w${G} $Src16AnHI,[$Dst16An] */
39726 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39727 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7346 }
39729 /* mov.w${G} [$Src16An],[$Dst16An] */
39732 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39733 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7366 }
39735 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
39738 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39739 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x730800 }
39741 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
39744 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39745 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x734800 }
39747 /* mov.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
39750 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39751 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x736800 }
39753 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
39756 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39757 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x730c0000 }
39759 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
39762 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39763 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x734c0000 }
39765 /* mov.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
39768 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39769 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x736c0000 }
39771 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
39774 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39775 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x730a00 }
39777 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
39780 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39781 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x734a00 }
39783 /* mov.w${G} [$Src16An],${Dsp-16-u8}[sb] */
39786 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39787 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x736a00 }
39789 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
39792 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39793 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x730e0000 }
39795 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
39798 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39799 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x734e0000 }
39801 /* mov.w${G} [$Src16An],${Dsp-16-u16}[sb] */
39804 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39805 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x736e0000 }
39807 /* mov.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
39810 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39811 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x730b00 }
39813 /* mov.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
39816 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39817 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x734b00 }
39819 /* mov.w${G} [$Src16An],${Dsp-16-s8}[fb] */
39822 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39823 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x736b00 }
39825 /* mov.w${G} $Src16RnHI,${Dsp-16-u16} */
39828 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
39829 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x730f0000 }
39831 /* mov.w${G} $Src16AnHI,${Dsp-16-u16} */
39834 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
39835 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x734f0000 }
39837 /* mov.w${G} [$Src16An],${Dsp-16-u16} */
39840 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
39841 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x736f0000 }
39843 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
39846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
39847 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x728000 }
39849 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
39852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39853 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72a000 }
39855 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
39858 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39859 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x72b000 }
39861 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
39864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
39865 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x728400 }
39867 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
39870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39871 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x72a400 }
39873 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
39876 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39877 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x72b400 }
39879 /* mov.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39883 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x728600 }
39885 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39889 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x72a600 }
39891 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39894 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39895 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x72b600 }
39897 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39901 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x72880000 }
39903 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39907 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72a80000 }
39909 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39912 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39913 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72b80000 }
39915 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39919 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x728c0000 }
39921 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39925 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72ac0000 }
39927 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39930 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39931 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72bc0000 }
39933 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39937 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x728a0000 }
39939 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39943 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72aa0000 }
39945 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39948 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39949 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72ba0000 }
39951 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39955 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x728e0000 }
39957 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39961 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72ae0000 }
39963 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39966 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39967 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72be0000 }
39969 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39973 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x728b0000 }
39975 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39979 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72ab0000 }
39981 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39984 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39985 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72bb0000 }
39987 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39991 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x728f0000 }
39993 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
39996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39997 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x72af0000 }
39999 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
40002 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
40003 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x72bf0000 }
40005 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
40008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40009 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x72c00000 }
40011 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
40014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
40015 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72e00000 }
40017 /* mov.b${G} ${Dsp-16-u16},$Dst16RnQI */
40020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
40021 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x72f00000 }
40023 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
40026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40027 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x72c40000 }
40029 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
40032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
40033 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x72e40000 }
40035 /* mov.b${G} ${Dsp-16-u16},$Dst16AnQI */
40038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
40039 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x72f40000 }
40041 /* mov.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
40044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40045 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x72c60000 }
40047 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
40050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
40051 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x72e60000 }
40053 /* mov.b${G} ${Dsp-16-u16},[$Dst16An] */
40056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
40057 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x72f60000 }
40059 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
40062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40063 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x72c80000 }
40065 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
40068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40069 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x72e80000 }
40071 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
40074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40075 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x72f80000 }
40077 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
40080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40081 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x72cc0000 }
40083 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
40086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40087 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x72ec0000 }
40089 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
40092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40093 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x72fc0000 }
40095 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
40098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40099 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ca0000 }
40101 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
40104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40105 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ea0000 }
40107 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
40110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40111 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x72fa0000 }
40113 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
40116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40117 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ce0000 }
40119 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
40122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40123 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ee0000 }
40125 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
40128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40129 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x72fe0000 }
40131 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
40134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40135 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72cb0000 }
40137 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
40140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40141 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72eb0000 }
40143 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
40146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40147 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x72fb0000 }
40149 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
40152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
40153 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x72cf0000 }
40155 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
40158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
40159 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x72ef0000 }
40161 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
40164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
40165 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x72ff0000 }
40167 /* mov.b${G} $Src16RnQI,$Dst16RnQI */
40170 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
40171 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7200 }
40173 /* mov.b${G} $Src16AnQI,$Dst16RnQI */
40176 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
40177 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7240 }
40179 /* mov.b${G} [$Src16An],$Dst16RnQI */
40182 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40183 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7260 }
40185 /* mov.b${G} $Src16RnQI,$Dst16AnQI */
40188 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
40189 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7204 }
40191 /* mov.b${G} $Src16AnQI,$Dst16AnQI */
40194 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
40195 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7244 }
40197 /* mov.b${G} [$Src16An],$Dst16AnQI */
40200 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40201 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7264 }
40203 /* mov.b${G} $Src16RnQI,[$Dst16An] */
40206 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40207 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7206 }
40209 /* mov.b${G} $Src16AnQI,[$Dst16An] */
40212 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40213 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7246 }
40215 /* mov.b${G} [$Src16An],[$Dst16An] */
40218 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40219 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7266 }
40221 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
40224 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40225 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x720800 }
40227 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
40230 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40231 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x724800 }
40233 /* mov.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
40236 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40237 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x726800 }
40239 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
40242 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40243 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x720c0000 }
40245 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
40248 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40249 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x724c0000 }
40251 /* mov.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
40254 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40255 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x726c0000 }
40257 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
40260 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40261 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x720a00 }
40263 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
40266 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40267 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x724a00 }
40269 /* mov.b${G} [$Src16An],${Dsp-16-u8}[sb] */
40272 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40273 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x726a00 }
40275 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
40278 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40279 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x720e0000 }
40281 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
40284 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40285 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x724e0000 }
40287 /* mov.b${G} [$Src16An],${Dsp-16-u16}[sb] */
40290 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40291 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x726e0000 }
40293 /* mov.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
40296 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40297 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x720b00 }
40299 /* mov.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
40302 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40303 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x724b00 }
40305 /* mov.b${G} [$Src16An],${Dsp-16-s8}[fb] */
40308 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40309 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x726b00 }
40311 /* mov.b${G} $Src16RnQI,${Dsp-16-u16} */
40314 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
40315 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x720f0000 }
40317 /* mov.b${G} $Src16AnQI,${Dsp-16-u16} */
40320 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
40321 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x724f0000 }
40323 /* mov.b${G} [$Src16An],${Dsp-16-u16} */
40326 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
40327 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x726f0000 }
40329 /* mov.w${Z} #0,${Dsp-8-u8}[sb] */
40332 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40333 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2300 }
40335 /* mov.w${Z} #0,${Dsp-8-s8}[fb] */
40338 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40339 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3300 }
40341 /* mov.w${Z} #0,${Dsp-8-u16} */
40344 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40345 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x130000 }
40347 /* mov.w${Z} #0,r0 */
40350 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 0 } },
40351 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x3 }
40353 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40356 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40357 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2200 }
40359 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40362 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40363 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3200 }
40365 /* mov.b${Z} #0,${Dsp-8-u16} */
40368 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40369 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x120000 }
40371 /* mov.b${Z} #0,r0l */
40374 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40375 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x2 }
40377 /* mov.b${Z} #0,r0l */
40380 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40381 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xb4 }
40383 /* mov.b${Z} #0,r0h */
40386 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'h', 0 } },
40387 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xb3 }
40389 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40392 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40393 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xb500 }
40395 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40398 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40399 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xb600 }
40401 /* mov.b${Z} #0,${Dsp-8-u16} */
40404 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40405 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xb70000 }
40407 /* mov.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
40410 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40411 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf920 }
40413 /* mov.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
40416 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40417 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf1a0 }
40419 /* mov.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40422 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40423 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf120 }
40425 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40428 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40429 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf32000 }
40431 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40434 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40435 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5200000 }
40437 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40440 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40441 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7200000 }
40443 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40446 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40447 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3a000 }
40449 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40452 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40453 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5a00000 }
40455 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40458 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40459 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3e000 }
40461 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40464 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40465 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5e00000 }
40467 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
40470 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40471 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7e00000 }
40473 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
40476 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40477 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7a00000 }
40479 /* mov.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
40482 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40483 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf820 }
40485 /* mov.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
40488 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40489 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf0a0 }
40491 /* mov.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40494 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40495 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf020 }
40497 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40500 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40501 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf22000 }
40503 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40506 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40507 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4200000 }
40509 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40512 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40513 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6200000 }
40515 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40518 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40519 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2a000 }
40521 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40524 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40525 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4a00000 }
40527 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40530 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40531 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2e000 }
40533 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40536 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40537 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4e00000 }
40539 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
40542 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40543 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6e00000 }
40545 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
40548 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40549 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6a00000 }
40551 /* mov.w${Q} #${Imm-8-s4},$Dst16RnHI */
40554 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
40555 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd900 }
40557 /* mov.w${Q} #${Imm-8-s4},$Dst16AnHI */
40560 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
40561 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd904 }
40563 /* mov.w${Q} #${Imm-8-s4},[$Dst16An] */
40566 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40567 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd906 }
40569 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40572 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40573 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd90800 }
40575 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40578 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40579 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd90c0000 }
40581 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40584 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40585 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd90a00 }
40587 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40590 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40591 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd90e0000 }
40593 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40596 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40597 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd90b00 }
40599 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
40602 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40603 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd90f0000 }
40605 /* mov.b${Q} #${Imm-8-s4},$Dst16RnQI */
40608 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
40609 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd800 }
40611 /* mov.b${Q} #${Imm-8-s4},$Dst16AnQI */
40614 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
40615 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd804 }
40617 /* mov.b${Q} #${Imm-8-s4},[$Dst16An] */
40620 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40621 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd806 }
40623 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40626 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40627 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd80800 }
40629 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40632 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40633 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd80c0000 }
40635 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40638 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40639 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd80a00 }
40641 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40644 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40645 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd80e0000 }
40647 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40650 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40651 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd80b00 }
40653 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
40656 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40657 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd80f0000 }
40659 /* mov.b${S} #${Imm-8-QI},r0l */
40662 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40663 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xc400 }
40665 /* mov.b${S} #${Imm-8-QI},r0h */
40668 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
40669 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xc300 }
40671 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
40674 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40675 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xc50000 }
40677 /* mov.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
40680 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40681 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xc60000 }
40683 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u16} */
40686 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
40687 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xc7000000 }
40689 /* mov.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
40692 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40693 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x25000000 }
40695 /* mov.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
40698 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40699 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x35000000 }
40701 /* mov.w${S} #${Imm-24-HI},${Dsp-8-u16} */
40704 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
40705 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x15000000 }
40707 /* mov.w${S} #${Imm-8-HI},r0 */
40710 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
40711 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x50000 }
40713 /* mov.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
40716 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40717 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x240000 }
40719 /* mov.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
40722 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40723 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x340000 }
40725 /* mov.b${S} #${Imm-24-QI},${Dsp-8-u16} */
40728 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
40729 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x14000000 }
40731 /* mov.b${S} #${Imm-8-QI},r0l */
40734 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40735 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x400 }
40737 /* mov.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
40740 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
40741 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb8310000 }
40743 /* mov.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
40746 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
40747 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb0b10000 }
40749 /* mov.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
40752 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40753 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb0310000 }
40755 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40758 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40759 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2310000 }
40761 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
40764 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40765 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2b10000 }
40767 /* mov.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
40770 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40771 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2f10000 }
40773 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40776 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40777 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4310000 }
40779 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
40782 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40783 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4b10000 }
40785 /* mov.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
40788 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40789 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4f10000 }
40791 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16} */
40794 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
40795 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6f10000 }
40797 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40800 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40801 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6310000 }
40803 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24} */
40806 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
40807 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6b10000 }
40809 /* mov.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
40812 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40813 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992f0000 }
40815 /* mov.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
40818 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40819 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91af0000 }
40821 /* mov.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
40824 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40825 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912f0000 }
40827 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40830 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40831 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932f0000 }
40833 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40836 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40837 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93af0000 }
40839 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40842 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40843 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ef0000 }
40845 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40848 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40849 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952f0000 }
40851 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
40854 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40855 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95af0000 }
40857 /* mov.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
40860 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40861 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ef0000 }
40863 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
40866 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
40867 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ef0000 }
40869 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40872 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40873 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972f0000 }
40875 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24} */
40878 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
40879 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97af0000 }
40881 /* mov.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
40884 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40885 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982f00 }
40887 /* mov.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
40890 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40891 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90af00 }
40893 /* mov.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
40896 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40897 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902f00 }
40899 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40902 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40903 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922f0000 }
40905 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
40908 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40909 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92af0000 }
40911 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
40914 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40915 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ef0000 }
40917 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40920 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40921 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942f0000 }
40923 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
40926 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40927 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94af0000 }
40929 /* mov.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
40932 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40933 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ef0000 }
40935 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
40938 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
40939 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ef0000 }
40941 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40944 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40945 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962f0000 }
40947 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24} */
40950 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
40951 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96af0000 }
40953 /* mov.w${G} #${Imm-16-HI},$Dst16RnHI */
40956 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
40957 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x75c00000 }
40959 /* mov.w${G} #${Imm-16-HI},$Dst16AnHI */
40962 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
40963 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x75c40000 }
40965 /* mov.w${G} #${Imm-16-HI},[$Dst16An] */
40968 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
40969 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x75c60000 }
40971 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
40974 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40975 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x75c80000 }
40977 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40980 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40981 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x75ca0000 }
40983 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40986 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40987 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x75cb0000 }
40989 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
40992 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40993 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x75cc0000 }
40995 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
40998 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40999 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x75ce0000 }
41001 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
41004 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
41005 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x75cf0000 }
41007 /* mov.b${G} #${Imm-16-QI},$Dst16RnQI */
41010 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
41011 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x74c000 }
41013 /* mov.b${G} #${Imm-16-QI},$Dst16AnQI */
41016 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
41017 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x74c400 }
41019 /* mov.b${G} #${Imm-16-QI},[$Dst16An] */
41022 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
41023 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x74c600 }
41025 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
41028 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
41029 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x74c80000 }
41031 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
41034 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
41035 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x74ca0000 }
41037 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
41040 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
41041 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x74cb0000 }
41043 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
41046 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
41047 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x74cc0000 }
41049 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
41052 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
41053 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x74ce0000 }
41055 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
41058 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
41059 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x74cf0000 }
41061 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41065 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990c00 }
41067 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
41070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41071 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992c00 }
41073 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
41076 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41077 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993c00 }
41079 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41083 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918c00 }
41085 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
41088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41089 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ac00 }
41091 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
41094 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41095 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bc00 }
41097 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41100 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41101 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910c00 }
41103 /* min.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41106 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41107 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912c00 }
41109 /* min.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41112 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41113 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913c00 }
41115 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41119 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930c00 }
41121 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41125 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932c00 }
41127 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41130 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41131 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933c00 }
41133 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
41136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41137 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950c00 }
41139 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41143 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952c00 }
41145 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41148 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41149 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953c00 }
41151 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
41154 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41155 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970c00 }
41157 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41161 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972c00 }
41163 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41166 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41167 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973c00 }
41169 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
41172 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41173 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938c00 }
41175 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
41178 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41179 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ac00 }
41181 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
41184 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41185 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bc00 }
41187 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
41190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41191 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958c00 }
41193 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
41196 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41197 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ac00 }
41199 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
41202 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41203 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bc00 }
41205 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
41208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41209 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cc00 }
41211 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
41214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41215 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ec00 }
41217 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
41220 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41221 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fc00 }
41223 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
41226 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41227 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cc00 }
41229 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
41232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41233 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ec00 }
41235 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
41238 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41239 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fc00 }
41241 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
41244 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
41245 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cc00 }
41247 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
41250 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41251 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ec00 }
41253 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
41256 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41257 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fc00 }
41259 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
41262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
41263 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978c00 }
41265 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
41268 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41269 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ac00 }
41271 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
41274 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41275 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bc00 }
41277 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41281 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90c00 }
41283 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
41286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41287 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92c00 }
41289 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
41292 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41293 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93c00 }
41295 /* min.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
41298 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41299 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93c00 }
41301 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41305 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18c00 }
41307 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
41310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41311 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ac00 }
41313 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
41316 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41317 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bc00 }
41319 /* min.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
41322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41323 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bc00 }
41325 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41329 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10c00 }
41331 /* min.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
41334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41335 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12c00 }
41337 /* min.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
41340 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41341 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13c00 }
41343 /* min.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
41346 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41347 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13c00 }
41349 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
41352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41353 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30c00 }
41355 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41359 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32c00 }
41361 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41364 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41365 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33c00 }
41367 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
41370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41371 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33c00 }
41373 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
41376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41377 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50c00 }
41379 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41383 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52c00 }
41385 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41388 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41389 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53c00 }
41391 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
41394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41395 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53c00 }
41397 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
41400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41401 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70c00 }
41403 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41407 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72c00 }
41409 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41412 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41413 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73c00 }
41415 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
41418 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41419 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73c00 }
41421 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
41424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41425 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38c00 }
41427 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
41430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41431 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ac00 }
41433 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
41436 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41437 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bc00 }
41439 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
41442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41443 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bc00 }
41445 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
41448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41449 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58c00 }
41451 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
41454 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41455 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ac00 }
41457 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
41460 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41461 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bc00 }
41463 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
41466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41467 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bc00 }
41469 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
41472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41473 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cc00 }
41475 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
41478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41479 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ec00 }
41481 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
41484 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41485 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fc00 }
41487 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
41490 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41491 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fc00 }
41493 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
41496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41497 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cc00 }
41499 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
41502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41503 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ec00 }
41505 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
41508 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41509 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fc00 }
41511 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
41514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41515 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fc00 }
41517 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
41520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
41521 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cc00 }
41523 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
41526 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41527 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ec00 }
41529 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
41532 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41533 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fc00 }
41535 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
41538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
41539 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fc00 }
41541 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
41544 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
41545 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78c00 }
41547 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
41550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41551 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ac00 }
41553 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
41556 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41557 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bc00 }
41559 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
41562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
41563 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bc00 }
41565 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41568 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41569 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90c00 }
41571 /* min.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
41574 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41575 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92c00 }
41577 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41581 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18c00 }
41583 /* min.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
41586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41587 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ac00 }
41589 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41592 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41593 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10c00 }
41595 /* min.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
41598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41599 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12c00 }
41601 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
41604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41605 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30c00 }
41607 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
41610 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41611 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32c00 }
41613 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
41616 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41617 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50c00 }
41619 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
41622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41623 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52c00 }
41625 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
41628 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41629 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70c00 }
41631 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
41634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41635 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72c00 }
41637 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
41640 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41641 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38c00 }
41643 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
41646 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41647 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ac00 }
41649 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
41652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41653 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58c00 }
41655 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
41658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41659 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ac00 }
41661 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
41664 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41665 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cc00 }
41667 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
41670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41671 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ec00 }
41673 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
41676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41677 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cc00 }
41679 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
41682 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41683 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ec00 }
41685 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
41688 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
41689 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cc00 }
41691 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
41694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
41695 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ec00 }
41697 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
41700 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
41701 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78c00 }
41703 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
41706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
41707 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ac00 }
41709 /* min.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
41712 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41713 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90c }
41715 /* min.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
41718 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41719 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892c }
41721 /* min.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
41724 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41725 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890c }
41727 /* min.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
41730 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41731 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18c }
41733 /* min.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
41736 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41737 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ac }
41739 /* min.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
41742 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41743 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818c }
41745 /* min.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
41748 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41749 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10c }
41751 /* min.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
41754 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41755 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812c }
41757 /* min.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
41760 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41761 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810c }
41763 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41766 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41767 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30c00 }
41769 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41772 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41773 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832c00 }
41775 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
41778 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41779 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830c00 }
41781 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41784 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41785 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50c00 }
41787 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41790 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41791 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852c00 }
41793 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
41796 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41797 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850c00 }
41799 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41802 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41803 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70c00 }
41805 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41808 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41809 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872c00 }
41811 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
41814 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41815 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870c00 }
41817 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
41820 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41821 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38c00 }
41823 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
41826 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41827 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ac00 }
41829 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
41832 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41833 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838c00 }
41835 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
41838 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41839 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58c00 }
41841 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
41844 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41845 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ac00 }
41847 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
41850 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41851 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858c00 }
41853 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
41856 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41857 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cc00 }
41859 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
41862 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41863 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ec00 }
41865 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
41868 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41869 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cc00 }
41871 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
41874 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41875 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cc00 }
41877 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
41880 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41881 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ec00 }
41883 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
41886 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41887 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cc00 }
41889 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
41892 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41893 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cc00 }
41895 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
41898 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41899 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ec00 }
41901 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
41904 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
41905 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cc00 }
41907 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
41910 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41911 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78c00 }
41913 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
41916 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41917 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ac00 }
41919 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
41922 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
41923 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878c00 }
41925 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
41928 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41929 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980c00 }
41931 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
41934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41935 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982c00 }
41937 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
41940 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41941 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983c00 }
41943 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
41946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41947 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908c00 }
41949 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
41952 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41953 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ac00 }
41955 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
41958 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41959 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bc00 }
41961 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41964 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41965 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900c00 }
41967 /* min.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41970 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41971 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902c00 }
41973 /* min.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41976 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41977 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903c00 }
41979 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41982 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41983 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920c00 }
41985 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41988 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41989 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922c00 }
41991 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41994 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41995 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923c00 }
41997 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
42000 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42001 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940c00 }
42003 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42006 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42007 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942c00 }
42009 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42012 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42013 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943c00 }
42015 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
42018 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42019 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960c00 }
42021 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42024 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42025 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962c00 }
42027 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42030 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42031 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963c00 }
42033 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
42036 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42037 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928c00 }
42039 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
42042 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42043 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ac00 }
42045 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
42048 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42049 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bc00 }
42051 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
42054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42055 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948c00 }
42057 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
42060 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42061 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ac00 }
42063 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
42066 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42067 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bc00 }
42069 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
42072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42073 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cc00 }
42075 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
42078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42079 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ec00 }
42081 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
42084 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42085 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fc00 }
42087 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
42090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42091 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cc00 }
42093 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
42096 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42097 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ec00 }
42099 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
42102 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42103 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fc00 }
42105 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
42108 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
42109 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cc00 }
42111 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
42114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42115 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ec00 }
42117 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
42120 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42121 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fc00 }
42123 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
42126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
42127 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968c00 }
42129 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
42132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42133 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ac00 }
42135 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
42138 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42139 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bc00 }
42141 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42145 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80c00 }
42147 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
42150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42151 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82c00 }
42153 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
42156 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42157 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83c00 }
42159 /* min.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
42162 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42163 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83c00 }
42165 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42169 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08c00 }
42171 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
42174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42175 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ac00 }
42177 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
42180 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42181 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bc00 }
42183 /* min.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
42186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42187 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bc00 }
42189 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42193 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00c00 }
42195 /* min.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
42198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42199 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02c00 }
42201 /* min.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
42204 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42205 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03c00 }
42207 /* min.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
42210 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42211 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03c00 }
42213 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
42216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42217 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20c00 }
42219 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42223 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22c00 }
42225 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42228 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42229 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23c00 }
42231 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
42234 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42235 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23c00 }
42237 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
42240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42241 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40c00 }
42243 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42246 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42247 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42c00 }
42249 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42252 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42253 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43c00 }
42255 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
42258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42259 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43c00 }
42261 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
42264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42265 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60c00 }
42267 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42271 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62c00 }
42273 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42276 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42277 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63c00 }
42279 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
42282 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42283 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63c00 }
42285 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
42288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42289 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28c00 }
42291 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
42294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42295 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ac00 }
42297 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
42300 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42301 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bc00 }
42303 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
42306 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42307 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bc00 }
42309 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
42312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42313 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48c00 }
42315 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
42318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42319 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ac00 }
42321 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
42324 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42325 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bc00 }
42327 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
42330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42331 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bc00 }
42333 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
42336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42337 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cc00 }
42339 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
42342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42343 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ec00 }
42345 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
42348 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42349 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fc00 }
42351 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
42354 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42355 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fc00 }
42357 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
42360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42361 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cc00 }
42363 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
42366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42367 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ec00 }
42369 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
42372 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42373 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fc00 }
42375 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
42378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42379 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fc00 }
42381 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
42384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
42385 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cc00 }
42387 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
42390 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42391 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ec00 }
42393 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
42396 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42397 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fc00 }
42399 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
42402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
42403 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fc00 }
42405 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
42408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
42409 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68c00 }
42411 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
42414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42415 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ac00 }
42417 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
42420 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42421 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bc00 }
42423 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
42426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
42427 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bc00 }
42429 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42433 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80c00 }
42435 /* min.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
42438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42439 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82c00 }
42441 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42445 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08c00 }
42447 /* min.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
42450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42451 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ac00 }
42453 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42457 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00c00 }
42459 /* min.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
42462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42463 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02c00 }
42465 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
42468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42469 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20c00 }
42471 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
42474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42475 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22c00 }
42477 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
42480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42481 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40c00 }
42483 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
42486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42487 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42c00 }
42489 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
42492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42493 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60c00 }
42495 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
42498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42499 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62c00 }
42501 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
42504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42505 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28c00 }
42507 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
42510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42511 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ac00 }
42513 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
42516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42517 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48c00 }
42519 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
42522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42523 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ac00 }
42525 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
42528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42529 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cc00 }
42531 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
42534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42535 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ec00 }
42537 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
42540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42541 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cc00 }
42543 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
42546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42547 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ec00 }
42549 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
42552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
42553 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cc00 }
42555 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
42558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
42559 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ec00 }
42561 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
42564 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
42565 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68c00 }
42567 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
42570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
42571 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ac00 }
42573 /* min.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
42576 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42577 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80c }
42579 /* min.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
42582 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42583 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882c }
42585 /* min.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
42588 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42589 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880c }
42591 /* min.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
42594 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42595 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08c }
42597 /* min.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
42600 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42601 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ac }
42603 /* min.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
42606 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42607 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808c }
42609 /* min.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
42612 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42613 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00c }
42615 /* min.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
42618 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42619 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802c }
42621 /* min.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
42624 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42625 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800c }
42627 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42630 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42631 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20c00 }
42633 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42636 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42637 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822c00 }
42639 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
42642 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42643 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820c00 }
42645 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42648 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42649 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40c00 }
42651 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42654 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42655 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842c00 }
42657 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
42660 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42661 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840c00 }
42663 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42666 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42667 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60c00 }
42669 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42672 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42673 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862c00 }
42675 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
42678 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42679 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860c00 }
42681 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
42684 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42685 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28c00 }
42687 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
42690 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42691 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ac00 }
42693 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
42696 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42697 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828c00 }
42699 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
42702 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42703 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48c00 }
42705 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
42708 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42709 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ac00 }
42711 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
42714 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42715 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848c00 }
42717 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
42720 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42721 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cc00 }
42723 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
42726 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42727 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ec00 }
42729 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
42732 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42733 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cc00 }
42735 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
42738 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42739 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cc00 }
42741 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
42744 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42745 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ec00 }
42747 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
42750 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42751 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cc00 }
42753 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
42756 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42757 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cc00 }
42759 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
42762 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42763 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ec00 }
42765 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
42768 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
42769 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cc00 }
42771 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
42774 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42775 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68c00 }
42777 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
42780 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42781 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ac00 }
42783 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
42786 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
42787 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868c00 }
42789 /* min.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
42792 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
42793 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892f00 }
42795 /* min.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
42798 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
42799 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181af00 }
42801 /* min.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
42804 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42805 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812f00 }
42807 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42810 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42811 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832f00 }
42813 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
42816 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42817 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183af00 }
42819 /* min.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
42822 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42823 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ef00 }
42825 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42828 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42829 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852f00 }
42831 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
42834 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42835 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185af00 }
42837 /* min.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
42840 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42841 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ef00 }
42843 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16} */
42846 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
42847 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ef00 }
42849 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42852 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42853 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872f00 }
42855 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24} */
42858 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
42859 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187af00 }
42861 /* min.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
42864 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42865 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882f00 }
42867 /* min.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
42870 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42871 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180af00 }
42873 /* min.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
42876 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42877 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802f00 }
42879 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42882 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42883 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822f00 }
42885 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
42888 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42889 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182af00 }
42891 /* min.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
42894 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42895 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ef00 }
42897 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42900 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42901 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842f00 }
42903 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
42906 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42907 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184af00 }
42909 /* min.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
42912 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42913 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ef00 }
42915 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16} */
42918 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
42919 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ef00 }
42921 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42924 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42925 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862f00 }
42927 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24} */
42930 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
42931 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186af00 }
42933 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
42936 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42937 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990d00 }
42939 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
42942 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42943 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992d00 }
42945 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
42948 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42949 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993d00 }
42951 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
42954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42955 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918d00 }
42957 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
42960 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42961 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ad00 }
42963 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
42966 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42967 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bd00 }
42969 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42973 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910d00 }
42975 /* max.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
42978 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42979 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912d00 }
42981 /* max.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
42984 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42985 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913d00 }
42987 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
42990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42991 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930d00 }
42993 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
42996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42997 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932d00 }
42999 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43002 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43003 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933d00 }
43005 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43009 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950d00 }
43011 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43015 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952d00 }
43017 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43020 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43021 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953d00 }
43023 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43026 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43027 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970d00 }
43029 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43033 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972d00 }
43035 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43038 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43039 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973d00 }
43041 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43045 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938d00 }
43047 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43051 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ad00 }
43053 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43056 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43057 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bd00 }
43059 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43063 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958d00 }
43065 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43069 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ad00 }
43071 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43074 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43075 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bd00 }
43077 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43081 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cd00 }
43083 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43087 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ed00 }
43089 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43092 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43093 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fd00 }
43095 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43098 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43099 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cd00 }
43101 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43104 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43105 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ed00 }
43107 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43110 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43111 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fd00 }
43113 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43116 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43117 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cd00 }
43119 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43122 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43123 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ed00 }
43125 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
43128 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43129 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fd00 }
43131 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
43134 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
43135 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978d00 }
43137 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
43140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43141 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ad00 }
43143 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
43146 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43147 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bd00 }
43149 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43152 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43153 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90d00 }
43155 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
43158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43159 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92d00 }
43161 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
43164 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43165 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93d00 }
43167 /* max.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
43170 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43171 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93d00 }
43173 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43177 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18d00 }
43179 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
43182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43183 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ad00 }
43185 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
43188 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43189 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bd00 }
43191 /* max.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
43194 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43195 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bd00 }
43197 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43201 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10d00 }
43203 /* max.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
43206 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43207 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12d00 }
43209 /* max.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
43212 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43213 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13d00 }
43215 /* max.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
43218 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43219 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13d00 }
43221 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
43224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43225 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30d00 }
43227 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43231 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32d00 }
43233 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43236 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43237 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33d00 }
43239 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
43242 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43243 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33d00 }
43245 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
43248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43249 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50d00 }
43251 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43254 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43255 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52d00 }
43257 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43260 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43261 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53d00 }
43263 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
43266 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43267 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53d00 }
43269 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
43272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43273 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70d00 }
43275 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43279 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72d00 }
43281 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43284 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43285 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73d00 }
43287 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
43290 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43291 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73d00 }
43293 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
43296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43297 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38d00 }
43299 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
43302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43303 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ad00 }
43305 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
43308 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43309 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bd00 }
43311 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
43314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43315 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bd00 }
43317 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
43320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43321 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58d00 }
43323 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
43326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43327 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ad00 }
43329 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
43332 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43333 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bd00 }
43335 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
43338 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43339 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bd00 }
43341 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
43344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43345 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cd00 }
43347 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
43350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43351 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ed00 }
43353 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
43356 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43357 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fd00 }
43359 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
43362 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43363 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fd00 }
43365 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
43368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43369 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cd00 }
43371 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
43374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43375 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ed00 }
43377 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
43380 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43381 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fd00 }
43383 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
43386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43387 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fd00 }
43389 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
43392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
43393 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cd00 }
43395 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
43398 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43399 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ed00 }
43401 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
43404 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43405 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fd00 }
43407 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
43410 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
43411 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fd00 }
43413 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
43416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
43417 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78d00 }
43419 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
43422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43423 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ad00 }
43425 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
43428 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43429 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bd00 }
43431 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
43434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
43435 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bd00 }
43437 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43441 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90d00 }
43443 /* max.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
43446 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43447 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92d00 }
43449 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43453 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18d00 }
43455 /* max.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
43458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43459 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ad00 }
43461 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43464 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43465 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10d00 }
43467 /* max.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
43470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43471 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12d00 }
43473 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
43476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43477 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30d00 }
43479 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
43482 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43483 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32d00 }
43485 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
43488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43489 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50d00 }
43491 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
43494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43495 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52d00 }
43497 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
43500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43501 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70d00 }
43503 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
43506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43507 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72d00 }
43509 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
43512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43513 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38d00 }
43515 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
43518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43519 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ad00 }
43521 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
43524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43525 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58d00 }
43527 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
43530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43531 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ad00 }
43533 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
43536 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43537 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cd00 }
43539 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
43542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43543 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ed00 }
43545 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
43548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43549 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cd00 }
43551 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
43554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43555 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ed00 }
43557 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
43560 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
43561 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cd00 }
43563 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
43566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
43567 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ed00 }
43569 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
43572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
43573 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78d00 }
43575 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
43578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
43579 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ad00 }
43581 /* max.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
43584 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43585 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90d }
43587 /* max.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
43590 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43591 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892d }
43593 /* max.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
43596 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43597 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890d }
43599 /* max.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
43602 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43603 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18d }
43605 /* max.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
43608 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43609 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ad }
43611 /* max.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
43614 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43615 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818d }
43617 /* max.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
43620 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43621 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10d }
43623 /* max.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
43626 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43627 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812d }
43629 /* max.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
43632 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43633 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810d }
43635 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43638 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43639 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30d00 }
43641 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43644 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43645 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832d00 }
43647 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
43650 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43651 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830d00 }
43653 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43656 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43657 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50d00 }
43659 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43662 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43663 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852d00 }
43665 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
43668 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43669 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850d00 }
43671 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43674 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43675 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70d00 }
43677 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43680 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43681 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872d00 }
43683 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
43686 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43687 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870d00 }
43689 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
43692 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43693 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38d00 }
43695 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
43698 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43699 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ad00 }
43701 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
43704 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43705 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838d00 }
43707 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
43710 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43711 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58d00 }
43713 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
43716 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43717 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ad00 }
43719 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
43722 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43723 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858d00 }
43725 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
43728 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43729 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cd00 }
43731 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
43734 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43735 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ed00 }
43737 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
43740 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43741 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cd00 }
43743 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
43746 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43747 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cd00 }
43749 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
43752 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43753 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ed00 }
43755 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
43758 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43759 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cd00 }
43761 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
43764 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43765 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cd00 }
43767 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
43770 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43771 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ed00 }
43773 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
43776 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
43777 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cd00 }
43779 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
43782 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43783 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78d00 }
43785 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
43788 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43789 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ad00 }
43791 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
43794 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
43795 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878d00 }
43797 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
43800 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43801 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980d00 }
43803 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
43806 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43807 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982d00 }
43809 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
43812 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43813 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983d00 }
43815 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
43818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43819 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908d00 }
43821 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
43824 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43825 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ad00 }
43827 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
43830 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43831 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bd00 }
43833 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43836 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43837 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900d00 }
43839 /* max.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
43842 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43843 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902d00 }
43845 /* max.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
43848 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43849 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903d00 }
43851 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
43854 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43855 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920d00 }
43857 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43860 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43861 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922d00 }
43863 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43866 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43867 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923d00 }
43869 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43872 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43873 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940d00 }
43875 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43878 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43879 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942d00 }
43881 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43884 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43885 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943d00 }
43887 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43890 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43891 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960d00 }
43893 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43896 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43897 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962d00 }
43899 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43902 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43903 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963d00 }
43905 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43908 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43909 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928d00 }
43911 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43914 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43915 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ad00 }
43917 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43920 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43921 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bd00 }
43923 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43926 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43927 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948d00 }
43929 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43932 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43933 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ad00 }
43935 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43938 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43939 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bd00 }
43941 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43944 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43945 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cd00 }
43947 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43951 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ed00 }
43953 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43956 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43957 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fd00 }
43959 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43962 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43963 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cd00 }
43965 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43968 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43969 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ed00 }
43971 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43974 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43975 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fd00 }
43977 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43980 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43981 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cd00 }
43983 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43986 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43987 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ed00 }
43989 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
43992 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43993 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fd00 }
43995 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
43998 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
43999 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968d00 }
44001 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
44004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44005 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ad00 }
44007 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
44010 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44011 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bd00 }
44013 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44016 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44017 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80d00 }
44019 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
44022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44023 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82d00 }
44025 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
44028 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44029 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83d00 }
44031 /* max.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
44034 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44035 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83d00 }
44037 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44041 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08d00 }
44043 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
44046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44047 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ad00 }
44049 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
44052 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44053 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bd00 }
44055 /* max.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
44058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44059 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bd00 }
44061 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44065 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00d00 }
44067 /* max.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
44070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44071 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02d00 }
44073 /* max.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
44076 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44077 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03d00 }
44079 /* max.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
44082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44083 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03d00 }
44085 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
44088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44089 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20d00 }
44091 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44095 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22d00 }
44097 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44100 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44101 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23d00 }
44103 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
44106 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44107 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23d00 }
44109 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
44112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44113 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40d00 }
44115 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44119 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42d00 }
44121 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44124 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44125 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43d00 }
44127 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
44130 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44131 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43d00 }
44133 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
44136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44137 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60d00 }
44139 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44143 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62d00 }
44145 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44148 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44149 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63d00 }
44151 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
44154 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44155 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63d00 }
44157 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
44160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44161 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28d00 }
44163 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
44166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44167 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ad00 }
44169 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
44172 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44173 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bd00 }
44175 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
44178 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44179 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bd00 }
44181 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
44184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44185 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48d00 }
44187 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
44190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44191 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ad00 }
44193 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
44196 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44197 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bd00 }
44199 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
44202 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44203 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bd00 }
44205 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
44208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44209 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cd00 }
44211 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
44214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44215 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ed00 }
44217 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
44220 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44221 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fd00 }
44223 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
44226 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44227 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fd00 }
44229 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
44232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44233 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cd00 }
44235 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
44238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44239 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ed00 }
44241 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
44244 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44245 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fd00 }
44247 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
44250 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44251 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fd00 }
44253 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
44256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
44257 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cd00 }
44259 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
44262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44263 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ed00 }
44265 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
44268 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44269 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fd00 }
44271 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
44274 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
44275 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fd00 }
44277 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
44280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
44281 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68d00 }
44283 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
44286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44287 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ad00 }
44289 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
44292 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44293 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bd00 }
44295 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
44298 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
44299 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bd00 }
44301 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44305 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80d00 }
44307 /* max.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
44310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44311 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82d00 }
44313 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44317 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08d00 }
44319 /* max.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
44322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44323 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ad00 }
44325 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44329 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00d00 }
44331 /* max.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
44334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44335 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02d00 }
44337 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
44340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44341 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20d00 }
44343 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
44346 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44347 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22d00 }
44349 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
44352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44353 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40d00 }
44355 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
44358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44359 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42d00 }
44361 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
44364 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44365 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60d00 }
44367 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
44370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44371 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62d00 }
44373 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
44376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44377 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28d00 }
44379 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
44382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44383 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ad00 }
44385 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
44388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44389 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48d00 }
44391 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
44394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44395 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ad00 }
44397 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
44400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44401 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cd00 }
44403 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
44406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44407 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ed00 }
44409 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
44412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44413 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cd00 }
44415 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
44418 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44419 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ed00 }
44421 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
44424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
44425 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cd00 }
44427 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
44430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
44431 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ed00 }
44433 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
44436 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
44437 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68d00 }
44439 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
44442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
44443 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ad00 }
44445 /* max.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
44448 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44449 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80d }
44451 /* max.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
44454 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44455 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882d }
44457 /* max.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
44460 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44461 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880d }
44463 /* max.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
44466 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44467 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08d }
44469 /* max.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
44472 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44473 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ad }
44475 /* max.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
44478 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44479 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808d }
44481 /* max.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
44484 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44485 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00d }
44487 /* max.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
44490 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44491 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802d }
44493 /* max.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
44496 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44497 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800d }
44499 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44502 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44503 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20d00 }
44505 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44508 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44509 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822d00 }
44511 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
44514 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44515 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820d00 }
44517 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44520 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44521 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40d00 }
44523 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44526 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44527 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842d00 }
44529 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
44532 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44533 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840d00 }
44535 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44538 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44539 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60d00 }
44541 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44544 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44545 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862d00 }
44547 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
44550 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44551 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860d00 }
44553 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
44556 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44557 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28d00 }
44559 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
44562 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44563 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ad00 }
44565 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
44568 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44569 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828d00 }
44571 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
44574 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44575 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48d00 }
44577 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
44580 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44581 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ad00 }
44583 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
44586 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44587 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848d00 }
44589 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
44592 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44593 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cd00 }
44595 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
44598 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44599 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ed00 }
44601 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
44604 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44605 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cd00 }
44607 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
44610 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44611 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cd00 }
44613 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
44616 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44617 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ed00 }
44619 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
44622 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44623 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cd00 }
44625 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
44628 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44629 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cd00 }
44631 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
44634 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44635 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ed00 }
44637 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
44640 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
44641 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cd00 }
44643 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
44646 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44647 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68d00 }
44649 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
44652 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44653 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ad00 }
44655 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
44658 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
44659 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868d00 }
44661 /* max.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
44664 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
44665 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893f00 }
44667 /* max.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
44670 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
44671 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181bf00 }
44673 /* max.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
44676 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44677 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813f00 }
44679 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44682 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44683 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833f00 }
44685 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
44688 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44689 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183bf00 }
44691 /* max.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
44694 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44695 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ff00 }
44697 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44700 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44701 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853f00 }
44703 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
44706 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44707 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185bf00 }
44709 /* max.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
44712 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44713 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ff00 }
44715 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16} */
44718 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
44719 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ff00 }
44721 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44724 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44725 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873f00 }
44727 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24} */
44730 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
44731 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187bf00 }
44733 /* max.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
44736 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44737 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883f00 }
44739 /* max.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
44742 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44743 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180bf00 }
44745 /* max.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
44748 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44749 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803f00 }
44751 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44754 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44755 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823f00 }
44757 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
44760 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44761 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182bf00 }
44763 /* max.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
44766 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44767 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ff00 }
44769 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44772 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44773 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843f00 }
44775 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
44778 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44779 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184bf00 }
44781 /* max.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
44784 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44785 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ff00 }
44787 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16} */
44790 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
44791 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ff00 }
44793 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44796 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44797 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863f00 }
44799 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24} */
44802 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
44803 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186bf00 }
44805 /* ste.w ${Dsp-16-u16}[$Dst16An],[a1a0] */
44808 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44809 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x752c0000 }
44811 /* ste.w ${Dsp-16-u16}[sb],[a1a0] */
44814 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44815 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x752e0000 }
44817 /* ste.w ${Dsp-16-u16},[a1a0] */
44820 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44821 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x752f0000 }
44823 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44826 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44827 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x751c0000 }
44829 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
44832 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44833 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x751e0000 }
44835 /* ste.w ${Dsp-16-u16},${Dsp-32-u20}[a0] */
44838 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44839 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x751f0000 }
44841 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
44844 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
44845 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x750c0000 }
44847 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20} */
44850 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
44851 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x750e0000 }
44853 /* ste.w ${Dsp-16-u16},${Dsp-32-u20} */
44856 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
44857 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x750f0000 }
44859 /* ste.w ${Dsp-16-u8}[$Dst16An],[a1a0] */
44862 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44863 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x752800 }
44865 /* ste.w ${Dsp-16-u8}[sb],[a1a0] */
44868 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44869 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x752a00 }
44871 /* ste.w ${Dsp-16-s8}[fb],[a1a0] */
44874 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44875 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x752b00 }
44877 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
44880 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44881 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75180000 }
44883 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
44886 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44887 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x751a0000 }
44889 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
44892 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44893 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x751b0000 }
44895 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
44898 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
44899 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75080000 }
44901 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */
44904 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44905 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x750a0000 }
44907 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */
44910 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44911 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x750b0000 }
44913 /* ste.w $Dst16RnHI,[a1a0] */
44916 { { MNEM
, ' ', OP (DST16RNHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44917 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7520 }
44919 /* ste.w $Dst16AnHI,[a1a0] */
44922 { { MNEM
, ' ', OP (DST16ANHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44923 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7524 }
44925 /* ste.w [$Dst16An],[a1a0] */
44928 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44929 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7526 }
44931 /* ste.w $Dst16RnHI,${Dsp-16-u20}[a0] */
44934 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44935 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75100000 }
44937 /* ste.w $Dst16AnHI,${Dsp-16-u20}[a0] */
44940 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44941 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75140000 }
44943 /* ste.w [$Dst16An],${Dsp-16-u20}[a0] */
44946 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44947 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75160000 }
44949 /* ste.w $Dst16RnHI,${Dsp-16-u20} */
44952 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), 0 } },
44953 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75000000 }
44955 /* ste.w $Dst16AnHI,${Dsp-16-u20} */
44958 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), 0 } },
44959 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75040000 }
44961 /* ste.w [$Dst16An],${Dsp-16-u20} */
44964 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
44965 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75060000 }
44967 /* ste.b ${Dsp-16-u16}[$Dst16An],[a1a0] */
44970 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44971 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x742c0000 }
44973 /* ste.b ${Dsp-16-u16}[sb],[a1a0] */
44976 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44977 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x742e0000 }
44979 /* ste.b ${Dsp-16-u16},[a1a0] */
44982 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44983 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x742f0000 }
44985 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44988 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44989 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x741c0000 }
44991 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
44994 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44995 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x741e0000 }
44997 /* ste.b ${Dsp-16-u16},${Dsp-32-u20}[a0] */
45000 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
45001 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x741f0000 }
45003 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
45006 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
45007 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x740c0000 }
45009 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20} */
45012 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
45013 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x740e0000 }
45015 /* ste.b ${Dsp-16-u16},${Dsp-32-u20} */
45018 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
45019 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x740f0000 }
45021 /* ste.b ${Dsp-16-u8}[$Dst16An],[a1a0] */
45024 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45025 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x742800 }
45027 /* ste.b ${Dsp-16-u8}[sb],[a1a0] */
45030 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45031 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x742a00 }
45033 /* ste.b ${Dsp-16-s8}[fb],[a1a0] */
45036 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45037 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x742b00 }
45039 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
45042 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45043 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74180000 }
45045 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
45048 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45049 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x741a0000 }
45051 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
45054 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45055 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x741b0000 }
45057 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
45060 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
45061 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74080000 }
45063 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */
45066 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45067 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x740a0000 }
45069 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */
45072 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45073 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x740b0000 }
45075 /* ste.b $Dst16RnQI,[a1a0] */
45078 { { MNEM
, ' ', OP (DST16RNQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45079 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7420 }
45081 /* ste.b $Dst16AnQI,[a1a0] */
45084 { { MNEM
, ' ', OP (DST16ANQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45085 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7424 }
45087 /* ste.b [$Dst16An],[a1a0] */
45090 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45091 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7426 }
45093 /* ste.b $Dst16RnQI,${Dsp-16-u20}[a0] */
45096 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45097 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74100000 }
45099 /* ste.b $Dst16AnQI,${Dsp-16-u20}[a0] */
45102 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45103 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74140000 }
45105 /* ste.b [$Dst16An],${Dsp-16-u20}[a0] */
45108 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45109 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74160000 }
45111 /* ste.b $Dst16RnQI,${Dsp-16-u20} */
45114 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), 0 } },
45115 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74000000 }
45117 /* ste.b $Dst16AnQI,${Dsp-16-u20} */
45120 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), 0 } },
45121 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74040000 }
45123 /* ste.b [$Dst16An],${Dsp-16-u20} */
45126 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
45127 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74060000 }
45129 /* lde.w [a1a0],${Dsp-16-u16}[$Dst16An] */
45132 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45133 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75ac0000 }
45135 /* lde.w [a1a0],${Dsp-16-u16}[sb] */
45138 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45139 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75ae0000 }
45141 /* lde.w [a1a0],${Dsp-16-u16} */
45144 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45145 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75af0000 }
45147 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45150 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45151 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x759c0000 }
45153 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45156 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45157 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x759e0000 }
45159 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45162 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45163 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x759f0000 }
45165 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45168 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45169 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x758c0000 }
45171 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45174 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45175 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x758e0000 }
45177 /* lde.w ${Dsp-32-u20},${Dsp-16-u16} */
45180 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45181 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x758f0000 }
45183 /* lde.w [a1a0],${Dsp-16-u8}[$Dst16An] */
45186 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45187 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75a800 }
45189 /* lde.w [a1a0],${Dsp-16-u8}[sb] */
45192 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45193 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75aa00 }
45195 /* lde.w [a1a0],${Dsp-16-s8}[fb] */
45198 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45199 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75ab00 }
45201 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45204 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45205 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75980000 }
45207 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45210 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45211 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x759a0000 }
45213 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45216 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45217 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x759b0000 }
45219 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45222 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45223 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75880000 }
45225 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45228 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45229 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x758a0000 }
45231 /* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45234 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45235 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x758b0000 }
45237 /* lde.w [a1a0],$Dst16RnHI */
45240 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45241 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75a0 }
45243 /* lde.w [a1a0],$Dst16AnHI */
45246 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45247 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75a4 }
45249 /* lde.w [a1a0],[$Dst16An] */
45252 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45253 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75a6 }
45255 /* lde.w ${Dsp-16-u20}[a0],$Dst16RnHI */
45258 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45259 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75900000 }
45261 /* lde.w ${Dsp-16-u20}[a0],$Dst16AnHI */
45264 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45265 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75940000 }
45267 /* lde.w ${Dsp-16-u20}[a0],[$Dst16An] */
45270 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45271 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75960000 }
45273 /* lde.w ${Dsp-16-u20},$Dst16RnHI */
45276 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNHI
), 0 } },
45277 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75800000 }
45279 /* lde.w ${Dsp-16-u20},$Dst16AnHI */
45282 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANHI
), 0 } },
45283 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75840000 }
45285 /* lde.w ${Dsp-16-u20},[$Dst16An] */
45288 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45289 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75860000 }
45291 /* lde.b [a1a0],${Dsp-16-u16}[$Dst16An] */
45294 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45295 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74ac0000 }
45297 /* lde.b [a1a0],${Dsp-16-u16}[sb] */
45300 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45301 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74ae0000 }
45303 /* lde.b [a1a0],${Dsp-16-u16} */
45306 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45307 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74af0000 }
45309 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45312 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45313 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x749c0000 }
45315 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45318 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45319 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x749e0000 }
45321 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45324 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45325 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x749f0000 }
45327 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45330 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45331 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x748c0000 }
45333 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45336 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45337 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x748e0000 }
45339 /* lde.b ${Dsp-32-u20},${Dsp-16-u16} */
45342 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45343 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x748f0000 }
45345 /* lde.b [a1a0],${Dsp-16-u8}[$Dst16An] */
45348 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45349 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74a800 }
45351 /* lde.b [a1a0],${Dsp-16-u8}[sb] */
45354 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45355 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74aa00 }
45357 /* lde.b [a1a0],${Dsp-16-s8}[fb] */
45360 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45361 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74ab00 }
45363 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45366 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45367 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74980000 }
45369 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45372 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45373 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x749a0000 }
45375 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45378 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45379 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x749b0000 }
45381 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45384 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45385 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74880000 }
45387 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45390 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45391 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x748a0000 }
45393 /* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45396 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45397 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x748b0000 }
45399 /* lde.b [a1a0],$Dst16RnQI */
45402 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45403 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74a0 }
45405 /* lde.b [a1a0],$Dst16AnQI */
45408 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45409 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74a4 }
45411 /* lde.b [a1a0],[$Dst16An] */
45414 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45415 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74a6 }
45417 /* lde.b ${Dsp-16-u20}[a0],$Dst16RnQI */
45420 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45421 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74900000 }
45423 /* lde.b ${Dsp-16-u20}[a0],$Dst16AnQI */
45426 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45427 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74940000 }
45429 /* lde.b ${Dsp-16-u20}[a0],[$Dst16An] */
45432 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45433 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74960000 }
45435 /* lde.b ${Dsp-16-u20},$Dst16RnQI */
45438 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNQI
), 0 } },
45439 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74800000 }
45441 /* lde.b ${Dsp-16-u20},$Dst16AnQI */
45444 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANQI
), 0 } },
45445 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74840000 }
45447 /* lde.b ${Dsp-16-u20},[$Dst16An] */
45450 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45451 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74860000 }
45453 /* stc ${cr3-Prefixed-32},$Dst32RnPrefixedSI */
45456 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32RNPREFIXEDSI
), 0 } },
45457 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d910 }
45459 /* stc ${cr3-Prefixed-32},$Dst32AnPrefixedSI */
45462 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32ANPREFIXEDSI
), 0 } },
45463 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d190 }
45465 /* stc ${cr3-Prefixed-32},[$Dst32AnPrefixed] */
45468 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45469 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d110 }
45471 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45474 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45475 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d31000 }
45477 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45480 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45481 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d51000 }
45483 /* stc ${cr3-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45486 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45487 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d71000 }
45489 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[sb] */
45492 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45493 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d39000 }
45495 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[sb] */
45498 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45499 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d59000 }
45501 /* stc ${cr3-Prefixed-32},${Dsp-24-s8}[fb] */
45504 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45505 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3d000 }
45507 /* stc ${cr3-Prefixed-32},${Dsp-24-s16}[fb] */
45510 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45511 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5d000 }
45513 /* stc ${cr3-Prefixed-32},${Dsp-24-u16} */
45516 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45517 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7d000 }
45519 /* stc ${cr3-Prefixed-32},${Dsp-24-u24} */
45522 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45523 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d79000 }
45525 /* stc ${cr2-32},$Dst32RnUnprefixedSI */
45528 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
45529 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd910 }
45531 /* stc ${cr2-32},$Dst32AnUnprefixedSI */
45534 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
45535 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd190 }
45537 /* stc ${cr2-32},[$Dst32AnUnprefixed] */
45540 { { MNEM
, ' ', OP (CR2_32
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45541 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd110 }
45543 /* stc ${cr2-32},${Dsp-16-u8}[$Dst32AnUnprefixed] */
45546 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45547 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd31000 }
45549 /* stc ${cr2-32},${Dsp-16-u16}[$Dst32AnUnprefixed] */
45552 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45553 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5100000 }
45555 /* stc ${cr2-32},${Dsp-16-u24}[$Dst32AnUnprefixed] */
45558 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45559 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7100000 }
45561 /* stc ${cr2-32},${Dsp-16-u8}[sb] */
45564 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45565 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd39000 }
45567 /* stc ${cr2-32},${Dsp-16-u16}[sb] */
45570 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45571 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5900000 }
45573 /* stc ${cr2-32},${Dsp-16-s8}[fb] */
45576 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45577 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3d000 }
45579 /* stc ${cr2-32},${Dsp-16-s16}[fb] */
45582 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
45583 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5d00000 }
45585 /* stc ${cr2-32},${Dsp-16-u16} */
45588 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), 0 } },
45589 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7d00000 }
45591 /* stc ${cr2-32},${Dsp-16-u24} */
45594 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), 0 } },
45595 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7900000 }
45597 /* stc ${cr1-Prefixed-32},$Dst32RnPrefixedHI */
45600 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
45601 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d918 }
45603 /* stc ${cr1-Prefixed-32},$Dst32AnPrefixedHI */
45606 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
45607 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d198 }
45609 /* stc ${cr1-Prefixed-32},[$Dst32AnPrefixed] */
45612 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45613 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d118 }
45615 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45618 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45619 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d31800 }
45621 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45624 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45625 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d51800 }
45627 /* stc ${cr1-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45630 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45631 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d71800 }
45633 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[sb] */
45636 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45637 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d39800 }
45639 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[sb] */
45642 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45643 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d59800 }
45645 /* stc ${cr1-Prefixed-32},${Dsp-24-s8}[fb] */
45648 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45649 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3d800 }
45651 /* stc ${cr1-Prefixed-32},${Dsp-24-s16}[fb] */
45654 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45655 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5d800 }
45657 /* stc ${cr1-Prefixed-32},${Dsp-24-u16} */
45660 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45661 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7d800 }
45663 /* stc ${cr1-Prefixed-32},${Dsp-24-u24} */
45666 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45667 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d79800 }
45669 /* stc pc,$Dst16RnHI */
45672 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16RNHI
), 0 } },
45673 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7cc0 }
45675 /* stc pc,$Dst16AnHI */
45678 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16ANHI
), 0 } },
45679 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7cc4 }
45681 /* stc pc,[$Dst16An] */
45684 { { MNEM
, ' ', 'p', 'c', ',', '[', OP (DST16AN
), ']', 0 } },
45685 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7cc6 }
45687 /* stc pc,${Dsp-16-u8}[$Dst16An] */
45690 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45691 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7cc800 }
45693 /* stc pc,${Dsp-16-u16}[$Dst16An] */
45696 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45697 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7ccc0000 }
45699 /* stc pc,${Dsp-16-u8}[sb] */
45702 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45703 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7cca00 }
45705 /* stc pc,${Dsp-16-u16}[sb] */
45708 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45709 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7cce0000 }
45711 /* stc pc,${Dsp-16-s8}[fb] */
45714 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45715 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7ccb00 }
45717 /* stc pc,${Dsp-16-u16} */
45720 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), 0 } },
45721 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7ccf0000 }
45723 /* stc ${cr16},$Dst16RnHI */
45726 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16RNHI
), 0 } },
45727 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7b80 }
45729 /* stc ${cr16},$Dst16AnHI */
45732 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16ANHI
), 0 } },
45733 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7b84 }
45735 /* stc ${cr16},[$Dst16An] */
45738 { { MNEM
, ' ', OP (CR16
), ',', '[', OP (DST16AN
), ']', 0 } },
45739 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7b86 }
45741 /* stc ${cr16},${Dsp-16-u8}[$Dst16An] */
45744 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45745 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7b8800 }
45747 /* stc ${cr16},${Dsp-16-u16}[$Dst16An] */
45750 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45751 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7b8c0000 }
45753 /* stc ${cr16},${Dsp-16-u8}[sb] */
45756 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45757 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7b8a00 }
45759 /* stc ${cr16},${Dsp-16-u16}[sb] */
45762 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45763 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7b8e0000 }
45765 /* stc ${cr16},${Dsp-16-s8}[fb] */
45768 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45769 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7b8b00 }
45771 /* stc ${cr16},${Dsp-16-u16} */
45774 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), 0 } },
45775 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7b8f0000 }
45777 /* ldc $Dst32RnPrefixedSI,${cr3-Prefixed-32} */
45780 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45781 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d900 }
45783 /* ldc $Dst32AnPrefixedSI,${cr3-Prefixed-32} */
45786 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45787 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d180 }
45789 /* ldc [$Dst32AnPrefixed],${cr3-Prefixed-32} */
45792 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45793 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d100 }
45795 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45798 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45799 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d30000 }
45801 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45804 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45805 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d50000 }
45807 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45810 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45811 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d70000 }
45813 /* ldc ${Dsp-24-u8}[sb],${cr3-Prefixed-32} */
45816 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45817 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d38000 }
45819 /* ldc ${Dsp-24-u16}[sb],${cr3-Prefixed-32} */
45822 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45823 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d58000 }
45825 /* ldc ${Dsp-24-s8}[fb],${cr3-Prefixed-32} */
45828 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45829 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3c000 }
45831 /* ldc ${Dsp-24-s16}[fb],${cr3-Prefixed-32} */
45834 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45835 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5c000 }
45837 /* ldc ${Dsp-24-u16},${cr3-Prefixed-32} */
45840 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR3_PREFIXED_32
), 0 } },
45841 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7c000 }
45843 /* ldc ${Dsp-24-u24},${cr3-Prefixed-32} */
45846 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR3_PREFIXED_32
), 0 } },
45847 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d78000 }
45849 /* ldc $Dst32RnUnprefixedSI,${cr2-32} */
45852 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45853 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd900 }
45855 /* ldc $Dst32AnUnprefixedSI,${cr2-32} */
45858 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45859 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd180 }
45861 /* ldc [$Dst32AnUnprefixed],${cr2-32} */
45864 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45865 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd100 }
45867 /* ldc ${Dsp-16-u8}[$Dst32AnUnprefixed],${cr2-32} */
45870 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45871 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd30000 }
45873 /* ldc ${Dsp-16-u16}[$Dst32AnUnprefixed],${cr2-32} */
45876 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45877 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5000000 }
45879 /* ldc ${Dsp-16-u24}[$Dst32AnUnprefixed],${cr2-32} */
45882 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45883 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7000000 }
45885 /* ldc ${Dsp-16-u8}[sb],${cr2-32} */
45888 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45889 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd38000 }
45891 /* ldc ${Dsp-16-u16}[sb],${cr2-32} */
45894 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45895 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5800000 }
45897 /* ldc ${Dsp-16-s8}[fb],${cr2-32} */
45900 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45901 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3c000 }
45903 /* ldc ${Dsp-16-s16}[fb],${cr2-32} */
45906 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45907 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5c00000 }
45909 /* ldc ${Dsp-16-u16},${cr2-32} */
45912 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR2_32
), 0 } },
45913 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7c00000 }
45915 /* ldc ${Dsp-16-u24},${cr2-32} */
45918 { { MNEM
, ' ', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
45919 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7800000 }
45921 /* ldc $Dst32RnPrefixedHI,${cr1-Prefixed-32} */
45924 { { MNEM
, ' ', OP (DST32RNPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45925 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d908 }
45927 /* ldc $Dst32AnPrefixedHI,${cr1-Prefixed-32} */
45930 { { MNEM
, ' ', OP (DST32ANPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45931 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d188 }
45933 /* ldc [$Dst32AnPrefixed],${cr1-Prefixed-32} */
45936 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45937 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d108 }
45939 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45942 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45943 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d30800 }
45945 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45948 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45949 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d50800 }
45951 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45954 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45955 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d70800 }
45957 /* ldc ${Dsp-24-u8}[sb],${cr1-Prefixed-32} */
45960 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45961 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d38800 }
45963 /* ldc ${Dsp-24-u16}[sb],${cr1-Prefixed-32} */
45966 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45967 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d58800 }
45969 /* ldc ${Dsp-24-s8}[fb],${cr1-Prefixed-32} */
45972 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45973 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3c800 }
45975 /* ldc ${Dsp-24-s16}[fb],${cr1-Prefixed-32} */
45978 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45979 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5c800 }
45981 /* ldc ${Dsp-24-u16},${cr1-Prefixed-32} */
45984 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR1_PREFIXED_32
), 0 } },
45985 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7c800 }
45987 /* ldc ${Dsp-24-u24},${cr1-Prefixed-32} */
45990 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR1_PREFIXED_32
), 0 } },
45991 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d78800 }
45993 /* ldc $Dst16RnHI,${cr16} */
45996 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (CR16
), 0 } },
45997 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7a80 }
45999 /* ldc $Dst16AnHI,${cr16} */
46002 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (CR16
), 0 } },
46003 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7a84 }
46005 /* ldc [$Dst16An],${cr16} */
46008 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46009 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7a86 }
46011 /* ldc ${Dsp-16-u8}[$Dst16An],${cr16} */
46014 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46015 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7a8800 }
46017 /* ldc ${Dsp-16-u16}[$Dst16An],${cr16} */
46020 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46021 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7a8c0000 }
46023 /* ldc ${Dsp-16-u8}[sb],${cr16} */
46026 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46027 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7a8a00 }
46029 /* ldc ${Dsp-16-u16}[sb],${cr16} */
46032 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46033 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7a8e0000 }
46035 /* ldc ${Dsp-16-s8}[fb],${cr16} */
46038 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR16
), 0 } },
46039 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7a8b00 }
46041 /* ldc ${Dsp-16-u16},${cr16} */
46044 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR16
), 0 } },
46045 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7a8f0000 }
46047 /* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46050 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46051 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96010000 }
46053 /* jsri.w ${Dsp-16-u24} */
46056 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46057 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x96810000 }
46059 /* jsri.a $Dst32RnUnprefixedSI */
46062 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46063 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x9801 }
46065 /* jsri.a $Dst32AnUnprefixedSI */
46068 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46069 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x9081 }
46071 /* jsri.a [$Dst32AnUnprefixed] */
46074 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46075 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x9001 }
46077 /* jsri.a $Dst16RnSI */
46080 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46081 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d10 }
46083 /* jsri.a $Dst16AnSI */
46086 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46087 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d14 }
46089 /* jsri.a [$Dst16An] */
46092 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46093 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d16 }
46095 /* jsri.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46098 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46099 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94010000 }
46101 /* jsri.a ${Dsp-16-u16}[sb] */
46104 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46105 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94810000 }
46107 /* jsri.a ${Dsp-16-s16}[fb] */
46110 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46111 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94c10000 }
46113 /* jsri.a ${Dsp-16-u16} */
46116 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46117 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x96c10000 }
46119 /* jsri.a ${Dsp-16-u16}[$Dst16An] */
46122 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46123 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_An_relative_SI
, { 0x7d1c0000 }
46125 /* jsri.a ${Dsp-16-u16}[sb] */
46128 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46129 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_SB_relative_SI
, { 0x7d1e0000 }
46131 /* jsri.a ${Dsp-16-u16} */
46134 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46135 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_absolute_SI
, { 0x7d1f0000 }
46137 /* jsri.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46140 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46141 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x920100 }
46143 /* jsri.a ${Dsp-16-u8}[sb] */
46146 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46147 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x928100 }
46149 /* jsri.a ${Dsp-16-s8}[fb] */
46152 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46153 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92c100 }
46155 /* jsri.a ${Dsp-16-u8}[$Dst16An] */
46158 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46159 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d1800 }
46161 /* jsri.a ${Dsp-16-u8}[sb] */
46164 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46165 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d1a00 }
46167 /* jsri.a ${Dsp-16-s8}[fb] */
46170 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46171 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d1b00 }
46173 /* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46176 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46177 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc71f0000 }
46179 /* jsri.w ${Dsp-16-u24} */
46182 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46183 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc79f0000 }
46185 /* jsri.w $Dst32RnUnprefixedHI */
46188 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46189 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc91f }
46191 /* jsri.w $Dst32AnUnprefixedHI */
46194 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46195 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc19f }
46197 /* jsri.w [$Dst32AnUnprefixed] */
46200 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46201 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc11f }
46203 /* jsri.w $Dst16RnHI */
46206 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46207 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d30 }
46209 /* jsri.w $Dst16AnHI */
46212 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46213 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d34 }
46215 /* jsri.w [$Dst16An] */
46218 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46219 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d36 }
46221 /* jsri.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46224 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46225 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc51f0000 }
46227 /* jsri.w ${Dsp-16-u16}[sb] */
46230 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46231 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc59f0000 }
46233 /* jsri.w ${Dsp-16-s16}[fb] */
46236 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46237 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5df0000 }
46239 /* jsri.w ${Dsp-16-u16} */
46242 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46243 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7df0000 }
46245 /* jsri.w ${Dsp-16-u16}[$Dst16An] */
46248 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46249 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7d3c0000 }
46251 /* jsri.w ${Dsp-16-u16}[sb] */
46254 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46255 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d3e0000 }
46257 /* jsri.w ${Dsp-16-u16} */
46260 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46261 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d3f0000 }
46263 /* jsri.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46266 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46267 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc31f00 }
46269 /* jsri.w ${Dsp-16-u8}[sb] */
46272 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46273 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc39f00 }
46275 /* jsri.w ${Dsp-16-s8}[fb] */
46278 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46279 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3df00 }
46281 /* jsri.w ${Dsp-16-u8}[$Dst16An] */
46284 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46285 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d3800 }
46287 /* jsri.w ${Dsp-16-u8}[sb] */
46290 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46291 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d3a00 }
46293 /* jsri.w ${Dsp-16-s8}[fb] */
46296 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46297 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d3b00 }
46299 /* jmpi.a $Dst32RnUnprefixedSI */
46302 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46303 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x8801 }
46305 /* jmpi.a $Dst32AnUnprefixedSI */
46308 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46309 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x8081 }
46311 /* jmpi.a [$Dst32AnUnprefixed] */
46314 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46315 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x8001 }
46317 /* jmpi.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46320 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46321 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820100 }
46323 /* jmpi.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46326 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46327 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84010000 }
46329 /* jmpi.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46332 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46333 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86010000 }
46335 /* jmpi.a ${Dsp-16-u8}[sb] */
46338 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46339 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828100 }
46341 /* jmpi.a ${Dsp-16-u16}[sb] */
46344 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46345 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84810000 }
46347 /* jmpi.a ${Dsp-16-s8}[fb] */
46350 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46351 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c100 }
46353 /* jmpi.a ${Dsp-16-s16}[fb] */
46356 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46357 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c10000 }
46359 /* jmpi.a ${Dsp-16-u16} */
46362 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46363 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c10000 }
46365 /* jmpi.a ${Dsp-16-u24} */
46368 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46369 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x86810000 }
46371 /* jmpi.a $Dst16RnSI */
46374 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46375 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d00 }
46377 /* jmpi.a $Dst16AnSI */
46380 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46381 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d04 }
46383 /* jmpi.a [$Dst16An] */
46386 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46387 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d06 }
46389 /* jmpi.a ${Dsp-16-u8}[$Dst16An] */
46392 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46393 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d0800 }
46395 /* jmpi.a ${Dsp-16-u16}[$Dst16An] */
46398 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46399 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_An_relative_SI
, { 0x7d0c0000 }
46401 /* jmpi.a ${Dsp-16-u8}[sb] */
46404 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46405 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d0a00 }
46407 /* jmpi.a ${Dsp-16-u16}[sb] */
46410 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46411 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_SB_relative_SI
, { 0x7d0e0000 }
46413 /* jmpi.a ${Dsp-16-s8}[fb] */
46416 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46417 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d0b00 }
46419 /* jmpi.a ${Dsp-16-u16} */
46422 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46423 & ifmt_jsri16a_dst16_16_16_SI_dst16_16_16_absolute_SI
, { 0x7d0f0000 }
46425 /* jmpi.w $Dst32RnUnprefixedHI */
46428 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46429 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90f }
46431 /* jmpi.w $Dst32AnUnprefixedHI */
46434 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46435 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18f }
46437 /* jmpi.w [$Dst32AnUnprefixed] */
46440 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46441 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10f }
46443 /* jmpi.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46446 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46447 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30f00 }
46449 /* jmpi.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46452 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46453 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50f0000 }
46455 /* jmpi.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46458 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46459 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70f0000 }
46461 /* jmpi.w ${Dsp-16-u8}[sb] */
46464 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46465 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38f00 }
46467 /* jmpi.w ${Dsp-16-u16}[sb] */
46470 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46471 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58f0000 }
46473 /* jmpi.w ${Dsp-16-s8}[fb] */
46476 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46477 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cf00 }
46479 /* jmpi.w ${Dsp-16-s16}[fb] */
46482 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46483 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cf0000 }
46485 /* jmpi.w ${Dsp-16-u16} */
46488 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46489 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cf0000 }
46491 /* jmpi.w ${Dsp-16-u24} */
46494 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46495 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78f0000 }
46497 /* jmpi.w $Dst16RnHI */
46500 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46501 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d20 }
46503 /* jmpi.w $Dst16AnHI */
46506 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46507 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d24 }
46509 /* jmpi.w [$Dst16An] */
46512 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46513 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d26 }
46515 /* jmpi.w ${Dsp-16-u8}[$Dst16An] */
46518 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46519 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d2800 }
46521 /* jmpi.w ${Dsp-16-u16}[$Dst16An] */
46524 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46525 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7d2c0000 }
46527 /* jmpi.w ${Dsp-16-u8}[sb] */
46530 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46531 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d2a00 }
46533 /* jmpi.w ${Dsp-16-u16}[sb] */
46536 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46537 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d2e0000 }
46539 /* jmpi.w ${Dsp-16-s8}[fb] */
46542 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46543 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d2b00 }
46545 /* jmpi.w ${Dsp-16-u16} */
46548 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46549 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d2f0000 }
46551 /* indexws.w $Dst32RnUnprefixedHI */
46554 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46555 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc833 }
46557 /* indexws.w $Dst32AnUnprefixedHI */
46560 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46561 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc0b3 }
46563 /* indexws.w [$Dst32AnUnprefixed] */
46566 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46567 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc033 }
46569 /* indexws.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46572 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46573 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc23300 }
46575 /* indexws.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46578 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46579 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4330000 }
46581 /* indexws.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46584 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46585 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6330000 }
46587 /* indexws.w ${Dsp-16-u8}[sb] */
46590 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46591 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc2b300 }
46593 /* indexws.w ${Dsp-16-u16}[sb] */
46596 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46597 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4b30000 }
46599 /* indexws.w ${Dsp-16-s8}[fb] */
46602 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46603 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2f300 }
46605 /* indexws.w ${Dsp-16-s16}[fb] */
46608 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46609 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4f30000 }
46611 /* indexws.w ${Dsp-16-u16} */
46614 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46615 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6f30000 }
46617 /* indexws.w ${Dsp-16-u24} */
46620 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46621 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6b30000 }
46623 /* indexws.b $Dst32RnUnprefixedQI */
46626 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46627 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc823 }
46629 /* indexws.b $Dst32AnUnprefixedQI */
46632 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46633 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0a3 }
46635 /* indexws.b [$Dst32AnUnprefixed] */
46638 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46639 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc023 }
46641 /* indexws.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46644 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46645 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22300 }
46647 /* indexws.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46650 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46651 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4230000 }
46653 /* indexws.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46656 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46657 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6230000 }
46659 /* indexws.b ${Dsp-16-u8}[sb] */
46662 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46663 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2a300 }
46665 /* indexws.b ${Dsp-16-u16}[sb] */
46668 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46669 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4a30000 }
46671 /* indexws.b ${Dsp-16-s8}[fb] */
46674 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46675 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2e300 }
46677 /* indexws.b ${Dsp-16-s16}[fb] */
46680 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46681 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4e30000 }
46683 /* indexws.b ${Dsp-16-u16} */
46686 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46687 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6e30000 }
46689 /* indexws.b ${Dsp-16-u24} */
46692 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46693 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6a30000 }
46695 /* indexwd.w $Dst32RnUnprefixedHI */
46698 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46699 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa833 }
46701 /* indexwd.w $Dst32AnUnprefixedHI */
46704 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46705 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa0b3 }
46707 /* indexwd.w [$Dst32AnUnprefixed] */
46710 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46711 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa033 }
46713 /* indexwd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46716 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46717 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa23300 }
46719 /* indexwd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46722 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46723 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4330000 }
46725 /* indexwd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46728 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46729 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6330000 }
46731 /* indexwd.w ${Dsp-16-u8}[sb] */
46734 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46735 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa2b300 }
46737 /* indexwd.w ${Dsp-16-u16}[sb] */
46740 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46741 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4b30000 }
46743 /* indexwd.w ${Dsp-16-s8}[fb] */
46746 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46747 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2f300 }
46749 /* indexwd.w ${Dsp-16-s16}[fb] */
46752 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46753 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4f30000 }
46755 /* indexwd.w ${Dsp-16-u16} */
46758 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46759 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6f30000 }
46761 /* indexwd.w ${Dsp-16-u24} */
46764 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46765 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6b30000 }
46767 /* indexwd.b $Dst32RnUnprefixedQI */
46770 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46771 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa823 }
46773 /* indexwd.b $Dst32AnUnprefixedQI */
46776 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46777 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0a3 }
46779 /* indexwd.b [$Dst32AnUnprefixed] */
46782 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46783 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa023 }
46785 /* indexwd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46788 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46789 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22300 }
46791 /* indexwd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46794 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46795 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4230000 }
46797 /* indexwd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46800 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46801 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6230000 }
46803 /* indexwd.b ${Dsp-16-u8}[sb] */
46806 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46807 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2a300 }
46809 /* indexwd.b ${Dsp-16-u16}[sb] */
46812 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46813 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4a30000 }
46815 /* indexwd.b ${Dsp-16-s8}[fb] */
46818 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46819 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2e300 }
46821 /* indexwd.b ${Dsp-16-s16}[fb] */
46824 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46825 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4e30000 }
46827 /* indexwd.b ${Dsp-16-u16} */
46830 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46831 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6e30000 }
46833 /* indexwd.b ${Dsp-16-u24} */
46836 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46837 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6a30000 }
46839 /* indexw.w $Dst32RnUnprefixedHI */
46842 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46843 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8833 }
46845 /* indexw.w $Dst32AnUnprefixedHI */
46848 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46849 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x80b3 }
46851 /* indexw.w [$Dst32AnUnprefixed] */
46854 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46855 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8033 }
46857 /* indexw.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46860 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46861 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x823300 }
46863 /* indexw.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46866 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46867 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84330000 }
46869 /* indexw.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46872 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46873 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86330000 }
46875 /* indexw.w ${Dsp-16-u8}[sb] */
46878 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46879 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x82b300 }
46881 /* indexw.w ${Dsp-16-u16}[sb] */
46884 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46885 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84b30000 }
46887 /* indexw.w ${Dsp-16-s8}[fb] */
46890 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46891 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82f300 }
46893 /* indexw.w ${Dsp-16-s16}[fb] */
46896 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46897 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84f30000 }
46899 /* indexw.w ${Dsp-16-u16} */
46902 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46903 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86f30000 }
46905 /* indexw.w ${Dsp-16-u24} */
46908 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46909 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86b30000 }
46911 /* indexw.b $Dst32RnUnprefixedQI */
46914 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46915 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8823 }
46917 /* indexw.b $Dst32AnUnprefixedQI */
46920 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46921 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x80a3 }
46923 /* indexw.b [$Dst32AnUnprefixed] */
46926 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46927 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8023 }
46929 /* indexw.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46932 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46933 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822300 }
46935 /* indexw.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46938 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46939 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84230000 }
46941 /* indexw.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46944 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46945 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86230000 }
46947 /* indexw.b ${Dsp-16-u8}[sb] */
46950 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46951 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a300 }
46953 /* indexw.b ${Dsp-16-u16}[sb] */
46956 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46957 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a30000 }
46959 /* indexw.b ${Dsp-16-s8}[fb] */
46962 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46963 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e300 }
46965 /* indexw.b ${Dsp-16-s16}[fb] */
46968 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46969 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e30000 }
46971 /* indexw.b ${Dsp-16-u16} */
46974 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46975 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e30000 }
46977 /* indexw.b ${Dsp-16-u24} */
46980 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46981 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a30000 }
46983 /* indexls.w $Dst32RnUnprefixedHI */
46986 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46987 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9813 }
46989 /* indexls.w $Dst32AnUnprefixedHI */
46992 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46993 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x9093 }
46995 /* indexls.w [$Dst32AnUnprefixed] */
46998 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46999 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9013 }
47001 /* indexls.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47004 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47005 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x921300 }
47007 /* indexls.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47010 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47011 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94130000 }
47013 /* indexls.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47016 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47017 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96130000 }
47019 /* indexls.w ${Dsp-16-u8}[sb] */
47022 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47023 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x929300 }
47025 /* indexls.w ${Dsp-16-u16}[sb] */
47028 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47029 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94930000 }
47031 /* indexls.w ${Dsp-16-s8}[fb] */
47034 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47035 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92d300 }
47037 /* indexls.w ${Dsp-16-s16}[fb] */
47040 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47041 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94d30000 }
47043 /* indexls.w ${Dsp-16-u16} */
47046 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47047 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96d30000 }
47049 /* indexls.w ${Dsp-16-u24} */
47052 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47053 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96930000 }
47055 /* indexls.b $Dst32RnUnprefixedQI */
47058 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47059 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9803 }
47061 /* indexls.b $Dst32AnUnprefixedQI */
47064 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47065 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x9083 }
47067 /* indexls.b [$Dst32AnUnprefixed] */
47070 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47071 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9003 }
47073 /* indexls.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47076 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47077 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920300 }
47079 /* indexls.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47082 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47083 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94030000 }
47085 /* indexls.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47088 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47089 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96030000 }
47091 /* indexls.b ${Dsp-16-u8}[sb] */
47094 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47095 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928300 }
47097 /* indexls.b ${Dsp-16-u16}[sb] */
47100 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47101 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94830000 }
47103 /* indexls.b ${Dsp-16-s8}[fb] */
47106 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47107 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92c300 }
47109 /* indexls.b ${Dsp-16-s16}[fb] */
47112 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47113 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94c30000 }
47115 /* indexls.b ${Dsp-16-u16} */
47118 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47119 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96c30000 }
47121 /* indexls.b ${Dsp-16-u24} */
47124 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47125 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96830000 }
47127 /* indexld.w $Dst32RnUnprefixedHI */
47130 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47131 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb833 }
47133 /* indexld.w $Dst32AnUnprefixedHI */
47136 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47137 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb0b3 }
47139 /* indexld.w [$Dst32AnUnprefixed] */
47142 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47143 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb033 }
47145 /* indexld.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47148 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47149 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb23300 }
47151 /* indexld.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47154 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47155 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb4330000 }
47157 /* indexld.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47160 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47161 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb6330000 }
47163 /* indexld.w ${Dsp-16-u8}[sb] */
47166 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47167 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb2b300 }
47169 /* indexld.w ${Dsp-16-u16}[sb] */
47172 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47173 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb4b30000 }
47175 /* indexld.w ${Dsp-16-s8}[fb] */
47178 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47179 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb2f300 }
47181 /* indexld.w ${Dsp-16-s16}[fb] */
47184 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47185 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb4f30000 }
47187 /* indexld.w ${Dsp-16-u16} */
47190 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47191 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb6f30000 }
47193 /* indexld.w ${Dsp-16-u24} */
47196 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47197 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb6b30000 }
47199 /* indexld.b $Dst32RnUnprefixedQI */
47202 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47203 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb823 }
47205 /* indexld.b $Dst32AnUnprefixedQI */
47208 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47209 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0a3 }
47211 /* indexld.b [$Dst32AnUnprefixed] */
47214 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47215 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb023 }
47217 /* indexld.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47220 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47221 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22300 }
47223 /* indexld.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47226 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47227 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb4230000 }
47229 /* indexld.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47232 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47233 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb6230000 }
47235 /* indexld.b ${Dsp-16-u8}[sb] */
47238 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47239 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2a300 }
47241 /* indexld.b ${Dsp-16-u16}[sb] */
47244 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47245 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4a30000 }
47247 /* indexld.b ${Dsp-16-s8}[fb] */
47250 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47251 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2e300 }
47253 /* indexld.b ${Dsp-16-s16}[fb] */
47256 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47257 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4e30000 }
47259 /* indexld.b ${Dsp-16-u16} */
47262 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47263 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6e30000 }
47265 /* indexld.b ${Dsp-16-u24} */
47268 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47269 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6a30000 }
47271 /* indexl.w $Dst32RnUnprefixedHI */
47274 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47275 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9833 }
47277 /* indexl.w $Dst32AnUnprefixedHI */
47280 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47281 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x90b3 }
47283 /* indexl.w [$Dst32AnUnprefixed] */
47286 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47287 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9033 }
47289 /* indexl.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47292 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47293 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x923300 }
47295 /* indexl.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47298 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47299 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94330000 }
47301 /* indexl.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47304 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47305 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96330000 }
47307 /* indexl.w ${Dsp-16-u8}[sb] */
47310 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47311 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x92b300 }
47313 /* indexl.w ${Dsp-16-u16}[sb] */
47316 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47317 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94b30000 }
47319 /* indexl.w ${Dsp-16-s8}[fb] */
47322 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47323 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92f300 }
47325 /* indexl.w ${Dsp-16-s16}[fb] */
47328 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47329 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94f30000 }
47331 /* indexl.w ${Dsp-16-u16} */
47334 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47335 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96f30000 }
47337 /* indexl.w ${Dsp-16-u24} */
47340 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47341 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96b30000 }
47343 /* indexl.b $Dst32RnUnprefixedQI */
47346 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47347 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9823 }
47349 /* indexl.b $Dst32AnUnprefixedQI */
47352 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47353 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x90a3 }
47355 /* indexl.b [$Dst32AnUnprefixed] */
47358 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47359 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9023 }
47361 /* indexl.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47364 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47365 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922300 }
47367 /* indexl.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47370 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47371 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94230000 }
47373 /* indexl.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47376 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47377 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96230000 }
47379 /* indexl.b ${Dsp-16-u8}[sb] */
47382 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47383 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92a300 }
47385 /* indexl.b ${Dsp-16-u16}[sb] */
47388 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47389 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94a30000 }
47391 /* indexl.b ${Dsp-16-s8}[fb] */
47394 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47395 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92e300 }
47397 /* indexl.b ${Dsp-16-s16}[fb] */
47400 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47401 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94e30000 }
47403 /* indexl.b ${Dsp-16-u16} */
47406 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47407 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96e30000 }
47409 /* indexl.b ${Dsp-16-u24} */
47412 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47413 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96a30000 }
47415 /* indexbs.w $Dst32RnUnprefixedHI */
47418 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47419 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc813 }
47421 /* indexbs.w $Dst32AnUnprefixedHI */
47424 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47425 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc093 }
47427 /* indexbs.w [$Dst32AnUnprefixed] */
47430 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47431 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc013 }
47433 /* indexbs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47436 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47437 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc21300 }
47439 /* indexbs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47442 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47443 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4130000 }
47445 /* indexbs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47448 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47449 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6130000 }
47451 /* indexbs.w ${Dsp-16-u8}[sb] */
47454 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47455 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc29300 }
47457 /* indexbs.w ${Dsp-16-u16}[sb] */
47460 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47461 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4930000 }
47463 /* indexbs.w ${Dsp-16-s8}[fb] */
47466 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47467 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2d300 }
47469 /* indexbs.w ${Dsp-16-s16}[fb] */
47472 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47473 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4d30000 }
47475 /* indexbs.w ${Dsp-16-u16} */
47478 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47479 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6d30000 }
47481 /* indexbs.w ${Dsp-16-u24} */
47484 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47485 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6930000 }
47487 /* indexbs.b $Dst32RnUnprefixedQI */
47490 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47491 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc803 }
47493 /* indexbs.b $Dst32AnUnprefixedQI */
47496 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47497 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc083 }
47499 /* indexbs.b [$Dst32AnUnprefixed] */
47502 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47503 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc003 }
47505 /* indexbs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47508 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47509 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20300 }
47511 /* indexbs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47514 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47515 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4030000 }
47517 /* indexbs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47520 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47521 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6030000 }
47523 /* indexbs.b ${Dsp-16-u8}[sb] */
47526 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47527 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28300 }
47529 /* indexbs.b ${Dsp-16-u16}[sb] */
47532 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47533 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4830000 }
47535 /* indexbs.b ${Dsp-16-s8}[fb] */
47538 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47539 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c300 }
47541 /* indexbs.b ${Dsp-16-s16}[fb] */
47544 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47545 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c30000 }
47547 /* indexbs.b ${Dsp-16-u16} */
47550 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47551 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c30000 }
47553 /* indexbs.b ${Dsp-16-u24} */
47556 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47557 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6830000 }
47559 /* indexbd.w $Dst32RnUnprefixedHI */
47562 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47563 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa813 }
47565 /* indexbd.w $Dst32AnUnprefixedHI */
47568 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47569 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa093 }
47571 /* indexbd.w [$Dst32AnUnprefixed] */
47574 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47575 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa013 }
47577 /* indexbd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47580 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47581 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa21300 }
47583 /* indexbd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47586 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47587 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4130000 }
47589 /* indexbd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47592 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47593 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6130000 }
47595 /* indexbd.w ${Dsp-16-u8}[sb] */
47598 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47599 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa29300 }
47601 /* indexbd.w ${Dsp-16-u16}[sb] */
47604 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47605 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4930000 }
47607 /* indexbd.w ${Dsp-16-s8}[fb] */
47610 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47611 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2d300 }
47613 /* indexbd.w ${Dsp-16-s16}[fb] */
47616 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47617 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4d30000 }
47619 /* indexbd.w ${Dsp-16-u16} */
47622 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47623 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6d30000 }
47625 /* indexbd.w ${Dsp-16-u24} */
47628 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47629 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6930000 }
47631 /* indexbd.b $Dst32RnUnprefixedQI */
47634 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47635 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa803 }
47637 /* indexbd.b $Dst32AnUnprefixedQI */
47640 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47641 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa083 }
47643 /* indexbd.b [$Dst32AnUnprefixed] */
47646 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47647 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa003 }
47649 /* indexbd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47652 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47653 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20300 }
47655 /* indexbd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47658 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47659 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4030000 }
47661 /* indexbd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47664 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47665 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6030000 }
47667 /* indexbd.b ${Dsp-16-u8}[sb] */
47670 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47671 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28300 }
47673 /* indexbd.b ${Dsp-16-u16}[sb] */
47676 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47677 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4830000 }
47679 /* indexbd.b ${Dsp-16-s8}[fb] */
47682 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47683 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2c300 }
47685 /* indexbd.b ${Dsp-16-s16}[fb] */
47688 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47689 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4c30000 }
47691 /* indexbd.b ${Dsp-16-u16} */
47694 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47695 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6c30000 }
47697 /* indexbd.b ${Dsp-16-u24} */
47700 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47701 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6830000 }
47703 /* indexb.w $Dst32RnUnprefixedHI */
47706 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47707 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8813 }
47709 /* indexb.w $Dst32AnUnprefixedHI */
47712 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47713 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x8093 }
47715 /* indexb.w [$Dst32AnUnprefixed] */
47718 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47719 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8013 }
47721 /* indexb.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47724 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47725 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x821300 }
47727 /* indexb.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47730 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47731 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84130000 }
47733 /* indexb.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47736 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47737 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86130000 }
47739 /* indexb.w ${Dsp-16-u8}[sb] */
47742 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47743 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x829300 }
47745 /* indexb.w ${Dsp-16-u16}[sb] */
47748 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47749 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84930000 }
47751 /* indexb.w ${Dsp-16-s8}[fb] */
47754 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47755 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82d300 }
47757 /* indexb.w ${Dsp-16-s16}[fb] */
47760 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47761 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84d30000 }
47763 /* indexb.w ${Dsp-16-u16} */
47766 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47767 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86d30000 }
47769 /* indexb.w ${Dsp-16-u24} */
47772 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47773 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86930000 }
47775 /* indexb.b $Dst32RnUnprefixedQI */
47778 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47779 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8803 }
47781 /* indexb.b $Dst32AnUnprefixedQI */
47784 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47785 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x8083 }
47787 /* indexb.b [$Dst32AnUnprefixed] */
47790 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47791 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8003 }
47793 /* indexb.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47796 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47797 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820300 }
47799 /* indexb.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47802 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47803 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84030000 }
47805 /* indexb.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47808 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47809 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86030000 }
47811 /* indexb.b ${Dsp-16-u8}[sb] */
47814 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47815 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828300 }
47817 /* indexb.b ${Dsp-16-u16}[sb] */
47820 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47821 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84830000 }
47823 /* indexb.b ${Dsp-16-s8}[fb] */
47826 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47827 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c300 }
47829 /* indexb.b ${Dsp-16-s16}[fb] */
47832 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47833 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c30000 }
47835 /* indexb.b ${Dsp-16-u16} */
47838 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47839 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c30000 }
47841 /* indexb.b ${Dsp-16-u24} */
47844 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47845 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86830000 }
47847 /* inc.w $Dst32RnUnprefixedHI */
47850 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47851 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa90e }
47853 /* inc.w $Dst32AnUnprefixedHI */
47856 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47857 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18e }
47859 /* inc.w [$Dst32AnUnprefixed] */
47862 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47863 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa10e }
47865 /* inc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47868 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47869 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30e00 }
47871 /* inc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47874 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47875 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50e0000 }
47877 /* inc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47880 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47881 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70e0000 }
47883 /* inc.w ${Dsp-16-u8}[sb] */
47886 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47887 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38e00 }
47889 /* inc.w ${Dsp-16-u16}[sb] */
47892 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47893 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58e0000 }
47895 /* inc.w ${Dsp-16-s8}[fb] */
47898 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47899 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ce00 }
47901 /* inc.w ${Dsp-16-s16}[fb] */
47904 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47905 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ce0000 }
47907 /* inc.w ${Dsp-16-u16} */
47910 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47911 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ce0000 }
47913 /* inc.w ${Dsp-16-u24} */
47916 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47917 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78e0000 }
47919 /* inc.b $Dst32RnUnprefixedQI */
47922 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47923 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa80e }
47925 /* inc.b $Dst32AnUnprefixedQI */
47928 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47929 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa08e }
47931 /* inc.b [$Dst32AnUnprefixed] */
47934 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47935 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa00e }
47937 /* inc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47940 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47941 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20e00 }
47943 /* inc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47946 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47947 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40e0000 }
47949 /* inc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47952 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47953 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60e0000 }
47955 /* inc.b ${Dsp-16-u8}[sb] */
47958 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47959 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28e00 }
47961 /* inc.b ${Dsp-16-u16}[sb] */
47964 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47965 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48e0000 }
47967 /* inc.b ${Dsp-16-s8}[fb] */
47970 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47971 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ce00 }
47973 /* inc.b ${Dsp-16-s16}[fb] */
47976 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47977 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ce0000 }
47979 /* inc.b ${Dsp-16-u16} */
47982 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47983 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ce0000 }
47985 /* inc.b ${Dsp-16-u24} */
47988 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47989 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68e0000 }
47994 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
47995 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xa4 }
48000 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
48001 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xa3 }
48003 /* inc.b ${Dsp-8-u8}[sb] */
48006 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48007 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xa500 }
48009 /* inc.b ${Dsp-8-s8}[fb] */
48012 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48013 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xa600 }
48015 /* inc.b ${Dsp-8-u16} */
48018 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
48019 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xa70000 }
48021 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48025 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990000 }
48027 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
48030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48031 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992000 }
48033 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
48036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48037 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993000 }
48039 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48043 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918000 }
48045 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
48048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48049 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a000 }
48051 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
48054 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48055 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b000 }
48057 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48061 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910000 }
48063 /* sub.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
48066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48067 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912000 }
48069 /* sub.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
48072 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48073 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913000 }
48075 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48079 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93000000 }
48081 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48085 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93200000 }
48087 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48090 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48091 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93300000 }
48093 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48097 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95000000 }
48099 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48103 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95200000 }
48105 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48109 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95300000 }
48111 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48115 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97000000 }
48117 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48121 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97200000 }
48123 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48126 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48127 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97300000 }
48129 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
48132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48133 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93800000 }
48135 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
48138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48139 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a00000 }
48141 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
48144 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48145 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b00000 }
48147 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
48150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48151 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95800000 }
48153 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
48156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48157 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a00000 }
48159 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
48162 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48163 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b00000 }
48165 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
48168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48169 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c00000 }
48171 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
48174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48175 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e00000 }
48177 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
48180 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48181 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f00000 }
48183 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
48186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48187 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c00000 }
48189 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
48192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48193 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e00000 }
48195 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
48198 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48199 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f00000 }
48201 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
48204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
48205 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c00000 }
48207 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
48210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48211 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e00000 }
48213 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
48216 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48217 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f00000 }
48219 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
48222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
48223 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97800000 }
48225 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
48228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48229 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a00000 }
48231 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
48234 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48235 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b00000 }
48237 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48241 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9000000 }
48243 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
48246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48247 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9200000 }
48249 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
48252 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48253 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9300000 }
48255 /* sub.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
48258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48259 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9300000 }
48261 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48265 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1800000 }
48267 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
48270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48271 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a00000 }
48273 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
48276 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48277 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b00000 }
48279 /* sub.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
48282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48283 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b00000 }
48285 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48289 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1000000 }
48291 /* sub.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
48294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48295 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1200000 }
48297 /* sub.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
48300 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48301 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1300000 }
48303 /* sub.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
48306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48307 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1300000 }
48309 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48313 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3000000 }
48315 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48319 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3200000 }
48321 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48324 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48325 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3300000 }
48327 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
48330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48331 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3300000 }
48333 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48337 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5000000 }
48339 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48343 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5200000 }
48345 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48348 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48349 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5300000 }
48351 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
48354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48355 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5300000 }
48357 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48361 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7000000 }
48363 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48367 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7200000 }
48369 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48372 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48373 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7300000 }
48375 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
48378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48379 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7300000 }
48381 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
48384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48385 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3800000 }
48387 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
48390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48391 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a00000 }
48393 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
48396 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48397 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b00000 }
48399 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
48402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48403 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b00000 }
48405 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
48408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48409 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5800000 }
48411 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
48414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48415 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a00000 }
48417 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
48420 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48421 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b00000 }
48423 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
48426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48427 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b00000 }
48429 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
48432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48433 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c00000 }
48435 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
48438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48439 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e00000 }
48441 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
48444 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48445 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f00000 }
48447 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
48450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48451 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f00000 }
48453 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
48456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48457 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c00000 }
48459 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
48462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48463 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e00000 }
48465 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
48468 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48469 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f00000 }
48471 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
48474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48475 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f00000 }
48477 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
48480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
48481 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c00000 }
48483 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
48486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48487 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e00000 }
48489 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
48492 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48493 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f00000 }
48495 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
48498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
48499 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f00000 }
48501 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
48504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
48505 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7800000 }
48507 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
48510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48511 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a00000 }
48513 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
48516 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48517 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b00000 }
48519 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
48522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
48523 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b00000 }
48525 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48529 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9000000 }
48531 /* sub.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
48534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48535 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9200000 }
48537 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48541 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1800000 }
48543 /* sub.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
48546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48547 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a00000 }
48549 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48553 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1000000 }
48555 /* sub.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
48558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48559 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1200000 }
48561 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
48564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48565 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3000000 }
48567 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
48570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48571 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3200000 }
48573 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
48576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48577 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5000000 }
48579 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
48582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48583 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5200000 }
48585 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
48588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48589 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7000000 }
48591 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
48594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48595 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7200000 }
48597 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
48600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48601 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3800000 }
48603 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
48606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48607 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a00000 }
48609 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
48612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48613 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5800000 }
48615 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
48618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48619 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a00000 }
48621 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
48624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48625 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c00000 }
48627 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
48630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48631 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e00000 }
48633 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
48636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48637 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c00000 }
48639 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
48642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48643 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e00000 }
48645 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
48648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
48649 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c00000 }
48651 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
48654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
48655 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e00000 }
48657 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
48660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
48661 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7800000 }
48663 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
48666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
48667 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a00000 }
48669 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
48672 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48673 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc900 }
48675 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
48678 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48679 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8920 }
48681 /* sub.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48684 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48685 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8900 }
48687 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
48690 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48691 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc180 }
48693 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
48696 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48697 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a0 }
48699 /* sub.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48702 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48703 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8180 }
48705 /* sub.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
48708 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48709 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc100 }
48711 /* sub.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
48714 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48715 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8120 }
48717 /* sub.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48720 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48721 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8100 }
48723 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48726 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48727 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30000 }
48729 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48732 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48733 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832000 }
48735 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
48738 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48739 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830000 }
48741 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48744 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48745 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5000000 }
48747 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48750 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48751 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85200000 }
48753 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
48756 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48757 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85000000 }
48759 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48762 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48763 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7000000 }
48765 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48768 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48769 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87200000 }
48771 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
48774 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48775 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87000000 }
48777 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
48780 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48781 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38000 }
48783 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
48786 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48787 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a000 }
48789 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
48792 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48793 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838000 }
48795 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
48798 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48799 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5800000 }
48801 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
48804 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48805 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a00000 }
48807 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
48810 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48811 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85800000 }
48813 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
48816 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48817 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c000 }
48819 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
48822 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48823 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e000 }
48825 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
48828 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48829 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c000 }
48831 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
48834 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48835 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c00000 }
48837 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
48840 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48841 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e00000 }
48843 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
48846 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48847 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c00000 }
48849 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
48852 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48853 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c00000 }
48855 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
48858 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48859 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e00000 }
48861 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
48864 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
48865 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c00000 }
48867 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
48870 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48871 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7800000 }
48873 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
48876 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48877 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a00000 }
48879 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
48882 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
48883 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87800000 }
48885 /* sub.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
48888 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48889 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2f000000 }
48891 /* sub.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
48894 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48895 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3f000000 }
48897 /* sub.w${S} #${Imm-24-HI},${Dsp-8-u16} */
48900 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
48901 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1f000000 }
48903 /* sub.w${S} #${Imm-8-HI},r0 */
48906 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
48907 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xf0000 }
48909 /* sub.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
48912 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48913 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2e0000 }
48915 /* sub.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
48918 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48919 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3e0000 }
48921 /* sub.b${S} #${Imm-24-QI},${Dsp-8-u16} */
48924 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
48925 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1e000000 }
48927 /* sub.b${S} #${Imm-8-QI},r0l */
48930 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
48931 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xe00 }
48933 /* sub.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
48936 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48937 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x98310000 }
48939 /* sub.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
48942 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48943 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90b10000 }
48945 /* sub.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
48948 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48949 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x90310000 }
48951 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
48954 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48955 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92310000 }
48957 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
48960 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48961 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92b10000 }
48963 /* sub.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
48966 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48967 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92f10000 }
48969 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
48972 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48973 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94310000 }
48975 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
48978 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48979 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94b10000 }
48981 /* sub.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
48984 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48985 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94f10000 }
48987 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16} */
48990 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
48991 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96f10000 }
48993 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
48996 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48997 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96310000 }
48999 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24} */
49002 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
49003 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96b10000 }
49005 /* sub.b${S} ${SrcDst16-r0l-r0h-S-normal} */
49008 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
49009 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x28 }
49011 /* sub.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
49014 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49015 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2900 }
49017 /* sub.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
49020 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49021 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2a00 }
49023 /* sub.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
49026 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
49027 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x2b0000 }
49029 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49033 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990a00 }
49035 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
49038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49039 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992a00 }
49041 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
49044 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49045 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993a00 }
49047 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49051 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918a00 }
49053 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
49056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49057 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91aa00 }
49059 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
49062 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49063 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ba00 }
49065 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49069 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910a00 }
49071 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49075 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912a00 }
49077 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49080 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49081 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913a00 }
49083 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49087 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930a0000 }
49089 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49093 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932a0000 }
49095 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49098 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49099 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933a0000 }
49101 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49105 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950a0000 }
49107 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49111 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952a0000 }
49113 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49116 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49117 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953a0000 }
49119 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49123 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970a0000 }
49125 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49129 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972a0000 }
49131 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49134 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49135 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973a0000 }
49137 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
49140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49141 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938a0000 }
49143 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
49146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49147 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93aa0000 }
49149 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
49152 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49153 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ba0000 }
49155 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
49158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49159 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958a0000 }
49161 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
49164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49165 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95aa0000 }
49167 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
49170 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49171 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ba0000 }
49173 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
49176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49177 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ca0000 }
49179 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
49182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49183 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ea0000 }
49185 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
49188 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49189 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fa0000 }
49191 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
49194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49195 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ca0000 }
49197 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
49200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49201 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ea0000 }
49203 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
49206 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49207 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fa0000 }
49209 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
49212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
49213 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ca0000 }
49215 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
49218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49219 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ea0000 }
49221 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
49224 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49225 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fa0000 }
49227 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
49230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
49231 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978a0000 }
49233 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
49236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49237 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97aa0000 }
49239 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
49242 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49243 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ba0000 }
49245 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49249 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90a0000 }
49251 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
49254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49255 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92a0000 }
49257 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
49260 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49261 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93a0000 }
49263 /* sub.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
49266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49267 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93a0000 }
49269 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49273 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18a0000 }
49275 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
49278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49279 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1aa0000 }
49281 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
49284 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49285 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ba0000 }
49287 /* sub.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
49290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49291 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ba0000 }
49293 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49297 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10a0000 }
49299 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
49302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49303 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12a0000 }
49305 /* sub.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
49308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49309 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13a0000 }
49311 /* sub.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
49314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49315 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13a0000 }
49317 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49321 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30a0000 }
49323 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49327 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32a0000 }
49329 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49332 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49333 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33a0000 }
49335 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
49338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49339 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33a0000 }
49341 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49345 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50a0000 }
49347 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49351 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52a0000 }
49353 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49356 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49357 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53a0000 }
49359 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
49362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49363 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53a0000 }
49365 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49369 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70a0000 }
49371 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49375 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72a0000 }
49377 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49381 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73a0000 }
49383 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
49386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49387 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73a0000 }
49389 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
49392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49393 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38a0000 }
49395 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
49398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49399 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3aa0000 }
49401 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
49404 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49405 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ba0000 }
49407 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
49410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49411 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3ba0000 }
49413 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
49416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49417 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58a0000 }
49419 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
49422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49423 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5aa0000 }
49425 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
49428 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49429 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ba0000 }
49431 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
49434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49435 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5ba0000 }
49437 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
49440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49441 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ca0000 }
49443 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
49446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49447 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ea0000 }
49449 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
49452 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49453 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fa0000 }
49455 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
49458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49459 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fa0000 }
49461 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
49464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49465 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ca0000 }
49467 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
49470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49471 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ea0000 }
49473 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
49476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49477 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fa0000 }
49479 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
49482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49483 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fa0000 }
49485 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
49488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
49489 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ca0000 }
49491 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
49494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49495 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ea0000 }
49497 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
49500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49501 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fa0000 }
49503 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
49506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
49507 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fa0000 }
49509 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
49512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
49513 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78a0000 }
49515 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
49518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49519 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7aa0000 }
49521 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
49524 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49525 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ba0000 }
49527 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
49530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
49531 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7ba0000 }
49533 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49537 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90a0000 }
49539 /* sub.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
49542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49543 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92a0000 }
49545 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49549 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18a0000 }
49551 /* sub.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
49554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49555 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1aa0000 }
49557 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49561 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10a0000 }
49563 /* sub.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
49566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49567 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12a0000 }
49569 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
49572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49573 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30a0000 }
49575 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
49578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49579 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32a0000 }
49581 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
49584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49585 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50a0000 }
49587 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
49590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49591 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52a0000 }
49593 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
49596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49597 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70a0000 }
49599 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
49602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49603 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72a0000 }
49605 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
49608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49609 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38a0000 }
49611 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
49614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49615 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3aa0000 }
49617 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
49620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49621 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58a0000 }
49623 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
49626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49627 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5aa0000 }
49629 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
49632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49633 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ca0000 }
49635 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
49638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49639 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ea0000 }
49641 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
49644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49645 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ca0000 }
49647 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
49650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49651 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ea0000 }
49653 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
49656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
49657 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ca0000 }
49659 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
49662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
49663 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ea0000 }
49665 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
49668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
49669 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78a0000 }
49671 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
49674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
49675 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7aa0000 }
49677 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
49680 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49681 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90a }
49683 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
49686 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49687 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892a }
49689 /* sub.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49692 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49693 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890a }
49695 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
49698 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49699 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18a }
49701 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
49704 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49705 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81aa }
49707 /* sub.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49710 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49711 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818a }
49713 /* sub.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
49716 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49717 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10a }
49719 /* sub.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
49722 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49723 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812a }
49725 /* sub.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49728 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49729 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810a }
49731 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49734 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49735 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30a00 }
49737 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49740 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49741 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832a00 }
49743 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
49746 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49747 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830a00 }
49749 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49752 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49753 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50a0000 }
49755 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49758 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49759 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852a0000 }
49761 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
49764 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49765 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850a0000 }
49767 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49770 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49771 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70a0000 }
49773 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49776 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49777 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872a0000 }
49779 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
49782 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49783 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870a0000 }
49785 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
49788 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49789 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38a00 }
49791 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
49794 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49795 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83aa00 }
49797 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
49800 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49801 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838a00 }
49803 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
49806 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49807 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58a0000 }
49809 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
49812 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49813 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85aa0000 }
49815 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
49818 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49819 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858a0000 }
49821 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
49824 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49825 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ca00 }
49827 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
49830 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49831 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ea00 }
49833 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
49836 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49837 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ca00 }
49839 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
49842 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49843 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ca0000 }
49845 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
49848 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49849 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ea0000 }
49851 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
49854 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49855 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ca0000 }
49857 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
49860 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49861 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ca0000 }
49863 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
49866 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49867 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ea0000 }
49869 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
49872 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
49873 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ca0000 }
49875 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
49878 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49879 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78a0000 }
49881 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
49884 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49885 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87aa0000 }
49887 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
49890 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
49891 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878a0000 }
49893 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
49896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49897 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980a00 }
49899 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
49902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49903 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982a00 }
49905 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
49908 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49909 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983a00 }
49911 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
49914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49915 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908a00 }
49917 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
49920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49921 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90aa00 }
49923 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
49926 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49927 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ba00 }
49929 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49933 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900a00 }
49935 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49939 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902a00 }
49941 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49944 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49945 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903a00 }
49947 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49951 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920a0000 }
49953 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49957 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922a0000 }
49959 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49962 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49963 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923a0000 }
49965 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49969 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940a0000 }
49971 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49975 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942a0000 }
49977 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49980 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49981 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943a0000 }
49983 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49987 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960a0000 }
49989 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49993 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962a0000 }
49995 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49998 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49999 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963a0000 }
50001 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
50004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50005 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928a0000 }
50007 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50011 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92aa0000 }
50013 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50016 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50017 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ba0000 }
50019 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
50022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50023 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948a0000 }
50025 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50029 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94aa0000 }
50031 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50034 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50035 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ba0000 }
50037 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
50040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50041 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ca0000 }
50043 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50047 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ea0000 }
50049 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50053 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fa0000 }
50055 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
50058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50059 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ca0000 }
50061 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
50064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50065 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ea0000 }
50067 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
50070 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50071 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fa0000 }
50073 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
50076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
50077 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ca0000 }
50079 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50083 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ea0000 }
50085 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50088 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50089 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fa0000 }
50091 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
50094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
50095 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968a0000 }
50097 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
50100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50101 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96aa0000 }
50103 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
50106 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50107 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ba0000 }
50109 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50113 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80a0000 }
50115 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
50118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50119 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82a0000 }
50121 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
50124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50125 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83a0000 }
50127 /* sub.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
50130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50131 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83a0000 }
50133 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50137 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08a0000 }
50139 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
50142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50143 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0aa0000 }
50145 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
50148 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50149 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ba0000 }
50151 /* sub.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
50154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50155 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ba0000 }
50157 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50161 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00a0000 }
50163 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
50166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50167 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02a0000 }
50169 /* sub.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
50172 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50173 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03a0000 }
50175 /* sub.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
50178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50179 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03a0000 }
50181 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50185 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20a0000 }
50187 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50191 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22a0000 }
50193 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50196 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50197 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23a0000 }
50199 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
50202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50203 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23a0000 }
50205 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50209 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40a0000 }
50211 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50215 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42a0000 }
50217 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50220 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50221 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43a0000 }
50223 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
50226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50227 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43a0000 }
50229 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50233 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60a0000 }
50235 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50239 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62a0000 }
50241 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50244 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50245 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63a0000 }
50247 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
50250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50251 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63a0000 }
50253 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
50256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50257 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28a0000 }
50259 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
50262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50263 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2aa0000 }
50265 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
50268 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50269 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ba0000 }
50271 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
50274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50275 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2ba0000 }
50277 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
50280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50281 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48a0000 }
50283 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
50286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50287 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4aa0000 }
50289 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
50292 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50293 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ba0000 }
50295 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
50298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50299 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4ba0000 }
50301 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
50304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50305 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ca0000 }
50307 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
50310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50311 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ea0000 }
50313 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
50316 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50317 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fa0000 }
50319 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
50322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50323 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fa0000 }
50325 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
50328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50329 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ca0000 }
50331 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
50334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50335 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ea0000 }
50337 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
50340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50341 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fa0000 }
50343 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
50346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50347 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fa0000 }
50349 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
50352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
50353 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ca0000 }
50355 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
50358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50359 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ea0000 }
50361 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
50364 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50365 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fa0000 }
50367 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
50370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
50371 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fa0000 }
50373 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
50376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
50377 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68a0000 }
50379 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
50382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50383 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6aa0000 }
50385 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
50388 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50389 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ba0000 }
50391 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
50394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
50395 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6ba0000 }
50397 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50401 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80a0000 }
50403 /* sub.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
50406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50407 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82a0000 }
50409 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50413 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08a0000 }
50415 /* sub.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
50418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50419 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0aa0000 }
50421 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50425 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00a0000 }
50427 /* sub.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
50430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50431 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02a0000 }
50433 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
50436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50437 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20a0000 }
50439 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
50442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50443 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22a0000 }
50445 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
50448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50449 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40a0000 }
50451 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
50454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50455 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42a0000 }
50457 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
50460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50461 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60a0000 }
50463 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
50466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50467 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62a0000 }
50469 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
50472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50473 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28a0000 }
50475 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
50478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50479 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2aa0000 }
50481 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
50484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50485 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48a0000 }
50487 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
50490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50491 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4aa0000 }
50493 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
50496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50497 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ca0000 }
50499 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
50502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50503 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ea0000 }
50505 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
50508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50509 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ca0000 }
50511 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
50514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50515 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ea0000 }
50517 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
50520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
50521 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ca0000 }
50523 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
50526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
50527 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ea0000 }
50529 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
50532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
50533 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68a0000 }
50535 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
50538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
50539 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6aa0000 }
50541 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
50544 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50545 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80a }
50547 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
50550 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50551 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882a }
50553 /* sub.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50556 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50557 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880a }
50559 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
50562 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50563 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08a }
50565 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
50568 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50569 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80aa }
50571 /* sub.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50574 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50575 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808a }
50577 /* sub.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
50580 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50581 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00a }
50583 /* sub.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
50586 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50587 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802a }
50589 /* sub.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50592 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50593 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800a }
50595 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50598 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50599 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20a00 }
50601 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50604 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50605 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822a00 }
50607 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
50610 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50611 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820a00 }
50613 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50616 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50617 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40a0000 }
50619 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50622 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50623 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842a0000 }
50625 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
50628 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50629 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840a0000 }
50631 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50634 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50635 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60a0000 }
50637 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50640 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50641 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862a0000 }
50643 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
50646 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50647 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860a0000 }
50649 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
50652 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50653 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28a00 }
50655 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
50658 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50659 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82aa00 }
50661 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
50664 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50665 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828a00 }
50667 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
50670 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50671 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48a0000 }
50673 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
50676 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50677 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84aa0000 }
50679 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
50682 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50683 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848a0000 }
50685 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
50688 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50689 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ca00 }
50691 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
50694 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50695 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ea00 }
50697 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
50700 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50701 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ca00 }
50703 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
50706 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50707 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ca0000 }
50709 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
50712 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50713 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ea0000 }
50715 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
50718 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50719 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ca0000 }
50721 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
50724 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50725 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ca0000 }
50727 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
50730 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50731 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ea0000 }
50733 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
50736 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
50737 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ca0000 }
50739 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
50742 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50743 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68a0000 }
50745 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
50748 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50749 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86aa0000 }
50751 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
50754 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
50755 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868a0000 }
50757 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
50760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50761 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa98000 }
50763 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
50766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50767 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9a000 }
50769 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
50772 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50773 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa9b000 }
50775 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
50778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50779 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa98400 }
50781 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
50784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50785 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa9a400 }
50787 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
50790 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50791 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa9b400 }
50793 /* sub.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
50796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50797 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa98600 }
50799 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
50802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50803 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9a600 }
50805 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
50808 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50809 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa9b600 }
50811 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
50814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50815 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9880000 }
50817 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
50820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50821 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9a80000 }
50823 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
50826 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50827 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9b80000 }
50829 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
50832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50833 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa98c0000 }
50835 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
50838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50839 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9ac0000 }
50841 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
50844 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50845 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9bc0000 }
50847 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
50850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50851 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa98a0000 }
50853 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50857 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9aa0000 }
50859 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50862 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50863 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9ba0000 }
50865 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
50868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50869 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa98e0000 }
50871 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50875 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9ae0000 }
50877 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50880 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50881 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9be0000 }
50883 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
50886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50887 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa98b0000 }
50889 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50893 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9ab0000 }
50895 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50898 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50899 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9bb0000 }
50901 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
50904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
50905 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa98f0000 }
50907 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50911 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9af0000 }
50913 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50916 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50917 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9bf0000 }
50919 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
50922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50923 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa9c00000 }
50925 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
50928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50929 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9e00000 }
50931 /* sub.w${G} ${Dsp-16-u16},$Dst16RnHI */
50934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
50935 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa9f00000 }
50937 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
50940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50941 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa9c40000 }
50943 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
50946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50947 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa9e40000 }
50949 /* sub.w${G} ${Dsp-16-u16},$Dst16AnHI */
50952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
50953 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa9f40000 }
50955 /* sub.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
50958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50959 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa9c60000 }
50961 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
50964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50965 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9e60000 }
50967 /* sub.w${G} ${Dsp-16-u16},[$Dst16An] */
50970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
50971 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa9f60000 }
50973 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
50976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50977 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9c80000 }
50979 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
50982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50983 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9e80000 }
50985 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
50988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50989 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa9f80000 }
50991 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
50994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
50995 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9cc0000 }
50997 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
51000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51001 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9ec0000 }
51003 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51007 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa9fc0000 }
51009 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51013 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ca0000 }
51015 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51019 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ea0000 }
51021 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51025 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa9fa0000 }
51027 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51031 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ce0000 }
51033 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51037 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ee0000 }
51039 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51043 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa9fe0000 }
51045 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51049 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9cb0000 }
51051 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51055 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9eb0000 }
51057 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51061 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa9fb0000 }
51063 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51067 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa9cf0000 }
51069 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51073 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa9ef0000 }
51075 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
51078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51079 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa9ff0000 }
51081 /* sub.w${G} $Src16RnHI,$Dst16RnHI */
51084 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
51085 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa900 }
51087 /* sub.w${G} $Src16AnHI,$Dst16RnHI */
51090 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
51091 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa940 }
51093 /* sub.w${G} [$Src16An],$Dst16RnHI */
51096 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
51097 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa960 }
51099 /* sub.w${G} $Src16RnHI,$Dst16AnHI */
51102 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
51103 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa904 }
51105 /* sub.w${G} $Src16AnHI,$Dst16AnHI */
51108 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
51109 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa944 }
51111 /* sub.w${G} [$Src16An],$Dst16AnHI */
51114 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
51115 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa964 }
51117 /* sub.w${G} $Src16RnHI,[$Dst16An] */
51120 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51121 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa906 }
51123 /* sub.w${G} $Src16AnHI,[$Dst16An] */
51126 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51127 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa946 }
51129 /* sub.w${G} [$Src16An],[$Dst16An] */
51132 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51133 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa966 }
51135 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
51138 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51139 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa90800 }
51141 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
51144 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51145 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa94800 }
51147 /* sub.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51150 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51151 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa96800 }
51153 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
51156 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51157 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa90c0000 }
51159 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
51162 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51163 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa94c0000 }
51165 /* sub.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51168 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51169 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa96c0000 }
51171 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
51174 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51175 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa90a00 }
51177 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
51180 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51181 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa94a00 }
51183 /* sub.w${G} [$Src16An],${Dsp-16-u8}[sb] */
51186 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51187 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa96a00 }
51189 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
51192 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51193 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa90e0000 }
51195 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
51198 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51199 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa94e0000 }
51201 /* sub.w${G} [$Src16An],${Dsp-16-u16}[sb] */
51204 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51205 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa96e0000 }
51207 /* sub.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
51210 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51211 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa90b00 }
51213 /* sub.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
51216 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51217 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa94b00 }
51219 /* sub.w${G} [$Src16An],${Dsp-16-s8}[fb] */
51222 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51223 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa96b00 }
51225 /* sub.w${G} $Src16RnHI,${Dsp-16-u16} */
51228 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
51229 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa90f0000 }
51231 /* sub.w${G} $Src16AnHI,${Dsp-16-u16} */
51234 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
51235 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa94f0000 }
51237 /* sub.w${G} [$Src16An],${Dsp-16-u16} */
51240 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51241 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa96f0000 }
51243 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
51246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51247 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa88000 }
51249 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
51252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51253 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8a000 }
51255 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
51258 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51259 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa8b000 }
51261 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
51264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51265 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa88400 }
51267 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
51270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51271 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa8a400 }
51273 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
51276 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51277 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa8b400 }
51279 /* sub.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
51282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51283 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa88600 }
51285 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
51288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51289 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8a600 }
51291 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
51294 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51295 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa8b600 }
51297 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
51300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51301 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8880000 }
51303 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
51306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51307 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8a80000 }
51309 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
51312 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51313 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8b80000 }
51315 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
51318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51319 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa88c0000 }
51321 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
51324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51325 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8ac0000 }
51327 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
51330 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51331 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8bc0000 }
51333 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
51336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51337 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa88a0000 }
51339 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
51342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51343 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8aa0000 }
51345 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
51348 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51349 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8ba0000 }
51351 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
51354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51355 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa88e0000 }
51357 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
51360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51361 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8ae0000 }
51363 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
51366 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51367 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8be0000 }
51369 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
51372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51373 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa88b0000 }
51375 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
51378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51379 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8ab0000 }
51381 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
51384 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51385 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8bb0000 }
51387 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
51390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
51391 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa88f0000 }
51393 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
51396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51397 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8af0000 }
51399 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
51402 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51403 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8bf0000 }
51405 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
51408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51409 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa8c00000 }
51411 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
51414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51415 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8e00000 }
51417 /* sub.b${G} ${Dsp-16-u16},$Dst16RnQI */
51420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
51421 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa8f00000 }
51423 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
51426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51427 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa8c40000 }
51429 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
51432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51433 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa8e40000 }
51435 /* sub.b${G} ${Dsp-16-u16},$Dst16AnQI */
51438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
51439 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa8f40000 }
51441 /* sub.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
51444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51445 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa8c60000 }
51447 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
51450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51451 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8e60000 }
51453 /* sub.b${G} ${Dsp-16-u16},[$Dst16An] */
51456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
51457 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa8f60000 }
51459 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
51462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51463 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8c80000 }
51465 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
51468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51469 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8e80000 }
51471 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
51474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51475 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa8f80000 }
51477 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
51480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51481 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8cc0000 }
51483 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
51486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51487 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8ec0000 }
51489 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51493 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa8fc0000 }
51495 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51499 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ca0000 }
51501 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51505 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ea0000 }
51507 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51511 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa8fa0000 }
51513 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51517 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ce0000 }
51519 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51523 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ee0000 }
51525 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51529 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa8fe0000 }
51531 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51535 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8cb0000 }
51537 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51541 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8eb0000 }
51543 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51547 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa8fb0000 }
51549 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51553 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa8cf0000 }
51555 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51559 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa8ef0000 }
51561 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
51564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51565 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa8ff0000 }
51567 /* sub.b${G} $Src16RnQI,$Dst16RnQI */
51570 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
51571 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa800 }
51573 /* sub.b${G} $Src16AnQI,$Dst16RnQI */
51576 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
51577 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa840 }
51579 /* sub.b${G} [$Src16An],$Dst16RnQI */
51582 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51583 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa860 }
51585 /* sub.b${G} $Src16RnQI,$Dst16AnQI */
51588 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
51589 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa804 }
51591 /* sub.b${G} $Src16AnQI,$Dst16AnQI */
51594 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
51595 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa844 }
51597 /* sub.b${G} [$Src16An],$Dst16AnQI */
51600 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51601 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa864 }
51603 /* sub.b${G} $Src16RnQI,[$Dst16An] */
51606 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51607 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa806 }
51609 /* sub.b${G} $Src16AnQI,[$Dst16An] */
51612 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51613 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa846 }
51615 /* sub.b${G} [$Src16An],[$Dst16An] */
51618 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51619 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa866 }
51621 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
51624 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51625 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa80800 }
51627 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
51630 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51631 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa84800 }
51633 /* sub.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51636 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51637 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa86800 }
51639 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
51642 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51643 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa80c0000 }
51645 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
51648 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51649 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa84c0000 }
51651 /* sub.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51654 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51655 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa86c0000 }
51657 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
51660 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51661 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa80a00 }
51663 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
51666 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51667 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa84a00 }
51669 /* sub.b${G} [$Src16An],${Dsp-16-u8}[sb] */
51672 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51673 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa86a00 }
51675 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
51678 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51679 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa80e0000 }
51681 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
51684 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51685 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa84e0000 }
51687 /* sub.b${G} [$Src16An],${Dsp-16-u16}[sb] */
51690 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51691 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa86e0000 }
51693 /* sub.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
51696 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51697 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa80b00 }
51699 /* sub.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
51702 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51703 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa84b00 }
51705 /* sub.b${G} [$Src16An],${Dsp-16-s8}[fb] */
51708 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51709 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa86b00 }
51711 /* sub.b${G} $Src16RnQI,${Dsp-16-u16} */
51714 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
51715 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa80f0000 }
51717 /* sub.b${G} $Src16AnQI,${Dsp-16-u16} */
51720 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
51721 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa84f0000 }
51723 /* sub.b${G} [$Src16An],${Dsp-16-u16} */
51726 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51727 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa86f0000 }
51729 /* sub.b${S} #${Imm-8-QI},r0l */
51732 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
51733 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8c00 }
51735 /* sub.b${S} #${Imm-8-QI},r0h */
51738 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
51739 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8b00 }
51741 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
51744 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51745 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x8d0000 }
51747 /* sub.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
51750 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51751 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x8e0000 }
51753 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u16} */
51756 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
51757 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x8f000000 }
51759 /* sub.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
51762 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
51763 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893e0000 }
51765 /* sub.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
51768 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
51769 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81be0000 }
51771 /* sub.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
51774 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51775 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813e0000 }
51777 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51780 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51781 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833e0000 }
51783 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51786 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51787 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83be0000 }
51789 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51792 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51793 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83fe0000 }
51795 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51798 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51799 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853e0000 }
51801 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51804 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51805 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85be0000 }
51807 /* sub.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
51810 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51811 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85fe0000 }
51813 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51816 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51817 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87fe0000 }
51819 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51822 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51823 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873e0000 }
51825 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24} */
51828 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
51829 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87be0000 }
51831 /* sub.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
51834 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
51835 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883e00 }
51837 /* sub.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
51840 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
51841 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80be00 }
51843 /* sub.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
51846 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51847 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803e00 }
51849 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51852 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51853 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823e0000 }
51855 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51858 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51859 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82be0000 }
51861 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51864 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51865 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82fe0000 }
51867 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51870 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51871 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843e0000 }
51873 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
51876 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51877 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84be0000 }
51879 /* sub.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
51882 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51883 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84fe0000 }
51885 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
51888 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
51889 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86fe0000 }
51891 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51894 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51895 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863e0000 }
51897 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24} */
51900 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
51901 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86be0000 }
51903 /* sub.w${G} #${Imm-16-HI},$Dst16RnHI */
51906 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
51907 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77500000 }
51909 /* sub.w${G} #${Imm-16-HI},$Dst16AnHI */
51912 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
51913 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77540000 }
51915 /* sub.w${G} #${Imm-16-HI},[$Dst16An] */
51918 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
51919 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77560000 }
51921 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
51924 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51925 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77580000 }
51927 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51930 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51931 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x775a0000 }
51933 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51936 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51937 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x775b0000 }
51939 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
51942 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51943 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x775c0000 }
51945 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51948 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51949 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x775e0000 }
51951 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51954 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51955 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x775f0000 }
51957 /* sub.b${G} #${Imm-16-QI},$Dst16RnQI */
51960 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
51961 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x765000 }
51963 /* sub.b${G} #${Imm-16-QI},$Dst16AnQI */
51966 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
51967 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x765400 }
51969 /* sub.b${G} #${Imm-16-QI},[$Dst16An] */
51972 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
51973 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x765600 }
51975 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
51978 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51979 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76580000 }
51981 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51984 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51985 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x765a0000 }
51987 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51990 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51991 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x765b0000 }
51993 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
51996 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51997 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x765c0000 }
51999 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
52002 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
52003 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x765e0000 }
52005 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
52008 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
52009 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x765f0000 }
52011 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52015 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990200 }
52017 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
52020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52021 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992200 }
52023 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
52026 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52027 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993200 }
52029 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52033 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918200 }
52035 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
52038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52039 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a200 }
52041 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
52044 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52045 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b200 }
52047 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52051 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910200 }
52053 /* dsub.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52057 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912200 }
52059 /* dsub.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52062 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52063 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913200 }
52065 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52069 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930200 }
52071 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52074 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52075 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932200 }
52077 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52080 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52081 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933200 }
52083 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52087 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950200 }
52089 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52092 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52093 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952200 }
52095 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52098 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52099 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953200 }
52101 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52104 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52105 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970200 }
52107 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52110 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52111 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972200 }
52113 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52116 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52117 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973200 }
52119 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52122 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52123 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938200 }
52125 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
52128 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52129 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a200 }
52131 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
52134 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52135 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b200 }
52137 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
52140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52141 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958200 }
52143 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
52146 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52147 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a200 }
52149 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
52152 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52153 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b200 }
52155 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
52158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52159 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c200 }
52161 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
52164 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52165 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e200 }
52167 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
52170 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52171 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f200 }
52173 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
52176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52177 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c200 }
52179 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
52182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52183 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e200 }
52185 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
52188 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52189 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f200 }
52191 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
52194 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
52195 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c200 }
52197 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
52200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52201 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e200 }
52203 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
52206 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52207 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f200 }
52209 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
52212 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
52213 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978200 }
52215 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
52218 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52219 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a200 }
52221 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
52224 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52225 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b200 }
52227 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52231 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90200 }
52233 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
52236 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52237 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92200 }
52239 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
52242 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52243 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93200 }
52245 /* dsub.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
52248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52249 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93200 }
52251 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52254 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52255 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18200 }
52257 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
52260 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52261 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a200 }
52263 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
52266 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52267 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b200 }
52269 /* dsub.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
52272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52273 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b200 }
52275 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52279 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10200 }
52281 /* dsub.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
52284 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52285 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12200 }
52287 /* dsub.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
52290 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52291 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13200 }
52293 /* dsub.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
52296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52297 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13200 }
52299 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
52302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52303 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30200 }
52305 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52308 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52309 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32200 }
52311 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52314 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52315 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33200 }
52317 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
52320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52321 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33200 }
52323 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
52326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52327 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50200 }
52329 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52333 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52200 }
52335 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52338 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52339 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53200 }
52341 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
52344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52345 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53200 }
52347 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
52350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52351 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70200 }
52353 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52356 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52357 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72200 }
52359 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52362 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52363 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73200 }
52365 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
52368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52369 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73200 }
52371 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
52374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52375 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38200 }
52377 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
52380 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52381 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a200 }
52383 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
52386 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52387 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b200 }
52389 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
52392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52393 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b200 }
52395 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
52398 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52399 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58200 }
52401 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
52404 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52405 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a200 }
52407 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
52410 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52411 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b200 }
52413 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
52416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52417 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b200 }
52419 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
52422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52423 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c200 }
52425 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
52428 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52429 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e200 }
52431 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
52434 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52435 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f200 }
52437 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
52440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52441 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f200 }
52443 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
52446 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52447 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c200 }
52449 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
52452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52453 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e200 }
52455 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
52458 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52459 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f200 }
52461 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
52464 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52465 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f200 }
52467 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
52470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
52471 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c200 }
52473 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
52476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52477 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e200 }
52479 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
52482 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52483 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f200 }
52485 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
52488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
52489 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f200 }
52491 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
52494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
52495 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78200 }
52497 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
52500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52501 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a200 }
52503 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
52506 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52507 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b200 }
52509 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
52512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
52513 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b200 }
52515 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52519 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90200 }
52521 /* dsub.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
52524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52525 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92200 }
52527 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52531 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18200 }
52533 /* dsub.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
52536 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52537 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a200 }
52539 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52543 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10200 }
52545 /* dsub.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
52548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52549 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12200 }
52551 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
52554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52555 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30200 }
52557 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
52560 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52561 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32200 }
52563 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
52566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52567 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50200 }
52569 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
52572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52573 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52200 }
52575 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
52578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52579 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70200 }
52581 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
52584 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52585 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72200 }
52587 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
52590 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52591 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38200 }
52593 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
52596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52597 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a200 }
52599 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
52602 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52603 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58200 }
52605 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
52608 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52609 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a200 }
52611 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
52614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52615 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c200 }
52617 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
52620 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52621 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e200 }
52623 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
52626 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52627 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c200 }
52629 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
52632 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52633 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e200 }
52635 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
52638 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
52639 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c200 }
52641 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
52644 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
52645 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e200 }
52647 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
52650 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
52651 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78200 }
52653 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
52656 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
52657 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a200 }
52659 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
52662 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52663 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c902 }
52665 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
52668 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52669 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18922 }
52671 /* dsub.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
52674 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52675 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18902 }
52677 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
52680 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52681 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c182 }
52683 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
52686 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52687 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a2 }
52689 /* dsub.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
52692 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52693 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18182 }
52695 /* dsub.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
52698 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52699 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c102 }
52701 /* dsub.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
52704 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52705 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18122 }
52707 /* dsub.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
52710 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52711 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18102 }
52713 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52716 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52717 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30200 }
52719 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52722 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52723 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832200 }
52725 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
52728 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52729 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830200 }
52731 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52734 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52735 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50200 }
52737 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52740 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52741 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852200 }
52743 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
52746 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52747 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850200 }
52749 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52752 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52753 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70200 }
52755 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52758 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52759 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872200 }
52761 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
52764 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52765 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870200 }
52767 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
52770 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52771 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38200 }
52773 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
52776 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52777 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a200 }
52779 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
52782 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52783 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838200 }
52785 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
52788 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52789 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58200 }
52791 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
52794 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52795 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a200 }
52797 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
52800 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52801 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858200 }
52803 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
52806 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52807 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c200 }
52809 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
52812 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52813 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e200 }
52815 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
52818 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52819 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c200 }
52821 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
52824 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52825 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c200 }
52827 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
52830 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52831 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e200 }
52833 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
52836 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52837 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c200 }
52839 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
52842 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52843 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c200 }
52845 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
52848 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52849 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e200 }
52851 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
52854 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
52855 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c200 }
52857 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
52860 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52861 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78200 }
52863 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
52866 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52867 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a200 }
52869 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
52872 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
52873 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878200 }
52875 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
52878 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52879 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980200 }
52881 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
52884 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52885 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982200 }
52887 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
52890 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52891 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983200 }
52893 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
52896 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52897 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908200 }
52899 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
52902 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52903 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a200 }
52905 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
52908 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52909 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b200 }
52911 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52914 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52915 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900200 }
52917 /* dsub.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52920 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52921 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902200 }
52923 /* dsub.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52926 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52927 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903200 }
52929 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52932 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52933 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920200 }
52935 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52938 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52939 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922200 }
52941 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52944 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52945 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923200 }
52947 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52951 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940200 }
52953 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52956 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52957 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942200 }
52959 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52962 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52963 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943200 }
52965 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52968 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52969 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960200 }
52971 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52974 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52975 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962200 }
52977 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52980 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52981 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963200 }
52983 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52986 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52987 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928200 }
52989 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
52992 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52993 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a200 }
52995 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
52998 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52999 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b200 }
53001 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
53004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53005 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948200 }
53007 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
53010 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53011 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a200 }
53013 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
53016 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53017 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b200 }
53019 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
53022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53023 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c200 }
53025 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
53028 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53029 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e200 }
53031 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
53034 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53035 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f200 }
53037 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
53040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53041 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c200 }
53043 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
53046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53047 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e200 }
53049 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
53052 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53053 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f200 }
53055 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
53058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
53059 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c200 }
53061 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
53064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53065 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e200 }
53067 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
53070 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53071 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f200 }
53073 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
53076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
53077 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968200 }
53079 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
53082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53083 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a200 }
53085 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
53088 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53089 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b200 }
53091 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53095 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80200 }
53097 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
53100 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53101 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82200 }
53103 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
53106 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53107 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83200 }
53109 /* dsub.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
53112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53113 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83200 }
53115 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53119 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08200 }
53121 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
53124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53125 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a200 }
53127 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
53130 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53131 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b200 }
53133 /* dsub.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
53136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53137 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b200 }
53139 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53143 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00200 }
53145 /* dsub.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
53148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53149 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02200 }
53151 /* dsub.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
53154 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53155 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03200 }
53157 /* dsub.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
53160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53161 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03200 }
53163 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
53166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53167 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20200 }
53169 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53172 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53173 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22200 }
53175 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53178 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53179 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23200 }
53181 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
53184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53185 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23200 }
53187 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
53190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53191 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40200 }
53193 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53196 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53197 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42200 }
53199 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53202 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53203 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43200 }
53205 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
53208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53209 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43200 }
53211 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
53214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53215 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60200 }
53217 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53220 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53221 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62200 }
53223 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53226 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53227 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63200 }
53229 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
53232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53233 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63200 }
53235 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
53238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53239 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28200 }
53241 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
53244 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53245 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a200 }
53247 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
53250 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53251 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b200 }
53253 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
53256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53257 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b200 }
53259 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
53262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53263 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48200 }
53265 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
53268 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53269 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a200 }
53271 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
53274 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53275 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b200 }
53277 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
53280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53281 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b200 }
53283 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
53286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53287 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c200 }
53289 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
53292 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53293 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e200 }
53295 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
53298 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53299 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f200 }
53301 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
53304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53305 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f200 }
53307 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
53310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53311 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c200 }
53313 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
53316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53317 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e200 }
53319 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
53322 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53323 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f200 }
53325 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
53328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53329 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f200 }
53331 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
53334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
53335 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c200 }
53337 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
53340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53341 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e200 }
53343 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
53346 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53347 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f200 }
53349 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
53352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
53353 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f200 }
53355 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
53358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
53359 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68200 }
53361 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
53364 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53365 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a200 }
53367 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
53370 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53371 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b200 }
53373 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
53376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
53377 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b200 }
53379 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53383 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80200 }
53385 /* dsub.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
53388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53389 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82200 }
53391 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53395 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08200 }
53397 /* dsub.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
53400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53401 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a200 }
53403 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53407 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00200 }
53409 /* dsub.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
53412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53413 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02200 }
53415 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
53418 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53419 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20200 }
53421 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
53424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53425 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22200 }
53427 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
53430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53431 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40200 }
53433 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
53436 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53437 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42200 }
53439 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
53442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53443 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60200 }
53445 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
53448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53449 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62200 }
53451 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
53454 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53455 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28200 }
53457 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
53460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53461 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a200 }
53463 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
53466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53467 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48200 }
53469 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
53472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53473 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a200 }
53475 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
53478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53479 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c200 }
53481 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
53484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53485 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e200 }
53487 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
53490 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53491 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c200 }
53493 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
53496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53497 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e200 }
53499 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
53502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
53503 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c200 }
53505 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
53508 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
53509 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e200 }
53511 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
53514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
53515 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68200 }
53517 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
53520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
53521 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a200 }
53523 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
53526 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53527 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c802 }
53529 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
53532 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53533 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18822 }
53535 /* dsub.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
53538 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53539 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18802 }
53541 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
53544 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53545 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c082 }
53547 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
53550 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53551 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a2 }
53553 /* dsub.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
53556 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53557 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18082 }
53559 /* dsub.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
53562 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53563 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c002 }
53565 /* dsub.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
53568 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53569 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18022 }
53571 /* dsub.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
53574 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53575 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18002 }
53577 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53580 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53581 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20200 }
53583 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53586 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53587 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822200 }
53589 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
53592 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53593 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820200 }
53595 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53598 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53599 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40200 }
53601 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53604 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53605 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842200 }
53607 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
53610 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53611 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840200 }
53613 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53616 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53617 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60200 }
53619 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53622 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53623 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862200 }
53625 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
53628 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53629 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860200 }
53631 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
53634 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53635 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28200 }
53637 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
53640 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53641 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a200 }
53643 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
53646 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53647 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828200 }
53649 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
53652 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53653 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48200 }
53655 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
53658 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53659 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a200 }
53661 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
53664 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53665 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848200 }
53667 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
53670 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53671 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c200 }
53673 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
53676 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53677 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e200 }
53679 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
53682 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53683 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c200 }
53685 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
53688 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53689 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c200 }
53691 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
53694 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53695 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e200 }
53697 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
53700 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53701 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c200 }
53703 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
53706 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53707 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c200 }
53709 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
53712 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53713 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e200 }
53715 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
53718 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
53719 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c200 }
53721 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
53724 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53725 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68200 }
53727 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
53730 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53731 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a200 }
53733 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
53736 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
53737 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868200 }
53739 /* dsub.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
53742 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
53743 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1991e00 }
53745 /* dsub.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
53748 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
53749 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1919e00 }
53751 /* dsub.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
53754 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53755 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1911e00 }
53757 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53760 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53761 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1931e00 }
53763 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
53766 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53767 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1939e00 }
53769 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
53772 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53773 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193de00 }
53775 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53778 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53779 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1951e00 }
53781 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
53784 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53785 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1959e00 }
53787 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
53790 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53791 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195de00 }
53793 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16} */
53796 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
53797 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197de00 }
53799 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53802 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53803 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1971e00 }
53805 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24} */
53808 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
53809 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1979e00 }
53811 /* dsub.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
53814 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53815 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1981e00 }
53817 /* dsub.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
53820 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53821 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1909e00 }
53823 /* dsub.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
53826 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53827 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1901e00 }
53829 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53832 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53833 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1921e00 }
53835 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
53838 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53839 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1929e00 }
53841 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
53844 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53845 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192de00 }
53847 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53850 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53851 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1941e00 }
53853 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
53856 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53857 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1949e00 }
53859 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
53862 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53863 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194de00 }
53865 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16} */
53868 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
53869 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196de00 }
53871 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53874 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53875 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1961e00 }
53877 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24} */
53880 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
53881 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1969e00 }
53883 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
53886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53887 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990a00 }
53889 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
53892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53893 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992a00 }
53895 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
53898 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53899 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993a00 }
53901 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
53904 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53905 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918a00 }
53907 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
53910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53911 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191aa00 }
53913 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
53916 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53917 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ba00 }
53919 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53923 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910a00 }
53925 /* dsbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
53928 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53929 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912a00 }
53931 /* dsbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
53934 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53935 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913a00 }
53937 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
53940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53941 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930a00 }
53943 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53947 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932a00 }
53949 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53952 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53953 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933a00 }
53955 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
53958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53959 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950a00 }
53961 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53964 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53965 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952a00 }
53967 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53970 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53971 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953a00 }
53973 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
53976 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53977 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970a00 }
53979 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53982 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53983 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972a00 }
53985 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53988 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53989 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973a00 }
53991 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
53994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
53995 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938a00 }
53997 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
54000 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54001 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193aa00 }
54003 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54006 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54007 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ba00 }
54009 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54013 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958a00 }
54015 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54018 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54019 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195aa00 }
54021 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54024 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54025 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ba00 }
54027 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54031 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ca00 }
54033 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54036 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54037 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ea00 }
54039 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54042 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54043 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fa00 }
54045 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54048 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54049 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ca00 }
54051 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54055 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ea00 }
54057 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54060 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54061 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fa00 }
54063 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54067 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ca00 }
54069 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54073 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ea00 }
54075 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54078 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54079 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fa00 }
54081 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54084 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54085 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978a00 }
54087 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54091 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197aa00 }
54093 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54096 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54097 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ba00 }
54099 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54102 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54103 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90a00 }
54105 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
54108 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54109 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92a00 }
54111 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
54114 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54115 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93a00 }
54117 /* dsbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
54120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54121 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93a00 }
54123 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54127 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18a00 }
54129 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
54132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54133 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1aa00 }
54135 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
54138 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54139 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ba00 }
54141 /* dsbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
54144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54145 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ba00 }
54147 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54151 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10a00 }
54153 /* dsbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
54156 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54157 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12a00 }
54159 /* dsbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
54162 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54163 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13a00 }
54165 /* dsbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
54168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54169 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13a00 }
54171 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
54174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54175 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30a00 }
54177 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54180 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54181 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32a00 }
54183 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54186 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54187 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33a00 }
54189 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
54192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54193 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33a00 }
54195 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
54198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54199 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50a00 }
54201 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54205 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52a00 }
54207 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54210 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54211 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53a00 }
54213 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
54216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54217 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53a00 }
54219 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
54222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54223 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70a00 }
54225 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54228 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54229 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72a00 }
54231 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54234 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54235 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73a00 }
54237 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
54240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54241 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73a00 }
54243 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
54246 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54247 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38a00 }
54249 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
54252 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54253 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3aa00 }
54255 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
54258 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54259 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ba00 }
54261 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
54264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54265 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3ba00 }
54267 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
54270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54271 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58a00 }
54273 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
54276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54277 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5aa00 }
54279 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
54282 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54283 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ba00 }
54285 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
54288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54289 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5ba00 }
54291 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
54294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54295 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ca00 }
54297 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
54300 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54301 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ea00 }
54303 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
54306 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54307 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fa00 }
54309 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
54312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54313 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fa00 }
54315 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
54318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54319 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ca00 }
54321 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
54324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54325 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ea00 }
54327 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
54330 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54331 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fa00 }
54333 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
54336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54337 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fa00 }
54339 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
54342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
54343 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ca00 }
54345 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
54348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54349 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ea00 }
54351 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
54354 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54355 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fa00 }
54357 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
54360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
54361 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fa00 }
54363 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
54366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
54367 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78a00 }
54369 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
54372 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54373 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7aa00 }
54375 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
54378 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54379 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ba00 }
54381 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
54384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
54385 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7ba00 }
54387 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54390 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54391 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90a00 }
54393 /* dsbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
54396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54397 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92a00 }
54399 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54403 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18a00 }
54405 /* dsbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
54408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54409 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1aa00 }
54411 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54415 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10a00 }
54417 /* dsbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
54420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54421 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12a00 }
54423 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
54426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54427 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30a00 }
54429 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
54432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54433 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32a00 }
54435 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
54438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54439 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50a00 }
54441 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
54444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54445 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52a00 }
54447 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
54450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54451 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70a00 }
54453 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
54456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54457 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72a00 }
54459 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
54462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54463 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38a00 }
54465 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
54468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54469 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3aa00 }
54471 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
54474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54475 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58a00 }
54477 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
54480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54481 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5aa00 }
54483 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
54486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54487 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ca00 }
54489 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
54492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54493 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ea00 }
54495 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
54498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54499 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ca00 }
54501 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
54504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54505 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ea00 }
54507 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
54510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
54511 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ca00 }
54513 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
54516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
54517 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ea00 }
54519 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
54522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
54523 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78a00 }
54525 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
54528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
54529 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7aa00 }
54531 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
54534 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54535 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90a }
54537 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
54540 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54541 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892a }
54543 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
54546 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54547 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890a }
54549 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
54552 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54553 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18a }
54555 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
54558 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54559 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181aa }
54561 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
54564 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54565 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818a }
54567 /* dsbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
54570 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54571 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10a }
54573 /* dsbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
54576 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54577 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812a }
54579 /* dsbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
54582 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54583 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810a }
54585 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54588 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54589 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30a00 }
54591 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54594 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54595 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832a00 }
54597 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
54600 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54601 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830a00 }
54603 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54606 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54607 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50a00 }
54609 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54612 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54613 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852a00 }
54615 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
54618 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54619 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850a00 }
54621 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54624 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54625 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70a00 }
54627 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54630 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54631 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872a00 }
54633 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
54636 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54637 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870a00 }
54639 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
54642 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54643 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38a00 }
54645 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
54648 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54649 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183aa00 }
54651 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
54654 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54655 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838a00 }
54657 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
54660 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54661 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58a00 }
54663 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
54666 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54667 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185aa00 }
54669 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
54672 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54673 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858a00 }
54675 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
54678 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54679 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3ca00 }
54681 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
54684 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54685 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ea00 }
54687 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
54690 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54691 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ca00 }
54693 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
54696 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54697 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5ca00 }
54699 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
54702 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54703 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ea00 }
54705 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
54708 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54709 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ca00 }
54711 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
54714 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54715 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7ca00 }
54717 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
54720 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54721 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ea00 }
54723 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
54726 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
54727 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ca00 }
54729 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
54732 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54733 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78a00 }
54735 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
54738 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54739 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187aa00 }
54741 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
54744 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
54745 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878a00 }
54747 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54751 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980a00 }
54753 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
54756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54757 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982a00 }
54759 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
54762 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54763 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983a00 }
54765 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54768 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54769 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908a00 }
54771 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
54774 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54775 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190aa00 }
54777 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
54780 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54781 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ba00 }
54783 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54786 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54787 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900a00 }
54789 /* dsbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
54792 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54793 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902a00 }
54795 /* dsbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
54798 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54799 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903a00 }
54801 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
54804 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54805 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920a00 }
54807 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54810 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54811 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922a00 }
54813 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54816 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54817 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923a00 }
54819 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
54822 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54823 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940a00 }
54825 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54828 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54829 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942a00 }
54831 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54834 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54835 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943a00 }
54837 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
54840 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54841 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960a00 }
54843 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54846 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54847 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962a00 }
54849 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54852 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54853 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963a00 }
54855 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
54858 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54859 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928a00 }
54861 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
54864 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54865 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192aa00 }
54867 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54870 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54871 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ba00 }
54873 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54876 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54877 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948a00 }
54879 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54882 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54883 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194aa00 }
54885 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54888 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54889 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ba00 }
54891 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54894 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54895 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ca00 }
54897 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54900 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54901 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ea00 }
54903 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54906 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54907 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fa00 }
54909 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54912 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54913 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ca00 }
54915 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54918 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54919 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ea00 }
54921 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54924 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54925 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fa00 }
54927 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54930 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54931 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ca00 }
54933 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54936 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54937 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ea00 }
54939 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54942 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54943 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fa00 }
54945 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54948 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54949 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968a00 }
54951 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54955 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196aa00 }
54957 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54960 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54961 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ba00 }
54963 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54966 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54967 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80a00 }
54969 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
54972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54973 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82a00 }
54975 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
54978 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54979 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83a00 }
54981 /* dsbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
54984 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
54985 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83a00 }
54987 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54991 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08a00 }
54993 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
54996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54997 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0aa00 }
54999 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
55002 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55003 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ba00 }
55005 /* dsbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
55008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55009 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ba00 }
55011 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55015 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00a00 }
55017 /* dsbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
55020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55021 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02a00 }
55023 /* dsbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
55026 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55027 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03a00 }
55029 /* dsbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
55032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55033 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03a00 }
55035 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
55038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55039 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20a00 }
55041 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55045 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22a00 }
55047 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55050 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55051 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23a00 }
55053 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
55056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55057 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23a00 }
55059 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
55062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55063 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40a00 }
55065 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55069 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42a00 }
55071 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55074 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55075 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43a00 }
55077 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
55080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55081 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43a00 }
55083 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
55086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55087 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60a00 }
55089 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55092 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55093 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62a00 }
55095 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55098 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55099 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63a00 }
55101 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
55104 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55105 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63a00 }
55107 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
55110 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55111 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28a00 }
55113 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
55116 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55117 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2aa00 }
55119 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
55122 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55123 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ba00 }
55125 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
55128 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55129 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2ba00 }
55131 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
55134 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55135 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48a00 }
55137 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
55140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55141 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4aa00 }
55143 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
55146 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55147 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ba00 }
55149 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
55152 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55153 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4ba00 }
55155 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
55158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55159 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ca00 }
55161 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
55164 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55165 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ea00 }
55167 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
55170 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55171 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fa00 }
55173 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
55176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55177 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fa00 }
55179 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
55182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55183 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ca00 }
55185 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
55188 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55189 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ea00 }
55191 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
55194 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55195 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fa00 }
55197 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
55200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55201 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fa00 }
55203 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
55206 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
55207 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ca00 }
55209 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
55212 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55213 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ea00 }
55215 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
55218 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55219 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fa00 }
55221 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
55224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
55225 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fa00 }
55227 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
55230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
55231 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68a00 }
55233 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
55236 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55237 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6aa00 }
55239 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
55242 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55243 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ba00 }
55245 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
55248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
55249 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6ba00 }
55251 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
55254 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55255 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80a00 }
55257 /* dsbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
55260 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55261 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82a00 }
55263 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
55266 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55267 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08a00 }
55269 /* dsbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
55272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55273 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0aa00 }
55275 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55279 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00a00 }
55281 /* dsbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
55284 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55285 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02a00 }
55287 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
55290 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55291 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20a00 }
55293 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
55296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55297 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22a00 }
55299 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
55302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55303 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40a00 }
55305 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
55308 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55309 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42a00 }
55311 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
55314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55315 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60a00 }
55317 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
55320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55321 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62a00 }
55323 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
55326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55327 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28a00 }
55329 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
55332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55333 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2aa00 }
55335 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
55338 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55339 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48a00 }
55341 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
55344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55345 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4aa00 }
55347 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
55350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55351 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ca00 }
55353 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
55356 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55357 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ea00 }
55359 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
55362 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55363 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ca00 }
55365 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
55368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55369 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ea00 }
55371 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
55374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
55375 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ca00 }
55377 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
55380 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
55381 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ea00 }
55383 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
55386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
55387 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68a00 }
55389 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
55392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
55393 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6aa00 }
55395 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
55398 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55399 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80a }
55401 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
55404 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55405 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882a }
55407 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
55410 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55411 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880a }
55413 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
55416 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55417 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08a }
55419 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
55422 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55423 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180aa }
55425 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
55428 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55429 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808a }
55431 /* dsbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
55434 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55435 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00a }
55437 /* dsbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
55440 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55441 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802a }
55443 /* dsbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
55446 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55447 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800a }
55449 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55452 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55453 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20a00 }
55455 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55458 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55459 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822a00 }
55461 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
55464 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55465 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820a00 }
55467 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55470 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55471 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40a00 }
55473 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55476 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55477 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842a00 }
55479 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
55482 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55483 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840a00 }
55485 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55488 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55489 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60a00 }
55491 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55494 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55495 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862a00 }
55497 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
55500 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55501 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860a00 }
55503 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
55506 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55507 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28a00 }
55509 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
55512 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55513 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182aa00 }
55515 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
55518 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55519 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828a00 }
55521 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
55524 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55525 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48a00 }
55527 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
55530 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55531 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184aa00 }
55533 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
55536 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55537 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848a00 }
55539 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
55542 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55543 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2ca00 }
55545 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
55548 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55549 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ea00 }
55551 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
55554 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55555 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ca00 }
55557 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
55560 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55561 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4ca00 }
55563 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
55566 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55567 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ea00 }
55569 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
55572 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55573 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ca00 }
55575 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
55578 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55579 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6ca00 }
55581 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
55584 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55585 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ea00 }
55587 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
55590 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
55591 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ca00 }
55593 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
55596 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55597 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68a00 }
55599 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
55602 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55603 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186aa00 }
55605 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
55608 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
55609 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868a00 }
55611 /* dsbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
55614 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
55615 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1990e00 }
55617 /* dsbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
55620 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
55621 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1918e00 }
55623 /* dsbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
55626 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55627 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1910e00 }
55629 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55632 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55633 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1930e00 }
55635 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
55638 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55639 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1938e00 }
55641 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
55644 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55645 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ce00 }
55647 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55650 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55651 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1950e00 }
55653 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
55656 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55657 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1958e00 }
55659 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
55662 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55663 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ce00 }
55665 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
55668 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
55669 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ce00 }
55671 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55674 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55675 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1970e00 }
55677 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
55680 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
55681 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1978e00 }
55683 /* dsbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
55686 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55687 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1980e00 }
55689 /* dsbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
55692 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55693 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1908e00 }
55695 /* dsbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
55698 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55699 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1900e00 }
55701 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55704 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55705 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1920e00 }
55707 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
55710 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55711 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1928e00 }
55713 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
55716 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55717 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ce00 }
55719 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55722 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55723 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1940e00 }
55725 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
55728 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55729 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1948e00 }
55731 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
55734 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55735 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ce00 }
55737 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
55740 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
55741 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ce00 }
55743 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55746 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55747 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1960e00 }
55749 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
55752 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
55753 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1968e00 }
55755 /* divx.l $Dst32RnPrefixedSI */
55758 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55759 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a92f }
55761 /* divx.l $Dst32AnPrefixedSI */
55764 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55765 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a1af }
55767 /* divx.l [$Dst32AnPrefixed] */
55770 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55771 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a12f }
55773 /* divx.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55776 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55777 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a32f00 }
55779 /* divx.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55782 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55783 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a52f00 }
55785 /* divx.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55788 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55789 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a72f00 }
55791 /* divx.l ${Dsp-24-u8}[sb] */
55794 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55795 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a3af00 }
55797 /* divx.l ${Dsp-24-u16}[sb] */
55800 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55801 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a5af00 }
55803 /* divx.l ${Dsp-24-s8}[fb] */
55806 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55807 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3ef00 }
55809 /* divx.l ${Dsp-24-s16}[fb] */
55812 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55813 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5ef00 }
55815 /* divx.l ${Dsp-24-u16} */
55818 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55819 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7ef00 }
55821 /* divx.l ${Dsp-24-u24} */
55824 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55825 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a7af00 }
55827 /* divu.l $Dst32RnPrefixedSI */
55830 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55831 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a90f }
55833 /* divu.l $Dst32AnPrefixedSI */
55836 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55837 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a18f }
55839 /* divu.l [$Dst32AnPrefixed] */
55842 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55843 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a10f }
55845 /* divu.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55848 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55849 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a30f00 }
55851 /* divu.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55854 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55855 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a50f00 }
55857 /* divu.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55860 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55861 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a70f00 }
55863 /* divu.l ${Dsp-24-u8}[sb] */
55866 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55867 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a38f00 }
55869 /* divu.l ${Dsp-24-u16}[sb] */
55872 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55873 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a58f00 }
55875 /* divu.l ${Dsp-24-s8}[fb] */
55878 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55879 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3cf00 }
55881 /* divu.l ${Dsp-24-s16}[fb] */
55884 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55885 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5cf00 }
55887 /* divu.l ${Dsp-24-u16} */
55890 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55891 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7cf00 }
55893 /* divu.l ${Dsp-24-u24} */
55896 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55897 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a78f00 }
55899 /* div.l $Dst32RnPrefixedSI */
55902 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55903 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a91f }
55905 /* div.l $Dst32AnPrefixedSI */
55908 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55909 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a19f }
55911 /* div.l [$Dst32AnPrefixed] */
55914 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55915 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a11f }
55917 /* div.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55920 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55921 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a31f00 }
55923 /* div.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55926 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55927 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a51f00 }
55929 /* div.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55932 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55933 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a71f00 }
55935 /* div.l ${Dsp-24-u8}[sb] */
55938 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55939 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a39f00 }
55941 /* div.l ${Dsp-24-u16}[sb] */
55944 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55945 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a59f00 }
55947 /* div.l ${Dsp-24-s8}[fb] */
55950 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55951 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3df00 }
55953 /* div.l ${Dsp-24-s16}[fb] */
55956 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55957 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5df00 }
55959 /* div.l ${Dsp-24-u16} */
55962 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55963 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7df00 }
55965 /* div.l ${Dsp-24-u24} */
55968 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55969 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a79f00 }
55971 /* divx.w $Dst32RnUnprefixedHI */
55974 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
55975 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x991e }
55977 /* divx.w $Dst32AnUnprefixedHI */
55980 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
55981 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919e }
55983 /* divx.w [$Dst32AnUnprefixed] */
55986 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55987 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x911e }
55989 /* divx.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
55992 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55993 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931e00 }
55995 /* divx.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
55998 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55999 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951e0000 }
56001 /* divx.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56004 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56005 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971e0000 }
56007 /* divx.w ${Dsp-16-u8}[sb] */
56010 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56011 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939e00 }
56013 /* divx.w ${Dsp-16-u16}[sb] */
56016 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56017 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959e0000 }
56019 /* divx.w ${Dsp-16-s8}[fb] */
56022 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56023 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93de00 }
56025 /* divx.w ${Dsp-16-s16}[fb] */
56028 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56029 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95de0000 }
56031 /* divx.w ${Dsp-16-u16} */
56034 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56035 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x97de0000 }
56037 /* divx.w ${Dsp-16-u24} */
56040 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56041 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x979e0000 }
56043 /* divx.b $Dst32RnUnprefixedQI */
56046 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56047 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x981e }
56049 /* divx.b $Dst32AnUnprefixedQI */
56052 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56053 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x909e }
56055 /* divx.b [$Dst32AnUnprefixed] */
56058 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56059 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x901e }
56061 /* divx.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56064 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56065 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921e00 }
56067 /* divx.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56070 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56071 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941e0000 }
56073 /* divx.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56076 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56077 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961e0000 }
56079 /* divx.b ${Dsp-16-u8}[sb] */
56082 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56083 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929e00 }
56085 /* divx.b ${Dsp-16-u16}[sb] */
56088 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56089 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949e0000 }
56091 /* divx.b ${Dsp-16-s8}[fb] */
56094 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56095 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92de00 }
56097 /* divx.b ${Dsp-16-s16}[fb] */
56100 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56101 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94de0000 }
56103 /* divx.b ${Dsp-16-u16} */
56106 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56107 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96de0000 }
56109 /* divx.b ${Dsp-16-u24} */
56112 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56113 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x969e0000 }
56115 /* divx.w $Dst16RnHI */
56118 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56119 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7790 }
56121 /* divx.w $Dst16AnHI */
56124 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56125 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7794 }
56127 /* divx.w [$Dst16An] */
56130 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56131 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7796 }
56133 /* divx.w ${Dsp-16-u8}[$Dst16An] */
56136 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56137 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x779800 }
56139 /* divx.w ${Dsp-16-u16}[$Dst16An] */
56142 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56143 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x779c0000 }
56145 /* divx.w ${Dsp-16-u8}[sb] */
56148 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56149 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x779a00 }
56151 /* divx.w ${Dsp-16-u16}[sb] */
56154 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56155 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x779e0000 }
56157 /* divx.w ${Dsp-16-s8}[fb] */
56160 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56161 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x779b00 }
56163 /* divx.w ${Dsp-16-u16} */
56166 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56167 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x779f0000 }
56169 /* divx.b $Dst16RnQI */
56172 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56173 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7690 }
56175 /* divx.b $Dst16AnQI */
56178 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56179 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7694 }
56181 /* divx.b [$Dst16An] */
56184 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56185 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7696 }
56187 /* divx.b ${Dsp-16-u8}[$Dst16An] */
56190 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56191 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x769800 }
56193 /* divx.b ${Dsp-16-u16}[$Dst16An] */
56196 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56197 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x769c0000 }
56199 /* divx.b ${Dsp-16-u8}[sb] */
56202 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56203 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x769a00 }
56205 /* divx.b ${Dsp-16-u16}[sb] */
56208 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56209 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x769e0000 }
56211 /* divx.b ${Dsp-16-s8}[fb] */
56214 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56215 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x769b00 }
56217 /* divx.b ${Dsp-16-u16} */
56220 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56221 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x769f0000 }
56223 /* divu.w $Dst32RnUnprefixedHI */
56226 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56227 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x890e }
56229 /* divu.w $Dst32AnUnprefixedHI */
56232 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56233 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818e }
56235 /* divu.w [$Dst32AnUnprefixed] */
56238 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56239 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x810e }
56241 /* divu.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56244 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56245 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830e00 }
56247 /* divu.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56250 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56251 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850e0000 }
56253 /* divu.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56256 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56257 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870e0000 }
56259 /* divu.w ${Dsp-16-u8}[sb] */
56262 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56263 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838e00 }
56265 /* divu.w ${Dsp-16-u16}[sb] */
56268 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56269 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858e0000 }
56271 /* divu.w ${Dsp-16-s8}[fb] */
56274 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56275 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ce00 }
56277 /* divu.w ${Dsp-16-s16}[fb] */
56280 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56281 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ce0000 }
56283 /* divu.w ${Dsp-16-u16} */
56286 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56287 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ce0000 }
56289 /* divu.w ${Dsp-16-u24} */
56292 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56293 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x878e0000 }
56295 /* divu.b $Dst32RnUnprefixedQI */
56298 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56299 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x880e }
56301 /* divu.b $Dst32AnUnprefixedQI */
56304 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56305 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x808e }
56307 /* divu.b [$Dst32AnUnprefixed] */
56310 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56311 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x800e }
56313 /* divu.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56316 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56317 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820e00 }
56319 /* divu.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56322 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56323 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840e0000 }
56325 /* divu.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56328 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56329 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860e0000 }
56331 /* divu.b ${Dsp-16-u8}[sb] */
56334 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56335 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828e00 }
56337 /* divu.b ${Dsp-16-u16}[sb] */
56340 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56341 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848e0000 }
56343 /* divu.b ${Dsp-16-s8}[fb] */
56346 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56347 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ce00 }
56349 /* divu.b ${Dsp-16-s16}[fb] */
56352 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56353 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ce0000 }
56355 /* divu.b ${Dsp-16-u16} */
56358 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56359 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ce0000 }
56361 /* divu.b ${Dsp-16-u24} */
56364 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56365 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x868e0000 }
56367 /* divu.w $Dst16RnHI */
56370 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56371 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77c0 }
56373 /* divu.w $Dst16AnHI */
56376 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56377 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77c4 }
56379 /* divu.w [$Dst16An] */
56382 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56383 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77c6 }
56385 /* divu.w ${Dsp-16-u8}[$Dst16An] */
56388 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56389 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77c800 }
56391 /* divu.w ${Dsp-16-u16}[$Dst16An] */
56394 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56395 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77cc0000 }
56397 /* divu.w ${Dsp-16-u8}[sb] */
56400 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56401 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ca00 }
56403 /* divu.w ${Dsp-16-u16}[sb] */
56406 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56407 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ce0000 }
56409 /* divu.w ${Dsp-16-s8}[fb] */
56412 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56413 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77cb00 }
56415 /* divu.w ${Dsp-16-u16} */
56418 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56419 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77cf0000 }
56421 /* divu.b $Dst16RnQI */
56424 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56425 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76c0 }
56427 /* divu.b $Dst16AnQI */
56430 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56431 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76c4 }
56433 /* divu.b [$Dst16An] */
56436 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56437 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76c6 }
56439 /* divu.b ${Dsp-16-u8}[$Dst16An] */
56442 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56443 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76c800 }
56445 /* divu.b ${Dsp-16-u16}[$Dst16An] */
56448 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56449 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76cc0000 }
56451 /* divu.b ${Dsp-16-u8}[sb] */
56454 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56455 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ca00 }
56457 /* divu.b ${Dsp-16-u16}[sb] */
56460 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56461 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ce0000 }
56463 /* divu.b ${Dsp-16-s8}[fb] */
56466 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56467 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76cb00 }
56469 /* divu.b ${Dsp-16-u16} */
56472 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56473 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76cf0000 }
56475 /* div.w $Dst32RnUnprefixedHI */
56478 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56479 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x891e }
56481 /* div.w $Dst32AnUnprefixedHI */
56484 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56485 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819e }
56487 /* div.w [$Dst32AnUnprefixed] */
56490 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56491 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x811e }
56493 /* div.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56496 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56497 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831e00 }
56499 /* div.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56502 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56503 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851e0000 }
56505 /* div.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56508 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56509 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871e0000 }
56511 /* div.w ${Dsp-16-u8}[sb] */
56514 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56515 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839e00 }
56517 /* div.w ${Dsp-16-u16}[sb] */
56520 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56521 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859e0000 }
56523 /* div.w ${Dsp-16-s8}[fb] */
56526 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56527 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83de00 }
56529 /* div.w ${Dsp-16-s16}[fb] */
56532 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56533 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85de0000 }
56535 /* div.w ${Dsp-16-u16} */
56538 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56539 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87de0000 }
56541 /* div.w ${Dsp-16-u24} */
56544 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56545 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x879e0000 }
56547 /* div.b $Dst32RnUnprefixedQI */
56550 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56551 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x881e }
56553 /* div.b $Dst32AnUnprefixedQI */
56556 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56557 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x809e }
56559 /* div.b [$Dst32AnUnprefixed] */
56562 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56563 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x801e }
56565 /* div.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56568 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56569 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821e00 }
56571 /* div.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56574 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56575 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841e0000 }
56577 /* div.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56580 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56581 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861e0000 }
56583 /* div.b ${Dsp-16-u8}[sb] */
56586 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56587 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829e00 }
56589 /* div.b ${Dsp-16-u16}[sb] */
56592 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56593 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849e0000 }
56595 /* div.b ${Dsp-16-s8}[fb] */
56598 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56599 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82de00 }
56601 /* div.b ${Dsp-16-s16}[fb] */
56604 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56605 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84de0000 }
56607 /* div.b ${Dsp-16-u16} */
56610 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56611 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86de0000 }
56613 /* div.b ${Dsp-16-u24} */
56616 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56617 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x869e0000 }
56619 /* div.w $Dst16RnHI */
56622 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56623 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77d0 }
56625 /* div.w $Dst16AnHI */
56628 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56629 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77d4 }
56631 /* div.w [$Dst16An] */
56634 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56635 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77d6 }
56637 /* div.w ${Dsp-16-u8}[$Dst16An] */
56640 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56641 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77d800 }
56643 /* div.w ${Dsp-16-u16}[$Dst16An] */
56646 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56647 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77dc0000 }
56649 /* div.w ${Dsp-16-u8}[sb] */
56652 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56653 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77da00 }
56655 /* div.w ${Dsp-16-u16}[sb] */
56658 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56659 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77de0000 }
56661 /* div.w ${Dsp-16-s8}[fb] */
56664 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56665 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77db00 }
56667 /* div.w ${Dsp-16-u16} */
56670 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56671 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77df0000 }
56673 /* div.b $Dst16RnQI */
56676 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56677 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76d0 }
56679 /* div.b $Dst16AnQI */
56682 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56683 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76d4 }
56685 /* div.b [$Dst16An] */
56688 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56689 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76d6 }
56691 /* div.b ${Dsp-16-u8}[$Dst16An] */
56694 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56695 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76d800 }
56697 /* div.b ${Dsp-16-u16}[$Dst16An] */
56700 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56701 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76dc0000 }
56703 /* div.b ${Dsp-16-u8}[sb] */
56706 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56707 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76da00 }
56709 /* div.b ${Dsp-16-u16}[sb] */
56712 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56713 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76de0000 }
56715 /* div.b ${Dsp-16-s8}[fb] */
56718 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56719 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76db00 }
56721 /* div.b ${Dsp-16-u16} */
56724 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56725 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76df0000 }
56727 /* dec.w $Dst32RnUnprefixedHI */
56730 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56731 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb90e }
56733 /* dec.w $Dst32AnUnprefixedHI */
56736 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56737 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18e }
56739 /* dec.w [$Dst32AnUnprefixed] */
56742 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56743 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb10e }
56745 /* dec.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56748 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56749 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30e00 }
56751 /* dec.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56754 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56755 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50e0000 }
56757 /* dec.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56760 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56761 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70e0000 }
56763 /* dec.w ${Dsp-16-u8}[sb] */
56766 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56767 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38e00 }
56769 /* dec.w ${Dsp-16-u16}[sb] */
56772 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56773 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58e0000 }
56775 /* dec.w ${Dsp-16-s8}[fb] */
56778 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56779 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ce00 }
56781 /* dec.w ${Dsp-16-s16}[fb] */
56784 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56785 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ce0000 }
56787 /* dec.w ${Dsp-16-u16} */
56790 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56791 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ce0000 }
56793 /* dec.w ${Dsp-16-u24} */
56796 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56797 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78e0000 }
56799 /* dec.b $Dst32RnUnprefixedQI */
56802 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56803 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb80e }
56805 /* dec.b $Dst32AnUnprefixedQI */
56808 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56809 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb08e }
56811 /* dec.b [$Dst32AnUnprefixed] */
56814 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56815 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb00e }
56817 /* dec.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56820 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56821 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20e00 }
56823 /* dec.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56826 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56827 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40e0000 }
56829 /* dec.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56832 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56833 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60e0000 }
56835 /* dec.b ${Dsp-16-u8}[sb] */
56838 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56839 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28e00 }
56841 /* dec.b ${Dsp-16-u16}[sb] */
56844 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56845 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48e0000 }
56847 /* dec.b ${Dsp-16-s8}[fb] */
56850 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56851 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ce00 }
56853 /* dec.b ${Dsp-16-s16}[fb] */
56856 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56857 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ce0000 }
56859 /* dec.b ${Dsp-16-u16} */
56862 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56863 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ce0000 }
56865 /* dec.b ${Dsp-16-u24} */
56868 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56869 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68e0000 }
56874 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
56875 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xac }
56880 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
56881 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xab }
56883 /* dec.b ${Dsp-8-u8}[sb] */
56886 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
56887 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xad00 }
56889 /* dec.b ${Dsp-8-s8}[fb] */
56892 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
56893 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xae00 }
56895 /* dec.b ${Dsp-8-u16} */
56898 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
56899 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xaf0000 }
56901 /* cmpx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
56904 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
56905 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa81100 }
56907 /* cmpx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
56910 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
56911 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa09100 }
56913 /* cmpx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
56916 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56917 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa01100 }
56919 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
56922 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56923 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2110000 }
56925 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
56928 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56929 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2910000 }
56931 /* cmpx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
56934 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56935 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2d10000 }
56937 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
56940 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56941 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4110000 }
56943 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
56946 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56947 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4910000 }
56949 /* cmpx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
56952 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56953 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4d10000 }
56955 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16} */
56958 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
56959 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6d10000 }
56961 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
56964 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56965 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6110000 }
56967 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24} */
56970 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
56971 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6910000 }
56973 /* cmp.w${S} ${Dsp-8-u8}[sb],${Dst32R0HI-S} */
56976 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56977 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI
, { 0x6100 }
56979 /* cmp.w${S} ${Dsp-8-s8}[fb],${Dst32R0HI-S} */
56982 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56983 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI
, { 0x7100 }
56985 /* cmp.w${S} ${Dsp-8-u16},${Dst32R0HI-S} */
56988 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0HI_S
), 0 } },
56989 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI
, { 0x510000 }
56991 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst32R0QI-S} */
56994 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
56995 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI
, { 0x6000 }
56997 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst32R0QI-S} */
57000 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
57001 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI
, { 0x7000 }
57003 /* cmp.b${S} ${Dsp-8-u16},${Dst32R0QI-S} */
57006 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0QI_S
), 0 } },
57007 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI
, { 0x500000 }
57009 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
57012 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57013 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x67000000 }
57015 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
57018 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57019 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x77000000 }
57021 /* cmp.w${S} #${Imm-24-HI},${Dsp-8-u16} */
57024 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
57025 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x57000000 }
57027 /* cmp.w${S} #${Imm-8-HI},r0 */
57030 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
57031 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x470000 }
57033 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
57036 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57037 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x660000 }
57039 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
57042 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57043 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x760000 }
57045 /* cmp.b${S} #${Imm-24-QI},${Dsp-8-u16} */
57048 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
57049 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x56000000 }
57051 /* cmp.b${S} #${Imm-8-QI},r0l */
57054 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
57055 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4600 }
57057 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57061 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990100 }
57063 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
57066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57067 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992100 }
57069 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
57072 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57073 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993100 }
57075 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57079 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918100 }
57081 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
57084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57085 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a100 }
57087 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
57090 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57091 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b100 }
57093 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57097 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910100 }
57099 /* cmp.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57103 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912100 }
57105 /* cmp.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
57108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57109 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913100 }
57111 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57115 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93010000 }
57117 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57121 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93210000 }
57123 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57126 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57127 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93310000 }
57129 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57133 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95010000 }
57135 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57139 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95210000 }
57141 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57144 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57145 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95310000 }
57147 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57151 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97010000 }
57153 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57157 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97210000 }
57159 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57162 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57163 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97310000 }
57165 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
57168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57169 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93810000 }
57171 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
57174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57175 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a10000 }
57177 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
57180 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57181 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b10000 }
57183 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
57186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57187 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95810000 }
57189 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
57192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57193 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a10000 }
57195 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
57198 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57199 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b10000 }
57201 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
57204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57205 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c10000 }
57207 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
57210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57211 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e10000 }
57213 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
57216 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57217 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f10000 }
57219 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
57222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57223 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c10000 }
57225 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
57228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57229 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e10000 }
57231 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
57234 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57235 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f10000 }
57237 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
57240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
57241 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c10000 }
57243 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
57246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57247 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e10000 }
57249 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
57252 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57253 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f10000 }
57255 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
57258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
57259 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97810000 }
57261 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
57264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57265 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a10000 }
57267 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
57270 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57271 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b10000 }
57273 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57277 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9010000 }
57279 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
57282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57283 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9210000 }
57285 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
57288 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57289 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9310000 }
57291 /* cmp.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
57294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57295 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9310000 }
57297 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57301 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1810000 }
57303 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
57306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57307 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a10000 }
57309 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
57312 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57313 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b10000 }
57315 /* cmp.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
57318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57319 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b10000 }
57321 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57325 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1010000 }
57327 /* cmp.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
57330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57331 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1210000 }
57333 /* cmp.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
57336 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57337 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1310000 }
57339 /* cmp.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
57342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57343 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1310000 }
57345 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57349 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3010000 }
57351 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57355 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3210000 }
57357 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57360 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57361 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3310000 }
57363 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
57366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57367 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3310000 }
57369 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57373 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5010000 }
57375 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57379 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5210000 }
57381 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57384 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57385 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5310000 }
57387 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
57390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57391 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5310000 }
57393 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57397 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7010000 }
57399 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57403 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7210000 }
57405 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57408 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57409 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7310000 }
57411 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
57414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57415 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7310000 }
57417 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
57420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57421 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3810000 }
57423 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
57426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57427 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a10000 }
57429 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
57432 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57433 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b10000 }
57435 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
57438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57439 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b10000 }
57441 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
57444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57445 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5810000 }
57447 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
57450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57451 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a10000 }
57453 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
57456 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57457 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b10000 }
57459 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
57462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57463 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b10000 }
57465 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
57468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57469 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c10000 }
57471 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
57474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57475 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e10000 }
57477 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
57480 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57481 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f10000 }
57483 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
57486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57487 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f10000 }
57489 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
57492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57493 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c10000 }
57495 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
57498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57499 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e10000 }
57501 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
57504 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57505 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f10000 }
57507 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
57510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57511 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f10000 }
57513 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
57516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
57517 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c10000 }
57519 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
57522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57523 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e10000 }
57525 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
57528 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57529 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f10000 }
57531 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
57534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
57535 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f10000 }
57537 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
57540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
57541 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7810000 }
57543 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
57546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57547 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a10000 }
57549 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
57552 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57553 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b10000 }
57555 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
57558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
57559 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b10000 }
57561 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57565 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9010000 }
57567 /* cmp.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
57570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57571 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9210000 }
57573 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57577 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1810000 }
57579 /* cmp.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
57582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57583 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a10000 }
57585 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57589 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1010000 }
57591 /* cmp.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
57594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57595 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1210000 }
57597 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
57600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57601 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3010000 }
57603 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
57606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57607 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3210000 }
57609 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
57612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57613 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5010000 }
57615 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
57618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57619 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5210000 }
57621 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
57624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57625 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7010000 }
57627 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
57630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57631 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7210000 }
57633 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
57636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57637 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3810000 }
57639 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
57642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57643 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a10000 }
57645 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
57648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57649 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5810000 }
57651 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
57654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57655 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a10000 }
57657 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
57660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57661 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c10000 }
57663 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
57666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57667 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e10000 }
57669 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
57672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57673 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c10000 }
57675 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
57678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57679 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e10000 }
57681 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
57684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
57685 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c10000 }
57687 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
57690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
57691 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e10000 }
57693 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
57696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
57697 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7810000 }
57699 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
57702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
57703 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a10000 }
57705 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
57708 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57709 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc901 }
57711 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
57714 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57715 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8921 }
57717 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57720 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57721 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8901 }
57723 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
57726 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57727 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc181 }
57729 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
57732 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57733 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a1 }
57735 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57738 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57739 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8181 }
57741 /* cmp.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
57744 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57745 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc101 }
57747 /* cmp.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
57750 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57751 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8121 }
57753 /* cmp.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57756 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57757 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8101 }
57759 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57762 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57763 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30100 }
57765 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57768 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57769 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832100 }
57771 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
57774 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57775 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830100 }
57777 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57780 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57781 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5010000 }
57783 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57786 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57787 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85210000 }
57789 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
57792 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57793 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85010000 }
57795 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57798 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57799 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7010000 }
57801 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57804 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57805 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87210000 }
57807 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
57810 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57811 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87010000 }
57813 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
57816 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57817 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38100 }
57819 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
57822 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57823 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a100 }
57825 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
57828 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57829 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838100 }
57831 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
57834 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57835 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5810000 }
57837 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
57840 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57841 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a10000 }
57843 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
57846 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57847 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85810000 }
57849 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
57852 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57853 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c100 }
57855 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
57858 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57859 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e100 }
57861 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
57864 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57865 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c100 }
57867 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
57870 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57871 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c10000 }
57873 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
57876 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57877 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e10000 }
57879 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
57882 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57883 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c10000 }
57885 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
57888 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57889 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c10000 }
57891 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
57894 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57895 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e10000 }
57897 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
57900 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
57901 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c10000 }
57903 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
57906 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57907 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7810000 }
57909 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
57912 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57913 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a10000 }
57915 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
57918 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
57919 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87810000 }
57921 /* cmp.b${S} ${SrcDst16-r0l-r0h-S-normal} */
57924 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
57925 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x38 }
57927 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
57930 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57931 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x3900 }
57933 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
57936 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57937 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x3a00 }
57939 /* cmp.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
57942 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
57943 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x3b0000 }
57945 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
57948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57949 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990600 }
57951 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
57954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57955 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992600 }
57957 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
57960 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57961 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993600 }
57963 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
57966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57967 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918600 }
57969 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
57972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57973 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a600 }
57975 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
57978 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57979 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b600 }
57981 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57985 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910600 }
57987 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57991 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912600 }
57993 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
57996 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57997 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913600 }
57999 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58003 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93060000 }
58005 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58009 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93260000 }
58011 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58014 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58015 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93360000 }
58017 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58021 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95060000 }
58023 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58027 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95260000 }
58029 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58032 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58033 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95360000 }
58035 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58039 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97060000 }
58041 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58045 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97260000 }
58047 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58050 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58051 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97360000 }
58053 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58057 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93860000 }
58059 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58063 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a60000 }
58065 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58068 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58069 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b60000 }
58071 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58075 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95860000 }
58077 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58081 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a60000 }
58083 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58086 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58087 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b60000 }
58089 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58093 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c60000 }
58095 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58099 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e60000 }
58101 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58104 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58105 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f60000 }
58107 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58111 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c60000 }
58113 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58117 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e60000 }
58119 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58122 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58123 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f60000 }
58125 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
58128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
58129 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c60000 }
58131 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
58134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58135 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e60000 }
58137 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
58140 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58141 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f60000 }
58143 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
58146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
58147 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97860000 }
58149 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
58152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58153 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a60000 }
58155 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
58158 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58159 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b60000 }
58161 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58165 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9060000 }
58167 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
58170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58171 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9260000 }
58173 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
58176 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58177 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9360000 }
58179 /* cmp.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
58182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58183 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9360000 }
58185 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58189 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1860000 }
58191 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
58194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58195 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a60000 }
58197 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
58200 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58201 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b60000 }
58203 /* cmp.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
58206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58207 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b60000 }
58209 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58213 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1060000 }
58215 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
58218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58219 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1260000 }
58221 /* cmp.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
58224 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58225 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1360000 }
58227 /* cmp.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
58230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58231 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1360000 }
58233 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58237 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3060000 }
58239 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58243 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3260000 }
58245 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58248 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58249 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3360000 }
58251 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
58254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58255 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3360000 }
58257 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58261 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5060000 }
58263 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58267 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5260000 }
58269 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58272 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58273 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5360000 }
58275 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
58278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58279 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5360000 }
58281 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58285 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7060000 }
58287 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58291 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7260000 }
58293 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58296 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58297 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7360000 }
58299 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
58302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58303 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7360000 }
58305 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
58308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58309 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3860000 }
58311 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
58314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58315 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a60000 }
58317 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
58320 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58321 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b60000 }
58323 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
58326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58327 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b60000 }
58329 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
58332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58333 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5860000 }
58335 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
58338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58339 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a60000 }
58341 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
58344 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58345 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b60000 }
58347 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
58350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58351 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b60000 }
58353 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
58356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58357 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c60000 }
58359 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
58362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58363 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e60000 }
58365 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
58368 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58369 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f60000 }
58371 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
58374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58375 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f60000 }
58377 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
58380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58381 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c60000 }
58383 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
58386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58387 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e60000 }
58389 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
58392 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58393 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f60000 }
58395 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
58398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58399 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f60000 }
58401 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
58404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
58405 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c60000 }
58407 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
58410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58411 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e60000 }
58413 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
58416 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58417 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f60000 }
58419 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
58422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
58423 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f60000 }
58425 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
58428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
58429 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7860000 }
58431 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
58434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58435 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a60000 }
58437 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
58440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58441 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b60000 }
58443 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
58446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
58447 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b60000 }
58449 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58453 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9060000 }
58455 /* cmp.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
58458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58459 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9260000 }
58461 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58465 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1860000 }
58467 /* cmp.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
58470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58471 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a60000 }
58473 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58477 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1060000 }
58479 /* cmp.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
58482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58483 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1260000 }
58485 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
58488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58489 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3060000 }
58491 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
58494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58495 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3260000 }
58497 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
58500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58501 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5060000 }
58503 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
58506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58507 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5260000 }
58509 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
58512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58513 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7060000 }
58515 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
58518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58519 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7260000 }
58521 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
58524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58525 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3860000 }
58527 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
58530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58531 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a60000 }
58533 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
58536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58537 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5860000 }
58539 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
58542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58543 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a60000 }
58545 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
58548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58549 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c60000 }
58551 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
58554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58555 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e60000 }
58557 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
58560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58561 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c60000 }
58563 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
58566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58567 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e60000 }
58569 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
58572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
58573 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c60000 }
58575 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
58578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
58579 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e60000 }
58581 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
58584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
58585 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7860000 }
58587 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
58590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
58591 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a60000 }
58593 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
58596 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58597 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc906 }
58599 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
58602 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58603 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8926 }
58605 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58608 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58609 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8906 }
58611 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
58614 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58615 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc186 }
58617 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
58620 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58621 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a6 }
58623 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58626 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58627 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8186 }
58629 /* cmp.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
58632 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58633 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc106 }
58635 /* cmp.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
58638 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58639 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8126 }
58641 /* cmp.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58644 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58645 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8106 }
58647 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58650 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58651 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30600 }
58653 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58656 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58657 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832600 }
58659 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
58662 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58663 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830600 }
58665 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58668 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58669 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5060000 }
58671 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58674 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58675 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85260000 }
58677 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
58680 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58681 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85060000 }
58683 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58686 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58687 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7060000 }
58689 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58692 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58693 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87260000 }
58695 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
58698 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58699 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87060000 }
58701 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
58704 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58705 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38600 }
58707 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
58710 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58711 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a600 }
58713 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
58716 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58717 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838600 }
58719 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
58722 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58723 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5860000 }
58725 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
58728 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58729 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a60000 }
58731 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
58734 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58735 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85860000 }
58737 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
58740 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58741 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c600 }
58743 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
58746 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58747 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e600 }
58749 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
58752 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58753 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c600 }
58755 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
58758 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58759 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c60000 }
58761 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
58764 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58765 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e60000 }
58767 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
58770 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58771 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c60000 }
58773 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
58776 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58777 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c60000 }
58779 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
58782 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58783 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e60000 }
58785 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
58788 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
58789 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c60000 }
58791 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
58794 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58795 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7860000 }
58797 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
58800 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58801 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a60000 }
58803 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
58806 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
58807 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87860000 }
58809 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
58812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58813 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980600 }
58815 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
58818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58819 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982600 }
58821 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
58824 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58825 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983600 }
58827 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
58830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58831 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908600 }
58833 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
58836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58837 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a600 }
58839 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
58842 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58843 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b600 }
58845 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58849 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900600 }
58851 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
58854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58855 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902600 }
58857 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
58860 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58861 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903600 }
58863 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58867 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92060000 }
58869 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58873 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92260000 }
58875 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58878 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58879 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92360000 }
58881 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58885 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94060000 }
58887 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58891 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94260000 }
58893 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58896 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58897 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94360000 }
58899 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58903 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96060000 }
58905 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58909 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96260000 }
58911 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58914 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58915 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96360000 }
58917 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58921 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92860000 }
58923 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58927 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a60000 }
58929 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58932 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58933 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b60000 }
58935 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58939 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94860000 }
58941 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58945 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a60000 }
58947 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58950 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58951 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b60000 }
58953 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58957 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c60000 }
58959 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58963 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e60000 }
58965 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58968 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58969 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f60000 }
58971 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58975 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c60000 }
58977 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58981 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e60000 }
58983 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58986 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58987 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f60000 }
58989 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
58992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
58993 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c60000 }
58995 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
58998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58999 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e60000 }
59001 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59004 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59005 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f60000 }
59007 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
59010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
59011 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96860000 }
59013 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
59016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59017 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a60000 }
59019 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
59022 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59023 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b60000 }
59025 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59029 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8060000 }
59031 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
59034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59035 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8260000 }
59037 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
59040 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59041 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8360000 }
59043 /* cmp.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
59046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59047 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8360000 }
59049 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59053 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0860000 }
59055 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
59058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59059 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a60000 }
59061 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
59064 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59065 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b60000 }
59067 /* cmp.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
59070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59071 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b60000 }
59073 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59077 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0060000 }
59079 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
59082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59083 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0260000 }
59085 /* cmp.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
59088 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59089 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0360000 }
59091 /* cmp.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
59094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59095 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0360000 }
59097 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59101 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2060000 }
59103 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59107 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2260000 }
59109 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59112 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59113 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2360000 }
59115 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
59118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59119 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2360000 }
59121 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59125 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4060000 }
59127 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59131 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4260000 }
59133 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59136 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59137 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4360000 }
59139 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
59142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59143 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4360000 }
59145 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59149 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6060000 }
59151 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59155 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6260000 }
59157 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59160 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59161 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6360000 }
59163 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
59166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59167 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6360000 }
59169 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
59172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59173 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2860000 }
59175 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59179 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a60000 }
59181 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
59184 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59185 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b60000 }
59187 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59191 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b60000 }
59193 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
59196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59197 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4860000 }
59199 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59203 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a60000 }
59205 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
59208 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59209 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b60000 }
59211 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59215 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b60000 }
59217 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
59220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59221 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c60000 }
59223 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59227 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e60000 }
59229 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
59232 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59233 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f60000 }
59235 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59239 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f60000 }
59241 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
59244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59245 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c60000 }
59247 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
59250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59251 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e60000 }
59253 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
59256 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59257 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f60000 }
59259 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
59262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59263 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f60000 }
59265 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
59268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
59269 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c60000 }
59271 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59275 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e60000 }
59277 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
59280 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59281 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f60000 }
59283 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
59286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
59287 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f60000 }
59289 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
59292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
59293 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6860000 }
59295 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
59298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59299 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a60000 }
59301 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
59304 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59305 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b60000 }
59307 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
59310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
59311 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b60000 }
59313 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59317 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8060000 }
59319 /* cmp.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
59322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59323 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8260000 }
59325 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59329 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0860000 }
59331 /* cmp.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
59334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59335 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a60000 }
59337 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59341 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0060000 }
59343 /* cmp.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
59346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59347 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0260000 }
59349 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
59352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59353 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2060000 }
59355 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
59358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59359 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2260000 }
59361 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
59364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59365 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4060000 }
59367 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
59370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59371 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4260000 }
59373 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
59376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59377 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6060000 }
59379 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
59382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59383 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6260000 }
59385 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
59388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59389 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2860000 }
59391 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
59394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59395 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a60000 }
59397 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
59400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59401 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4860000 }
59403 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
59406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59407 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a60000 }
59409 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
59412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59413 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c60000 }
59415 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
59418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59419 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e60000 }
59421 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
59424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59425 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c60000 }
59427 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
59430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59431 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e60000 }
59433 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
59436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
59437 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c60000 }
59439 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
59442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
59443 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e60000 }
59445 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
59448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
59449 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6860000 }
59451 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
59454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
59455 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a60000 }
59457 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
59460 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59461 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc806 }
59463 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
59466 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59467 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8826 }
59469 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59472 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59473 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8806 }
59475 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
59478 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59479 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc086 }
59481 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
59484 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59485 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a6 }
59487 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59490 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59491 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8086 }
59493 /* cmp.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
59496 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59497 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc006 }
59499 /* cmp.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
59502 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59503 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8026 }
59505 /* cmp.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59508 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59509 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8006 }
59511 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59514 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59515 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20600 }
59517 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59520 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59521 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822600 }
59523 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
59526 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59527 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820600 }
59529 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59532 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59533 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4060000 }
59535 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59538 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59539 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84260000 }
59541 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
59544 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59545 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84060000 }
59547 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59550 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59551 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6060000 }
59553 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59556 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59557 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86260000 }
59559 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
59562 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59563 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86060000 }
59565 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
59568 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59569 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28600 }
59571 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
59574 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59575 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a600 }
59577 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
59580 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59581 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828600 }
59583 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
59586 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59587 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4860000 }
59589 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
59592 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59593 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a60000 }
59595 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
59598 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59599 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84860000 }
59601 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
59604 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59605 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c600 }
59607 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
59610 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59611 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e600 }
59613 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
59616 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59617 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c600 }
59619 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
59622 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59623 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c60000 }
59625 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
59628 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59629 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e60000 }
59631 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
59634 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59635 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c60000 }
59637 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
59640 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59641 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c60000 }
59643 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
59646 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59647 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e60000 }
59649 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
59652 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
59653 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c60000 }
59655 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
59658 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59659 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6860000 }
59661 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
59664 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59665 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a60000 }
59667 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
59670 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
59671 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86860000 }
59673 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
59676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59677 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xc18000 }
59679 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
59682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59683 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1a000 }
59685 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
59688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59689 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xc1b000 }
59691 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
59694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59695 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xc18400 }
59697 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
59700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59701 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xc1a400 }
59703 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
59706 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59707 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xc1b400 }
59709 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
59712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59713 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xc18600 }
59715 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
59718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59719 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1a600 }
59721 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
59724 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59725 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xc1b600 }
59727 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
59730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59731 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1880000 }
59733 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
59736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59737 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1a80000 }
59739 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
59742 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59743 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1b80000 }
59745 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
59748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59749 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xc18c0000 }
59751 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
59754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59755 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1ac0000 }
59757 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
59760 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59761 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1bc0000 }
59763 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
59766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59767 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc18a0000 }
59769 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
59772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59773 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1aa0000 }
59775 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
59778 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59779 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1ba0000 }
59781 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
59784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59785 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc18e0000 }
59787 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
59790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59791 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1ae0000 }
59793 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
59796 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59797 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1be0000 }
59799 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
59802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59803 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc18b0000 }
59805 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
59808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59809 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1ab0000 }
59811 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
59814 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59815 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1bb0000 }
59817 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
59820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
59821 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xc18f0000 }
59823 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
59826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59827 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1af0000 }
59829 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59833 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1bf0000 }
59835 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
59838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59839 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xc1c00000 }
59841 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
59844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59845 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1e00000 }
59847 /* cmp.w${G} ${Dsp-16-u16},$Dst16RnHI */
59850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
59851 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xc1f00000 }
59853 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
59856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59857 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xc1c40000 }
59859 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
59862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59863 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xc1e40000 }
59865 /* cmp.w${G} ${Dsp-16-u16},$Dst16AnHI */
59868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
59869 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xc1f40000 }
59871 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
59874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59875 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xc1c60000 }
59877 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
59880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59881 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1e60000 }
59883 /* cmp.w${G} ${Dsp-16-u16},[$Dst16An] */
59886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
59887 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xc1f60000 }
59889 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
59892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59893 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1c80000 }
59895 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
59898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59899 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1e80000 }
59901 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
59904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59905 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xc1f80000 }
59907 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
59910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59911 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1cc0000 }
59913 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
59916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59917 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1ec0000 }
59919 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
59922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59923 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xc1fc0000 }
59925 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
59928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59929 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ca0000 }
59931 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59935 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ea0000 }
59937 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59941 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xc1fa0000 }
59943 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
59946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59947 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ce0000 }
59949 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59953 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ee0000 }
59955 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59959 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xc1fe0000 }
59961 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
59964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59965 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1cb0000 }
59967 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59971 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1eb0000 }
59973 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59977 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xc1fb0000 }
59979 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
59982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
59983 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xc1cf0000 }
59985 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59989 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xc1ef0000 }
59991 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
59994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
59995 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xc1ff0000 }
59997 /* cmp.w${G} $Src16RnHI,$Dst16RnHI */
60000 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
60001 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xc100 }
60003 /* cmp.w${G} $Src16AnHI,$Dst16RnHI */
60006 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
60007 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xc140 }
60009 /* cmp.w${G} [$Src16An],$Dst16RnHI */
60012 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
60013 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xc160 }
60015 /* cmp.w${G} $Src16RnHI,$Dst16AnHI */
60018 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
60019 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xc104 }
60021 /* cmp.w${G} $Src16AnHI,$Dst16AnHI */
60024 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
60025 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xc144 }
60027 /* cmp.w${G} [$Src16An],$Dst16AnHI */
60030 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
60031 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xc164 }
60033 /* cmp.w${G} $Src16RnHI,[$Dst16An] */
60036 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60037 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xc106 }
60039 /* cmp.w${G} $Src16AnHI,[$Dst16An] */
60042 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60043 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xc146 }
60045 /* cmp.w${G} [$Src16An],[$Dst16An] */
60048 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60049 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xc166 }
60051 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
60054 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60055 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xc10800 }
60057 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
60060 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60061 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xc14800 }
60063 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60066 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60067 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xc16800 }
60069 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
60072 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60073 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xc10c0000 }
60075 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
60078 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60079 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xc14c0000 }
60081 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60084 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60085 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xc16c0000 }
60087 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
60090 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60091 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc10a00 }
60093 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
60096 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60097 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc14a00 }
60099 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[sb] */
60102 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60103 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xc16a00 }
60105 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
60108 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60109 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc10e0000 }
60111 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
60114 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60115 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc14e0000 }
60117 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[sb] */
60120 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60121 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xc16e0000 }
60123 /* cmp.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
60126 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60127 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc10b00 }
60129 /* cmp.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
60132 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60133 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc14b00 }
60135 /* cmp.w${G} [$Src16An],${Dsp-16-s8}[fb] */
60138 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60139 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xc16b00 }
60141 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16} */
60144 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
60145 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xc10f0000 }
60147 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16} */
60150 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
60151 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xc14f0000 }
60153 /* cmp.w${G} [$Src16An],${Dsp-16-u16} */
60156 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60157 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xc16f0000 }
60159 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
60162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60163 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xc08000 }
60165 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
60168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60169 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0a000 }
60171 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
60174 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60175 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xc0b000 }
60177 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
60180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60181 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xc08400 }
60183 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
60186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60187 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xc0a400 }
60189 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
60192 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60193 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xc0b400 }
60195 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
60198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60199 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xc08600 }
60201 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
60204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60205 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0a600 }
60207 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
60210 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60211 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xc0b600 }
60213 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
60216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60217 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0880000 }
60219 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
60222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60223 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0a80000 }
60225 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
60228 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60229 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0b80000 }
60231 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
60234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60235 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xc08c0000 }
60237 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
60240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60241 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0ac0000 }
60243 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
60246 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60247 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0bc0000 }
60249 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
60252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60253 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc08a0000 }
60255 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
60258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60259 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0aa0000 }
60261 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
60264 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60265 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0ba0000 }
60267 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
60270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60271 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc08e0000 }
60273 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
60276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60277 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0ae0000 }
60279 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
60282 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60283 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0be0000 }
60285 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
60288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60289 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc08b0000 }
60291 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
60294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60295 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0ab0000 }
60297 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
60300 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60301 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0bb0000 }
60303 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
60306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
60307 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xc08f0000 }
60309 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
60312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60313 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0af0000 }
60315 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
60318 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60319 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0bf0000 }
60321 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
60324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60325 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xc0c00000 }
60327 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
60330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60331 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0e00000 }
60333 /* cmp.b${G} ${Dsp-16-u16},$Dst16RnQI */
60336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
60337 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xc0f00000 }
60339 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
60342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60343 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xc0c40000 }
60345 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
60348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60349 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xc0e40000 }
60351 /* cmp.b${G} ${Dsp-16-u16},$Dst16AnQI */
60354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
60355 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xc0f40000 }
60357 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
60360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60361 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xc0c60000 }
60363 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
60366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60367 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0e60000 }
60369 /* cmp.b${G} ${Dsp-16-u16},[$Dst16An] */
60372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
60373 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xc0f60000 }
60375 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
60378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60379 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0c80000 }
60381 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
60384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60385 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0e80000 }
60387 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
60390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60391 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xc0f80000 }
60393 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
60396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60397 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0cc0000 }
60399 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
60402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60403 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0ec0000 }
60405 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
60408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60409 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xc0fc0000 }
60411 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
60414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60415 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ca0000 }
60417 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
60420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60421 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ea0000 }
60423 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
60426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60427 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xc0fa0000 }
60429 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
60432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60433 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ce0000 }
60435 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
60438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60439 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ee0000 }
60441 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
60444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60445 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xc0fe0000 }
60447 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
60450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60451 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0cb0000 }
60453 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
60456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60457 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0eb0000 }
60459 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
60462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60463 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xc0fb0000 }
60465 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
60468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
60469 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xc0cf0000 }
60471 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
60474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
60475 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xc0ef0000 }
60477 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
60480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
60481 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xc0ff0000 }
60483 /* cmp.b${G} $Src16RnQI,$Dst16RnQI */
60486 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
60487 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xc000 }
60489 /* cmp.b${G} $Src16AnQI,$Dst16RnQI */
60492 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
60493 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xc040 }
60495 /* cmp.b${G} [$Src16An],$Dst16RnQI */
60498 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60499 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xc060 }
60501 /* cmp.b${G} $Src16RnQI,$Dst16AnQI */
60504 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
60505 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xc004 }
60507 /* cmp.b${G} $Src16AnQI,$Dst16AnQI */
60510 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
60511 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xc044 }
60513 /* cmp.b${G} [$Src16An],$Dst16AnQI */
60516 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60517 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xc064 }
60519 /* cmp.b${G} $Src16RnQI,[$Dst16An] */
60522 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60523 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xc006 }
60525 /* cmp.b${G} $Src16AnQI,[$Dst16An] */
60528 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60529 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xc046 }
60531 /* cmp.b${G} [$Src16An],[$Dst16An] */
60534 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60535 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xc066 }
60537 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
60540 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60541 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xc00800 }
60543 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
60546 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60547 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xc04800 }
60549 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60552 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60553 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xc06800 }
60555 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
60558 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60559 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xc00c0000 }
60561 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
60564 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60565 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xc04c0000 }
60567 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60570 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60571 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xc06c0000 }
60573 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
60576 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60577 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc00a00 }
60579 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
60582 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60583 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc04a00 }
60585 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[sb] */
60588 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60589 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xc06a00 }
60591 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
60594 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60595 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc00e0000 }
60597 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
60600 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60601 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc04e0000 }
60603 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[sb] */
60606 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60607 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xc06e0000 }
60609 /* cmp.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
60612 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60613 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc00b00 }
60615 /* cmp.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
60618 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60619 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc04b00 }
60621 /* cmp.b${G} [$Src16An],${Dsp-16-s8}[fb] */
60624 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60625 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xc06b00 }
60627 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16} */
60630 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
60631 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xc00f0000 }
60633 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16} */
60636 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
60637 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xc04f0000 }
60639 /* cmp.b${G} [$Src16An],${Dsp-16-u16} */
60642 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60643 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xc06f0000 }
60645 /* cmp.b${S} #${Imm-8-QI},r0l */
60648 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
60649 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xe400 }
60651 /* cmp.b${S} #${Imm-8-QI},r0h */
60654 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
60655 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xe300 }
60657 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
60660 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60661 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xe50000 }
60663 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
60666 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60667 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xe60000 }
60669 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u16} */
60672 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
60673 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xe7000000 }
60675 /* cmp.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
60678 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60679 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe910 }
60681 /* cmp.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
60684 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60685 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe190 }
60687 /* cmp.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60690 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60691 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe110 }
60693 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60696 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60697 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe31000 }
60699 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60702 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60703 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5100000 }
60705 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60708 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60709 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7100000 }
60711 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60714 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60715 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe39000 }
60717 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60720 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60721 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5900000 }
60723 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60726 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60727 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3d000 }
60729 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60732 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60733 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5d00000 }
60735 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
60738 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60739 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7d00000 }
60741 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
60744 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60745 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7900000 }
60747 /* cmp.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
60750 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
60751 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe810 }
60753 /* cmp.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
60756 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
60757 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe090 }
60759 /* cmp.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60762 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60763 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe010 }
60765 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60768 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60769 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe21000 }
60771 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60774 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60775 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4100000 }
60777 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60780 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60781 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6100000 }
60783 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60786 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60787 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe29000 }
60789 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60792 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60793 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4900000 }
60795 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60798 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60799 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2d000 }
60801 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60804 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60805 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4d00000 }
60807 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
60810 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60811 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6d00000 }
60813 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
60816 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60817 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6900000 }
60819 /* cmp.w${Q} #${Imm-8-s4},$Dst16RnHI */
60822 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
60823 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd100 }
60825 /* cmp.w${Q} #${Imm-8-s4},$Dst16AnHI */
60828 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
60829 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd104 }
60831 /* cmp.w${Q} #${Imm-8-s4},[$Dst16An] */
60834 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60835 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd106 }
60837 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60840 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60841 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd10800 }
60843 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60846 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60847 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd10c0000 }
60849 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60852 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60853 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd10a00 }
60855 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60858 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60859 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd10e0000 }
60861 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60864 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60865 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd10b00 }
60867 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
60870 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60871 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd10f0000 }
60873 /* cmp.b${Q} #${Imm-8-s4},$Dst16RnQI */
60876 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
60877 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd000 }
60879 /* cmp.b${Q} #${Imm-8-s4},$Dst16AnQI */
60882 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
60883 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd004 }
60885 /* cmp.b${Q} #${Imm-8-s4},[$Dst16An] */
60888 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60889 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd006 }
60891 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60894 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60895 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd00800 }
60897 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60900 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60901 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd00c0000 }
60903 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60906 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60907 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd00a00 }
60909 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60912 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60913 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd00e0000 }
60915 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60918 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60919 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd00b00 }
60921 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
60924 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60925 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd00f0000 }
60927 /* cmp.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
60930 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60931 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992e0000 }
60933 /* cmp.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
60936 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60937 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91ae0000 }
60939 /* cmp.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
60942 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60943 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912e0000 }
60945 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60948 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60949 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932e0000 }
60951 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
60954 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60955 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93ae0000 }
60957 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
60960 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60961 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ee0000 }
60963 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60966 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60967 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952e0000 }
60969 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
60972 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60973 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95ae0000 }
60975 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
60978 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60979 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ee0000 }
60981 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
60984 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
60985 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ee0000 }
60987 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60990 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60991 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972e0000 }
60993 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24} */
60996 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
60997 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97ae0000 }
60999 /* cmp.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
61002 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
61003 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982e00 }
61005 /* cmp.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
61008 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
61009 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90ae00 }
61011 /* cmp.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
61014 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61015 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902e00 }
61017 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61020 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61021 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922e0000 }
61023 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61026 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61027 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92ae0000 }
61029 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61032 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61033 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ee0000 }
61035 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61038 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61039 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942e0000 }
61041 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61044 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61045 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94ae0000 }
61047 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
61050 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61051 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ee0000 }
61053 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61056 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61057 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ee0000 }
61059 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61062 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61063 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962e0000 }
61065 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24} */
61068 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
61069 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96ae0000 }
61071 /* cmp.w${G} #${Imm-16-HI},$Dst16RnHI */
61074 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
61075 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77800000 }
61077 /* cmp.w${G} #${Imm-16-HI},$Dst16AnHI */
61080 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
61081 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77840000 }
61083 /* cmp.w${G} #${Imm-16-HI},[$Dst16An] */
61086 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
61087 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77860000 }
61089 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
61092 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61093 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77880000 }
61095 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
61098 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61099 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x778a0000 }
61101 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
61104 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61105 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x778b0000 }
61107 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
61110 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61111 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x778c0000 }
61113 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
61116 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61117 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x778e0000 }
61119 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
61122 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
61123 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x778f0000 }
61125 /* cmp.b${G} #${Imm-16-QI},$Dst16RnQI */
61128 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
61129 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x768000 }
61131 /* cmp.b${G} #${Imm-16-QI},$Dst16AnQI */
61134 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
61135 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x768400 }
61137 /* cmp.b${G} #${Imm-16-QI},[$Dst16An] */
61140 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
61141 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x768600 }
61143 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
61146 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61147 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76880000 }
61149 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61152 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61153 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x768a0000 }
61155 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61158 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61159 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x768b0000 }
61161 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
61164 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61165 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x768c0000 }
61167 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61170 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61171 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x768e0000 }
61173 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61176 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61177 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x768f0000 }
61179 /* cmp.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
61182 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
61183 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa8310000 }
61185 /* cmp.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
61188 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
61189 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0b10000 }
61191 /* cmp.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
61194 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61195 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa0310000 }
61197 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61200 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61201 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2310000 }
61203 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
61206 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61207 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2b10000 }
61209 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
61212 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61213 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2f10000 }
61215 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61218 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61219 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4310000 }
61221 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
61224 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61225 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4b10000 }
61227 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
61230 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61231 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4f10000 }
61233 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16} */
61236 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
61237 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6f10000 }
61239 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61242 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61243 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6310000 }
61245 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24} */
61248 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
61249 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6b10000 }
61251 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32RnPrefixedHI */
61254 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
61255 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893e00 }
61257 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32AnPrefixedHI */
61260 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
61261 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181be00 }
61263 /* clip.w #${Imm-24-HI},#${Imm-40-HI},[$Dst32AnPrefixed] */
61266 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61267 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813e00 }
61269 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61272 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61273 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833e00 }
61275 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[sb] */
61278 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61279 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183be00 }
61281 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-s8}[fb] */
61284 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61285 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183fe00 }
61287 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61290 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61291 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853e00 }
61293 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[sb] */
61296 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61297 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185be00 }
61299 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-s16}[fb] */
61302 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61303 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185fe00 }
61305 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16} */
61308 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), 0 } },
61309 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187fe00 }
61311 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61314 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61315 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873e00 }
61317 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24} */
61320 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), 0 } },
61321 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187be00 }
61323 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32RnPrefixedQI */
61326 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
61327 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883e00 }
61329 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32AnPrefixedQI */
61332 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
61333 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180be00 }
61335 /* clip.b #${Imm-24-QI},#${Imm-32-QI},[$Dst32AnPrefixed] */
61338 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61339 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803e00 }
61341 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61344 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61345 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823e00 }
61347 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[sb] */
61350 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61351 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182be00 }
61353 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-s8}[fb] */
61356 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61357 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182fe00 }
61359 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61362 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61363 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843e00 }
61365 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[sb] */
61368 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61369 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184be00 }
61371 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-s16}[fb] */
61374 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61375 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184fe00 }
61377 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16} */
61380 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), 0 } },
61381 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186fe00 }
61383 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61386 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61387 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863e00 }
61389 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24} */
61392 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), 0 } },
61393 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186be00 }
61395 /* bxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
61398 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
61399 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d828 }
61401 /* bxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
61404 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
61405 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a8 }
61407 /* bxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
61410 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61411 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d028 }
61413 /* bxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
61416 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61417 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22800 }
61419 /* bxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
61422 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61423 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42800 }
61425 /* bxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
61428 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61429 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62800 }
61431 /* bxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
61434 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
61435 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a800 }
61437 /* bxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
61440 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
61441 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a800 }
61443 /* bxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
61446 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61447 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e800 }
61449 /* bxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
61452 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61453 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e800 }
61455 /* bxor${X} ${BitBase32-24-u19-Prefixed} */
61458 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
61459 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e800 }
61461 /* bxor${X} ${BitBase32-24-u27-Prefixed} */
61464 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
61465 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a800 }
61467 /* bxor${X} $Bitno16R,$Bit16Rn */
61470 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61471 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ec000 }
61473 /* bxor${X} $Bitno16R,$Bit16An */
61476 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61477 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ec400 }
61479 /* bxor${X} [$Bit16An] */
61482 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61483 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ec6 }
61485 /* bxor${X} ${Dsp-16-u8}[$Bit16An] */
61488 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61489 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ec800 }
61491 /* bxor${X} ${Dsp-16-u16}[$Bit16An] */
61494 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61495 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ecc0000 }
61497 /* bxor${X} ${BitBase16-16-u8}[sb] */
61500 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61501 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eca00 }
61503 /* bxor${X} ${BitBase16-16-u16}[sb] */
61506 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61507 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ece0000 }
61509 /* bxor${X} ${BitBase16-16-s8}[fb] */
61512 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61513 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ecb00 }
61515 /* bxor${X} ${BitBase16-16-u16} */
61518 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61519 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ecf0000 }
61521 /* btsts${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61524 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61525 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd828 }
61527 /* btsts${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61530 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61531 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a8 }
61533 /* btsts${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61536 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61537 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd028 }
61539 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61542 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61543 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22800 }
61545 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61548 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61549 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4280000 }
61551 /* btsts${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61554 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61555 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6280000 }
61557 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61560 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61561 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a800 }
61563 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61566 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61567 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a80000 }
61569 /* btsts${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61572 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61573 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e800 }
61575 /* btsts${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61578 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61579 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e80000 }
61581 /* btsts${X} ${BitBase32-16-u19-Unprefixed} */
61584 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61585 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e80000 }
61587 /* btsts${X} ${BitBase32-16-u27-Unprefixed} */
61590 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61591 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a80000 }
61593 /* btsts${X} $Bitno16R,$Bit16Rn */
61596 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61597 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e1000 }
61599 /* btsts${X} $Bitno16R,$Bit16An */
61602 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61603 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e1400 }
61605 /* btsts${X} [$Bit16An] */
61608 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61609 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e16 }
61611 /* btsts${X} ${Dsp-16-u8}[$Bit16An] */
61614 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61615 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e1800 }
61617 /* btsts${X} ${Dsp-16-u16}[$Bit16An] */
61620 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61621 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e1c0000 }
61623 /* btsts${X} ${BitBase16-16-u8}[sb] */
61626 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61627 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e1a00 }
61629 /* btsts${X} ${BitBase16-16-u16}[sb] */
61632 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61633 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e1e0000 }
61635 /* btsts${X} ${BitBase16-16-s8}[fb] */
61638 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61639 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e1b00 }
61641 /* btsts${X} ${BitBase16-16-u16} */
61644 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61645 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e1f0000 }
61647 /* btstc${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61650 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61651 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd820 }
61653 /* btstc${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61656 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61657 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a0 }
61659 /* btstc${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61662 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61663 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd020 }
61665 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61668 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61669 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22000 }
61671 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61674 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61675 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4200000 }
61677 /* btstc${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61680 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61681 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6200000 }
61683 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61686 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61687 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a000 }
61689 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61692 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61693 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a00000 }
61695 /* btstc${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61698 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61699 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e000 }
61701 /* btstc${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61704 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61705 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e00000 }
61707 /* btstc${X} ${BitBase32-16-u19-Unprefixed} */
61710 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61711 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e00000 }
61713 /* btstc${X} ${BitBase32-16-u27-Unprefixed} */
61716 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61717 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a00000 }
61719 /* btstc${X} $Bitno16R,$Bit16Rn */
61722 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61723 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e0000 }
61725 /* btstc${X} $Bitno16R,$Bit16An */
61728 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61729 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e0400 }
61731 /* btstc${X} [$Bit16An] */
61734 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61735 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e06 }
61737 /* btstc${X} ${Dsp-16-u8}[$Bit16An] */
61740 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61741 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e0800 }
61743 /* btstc${X} ${Dsp-16-u16}[$Bit16An] */
61746 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61747 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e0c0000 }
61749 /* btstc${X} ${BitBase16-16-u8}[sb] */
61752 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61753 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e0a00 }
61755 /* btstc${X} ${BitBase16-16-u16}[sb] */
61758 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61759 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e0e0000 }
61761 /* btstc${X} ${BitBase16-16-s8}[fb] */
61764 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61765 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e0b00 }
61767 /* btstc${X} ${BitBase16-16-u16} */
61770 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61771 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e0f0000 }
61773 /* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61776 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61777 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd800 }
61779 /* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61782 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61783 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd080 }
61785 /* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61788 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61789 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd000 }
61791 /* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61794 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61795 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd20000 }
61797 /* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61800 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61801 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4000000 }
61803 /* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61806 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61807 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6000000 }
61809 /* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
61812 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61813 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd28000 }
61815 /* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
61818 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61819 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4800000 }
61821 /* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
61824 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61825 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2c000 }
61827 /* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
61830 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61831 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4c00000 }
61833 /* btst${G} ${BitBase32-16-u19-Unprefixed} */
61836 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61837 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6c00000 }
61839 /* btst${G} ${BitBase32-16-u27-Unprefixed} */
61842 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61843 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6800000 }
61845 /* btst${G} $Bitno16R,$Bit16Rn */
61848 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61849 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7eb000 }
61851 /* btst${G} $Bitno16R,$Bit16An */
61854 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61855 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7eb400 }
61857 /* btst${G} ${Dsp-16-u8}[$Bit16An] */
61860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61861 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7eb800 }
61863 /* btst${G} ${BitBase16-16-u8}[sb] */
61866 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61867 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eba00 }
61869 /* btst${G} ${BitBase16-16-s8}[fb] */
61872 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61873 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ebb00 }
61875 /* btst${S} ${BitBase16-8-u11-S}[sb] */
61878 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
61879 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5800 }
61881 /* btst${G} ${Dsp-16-u16}[$Bit16An] */
61884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61885 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ebc0000 }
61887 /* btst${G} ${BitBase16-16-u16}[sb] */
61890 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61891 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ebe0000 }
61893 /* btst${G} ${BitBase16-16-u16} */
61896 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
61897 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ebf0000 }
61899 /* btst${G} [$Bit16An] */
61902 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61903 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7eb6 }
61905 /* bset${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61908 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61909 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd838 }
61911 /* bset${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61914 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61915 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b8 }
61917 /* bset${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61920 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61921 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd038 }
61923 /* bset${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61926 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61927 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23800 }
61929 /* bset${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61932 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61933 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4380000 }
61935 /* bset${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61938 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61939 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6380000 }
61941 /* bset${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61944 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61945 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b800 }
61947 /* bset${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61950 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61951 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b80000 }
61953 /* bset${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61956 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61957 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f800 }
61959 /* bset${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61962 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61963 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f80000 }
61965 /* bset${X} ${BitBase32-16-u19-Unprefixed} */
61968 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61969 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f80000 }
61971 /* bset${X} ${BitBase32-16-u27-Unprefixed} */
61974 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61975 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b80000 }
61977 /* bset${G} $Bitno16R,$Bit16Rn */
61980 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61981 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e9000 }
61983 /* bset${G} $Bitno16R,$Bit16An */
61986 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61987 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e9400 }
61989 /* bset${G} ${Dsp-16-u8}[$Bit16An] */
61992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61993 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e9800 }
61995 /* bset${G} ${BitBase16-16-u8}[sb] */
61998 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61999 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e9a00 }
62001 /* bset${G} ${BitBase16-16-s8}[fb] */
62004 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62005 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e9b00 }
62007 /* bset${S} ${BitBase16-8-u11-S}[sb] */
62010 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62011 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4800 }
62013 /* bset${G} ${Dsp-16-u16}[$Bit16An] */
62016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62017 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e9c0000 }
62019 /* bset${G} ${BitBase16-16-u16}[sb] */
62022 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62023 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e9e0000 }
62025 /* bset${G} ${BitBase16-16-u16} */
62028 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62029 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e9f0000 }
62031 /* bset${G} [$Bit16An] */
62034 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62035 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e96 }
62037 /* bor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62040 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62041 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d820 }
62043 /* bor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62046 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62047 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a0 }
62049 /* bor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62052 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62053 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d020 }
62055 /* bor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62058 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62059 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22000 }
62061 /* bor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62064 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62065 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42000 }
62067 /* bor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62070 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62071 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62000 }
62073 /* bor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62076 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62077 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a000 }
62079 /* bor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62082 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62083 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a000 }
62085 /* bor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62088 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62089 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e000 }
62091 /* bor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62094 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62095 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e000 }
62097 /* bor${X} ${BitBase32-24-u19-Prefixed} */
62100 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62101 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e000 }
62103 /* bor${X} ${BitBase32-24-u27-Prefixed} */
62106 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62107 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a000 }
62109 /* bor${X} $Bitno16R,$Bit16Rn */
62112 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62113 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e6000 }
62115 /* bor${X} $Bitno16R,$Bit16An */
62118 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62119 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e6400 }
62121 /* bor${X} [$Bit16An] */
62124 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62125 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e66 }
62127 /* bor${X} ${Dsp-16-u8}[$Bit16An] */
62130 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62131 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e6800 }
62133 /* bor${X} ${Dsp-16-u16}[$Bit16An] */
62136 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62137 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e6c0000 }
62139 /* bor${X} ${BitBase16-16-u8}[sb] */
62142 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62143 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e6a00 }
62145 /* bor${X} ${BitBase16-16-u16}[sb] */
62148 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62149 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e6e0000 }
62151 /* bor${X} ${BitBase16-16-s8}[fb] */
62154 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62155 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e6b00 }
62157 /* bor${X} ${BitBase16-16-u16} */
62160 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62161 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e6f0000 }
62163 /* bnxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62166 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62167 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d838 }
62169 /* bnxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62172 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62173 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b8 }
62175 /* bnxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62178 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62179 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d038 }
62181 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62184 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62185 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23800 }
62187 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62190 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62191 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43800 }
62193 /* bnxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62196 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62197 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63800 }
62199 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62202 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62203 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b800 }
62205 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62208 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62209 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b800 }
62211 /* bnxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62214 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62215 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f800 }
62217 /* bnxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62220 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62221 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f800 }
62223 /* bnxor${X} ${BitBase32-24-u19-Prefixed} */
62226 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62227 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f800 }
62229 /* bnxor${X} ${BitBase32-24-u27-Prefixed} */
62232 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62233 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b800 }
62235 /* bnxor${X} $Bitno16R,$Bit16Rn */
62238 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62239 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ed000 }
62241 /* bnxor${X} $Bitno16R,$Bit16An */
62244 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62245 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ed400 }
62247 /* bnxor${X} [$Bit16An] */
62250 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62251 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ed6 }
62253 /* bnxor${X} ${Dsp-16-u8}[$Bit16An] */
62256 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62257 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ed800 }
62259 /* bnxor${X} ${Dsp-16-u16}[$Bit16An] */
62262 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62263 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7edc0000 }
62265 /* bnxor${X} ${BitBase16-16-u8}[sb] */
62268 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62269 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eda00 }
62271 /* bnxor${X} ${BitBase16-16-u16}[sb] */
62274 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62275 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ede0000 }
62277 /* bnxor${X} ${BitBase16-16-s8}[fb] */
62280 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62281 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7edb00 }
62283 /* bnxor${X} ${BitBase16-16-u16} */
62286 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62287 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7edf0000 }
62289 /* bntst${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62292 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62293 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d800 }
62295 /* bntst${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62298 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62299 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d080 }
62301 /* bntst${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62304 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62305 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d000 }
62307 /* bntst${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62310 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62311 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20000 }
62313 /* bntst${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62316 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62317 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40000 }
62319 /* bntst${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62322 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62323 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60000 }
62325 /* bntst${X} ${BitBase32-24-u11-Prefixed}[sb] */
62328 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62329 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28000 }
62331 /* bntst${X} ${BitBase32-24-u19-Prefixed}[sb] */
62334 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62335 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48000 }
62337 /* bntst${X} ${BitBase32-24-s11-Prefixed}[fb] */
62340 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62341 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c000 }
62343 /* bntst${X} ${BitBase32-24-s19-Prefixed}[fb] */
62346 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62347 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c000 }
62349 /* bntst${X} ${BitBase32-24-u19-Prefixed} */
62352 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62353 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c000 }
62355 /* bntst${X} ${BitBase32-24-u27-Prefixed} */
62358 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62359 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68000 }
62361 /* bntst${X} $Bitno16R,$Bit16Rn */
62364 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62365 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e3000 }
62367 /* bntst${X} $Bitno16R,$Bit16An */
62370 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62371 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e3400 }
62373 /* bntst${X} [$Bit16An] */
62376 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62377 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e36 }
62379 /* bntst${X} ${Dsp-16-u8}[$Bit16An] */
62382 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62383 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e3800 }
62385 /* bntst${X} ${Dsp-16-u16}[$Bit16An] */
62388 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62389 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e3c0000 }
62391 /* bntst${X} ${BitBase16-16-u8}[sb] */
62394 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62395 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e3a00 }
62397 /* bntst${X} ${BitBase16-16-u16}[sb] */
62400 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62401 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e3e0000 }
62403 /* bntst${X} ${BitBase16-16-s8}[fb] */
62406 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62407 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e3b00 }
62409 /* bntst${X} ${BitBase16-16-u16} */
62412 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62413 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e3f0000 }
62415 /* bnot${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62418 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62419 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd818 }
62421 /* bnot${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62424 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62425 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd098 }
62427 /* bnot${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62430 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62431 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd018 }
62433 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62436 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62437 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd21800 }
62439 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62442 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62443 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4180000 }
62445 /* bnot${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62448 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62449 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6180000 }
62451 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[sb] */
62454 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62455 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd29800 }
62457 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[sb] */
62460 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62461 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4980000 }
62463 /* bnot${X} ${BitBase32-16-s11-Unprefixed}[fb] */
62466 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62467 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d800 }
62469 /* bnot${X} ${BitBase32-16-s19-Unprefixed}[fb] */
62472 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62473 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d80000 }
62475 /* bnot${X} ${BitBase32-16-u19-Unprefixed} */
62478 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62479 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6d80000 }
62481 /* bnot${X} ${BitBase32-16-u27-Unprefixed} */
62484 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62485 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6980000 }
62487 /* bnot${G} $Bitno16R,$Bit16Rn */
62490 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62491 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ea000 }
62493 /* bnot${G} $Bitno16R,$Bit16An */
62496 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62497 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ea400 }
62499 /* bnot${G} ${Dsp-16-u8}[$Bit16An] */
62502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62503 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ea800 }
62505 /* bnot${G} ${BitBase16-16-u8}[sb] */
62508 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62509 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eaa00 }
62511 /* bnot${G} ${BitBase16-16-s8}[fb] */
62514 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62515 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7eab00 }
62517 /* bnot${S} ${BitBase16-8-u11-S}[sb] */
62520 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62521 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5000 }
62523 /* bnot${G} ${Dsp-16-u16}[$Bit16An] */
62526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62527 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7eac0000 }
62529 /* bnot${G} ${BitBase16-16-u16}[sb] */
62532 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62533 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7eae0000 }
62535 /* bnot${G} ${BitBase16-16-u16} */
62538 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62539 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7eaf0000 }
62541 /* bnot${G} [$Bit16An] */
62544 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62545 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ea6 }
62547 /* bnor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62550 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62551 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d830 }
62553 /* bnor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62556 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62557 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b0 }
62559 /* bnor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62562 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62563 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d030 }
62565 /* bnor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62568 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62569 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23000 }
62571 /* bnor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62574 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62575 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43000 }
62577 /* bnor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62580 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62581 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63000 }
62583 /* bnor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62586 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62587 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b000 }
62589 /* bnor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62592 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62593 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b000 }
62595 /* bnor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62598 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62599 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f000 }
62601 /* bnor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62604 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62605 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f000 }
62607 /* bnor${X} ${BitBase32-24-u19-Prefixed} */
62610 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62611 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f000 }
62613 /* bnor${X} ${BitBase32-24-u27-Prefixed} */
62616 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62617 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b000 }
62619 /* bnor${X} $Bitno16R,$Bit16Rn */
62622 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62623 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e7000 }
62625 /* bnor${X} $Bitno16R,$Bit16An */
62628 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62629 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e7400 }
62631 /* bnor${X} [$Bit16An] */
62634 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62635 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e76 }
62637 /* bnor${X} ${Dsp-16-u8}[$Bit16An] */
62640 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62641 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e7800 }
62643 /* bnor${X} ${Dsp-16-u16}[$Bit16An] */
62646 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62647 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e7c0000 }
62649 /* bnor${X} ${BitBase16-16-u8}[sb] */
62652 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62653 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e7a00 }
62655 /* bnor${X} ${BitBase16-16-u16}[sb] */
62658 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62659 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e7e0000 }
62661 /* bnor${X} ${BitBase16-16-s8}[fb] */
62664 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62665 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e7b00 }
62667 /* bnor${X} ${BitBase16-16-u16} */
62670 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62671 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e7f0000 }
62673 /* bnand${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62676 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62677 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d818 }
62679 /* bnand${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62682 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62683 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d098 }
62685 /* bnand${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62688 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62689 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d018 }
62691 /* bnand${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62694 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62695 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d21800 }
62697 /* bnand${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62700 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62701 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d41800 }
62703 /* bnand${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62706 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62707 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d61800 }
62709 /* bnand${X} ${BitBase32-24-u11-Prefixed}[sb] */
62712 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62713 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d29800 }
62715 /* bnand${X} ${BitBase32-24-u19-Prefixed}[sb] */
62718 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62719 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d49800 }
62721 /* bnand${X} ${BitBase32-24-s11-Prefixed}[fb] */
62724 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62725 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2d800 }
62727 /* bnand${X} ${BitBase32-24-s19-Prefixed}[fb] */
62730 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62731 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4d800 }
62733 /* bnand${X} ${BitBase32-24-u19-Prefixed} */
62736 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62737 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6d800 }
62739 /* bnand${X} ${BitBase32-24-u27-Prefixed} */
62742 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62743 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d69800 }
62745 /* bnand${X} $Bitno16R,$Bit16Rn */
62748 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62749 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e5000 }
62751 /* bnand${X} $Bitno16R,$Bit16An */
62754 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62755 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e5400 }
62757 /* bnand${X} [$Bit16An] */
62760 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62761 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e56 }
62763 /* bnand${X} ${Dsp-16-u8}[$Bit16An] */
62766 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62767 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e5800 }
62769 /* bnand${X} ${Dsp-16-u16}[$Bit16An] */
62772 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62773 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e5c0000 }
62775 /* bnand${X} ${BitBase16-16-u8}[sb] */
62778 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62779 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e5a00 }
62781 /* bnand${X} ${BitBase16-16-u16}[sb] */
62784 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62785 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e5e0000 }
62787 /* bnand${X} ${BitBase16-16-s8}[fb] */
62790 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62791 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e5b00 }
62793 /* bnand${X} ${BitBase16-16-u16} */
62796 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62797 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e5f0000 }
62799 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62802 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62803 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed
, { 0xd81000 }
62805 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62808 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62809 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed
, { 0xd09000 }
62811 /* bm${cond32-16} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62814 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62815 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed
, { 0xd01000 }
62817 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62820 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62821 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed
, { 0xd2100000 }
62823 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[sb] */
62826 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62827 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed
, { 0xd2900000 }
62829 /* bm${cond32-24} ${BitBase32-16-s11-Unprefixed}[fb] */
62832 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62833 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d00000 }
62835 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62838 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62839 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed
, { 0xd4100000 }
62841 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[sb] */
62844 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62845 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed
, { 0xd4900000 }
62847 /* bm${cond32-32} ${BitBase32-16-s19-Unprefixed}[fb] */
62850 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62851 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d00000 }
62853 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed} */
62856 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62857 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed
, { 0xd6d00000 }
62859 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62862 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62863 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed
, { 0xd6100000 }
62865 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed} */
62868 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62869 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed
, { 0xd6900000 }
62871 /* bm${cond16-24} $Bitno16R,$Bit16Rn */
62874 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62875 & ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct
, { 0x7e200000 }
62877 /* bm${cond16-24} $Bitno16R,$Bit16An */
62880 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62881 & ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct
, { 0x7e240000 }
62883 /* bm${cond16-24} ${Dsp-16-u8}[$Bit16An] */
62886 { { MNEM
, OP (COND16_24
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62887 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative
, { 0x7e280000 }
62889 /* bm${cond16-24} ${BitBase16-16-u8}[sb] */
62892 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62893 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative
, { 0x7e2a0000 }
62895 /* bm${cond16-24} ${BitBase16-16-s8}[fb] */
62898 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62899 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative
, { 0x7e2b0000 }
62901 /* bm${cond16-32} ${Dsp-16-u16}[$Bit16An] */
62904 { { MNEM
, OP (COND16_32
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62905 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative
, { 0x7e2c0000 }
62907 /* bm${cond16-32} ${BitBase16-16-u16}[sb] */
62910 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62911 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative
, { 0x7e2e0000 }
62913 /* bm${cond16-32} ${BitBase16-16-u16} */
62916 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), 0 } },
62917 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute
, { 0x7e2f0000 }
62919 /* bm${cond16-16} [$Bit16An] */
62922 { { MNEM
, OP (COND16_16
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62923 & ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect
, { 0x7e2600 }
62925 /* bitindex.w $Dst32RnUnprefixedHI */
62928 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
62929 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc92e }
62931 /* bitindex.w $Dst32AnUnprefixedHI */
62934 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
62935 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1ae }
62937 /* bitindex.w [$Dst32AnUnprefixed] */
62940 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62941 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc12e }
62943 /* bitindex.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
62946 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62947 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc32e00 }
62949 /* bitindex.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
62952 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62953 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc52e0000 }
62955 /* bitindex.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
62958 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62959 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc72e0000 }
62961 /* bitindex.w ${Dsp-16-u8}[sb] */
62964 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
62965 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3ae00 }
62967 /* bitindex.w ${Dsp-16-u16}[sb] */
62970 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
62971 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5ae0000 }
62973 /* bitindex.w ${Dsp-16-s8}[fb] */
62976 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
62977 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ee00 }
62979 /* bitindex.w ${Dsp-16-s16}[fb] */
62982 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
62983 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ee0000 }
62985 /* bitindex.w ${Dsp-16-u16} */
62988 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
62989 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ee0000 }
62991 /* bitindex.w ${Dsp-16-u24} */
62994 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
62995 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7ae0000 }
62997 /* bitindex.b $Dst32RnUnprefixedQI */
63000 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
63001 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc82e }
63003 /* bitindex.b $Dst32AnUnprefixedQI */
63006 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
63007 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0ae }
63009 /* bitindex.b [$Dst32AnUnprefixed] */
63012 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63013 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc02e }
63015 /* bitindex.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
63018 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63019 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22e00 }
63021 /* bitindex.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
63024 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63025 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc42e0000 }
63027 /* bitindex.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
63030 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63031 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc62e0000 }
63033 /* bitindex.b ${Dsp-16-u8}[sb] */
63036 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
63037 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2ae00 }
63039 /* bitindex.b ${Dsp-16-u16}[sb] */
63042 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
63043 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4ae0000 }
63045 /* bitindex.b ${Dsp-16-s8}[fb] */
63048 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
63049 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ee00 }
63051 /* bitindex.b ${Dsp-16-s16}[fb] */
63054 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
63055 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ee0000 }
63057 /* bitindex.b ${Dsp-16-u16} */
63060 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
63061 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ee0000 }
63063 /* bitindex.b ${Dsp-16-u24} */
63066 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
63067 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6ae0000 }
63069 /* bclr${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
63072 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
63073 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd830 }
63075 /* bclr${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
63078 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
63079 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b0 }
63081 /* bclr${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
63084 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63085 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd030 }
63087 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
63090 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63091 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23000 }
63093 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
63096 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63097 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4300000 }
63099 /* bclr${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
63102 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63103 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6300000 }
63105 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[sb] */
63108 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63109 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b000 }
63111 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[sb] */
63114 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63115 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b00000 }
63117 /* bclr${X} ${BitBase32-16-s11-Unprefixed}[fb] */
63120 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63121 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f000 }
63123 /* bclr${X} ${BitBase32-16-s19-Unprefixed}[fb] */
63126 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63127 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f00000 }
63129 /* bclr${X} ${BitBase32-16-u19-Unprefixed} */
63132 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
63133 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f00000 }
63135 /* bclr${X} ${BitBase32-16-u27-Unprefixed} */
63138 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
63139 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b00000 }
63141 /* bclr${G} $Bitno16R,$Bit16Rn */
63144 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63145 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e8000 }
63147 /* bclr${G} $Bitno16R,$Bit16An */
63150 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63151 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e8400 }
63153 /* bclr${G} ${Dsp-16-u8}[$Bit16An] */
63156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63157 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e8800 }
63159 /* bclr${G} ${BitBase16-16-u8}[sb] */
63162 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63163 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e8a00 }
63165 /* bclr${G} ${BitBase16-16-s8}[fb] */
63168 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63169 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e8b00 }
63171 /* bclr${S} ${BitBase16-8-u11-S}[sb] */
63174 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
63175 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4000 }
63177 /* bclr${G} ${Dsp-16-u16}[$Bit16An] */
63180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63181 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e8c0000 }
63183 /* bclr${G} ${BitBase16-16-u16}[sb] */
63186 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63187 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e8e0000 }
63189 /* bclr${G} ${BitBase16-16-u16} */
63192 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
63193 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e8f0000 }
63195 /* bclr${G} [$Bit16An] */
63198 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63199 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e86 }
63201 /* band${X} $Bitno32Prefixed,$Bit32RnPrefixed */
63204 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
63205 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d808 }
63207 /* band${X} $Bitno32Prefixed,$Bit32AnPrefixed */
63210 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
63211 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d088 }
63213 /* band${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
63216 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63217 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d008 }
63219 /* band${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
63222 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63223 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20800 }
63225 /* band${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
63228 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63229 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40800 }
63231 /* band${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
63234 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63235 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60800 }
63237 /* band${X} ${BitBase32-24-u11-Prefixed}[sb] */
63240 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
63241 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28800 }
63243 /* band${X} ${BitBase32-24-u19-Prefixed}[sb] */
63246 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
63247 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48800 }
63249 /* band${X} ${BitBase32-24-s11-Prefixed}[fb] */
63252 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63253 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c800 }
63255 /* band${X} ${BitBase32-24-s19-Prefixed}[fb] */
63258 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63259 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c800 }
63261 /* band${X} ${BitBase32-24-u19-Prefixed} */
63264 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
63265 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c800 }
63267 /* band${X} ${BitBase32-24-u27-Prefixed} */
63270 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
63271 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68800 }
63273 /* band${X} $Bitno16R,$Bit16Rn */
63276 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63277 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e4000 }
63279 /* band${X} $Bitno16R,$Bit16An */
63282 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63283 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e4400 }
63285 /* band${X} [$Bit16An] */
63288 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63289 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e46 }
63291 /* band${X} ${Dsp-16-u8}[$Bit16An] */
63294 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63295 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e4800 }
63297 /* band${X} ${Dsp-16-u16}[$Bit16An] */
63300 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63301 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e4c0000 }
63303 /* band${X} ${BitBase16-16-u8}[sb] */
63306 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63307 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e4a00 }
63309 /* band${X} ${BitBase16-16-u16}[sb] */
63312 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63313 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e4e0000 }
63315 /* band${X} ${BitBase16-16-s8}[fb] */
63318 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63319 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e4b00 }
63321 /* band${X} ${BitBase16-16-u16} */
63324 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
63325 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e4f0000 }
63327 /* and.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
63330 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63331 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6d000000 }
63333 /* and.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
63336 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63337 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7d000000 }
63339 /* and.w${S} #${Imm-24-HI},${Dsp-8-u16} */
63342 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
63343 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5d000000 }
63345 /* and.w${S} #${Imm-8-HI},r0 */
63348 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
63349 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x4d0000 }
63351 /* and.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
63354 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63355 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6c0000 }
63357 /* and.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
63360 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63361 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7c0000 }
63363 /* and.b${S} #${Imm-24-QI},${Dsp-8-u16} */
63366 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
63367 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5c000000 }
63369 /* and.b${S} #${Imm-8-QI},r0l */
63372 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
63373 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4c00 }
63375 /* and.b${S} ${SrcDst16-r0l-r0h-S-normal} */
63378 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
63379 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x10 }
63381 /* and.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
63384 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63385 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1100 }
63387 /* and.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
63390 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63391 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1200 }
63393 /* and.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
63396 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
63397 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x130000 }
63399 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63403 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990d00 }
63405 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
63408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63409 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992d00 }
63411 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
63414 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63415 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993d00 }
63417 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63421 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918d00 }
63423 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
63426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63427 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ad00 }
63429 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
63432 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63433 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bd00 }
63435 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63439 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910d00 }
63441 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
63444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63445 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912d00 }
63447 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
63450 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63451 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913d00 }
63453 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63457 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930d0000 }
63459 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63463 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932d0000 }
63465 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63468 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63469 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933d0000 }
63471 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63475 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950d0000 }
63477 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63481 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952d0000 }
63483 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63486 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63487 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953d0000 }
63489 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63493 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970d0000 }
63495 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63499 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972d0000 }
63501 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63504 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63505 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973d0000 }
63507 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
63510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63511 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938d0000 }
63513 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
63516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63517 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ad0000 }
63519 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
63522 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63523 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bd0000 }
63525 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
63528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63529 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958d0000 }
63531 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
63534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63535 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ad0000 }
63537 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
63540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63541 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bd0000 }
63543 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
63546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63547 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cd0000 }
63549 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
63552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63553 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ed0000 }
63555 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
63558 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63559 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fd0000 }
63561 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
63564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63565 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cd0000 }
63567 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
63570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63571 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ed0000 }
63573 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
63576 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63577 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fd0000 }
63579 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
63582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
63583 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cd0000 }
63585 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
63588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63589 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ed0000 }
63591 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
63594 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63595 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fd0000 }
63597 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
63600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
63601 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978d0000 }
63603 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
63606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63607 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ad0000 }
63609 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
63612 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63613 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bd0000 }
63615 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63619 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90d0000 }
63621 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
63624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63625 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92d0000 }
63627 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
63630 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63631 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93d0000 }
63633 /* and.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
63636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63637 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93d0000 }
63639 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63643 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18d0000 }
63645 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
63648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63649 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ad0000 }
63651 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
63654 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63655 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bd0000 }
63657 /* and.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
63660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63661 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bd0000 }
63663 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63667 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10d0000 }
63669 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
63672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63673 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12d0000 }
63675 /* and.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
63678 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63679 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13d0000 }
63681 /* and.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
63684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63685 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13d0000 }
63687 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63691 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30d0000 }
63693 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63697 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32d0000 }
63699 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63702 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63703 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33d0000 }
63705 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
63708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63709 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33d0000 }
63711 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63715 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50d0000 }
63717 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63721 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52d0000 }
63723 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63726 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63727 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53d0000 }
63729 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
63732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63733 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53d0000 }
63735 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63739 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70d0000 }
63741 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63745 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72d0000 }
63747 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63750 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63751 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73d0000 }
63753 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
63756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63757 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73d0000 }
63759 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
63762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63763 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38d0000 }
63765 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
63768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63769 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ad0000 }
63771 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
63774 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63775 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bd0000 }
63777 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
63780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63781 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bd0000 }
63783 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
63786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63787 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58d0000 }
63789 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
63792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63793 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ad0000 }
63795 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
63798 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63799 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bd0000 }
63801 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
63804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63805 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bd0000 }
63807 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
63810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63811 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cd0000 }
63813 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
63816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63817 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ed0000 }
63819 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
63822 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63823 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fd0000 }
63825 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
63828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63829 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fd0000 }
63831 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
63834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63835 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cd0000 }
63837 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
63840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63841 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ed0000 }
63843 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
63846 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63847 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fd0000 }
63849 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
63852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63853 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fd0000 }
63855 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
63858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
63859 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cd0000 }
63861 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
63864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63865 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ed0000 }
63867 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
63870 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63871 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fd0000 }
63873 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
63876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
63877 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fd0000 }
63879 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
63882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
63883 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78d0000 }
63885 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
63888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63889 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ad0000 }
63891 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
63894 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63895 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bd0000 }
63897 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
63900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
63901 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bd0000 }
63903 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63907 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90d0000 }
63909 /* and.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
63912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63913 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92d0000 }
63915 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63919 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18d0000 }
63921 /* and.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
63924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63925 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ad0000 }
63927 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63931 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10d0000 }
63933 /* and.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
63936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63937 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12d0000 }
63939 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
63942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63943 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30d0000 }
63945 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
63948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63949 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32d0000 }
63951 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
63954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63955 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50d0000 }
63957 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
63960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63961 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52d0000 }
63963 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
63966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63967 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70d0000 }
63969 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
63972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63973 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72d0000 }
63975 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
63978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63979 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38d0000 }
63981 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
63984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63985 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ad0000 }
63987 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
63990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
63991 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58d0000 }
63993 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
63996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
63997 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ad0000 }
63999 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
64002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64003 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cd0000 }
64005 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64009 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ed0000 }
64011 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64015 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cd0000 }
64017 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64021 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ed0000 }
64023 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64027 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cd0000 }
64029 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
64032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64033 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ed0000 }
64035 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64039 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78d0000 }
64041 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
64044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64045 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ad0000 }
64047 /* and.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
64050 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64051 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90d }
64053 /* and.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
64056 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64057 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892d }
64059 /* and.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
64062 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64063 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890d }
64065 /* and.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
64068 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64069 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18d }
64071 /* and.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
64074 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64075 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ad }
64077 /* and.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
64080 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64081 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818d }
64083 /* and.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
64086 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64087 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10d }
64089 /* and.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
64092 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64093 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812d }
64095 /* and.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64098 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64099 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810d }
64101 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64104 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64105 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30d00 }
64107 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64110 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64111 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832d00 }
64113 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64116 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64117 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830d00 }
64119 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64122 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64123 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50d0000 }
64125 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64128 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64129 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852d0000 }
64131 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
64134 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64135 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850d0000 }
64137 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64140 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64141 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70d0000 }
64143 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64146 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64147 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872d0000 }
64149 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
64152 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64153 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870d0000 }
64155 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
64158 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64159 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38d00 }
64161 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
64164 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64165 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ad00 }
64167 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
64170 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64171 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838d00 }
64173 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
64176 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64177 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58d0000 }
64179 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
64182 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64183 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ad0000 }
64185 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
64188 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64189 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858d0000 }
64191 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
64194 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64195 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cd00 }
64197 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
64200 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64201 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ed00 }
64203 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
64206 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64207 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cd00 }
64209 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
64212 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64213 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cd0000 }
64215 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
64218 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64219 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ed0000 }
64221 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
64224 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64225 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cd0000 }
64227 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
64230 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64231 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cd0000 }
64233 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
64236 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64237 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ed0000 }
64239 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
64242 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
64243 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cd0000 }
64245 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
64248 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64249 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78d0000 }
64251 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
64254 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64255 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ad0000 }
64257 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
64260 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
64261 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878d0000 }
64263 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64267 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980d00 }
64269 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
64272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64273 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982d00 }
64275 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
64278 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64279 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983d00 }
64281 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64285 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908d00 }
64287 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
64290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64291 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ad00 }
64293 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
64296 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64297 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bd00 }
64299 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64303 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900d00 }
64305 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
64308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64309 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902d00 }
64311 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
64314 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64315 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903d00 }
64317 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64321 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920d0000 }
64323 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64327 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922d0000 }
64329 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64332 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64333 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923d0000 }
64335 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64339 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940d0000 }
64341 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64345 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942d0000 }
64347 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64350 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64351 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943d0000 }
64353 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64357 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960d0000 }
64359 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64363 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962d0000 }
64365 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64368 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64369 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963d0000 }
64371 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
64374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64375 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928d0000 }
64377 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
64380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64381 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ad0000 }
64383 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
64386 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64387 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bd0000 }
64389 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
64392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64393 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948d0000 }
64395 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
64398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64399 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ad0000 }
64401 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
64404 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64405 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bd0000 }
64407 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
64410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64411 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cd0000 }
64413 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
64416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64417 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ed0000 }
64419 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
64422 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64423 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fd0000 }
64425 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
64428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64429 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cd0000 }
64431 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
64434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64435 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ed0000 }
64437 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
64440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64441 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fd0000 }
64443 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
64446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
64447 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cd0000 }
64449 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
64452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64453 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ed0000 }
64455 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
64458 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64459 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fd0000 }
64461 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
64464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
64465 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968d0000 }
64467 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
64470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64471 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ad0000 }
64473 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
64476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64477 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bd0000 }
64479 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64483 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80d0000 }
64485 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
64488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64489 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82d0000 }
64491 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
64494 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64495 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83d0000 }
64497 /* and.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
64500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64501 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83d0000 }
64503 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64507 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08d0000 }
64509 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
64512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64513 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ad0000 }
64515 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
64518 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64519 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bd0000 }
64521 /* and.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
64524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64525 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bd0000 }
64527 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64531 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00d0000 }
64533 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
64536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64537 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02d0000 }
64539 /* and.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
64542 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64543 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03d0000 }
64545 /* and.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
64548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64549 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03d0000 }
64551 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64555 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20d0000 }
64557 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64561 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22d0000 }
64563 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64566 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64567 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23d0000 }
64569 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
64572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64573 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23d0000 }
64575 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64579 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40d0000 }
64581 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64585 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42d0000 }
64587 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64590 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64591 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43d0000 }
64593 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
64596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64597 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43d0000 }
64599 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64603 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60d0000 }
64605 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64609 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62d0000 }
64611 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64614 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64615 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63d0000 }
64617 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
64620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64621 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63d0000 }
64623 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
64626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64627 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28d0000 }
64629 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
64632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64633 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ad0000 }
64635 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
64638 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64639 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bd0000 }
64641 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
64644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64645 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bd0000 }
64647 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
64650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64651 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48d0000 }
64653 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
64656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64657 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ad0000 }
64659 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
64662 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64663 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bd0000 }
64665 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
64668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64669 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bd0000 }
64671 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
64674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64675 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cd0000 }
64677 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
64680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64681 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ed0000 }
64683 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
64686 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64687 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fd0000 }
64689 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
64692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64693 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fd0000 }
64695 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
64698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64699 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cd0000 }
64701 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
64704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64705 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ed0000 }
64707 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
64710 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64711 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fd0000 }
64713 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
64716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64717 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fd0000 }
64719 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
64722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
64723 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cd0000 }
64725 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
64728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64729 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ed0000 }
64731 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
64734 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64735 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fd0000 }
64737 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
64740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
64741 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fd0000 }
64743 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
64746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
64747 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68d0000 }
64749 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
64752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64753 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ad0000 }
64755 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
64758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64759 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bd0000 }
64761 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
64764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
64765 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bd0000 }
64767 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64771 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80d0000 }
64773 /* and.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
64776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64777 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82d0000 }
64779 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64783 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08d0000 }
64785 /* and.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
64788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64789 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ad0000 }
64791 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64795 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00d0000 }
64797 /* and.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
64800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64801 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02d0000 }
64803 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
64806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64807 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20d0000 }
64809 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
64812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64813 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22d0000 }
64815 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
64818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64819 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40d0000 }
64821 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
64824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64825 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42d0000 }
64827 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
64830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64831 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60d0000 }
64833 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
64836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64837 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62d0000 }
64839 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
64842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64843 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28d0000 }
64845 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
64848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64849 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ad0000 }
64851 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
64854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64855 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48d0000 }
64857 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
64860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64861 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ad0000 }
64863 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
64866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64867 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cd0000 }
64869 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64873 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ed0000 }
64875 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64879 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cd0000 }
64881 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64885 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ed0000 }
64887 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64891 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cd0000 }
64893 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
64896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64897 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ed0000 }
64899 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64903 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68d0000 }
64905 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
64908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64909 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ad0000 }
64911 /* and.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
64914 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64915 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80d }
64917 /* and.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
64920 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64921 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882d }
64923 /* and.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64926 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64927 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880d }
64929 /* and.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
64932 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64933 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08d }
64935 /* and.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
64938 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64939 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ad }
64941 /* and.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64944 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64945 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808d }
64947 /* and.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
64950 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64951 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00d }
64953 /* and.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
64956 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64957 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802d }
64959 /* and.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64962 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64963 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800d }
64965 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64968 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64969 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20d00 }
64971 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64974 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64975 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822d00 }
64977 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64980 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64981 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820d00 }
64983 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64986 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64987 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40d0000 }
64989 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64992 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64993 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842d0000 }
64995 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
64998 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64999 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840d0000 }
65001 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65004 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65005 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60d0000 }
65007 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65010 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65011 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862d0000 }
65013 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
65016 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65017 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860d0000 }
65019 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
65022 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65023 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28d00 }
65025 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
65028 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65029 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ad00 }
65031 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
65034 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65035 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828d00 }
65037 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
65040 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65041 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48d0000 }
65043 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
65046 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65047 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ad0000 }
65049 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
65052 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65053 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848d0000 }
65055 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
65058 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65059 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cd00 }
65061 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
65064 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65065 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ed00 }
65067 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
65070 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65071 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cd00 }
65073 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
65076 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65077 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cd0000 }
65079 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
65082 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65083 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ed0000 }
65085 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
65088 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65089 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cd0000 }
65091 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
65094 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65095 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cd0000 }
65097 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
65100 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65101 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ed0000 }
65103 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
65106 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
65107 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cd0000 }
65109 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
65112 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65113 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68d0000 }
65115 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
65118 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65119 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ad0000 }
65121 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
65124 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
65125 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868d0000 }
65127 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
65130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65131 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x918000 }
65133 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
65136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65137 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91a000 }
65139 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
65142 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65143 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x91b000 }
65145 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
65148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65149 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x918400 }
65151 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
65154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65155 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x91a400 }
65157 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
65160 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65161 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x91b400 }
65163 /* and.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65167 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x918600 }
65169 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65173 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x91a600 }
65175 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65178 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65179 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x91b600 }
65181 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65185 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x91880000 }
65187 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65191 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91a80000 }
65193 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65196 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65197 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91b80000 }
65199 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65203 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x918c0000 }
65205 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65209 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91ac0000 }
65211 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65214 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65215 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91bc0000 }
65217 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65221 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x918a0000 }
65223 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65227 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91aa0000 }
65229 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65232 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65233 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91ba0000 }
65235 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65239 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x918e0000 }
65241 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65245 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91ae0000 }
65247 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65250 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65251 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91be0000 }
65253 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65257 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x918b0000 }
65259 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65263 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91ab0000 }
65265 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65268 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65269 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91bb0000 }
65271 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65275 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x918f0000 }
65277 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65281 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x91af0000 }
65283 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65286 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65287 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x91bf0000 }
65289 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
65292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65293 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x91c00000 }
65295 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
65298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65299 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91e00000 }
65301 /* and.w${G} ${Dsp-16-u16},$Dst16RnHI */
65304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
65305 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x91f00000 }
65307 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
65310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65311 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x91c40000 }
65313 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
65316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65317 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x91e40000 }
65319 /* and.w${G} ${Dsp-16-u16},$Dst16AnHI */
65322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
65323 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x91f40000 }
65325 /* and.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65329 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x91c60000 }
65331 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65335 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x91e60000 }
65337 /* and.w${G} ${Dsp-16-u16},[$Dst16An] */
65340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65341 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x91f60000 }
65343 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65347 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x91c80000 }
65349 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65353 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x91e80000 }
65355 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65359 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x91f80000 }
65361 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65365 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x91cc0000 }
65367 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65371 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x91ec0000 }
65373 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65377 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x91fc0000 }
65379 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65383 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ca0000 }
65385 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65389 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ea0000 }
65391 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65395 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x91fa0000 }
65397 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65401 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ce0000 }
65403 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65407 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ee0000 }
65409 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65413 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x91fe0000 }
65415 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65419 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91cb0000 }
65421 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65425 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91eb0000 }
65427 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65431 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x91fb0000 }
65433 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65437 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x91cf0000 }
65439 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65443 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x91ef0000 }
65445 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
65448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65449 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x91ff0000 }
65451 /* and.w${G} $Src16RnHI,$Dst16RnHI */
65454 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
65455 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9100 }
65457 /* and.w${G} $Src16AnHI,$Dst16RnHI */
65460 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
65461 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9140 }
65463 /* and.w${G} [$Src16An],$Dst16RnHI */
65466 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65467 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9160 }
65469 /* and.w${G} $Src16RnHI,$Dst16AnHI */
65472 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
65473 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9104 }
65475 /* and.w${G} $Src16AnHI,$Dst16AnHI */
65478 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
65479 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9144 }
65481 /* and.w${G} [$Src16An],$Dst16AnHI */
65484 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65485 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9164 }
65487 /* and.w${G} $Src16RnHI,[$Dst16An] */
65490 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65491 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9106 }
65493 /* and.w${G} $Src16AnHI,[$Dst16An] */
65496 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65497 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9146 }
65499 /* and.w${G} [$Src16An],[$Dst16An] */
65502 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65503 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9166 }
65505 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
65508 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65509 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x910800 }
65511 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
65514 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65515 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x914800 }
65517 /* and.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
65520 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65521 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x916800 }
65523 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
65526 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65527 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x910c0000 }
65529 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
65532 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65533 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x914c0000 }
65535 /* and.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
65538 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65539 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x916c0000 }
65541 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
65544 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65545 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x910a00 }
65547 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
65550 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65551 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x914a00 }
65553 /* and.w${G} [$Src16An],${Dsp-16-u8}[sb] */
65556 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65557 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x916a00 }
65559 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
65562 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65563 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x910e0000 }
65565 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
65568 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65569 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x914e0000 }
65571 /* and.w${G} [$Src16An],${Dsp-16-u16}[sb] */
65574 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65575 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x916e0000 }
65577 /* and.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
65580 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65581 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x910b00 }
65583 /* and.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
65586 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65587 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x914b00 }
65589 /* and.w${G} [$Src16An],${Dsp-16-s8}[fb] */
65592 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65593 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x916b00 }
65595 /* and.w${G} $Src16RnHI,${Dsp-16-u16} */
65598 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
65599 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x910f0000 }
65601 /* and.w${G} $Src16AnHI,${Dsp-16-u16} */
65604 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
65605 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x914f0000 }
65607 /* and.w${G} [$Src16An],${Dsp-16-u16} */
65610 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
65611 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x916f0000 }
65613 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
65616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65617 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x908000 }
65619 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
65622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65623 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90a000 }
65625 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
65628 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65629 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x90b000 }
65631 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
65634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65635 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x908400 }
65637 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
65640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65641 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x90a400 }
65643 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
65646 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65647 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x90b400 }
65649 /* and.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65653 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x908600 }
65655 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65659 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x90a600 }
65661 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65664 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65665 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x90b600 }
65667 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65671 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x90880000 }
65673 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65677 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90a80000 }
65679 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65682 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65683 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90b80000 }
65685 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65689 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x908c0000 }
65691 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65695 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90ac0000 }
65697 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65700 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65701 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90bc0000 }
65703 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65707 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x908a0000 }
65709 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65713 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90aa0000 }
65715 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65718 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65719 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90ba0000 }
65721 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65725 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x908e0000 }
65727 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65731 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90ae0000 }
65733 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65736 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65737 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90be0000 }
65739 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65743 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x908b0000 }
65745 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65749 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90ab0000 }
65751 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65754 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65755 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90bb0000 }
65757 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65761 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x908f0000 }
65763 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65767 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x90af0000 }
65769 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65772 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65773 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x90bf0000 }
65775 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
65778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65779 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x90c00000 }
65781 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
65784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65785 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90e00000 }
65787 /* and.b${G} ${Dsp-16-u16},$Dst16RnQI */
65790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
65791 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x90f00000 }
65793 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
65796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65797 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x90c40000 }
65799 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
65802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65803 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x90e40000 }
65805 /* and.b${G} ${Dsp-16-u16},$Dst16AnQI */
65808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
65809 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x90f40000 }
65811 /* and.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65815 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x90c60000 }
65817 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65821 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x90e60000 }
65823 /* and.b${G} ${Dsp-16-u16},[$Dst16An] */
65826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65827 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x90f60000 }
65829 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65833 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x90c80000 }
65835 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65839 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x90e80000 }
65841 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65845 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x90f80000 }
65847 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65851 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x90cc0000 }
65853 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65857 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x90ec0000 }
65859 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65863 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x90fc0000 }
65865 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65869 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ca0000 }
65871 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65875 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ea0000 }
65877 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65881 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x90fa0000 }
65883 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65887 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ce0000 }
65889 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65893 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ee0000 }
65895 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65899 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x90fe0000 }
65901 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65905 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90cb0000 }
65907 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65911 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90eb0000 }
65913 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65917 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x90fb0000 }
65919 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65923 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x90cf0000 }
65925 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65929 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x90ef0000 }
65931 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
65934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65935 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x90ff0000 }
65937 /* and.b${G} $Src16RnQI,$Dst16RnQI */
65940 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
65941 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9000 }
65943 /* and.b${G} $Src16AnQI,$Dst16RnQI */
65946 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
65947 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9040 }
65949 /* and.b${G} [$Src16An],$Dst16RnQI */
65952 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65953 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9060 }
65955 /* and.b${G} $Src16RnQI,$Dst16AnQI */
65958 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
65959 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9004 }
65961 /* and.b${G} $Src16AnQI,$Dst16AnQI */
65964 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
65965 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9044 }
65967 /* and.b${G} [$Src16An],$Dst16AnQI */
65970 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65971 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9064 }
65973 /* and.b${G} $Src16RnQI,[$Dst16An] */
65976 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65977 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9006 }
65979 /* and.b${G} $Src16AnQI,[$Dst16An] */
65982 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65983 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9046 }
65985 /* and.b${G} [$Src16An],[$Dst16An] */
65988 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65989 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9066 }
65991 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
65994 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65995 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x900800 }
65997 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
66000 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66001 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x904800 }
66003 /* and.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
66006 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66007 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x906800 }
66009 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
66012 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66013 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x900c0000 }
66015 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
66018 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66019 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x904c0000 }
66021 /* and.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
66024 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66025 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x906c0000 }
66027 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
66030 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66031 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x900a00 }
66033 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
66036 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66037 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x904a00 }
66039 /* and.b${G} [$Src16An],${Dsp-16-u8}[sb] */
66042 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66043 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x906a00 }
66045 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
66048 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66049 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x900e0000 }
66051 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
66054 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66055 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x904e0000 }
66057 /* and.b${G} [$Src16An],${Dsp-16-u16}[sb] */
66060 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66061 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x906e0000 }
66063 /* and.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
66066 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66067 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x900b00 }
66069 /* and.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
66072 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66073 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x904b00 }
66075 /* and.b${G} [$Src16An],${Dsp-16-s8}[fb] */
66078 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66079 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x906b00 }
66081 /* and.b${G} $Src16RnQI,${Dsp-16-u16} */
66084 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
66085 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x900f0000 }
66087 /* and.b${G} $Src16AnQI,${Dsp-16-u16} */
66090 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
66091 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x904f0000 }
66093 /* and.b${G} [$Src16An],${Dsp-16-u16} */
66096 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
66097 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x906f0000 }
66099 /* and.b${S} #${Imm-8-QI},r0l */
66102 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
66103 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9400 }
66105 /* and.b${S} #${Imm-8-QI},r0h */
66108 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
66109 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9300 }
66111 /* and.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
66114 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66115 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x950000 }
66117 /* and.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
66120 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66121 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x960000 }
66123 /* and.b${S} #${Imm-8-QI},${Dsp-16-u16} */
66126 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
66127 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x97000000 }
66129 /* and.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
66132 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
66133 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893f0000 }
66135 /* and.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
66138 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
66139 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81bf0000 }
66141 /* and.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
66144 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66145 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813f0000 }
66147 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66150 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66151 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833f0000 }
66153 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66156 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66157 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83bf0000 }
66159 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66162 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66163 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ff0000 }
66165 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66168 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66169 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853f0000 }
66171 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66174 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66175 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85bf0000 }
66177 /* and.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
66180 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66181 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ff0000 }
66183 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66186 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66187 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ff0000 }
66189 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66192 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66193 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873f0000 }
66195 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24} */
66198 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
66199 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87bf0000 }
66201 /* and.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
66204 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
66205 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883f00 }
66207 /* and.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
66210 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
66211 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80bf00 }
66213 /* and.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
66216 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66217 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803f00 }
66219 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66222 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66223 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823f0000 }
66225 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66228 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66229 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82bf0000 }
66231 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66234 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66235 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ff0000 }
66237 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66240 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66241 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843f0000 }
66243 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66246 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66247 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84bf0000 }
66249 /* and.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
66252 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66253 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ff0000 }
66255 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66258 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66259 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ff0000 }
66261 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66264 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66265 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863f0000 }
66267 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24} */
66270 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
66271 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86bf0000 }
66273 /* and.w${G} #${Imm-16-HI},$Dst16RnHI */
66276 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
66277 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77200000 }
66279 /* and.w${G} #${Imm-16-HI},$Dst16AnHI */
66282 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
66283 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77240000 }
66285 /* and.w${G} #${Imm-16-HI},[$Dst16An] */
66288 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
66289 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77260000 }
66291 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
66294 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66295 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77280000 }
66297 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66300 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66301 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x772a0000 }
66303 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66306 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66307 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x772b0000 }
66309 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
66312 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66313 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x772c0000 }
66315 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66318 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66319 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x772e0000 }
66321 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66324 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66325 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x772f0000 }
66327 /* and.b${G} #${Imm-16-QI},$Dst16RnQI */
66330 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
66331 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x762000 }
66333 /* and.b${G} #${Imm-16-QI},$Dst16AnQI */
66336 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
66337 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x762400 }
66339 /* and.b${G} #${Imm-16-QI},[$Dst16An] */
66342 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
66343 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x762600 }
66345 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
66348 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66349 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76280000 }
66351 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66354 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66355 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x762a0000 }
66357 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66360 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66361 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x762b0000 }
66363 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
66366 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66367 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x762c0000 }
66369 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66372 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66373 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x762e0000 }
66375 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66378 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66379 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x762f0000 }
66381 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66384 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66385 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
66387 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66390 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66391 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
66393 /* adjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66396 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66397 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
66399 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66402 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66403 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
66405 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66408 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66409 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
66411 /* adjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66414 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66415 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
66417 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66420 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66421 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
66423 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66426 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66427 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
66429 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66432 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66433 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
66435 /* adjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */
66438 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66439 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
66441 /* adjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */
66444 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66445 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
66447 /* adjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66450 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66451 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
66453 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66456 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66457 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
66459 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66462 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66463 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
66465 /* adjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66468 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66469 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
66471 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66474 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66475 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
66477 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66480 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66481 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
66483 /* adjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66486 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66487 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
66489 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66492 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66493 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
66495 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66498 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66499 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
66501 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66504 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66505 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
66507 /* adjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */
66510 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66511 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
66513 /* adjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */
66516 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66517 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
66519 /* adjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66522 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66523 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
66525 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66528 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66529 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
66531 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66534 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66535 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
66537 /* adjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66540 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66541 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
66543 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66546 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66547 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
66549 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66552 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66553 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
66555 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66558 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66559 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
66561 /* adjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */
66564 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
66565 & ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
66567 /* adjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */
66570 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
66571 & ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
66573 /* adjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66576 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66577 & ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
66579 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66582 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66583 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
66585 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66588 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66589 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
66591 /* adjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66594 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66595 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
66597 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66600 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66601 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
66603 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66606 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66607 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
66609 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66612 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66613 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
66615 /* adjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */
66618 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
66619 & ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
66621 /* adjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */
66624 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
66625 & ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
66627 /* adjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66630 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66631 & ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
66633 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66636 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66637 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980200 }
66639 /* addx${X} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
66642 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66643 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982200 }
66645 /* addx${X} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
66648 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66649 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983200 }
66651 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66654 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66655 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908200 }
66657 /* addx${X} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
66660 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66661 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a200 }
66663 /* addx${X} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
66666 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66667 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b200 }
66669 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66672 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66673 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900200 }
66675 /* addx${X} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
66678 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66679 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902200 }
66681 /* addx${X} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
66684 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66685 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903200 }
66687 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66690 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66691 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92020000 }
66693 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66696 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66697 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92220000 }
66699 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66702 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66703 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92320000 }
66705 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66708 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66709 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94020000 }
66711 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66714 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66715 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94220000 }
66717 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66720 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66721 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94320000 }
66723 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66726 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66727 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96020000 }
66729 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66732 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66733 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96220000 }
66735 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66738 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66739 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96320000 }
66741 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
66744 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66745 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92820000 }
66747 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
66750 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66751 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a20000 }
66753 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
66756 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66757 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b20000 }
66759 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
66762 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66763 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94820000 }
66765 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
66768 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66769 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a20000 }
66771 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
66774 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66775 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b20000 }
66777 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
66780 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66781 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c20000 }
66783 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
66786 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66787 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e20000 }
66789 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
66792 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66793 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f20000 }
66795 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
66798 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66799 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c20000 }
66801 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
66804 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66805 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e20000 }
66807 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
66810 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66811 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f20000 }
66813 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
66816 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
66817 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c20000 }
66819 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
66822 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66823 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e20000 }
66825 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
66828 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66829 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f20000 }
66831 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
66834 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
66835 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96820000 }
66837 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
66840 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66841 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a20000 }
66843 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
66846 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66847 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b20000 }
66849 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66852 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66853 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8020000 }
66855 /* addx${X} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
66858 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66859 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8220000 }
66861 /* addx${X} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
66864 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66865 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8320000 }
66867 /* addx${X} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
66870 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66871 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8320000 }
66873 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66876 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66877 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0820000 }
66879 /* addx${X} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
66882 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66883 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a20000 }
66885 /* addx${X} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
66888 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66889 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b20000 }
66891 /* addx${X} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
66894 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66895 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b20000 }
66897 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66900 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66901 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0020000 }
66903 /* addx${X} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
66906 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66907 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0220000 }
66909 /* addx${X} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
66912 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66913 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0320000 }
66915 /* addx${X} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
66918 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66919 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0320000 }
66921 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66924 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66925 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2020000 }
66927 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66930 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66931 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2220000 }
66933 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66936 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66937 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2320000 }
66939 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
66942 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66943 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2320000 }
66945 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66948 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66949 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4020000 }
66951 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66954 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66955 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4220000 }
66957 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66960 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66961 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4320000 }
66963 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
66966 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66967 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4320000 }
66969 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66972 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66973 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6020000 }
66975 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66978 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66979 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6220000 }
66981 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66984 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66985 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6320000 }
66987 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
66990 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66991 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6320000 }
66993 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
66996 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
66997 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2820000 }
66999 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
67002 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67003 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a20000 }
67005 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
67008 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67009 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b20000 }
67011 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
67014 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67015 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b20000 }
67017 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
67020 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67021 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4820000 }
67023 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
67026 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67027 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a20000 }
67029 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
67032 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67033 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b20000 }
67035 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
67038 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67039 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b20000 }
67041 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
67044 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67045 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c20000 }
67047 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
67050 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67051 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e20000 }
67053 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
67056 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67057 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f20000 }
67059 /* addx${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
67062 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67063 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f20000 }
67065 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
67068 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67069 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c20000 }
67071 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
67074 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67075 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e20000 }
67077 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
67080 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67081 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f20000 }
67083 /* addx${X} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
67086 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67087 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f20000 }
67089 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
67092 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67093 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c20000 }
67095 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
67098 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67099 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e20000 }
67101 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
67104 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67105 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f20000 }
67107 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16} */
67110 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
67111 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f20000 }
67113 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
67116 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67117 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6820000 }
67119 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
67122 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67123 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a20000 }
67125 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
67128 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67129 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b20000 }
67131 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24} */
67134 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
67135 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b20000 }
67137 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67140 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67141 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8020000 }
67143 /* addx${X} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
67146 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67147 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8220000 }
67149 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67152 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67153 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0820000 }
67155 /* addx${X} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
67158 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67159 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a20000 }
67161 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67164 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67165 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0020000 }
67167 /* addx${X} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
67170 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67171 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0220000 }
67173 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
67176 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67177 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2020000 }
67179 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
67182 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67183 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2220000 }
67185 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
67188 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67189 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4020000 }
67191 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
67194 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67195 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4220000 }
67197 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
67200 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67201 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6020000 }
67203 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
67206 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67207 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6220000 }
67209 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
67212 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67213 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2820000 }
67215 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
67218 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67219 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a20000 }
67221 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
67224 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67225 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4820000 }
67227 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
67230 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67231 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a20000 }
67233 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
67236 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67237 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c20000 }
67239 /* addx${X} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
67242 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67243 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e20000 }
67245 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
67248 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67249 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c20000 }
67251 /* addx${X} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
67254 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67255 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e20000 }
67257 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
67260 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
67261 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c20000 }
67263 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16} */
67266 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
67267 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e20000 }
67269 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
67272 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
67273 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6820000 }
67275 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24} */
67278 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
67279 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a20000 }
67281 /* addx${X} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
67284 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67285 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc802 }
67287 /* addx${X} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
67290 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67291 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8822 }
67293 /* addx${X} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67296 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67297 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8802 }
67299 /* addx${X} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
67302 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67303 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc082 }
67305 /* addx${X} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
67308 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67309 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a2 }
67311 /* addx${X} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67314 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67315 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8082 }
67317 /* addx${X} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
67320 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67321 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc002 }
67323 /* addx${X} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
67326 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67327 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8022 }
67329 /* addx${X} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67332 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67333 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8002 }
67335 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67338 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67339 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20200 }
67341 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67344 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67345 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822200 }
67347 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
67350 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67351 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820200 }
67353 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67356 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67357 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4020000 }
67359 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67362 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67363 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84220000 }
67365 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
67368 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67369 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84020000 }
67371 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67374 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67375 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6020000 }
67377 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67380 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67381 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86220000 }
67383 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
67386 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67387 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86020000 }
67389 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
67392 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67393 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28200 }
67395 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
67398 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67399 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a200 }
67401 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
67404 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67405 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828200 }
67407 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
67410 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67411 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4820000 }
67413 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
67416 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67417 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a20000 }
67419 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
67422 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67423 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84820000 }
67425 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
67428 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67429 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c200 }
67431 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
67434 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67435 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e200 }
67437 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
67440 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67441 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c200 }
67443 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
67446 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67447 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c20000 }
67449 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
67452 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67453 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e20000 }
67455 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
67458 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67459 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c20000 }
67461 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16} */
67464 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67465 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c20000 }
67467 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16} */
67470 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67471 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e20000 }
67473 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16} */
67476 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
67477 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c20000 }
67479 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24} */
67482 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67483 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6820000 }
67485 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24} */
67488 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67489 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a20000 }
67491 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24} */
67494 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
67495 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86820000 }
67497 /* addx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
67500 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67501 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x881100 }
67503 /* addx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
67506 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67507 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x809100 }
67509 /* addx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
67512 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67513 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x801100 }
67515 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
67518 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67519 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82110000 }
67521 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
67524 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67525 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82910000 }
67527 /* addx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
67530 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67531 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82d10000 }
67533 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
67536 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67537 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84110000 }
67539 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
67542 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67543 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84910000 }
67545 /* addx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
67548 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67549 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84d10000 }
67551 /* addx${X} #${Imm-32-QI},${Dsp-16-u16} */
67554 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
67555 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86d10000 }
67557 /* addx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
67560 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67561 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86110000 }
67563 /* addx${X} #${Imm-40-QI},${Dsp-16-u24} */
67566 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
67567 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86910000 }
67569 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67573 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990000 }
67575 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
67578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67579 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992000 }
67581 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
67584 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67585 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993000 }
67587 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67590 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67591 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918000 }
67593 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
67596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67597 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a000 }
67599 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
67602 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67603 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b000 }
67605 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67608 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67609 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910000 }
67611 /* dadd.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
67614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67615 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912000 }
67617 /* dadd.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
67620 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67621 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913000 }
67623 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
67626 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67627 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930000 }
67629 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67632 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67633 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932000 }
67635 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67638 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67639 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933000 }
67641 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
67644 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67645 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950000 }
67647 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67650 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67651 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952000 }
67653 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67656 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67657 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953000 }
67659 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
67662 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67663 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970000 }
67665 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67668 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67669 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972000 }
67671 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67674 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67675 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973000 }
67677 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
67680 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67681 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938000 }
67683 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
67686 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67687 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a000 }
67689 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
67692 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67693 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b000 }
67695 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
67698 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67699 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958000 }
67701 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
67704 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67705 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a000 }
67707 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
67710 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67711 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b000 }
67713 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
67716 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67717 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c000 }
67719 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
67722 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67723 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e000 }
67725 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
67728 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67729 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f000 }
67731 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
67734 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67735 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c000 }
67737 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
67740 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67741 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e000 }
67743 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
67746 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67747 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f000 }
67749 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
67752 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67753 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c000 }
67755 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
67758 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67759 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e000 }
67761 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
67764 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67765 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f000 }
67767 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
67770 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67771 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978000 }
67773 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
67776 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67777 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a000 }
67779 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
67782 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67783 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b000 }
67785 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67788 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67789 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90000 }
67791 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
67794 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67795 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92000 }
67797 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
67800 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67801 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93000 }
67803 /* dadd.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
67806 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
67807 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93000 }
67809 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67812 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67813 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18000 }
67815 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
67818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67819 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a000 }
67821 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
67824 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67825 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b000 }
67827 /* dadd.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
67830 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
67831 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b000 }
67833 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67836 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67837 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10000 }
67839 /* dadd.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
67842 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67843 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12000 }
67845 /* dadd.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
67848 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67849 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13000 }
67851 /* dadd.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
67854 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67855 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13000 }
67857 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
67860 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67861 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30000 }
67863 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67866 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67867 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32000 }
67869 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67872 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67873 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33000 }
67875 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
67878 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67879 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33000 }
67881 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
67884 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67885 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50000 }
67887 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67890 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67891 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52000 }
67893 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67896 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67897 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53000 }
67899 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
67902 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67903 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53000 }
67905 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
67908 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67909 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70000 }
67911 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67914 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67915 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72000 }
67917 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67920 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67921 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73000 }
67923 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
67926 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67927 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73000 }
67929 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
67932 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67933 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38000 }
67935 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
67938 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67939 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a000 }
67941 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
67944 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67945 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b000 }
67947 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
67950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67951 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b000 }
67953 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
67956 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67957 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58000 }
67959 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
67962 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67963 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a000 }
67965 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
67968 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67969 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b000 }
67971 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
67974 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67975 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b000 }
67977 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
67980 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67981 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c000 }
67983 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
67986 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67987 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e000 }
67989 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
67992 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67993 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f000 }
67995 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
67998 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67999 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f000 }
68001 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68005 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c000 }
68007 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68010 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68011 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e000 }
68013 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68016 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68017 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f000 }
68019 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68023 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f000 }
68025 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68028 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68029 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c000 }
68031 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68034 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68035 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e000 }
68037 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68040 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68041 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f000 }
68043 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
68046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68047 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f000 }
68049 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68052 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68053 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78000 }
68055 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68059 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a000 }
68061 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68064 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68065 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b000 }
68067 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
68070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68071 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b000 }
68073 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
68076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68077 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90000 }
68079 /* dadd.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
68082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68083 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92000 }
68085 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
68088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68089 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18000 }
68091 /* dadd.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
68094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68095 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a000 }
68097 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68100 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68101 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10000 }
68103 /* dadd.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68106 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68107 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12000 }
68109 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68113 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30000 }
68115 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68119 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32000 }
68121 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68125 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50000 }
68127 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
68130 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68131 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52000 }
68133 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
68136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68137 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70000 }
68139 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
68142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68143 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72000 }
68145 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
68148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68149 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38000 }
68151 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
68154 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68155 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a000 }
68157 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
68160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68161 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58000 }
68163 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
68166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68167 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a000 }
68169 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
68172 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68173 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c000 }
68175 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
68178 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68179 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e000 }
68181 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
68184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68185 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c000 }
68187 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
68190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68191 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e000 }
68193 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
68196 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
68197 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c000 }
68199 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
68202 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
68203 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e000 }
68205 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
68208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
68209 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78000 }
68211 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
68214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
68215 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a000 }
68217 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
68220 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68221 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c900 }
68223 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
68226 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68227 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18920 }
68229 /* dadd.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
68232 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68233 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18900 }
68235 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
68238 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68239 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c180 }
68241 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
68244 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68245 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a0 }
68247 /* dadd.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
68250 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68251 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18180 }
68253 /* dadd.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
68256 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68257 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c100 }
68259 /* dadd.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
68262 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68263 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18120 }
68265 /* dadd.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
68268 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68269 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18100 }
68271 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68274 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68275 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30000 }
68277 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68280 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68281 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832000 }
68283 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
68286 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68287 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830000 }
68289 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68292 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68293 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50000 }
68295 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68298 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68299 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852000 }
68301 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
68304 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68305 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850000 }
68307 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68310 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68311 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70000 }
68313 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68316 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68317 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872000 }
68319 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
68322 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68323 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870000 }
68325 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
68328 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68329 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38000 }
68331 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
68334 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68335 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a000 }
68337 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
68340 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68341 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838000 }
68343 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
68346 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68347 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58000 }
68349 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
68352 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68353 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a000 }
68355 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
68358 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68359 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858000 }
68361 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
68364 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68365 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c000 }
68367 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
68370 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68371 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e000 }
68373 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
68376 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68377 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c000 }
68379 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
68382 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68383 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c000 }
68385 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
68388 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68389 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e000 }
68391 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
68394 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68395 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c000 }
68397 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
68400 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68401 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c000 }
68403 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
68406 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68407 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e000 }
68409 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
68412 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
68413 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c000 }
68415 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
68418 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68419 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78000 }
68421 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
68424 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68425 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a000 }
68427 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
68430 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
68431 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878000 }
68433 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68436 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68437 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980000 }
68439 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
68442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68443 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982000 }
68445 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
68448 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68449 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983000 }
68451 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68454 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68455 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908000 }
68457 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
68460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68461 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a000 }
68463 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
68466 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68467 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b000 }
68469 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68473 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900000 }
68475 /* dadd.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
68478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68479 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902000 }
68481 /* dadd.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
68484 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68485 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903000 }
68487 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
68490 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68491 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920000 }
68493 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68497 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922000 }
68499 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68502 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68503 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923000 }
68505 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
68508 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68509 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940000 }
68511 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68515 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942000 }
68517 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68520 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68521 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943000 }
68523 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
68526 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68527 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960000 }
68529 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68533 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962000 }
68535 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68538 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68539 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963000 }
68541 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
68544 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68545 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928000 }
68547 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
68550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68551 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a000 }
68553 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
68556 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68557 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b000 }
68559 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
68562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68563 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948000 }
68565 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
68568 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68569 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a000 }
68571 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
68574 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68575 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b000 }
68577 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
68580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68581 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c000 }
68583 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
68586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68587 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e000 }
68589 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
68592 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68593 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f000 }
68595 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
68598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68599 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c000 }
68601 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
68604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68605 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e000 }
68607 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
68610 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68611 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f000 }
68613 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
68616 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
68617 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c000 }
68619 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
68622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68623 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e000 }
68625 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
68628 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68629 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f000 }
68631 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
68634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
68635 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968000 }
68637 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
68640 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68641 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a000 }
68643 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
68646 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68647 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b000 }
68649 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68653 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80000 }
68655 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
68658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68659 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82000 }
68661 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
68664 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68665 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83000 }
68667 /* dadd.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
68670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68671 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83000 }
68673 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68677 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08000 }
68679 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
68682 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68683 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a000 }
68685 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
68688 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68689 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b000 }
68691 /* dadd.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
68694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68695 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b000 }
68697 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68700 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68701 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00000 }
68703 /* dadd.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
68706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68707 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02000 }
68709 /* dadd.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
68712 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68713 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03000 }
68715 /* dadd.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
68718 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68719 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03000 }
68721 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
68724 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68725 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20000 }
68727 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68730 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68731 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22000 }
68733 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68736 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68737 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23000 }
68739 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
68742 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68743 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23000 }
68745 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
68748 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68749 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40000 }
68751 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68754 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68755 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42000 }
68757 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68760 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68761 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43000 }
68763 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
68766 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68767 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43000 }
68769 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
68772 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68773 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60000 }
68775 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68778 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68779 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62000 }
68781 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68784 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68785 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63000 }
68787 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
68790 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68791 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63000 }
68793 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
68796 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68797 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28000 }
68799 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
68802 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68803 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a000 }
68805 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
68808 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68809 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b000 }
68811 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
68814 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68815 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b000 }
68817 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
68820 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68821 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48000 }
68823 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
68826 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68827 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a000 }
68829 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
68832 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68833 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b000 }
68835 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
68838 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68839 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b000 }
68841 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
68844 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68845 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c000 }
68847 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
68850 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68851 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e000 }
68853 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
68856 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68857 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f000 }
68859 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
68862 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68863 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f000 }
68865 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68868 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68869 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c000 }
68871 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68874 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68875 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e000 }
68877 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68880 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68881 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f000 }
68883 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68887 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f000 }
68889 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68893 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c000 }
68895 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68898 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68899 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e000 }
68901 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68904 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68905 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f000 }
68907 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
68910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68911 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f000 }
68913 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68916 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68917 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68000 }
68919 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68923 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a000 }
68925 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68928 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68929 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b000 }
68931 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
68934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68935 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b000 }
68937 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68941 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80000 }
68943 /* dadd.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
68946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68947 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82000 }
68949 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68952 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68953 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08000 }
68955 /* dadd.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
68958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68959 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a000 }
68961 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68964 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68965 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00000 }
68967 /* dadd.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68970 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68971 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02000 }
68973 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68976 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68977 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20000 }
68979 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68982 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68983 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22000 }
68985 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68988 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68989 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40000 }
68991 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
68994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68995 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42000 }
68997 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
69000 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69001 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60000 }
69003 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
69006 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69007 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62000 }
69009 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
69012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69013 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28000 }
69015 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
69018 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69019 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a000 }
69021 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
69024 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69025 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48000 }
69027 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
69030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69031 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a000 }
69033 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
69036 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69037 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c000 }
69039 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
69042 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69043 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e000 }
69045 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
69048 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69049 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c000 }
69051 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
69054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69055 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e000 }
69057 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
69060 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
69061 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c000 }
69063 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
69066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
69067 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e000 }
69069 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
69072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
69073 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68000 }
69075 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
69078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
69079 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a000 }
69081 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
69084 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69085 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c800 }
69087 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
69090 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69091 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18820 }
69093 /* dadd.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
69096 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
69097 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18800 }
69099 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
69102 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69103 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c080 }
69105 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
69108 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69109 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a0 }
69111 /* dadd.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
69114 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
69115 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18080 }
69117 /* dadd.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
69120 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69121 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c000 }
69123 /* dadd.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
69126 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69127 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18020 }
69129 /* dadd.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
69132 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69133 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18000 }
69135 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69138 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69139 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20000 }
69141 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69144 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69145 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822000 }
69147 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
69150 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69151 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820000 }
69153 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69156 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69157 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40000 }
69159 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69162 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69163 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842000 }
69165 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
69168 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69169 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840000 }
69171 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69174 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69175 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60000 }
69177 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69180 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69181 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862000 }
69183 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
69186 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69187 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860000 }
69189 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
69192 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69193 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28000 }
69195 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
69198 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69199 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a000 }
69201 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
69204 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69205 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828000 }
69207 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
69210 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69211 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48000 }
69213 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
69216 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69217 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a000 }
69219 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
69222 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69223 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848000 }
69225 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
69228 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69229 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c000 }
69231 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
69234 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69235 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e000 }
69237 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
69240 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69241 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c000 }
69243 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
69246 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69247 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c000 }
69249 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
69252 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69253 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e000 }
69255 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
69258 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69259 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c000 }
69261 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
69264 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69265 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c000 }
69267 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
69270 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69271 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e000 }
69273 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
69276 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
69277 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c000 }
69279 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
69282 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69283 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68000 }
69285 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
69288 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69289 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a000 }
69291 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
69294 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
69295 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868000 }
69297 /* dadd.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
69300 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69301 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1891e00 }
69303 /* dadd.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
69306 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69307 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1819e00 }
69309 /* dadd.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
69312 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69313 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1811e00 }
69315 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69318 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69319 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1831e00 }
69321 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
69324 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69325 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1839e00 }
69327 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
69330 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69331 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183de00 }
69333 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69336 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69337 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1851e00 }
69339 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
69342 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69343 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1859e00 }
69345 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
69348 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69349 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185de00 }
69351 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16} */
69354 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
69355 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187de00 }
69357 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69360 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69361 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1871e00 }
69363 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24} */
69366 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
69367 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1879e00 }
69369 /* dadd.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
69372 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69373 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1881e00 }
69375 /* dadd.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
69378 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69379 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1809e00 }
69381 /* dadd.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
69384 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69385 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1801e00 }
69387 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69390 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69391 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1821e00 }
69393 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
69396 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69397 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1829e00 }
69399 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
69402 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69403 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182de00 }
69405 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69408 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69409 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1841e00 }
69411 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
69414 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69415 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1849e00 }
69417 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
69420 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69421 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184de00 }
69423 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16} */
69426 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
69427 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186de00 }
69429 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69432 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69433 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1861e00 }
69435 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24} */
69438 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
69439 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1869e00 }
69441 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69445 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990800 }
69447 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
69450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69451 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992800 }
69453 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
69456 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69457 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993800 }
69459 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69463 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918800 }
69465 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
69468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69469 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a800 }
69471 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
69474 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69475 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b800 }
69477 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69481 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910800 }
69483 /* dadc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
69486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69487 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912800 }
69489 /* dadc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
69492 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69493 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913800 }
69495 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
69498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69499 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930800 }
69501 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69505 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932800 }
69507 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69510 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69511 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933800 }
69513 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
69516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69517 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950800 }
69519 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69523 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952800 }
69525 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69528 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69529 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953800 }
69531 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
69534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69535 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970800 }
69537 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69541 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972800 }
69543 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69546 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69547 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973800 }
69549 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
69552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69553 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938800 }
69555 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
69558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69559 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a800 }
69561 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
69564 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69565 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b800 }
69567 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
69570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69571 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958800 }
69573 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
69576 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69577 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a800 }
69579 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
69582 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69583 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b800 }
69585 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
69588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69589 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c800 }
69591 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
69594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69595 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e800 }
69597 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
69600 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69601 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f800 }
69603 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
69606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69607 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c800 }
69609 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
69612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69613 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e800 }
69615 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
69618 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69619 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f800 }
69621 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
69624 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
69625 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c800 }
69627 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
69630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69631 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e800 }
69633 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
69636 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69637 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f800 }
69639 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
69642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
69643 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978800 }
69645 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
69648 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69649 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a800 }
69651 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
69654 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69655 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b800 }
69657 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69661 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90800 }
69663 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
69666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69667 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92800 }
69669 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
69672 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69673 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93800 }
69675 /* dadc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
69678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69679 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93800 }
69681 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69685 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18800 }
69687 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
69690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69691 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a800 }
69693 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
69696 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69697 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b800 }
69699 /* dadc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
69702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69703 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b800 }
69705 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69709 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10800 }
69711 /* dadc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
69714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69715 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12800 }
69717 /* dadc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
69720 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69721 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13800 }
69723 /* dadc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
69726 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69727 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13800 }
69729 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
69732 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69733 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30800 }
69735 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69738 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69739 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32800 }
69741 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69744 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69745 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33800 }
69747 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
69750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69751 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33800 }
69753 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
69756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69757 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50800 }
69759 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69762 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69763 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52800 }
69765 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69768 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69769 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53800 }
69771 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
69774 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69775 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53800 }
69777 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
69780 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69781 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70800 }
69783 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69786 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69787 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72800 }
69789 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69792 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69793 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73800 }
69795 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
69798 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69799 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73800 }
69801 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
69804 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69805 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38800 }
69807 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
69810 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69811 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a800 }
69813 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
69816 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69817 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b800 }
69819 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
69822 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69823 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b800 }
69825 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
69828 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69829 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58800 }
69831 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
69834 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69835 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a800 }
69837 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
69840 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69841 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b800 }
69843 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
69846 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69847 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b800 }
69849 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
69852 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69853 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c800 }
69855 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
69858 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69859 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e800 }
69861 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
69864 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69865 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f800 }
69867 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
69870 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69871 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f800 }
69873 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
69876 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69877 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c800 }
69879 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
69882 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69883 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e800 }
69885 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
69888 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69889 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f800 }
69891 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
69894 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69895 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f800 }
69897 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
69900 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
69901 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c800 }
69903 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
69906 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69907 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e800 }
69909 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
69912 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69913 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f800 }
69915 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
69918 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
69919 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f800 }
69921 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
69924 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
69925 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78800 }
69927 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
69930 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69931 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a800 }
69933 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
69936 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69937 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b800 }
69939 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
69942 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
69943 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b800 }
69945 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69948 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69949 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90800 }
69951 /* dadc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
69954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69955 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92800 }
69957 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69960 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69961 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18800 }
69963 /* dadc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
69966 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69967 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a800 }
69969 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69973 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10800 }
69975 /* dadc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
69978 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69979 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12800 }
69981 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
69984 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69985 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30800 }
69987 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
69990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69991 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32800 }
69993 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
69996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69997 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50800 }
69999 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
70002 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70003 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52800 }
70005 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70009 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70800 }
70011 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70015 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72800 }
70017 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70021 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38800 }
70023 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70026 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70027 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a800 }
70029 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70033 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58800 }
70035 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70039 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a800 }
70041 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70045 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c800 }
70047 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70051 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e800 }
70053 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70057 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c800 }
70059 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70063 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e800 }
70065 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70069 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c800 }
70071 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
70074 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70075 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e800 }
70077 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70081 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78800 }
70083 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
70086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70087 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a800 }
70089 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
70092 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70093 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c908 }
70095 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
70098 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70099 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18928 }
70101 /* dadc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
70104 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
70105 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18908 }
70107 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
70110 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70111 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c188 }
70113 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
70116 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70117 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a8 }
70119 /* dadc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
70122 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
70123 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18188 }
70125 /* dadc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
70128 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70129 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c108 }
70131 /* dadc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
70134 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70135 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18128 }
70137 /* dadc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
70140 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70141 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18108 }
70143 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70146 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70147 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30800 }
70149 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70152 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70153 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832800 }
70155 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
70158 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70159 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830800 }
70161 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70164 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70165 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50800 }
70167 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70170 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70171 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852800 }
70173 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
70176 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70177 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850800 }
70179 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70182 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70183 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70800 }
70185 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70188 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70189 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872800 }
70191 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
70194 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70195 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870800 }
70197 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
70200 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70201 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38800 }
70203 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
70206 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70207 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a800 }
70209 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
70212 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70213 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838800 }
70215 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
70218 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70219 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58800 }
70221 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
70224 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70225 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a800 }
70227 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
70230 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70231 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858800 }
70233 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
70236 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70237 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c800 }
70239 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
70242 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70243 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e800 }
70245 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
70248 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70249 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c800 }
70251 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
70254 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70255 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c800 }
70257 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
70260 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70261 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e800 }
70263 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
70266 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70267 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c800 }
70269 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
70272 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70273 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c800 }
70275 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
70278 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70279 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e800 }
70281 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
70284 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
70285 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c800 }
70287 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
70290 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70291 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78800 }
70293 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
70296 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70297 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a800 }
70299 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
70302 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
70303 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878800 }
70305 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70308 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70309 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980800 }
70311 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
70314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70315 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982800 }
70317 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
70320 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70321 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983800 }
70323 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70327 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908800 }
70329 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
70332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70333 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a800 }
70335 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
70338 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70339 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b800 }
70341 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70345 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900800 }
70347 /* dadc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
70350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70351 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902800 }
70353 /* dadc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
70356 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70357 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903800 }
70359 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
70362 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70363 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920800 }
70365 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70369 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922800 }
70371 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70374 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70375 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923800 }
70377 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
70380 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70381 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940800 }
70383 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70387 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942800 }
70389 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70392 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70393 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943800 }
70395 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
70398 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70399 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960800 }
70401 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70404 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70405 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962800 }
70407 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70410 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70411 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963800 }
70413 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
70416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70417 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928800 }
70419 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
70422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70423 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a800 }
70425 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
70428 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70429 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b800 }
70431 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
70434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70435 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948800 }
70437 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
70440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70441 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a800 }
70443 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
70446 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70447 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b800 }
70449 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
70452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70453 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c800 }
70455 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
70458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70459 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e800 }
70461 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
70464 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70465 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f800 }
70467 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
70470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70471 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c800 }
70473 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
70476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70477 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e800 }
70479 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
70482 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70483 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f800 }
70485 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
70488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
70489 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c800 }
70491 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
70494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70495 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e800 }
70497 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
70500 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70501 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f800 }
70503 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
70506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
70507 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968800 }
70509 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
70512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70513 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a800 }
70515 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
70518 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70519 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b800 }
70521 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70525 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80800 }
70527 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
70530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70531 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82800 }
70533 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
70536 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70537 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83800 }
70539 /* dadc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
70542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70543 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83800 }
70545 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70549 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08800 }
70551 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
70554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70555 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a800 }
70557 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
70560 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70561 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b800 }
70563 /* dadc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
70566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70567 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b800 }
70569 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70573 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00800 }
70575 /* dadc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
70578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70579 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02800 }
70581 /* dadc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
70584 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70585 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03800 }
70587 /* dadc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
70590 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70591 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03800 }
70593 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
70596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70597 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20800 }
70599 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70602 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70603 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22800 }
70605 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70608 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70609 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23800 }
70611 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
70614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70615 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23800 }
70617 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
70620 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70621 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40800 }
70623 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70626 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70627 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42800 }
70629 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70632 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70633 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43800 }
70635 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
70638 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70639 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43800 }
70641 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
70644 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70645 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60800 }
70647 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70650 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70651 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62800 }
70653 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70656 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70657 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63800 }
70659 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
70662 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70663 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63800 }
70665 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
70668 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70669 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28800 }
70671 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
70674 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70675 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a800 }
70677 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
70680 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70681 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b800 }
70683 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
70686 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70687 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b800 }
70689 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
70692 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70693 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48800 }
70695 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
70698 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70699 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a800 }
70701 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
70704 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70705 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b800 }
70707 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
70710 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70711 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b800 }
70713 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
70716 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70717 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c800 }
70719 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
70722 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70723 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e800 }
70725 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
70728 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70729 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f800 }
70731 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
70734 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70735 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f800 }
70737 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
70740 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70741 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c800 }
70743 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
70746 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70747 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e800 }
70749 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
70752 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70753 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f800 }
70755 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
70758 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70759 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f800 }
70761 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
70764 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
70765 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c800 }
70767 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
70770 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70771 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e800 }
70773 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
70776 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70777 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f800 }
70779 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
70782 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
70783 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f800 }
70785 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
70788 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
70789 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68800 }
70791 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
70794 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70795 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a800 }
70797 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
70800 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70801 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b800 }
70803 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
70806 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
70807 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b800 }
70809 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70812 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70813 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80800 }
70815 /* dadc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
70818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70819 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82800 }
70821 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70824 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70825 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08800 }
70827 /* dadc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
70830 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70831 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a800 }
70833 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70836 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70837 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00800 }
70839 /* dadc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
70842 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70843 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02800 }
70845 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
70848 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70849 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20800 }
70851 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
70854 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70855 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22800 }
70857 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
70860 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70861 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40800 }
70863 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
70866 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70867 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42800 }
70869 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70872 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70873 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60800 }
70875 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70878 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70879 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62800 }
70881 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70884 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70885 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28800 }
70887 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70890 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70891 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a800 }
70893 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70896 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70897 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48800 }
70899 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70902 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70903 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a800 }
70905 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70908 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70909 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c800 }
70911 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70914 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70915 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e800 }
70917 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70920 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70921 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c800 }
70923 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70926 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70927 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e800 }
70929 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70932 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70933 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c800 }
70935 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
70938 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70939 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e800 }
70941 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70944 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70945 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68800 }
70947 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
70950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70951 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a800 }
70953 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
70956 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70957 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c808 }
70959 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
70962 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70963 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18828 }
70965 /* dadc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
70968 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70969 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18808 }
70971 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
70974 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70975 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c088 }
70977 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
70980 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70981 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a8 }
70983 /* dadc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
70986 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70987 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18088 }
70989 /* dadc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
70992 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70993 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c008 }
70995 /* dadc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
70998 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70999 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18028 }
71001 /* dadc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
71004 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71005 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18008 }
71007 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71010 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71011 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20800 }
71013 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71016 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71017 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822800 }
71019 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
71022 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71023 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820800 }
71025 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71028 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71029 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40800 }
71031 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71034 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71035 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842800 }
71037 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
71040 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71041 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840800 }
71043 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71046 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71047 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60800 }
71049 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71052 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71053 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862800 }
71055 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
71058 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71059 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860800 }
71061 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
71064 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71065 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28800 }
71067 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
71070 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71071 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a800 }
71073 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
71076 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71077 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828800 }
71079 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
71082 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71083 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48800 }
71085 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
71088 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71089 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a800 }
71091 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
71094 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71095 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848800 }
71097 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
71100 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71101 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c800 }
71103 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
71106 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71107 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e800 }
71109 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
71112 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71113 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c800 }
71115 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
71118 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71119 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c800 }
71121 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
71124 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71125 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e800 }
71127 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
71130 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71131 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c800 }
71133 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
71136 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71137 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c800 }
71139 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
71142 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71143 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e800 }
71145 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
71148 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
71149 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c800 }
71151 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
71154 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71155 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68800 }
71157 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
71160 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71161 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a800 }
71163 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
71166 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
71167 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868800 }
71169 /* dadc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
71172 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71173 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1890e00 }
71175 /* dadc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
71178 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71179 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1818e00 }
71181 /* dadc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
71184 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71185 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1810e00 }
71187 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71190 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71191 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830e00 }
71193 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
71196 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71197 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838e00 }
71199 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
71202 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71203 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ce00 }
71205 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71208 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71209 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850e00 }
71211 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
71214 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71215 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858e00 }
71217 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
71220 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71221 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ce00 }
71223 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
71226 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
71227 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ce00 }
71229 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71232 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71233 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870e00 }
71235 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
71238 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
71239 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1878e00 }
71241 /* dadc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
71244 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
71245 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1880e00 }
71247 /* dadc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
71250 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
71251 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1808e00 }
71253 /* dadc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
71256 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71257 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1800e00 }
71259 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71262 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71263 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820e00 }
71265 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
71268 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71269 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828e00 }
71271 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
71274 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71275 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ce00 }
71277 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71280 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71281 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840e00 }
71283 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
71286 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71287 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848e00 }
71289 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
71292 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71293 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ce00 }
71295 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
71298 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
71299 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ce00 }
71301 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71304 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71305 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860e00 }
71307 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
71310 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
71311 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1868e00 }
71313 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71317 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990400 }
71319 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
71322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71323 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992400 }
71325 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
71328 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71329 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993400 }
71331 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71335 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918400 }
71337 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
71340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71341 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a400 }
71343 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
71346 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71347 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b400 }
71349 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71353 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910400 }
71355 /* adc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
71358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71359 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912400 }
71361 /* adc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
71364 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71365 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913400 }
71367 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
71370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71371 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930400 }
71373 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71377 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932400 }
71379 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71382 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71383 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933400 }
71385 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
71388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71389 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950400 }
71391 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71395 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952400 }
71397 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71400 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71401 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953400 }
71403 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
71406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71407 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970400 }
71409 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71413 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972400 }
71415 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71418 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71419 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973400 }
71421 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
71424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71425 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938400 }
71427 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
71430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71431 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a400 }
71433 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
71436 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71437 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b400 }
71439 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
71442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71443 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958400 }
71445 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
71448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71449 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a400 }
71451 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
71454 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71455 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b400 }
71457 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
71460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71461 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c400 }
71463 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
71466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71467 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e400 }
71469 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
71472 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71473 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f400 }
71475 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
71478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71479 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c400 }
71481 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
71484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71485 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e400 }
71487 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
71490 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71491 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f400 }
71493 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
71496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
71497 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c400 }
71499 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
71502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71503 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e400 }
71505 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
71508 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71509 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f400 }
71511 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
71514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
71515 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978400 }
71517 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
71520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71521 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a400 }
71523 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
71526 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71527 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b400 }
71529 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71533 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90400 }
71535 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
71538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71539 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92400 }
71541 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
71544 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71545 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93400 }
71547 /* adc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
71550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71551 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93400 }
71553 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71556 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71557 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18400 }
71559 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
71562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71563 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a400 }
71565 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
71568 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71569 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b400 }
71571 /* adc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
71574 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71575 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b400 }
71577 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71581 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10400 }
71583 /* adc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
71586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71587 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12400 }
71589 /* adc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
71592 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71593 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13400 }
71595 /* adc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
71598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71599 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13400 }
71601 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
71604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71605 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30400 }
71607 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71610 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71611 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32400 }
71613 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71616 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71617 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33400 }
71619 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
71622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71623 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33400 }
71625 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
71628 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71629 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50400 }
71631 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71635 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52400 }
71637 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71640 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71641 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53400 }
71643 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
71646 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71647 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53400 }
71649 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
71652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71653 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70400 }
71655 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71659 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72400 }
71661 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71664 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71665 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73400 }
71667 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
71670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71671 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73400 }
71673 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
71676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71677 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38400 }
71679 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
71682 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71683 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a400 }
71685 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
71688 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71689 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b400 }
71691 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
71694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71695 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b400 }
71697 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
71700 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71701 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58400 }
71703 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
71706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71707 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a400 }
71709 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
71712 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71713 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b400 }
71715 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
71718 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71719 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b400 }
71721 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
71724 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71725 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c400 }
71727 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
71730 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71731 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e400 }
71733 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
71736 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71737 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f400 }
71739 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
71742 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71743 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f400 }
71745 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
71748 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71749 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c400 }
71751 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
71754 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71755 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e400 }
71757 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
71760 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71761 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f400 }
71763 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
71766 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71767 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f400 }
71769 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
71772 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
71773 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c400 }
71775 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
71778 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71779 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e400 }
71781 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
71784 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71785 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f400 }
71787 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
71790 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
71791 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f400 }
71793 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
71796 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
71797 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78400 }
71799 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
71802 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71803 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a400 }
71805 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
71808 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71809 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b400 }
71811 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
71814 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
71815 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b400 }
71817 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71820 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71821 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90400 }
71823 /* adc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
71826 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71827 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92400 }
71829 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71832 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71833 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18400 }
71835 /* adc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
71838 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71839 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a400 }
71841 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71844 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71845 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10400 }
71847 /* adc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
71850 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71851 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12400 }
71853 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
71856 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71857 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30400 }
71859 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
71862 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71863 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32400 }
71865 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
71868 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71869 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50400 }
71871 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
71874 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71875 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52400 }
71877 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
71880 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71881 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70400 }
71883 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
71886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71887 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72400 }
71889 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
71892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71893 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38400 }
71895 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
71898 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71899 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a400 }
71901 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
71904 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71905 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58400 }
71907 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
71910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71911 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a400 }
71913 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
71916 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71917 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c400 }
71919 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
71922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71923 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e400 }
71925 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
71928 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71929 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c400 }
71931 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
71934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71935 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e400 }
71937 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
71940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
71941 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c400 }
71943 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
71946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
71947 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e400 }
71949 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
71952 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
71953 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78400 }
71955 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
71958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
71959 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a400 }
71961 /* adc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
71964 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71965 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c904 }
71967 /* adc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
71970 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71971 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18924 }
71973 /* adc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
71976 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71977 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18904 }
71979 /* adc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
71982 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71983 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c184 }
71985 /* adc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
71988 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71989 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a4 }
71991 /* adc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
71994 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71995 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18184 }
71997 /* adc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
72000 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72001 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c104 }
72003 /* adc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
72006 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72007 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18124 }
72009 /* adc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72012 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72013 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18104 }
72015 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72018 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72019 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30400 }
72021 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72024 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72025 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832400 }
72027 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72030 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72031 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830400 }
72033 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72036 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72037 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50400 }
72039 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72042 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72043 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852400 }
72045 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72048 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72049 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850400 }
72051 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72054 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72055 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70400 }
72057 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72060 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72061 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872400 }
72063 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72066 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72067 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870400 }
72069 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
72072 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72073 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38400 }
72075 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
72078 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72079 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a400 }
72081 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72084 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72085 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838400 }
72087 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
72090 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72091 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58400 }
72093 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
72096 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72097 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a400 }
72099 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72102 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72103 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858400 }
72105 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
72108 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72109 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c400 }
72111 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
72114 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72115 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e400 }
72117 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72120 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72121 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c400 }
72123 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
72126 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72127 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c400 }
72129 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
72132 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72133 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e400 }
72135 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
72138 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72139 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c400 }
72141 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
72144 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72145 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c400 }
72147 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
72150 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72151 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e400 }
72153 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
72156 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
72157 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c400 }
72159 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
72162 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72163 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78400 }
72165 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
72168 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72169 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a400 }
72171 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
72174 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
72175 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878400 }
72177 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72180 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72181 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980400 }
72183 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
72186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72187 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982400 }
72189 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
72192 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72193 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983400 }
72195 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72199 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908400 }
72201 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
72204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72205 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a400 }
72207 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
72210 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72211 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b400 }
72213 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72217 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900400 }
72219 /* adc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
72222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72223 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902400 }
72225 /* adc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
72228 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72229 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903400 }
72231 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
72234 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72235 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920400 }
72237 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72241 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922400 }
72243 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72246 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72247 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923400 }
72249 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
72252 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72253 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940400 }
72255 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72259 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942400 }
72261 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72264 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72265 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943400 }
72267 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
72270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72271 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960400 }
72273 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72277 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962400 }
72279 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72282 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72283 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963400 }
72285 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
72288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72289 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928400 }
72291 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
72294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72295 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a400 }
72297 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
72300 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72301 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b400 }
72303 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
72306 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72307 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948400 }
72309 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
72312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72313 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a400 }
72315 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
72318 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72319 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b400 }
72321 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
72324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72325 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c400 }
72327 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
72330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72331 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e400 }
72333 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
72336 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72337 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f400 }
72339 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
72342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72343 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c400 }
72345 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
72348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72349 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e400 }
72351 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
72354 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72355 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f400 }
72357 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
72360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
72361 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c400 }
72363 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
72366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72367 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e400 }
72369 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
72372 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72373 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f400 }
72375 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
72378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
72379 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968400 }
72381 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
72384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72385 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a400 }
72387 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
72390 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72391 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b400 }
72393 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72397 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80400 }
72399 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
72402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72403 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82400 }
72405 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
72408 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72409 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83400 }
72411 /* adc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
72414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72415 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83400 }
72417 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72421 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08400 }
72423 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
72426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72427 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a400 }
72429 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
72432 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72433 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b400 }
72435 /* adc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
72438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72439 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b400 }
72441 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72445 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00400 }
72447 /* adc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
72450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72451 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02400 }
72453 /* adc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
72456 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72457 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03400 }
72459 /* adc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
72462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72463 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03400 }
72465 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
72468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72469 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20400 }
72471 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72475 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22400 }
72477 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72480 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72481 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23400 }
72483 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
72486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72487 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23400 }
72489 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
72492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72493 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40400 }
72495 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72499 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42400 }
72501 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72504 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72505 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43400 }
72507 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
72510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72511 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43400 }
72513 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
72516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72517 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60400 }
72519 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72523 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62400 }
72525 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72528 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72529 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63400 }
72531 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
72534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72535 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63400 }
72537 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
72540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72541 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28400 }
72543 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
72546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72547 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a400 }
72549 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
72552 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72553 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b400 }
72555 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
72558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72559 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b400 }
72561 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
72564 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72565 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48400 }
72567 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
72570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72571 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a400 }
72573 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
72576 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72577 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b400 }
72579 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
72582 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72583 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b400 }
72585 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
72588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72589 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c400 }
72591 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
72594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72595 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e400 }
72597 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
72600 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72601 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f400 }
72603 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
72606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72607 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f400 }
72609 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
72612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72613 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c400 }
72615 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
72618 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72619 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e400 }
72621 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
72624 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72625 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f400 }
72627 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
72630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72631 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f400 }
72633 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
72636 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
72637 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c400 }
72639 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
72642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72643 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e400 }
72645 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
72648 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72649 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f400 }
72651 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
72654 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
72655 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f400 }
72657 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
72660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
72661 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68400 }
72663 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
72666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72667 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a400 }
72669 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
72672 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72673 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b400 }
72675 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
72678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
72679 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b400 }
72681 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72685 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80400 }
72687 /* adc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
72690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72691 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82400 }
72693 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72696 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72697 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08400 }
72699 /* adc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
72702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72703 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a400 }
72705 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72709 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00400 }
72711 /* adc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
72714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72715 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02400 }
72717 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
72720 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72721 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20400 }
72723 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
72726 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72727 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22400 }
72729 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
72732 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72733 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40400 }
72735 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
72738 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72739 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42400 }
72741 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
72744 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72745 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60400 }
72747 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
72750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72751 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62400 }
72753 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
72756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72757 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28400 }
72759 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
72762 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72763 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a400 }
72765 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
72768 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72769 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48400 }
72771 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
72774 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72775 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a400 }
72777 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
72780 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72781 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c400 }
72783 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
72786 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72787 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e400 }
72789 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
72792 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72793 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c400 }
72795 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
72798 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72799 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e400 }
72801 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
72804 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
72805 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c400 }
72807 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
72810 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
72811 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e400 }
72813 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
72816 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
72817 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68400 }
72819 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
72822 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
72823 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a400 }
72825 /* adc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
72828 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72829 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c804 }
72831 /* adc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
72834 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72835 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18824 }
72837 /* adc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
72840 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72841 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18804 }
72843 /* adc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
72846 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72847 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c084 }
72849 /* adc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
72852 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72853 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a4 }
72855 /* adc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
72858 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72859 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18084 }
72861 /* adc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
72864 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72865 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c004 }
72867 /* adc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
72870 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72871 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18024 }
72873 /* adc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72876 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72877 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18004 }
72879 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72882 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72883 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20400 }
72885 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72888 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72889 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822400 }
72891 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72894 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72895 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820400 }
72897 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72900 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72901 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40400 }
72903 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72906 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72907 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842400 }
72909 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72912 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72913 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840400 }
72915 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72918 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72919 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60400 }
72921 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72924 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72925 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862400 }
72927 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72930 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72931 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860400 }
72933 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
72936 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72937 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28400 }
72939 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
72942 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72943 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a400 }
72945 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72948 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72949 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828400 }
72951 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
72954 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72955 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48400 }
72957 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
72960 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72961 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a400 }
72963 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72966 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72967 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848400 }
72969 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
72972 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72973 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c400 }
72975 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
72978 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72979 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e400 }
72981 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72984 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72985 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c400 }
72987 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
72990 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72991 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c400 }
72993 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
72996 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72997 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e400 }
72999 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
73002 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
73003 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c400 }
73005 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
73008 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73009 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c400 }
73011 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
73014 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73015 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e400 }
73017 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
73020 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
73021 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c400 }
73023 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
73026 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73027 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68400 }
73029 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
73032 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73033 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a400 }
73035 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
73038 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
73039 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868400 }
73041 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
73044 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73045 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb18000 }
73047 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
73050 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73051 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1a000 }
73053 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
73056 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73057 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb1b000 }
73059 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
73062 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73063 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb18400 }
73065 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
73068 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73069 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb1a400 }
73071 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
73074 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73075 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb1b400 }
73077 /* adc.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73080 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73081 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb18600 }
73083 /* adc.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73086 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73087 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1a600 }
73089 /* adc.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73092 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73093 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb1b600 }
73095 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73098 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73099 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1880000 }
73101 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73104 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73105 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1a80000 }
73107 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73110 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73111 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1b80000 }
73113 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73116 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73117 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb18c0000 }
73119 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73122 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73123 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1ac0000 }
73125 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73128 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73129 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1bc0000 }
73131 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73134 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73135 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb18a0000 }
73137 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73140 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73141 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1aa0000 }
73143 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73146 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73147 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1ba0000 }
73149 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73152 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73153 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb18e0000 }
73155 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73158 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73159 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1ae0000 }
73161 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73164 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73165 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1be0000 }
73167 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73170 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73171 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb18b0000 }
73173 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73176 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73177 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1ab0000 }
73179 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73182 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73183 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1bb0000 }
73185 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73188 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73189 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb18f0000 }
73191 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73194 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73195 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1af0000 }
73197 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73200 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73201 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1bf0000 }
73203 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
73206 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73207 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb1c00000 }
73209 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
73212 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73213 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1e00000 }
73215 /* adc.w${X} ${Dsp-16-u16},$Dst16RnHI */
73218 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
73219 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb1f00000 }
73221 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
73224 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73225 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb1c40000 }
73227 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
73230 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73231 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb1e40000 }
73233 /* adc.w${X} ${Dsp-16-u16},$Dst16AnHI */
73236 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
73237 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb1f40000 }
73239 /* adc.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73242 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73243 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb1c60000 }
73245 /* adc.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73248 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73249 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1e60000 }
73251 /* adc.w${X} ${Dsp-16-u16},[$Dst16An] */
73254 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73255 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb1f60000 }
73257 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73260 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73261 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1c80000 }
73263 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73266 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73267 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1e80000 }
73269 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73272 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73273 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb1f80000 }
73275 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73278 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73279 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1cc0000 }
73281 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73284 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73285 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1ec0000 }
73287 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73290 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73291 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb1fc0000 }
73293 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73296 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73297 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ca0000 }
73299 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73302 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73303 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ea0000 }
73305 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73308 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73309 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb1fa0000 }
73311 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73314 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73315 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ce0000 }
73317 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73320 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73321 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ee0000 }
73323 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73326 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73327 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb1fe0000 }
73329 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73332 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73333 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1cb0000 }
73335 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73338 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73339 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1eb0000 }
73341 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73344 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73345 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb1fb0000 }
73347 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73350 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73351 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb1cf0000 }
73353 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73356 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73357 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb1ef0000 }
73359 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
73362 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73363 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb1ff0000 }
73365 /* adc.w${X} $Src16RnHI,$Dst16RnHI */
73368 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
73369 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb100 }
73371 /* adc.w${X} $Src16AnHI,$Dst16RnHI */
73374 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
73375 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb140 }
73377 /* adc.w${X} [$Src16An],$Dst16RnHI */
73380 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73381 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb160 }
73383 /* adc.w${X} $Src16RnHI,$Dst16AnHI */
73386 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
73387 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb104 }
73389 /* adc.w${X} $Src16AnHI,$Dst16AnHI */
73392 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
73393 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb144 }
73395 /* adc.w${X} [$Src16An],$Dst16AnHI */
73398 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73399 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb164 }
73401 /* adc.w${X} $Src16RnHI,[$Dst16An] */
73404 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73405 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb106 }
73407 /* adc.w${X} $Src16AnHI,[$Dst16An] */
73410 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73411 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb146 }
73413 /* adc.w${X} [$Src16An],[$Dst16An] */
73416 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73417 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb166 }
73419 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
73422 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73423 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb10800 }
73425 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
73428 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73429 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb14800 }
73431 /* adc.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73434 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73435 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb16800 }
73437 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
73440 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73441 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb10c0000 }
73443 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
73446 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73447 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb14c0000 }
73449 /* adc.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73452 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73453 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb16c0000 }
73455 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
73458 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73459 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb10a00 }
73461 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
73464 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73465 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb14a00 }
73467 /* adc.w${X} [$Src16An],${Dsp-16-u8}[sb] */
73470 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73471 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb16a00 }
73473 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
73476 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73477 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb10e0000 }
73479 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
73482 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73483 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb14e0000 }
73485 /* adc.w${X} [$Src16An],${Dsp-16-u16}[sb] */
73488 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73489 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb16e0000 }
73491 /* adc.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
73494 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73495 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb10b00 }
73497 /* adc.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
73500 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73501 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb14b00 }
73503 /* adc.w${X} [$Src16An],${Dsp-16-s8}[fb] */
73506 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73507 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb16b00 }
73509 /* adc.w${X} $Src16RnHI,${Dsp-16-u16} */
73512 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
73513 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb10f0000 }
73515 /* adc.w${X} $Src16AnHI,${Dsp-16-u16} */
73518 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
73519 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb14f0000 }
73521 /* adc.w${X} [$Src16An],${Dsp-16-u16} */
73524 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
73525 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb16f0000 }
73527 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
73530 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73531 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb08000 }
73533 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
73536 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73537 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0a000 }
73539 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
73542 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73543 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb0b000 }
73545 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
73548 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73549 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb08400 }
73551 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
73554 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73555 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb0a400 }
73557 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
73560 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73561 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb0b400 }
73563 /* adc.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73566 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73567 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb08600 }
73569 /* adc.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73572 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73573 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0a600 }
73575 /* adc.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73578 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73579 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb0b600 }
73581 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73584 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73585 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0880000 }
73587 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73590 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73591 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0a80000 }
73593 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73596 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73597 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0b80000 }
73599 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73602 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73603 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb08c0000 }
73605 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73608 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73609 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0ac0000 }
73611 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73614 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73615 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0bc0000 }
73617 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73620 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73621 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb08a0000 }
73623 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73626 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73627 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0aa0000 }
73629 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73632 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73633 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0ba0000 }
73635 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73638 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73639 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb08e0000 }
73641 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73644 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73645 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0ae0000 }
73647 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73650 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73651 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0be0000 }
73653 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73656 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73657 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb08b0000 }
73659 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73662 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73663 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0ab0000 }
73665 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73668 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73669 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0bb0000 }
73671 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73674 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73675 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb08f0000 }
73677 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73680 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73681 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0af0000 }
73683 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73686 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73687 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0bf0000 }
73689 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
73692 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73693 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb0c00000 }
73695 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
73698 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73699 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0e00000 }
73701 /* adc.b${X} ${Dsp-16-u16},$Dst16RnQI */
73704 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
73705 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb0f00000 }
73707 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
73710 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73711 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb0c40000 }
73713 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
73716 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73717 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb0e40000 }
73719 /* adc.b${X} ${Dsp-16-u16},$Dst16AnQI */
73722 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
73723 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb0f40000 }
73725 /* adc.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73728 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73729 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb0c60000 }
73731 /* adc.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73734 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73735 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0e60000 }
73737 /* adc.b${X} ${Dsp-16-u16},[$Dst16An] */
73740 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73741 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb0f60000 }
73743 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73746 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73747 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0c80000 }
73749 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73752 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73753 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0e80000 }
73755 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73758 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73759 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb0f80000 }
73761 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73764 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73765 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0cc0000 }
73767 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73770 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73771 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0ec0000 }
73773 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73776 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73777 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb0fc0000 }
73779 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73782 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73783 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ca0000 }
73785 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73788 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73789 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ea0000 }
73791 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73794 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73795 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb0fa0000 }
73797 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73800 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73801 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ce0000 }
73803 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73806 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73807 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ee0000 }
73809 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73812 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73813 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb0fe0000 }
73815 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73818 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73819 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0cb0000 }
73821 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73824 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73825 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0eb0000 }
73827 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73830 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73831 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb0fb0000 }
73833 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73836 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73837 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb0cf0000 }
73839 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73842 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73843 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb0ef0000 }
73845 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
73848 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73849 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb0ff0000 }
73851 /* adc.b${X} $Src16RnQI,$Dst16RnQI */
73854 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
73855 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb000 }
73857 /* adc.b${X} $Src16AnQI,$Dst16RnQI */
73860 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
73861 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb040 }
73863 /* adc.b${X} [$Src16An],$Dst16RnQI */
73866 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73867 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb060 }
73869 /* adc.b${X} $Src16RnQI,$Dst16AnQI */
73872 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
73873 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb004 }
73875 /* adc.b${X} $Src16AnQI,$Dst16AnQI */
73878 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
73879 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb044 }
73881 /* adc.b${X} [$Src16An],$Dst16AnQI */
73884 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73885 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb064 }
73887 /* adc.b${X} $Src16RnQI,[$Dst16An] */
73890 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73891 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb006 }
73893 /* adc.b${X} $Src16AnQI,[$Dst16An] */
73896 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73897 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb046 }
73899 /* adc.b${X} [$Src16An],[$Dst16An] */
73902 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73903 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb066 }
73905 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
73908 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73909 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb00800 }
73911 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
73914 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73915 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb04800 }
73917 /* adc.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73920 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73921 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb06800 }
73923 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
73926 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73927 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb00c0000 }
73929 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
73932 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73933 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb04c0000 }
73935 /* adc.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73938 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73939 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb06c0000 }
73941 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
73944 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73945 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb00a00 }
73947 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
73950 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73951 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb04a00 }
73953 /* adc.b${X} [$Src16An],${Dsp-16-u8}[sb] */
73956 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73957 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb06a00 }
73959 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
73962 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73963 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb00e0000 }
73965 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
73968 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73969 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb04e0000 }
73971 /* adc.b${X} [$Src16An],${Dsp-16-u16}[sb] */
73974 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73975 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb06e0000 }
73977 /* adc.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
73980 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73981 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb00b00 }
73983 /* adc.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
73986 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73987 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb04b00 }
73989 /* adc.b${X} [$Src16An],${Dsp-16-s8}[fb] */
73992 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73993 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb06b00 }
73995 /* adc.b${X} $Src16RnQI,${Dsp-16-u16} */
73998 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
73999 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb00f0000 }
74001 /* adc.b${X} $Src16AnQI,${Dsp-16-u16} */
74004 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
74005 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb04f0000 }
74007 /* adc.b${X} [$Src16An],${Dsp-16-u16} */
74010 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
74011 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb06f0000 }
74013 /* adc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
74016 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
74017 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892e00 }
74019 /* adc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
74022 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
74023 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181ae00 }
74025 /* adc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
74028 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74029 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812e00 }
74031 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74034 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74035 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832e00 }
74037 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
74040 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74041 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ae00 }
74043 /* adc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
74046 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74047 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ee00 }
74049 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74052 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74053 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852e00 }
74055 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
74058 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74059 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ae00 }
74061 /* adc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
74064 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74065 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ee00 }
74067 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
74070 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
74071 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ee00 }
74073 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74076 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74077 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872e00 }
74079 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
74082 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
74083 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187ae00 }
74085 /* adc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
74088 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
74089 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882e00 }
74091 /* adc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
74094 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
74095 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180ae00 }
74097 /* adc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
74100 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74101 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802e00 }
74103 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74106 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74107 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822e00 }
74109 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
74112 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74113 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ae00 }
74115 /* adc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
74118 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74119 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ee00 }
74121 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74124 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74125 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842e00 }
74127 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
74130 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74131 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ae00 }
74133 /* adc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
74136 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74137 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ee00 }
74139 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
74142 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
74143 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ee00 }
74145 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74148 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74149 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862e00 }
74151 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
74154 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
74155 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186ae00 }
74157 /* adc.w${X} #${Imm-16-HI},$Dst16RnHI */
74160 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
74161 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77600000 }
74163 /* adc.w${X} #${Imm-16-HI},$Dst16AnHI */
74166 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
74167 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77640000 }
74169 /* adc.w${X} #${Imm-16-HI},[$Dst16An] */
74172 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
74173 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77660000 }
74175 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
74178 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74179 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77680000 }
74181 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
74184 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74185 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x776a0000 }
74187 /* adc.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
74190 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74191 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x776b0000 }
74193 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
74196 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74197 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x776c0000 }
74199 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
74202 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74203 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x776e0000 }
74205 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16} */
74208 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
74209 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x776f0000 }
74211 /* adc.b${X} #${Imm-16-QI},$Dst16RnQI */
74214 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
74215 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x766000 }
74217 /* adc.b${X} #${Imm-16-QI},$Dst16AnQI */
74220 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
74221 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x766400 }
74223 /* adc.b${X} #${Imm-16-QI},[$Dst16An] */
74226 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
74227 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x766600 }
74229 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
74232 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74233 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76680000 }
74235 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
74238 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74239 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x766a0000 }
74241 /* adc.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
74244 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74245 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x766b0000 }
74247 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
74250 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74251 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x766c0000 }
74253 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
74256 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74257 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x766e0000 }
74259 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16} */
74262 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
74263 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x766f0000 }
74265 /* add.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
74268 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74269 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x27000000 }
74271 /* add.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
74274 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74275 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x37000000 }
74277 /* add.w${S} #${Imm-24-HI},${Dsp-8-u16} */
74280 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
74281 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x17000000 }
74283 /* add.w${S} #${Imm-8-HI},r0 */
74286 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
74287 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x70000 }
74289 /* add.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
74292 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74293 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x260000 }
74295 /* add.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
74298 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74299 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x360000 }
74301 /* add.b${S} #${Imm-24-QI},${Dsp-8-u16} */
74304 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
74305 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x16000000 }
74307 /* add.b${S} #${Imm-8-QI},r0l */
74310 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
74311 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x600 }
74313 /* add.l${S} #${Imm1-S},a0 */
74316 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '0', 0 } },
74317 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI
, { 0x8c }
74319 /* add.l${S} #${Imm1-S},a1 */
74322 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '1', 0 } },
74323 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI
, { 0x8d }
74325 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74329 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990200 }
74331 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
74334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74335 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992200 }
74337 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
74340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74341 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993200 }
74343 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74347 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918200 }
74349 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
74352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74353 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a200 }
74355 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
74358 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74359 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b200 }
74361 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74365 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910200 }
74367 /* add.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
74370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74371 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912200 }
74373 /* add.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
74376 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74377 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913200 }
74379 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74383 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93020000 }
74385 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74389 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93220000 }
74391 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74394 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74395 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93320000 }
74397 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74401 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95020000 }
74403 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74407 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95220000 }
74409 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74413 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95320000 }
74415 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74419 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97020000 }
74421 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74425 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97220000 }
74427 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74430 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74431 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97320000 }
74433 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
74436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74437 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93820000 }
74439 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
74442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74443 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a20000 }
74445 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
74448 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74449 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b20000 }
74451 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
74454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74455 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95820000 }
74457 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
74460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74461 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a20000 }
74463 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
74466 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74467 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b20000 }
74469 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
74472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74473 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c20000 }
74475 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
74478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74479 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e20000 }
74481 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
74484 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74485 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f20000 }
74487 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
74490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74491 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c20000 }
74493 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
74496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74497 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e20000 }
74499 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
74502 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74503 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f20000 }
74505 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
74508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
74509 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c20000 }
74511 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
74514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74515 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e20000 }
74517 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
74520 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74521 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f20000 }
74523 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
74526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
74527 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97820000 }
74529 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
74532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74533 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a20000 }
74535 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
74538 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74539 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b20000 }
74541 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74545 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9020000 }
74547 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
74550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74551 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9220000 }
74553 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
74556 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74557 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9320000 }
74559 /* add.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
74562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74563 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9320000 }
74565 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74569 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1820000 }
74571 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
74574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74575 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a20000 }
74577 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
74580 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74581 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b20000 }
74583 /* add.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
74586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74587 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b20000 }
74589 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74593 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1020000 }
74595 /* add.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
74598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74599 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1220000 }
74601 /* add.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
74604 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74605 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1320000 }
74607 /* add.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
74610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74611 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1320000 }
74613 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74617 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3020000 }
74619 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74623 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3220000 }
74625 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74628 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74629 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3320000 }
74631 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
74634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74635 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3320000 }
74637 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74641 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5020000 }
74643 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74647 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5220000 }
74649 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74652 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74653 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5320000 }
74655 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
74658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74659 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5320000 }
74661 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74665 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7020000 }
74667 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74671 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7220000 }
74673 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74676 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74677 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7320000 }
74679 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
74682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74683 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7320000 }
74685 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
74688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74689 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3820000 }
74691 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
74694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74695 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a20000 }
74697 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
74700 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74701 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b20000 }
74703 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
74706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74707 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b20000 }
74709 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
74712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74713 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5820000 }
74715 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
74718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74719 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a20000 }
74721 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
74724 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74725 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b20000 }
74727 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
74730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74731 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b20000 }
74733 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
74736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74737 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c20000 }
74739 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
74742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74743 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e20000 }
74745 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
74748 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74749 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f20000 }
74751 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
74754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74755 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f20000 }
74757 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
74760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74761 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c20000 }
74763 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
74766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74767 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e20000 }
74769 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
74772 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74773 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f20000 }
74775 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
74778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74779 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f20000 }
74781 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
74784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
74785 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c20000 }
74787 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
74790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74791 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e20000 }
74793 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
74796 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74797 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f20000 }
74799 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
74802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
74803 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f20000 }
74805 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
74808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
74809 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7820000 }
74811 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
74814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74815 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a20000 }
74817 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
74820 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74821 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b20000 }
74823 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
74826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
74827 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b20000 }
74829 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74833 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9020000 }
74835 /* add.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
74838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74839 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9220000 }
74841 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74845 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1820000 }
74847 /* add.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
74850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74851 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a20000 }
74853 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74857 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1020000 }
74859 /* add.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
74862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74863 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1220000 }
74865 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
74868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74869 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3020000 }
74871 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
74874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74875 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3220000 }
74877 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
74880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74881 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5020000 }
74883 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
74886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74887 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5220000 }
74889 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
74892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74893 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7020000 }
74895 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
74898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74899 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7220000 }
74901 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
74904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74905 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3820000 }
74907 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
74910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74911 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a20000 }
74913 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
74916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74917 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5820000 }
74919 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
74922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74923 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a20000 }
74925 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
74928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74929 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c20000 }
74931 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
74934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74935 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e20000 }
74937 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
74940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74941 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c20000 }
74943 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
74946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74947 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e20000 }
74949 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
74952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
74953 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c20000 }
74955 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
74958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
74959 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e20000 }
74961 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
74964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
74965 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7820000 }
74967 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
74970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
74971 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a20000 }
74973 /* add.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
74976 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74977 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc902 }
74979 /* add.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
74982 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74983 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8922 }
74985 /* add.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74988 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74989 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8902 }
74991 /* add.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
74994 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74995 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc182 }
74997 /* add.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
75000 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75001 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a2 }
75003 /* add.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
75006 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75007 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8182 }
75009 /* add.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
75012 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75013 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc102 }
75015 /* add.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
75018 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75019 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8122 }
75021 /* add.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75024 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75025 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8102 }
75027 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75030 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75031 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30200 }
75033 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75036 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75037 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832200 }
75039 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75042 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75043 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830200 }
75045 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75048 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75049 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5020000 }
75051 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75054 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75055 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85220000 }
75057 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75060 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75061 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85020000 }
75063 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75066 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75067 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7020000 }
75069 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75072 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75073 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87220000 }
75075 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75078 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75079 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87020000 }
75081 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
75084 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75085 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38200 }
75087 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
75090 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75091 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a200 }
75093 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75096 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75097 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838200 }
75099 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
75102 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75103 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5820000 }
75105 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
75108 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75109 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a20000 }
75111 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
75114 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75115 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85820000 }
75117 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
75120 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75121 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c200 }
75123 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
75126 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75127 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e200 }
75129 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
75132 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75133 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c200 }
75135 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
75138 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75139 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c20000 }
75141 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
75144 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75145 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e20000 }
75147 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
75150 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75151 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c20000 }
75153 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
75156 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75157 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c20000 }
75159 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
75162 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75163 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e20000 }
75165 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
75168 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
75169 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c20000 }
75171 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
75174 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75175 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7820000 }
75177 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
75180 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75181 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a20000 }
75183 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
75186 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
75187 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87820000 }
75189 /* add.b${S} ${SrcDst16-r0l-r0h-S-normal} */
75192 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
75193 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x20 }
75195 /* add.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
75198 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75199 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2100 }
75201 /* add.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
75204 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75205 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2200 }
75207 /* add.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
75210 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
75211 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x230000 }
75213 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75217 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990800 }
75219 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
75222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75223 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992800 }
75225 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
75228 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75229 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993800 }
75231 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75235 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918800 }
75237 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
75240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75241 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a800 }
75243 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
75246 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75247 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b800 }
75249 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75253 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910800 }
75255 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
75258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75259 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912800 }
75261 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
75264 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75265 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913800 }
75267 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75271 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93080000 }
75273 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75277 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93280000 }
75279 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75282 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75283 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93380000 }
75285 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75289 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95080000 }
75291 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75295 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95280000 }
75297 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75300 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75301 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95380000 }
75303 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75307 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97080000 }
75309 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75313 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97280000 }
75315 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75318 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75319 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97380000 }
75321 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
75324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75325 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93880000 }
75327 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
75330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75331 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a80000 }
75333 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
75336 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75337 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b80000 }
75339 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
75342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75343 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95880000 }
75345 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
75348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75349 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a80000 }
75351 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
75354 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75355 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b80000 }
75357 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
75360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75361 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c80000 }
75363 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
75366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75367 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e80000 }
75369 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
75372 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75373 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f80000 }
75375 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
75378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75379 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c80000 }
75381 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
75384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75385 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e80000 }
75387 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
75390 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75391 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f80000 }
75393 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
75396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
75397 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c80000 }
75399 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
75402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75403 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e80000 }
75405 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
75408 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75409 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f80000 }
75411 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
75414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
75415 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97880000 }
75417 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
75420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75421 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a80000 }
75423 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
75426 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75427 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b80000 }
75429 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75433 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9080000 }
75435 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
75438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75439 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9280000 }
75441 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
75444 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75445 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9380000 }
75447 /* add.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
75450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75451 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9380000 }
75453 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75457 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1880000 }
75459 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
75462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75463 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a80000 }
75465 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
75468 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75469 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b80000 }
75471 /* add.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
75474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75475 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b80000 }
75477 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75481 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1080000 }
75483 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
75486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75487 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1280000 }
75489 /* add.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
75492 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75493 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1380000 }
75495 /* add.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
75498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75499 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1380000 }
75501 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75505 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3080000 }
75507 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75511 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3280000 }
75513 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75516 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75517 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3380000 }
75519 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
75522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75523 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3380000 }
75525 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75529 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5080000 }
75531 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75535 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5280000 }
75537 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75541 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5380000 }
75543 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
75546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75547 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5380000 }
75549 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75553 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7080000 }
75555 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75559 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7280000 }
75561 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75564 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75565 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7380000 }
75567 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
75570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75571 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7380000 }
75573 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
75576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75577 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3880000 }
75579 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
75582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75583 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a80000 }
75585 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
75588 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75589 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b80000 }
75591 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
75594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75595 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b80000 }
75597 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
75600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75601 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5880000 }
75603 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
75606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75607 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a80000 }
75609 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
75612 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75613 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b80000 }
75615 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
75618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75619 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b80000 }
75621 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
75624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75625 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c80000 }
75627 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
75630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75631 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e80000 }
75633 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
75636 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75637 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f80000 }
75639 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
75642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75643 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f80000 }
75645 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
75648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75649 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c80000 }
75651 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
75654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75655 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e80000 }
75657 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
75660 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75661 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f80000 }
75663 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
75666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75667 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f80000 }
75669 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
75672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
75673 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c80000 }
75675 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
75678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75679 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e80000 }
75681 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
75684 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75685 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f80000 }
75687 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
75690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
75691 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f80000 }
75693 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
75696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
75697 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7880000 }
75699 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
75702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75703 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a80000 }
75705 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
75708 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75709 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b80000 }
75711 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
75714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
75715 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b80000 }
75717 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75721 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9080000 }
75723 /* add.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
75726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75727 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9280000 }
75729 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75733 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1880000 }
75735 /* add.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
75738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75739 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a80000 }
75741 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75745 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1080000 }
75747 /* add.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
75750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75751 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1280000 }
75753 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
75756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75757 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3080000 }
75759 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
75762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75763 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3280000 }
75765 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
75768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75769 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5080000 }
75771 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
75774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75775 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5280000 }
75777 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
75780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75781 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7080000 }
75783 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
75786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75787 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7280000 }
75789 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
75792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75793 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3880000 }
75795 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
75798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75799 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a80000 }
75801 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
75804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75805 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5880000 }
75807 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
75810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75811 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a80000 }
75813 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
75816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75817 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c80000 }
75819 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
75822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75823 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e80000 }
75825 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
75828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75829 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c80000 }
75831 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
75834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75835 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e80000 }
75837 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
75840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
75841 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c80000 }
75843 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
75846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
75847 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e80000 }
75849 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
75852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
75853 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7880000 }
75855 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
75858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
75859 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a80000 }
75861 /* add.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
75864 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75865 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc908 }
75867 /* add.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
75870 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75871 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8928 }
75873 /* add.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75876 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75877 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8908 }
75879 /* add.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
75882 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75883 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc188 }
75885 /* add.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
75888 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75889 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a8 }
75891 /* add.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75894 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75895 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8188 }
75897 /* add.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
75900 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75901 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc108 }
75903 /* add.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
75906 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75907 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8128 }
75909 /* add.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75912 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75913 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8108 }
75915 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75918 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75919 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30800 }
75921 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75924 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75925 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832800 }
75927 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75930 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75931 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830800 }
75933 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75936 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75937 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5080000 }
75939 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75942 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75943 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85280000 }
75945 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75948 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75949 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85080000 }
75951 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75954 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75955 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7080000 }
75957 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75960 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75961 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87280000 }
75963 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75966 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75967 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87080000 }
75969 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
75972 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75973 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38800 }
75975 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
75978 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75979 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a800 }
75981 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75984 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75985 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838800 }
75987 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
75990 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75991 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5880000 }
75993 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
75996 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75997 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a80000 }
75999 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
76002 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76003 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85880000 }
76005 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
76008 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76009 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c800 }
76011 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
76014 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76015 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e800 }
76017 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76020 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76021 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c800 }
76023 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
76026 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76027 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c80000 }
76029 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
76032 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76033 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e80000 }
76035 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76038 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76039 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c80000 }
76041 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
76044 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76045 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c80000 }
76047 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
76050 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76051 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e80000 }
76053 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76056 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76057 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c80000 }
76059 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
76062 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76063 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7880000 }
76065 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
76068 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76069 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a80000 }
76071 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76074 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76075 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87880000 }
76077 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76081 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980800 }
76083 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
76086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76087 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982800 }
76089 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
76092 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76093 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983800 }
76095 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76099 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908800 }
76101 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
76104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76105 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a800 }
76107 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
76110 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76111 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b800 }
76113 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76117 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900800 }
76119 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
76122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76123 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902800 }
76125 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
76128 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76129 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903800 }
76131 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76135 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92080000 }
76137 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76141 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92280000 }
76143 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76146 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76147 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92380000 }
76149 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76153 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94080000 }
76155 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76159 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94280000 }
76161 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76164 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76165 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94380000 }
76167 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76171 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96080000 }
76173 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76177 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96280000 }
76179 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76182 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76183 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96380000 }
76185 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
76188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76189 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92880000 }
76191 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
76194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76195 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a80000 }
76197 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
76200 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76201 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b80000 }
76203 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
76206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76207 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94880000 }
76209 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
76212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76213 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a80000 }
76215 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
76218 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76219 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b80000 }
76221 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
76224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76225 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c80000 }
76227 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
76230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76231 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e80000 }
76233 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
76236 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76237 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f80000 }
76239 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
76242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76243 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c80000 }
76245 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
76248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76249 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e80000 }
76251 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
76254 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76255 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f80000 }
76257 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
76260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
76261 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c80000 }
76263 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
76266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76267 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e80000 }
76269 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
76272 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76273 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f80000 }
76275 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
76278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
76279 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96880000 }
76281 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
76284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76285 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a80000 }
76287 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
76290 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76291 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b80000 }
76293 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76297 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8080000 }
76299 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
76302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76303 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8280000 }
76305 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
76308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76309 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8380000 }
76311 /* add.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
76314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76315 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8380000 }
76317 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76321 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0880000 }
76323 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
76326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76327 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a80000 }
76329 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
76332 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76333 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b80000 }
76335 /* add.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
76338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76339 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b80000 }
76341 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76345 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0080000 }
76347 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
76350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76351 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0280000 }
76353 /* add.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
76356 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76357 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0380000 }
76359 /* add.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
76362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76363 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0380000 }
76365 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76369 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2080000 }
76371 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76375 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2280000 }
76377 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76381 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2380000 }
76383 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
76386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76387 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2380000 }
76389 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76393 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4080000 }
76395 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76399 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4280000 }
76401 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76404 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76405 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4380000 }
76407 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
76410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76411 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4380000 }
76413 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76417 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6080000 }
76419 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76423 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6280000 }
76425 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76428 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76429 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6380000 }
76431 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
76434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76435 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6380000 }
76437 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
76440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76441 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2880000 }
76443 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
76446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76447 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a80000 }
76449 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
76452 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76453 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b80000 }
76455 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
76458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76459 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b80000 }
76461 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
76464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76465 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4880000 }
76467 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
76470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76471 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a80000 }
76473 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
76476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76477 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b80000 }
76479 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
76482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76483 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b80000 }
76485 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
76488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76489 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c80000 }
76491 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
76494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76495 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e80000 }
76497 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
76500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76501 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f80000 }
76503 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
76506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76507 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f80000 }
76509 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
76512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76513 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c80000 }
76515 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
76518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76519 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e80000 }
76521 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
76524 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76525 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f80000 }
76527 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
76530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76531 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f80000 }
76533 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
76536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
76537 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c80000 }
76539 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
76542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76543 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e80000 }
76545 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
76548 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76549 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f80000 }
76551 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
76554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
76555 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f80000 }
76557 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
76560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
76561 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6880000 }
76563 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
76566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76567 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a80000 }
76569 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
76572 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76573 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b80000 }
76575 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
76578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
76579 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b80000 }
76581 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76585 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8080000 }
76587 /* add.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
76590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76591 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8280000 }
76593 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76597 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0880000 }
76599 /* add.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
76602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76603 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a80000 }
76605 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76609 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0080000 }
76611 /* add.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
76614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76615 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0280000 }
76617 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
76620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76621 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2080000 }
76623 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
76626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76627 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2280000 }
76629 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
76632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76633 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4080000 }
76635 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
76638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76639 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4280000 }
76641 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
76644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76645 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6080000 }
76647 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
76650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76651 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6280000 }
76653 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
76656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76657 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2880000 }
76659 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
76662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76663 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a80000 }
76665 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
76668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76669 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4880000 }
76671 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
76674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76675 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a80000 }
76677 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
76680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76681 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c80000 }
76683 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
76686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76687 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e80000 }
76689 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
76692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76693 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c80000 }
76695 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
76698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76699 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e80000 }
76701 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
76704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
76705 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c80000 }
76707 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
76710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
76711 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e80000 }
76713 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
76716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
76717 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6880000 }
76719 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
76722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
76723 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a80000 }
76725 /* add.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
76728 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76729 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc808 }
76731 /* add.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
76734 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76735 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8828 }
76737 /* add.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76740 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76741 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8808 }
76743 /* add.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
76746 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76747 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc088 }
76749 /* add.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
76752 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76753 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a8 }
76755 /* add.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76758 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76759 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8088 }
76761 /* add.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
76764 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76765 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc008 }
76767 /* add.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
76770 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76771 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8028 }
76773 /* add.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76776 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76777 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8008 }
76779 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76782 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76783 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20800 }
76785 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76788 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76789 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822800 }
76791 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
76794 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76795 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820800 }
76797 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76800 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76801 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4080000 }
76803 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76806 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76807 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84280000 }
76809 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
76812 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76813 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84080000 }
76815 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76818 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76819 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6080000 }
76821 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76824 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76825 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86280000 }
76827 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
76830 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76831 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86080000 }
76833 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
76836 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76837 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28800 }
76839 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
76842 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76843 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a800 }
76845 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
76848 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76849 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828800 }
76851 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
76854 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76855 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4880000 }
76857 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
76860 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76861 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a80000 }
76863 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
76866 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76867 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84880000 }
76869 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
76872 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76873 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c800 }
76875 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
76878 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76879 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e800 }
76881 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76884 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76885 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c800 }
76887 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
76890 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76891 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c80000 }
76893 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
76896 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76897 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e80000 }
76899 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76902 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76903 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c80000 }
76905 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
76908 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76909 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c80000 }
76911 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
76914 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76915 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e80000 }
76917 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76920 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76921 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c80000 }
76923 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
76926 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76927 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6880000 }
76929 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
76932 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76933 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a80000 }
76935 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76938 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76939 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86880000 }
76941 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
76944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
76945 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa18000 }
76947 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
76950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76951 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1a000 }
76953 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
76956 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76957 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa1b000 }
76959 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
76962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
76963 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa18400 }
76965 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
76968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76969 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa1a400 }
76971 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
76974 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76975 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa1b400 }
76977 /* add.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
76980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
76981 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa18600 }
76983 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
76986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
76987 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1a600 }
76989 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
76992 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
76993 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa1b600 }
76995 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
76998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
76999 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1880000 }
77001 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77005 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1a80000 }
77007 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77010 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77011 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1b80000 }
77013 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77017 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa18c0000 }
77019 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77023 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1ac0000 }
77025 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77028 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77029 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1bc0000 }
77031 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77035 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa18a0000 }
77037 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77041 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1aa0000 }
77043 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77046 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77047 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1ba0000 }
77049 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77053 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa18e0000 }
77055 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77059 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1ae0000 }
77061 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77064 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77065 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1be0000 }
77067 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77071 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa18b0000 }
77073 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77077 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1ab0000 }
77079 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77082 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77083 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1bb0000 }
77085 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77089 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa18f0000 }
77091 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77095 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1af0000 }
77097 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77101 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1bf0000 }
77103 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
77106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77107 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa1c00000 }
77109 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
77112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
77113 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1e00000 }
77115 /* add.w${G} ${Dsp-16-u16},$Dst16RnHI */
77118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
77119 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa1f00000 }
77121 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
77124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77125 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa1c40000 }
77127 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
77130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
77131 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa1e40000 }
77133 /* add.w${G} ${Dsp-16-u16},$Dst16AnHI */
77136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
77137 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa1f40000 }
77139 /* add.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77143 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa1c60000 }
77145 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77149 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1e60000 }
77151 /* add.w${G} ${Dsp-16-u16},[$Dst16An] */
77154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77155 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa1f60000 }
77157 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77161 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1c80000 }
77163 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77167 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1e80000 }
77169 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77173 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa1f80000 }
77175 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77179 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1cc0000 }
77181 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77185 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1ec0000 }
77187 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77191 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa1fc0000 }
77193 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77197 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ca0000 }
77199 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77203 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ea0000 }
77205 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77209 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa1fa0000 }
77211 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77215 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ce0000 }
77217 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77221 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ee0000 }
77223 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77227 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa1fe0000 }
77229 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77233 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1cb0000 }
77235 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77239 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1eb0000 }
77241 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77245 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa1fb0000 }
77247 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77251 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa1cf0000 }
77253 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77257 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa1ef0000 }
77259 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
77262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77263 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa1ff0000 }
77265 /* add.w${G} $Src16RnHI,$Dst16RnHI */
77268 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
77269 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa100 }
77271 /* add.w${G} $Src16AnHI,$Dst16RnHI */
77274 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
77275 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa140 }
77277 /* add.w${G} [$Src16An],$Dst16RnHI */
77280 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77281 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa160 }
77283 /* add.w${G} $Src16RnHI,$Dst16AnHI */
77286 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
77287 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa104 }
77289 /* add.w${G} $Src16AnHI,$Dst16AnHI */
77292 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
77293 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa144 }
77295 /* add.w${G} [$Src16An],$Dst16AnHI */
77298 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77299 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa164 }
77301 /* add.w${G} $Src16RnHI,[$Dst16An] */
77304 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77305 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa106 }
77307 /* add.w${G} $Src16AnHI,[$Dst16An] */
77310 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77311 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa146 }
77313 /* add.w${G} [$Src16An],[$Dst16An] */
77316 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77317 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa166 }
77319 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
77322 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77323 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa10800 }
77325 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
77328 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77329 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa14800 }
77331 /* add.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77334 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77335 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa16800 }
77337 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
77340 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77341 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa10c0000 }
77343 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
77346 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77347 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa14c0000 }
77349 /* add.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77352 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77353 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa16c0000 }
77355 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
77358 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77359 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa10a00 }
77361 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
77364 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77365 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa14a00 }
77367 /* add.w${G} [$Src16An],${Dsp-16-u8}[sb] */
77370 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77371 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa16a00 }
77373 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
77376 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77377 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa10e0000 }
77379 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
77382 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77383 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa14e0000 }
77385 /* add.w${G} [$Src16An],${Dsp-16-u16}[sb] */
77388 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77389 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa16e0000 }
77391 /* add.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
77394 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77395 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa10b00 }
77397 /* add.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
77400 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77401 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa14b00 }
77403 /* add.w${G} [$Src16An],${Dsp-16-s8}[fb] */
77406 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77407 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa16b00 }
77409 /* add.w${G} $Src16RnHI,${Dsp-16-u16} */
77412 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
77413 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa10f0000 }
77415 /* add.w${G} $Src16AnHI,${Dsp-16-u16} */
77418 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
77419 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa14f0000 }
77421 /* add.w${G} [$Src16An],${Dsp-16-u16} */
77424 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77425 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa16f0000 }
77427 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
77430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77431 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa08000 }
77433 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
77436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77437 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0a000 }
77439 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
77442 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77443 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa0b000 }
77445 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
77448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77449 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa08400 }
77451 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
77454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77455 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa0a400 }
77457 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
77460 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77461 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa0b400 }
77463 /* add.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
77466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77467 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa08600 }
77469 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
77472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77473 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0a600 }
77475 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
77478 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77479 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa0b600 }
77481 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
77484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77485 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0880000 }
77487 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77491 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0a80000 }
77493 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77496 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77497 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0b80000 }
77499 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77503 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa08c0000 }
77505 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77509 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0ac0000 }
77511 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77514 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77515 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0bc0000 }
77517 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77521 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa08a0000 }
77523 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77527 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0aa0000 }
77529 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77532 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77533 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0ba0000 }
77535 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77539 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa08e0000 }
77541 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77545 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0ae0000 }
77547 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77550 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77551 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0be0000 }
77553 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77557 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa08b0000 }
77559 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77563 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0ab0000 }
77565 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77568 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77569 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0bb0000 }
77571 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77575 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa08f0000 }
77577 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77581 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0af0000 }
77583 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77586 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77587 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0bf0000 }
77589 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
77592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77593 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa0c00000 }
77595 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
77598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77599 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0e00000 }
77601 /* add.b${G} ${Dsp-16-u16},$Dst16RnQI */
77604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
77605 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa0f00000 }
77607 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
77610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77611 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa0c40000 }
77613 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
77616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77617 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa0e40000 }
77619 /* add.b${G} ${Dsp-16-u16},$Dst16AnQI */
77622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
77623 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa0f40000 }
77625 /* add.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77629 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa0c60000 }
77631 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77635 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0e60000 }
77637 /* add.b${G} ${Dsp-16-u16},[$Dst16An] */
77640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77641 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa0f60000 }
77643 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77647 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0c80000 }
77649 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77653 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0e80000 }
77655 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77659 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa0f80000 }
77661 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77665 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0cc0000 }
77667 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77671 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0ec0000 }
77673 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77677 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa0fc0000 }
77679 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77683 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ca0000 }
77685 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77689 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ea0000 }
77691 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77695 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa0fa0000 }
77697 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77701 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ce0000 }
77703 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77707 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ee0000 }
77709 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77713 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa0fe0000 }
77715 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77719 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0cb0000 }
77721 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77725 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0eb0000 }
77727 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77731 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa0fb0000 }
77733 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77737 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa0cf0000 }
77739 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77743 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa0ef0000 }
77745 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
77748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77749 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa0ff0000 }
77751 /* add.b${G} $Src16RnQI,$Dst16RnQI */
77754 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
77755 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa000 }
77757 /* add.b${G} $Src16AnQI,$Dst16RnQI */
77760 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
77761 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa040 }
77763 /* add.b${G} [$Src16An],$Dst16RnQI */
77766 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77767 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa060 }
77769 /* add.b${G} $Src16RnQI,$Dst16AnQI */
77772 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
77773 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa004 }
77775 /* add.b${G} $Src16AnQI,$Dst16AnQI */
77778 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
77779 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa044 }
77781 /* add.b${G} [$Src16An],$Dst16AnQI */
77784 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77785 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa064 }
77787 /* add.b${G} $Src16RnQI,[$Dst16An] */
77790 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77791 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa006 }
77793 /* add.b${G} $Src16AnQI,[$Dst16An] */
77796 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77797 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa046 }
77799 /* add.b${G} [$Src16An],[$Dst16An] */
77802 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77803 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa066 }
77805 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
77808 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77809 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa00800 }
77811 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
77814 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77815 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa04800 }
77817 /* add.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77820 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77821 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa06800 }
77823 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
77826 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77827 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa00c0000 }
77829 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
77832 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77833 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa04c0000 }
77835 /* add.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77838 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77839 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa06c0000 }
77841 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
77844 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77845 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa00a00 }
77847 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
77850 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77851 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa04a00 }
77853 /* add.b${G} [$Src16An],${Dsp-16-u8}[sb] */
77856 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77857 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa06a00 }
77859 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
77862 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77863 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa00e0000 }
77865 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
77868 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77869 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa04e0000 }
77871 /* add.b${G} [$Src16An],${Dsp-16-u16}[sb] */
77874 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77875 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa06e0000 }
77877 /* add.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
77880 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77881 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa00b00 }
77883 /* add.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
77886 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77887 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa04b00 }
77889 /* add.b${G} [$Src16An],${Dsp-16-s8}[fb] */
77892 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77893 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa06b00 }
77895 /* add.b${G} $Src16RnQI,${Dsp-16-u16} */
77898 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
77899 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa00f0000 }
77901 /* add.b${G} $Src16AnQI,${Dsp-16-u16} */
77904 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
77905 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa04f0000 }
77907 /* add.b${G} [$Src16An],${Dsp-16-u16} */
77910 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77911 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa06f0000 }
77913 /* add.b${S} #${Imm-8-QI},r0l */
77916 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
77917 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8400 }
77919 /* add.b${S} #${Imm-8-QI},r0h */
77922 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
77923 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8300 }
77925 /* add.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
77928 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77929 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x850000 }
77931 /* add.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
77934 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77935 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x860000 }
77937 /* add.b${S} #${Imm-8-QI},${Dsp-16-u16} */
77940 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
77941 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x87000000 }
77943 /* add.l${Q} #${Imm-12-s4},$Dst32RnUnprefixedSI */
77946 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
77947 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xf830 }
77949 /* add.l${Q} #${Imm-12-s4},$Dst32AnUnprefixedSI */
77952 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
77953 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xf0b0 }
77955 /* add.l${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
77958 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77959 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xf030 }
77961 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
77964 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77965 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xf23000 }
77967 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
77970 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77971 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xf4300000 }
77973 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
77976 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77977 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xf6300000 }
77979 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
77982 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77983 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xf2b000 }
77985 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
77988 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77989 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xf4b00000 }
77991 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
77994 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77995 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xf2f000 }
77997 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78000 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78001 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xf4f00000 }
78003 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16} */
78006 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78007 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xf6f00000 }
78009 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24} */
78012 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78013 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xf6b00000 }
78015 /* add.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
78018 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78019 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe930 }
78021 /* add.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
78024 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78025 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1b0 }
78027 /* add.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78030 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78031 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe130 }
78033 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78036 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78037 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe33000 }
78039 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78042 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78043 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5300000 }
78045 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78048 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78049 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7300000 }
78051 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78054 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78055 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3b000 }
78057 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78060 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78061 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5b00000 }
78063 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78066 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78067 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3f000 }
78069 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78072 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78073 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5f00000 }
78075 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
78078 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78079 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7f00000 }
78081 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
78084 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78085 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7b00000 }
78087 /* add.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
78090 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78091 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe830 }
78093 /* add.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
78096 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78097 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0b0 }
78099 /* add.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78102 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78103 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe030 }
78105 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78108 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78109 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe23000 }
78111 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78114 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78115 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4300000 }
78117 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78120 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78121 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6300000 }
78123 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78126 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78127 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2b000 }
78129 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78132 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78133 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4b00000 }
78135 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78138 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78139 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2f000 }
78141 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78144 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78145 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4f00000 }
78147 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
78150 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78151 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6f00000 }
78153 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
78156 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78157 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6b00000 }
78159 /* add.w${Q} #${Imm-8-s4},$Dst16RnHI */
78162 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
78163 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xc900 }
78165 /* add.w${Q} #${Imm-8-s4},$Dst16AnHI */
78168 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
78169 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xc904 }
78171 /* add.w${Q} #${Imm-8-s4},[$Dst16An] */
78174 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78175 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xc906 }
78177 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78180 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78181 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xc90800 }
78183 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78186 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78187 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xc90c0000 }
78189 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78192 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78193 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xc90a00 }
78195 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78198 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78199 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xc90e0000 }
78201 /* add.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78204 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78205 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xc90b00 }
78207 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
78210 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78211 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xc90f0000 }
78213 /* add.b${Q} #${Imm-8-s4},$Dst16RnQI */
78216 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
78217 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xc800 }
78219 /* add.b${Q} #${Imm-8-s4},$Dst16AnQI */
78222 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
78223 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xc804 }
78225 /* add.b${Q} #${Imm-8-s4},[$Dst16An] */
78228 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78229 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xc806 }
78231 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78234 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78235 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xc80800 }
78237 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78240 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78241 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xc80c0000 }
78243 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78246 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78247 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xc80a00 }
78249 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78252 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78253 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xc80e0000 }
78255 /* add.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78258 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78259 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xc80b00 }
78261 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
78264 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78265 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xc80f0000 }
78267 /* add.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
78270 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78271 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892e0000 }
78273 /* add.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
78276 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78277 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81ae0000 }
78279 /* add.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
78282 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78283 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812e0000 }
78285 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78288 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78289 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832e0000 }
78291 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78294 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78295 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ae0000 }
78297 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78300 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78301 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ee0000 }
78303 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78306 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78307 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852e0000 }
78309 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78312 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78313 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ae0000 }
78315 /* add.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
78318 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78319 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ee0000 }
78321 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78324 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78325 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ee0000 }
78327 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78330 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78331 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872e0000 }
78333 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24} */
78336 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
78337 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ae0000 }
78339 /* add.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
78342 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78343 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882e00 }
78345 /* add.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
78348 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78349 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80ae00 }
78351 /* add.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
78354 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78355 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802e00 }
78357 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78360 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78361 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822e0000 }
78363 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78366 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78367 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ae0000 }
78369 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78372 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78373 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ee0000 }
78375 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78378 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78379 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842e0000 }
78381 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78384 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78385 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ae0000 }
78387 /* add.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
78390 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78391 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ee0000 }
78393 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78396 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78397 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ee0000 }
78399 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78402 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78403 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862e0000 }
78405 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24} */
78408 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
78409 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ae0000 }
78411 /* add.w${G} #${Imm-16-HI},$Dst16RnHI */
78414 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
78415 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77400000 }
78417 /* add.w${G} #${Imm-16-HI},$Dst16AnHI */
78420 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
78421 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77440000 }
78423 /* add.w${G} #${Imm-16-HI},[$Dst16An] */
78426 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
78427 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77460000 }
78429 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
78432 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78433 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77480000 }
78435 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78438 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78439 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x774a0000 }
78441 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78444 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78445 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x774b0000 }
78447 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
78450 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78451 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x774c0000 }
78453 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78456 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78457 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x774e0000 }
78459 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78462 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78463 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x774f0000 }
78465 /* add.b${G} #${Imm-16-QI},$Dst16RnQI */
78468 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
78469 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x764000 }
78471 /* add.b${G} #${Imm-16-QI},$Dst16AnQI */
78474 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
78475 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x764400 }
78477 /* add.b${G} #${Imm-16-QI},[$Dst16An] */
78480 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
78481 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x764600 }
78483 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
78486 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78487 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76480000 }
78489 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78492 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78493 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x764a0000 }
78495 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78498 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78499 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x764b0000 }
78501 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
78504 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78505 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x764c0000 }
78507 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78510 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78511 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x764e0000 }
78513 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78516 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78517 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x764f0000 }
78519 /* add.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
78522 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
78523 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x88310000 }
78525 /* add.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
78528 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
78529 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80b10000 }
78531 /* add.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
78534 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78535 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x80310000 }
78537 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78540 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78541 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82310000 }
78543 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
78546 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78547 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82b10000 }
78549 /* add.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
78552 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78553 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82f10000 }
78555 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78558 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78559 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84310000 }
78561 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
78564 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78565 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84b10000 }
78567 /* add.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
78570 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78571 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84f10000 }
78573 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16} */
78576 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
78577 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86f10000 }
78579 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78582 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78583 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86310000 }
78585 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24} */
78588 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
78589 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86b10000 }
78591 /* adcf.w $Dst32RnUnprefixedHI */
78594 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78595 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb91e }
78597 /* adcf.w $Dst32AnUnprefixedHI */
78600 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78601 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb19e }
78603 /* adcf.w [$Dst32AnUnprefixed] */
78606 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78607 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb11e }
78609 /* adcf.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78612 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78613 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb31e00 }
78615 /* adcf.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78618 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78619 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb51e0000 }
78621 /* adcf.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78624 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78625 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb71e0000 }
78627 /* adcf.w ${Dsp-16-u8}[sb] */
78630 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78631 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb39e00 }
78633 /* adcf.w ${Dsp-16-u16}[sb] */
78636 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78637 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb59e0000 }
78639 /* adcf.w ${Dsp-16-s8}[fb] */
78642 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78643 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3de00 }
78645 /* adcf.w ${Dsp-16-s16}[fb] */
78648 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78649 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5de0000 }
78651 /* adcf.w ${Dsp-16-u16} */
78654 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78655 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7de0000 }
78657 /* adcf.w ${Dsp-16-u24} */
78660 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78661 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb79e0000 }
78663 /* adcf.b $Dst32RnUnprefixedQI */
78666 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78667 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb81e }
78669 /* adcf.b $Dst32AnUnprefixedQI */
78672 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78673 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb09e }
78675 /* adcf.b [$Dst32AnUnprefixed] */
78678 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78679 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb01e }
78681 /* adcf.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78684 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78685 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb21e00 }
78687 /* adcf.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78690 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78691 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb41e0000 }
78693 /* adcf.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78696 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78697 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb61e0000 }
78699 /* adcf.b ${Dsp-16-u8}[sb] */
78702 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78703 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb29e00 }
78705 /* adcf.b ${Dsp-16-u16}[sb] */
78708 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78709 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb49e0000 }
78711 /* adcf.b ${Dsp-16-s8}[fb] */
78714 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78715 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2de00 }
78717 /* adcf.b ${Dsp-16-s16}[fb] */
78720 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78721 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4de0000 }
78723 /* adcf.b ${Dsp-16-u16} */
78726 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78727 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6de0000 }
78729 /* adcf.b ${Dsp-16-u24} */
78732 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78733 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb69e0000 }
78735 /* adcf.w $Dst16RnHI */
78738 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78739 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77e0 }
78741 /* adcf.w $Dst16AnHI */
78744 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
78745 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77e4 }
78747 /* adcf.w [$Dst16An] */
78750 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78751 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77e6 }
78753 /* adcf.w ${Dsp-16-u8}[$Dst16An] */
78756 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78757 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77e800 }
78759 /* adcf.w ${Dsp-16-u16}[$Dst16An] */
78762 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78763 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ec0000 }
78765 /* adcf.w ${Dsp-16-u8}[sb] */
78768 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78769 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ea00 }
78771 /* adcf.w ${Dsp-16-u16}[sb] */
78774 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78775 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ee0000 }
78777 /* adcf.w ${Dsp-16-s8}[fb] */
78780 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78781 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77eb00 }
78783 /* adcf.w ${Dsp-16-u16} */
78786 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78787 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ef0000 }
78789 /* adcf.b $Dst16RnQI */
78792 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
78793 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76e0 }
78795 /* adcf.b $Dst16AnQI */
78798 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
78799 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76e4 }
78801 /* adcf.b [$Dst16An] */
78804 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78805 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76e6 }
78807 /* adcf.b ${Dsp-16-u8}[$Dst16An] */
78810 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78811 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76e800 }
78813 /* adcf.b ${Dsp-16-u16}[$Dst16An] */
78816 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78817 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ec0000 }
78819 /* adcf.b ${Dsp-16-u8}[sb] */
78822 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78823 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ea00 }
78825 /* adcf.b ${Dsp-16-u16}[sb] */
78828 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78829 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ee0000 }
78831 /* adcf.b ${Dsp-16-s8}[fb] */
78834 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78835 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76eb00 }
78837 /* adcf.b ${Dsp-16-u16} */
78840 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78841 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ef0000 }
78843 /* abs.w $Dst32RnUnprefixedHI */
78846 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78847 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91f }
78849 /* abs.w $Dst32AnUnprefixedHI */
78852 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78853 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19f }
78855 /* abs.w [$Dst32AnUnprefixed] */
78858 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78859 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11f }
78861 /* abs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78864 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78865 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31f00 }
78867 /* abs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78870 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78871 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51f0000 }
78873 /* abs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78876 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78877 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71f0000 }
78879 /* abs.w ${Dsp-16-u8}[sb] */
78882 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78883 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39f00 }
78885 /* abs.w ${Dsp-16-u16}[sb] */
78888 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78889 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59f0000 }
78891 /* abs.w ${Dsp-16-s8}[fb] */
78894 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78895 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3df00 }
78897 /* abs.w ${Dsp-16-s16}[fb] */
78900 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78901 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5df0000 }
78903 /* abs.w ${Dsp-16-u16} */
78906 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78907 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7df0000 }
78909 /* abs.w ${Dsp-16-u24} */
78912 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78913 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79f0000 }
78915 /* abs.b $Dst32RnUnprefixedQI */
78918 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78919 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81f }
78921 /* abs.b $Dst32AnUnprefixedQI */
78924 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78925 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09f }
78927 /* abs.b [$Dst32AnUnprefixed] */
78930 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78931 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01f }
78933 /* abs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78936 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78937 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21f00 }
78939 /* abs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78942 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78943 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41f0000 }
78945 /* abs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78948 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78949 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61f0000 }
78951 /* abs.b ${Dsp-16-u8}[sb] */
78954 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78955 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29f00 }
78957 /* abs.b ${Dsp-16-u16}[sb] */
78960 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78961 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49f0000 }
78963 /* abs.b ${Dsp-16-s8}[fb] */
78966 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78967 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2df00 }
78969 /* abs.b ${Dsp-16-s16}[fb] */
78972 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78973 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4df0000 }
78975 /* abs.b ${Dsp-16-u16} */
78978 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78979 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6df0000 }
78981 /* abs.b ${Dsp-16-u24} */
78984 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78985 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69f0000 }
78987 /* abs.w $Dst16RnHI */
78990 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78991 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77f0 }
78993 /* abs.w $Dst16AnHI */
78996 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
78997 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77f4 }
78999 /* abs.w [$Dst16An] */
79002 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79003 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77f6 }
79005 /* abs.w ${Dsp-16-u8}[$Dst16An] */
79008 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79009 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77f800 }
79011 /* abs.w ${Dsp-16-u16}[$Dst16An] */
79014 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79015 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77fc0000 }
79017 /* abs.w ${Dsp-16-u8}[sb] */
79020 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79021 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77fa00 }
79023 /* abs.w ${Dsp-16-u16}[sb] */
79026 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79027 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77fe0000 }
79029 /* abs.w ${Dsp-16-s8}[fb] */
79032 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79033 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77fb00 }
79035 /* abs.w ${Dsp-16-u16} */
79038 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79039 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ff0000 }
79041 /* abs.b $Dst16RnQI */
79044 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
79045 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76f0 }
79047 /* abs.b $Dst16AnQI */
79050 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
79051 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76f4 }
79053 /* abs.b [$Dst16An] */
79056 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79057 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76f6 }
79059 /* abs.b ${Dsp-16-u8}[$Dst16An] */
79062 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79063 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76f800 }
79065 /* abs.b ${Dsp-16-u16}[$Dst16An] */
79068 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79069 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76fc0000 }
79071 /* abs.b ${Dsp-16-u8}[sb] */
79074 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79075 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76fa00 }
79077 /* abs.b ${Dsp-16-u16}[sb] */
79080 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79081 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76fe0000 }
79083 /* abs.b ${Dsp-16-s8}[fb] */
79086 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79087 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76fb00 }
79089 /* abs.b ${Dsp-16-u16} */
79092 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79093 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ff0000 }
79095 /* add.w$Q #${Imm-12-s4},sp */
79098 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
79099 & ifmt_add16_wQ_sp
, { 0x7db0 }
79101 /* add.b$G #${Imm-16-QI},sp */
79104 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79105 & ifmt_add16_b_G_sp
, { 0x7ceb00 }
79107 /* add.w$G #${Imm-16-HI},sp */
79110 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79111 & ifmt_add16_w_G_sp
, { 0x7deb0000 }
79113 /* add.l$Q #${Imm3-S},sp */
79116 { { MNEM
, OP (Q
), ' ', '#', OP (IMM3_S
), ',', 's', 'p', 0 } },
79117 & ifmt_add32_l_imm3_Q
, { 0x42 }
79119 /* add.l$S #${Imm-16-QI},sp */
79122 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79123 & ifmt_add32_l_imm8_S
, { 0xb60300 }
79125 /* add.l$G #${Imm-16-HI},sp */
79128 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79129 & ifmt_add32_l_imm16_G
, { 0xb6130000 }
79131 /* dadc.b #${Imm-16-QI},r0l */
79134 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79135 & ifmt_add32_l_imm8_S
, { 0x7cee00 }
79137 /* dadc.w #${Imm-16-HI},r0 */
79140 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79141 & ifmt_add32_l_imm16_G
, { 0x7dee0000 }
79143 /* dadc.b r0h,r0l */
79146 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79147 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce6 }
79152 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79153 & ifmt_dadc16_b_r0h_r0l
, { 0x7de6 }
79155 /* dadd.b #${Imm-16-QI},r0l */
79158 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79159 & ifmt_add32_l_imm8_S
, { 0x7cec00 }
79161 /* dadd.w #${Imm-16-HI},r0 */
79164 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79165 & ifmt_add32_l_imm16_G
, { 0x7dec0000 }
79167 /* dadd.b r0h,r0l */
79170 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79171 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce4 }
79176 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79177 & ifmt_dadc16_b_r0h_r0l
, { 0x7de4 }
79182 { { MNEM
, OP (COND16C
), ' ', 'c', 0 } },
79183 & ifmt_bm16_c
, { 0x7dd0 }
79188 { { MNEM
, OP (COND32
), ' ', 'c', 0 } },
79189 & ifmt_bm32_c
, { 0xd928 }
79195 & ifmt_brk16
, { 0x0 }
79201 & ifmt_brk16
, { 0x0 }
79207 & ifmt_brk16
, { 0x8 }
79209 /* btst:s ${Bit3-S},${Dsp-8-u16} */
79212 { { MNEM
, ' ', OP (BIT3_S
), ',', OP (DSP_8_U16
), 0 } },
79213 & ifmt_btst_s
, { 0xa0000 }
79215 /* dec.w ${Dst16An-S} */
79218 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79219 & ifmt_dec16_w
, { 0xf2 }
79221 /* div.b #${Imm-16-QI} */
79224 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79225 & ifmt_add16_b_G_sp
, { 0x7ce100 }
79227 /* div.w #${Imm-16-HI} */
79230 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79231 & ifmt_add16_w_G_sp
, { 0x7de10000 }
79233 /* div.b #${Imm-16-QI} */
79236 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79237 & ifmt_div32_b_Imm_16_QI
, { 0xb04300 }
79239 /* div.w #${Imm-16-HI} */
79242 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79243 & ifmt_div32_w_Imm_16_HI
, { 0xb0530000 }
79245 /* divu.b #${Imm-16-QI} */
79248 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79249 & ifmt_add16_b_G_sp
, { 0x7ce000 }
79251 /* divu.w #${Imm-16-HI} */
79254 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79255 & ifmt_add16_w_G_sp
, { 0x7de00000 }
79257 /* divu.b #${Imm-16-QI} */
79260 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79261 & ifmt_div32_b_Imm_16_QI
, { 0xb00300 }
79263 /* divu.w #${Imm-16-HI} */
79266 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79267 & ifmt_div32_w_Imm_16_HI
, { 0xb0130000 }
79269 /* divx.b #${Imm-16-QI} */
79272 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79273 & ifmt_add16_b_G_sp
, { 0x7ce300 }
79275 /* divx.w #${Imm-16-HI} */
79278 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79279 & ifmt_add16_w_G_sp
, { 0x7de30000 }
79281 /* divx.b #${Imm-16-QI} */
79284 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79285 & ifmt_div32_b_Imm_16_QI
, { 0xb24300 }
79287 /* divx.w #${Imm-16-HI} */
79290 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79291 & ifmt_div32_w_Imm_16_HI
, { 0xb2530000 }
79293 /* dsbb.b #${Imm-16-QI},r0l */
79296 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79297 & ifmt_add32_l_imm8_S
, { 0x7cef00 }
79299 /* dsbb.w #${Imm-16-HI},r0 */
79302 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79303 & ifmt_add32_l_imm16_G
, { 0x7def0000 }
79305 /* dsbb.b r0h,r0l */
79308 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79309 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce7 }
79314 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79315 & ifmt_dadc16_b_r0h_r0l
, { 0x7de7 }
79317 /* dsub.b #${Imm-16-QI},r0l */
79320 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79321 & ifmt_add32_l_imm8_S
, { 0x7ced00 }
79323 /* dsub.w #${Imm-16-HI},r0 */
79326 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79327 & ifmt_add32_l_imm16_G
, { 0x7ded0000 }
79329 /* dsub.b r0h,r0l */
79332 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79333 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce5 }
79338 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79339 & ifmt_dadc16_b_r0h_r0l
, { 0x7de5 }
79341 /* enter #${Dsp-16-u8} */
79344 { { MNEM
, ' ', '#', OP (DSP_16_U8
), 0 } },
79345 & ifmt_enter16
, { 0x7cf200 }
79351 & ifmt_dadc16_b_r0h_r0l
, { 0x7df2 }
79353 /* enter #${Dsp-8-u8} */
79356 { { MNEM
, ' ', '#', OP (DSP_8_U8
), 0 } },
79357 & ifmt_enter32
, { 0xec00 }
79363 & ifmt_brk16
, { 0xfc }
79365 /* fclr ${flags16} */
79368 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79369 & ifmt_fclr16
, { 0xeb05 }
79371 /* fset ${flags16} */
79374 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79375 & ifmt_fclr16
, { 0xeb04 }
79377 /* fclr ${flags32} */
79380 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79381 & ifmt_fclr
, { 0xd3e8 }
79383 /* fset ${flags32} */
79386 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79387 & ifmt_fclr
, { 0xd1e8 }
79389 /* inc.w ${Dst16An-S} */
79392 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79393 & ifmt_dec16_w
, { 0xb2 }
79399 & ifmt_brk16
, { 0x9f }
79401 /* int #${Dsp-10-u6} */
79404 { { MNEM
, ' ', '#', OP (DSP_10_U6
), 0 } },
79405 & ifmt_int16
, { 0xebc0 }
79411 & ifmt_brk16
, { 0xf6 }
79413 /* int #${Dsp-8-u6} */
79416 { { MNEM
, ' ', '#', OP (DSP_8_U6
), 0 } },
79417 & ifmt_int32
, { 0xbe00 }
79423 & ifmt_brk16
, { 0xbf }
79425 /* j$cond16j5 ${Lab-8-8} */
79428 { { MNEM
, OP (COND16J5
), ' ', OP (LAB_8_8
), 0 } },
79429 & ifmt_jcnd16_5
, { 0x6800 }
79431 /* j$cond16j ${Lab-16-8} */
79434 { { MNEM
, OP (COND16J
), ' ', OP (LAB_16_8
), 0 } },
79435 & ifmt_jcnd16
, { 0x7dc000 }
79437 /* j$cond32j ${Lab-8-8} */
79440 { { MNEM
, OP (COND32J
), ' ', OP (LAB_8_8
), 0 } },
79441 & ifmt_jcnd32
, { 0x8a00 }
79443 /* jmp.s ${Lab-5-3} */
79446 { { MNEM
, ' ', OP (LAB_5_3
), 0 } },
79447 & ifmt_jmp16_s
, { 0x60 }
79449 /* jmp.b ${Lab-8-8} */
79452 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79453 & ifmt_jmp16_b
, { 0xfe00 }
79455 /* jmp.w ${Lab-8-16} */
79458 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79459 & ifmt_jmp16_w
, { 0xf40000 }
79461 /* jmp.a ${Lab-8-24} */
79464 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79465 & ifmt_jmp16_a
, { 0xfc000000 }
79467 /* jmps #${Imm-8-QI} */
79470 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79471 & ifmt_jmps16
, { 0xee00 }
79473 /* jmp.s ${Lab32-jmp-s} */
79476 { { MNEM
, ' ', OP (LAB32_JMP_S
), 0 } },
79477 & ifmt_jmp32_s
, { 0x4a }
79479 /* jmp.b ${Lab-8-8} */
79482 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79483 & ifmt_jmp16_b
, { 0xbb00 }
79485 /* jmp.w ${Lab-8-16} */
79488 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79489 & ifmt_jmp16_w
, { 0xce0000 }
79491 /* jmp.a ${Lab-8-24} */
79494 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79495 & ifmt_jmp16_a
, { 0xcc000000 }
79497 /* jmps #${Imm-8-QI} */
79500 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79501 & ifmt_jmps16
, { 0xdc00 }
79503 /* jsr.w ${Lab-8-16} */
79506 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79507 & ifmt_jmp16_w
, { 0xf50000 }
79509 /* jsr.a ${Lab-8-24} */
79512 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79513 & ifmt_jmp16_a
, { 0xfd000000 }
79515 /* jsr.w ${Lab-8-16} */
79518 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79519 & ifmt_jmp16_w
, { 0xcf0000 }
79521 /* jsr.a ${Lab-8-24} */
79524 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79525 & ifmt_jmp16_a
, { 0xcd000000 }
79527 /* jsrs #${Imm-8-QI} */
79530 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79531 & ifmt_jmps16
, { 0xef00 }
79533 /* jsrs #${Imm-8-QI} */
79536 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79537 & ifmt_jmps16
, { 0xdd00 }
79539 /* ldc #${Imm-16-HI},${cr16} */
79542 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR16
), 0 } },
79543 & ifmt_ldc16_imm16
, { 0xeb000000 }
79545 /* ldc #${Imm-16-HI},${cr1-Unprefixed-32} */
79548 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR1_UNPREFIXED_32
), 0 } },
79549 & ifmt_ldc32_imm16_cr1
, { 0xd5a80000 }
79551 /* ldc #${Dsp-16-u24},${cr2-32} */
79554 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
79555 & ifmt_ldc32_imm16_cr2
, { 0xd5280000 }
79557 /* ldc #${Dsp-16-u24},${cr3-Unprefixed-32} */
79560 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR3_UNPREFIXED_32
), 0 } },
79561 & ifmt_ldc32_imm16_cr3
, { 0xd5680000 }
79563 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79566 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79567 & ifmt_ldctx16
, { 0x7cf00000 }
79569 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79572 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79573 & ifmt_ldctx16
, { 0xb6c30000 }
79575 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79578 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79579 & ifmt_ldctx16
, { 0x7df00000 }
79581 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79584 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79585 & ifmt_ldctx16
, { 0xb6d30000 }
79587 /* ldipl #${Imm-13-u3} */
79590 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79591 & ifmt_ldipl16_imm
, { 0x7da0 }
79593 /* ldipl #${Imm-13-u3} */
79596 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79597 & ifmt_ldipl16_imm
, { 0xd5e8 }
79599 /* mov.b$S #${Imm-8-QI},a0 */
79602 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '0', 0 } },
79603 & ifmt_jmps16
, { 0xe200 }
79605 /* mov.b$S #${Imm-8-QI},a1 */
79608 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '1', 0 } },
79609 & ifmt_jmps16
, { 0xea00 }
79611 /* mov.w$S #${Imm-8-HI},a0 */
79614 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79615 & ifmt_mov16_w_S_imm_a0
, { 0xa20000 }
79617 /* mov.w$S #${Imm-8-HI},a1 */
79620 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79621 & ifmt_mov16_w_S_imm_a0
, { 0xaa0000 }
79623 /* mov.w$S #${Imm-8-HI},a0 */
79626 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79627 & ifmt_mov16_w_S_imm_a0
, { 0x9c0000 }
79629 /* mov.w$S #${Imm-8-HI},a1 */
79632 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79633 & ifmt_mov16_w_S_imm_a0
, { 0x9d0000 }
79635 /* mov.l$S #${Dsp-8-s24},a0 */
79638 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '0', 0 } },
79639 & ifmt_mov32_l_a0
, { 0xbc000000 }
79641 /* mov.l$S #${Dsp-8-s24},a1 */
79644 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '1', 0 } },
79645 & ifmt_mov32_l_a0
, { 0xbd000000 }
79647 /* mov.b$S r0l,a1 */
79650 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'a', '1', 0 } },
79651 & ifmt_brk16
, { 0x34 }
79653 /* mov.b$S r0h,a0 */
79656 { { MNEM
, OP (S
), ' ', 'r', '0', 'h', ',', 'a', '0', 0 } },
79657 & ifmt_brk16
, { 0x30 }
79663 & ifmt_brk16
, { 0x4 }
79669 & ifmt_brk16
, { 0xde }
79674 { { MNEM
, ' ', OP (CR16
), 0 } },
79675 & ifmt_popc16_imm16
, { 0xeb03 }
79677 /* popc ${cr1-Unprefixed-32} */
79680 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79681 & ifmt_popc32_imm16_cr1
, { 0xd3a8 }
79683 /* popc ${cr2-32} */
79686 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79687 & ifmt_popc32_imm16_cr2
, { 0xd328 }
79689 /* pushc ${cr16} */
79692 { { MNEM
, ' ', OP (CR16
), 0 } },
79693 & ifmt_popc16_imm16
, { 0xeb02 }
79695 /* pushc ${cr1-Unprefixed-32} */
79698 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79699 & ifmt_popc32_imm16_cr1
, { 0xd1a8 }
79701 /* pushc ${cr2-32} */
79704 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79705 & ifmt_popc32_imm16_cr2
, { 0xd128 }
79707 /* popm ${Regsetpop} */
79710 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79711 & ifmt_popm16
, { 0xed00 }
79713 /* pushm ${Regsetpush} */
79716 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79717 & ifmt_pushm16
, { 0xec00 }
79719 /* popm ${Regsetpop} */
79722 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79723 & ifmt_popm16
, { 0x8e00 }
79725 /* pushm ${Regsetpush} */
79728 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79729 & ifmt_pushm16
, { 0x8f00 }
79731 /* push.b$G #${Imm-16-QI} */
79734 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), 0 } },
79735 & ifmt_add32_l_imm8_S
, { 0x7ce200 }
79737 /* push.w$G #${Imm-16-HI} */
79740 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), 0 } },
79741 & ifmt_add32_l_imm16_G
, { 0x7de20000 }
79743 /* push.b #${Imm-8-QI} */
79746 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79747 & ifmt_jmps16
, { 0xae00 }
79749 /* push.w #${Imm-8-HI} */
79752 { { MNEM
, ' ', '#', OP (IMM_8_HI
), 0 } },
79753 & ifmt_mov16_w_S_imm_a0
, { 0xaf0000 }
79755 /* push.l #${Imm-16-SI} */
79758 { { MNEM
, ' ', '#', OP (IMM_16_SI
), 0 } },
79759 & ifmt_push32_l_imm
, { 0xb6530000 }
79765 & ifmt_brk16
, { 0xfb }
79771 & ifmt_brk16
, { 0x9e }
79777 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf1 }
79783 & ifmt_dadc16_b_r0h_r0l
, { 0x7df1 }
79789 & ifmt_dadc16_b_r0h_r0l
, { 0xb843 }
79795 & ifmt_dadc16_b_r0h_r0l
, { 0xb853 }
79801 & ifmt_brk16
, { 0xf3 }
79807 & ifmt_brk16
, { 0xdf }
79813 & ifmt_dadc16_b_r0h_r0l
, { 0xb8c3 }
79819 & ifmt_dadc16_b_r0h_r0l
, { 0xb8d3 }
79821 /* sha.l #${Imm-sh-12-s4},r2r0 */
79824 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79825 & ifmt_sha16_L_imm_r2r0
, { 0xeba0 }
79827 /* sha.l #${Imm-sh-12-s4},r3r1 */
79830 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79831 & ifmt_sha16_L_imm_r2r0
, { 0xebb0 }
79833 /* sha.l r1h,r2r0 */
79836 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79837 & ifmt_dadc16_b_r0h_r0l
, { 0xeb21 }
79839 /* sha.l r1h,r3r1 */
79842 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79843 & ifmt_dadc16_b_r0h_r0l
, { 0xeb31 }
79845 /* shl.l #${Imm-sh-12-s4},r2r0 */
79848 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79849 & ifmt_sha16_L_imm_r2r0
, { 0xeb80 }
79851 /* shl.l #${Imm-sh-12-s4},r3r1 */
79854 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79855 & ifmt_sha16_L_imm_r2r0
, { 0xeb90 }
79857 /* shl.l r1h,r2r0 */
79860 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79861 & ifmt_dadc16_b_r0h_r0l
, { 0xeb01 }
79863 /* shl.l r1h,r3r1 */
79866 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79867 & ifmt_dadc16_b_r0h_r0l
, { 0xeb11 }
79873 & ifmt_dadc16_b_r0h_r0l
, { 0xb283 }
79879 & ifmt_dadc16_b_r0h_r0l
, { 0xb293 }
79885 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce9 }
79891 & ifmt_dadc16_b_r0h_r0l
, { 0x7de9 }
79897 & ifmt_dadc16_b_r0h_r0l
, { 0xb683 }
79903 & ifmt_dadc16_b_r0h_r0l
, { 0xb693 }
79909 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce8 }
79915 & ifmt_dadc16_b_r0h_r0l
, { 0x7de8 }
79921 & ifmt_dadc16_b_r0h_r0l
, { 0xb083 }
79927 & ifmt_dadc16_b_r0h_r0l
, { 0xb093 }
79933 & ifmt_dadc16_b_r0h_r0l
, { 0xb883 }
79939 & ifmt_dadc16_b_r0h_r0l
, { 0xb893 }
79945 & ifmt_dadc16_b_r0h_r0l
, { 0xb483 }
79951 & ifmt_dadc16_b_r0h_r0l
, { 0xb493 }
79957 & ifmt_dadc16_b_r0h_r0l
, { 0x7cea }
79963 & ifmt_dadc16_b_r0h_r0l
, { 0x7dea }
79969 & ifmt_dadc16_b_r0h_r0l
, { 0xb803 }
79975 & ifmt_dadc16_b_r0h_r0l
, { 0xb813 }
79977 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0h */
79980 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'h', 0 } },
79981 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdb0000 }
79983 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0l */
79986 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79987 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdc0000 }
79989 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb] */
79992 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79993 & ifmt_stzx16_imm8_imm8_dsp8sb
, { 0xdd000000 }
79995 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb] */
79998 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79999 & ifmt_stzx16_imm8_imm8_dsp8fb
, { 0xde000000 }
80001 /* stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16} */
80004 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
80005 & ifmt_stzx16_imm8_imm8_abs16
, { 0xde000000 }
80011 & ifmt_brk16
, { 0xff }
80017 & ifmt_brk16
, { 0xff }
80023 & ifmt_dadc16_b_r0h_r0l
, { 0x7df3 }
80029 & ifmt_dadc16_b_r0h_r0l
, { 0xb203 }
80034 { { MNEM
, ' ', 'r', '0', 0 } },
80035 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf3 }
80041 & ifmt_brk16
, { 0x41 }
80043 /* dest-indirect */
80047 & ifmt_brk16
, { 0x9 }
80049 /* src-dest-indirect */
80053 & ifmt_brk16
, { 0x49 }
80062 /* Formats for ALIAS macro-insns. */
80064 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80065 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
80067 #define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
80069 static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED
= {
80070 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
80075 /* Each non-simple macro entry points to an array of expansion possibilities. */
80077 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80078 #define A(a) (1 << CGEN_INSN_##a)
80080 #define A(a) (1 << CGEN_INSN_/**/a)
80082 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80083 #define OPERAND(op) M32C_OPERAND_##op
80085 #define OPERAND(op) M32C_OPERAND_/**/op
80087 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
80088 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
80090 /* The macro instruction table. */
80092 static const CGEN_IBASE m32c_cgen_macro_insn_table
[] =
80094 /* add.b:q #${Imm-12-s4},sp */
80096 -1, "add16-bQ-sp", "add.b:q", 16,
80097 { 0|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE
, 0 } } } }
80101 /* The macro instruction opcode table. */
80103 static const CGEN_OPCODE m32c_cgen_macro_insn_opcode_table
[] =
80105 /* add.b:q #${Imm-12-s4},sp */
80108 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
80109 & ifmt_add16_bQ_sp
, { 0x7db0 }
80118 #ifndef CGEN_ASM_HASH_P
80119 #define CGEN_ASM_HASH_P(insn) 1
80122 #ifndef CGEN_DIS_HASH_P
80123 #define CGEN_DIS_HASH_P(insn) 1
80126 /* Return non-zero if INSN is to be added to the hash table.
80127 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
80130 asm_hash_insn_p (insn
)
80131 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
80133 return CGEN_ASM_HASH_P (insn
);
80137 dis_hash_insn_p (insn
)
80138 const CGEN_INSN
*insn
;
80140 /* If building the hash table and the NO-DIS attribute is present,
80142 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
80144 return CGEN_DIS_HASH_P (insn
);
80147 #ifndef CGEN_ASM_HASH
80148 #define CGEN_ASM_HASH_SIZE 127
80149 #ifdef CGEN_MNEMONIC_OPERANDS
80150 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
80152 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
80156 /* It doesn't make much sense to provide a default here,
80157 but while this is under development we do.
80158 BUFFER is a pointer to the bytes of the insn, target order.
80159 VALUE is the first base_insn_bitsize bits as an int in host order. */
80161 #ifndef CGEN_DIS_HASH
80162 #define CGEN_DIS_HASH_SIZE 256
80163 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
80166 /* The result is the hash value of the insn.
80167 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
80169 static unsigned int
80170 asm_hash_insn (mnem
)
80173 return CGEN_ASM_HASH (mnem
);
80176 /* BUF is a pointer to the bytes of the insn, target order.
80177 VALUE is the first base_insn_bitsize bits as an int in host order. */
80179 static unsigned int
80180 dis_hash_insn (buf
, value
)
80181 const char * buf ATTRIBUTE_UNUSED
;
80182 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
80184 return CGEN_DIS_HASH (buf
, value
);
80187 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
80190 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
80192 CGEN_FIELDS_BITSIZE (fields
) = size
;
80195 /* Function to call before using the operand instance table.
80196 This plugs the opcode entries and macro instructions into the cpu table. */
80199 m32c_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
80202 int num_macros
= (sizeof (m32c_cgen_macro_insn_table
) /
80203 sizeof (m32c_cgen_macro_insn_table
[0]));
80204 const CGEN_IBASE
*ib
= & m32c_cgen_macro_insn_table
[0];
80205 const CGEN_OPCODE
*oc
= & m32c_cgen_macro_insn_opcode_table
[0];
80206 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
80208 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
80209 for (i
= 0; i
< num_macros
; ++i
)
80211 insns
[i
].base
= &ib
[i
];
80212 insns
[i
].opcode
= &oc
[i
];
80213 m32c_cgen_build_insn_regex (& insns
[i
]);
80215 cd
->macro_insn_table
.init_entries
= insns
;
80216 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
80217 cd
->macro_insn_table
.num_init_entries
= num_macros
;
80219 oc
= & m32c_cgen_insn_opcode_table
[0];
80220 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
80221 for (i
= 0; i
< MAX_INSNS
; ++i
)
80223 insns
[i
].opcode
= &oc
[i
];
80224 m32c_cgen_build_insn_regex (& insns
[i
]);
80227 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
80228 cd
->set_fields_bitsize
= set_fields_bitsize
;
80230 cd
->asm_hash_p
= asm_hash_insn_p
;
80231 cd
->asm_hash
= asm_hash_insn
;
80232 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
80234 cd
->dis_hash_p
= dis_hash_insn_p
;
80235 cd
->dis_hash
= dis_hash_insn
;
80236 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;
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