1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode table for m32c.
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 Copyright (C) 1996-2017 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
30 #include "m32c-desc.h"
32 #include "libiberty.h"
36 m32c_asm_hash (const char *mnem
)
40 /* The length of the mnemonic for the Jcnd insns is 1. Hash jsri. */
41 if (mnem
[0] == 'j' && mnem
[1] != 's')
44 /* Don't hash scCND */
45 if (mnem
[0] == 's' && mnem
[1] == 'c')
48 /* Don't hash bmCND */
49 if (mnem
[0] == 'b' && mnem
[1] == 'm')
52 for (h
= 0; *mnem
&& *mnem
!= ' ' && *mnem
!= ':'; ++mnem
)
54 return h
% CGEN_ASM_HASH_SIZE
;
58 /* The hash functions are recorded here to help keep assembler code out of
59 the disassembler and vice versa. */
61 static int asm_hash_insn_p (const CGEN_INSN
*);
62 static unsigned int asm_hash_insn (const char *);
63 static int dis_hash_insn_p (const CGEN_INSN
*);
64 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
66 /* Instruction formats. */
68 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
69 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
73 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
74 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
77 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
78 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
81 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
82 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
85 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
86 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
89 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
90 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
93 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
94 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
97 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
98 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
101 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
102 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
105 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
106 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
109 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
110 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
113 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
114 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
117 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
118 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
121 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
122 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
125 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
126 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
129 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
130 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
133 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
134 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
137 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
138 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
141 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
142 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
145 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
146 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
149 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
150 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
153 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
154 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
157 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
158 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
161 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
162 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
165 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
166 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
169 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
170 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
173 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
174 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
177 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
178 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
181 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
182 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
185 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
186 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
189 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
190 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
193 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
194 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
197 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
198 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
201 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
202 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
205 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
206 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
209 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
210 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
213 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
214 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
217 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
218 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
221 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
222 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
225 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
226 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
229 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
230 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
233 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
234 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
237 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
238 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
241 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
242 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
245 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
246 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
249 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
250 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
253 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
254 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
257 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
258 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
261 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
262 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
265 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
266 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
269 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
270 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
273 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
274 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
277 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
278 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
281 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
282 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
285 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
286 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
289 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
290 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
293 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
294 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
297 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
298 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
301 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
302 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
305 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
306 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
309 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
310 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
313 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
314 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
317 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
318 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
321 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
322 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
325 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
326 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
329 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
330 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
333 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
334 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
337 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
338 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
341 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
342 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
345 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
346 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
349 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
350 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
353 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
354 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
357 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
358 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
361 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
362 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
365 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
366 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
369 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
370 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
373 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
374 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
377 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
378 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
381 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
382 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
385 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
386 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
389 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
390 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
393 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
394 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
397 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
398 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
401 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
402 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
405 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
406 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
409 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
410 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
413 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
414 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
417 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
418 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
421 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
422 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
425 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
426 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
429 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
430 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
433 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
434 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
437 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
438 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
441 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
442 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
445 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
446 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
449 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
450 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
453 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
454 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
457 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
458 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
461 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
462 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
465 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
466 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
469 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
470 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
473 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
474 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
477 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
478 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
481 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
482 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
485 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
486 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
489 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
490 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
493 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
494 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
497 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
498 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
501 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
502 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
505 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
506 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
509 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
510 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
513 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
514 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
517 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
518 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
521 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
522 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
525 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
526 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
529 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
530 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
533 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
534 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
537 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
538 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
541 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
542 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
545 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
546 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
549 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
550 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
553 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
554 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
557 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
558 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
561 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
562 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
565 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
566 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
569 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
570 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
573 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
574 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
577 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
578 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
581 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
582 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
585 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
586 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
589 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
590 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
593 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
594 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
597 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
598 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
601 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
602 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
605 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
606 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
609 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
610 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
613 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
614 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
617 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
618 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
621 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
622 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
625 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
626 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
629 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
630 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
633 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
634 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
637 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
638 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
641 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
642 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
645 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
646 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
649 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
650 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
653 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
654 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
657 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
658 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
661 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
662 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
665 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
666 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
669 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
670 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
673 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
674 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
677 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
678 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
681 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
682 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
685 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
686 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
689 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
690 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
693 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
694 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
697 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI ATTRIBUTE_UNUSED
= {
698 16, 16, 0xfffd, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN_EXT
) }, { F (F_15_1
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
701 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI ATTRIBUTE_UNUSED
= {
702 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
705 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
706 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
709 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
710 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
713 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
714 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
717 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
718 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
721 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
722 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
725 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI ATTRIBUTE_UNUSED
= {
726 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
729 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
730 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
733 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
734 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
737 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
738 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
741 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
742 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
745 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
746 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
749 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
750 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
753 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
754 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
757 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
758 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
761 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
762 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
765 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
766 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
769 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
770 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
773 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
774 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
777 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
778 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
781 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
782 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
785 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
786 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
789 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
790 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
793 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
794 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
797 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
798 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
801 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
802 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
805 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
806 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
809 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
810 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
813 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
814 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
817 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
818 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
821 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
822 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
825 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
826 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
829 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
830 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
833 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
834 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
837 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
838 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
841 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
842 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
845 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
846 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
849 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
850 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
853 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
854 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
857 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
858 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
861 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
862 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
865 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
866 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
869 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
870 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
873 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
874 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
877 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
878 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
881 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
882 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
885 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
886 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
889 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
890 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
893 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
894 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
897 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
898 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
901 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
902 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
905 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
906 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
909 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
910 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
913 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
914 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
917 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
918 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
921 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
922 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
925 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
926 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
929 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
930 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
933 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
934 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
937 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
938 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
941 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
942 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
945 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
946 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
949 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
950 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
953 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
954 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
957 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
958 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
961 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
962 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
965 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
966 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
969 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
970 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
973 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
974 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
977 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
978 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
981 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
982 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
985 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
986 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
989 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
990 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
993 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
994 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
997 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
998 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1001 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1002 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1005 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1006 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1009 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1010 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1013 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1014 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1017 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1018 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1021 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1022 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1025 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1026 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1029 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1030 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1033 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1034 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1037 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1038 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1041 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1042 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1045 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1046 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1049 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1050 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1053 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1054 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1057 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1058 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1061 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1062 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1065 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1066 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1069 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1070 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1073 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1074 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1077 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1078 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1081 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1082 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1085 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1086 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1089 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1090 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1093 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1094 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1097 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1098 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1101 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1102 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1105 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1106 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1109 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1110 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1113 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1114 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1117 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1118 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1121 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1122 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1125 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1126 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1129 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1130 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1133 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1134 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1137 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1138 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1141 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1142 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1145 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1146 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1149 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1150 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1153 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1154 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1157 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1158 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1161 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1162 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1165 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1166 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1169 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1170 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1173 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1174 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1177 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1178 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1181 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1182 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1185 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1186 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1189 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1190 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1193 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1194 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1197 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1198 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1201 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1202 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1205 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1206 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1209 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1210 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1213 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1214 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1217 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1218 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1221 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1222 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1225 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1226 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1229 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1230 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1233 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1234 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1237 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1238 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1241 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1242 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1245 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1246 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1249 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1250 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1253 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1254 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1257 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1258 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1261 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1262 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1265 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1266 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1269 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1270 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1273 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1274 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1277 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1278 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1281 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1282 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1285 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1286 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1289 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1290 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1293 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1294 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1297 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1298 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1301 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1302 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1305 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1306 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1309 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1310 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1313 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1314 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1317 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1318 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1321 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1322 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1325 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1326 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1329 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1330 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1333 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1334 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1337 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1338 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1341 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1342 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1345 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1346 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1349 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1350 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1353 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1354 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1357 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1358 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1361 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1362 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1365 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1366 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1369 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1370 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1373 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1374 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1377 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1378 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1381 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1382 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1385 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1386 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1389 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1390 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1393 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1394 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1397 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1398 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1401 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1402 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1405 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1406 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1409 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1410 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1413 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1414 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1417 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1418 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1421 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1422 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1425 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1426 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1429 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1430 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1433 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1434 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1437 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1438 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1441 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1442 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1445 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1446 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1449 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1450 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1453 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1454 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1457 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1458 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1461 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1462 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1465 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1466 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1469 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1470 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1473 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1474 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1477 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1478 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1481 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1482 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1485 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1486 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1489 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1490 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1493 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1494 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1497 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1498 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1501 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1502 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1505 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1506 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1509 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1510 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1513 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1514 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1517 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1518 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1521 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1522 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1525 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1526 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1529 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1530 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1533 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1534 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1537 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1538 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1541 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1542 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1545 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1546 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1549 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1550 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1553 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1554 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1557 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1558 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1561 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1562 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1565 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1566 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1569 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1570 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1573 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1574 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1577 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1578 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1581 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1582 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1585 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1586 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1589 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1590 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1593 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1594 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1597 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1598 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1601 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1602 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1605 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1606 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1609 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1610 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1613 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1614 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1617 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1618 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1621 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1622 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1625 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1626 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1629 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1630 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1633 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1634 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1637 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1638 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1641 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1642 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1645 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1646 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1649 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1650 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1653 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1654 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1657 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1658 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1661 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1662 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1665 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1666 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1669 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1670 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1673 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1674 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1677 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1678 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1681 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1682 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1685 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1686 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1689 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1690 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1693 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1694 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1697 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1698 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1701 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1702 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1705 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1706 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1709 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1710 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1713 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1714 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1717 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1718 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1721 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1722 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1725 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1726 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1729 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1730 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1733 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1734 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1737 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1738 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1741 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1742 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1745 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1746 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1749 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1750 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1753 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1754 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1757 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1758 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1761 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1762 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1765 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1766 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1769 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1770 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1773 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1774 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1777 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1778 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1781 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1782 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1785 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1786 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1789 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1790 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1793 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1794 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1797 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1798 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1801 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1802 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1805 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1806 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1809 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1810 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1813 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1814 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1817 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1818 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1821 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1822 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1825 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1826 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1829 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1830 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1833 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1834 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1837 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1838 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1841 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1842 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1845 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1846 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1849 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1850 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1853 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1854 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1857 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1858 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1861 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1862 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1865 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1866 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1869 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1870 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1873 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1874 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1877 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1878 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1881 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1882 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1885 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1886 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1889 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1890 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1893 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1894 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1897 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1898 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1901 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1902 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1905 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1906 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1909 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1910 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1913 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1914 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1917 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1918 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1921 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1922 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1925 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1926 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1929 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1930 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1933 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1934 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1937 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1938 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1941 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1942 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1945 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1946 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1949 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1950 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1953 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1954 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1957 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1958 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1961 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1962 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1965 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1966 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1969 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1970 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1973 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1974 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1977 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1978 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1981 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1982 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1985 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1986 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1989 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1990 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1993 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1994 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1997 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1998 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2001 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2002 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2005 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2006 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2009 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2010 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2013 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2014 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2017 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2018 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2021 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2022 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2025 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2026 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2029 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2030 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2033 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2034 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2037 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2038 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2041 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2042 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2045 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2046 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2049 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2050 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2053 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2054 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2057 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2058 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2061 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2062 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2065 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2066 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2069 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2070 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2073 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2074 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2077 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2078 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2081 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2082 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2085 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2086 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2089 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2090 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2093 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2094 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2097 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2098 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2101 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2102 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2105 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2106 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2109 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2110 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2113 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2114 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2117 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2118 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2121 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2122 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2125 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2126 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2129 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2130 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2133 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2134 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2137 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2138 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2141 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2142 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2145 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2146 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2149 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2150 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2153 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2154 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2157 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2158 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2161 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2162 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2165 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2166 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2169 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2170 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2173 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2174 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2177 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2178 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2181 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2182 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2185 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2186 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2189 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2190 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2193 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2194 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2197 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2198 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2201 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2202 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2205 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2206 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2209 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2210 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2213 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2214 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2217 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2218 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2221 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2222 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2225 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2226 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2229 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2230 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2233 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2234 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2237 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2238 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2241 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2242 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2245 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2246 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2249 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2250 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2253 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2254 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2257 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2258 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2261 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2262 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2265 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2266 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2269 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2270 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2273 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2274 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2277 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2278 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2281 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2282 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2285 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2286 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2289 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2290 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2293 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2294 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2297 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2298 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2301 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2302 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2305 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2306 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2309 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2310 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2313 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2314 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2317 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2318 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2321 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2322 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2325 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2326 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2329 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2330 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2333 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2334 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2337 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2338 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2341 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2342 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2345 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2346 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2349 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2350 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2353 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2354 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2357 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2358 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2361 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2362 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2365 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2366 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2369 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2370 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2373 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2374 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2377 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2378 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2381 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2382 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2385 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2386 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2389 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2390 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2393 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2394 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2397 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2398 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2401 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2402 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2405 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2406 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2409 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2410 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2413 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2414 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2417 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2418 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2421 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2422 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2425 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2426 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2429 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2430 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2433 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2434 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2437 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2438 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2441 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2442 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2445 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2446 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2449 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2450 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2453 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2454 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2457 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2458 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2461 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2462 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2465 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2466 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2469 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2470 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2473 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2474 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2477 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2478 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2481 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2482 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2485 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2486 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2489 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2490 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2493 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2494 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2497 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2498 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2501 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2502 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2505 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2506 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2509 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2510 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2513 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2514 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2517 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2518 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2521 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2522 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2525 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2526 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2529 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2530 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2533 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2534 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2537 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2538 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2541 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2542 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2545 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2546 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2549 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2550 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2553 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2554 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2557 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2558 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2561 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2562 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2565 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2566 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2569 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2570 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2573 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2574 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2577 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2578 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2581 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2582 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2585 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2586 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2589 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2590 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2593 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2594 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2597 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2598 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2601 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2602 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2605 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2606 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2609 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2610 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2613 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2614 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2617 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2618 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2621 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2622 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2625 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2626 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2629 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2630 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2633 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2634 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2637 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2638 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2641 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2642 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2645 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2646 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2649 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2650 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2653 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2654 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2657 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2658 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2661 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2662 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2665 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2666 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2669 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2670 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2673 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2674 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2677 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2678 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2681 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2682 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2685 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2686 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2689 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2690 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2693 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2694 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2697 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2698 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2701 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2702 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2705 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2706 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2709 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2710 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2713 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2714 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2717 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2718 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2721 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2722 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2725 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2726 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2729 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2730 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2733 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2734 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2737 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2738 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2741 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2742 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2745 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2746 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2749 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2750 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2753 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2754 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2757 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2758 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2761 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2762 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2765 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2766 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2769 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2770 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2773 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2774 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2777 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2778 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2781 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2782 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2785 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2786 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2789 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2790 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2793 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2794 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2797 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2798 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2801 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2802 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2805 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2806 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2809 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2810 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2813 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2814 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2817 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2818 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2821 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2822 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2825 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2826 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2829 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2830 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2833 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2834 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2837 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2838 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2841 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2842 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2845 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2846 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2849 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2850 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2853 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2854 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2857 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2858 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2861 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2862 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2865 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2866 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2869 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2870 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2873 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
2874 32, 40, 0xff000000, { { F (F_0_2
) }, { F (F_DSP_24_S16
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2877 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
2878 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S16
) }, { 0 } }
2881 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2882 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2885 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2886 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2889 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
2890 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_24_S8
) }, { 0 } }
2893 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
2894 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
2897 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2898 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2901 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2902 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2905 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2906 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2909 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2910 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2913 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2914 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2917 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2918 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2921 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2922 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2925 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2926 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2929 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2930 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2933 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2934 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2937 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2938 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2941 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2942 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2945 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2946 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2949 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2950 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2953 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2954 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2957 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2958 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2961 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2962 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2965 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2966 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2969 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2970 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2973 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2974 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2977 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2978 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2981 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2982 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2985 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2986 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2989 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2990 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2993 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2994 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2997 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2998 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3001 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3002 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3005 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3006 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3009 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3010 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3013 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3014 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3017 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3018 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3021 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3022 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3025 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3026 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3029 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3030 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3033 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3034 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3037 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3038 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3041 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3042 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3045 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3046 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3049 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3050 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3053 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3054 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3057 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3058 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3061 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3062 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3065 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3066 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3069 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3070 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3073 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3074 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3077 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3078 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3081 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3082 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3085 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3086 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3089 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3090 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3093 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3094 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3097 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3098 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3101 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3102 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3105 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3106 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3109 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3110 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3113 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3114 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3117 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3118 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3121 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3122 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3125 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3126 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3129 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3130 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3133 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3134 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3137 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3138 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3141 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3142 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3145 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3146 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3149 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3150 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3153 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3154 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3157 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3158 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3161 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3162 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3165 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3166 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3169 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3170 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3173 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3174 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3177 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3178 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3181 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3182 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3185 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3186 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3189 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3190 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3193 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3194 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3197 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3198 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3201 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3202 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3205 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3206 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3209 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3210 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3213 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3214 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3217 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3218 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3221 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3222 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3225 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3226 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3229 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3230 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3233 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3234 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3237 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3238 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3241 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3242 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3245 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3246 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3249 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3250 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3253 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3254 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3257 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3258 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3261 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3262 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3265 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3266 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3269 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3270 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3273 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3274 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3277 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3278 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3281 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3282 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3285 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3286 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3289 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3290 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3293 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3294 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3297 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3298 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3301 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3302 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3305 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3306 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3309 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3310 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3313 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3314 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3317 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3318 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3321 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3322 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3325 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3326 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3329 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3330 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3333 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3334 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3337 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3338 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3341 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3342 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3345 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3346 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3349 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3350 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3353 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3354 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3357 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3358 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3361 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3362 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3365 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3366 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3369 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3370 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3373 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3374 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3377 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3378 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3381 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3382 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3385 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3386 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3389 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3390 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3393 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3394 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3397 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3398 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3401 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3402 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3405 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3406 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3409 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3410 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3413 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3414 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3417 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3418 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3421 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3422 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3425 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3426 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3429 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3430 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3433 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3434 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3437 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3438 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3441 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3442 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3445 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3446 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3449 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3450 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3453 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3454 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3457 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3458 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3461 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3462 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3465 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3466 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3469 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3470 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3473 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3474 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3477 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3478 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3481 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3482 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3485 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3486 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3489 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3490 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3493 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3494 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3497 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3498 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3501 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3502 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3505 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3506 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3509 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3510 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3513 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3514 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3517 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3518 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3521 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3522 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3525 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3526 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3529 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3530 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3533 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3534 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3537 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3538 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3541 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3542 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3545 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3546 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3549 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3550 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3553 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3554 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3557 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3558 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3561 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3562 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3565 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3566 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3569 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3570 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3573 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3574 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3577 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3578 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3581 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3582 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3585 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3586 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3589 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3590 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3593 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3594 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3597 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3598 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3601 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3602 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3605 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3606 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3609 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3610 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3613 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3614 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3617 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3618 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3621 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3622 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3625 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3626 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3629 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3630 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3633 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3634 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3637 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3638 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3641 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3642 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3645 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3646 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3649 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3650 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3653 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3654 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3657 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3658 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3661 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3662 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3665 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3666 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3669 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3670 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3673 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3674 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3677 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3678 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3681 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3682 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3685 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3686 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3689 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3690 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3693 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3694 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3697 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3698 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3701 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3702 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3705 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3706 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3709 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3710 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3713 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3714 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3717 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3718 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3721 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3722 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3725 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3726 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3729 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3730 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3733 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3734 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3737 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3738 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3741 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3742 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3745 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3746 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3749 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3750 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3753 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3754 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3757 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3758 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3761 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3762 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3765 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3766 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3769 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3770 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3773 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3774 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3777 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3778 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3781 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3782 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3785 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3786 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3789 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3790 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3793 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3794 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3797 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3798 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3801 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3802 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3805 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3806 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3809 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3810 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3813 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3814 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3817 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3818 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3821 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3822 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3825 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3826 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3829 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3830 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3833 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3834 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3837 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3838 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3841 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3842 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3845 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3846 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3849 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3850 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3853 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3854 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3857 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3858 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3861 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3862 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3865 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3866 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3869 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3870 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3873 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3874 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3877 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3878 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3881 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3882 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3885 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3886 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3889 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3890 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3893 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3894 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3897 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3898 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3901 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3902 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3905 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3906 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3909 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3910 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3913 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3914 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3917 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3918 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3921 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3922 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3925 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3926 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3929 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3930 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3933 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3934 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3937 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3938 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3941 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3942 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3945 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3946 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3949 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3950 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3953 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3954 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3957 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3958 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3961 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3962 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3965 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3966 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3969 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3970 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3973 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3974 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3977 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3978 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3981 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3982 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3985 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3986 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3989 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3990 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3993 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3994 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3997 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3998 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4001 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4002 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4005 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4006 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4009 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4010 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4013 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4014 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4017 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4018 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4021 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4022 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4025 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4026 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4029 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4030 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4033 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4034 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4037 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4038 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4041 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4042 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4045 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4046 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4049 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4050 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4053 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4054 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4057 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4058 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4061 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4062 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4065 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4066 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4069 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4070 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4073 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4074 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4077 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4078 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4081 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4082 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4085 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4086 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4089 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4090 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4093 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4094 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4097 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4098 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4101 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4102 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4105 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4106 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4109 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4110 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4113 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4114 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4117 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4118 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4121 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4122 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4125 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4126 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4129 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4130 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4133 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4134 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4137 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4138 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4141 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4142 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4145 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4146 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4149 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4150 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4153 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4154 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4157 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4158 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4161 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4162 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4165 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4166 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4169 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4170 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4173 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4174 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4177 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4178 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4181 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4182 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4185 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4186 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4189 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4190 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4193 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4194 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4197 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4198 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4201 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4202 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4205 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4206 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4209 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4210 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4213 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4214 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4217 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4218 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4221 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4222 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4225 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4226 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4229 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4230 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4233 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4234 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4237 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4238 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4241 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4242 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4245 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4246 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4249 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4250 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4253 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4254 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4257 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4258 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4261 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4262 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4265 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4266 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4269 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4270 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4273 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4274 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4277 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4278 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4281 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4282 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4285 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4286 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4289 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4290 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4293 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4294 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4297 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4298 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4301 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4302 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4305 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4306 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4309 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4310 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4313 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4314 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4317 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4318 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4321 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4322 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4325 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4326 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4329 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4330 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4333 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4334 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4337 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4338 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4341 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4342 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4345 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4346 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4349 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4350 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4353 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4354 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4357 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4358 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4361 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4362 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4365 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4366 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4369 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4370 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4373 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4374 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4377 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4378 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4381 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4382 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4385 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4386 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4389 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4390 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4393 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4394 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4397 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4398 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4401 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4402 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4405 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4406 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4409 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4410 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4413 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4414 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4417 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4418 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4421 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4422 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4425 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4426 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4429 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4430 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4433 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4434 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4437 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4438 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4441 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4442 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4445 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4446 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4449 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4450 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4453 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4454 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4457 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4458 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4461 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4462 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4465 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4466 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4469 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4470 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4473 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4474 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4477 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4478 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4481 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4482 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4485 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4486 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4489 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4490 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4493 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4494 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4497 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4498 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4501 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4502 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4505 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4506 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4509 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4510 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4513 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4514 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4517 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4518 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4521 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4522 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4525 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4526 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4529 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4530 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4533 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4534 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4537 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4538 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4541 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4542 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4545 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4546 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4549 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4550 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4553 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4554 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4557 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4558 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4561 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4562 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4565 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4566 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4569 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4570 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4573 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4574 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4577 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4578 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4581 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4582 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4585 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4586 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4589 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4590 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4593 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4594 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4597 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4598 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4601 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4602 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4605 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4606 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4609 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4610 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4613 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4614 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4617 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4618 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4621 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4622 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4625 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4626 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4629 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4630 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4633 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4634 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4637 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4638 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4641 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4642 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4645 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4646 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4649 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4650 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4653 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4654 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4657 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4658 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4661 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4662 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4665 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4666 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4669 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4670 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4673 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4674 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4677 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4678 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4681 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4682 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4685 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4686 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4689 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4690 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4693 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4694 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4697 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4698 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4701 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4702 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4705 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4706 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4709 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4710 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4713 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4714 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4717 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4718 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4721 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4722 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4725 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4726 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4729 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4730 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4733 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4734 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4737 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4738 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4741 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4742 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4745 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4746 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4749 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4750 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4753 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4754 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4757 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4758 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4761 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4762 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4765 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4766 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4769 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
4770 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4773 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
4774 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4777 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4778 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4781 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4782 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_S8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4785 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4786 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U16
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4789 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4790 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4793 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4794 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4797 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4798 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4801 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4802 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4805 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4806 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4809 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4810 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4813 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4814 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4817 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4818 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4821 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4822 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4825 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4826 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4829 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4830 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4833 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4834 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4837 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4838 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4841 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4842 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4845 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4846 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4849 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4850 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4853 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4854 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4857 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4858 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4861 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4862 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4865 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4866 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4869 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4870 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4873 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4874 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4877 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4878 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4881 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4882 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4885 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4886 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4889 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4890 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4893 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4894 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4897 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4898 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4901 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4902 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4905 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4906 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4909 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4910 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4913 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4914 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4917 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4918 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4921 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4922 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4925 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
4926 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4929 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
4930 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4933 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
4934 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4937 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
4938 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4941 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
4942 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4945 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
4946 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4949 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
4950 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4953 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
4954 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4957 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
4958 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4961 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
4962 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4965 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
4966 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4969 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
4970 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4973 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
4974 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4977 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
4978 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4981 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4982 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4985 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
4986 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4989 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4990 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4993 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4994 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4997 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4998 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5001 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5002 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5005 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5006 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5009 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5010 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5013 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5014 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5017 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5018 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5021 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5022 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5025 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5026 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5029 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5030 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5033 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5034 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5037 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5038 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5041 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5042 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5045 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5046 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5049 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5050 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5053 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5054 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5057 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5058 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5061 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5062 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5065 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5066 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5069 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5070 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5073 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5074 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5077 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5078 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5081 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5082 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5085 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5086 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5089 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5090 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5093 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5094 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5097 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5098 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5101 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5102 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5105 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5106 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5109 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5110 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5113 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5114 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5117 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5118 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5121 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5122 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5125 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5126 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5129 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5130 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5133 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5134 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5137 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5138 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5141 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5142 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5145 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5146 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5149 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5150 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5153 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5154 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5157 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5158 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5161 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5162 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5165 static const CGEN_IFMT ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5166 16, 16, 0xff30, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5169 static const CGEN_IFMT ifmt_sccnd_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5170 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5173 static const CGEN_IFMT ifmt_sccnd_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5174 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5177 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5178 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5181 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5182 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5185 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5186 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5189 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5190 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5193 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5194 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5197 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5198 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5201 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5202 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5205 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5206 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5209 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5210 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5213 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5214 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5217 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5218 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5221 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5222 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5225 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5226 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5229 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5230 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5233 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5234 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5237 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5238 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5241 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5242 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5245 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5246 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5249 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5250 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5253 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5254 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5257 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5258 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5261 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5262 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5265 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5266 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5269 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5270 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5273 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5274 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5277 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5278 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5281 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5282 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5285 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5286 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5289 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5290 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5293 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5294 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5297 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5298 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5301 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5302 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5305 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5306 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5309 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5310 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5313 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5314 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5317 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5318 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5321 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5322 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5325 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5326 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5329 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5330 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5333 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5334 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5337 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5338 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5341 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5342 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5345 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5346 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5349 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5350 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5353 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5354 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5357 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5358 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5361 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5362 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5365 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5366 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5369 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5370 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5373 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5374 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5377 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5378 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5381 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5382 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5385 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5386 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5389 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
5390 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5393 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5394 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5397 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5398 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5401 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5402 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5405 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5406 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5409 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5410 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5413 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5414 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5417 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5418 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5421 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5422 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5425 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5426 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5429 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5430 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5433 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5434 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5437 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5438 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5441 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5442 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5445 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5446 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5449 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5450 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5453 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5454 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5457 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5458 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5461 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5462 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5465 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5466 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5469 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5470 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5473 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5474 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5477 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5478 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5481 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5482 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5485 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5486 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5489 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5490 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5493 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5494 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5497 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5498 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5501 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5502 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5505 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5506 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5509 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5510 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5513 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5514 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5517 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5518 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5521 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5522 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5525 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5526 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5529 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5530 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5533 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5534 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5537 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5538 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5541 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5542 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5545 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5546 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5549 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5550 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5553 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5554 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5557 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5558 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5561 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5562 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5565 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5566 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5569 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5570 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5573 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5574 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5577 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5578 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5581 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5582 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5585 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5586 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5589 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI ATTRIBUTE_UNUSED
= {
5590 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5593 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5594 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5597 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5598 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5601 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5602 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5605 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5606 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5609 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5610 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5613 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI ATTRIBUTE_UNUSED
= {
5614 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5617 static const CGEN_IFMT ifmt_push16_b_s_an_An16_push_S_derived ATTRIBUTE_UNUSED
= {
5618 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5621 static const CGEN_IFMT ifmt_push16_b_s_rn_Rn16_push_S_derived ATTRIBUTE_UNUSED
= {
5622 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5625 static const CGEN_IFMT ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived ATTRIBUTE_UNUSED
= {
5626 8, 8, 0xfb, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_5_1
) }, { F (F_4_1
) }, { 0 } }
5629 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5630 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5633 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5634 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5637 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
5638 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5641 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
5642 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5645 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
5646 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5649 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5650 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { 0 } }
5653 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5654 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { 0 } }
5657 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI ATTRIBUTE_UNUSED
= {
5658 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { 0 } }
5661 static const CGEN_IFMT ifmt_mulex_dst32_R3_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5662 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5665 static const CGEN_IFMT ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5666 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5669 static const CGEN_IFMT ifmt_mulu_l_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5670 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5673 static const CGEN_IFMT ifmt_mulu_l_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
5674 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5677 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5678 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5681 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5682 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5685 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5686 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5689 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5690 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5693 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5694 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5697 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5698 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5701 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5702 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5705 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5706 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5709 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5710 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5713 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5714 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5717 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5718 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5721 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5722 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5725 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5726 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5729 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5730 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5733 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5734 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5737 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5738 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5741 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5742 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5745 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5746 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5749 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5750 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5753 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5754 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5757 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5758 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5761 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5762 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5765 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5766 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5769 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5770 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5773 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5774 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5777 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5778 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5781 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5782 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5785 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5786 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5789 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5790 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5793 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5794 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5797 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5798 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5801 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5802 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5805 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5806 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5809 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5810 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5813 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5814 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5817 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5818 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5821 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5822 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5825 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5826 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5829 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5830 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5833 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5834 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5837 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5838 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5841 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5842 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5845 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5846 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5849 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5850 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5853 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5854 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5857 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5858 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5861 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5862 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5865 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5866 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5869 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5870 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5873 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5874 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5877 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5878 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5881 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5882 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5885 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5886 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5889 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5890 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5893 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5894 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5897 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5898 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5901 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5902 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5905 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5906 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5909 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5910 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5913 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5914 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5917 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5918 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5921 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5922 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5925 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5926 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5929 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5930 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5933 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5934 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5937 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5938 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5941 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5942 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5945 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5946 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5949 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5950 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5953 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5954 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5957 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5958 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5961 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5962 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5965 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5966 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5969 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
5970 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5973 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
5974 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5977 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI ATTRIBUTE_UNUSED
= {
5978 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5981 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5982 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5985 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5986 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5989 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5990 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5993 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5994 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5997 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
5998 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6001 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6002 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6005 static const CGEN_IFMT ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
6006 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6009 static const CGEN_IFMT ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
6010 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6013 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6014 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6017 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6018 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6021 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6022 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6025 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6026 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6029 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6030 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6033 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6034 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6037 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6038 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6041 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6042 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6045 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6046 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6049 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6050 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6053 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6054 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6057 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6058 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6061 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6062 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6065 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6066 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6069 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6070 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6073 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6074 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6077 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6078 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6081 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6082 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6085 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6086 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6089 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6090 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6093 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6094 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6097 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6098 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6101 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6102 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6105 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6106 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6109 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6110 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6113 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6114 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6117 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6118 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6121 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6122 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6125 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6126 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6129 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6130 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6133 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6134 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6137 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6138 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6141 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6142 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6145 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6146 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6149 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6150 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6153 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6154 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6157 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6158 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6161 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6162 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6165 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6166 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6169 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6170 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6173 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6174 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6177 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6178 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6181 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6182 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6185 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6186 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6189 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6190 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6193 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6194 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6197 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6198 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6201 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6202 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6205 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6206 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6209 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6210 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6213 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6214 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6217 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6218 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6221 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6222 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6225 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6226 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6229 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6230 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6233 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6234 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6237 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6238 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6241 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6242 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6245 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6246 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6249 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6250 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6253 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6254 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6257 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6258 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6261 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6262 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6265 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6266 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6269 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6270 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6273 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6274 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6277 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6278 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6281 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6282 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6285 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6286 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6289 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6290 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6293 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6294 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6297 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6298 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6301 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6302 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6305 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6306 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6309 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6310 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6313 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6314 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6317 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6318 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6321 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6322 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6325 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6326 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6329 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6330 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6333 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6334 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6337 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6338 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6341 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6342 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6345 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6346 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6349 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6350 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6353 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6354 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6357 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6358 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6361 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6362 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6365 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6366 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6369 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6370 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6373 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6374 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6377 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6378 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6381 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6382 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6385 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6386 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6389 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6390 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6393 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6394 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6397 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6398 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6401 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6402 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6405 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6406 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6409 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6410 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6413 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6414 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6417 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6418 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6421 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6422 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6425 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6426 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6429 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6430 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6433 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6434 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6437 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6438 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6441 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6442 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6445 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6446 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6449 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6450 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6453 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6454 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6457 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6458 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6461 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6462 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6465 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6466 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6469 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6470 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6473 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6474 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6477 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6478 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6481 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6482 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6485 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6486 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6489 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6490 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6493 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6494 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6497 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6498 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6501 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6502 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6505 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6506 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6509 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6510 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6513 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6514 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6517 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6518 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6521 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6522 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6525 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6526 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6529 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6530 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6533 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6534 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6537 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6538 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6541 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6542 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6545 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6546 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6549 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6550 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6553 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6554 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6557 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6558 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6561 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6562 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6565 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6566 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6569 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6570 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6573 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6574 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6577 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6578 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6581 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6582 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6585 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6586 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6589 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6590 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6593 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6594 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6597 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6598 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6601 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6602 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6605 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6606 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6609 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6610 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6613 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6614 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6617 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6618 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6621 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6622 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6625 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6626 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6629 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6630 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6633 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6634 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6637 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6638 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6641 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6642 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6645 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6646 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6649 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6650 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6653 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6654 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6657 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6658 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6661 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6662 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6665 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6666 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6669 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6670 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6673 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6674 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6677 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6678 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6681 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6682 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6685 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6686 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6689 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6690 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6693 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6694 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6697 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6698 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6701 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6702 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6705 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6706 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6709 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6710 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6713 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6714 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6717 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6718 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6721 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6722 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6725 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6726 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6729 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6730 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6733 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6734 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6737 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6738 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6741 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6742 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6745 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6746 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6749 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6750 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6753 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6754 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6757 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6758 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6761 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6762 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6765 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6766 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6769 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6770 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6773 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6774 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6777 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6778 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6781 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6782 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6785 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6786 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6789 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6790 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6793 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6794 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6797 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6798 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6801 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6802 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6805 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6806 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6809 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6810 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6813 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6814 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6817 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6818 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6821 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6822 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6825 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6826 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6829 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6830 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6833 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6834 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6837 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6838 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6841 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6842 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6845 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6846 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6849 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6850 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6853 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6854 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6857 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6858 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6861 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6862 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6865 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6866 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6869 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6870 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6873 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6874 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6877 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6878 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6881 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6882 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6885 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6886 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6889 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6890 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6893 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6894 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6897 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
6898 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6901 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6902 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6905 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6906 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6909 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6910 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6913 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6914 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6917 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6918 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6921 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6922 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6925 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6926 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6929 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6930 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6933 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6934 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6937 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6938 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6941 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6942 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6945 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6946 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6949 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6950 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6953 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6954 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6957 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6958 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6961 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6962 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6965 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6966 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6969 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6970 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6973 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6974 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6977 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6978 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6981 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6982 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6985 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6986 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6989 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6990 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6993 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
6994 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6997 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
6998 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7001 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7002 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7005 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7006 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7009 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7010 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7013 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7014 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7017 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7018 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7021 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7022 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7025 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7026 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7029 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7030 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7033 static const CGEN_IFMT ifmt_stc16_src_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7034 16, 16, 0xff8c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7037 static const CGEN_IFMT ifmt_stc16_src_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7038 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7041 static const CGEN_IFMT ifmt_stc16_src_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7042 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7045 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7046 24, 24, 0xff8e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7049 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7050 32, 32, 0xff8e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7053 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7054 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7057 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7058 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7061 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7062 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7065 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7066 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7069 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI ATTRIBUTE_UNUSED
= {
7070 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7073 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI ATTRIBUTE_UNUSED
= {
7074 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7077 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI ATTRIBUTE_UNUSED
= {
7078 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7081 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI ATTRIBUTE_UNUSED
= {
7082 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7085 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI ATTRIBUTE_UNUSED
= {
7086 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7089 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI ATTRIBUTE_UNUSED
= {
7090 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7093 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
7094 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7097 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
7098 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7101 static const CGEN_IFMT ifmt_jsri16a_dst16_16_20ar_SI_dst16_16_20_An_relative_SI ATTRIBUTE_UNUSED
= {
7102 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7105 static const CGEN_IFMT ifmt_jsri16w_dst16_16_20ar_HI_dst16_16_20_An_relative_HI ATTRIBUTE_UNUSED
= {
7106 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7109 static const CGEN_IFMT ifmt_jmpi16_a_16_dst16_16_16_An_relative_SI ATTRIBUTE_UNUSED
= {
7110 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7113 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7114 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7117 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7118 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7121 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
7122 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7125 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7126 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7129 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7130 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7133 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
7134 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7137 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7138 32, 56, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7141 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7142 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7145 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
7146 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7149 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7150 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7153 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7154 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7157 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7158 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7161 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7162 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7165 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7166 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7169 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7170 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7173 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7174 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7177 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7178 32, 80, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7181 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7182 32, 80, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7185 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7186 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7189 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7190 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7193 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
7194 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7197 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7198 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7201 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7202 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7205 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7206 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7209 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7210 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7213 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7214 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7217 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7218 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7221 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7222 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7225 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7226 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7229 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7230 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7233 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed ATTRIBUTE_UNUSED
= {
7234 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7237 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed ATTRIBUTE_UNUSED
= {
7238 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7241 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed ATTRIBUTE_UNUSED
= {
7242 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7245 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7246 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7249 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7250 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7253 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7254 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7257 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7258 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7261 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7262 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7265 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7266 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7269 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7270 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7273 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7274 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7277 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7278 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7281 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7282 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7285 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_direct ATTRIBUTE_UNUSED
= {
7286 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7289 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7290 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7293 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7294 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7297 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7298 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7301 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7302 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7305 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7306 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7309 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7310 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7313 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7314 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7317 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7318 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7321 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7322 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7325 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7326 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7329 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7330 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7333 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7334 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7337 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7338 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7341 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7342 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7345 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7346 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7349 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7350 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7353 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7354 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7357 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7358 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7361 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7362 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7365 static const CGEN_IFMT ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S ATTRIBUTE_UNUSED
= {
7366 16, 16, 0xf800, { { F (F_0_2
) }, { F (F_BITBASE16_U11_S
) }, { F (F_2_2
) }, { F (F_4_1
) }, { 0 } }
7369 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7370 24, 24, 0xff3800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7373 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7374 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7377 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7378 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7381 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7382 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7385 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7386 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7389 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7390 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7393 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7394 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7397 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7398 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7401 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7402 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7405 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7406 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7409 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7410 32, 48, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7413 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7414 32, 48, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7417 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7418 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7421 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct ATTRIBUTE_UNUSED
= {
7422 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7425 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7426 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7429 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7430 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7433 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7434 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7437 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7438 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7441 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7442 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7445 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7446 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7449 static const CGEN_IFMT ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7450 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7453 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7454 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7457 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7458 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7461 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7462 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7465 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7466 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7469 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7470 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7473 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7474 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7477 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7478 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7481 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7482 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7485 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7486 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7489 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7490 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7493 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7494 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7497 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7498 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7501 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7502 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7505 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7506 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7509 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7510 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7513 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7514 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7517 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7518 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7521 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7522 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7525 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7526 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7529 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7530 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7533 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7534 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7537 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7538 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7541 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7542 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7545 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7546 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7549 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7550 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7553 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7554 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7557 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7558 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7561 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7562 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7565 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7566 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7569 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7570 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7573 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7574 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7577 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7578 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7581 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7582 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7585 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
7586 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7589 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7590 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7593 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7594 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7597 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
7598 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7601 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
7602 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7605 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
7606 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7609 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
7610 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7613 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
7614 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7617 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
7618 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7621 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI ATTRIBUTE_UNUSED
= {
7622 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7625 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI ATTRIBUTE_UNUSED
= {
7626 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7629 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7630 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7633 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7634 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7637 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7638 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7641 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7642 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7645 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7646 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7649 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7650 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7653 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7654 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7657 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7658 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7661 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7662 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7665 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7666 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7669 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7670 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7673 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7674 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7677 static const CGEN_IFMT ifmt_add16_wQ_sp ATTRIBUTE_UNUSED
= {
7678 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7681 static const CGEN_IFMT ifmt_add16_b_G_sp ATTRIBUTE_UNUSED
= {
7682 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7685 static const CGEN_IFMT ifmt_add16_w_G_sp ATTRIBUTE_UNUSED
= {
7686 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7689 static const CGEN_IFMT ifmt_add32_l_imm3_Q ATTRIBUTE_UNUSED
= {
7690 8, 8, 0xce, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { 0 } }
7693 static const CGEN_IFMT ifmt_add32_l_imm8_S ATTRIBUTE_UNUSED
= {
7694 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7697 static const CGEN_IFMT ifmt_add32_l_imm16_G ATTRIBUTE_UNUSED
= {
7698 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7701 static const CGEN_IFMT ifmt_dadc16_b_r0h_r0l ATTRIBUTE_UNUSED
= {
7702 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7705 static const CGEN_IFMT ifmt_bm16_c ATTRIBUTE_UNUSED
= {
7706 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { 0 } }
7709 static const CGEN_IFMT ifmt_bm32_c ATTRIBUTE_UNUSED
= {
7710 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_COND32
) }, { F (F_10_3
) }, { 0 } }
7713 static const CGEN_IFMT ifmt_brk16 ATTRIBUTE_UNUSED
= {
7714 8, 8, 0xff, { { F (F_0_4
) }, { F (F_4_4
) }, { 0 } }
7717 static const CGEN_IFMT ifmt_btst_s ATTRIBUTE_UNUSED
= {
7718 24, 24, 0xce0000, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { F (F_DSP_8_U16
) }, { 0 } }
7721 static const CGEN_IFMT ifmt_dec16_w ATTRIBUTE_UNUSED
= {
7722 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_DST16_AN_S
) }, { F (F_5_3
) }, { 0 } }
7725 static const CGEN_IFMT ifmt_div32_b_Imm_16_QI ATTRIBUTE_UNUSED
= {
7726 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7729 static const CGEN_IFMT ifmt_div32_w_Imm_16_HI ATTRIBUTE_UNUSED
= {
7730 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7733 static const CGEN_IFMT ifmt_enter16 ATTRIBUTE_UNUSED
= {
7734 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7737 static const CGEN_IFMT ifmt_enter32 ATTRIBUTE_UNUSED
= {
7738 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U8
) }, { 0 } }
7741 static const CGEN_IFMT ifmt_fclr16 ATTRIBUTE_UNUSED
= {
7742 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7745 static const CGEN_IFMT ifmt_fclr ATTRIBUTE_UNUSED
= {
7746 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7749 static const CGEN_IFMT ifmt_int16 ATTRIBUTE_UNUSED
= {
7750 16, 16, 0xffc0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_2
) }, { F (F_DSP_10_U6
) }, { 0 } }
7753 static const CGEN_IFMT ifmt_int32 ATTRIBUTE_UNUSED
= {
7754 16, 16, 0xff03, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U6
) }, { F (F_14_2
) }, { 0 } }
7757 static const CGEN_IFMT ifmt_jcnd16_5 ATTRIBUTE_UNUSED
= {
7758 16, 16, 0xf800, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_COND16J_5
) }, { F (F_LAB_8_8
) }, { 0 } }
7761 static const CGEN_IFMT ifmt_jcnd16 ATTRIBUTE_UNUSED
= {
7762 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { F (F_LAB_16_8
) }, { 0 } }
7765 static const CGEN_IFMT ifmt_jcnd32 ATTRIBUTE_UNUSED
= {
7766 16, 16, 0x8e00, { { F (F_0_1
) }, { F (F_COND32J
) }, { F (F_4_3
) }, { F (F_LAB_8_8
) }, { 0 } }
7769 static const CGEN_IFMT ifmt_jmp16_s ATTRIBUTE_UNUSED
= {
7770 8, 8, 0xf8, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_LAB_5_3
) }, { 0 } }
7773 static const CGEN_IFMT ifmt_jmp16_b ATTRIBUTE_UNUSED
= {
7774 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_8
) }, { 0 } }
7777 static const CGEN_IFMT ifmt_jmp16_w ATTRIBUTE_UNUSED
= {
7778 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_16
) }, { 0 } }
7781 static const CGEN_IFMT ifmt_jmp16_a ATTRIBUTE_UNUSED
= {
7782 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_24
) }, { 0 } }
7785 static const CGEN_IFMT ifmt_jmps16 ATTRIBUTE_UNUSED
= {
7786 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { 0 } }
7789 static const CGEN_IFMT ifmt_jmp32_s ATTRIBUTE_UNUSED
= {
7790 8, 8, 0xce, { { F (F_0_2
) }, { F (F_LAB32_JMP_S
) }, { F (F_4_3
) }, { 0 } }
7793 static const CGEN_IFMT ifmt_ldc16_imm16 ATTRIBUTE_UNUSED
= {
7794 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7797 static const CGEN_IFMT ifmt_ldc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7798 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { F (F_DSP_16_S16
) }, { 0 } }
7801 static const CGEN_IFMT ifmt_ldc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7802 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7805 static const CGEN_IFMT ifmt_ldc32_imm16_cr3 ATTRIBUTE_UNUSED
= {
7806 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7809 static const CGEN_IFMT ifmt_ldctx16 ATTRIBUTE_UNUSED
= {
7810 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { 0 } }
7813 static const CGEN_IFMT ifmt_ldipl16_imm ATTRIBUTE_UNUSED
= {
7814 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_IMM_13_U3
) }, { 0 } }
7817 static const CGEN_IFMT ifmt_mov16_w_S_imm_a0 ATTRIBUTE_UNUSED
= {
7818 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S16
) }, { 0 } }
7821 static const CGEN_IFMT ifmt_mov32_l_a0 ATTRIBUTE_UNUSED
= {
7822 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S24
) }, { 0 } }
7825 static const CGEN_IFMT ifmt_popc16_imm16 ATTRIBUTE_UNUSED
= {
7826 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7829 static const CGEN_IFMT ifmt_popc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7830 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7833 static const CGEN_IFMT ifmt_popc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7834 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7837 static const CGEN_IFMT ifmt_popm16 ATTRIBUTE_UNUSED
= {
7838 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7841 static const CGEN_IFMT ifmt_pushm16 ATTRIBUTE_UNUSED
= {
7842 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7845 static const CGEN_IFMT ifmt_push32_l_imm ATTRIBUTE_UNUSED
= {
7846 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7849 static const CGEN_IFMT ifmt_sha16_L_imm_r2r0 ATTRIBUTE_UNUSED
= {
7850 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7853 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_r0h ATTRIBUTE_UNUSED
= {
7854 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { 0 } }
7857 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8sb ATTRIBUTE_UNUSED
= {
7858 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7861 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8fb ATTRIBUTE_UNUSED
= {
7862 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7865 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_abs16 ATTRIBUTE_UNUSED
= {
7866 32, 40, 0xff000000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U16
) }, { 0 } }
7871 #define A(a) (1 << CGEN_INSN_##a)
7872 #define OPERAND(op) M32C_OPERAND_##op
7873 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
7874 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
7876 /* The instruction table. */
7878 static const CGEN_OPCODE m32c_cgen_insn_opcode_table
[MAX_INSNS
] =
7880 /* Special null first entry.
7881 A `num' value of zero is thus invalid.
7882 Also, the special `invalid' insn resides here. */
7883 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
7884 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
7887 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7888 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980b00 }
7890 /* extz ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
7893 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7894 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982b00 }
7896 /* extz ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
7899 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7900 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983b00 }
7902 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
7905 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7906 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908b00 }
7908 /* extz ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
7911 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7912 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190ab00 }
7914 /* extz ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
7917 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7918 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190bb00 }
7920 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
7923 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7924 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900b00 }
7926 /* extz ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
7929 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7930 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902b00 }
7932 /* extz ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
7935 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7936 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903b00 }
7938 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
7941 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7942 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920b00 }
7944 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7947 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7948 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922b00 }
7950 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7953 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7954 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923b00 }
7956 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
7959 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7960 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940b00 }
7962 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7965 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7966 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942b00 }
7968 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7971 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7972 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943b00 }
7974 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
7977 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7978 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960b00 }
7980 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
7983 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7984 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962b00 }
7986 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
7989 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7990 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963b00 }
7992 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
7995 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
7996 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928b00 }
7998 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8001 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8002 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192ab00 }
8004 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8007 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8008 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192bb00 }
8010 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8013 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8014 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948b00 }
8016 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8019 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8020 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194ab00 }
8022 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8025 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8026 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194bb00 }
8028 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8031 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8032 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192cb00 }
8034 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8037 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8038 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192eb00 }
8040 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8043 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8044 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192fb00 }
8046 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8049 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8050 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194cb00 }
8052 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8055 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8056 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194eb00 }
8058 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8061 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8062 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194fb00 }
8064 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8067 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8068 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196cb00 }
8070 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8073 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8074 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196eb00 }
8076 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8079 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8080 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196fb00 }
8082 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8085 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8086 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968b00 }
8088 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8091 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8092 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196ab00 }
8094 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8097 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8098 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196bb00 }
8100 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8103 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8104 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80b00 }
8106 /* extz ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8109 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8110 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82b00 }
8112 /* extz ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8115 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8116 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83b00 }
8118 /* extz ${Dsp-24-u16},$Dst32RnPrefixedHI */
8121 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8122 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83b00 }
8124 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8127 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8128 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08b00 }
8130 /* extz ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8133 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8134 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0ab00 }
8136 /* extz ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8139 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8140 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0bb00 }
8142 /* extz ${Dsp-24-u16},$Dst32AnPrefixedHI */
8145 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8146 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0bb00 }
8148 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8151 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8152 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00b00 }
8154 /* extz ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8157 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8158 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02b00 }
8160 /* extz ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8163 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8164 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03b00 }
8166 /* extz ${Dsp-24-u16},[$Dst32AnPrefixed] */
8169 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8170 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03b00 }
8172 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8175 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8176 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20b00 }
8178 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8181 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8182 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22b00 }
8184 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8187 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8188 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23b00 }
8190 /* extz ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8193 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8194 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23b00 }
8196 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
8199 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8200 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40b00 }
8202 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8205 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8206 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42b00 }
8208 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8211 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8212 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43b00 }
8214 /* extz ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
8217 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8218 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43b00 }
8220 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
8223 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8224 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60b00 }
8226 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8229 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8230 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62b00 }
8232 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8235 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8236 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63b00 }
8238 /* extz ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
8241 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8242 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63b00 }
8244 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
8247 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8248 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28b00 }
8250 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
8253 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8254 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2ab00 }
8256 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
8259 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8260 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2bb00 }
8262 /* extz ${Dsp-24-u16},${Dsp-40-u8}[sb] */
8265 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8266 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2bb00 }
8268 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
8271 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8272 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48b00 }
8274 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
8277 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8278 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4ab00 }
8280 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
8283 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8284 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4bb00 }
8286 /* extz ${Dsp-24-u16},${Dsp-40-u16}[sb] */
8289 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8290 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4bb00 }
8292 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
8295 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8296 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2cb00 }
8298 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
8301 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8302 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2eb00 }
8304 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
8307 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8308 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2fb00 }
8310 /* extz ${Dsp-24-u16},${Dsp-40-s8}[fb] */
8313 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8314 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2fb00 }
8316 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
8319 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8320 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4cb00 }
8322 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
8325 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8326 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4eb00 }
8328 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
8331 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8332 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4fb00 }
8334 /* extz ${Dsp-24-u16},${Dsp-40-s16}[fb] */
8337 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8338 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4fb00 }
8340 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
8343 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
8344 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6cb00 }
8346 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16} */
8349 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8350 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6eb00 }
8352 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16} */
8355 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8356 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6fb00 }
8358 /* extz ${Dsp-24-u16},${Dsp-40-u16} */
8361 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
8362 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6fb00 }
8364 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
8367 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
8368 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68b00 }
8370 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24} */
8373 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8374 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6ab00 }
8376 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24} */
8379 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8380 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6bb00 }
8382 /* extz ${Dsp-24-u16},${Dsp-40-u24} */
8385 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
8386 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6bb00 }
8388 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8391 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8392 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80b00 }
8394 /* extz ${Dsp-24-u24},$Dst32RnPrefixedHI */
8397 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8398 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82b00 }
8400 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8403 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8404 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08b00 }
8406 /* extz ${Dsp-24-u24},$Dst32AnPrefixedHI */
8409 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8410 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0ab00 }
8412 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8415 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8416 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00b00 }
8418 /* extz ${Dsp-24-u24},[$Dst32AnPrefixed] */
8421 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8422 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02b00 }
8424 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
8427 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8428 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20b00 }
8430 /* extz ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
8433 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8434 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22b00 }
8436 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
8439 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8440 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40b00 }
8442 /* extz ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
8445 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8446 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42b00 }
8448 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
8451 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8452 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60b00 }
8454 /* extz ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
8457 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8458 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62b00 }
8460 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
8463 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8464 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28b00 }
8466 /* extz ${Dsp-24-u24},${Dsp-48-u8}[sb] */
8469 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8470 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2ab00 }
8472 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
8475 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8476 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48b00 }
8478 /* extz ${Dsp-24-u24},${Dsp-48-u16}[sb] */
8481 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8482 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4ab00 }
8484 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
8487 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8488 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2cb00 }
8490 /* extz ${Dsp-24-u24},${Dsp-48-s8}[fb] */
8493 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8494 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2eb00 }
8496 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
8499 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8500 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4cb00 }
8502 /* extz ${Dsp-24-u24},${Dsp-48-s16}[fb] */
8505 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8506 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4eb00 }
8508 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
8511 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
8512 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6cb00 }
8514 /* extz ${Dsp-24-u24},${Dsp-48-u16} */
8517 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
8518 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6eb00 }
8520 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
8523 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
8524 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68b00 }
8526 /* extz ${Dsp-24-u24},${Dsp-48-u24} */
8529 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
8530 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6ab00 }
8532 /* extz $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
8535 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8536 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c80b }
8538 /* extz [$Src32AnPrefixed],$Dst32RnPrefixedHI */
8541 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8542 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1880b }
8544 /* extz $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
8547 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8548 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c08b }
8550 /* extz [$Src32AnPrefixed],$Dst32AnPrefixedHI */
8553 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8554 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1808b }
8556 /* extz $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
8559 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8560 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c00b }
8562 /* extz [$Src32AnPrefixed],[$Dst32AnPrefixed] */
8565 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8566 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1800b }
8568 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
8571 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8572 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20b00 }
8574 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
8577 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8578 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820b00 }
8580 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
8583 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8584 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40b00 }
8586 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
8589 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8590 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840b00 }
8592 /* extz $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
8595 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8596 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60b00 }
8598 /* extz [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
8601 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8602 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860b00 }
8604 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
8607 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8608 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28b00 }
8610 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
8613 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8614 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828b00 }
8616 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
8619 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8620 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48b00 }
8622 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
8625 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8626 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848b00 }
8628 /* extz $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
8631 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8632 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2cb00 }
8634 /* extz [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
8637 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8638 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182cb00 }
8640 /* extz $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
8643 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8644 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4cb00 }
8646 /* extz [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
8649 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8650 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184cb00 }
8652 /* extz $Src32RnPrefixedQI,${Dsp-24-u16} */
8655 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
8656 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6cb00 }
8658 /* extz [$Src32AnPrefixed],${Dsp-24-u16} */
8661 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
8662 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186cb00 }
8664 /* extz $Src32RnPrefixedQI,${Dsp-24-u24} */
8667 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
8668 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68b00 }
8670 /* extz [$Src32AnPrefixed],${Dsp-24-u24} */
8673 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
8674 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868b00 }
8676 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8679 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8680 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980700 }
8682 /* exts.b ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
8685 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8686 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982700 }
8688 /* exts.b ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
8691 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8692 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983700 }
8694 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8697 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8698 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908700 }
8700 /* exts.b ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
8703 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8704 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190a700 }
8706 /* exts.b ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
8709 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8710 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190b700 }
8712 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8715 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8716 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900700 }
8718 /* exts.b ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
8721 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8722 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902700 }
8724 /* exts.b ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
8727 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8728 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903700 }
8730 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
8733 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8734 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920700 }
8736 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8739 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8740 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922700 }
8742 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8745 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8746 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923700 }
8748 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
8751 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8752 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940700 }
8754 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8757 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8758 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942700 }
8760 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8763 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8764 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943700 }
8766 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
8769 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8770 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960700 }
8772 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8775 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8776 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962700 }
8778 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8781 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8782 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963700 }
8784 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
8787 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8788 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928700 }
8790 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8793 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8794 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192a700 }
8796 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8799 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8800 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192b700 }
8802 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8805 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8806 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948700 }
8808 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8811 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8812 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194a700 }
8814 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8817 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8818 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194b700 }
8820 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8823 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8824 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192c700 }
8826 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8829 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8830 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192e700 }
8832 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8835 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8836 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192f700 }
8838 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8841 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8842 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194c700 }
8844 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8847 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8848 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194e700 }
8850 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8853 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8854 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194f700 }
8856 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8859 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8860 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196c700 }
8862 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8865 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8866 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196e700 }
8868 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8871 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8872 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196f700 }
8874 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8877 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8878 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968700 }
8880 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8883 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8884 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196a700 }
8886 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8889 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8890 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196b700 }
8892 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8895 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8896 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80700 }
8898 /* exts.b ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8901 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8902 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82700 }
8904 /* exts.b ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8907 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8908 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83700 }
8910 /* exts.b ${Dsp-24-u16},$Dst32RnPrefixedHI */
8913 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8914 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83700 }
8916 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8919 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8920 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08700 }
8922 /* exts.b ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8925 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8926 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0a700 }
8928 /* exts.b ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8931 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8932 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0b700 }
8934 /* exts.b ${Dsp-24-u16},$Dst32AnPrefixedHI */
8937 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8938 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0b700 }
8940 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8943 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8944 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00700 }
8946 /* exts.b ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8949 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8950 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02700 }
8952 /* exts.b ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8955 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8956 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03700 }
8958 /* exts.b ${Dsp-24-u16},[$Dst32AnPrefixed] */
8961 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8962 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03700 }
8964 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8967 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8968 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20700 }
8970 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8973 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8974 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22700 }
8976 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8979 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8980 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23700 }
8982 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8985 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8986 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23700 }
8988 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
8991 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8992 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40700 }
8994 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8997 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8998 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42700 }
9000 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
9003 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9004 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43700 }
9006 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
9009 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9010 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43700 }
9012 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
9015 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9016 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60700 }
9018 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9021 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9022 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62700 }
9024 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9027 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9028 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63700 }
9030 /* exts.b ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
9033 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9034 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63700 }
9036 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
9039 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9040 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28700 }
9042 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
9045 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9046 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2a700 }
9048 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
9051 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9052 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2b700 }
9054 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[sb] */
9057 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9058 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2b700 }
9060 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
9063 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9064 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48700 }
9066 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
9069 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9070 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4a700 }
9072 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
9075 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9076 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4b700 }
9078 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[sb] */
9081 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9082 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4b700 }
9084 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
9087 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9088 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2c700 }
9090 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
9093 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9094 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2e700 }
9096 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
9099 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9100 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2f700 }
9102 /* exts.b ${Dsp-24-u16},${Dsp-40-s8}[fb] */
9105 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9106 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2f700 }
9108 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
9111 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9112 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4c700 }
9114 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
9117 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9118 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4e700 }
9120 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
9123 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9124 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4f700 }
9126 /* exts.b ${Dsp-24-u16},${Dsp-40-s16}[fb] */
9129 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9130 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4f700 }
9132 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
9135 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
9136 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6c700 }
9138 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16} */
9141 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9142 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6e700 }
9144 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16} */
9147 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9148 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6f700 }
9150 /* exts.b ${Dsp-24-u16},${Dsp-40-u16} */
9153 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
9154 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6f700 }
9156 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
9159 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
9160 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68700 }
9162 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24} */
9165 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9166 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6a700 }
9168 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24} */
9171 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9172 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6b700 }
9174 /* exts.b ${Dsp-24-u16},${Dsp-40-u24} */
9177 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
9178 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6b700 }
9180 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
9183 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9184 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80700 }
9186 /* exts.b ${Dsp-24-u24},$Dst32RnPrefixedHI */
9189 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9190 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82700 }
9192 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
9195 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9196 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08700 }
9198 /* exts.b ${Dsp-24-u24},$Dst32AnPrefixedHI */
9201 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9202 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0a700 }
9204 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
9207 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9208 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00700 }
9210 /* exts.b ${Dsp-24-u24},[$Dst32AnPrefixed] */
9213 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9214 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02700 }
9216 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
9219 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9220 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20700 }
9222 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
9225 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9226 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22700 }
9228 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
9231 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9232 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40700 }
9234 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
9237 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9238 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42700 }
9240 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
9243 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9244 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60700 }
9246 /* exts.b ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
9249 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9250 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62700 }
9252 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
9255 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9256 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28700 }
9258 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[sb] */
9261 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9262 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2a700 }
9264 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
9267 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9268 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48700 }
9270 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[sb] */
9273 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9274 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4a700 }
9276 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
9279 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9280 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2c700 }
9282 /* exts.b ${Dsp-24-u24},${Dsp-48-s8}[fb] */
9285 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9286 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2e700 }
9288 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
9291 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9292 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4c700 }
9294 /* exts.b ${Dsp-24-u24},${Dsp-48-s16}[fb] */
9297 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9298 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4e700 }
9300 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
9303 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
9304 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6c700 }
9306 /* exts.b ${Dsp-24-u24},${Dsp-48-u16} */
9309 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
9310 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6e700 }
9312 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
9315 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
9316 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68700 }
9318 /* exts.b ${Dsp-24-u24},${Dsp-48-u24} */
9321 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
9322 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6a700 }
9324 /* exts.b $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
9327 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9328 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c807 }
9330 /* exts.b [$Src32AnPrefixed],$Dst32RnPrefixedHI */
9333 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9334 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x18807 }
9336 /* exts.b $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
9339 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9340 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c087 }
9342 /* exts.b [$Src32AnPrefixed],$Dst32AnPrefixedHI */
9345 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9346 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x18087 }
9348 /* exts.b $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
9351 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9352 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c007 }
9354 /* exts.b [$Src32AnPrefixed],[$Dst32AnPrefixed] */
9357 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9358 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x18007 }
9360 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
9363 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9364 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20700 }
9366 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
9369 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9370 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820700 }
9372 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
9375 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9376 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40700 }
9378 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
9381 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9382 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840700 }
9384 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
9387 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9388 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60700 }
9390 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
9393 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9394 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860700 }
9396 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
9399 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9400 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28700 }
9402 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
9405 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9406 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828700 }
9408 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
9411 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9412 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48700 }
9414 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
9417 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9418 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848700 }
9420 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
9423 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9424 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2c700 }
9426 /* exts.b [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
9429 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9430 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182c700 }
9432 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
9435 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9436 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4c700 }
9438 /* exts.b [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
9441 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9442 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184c700 }
9444 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16} */
9447 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
9448 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6c700 }
9450 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16} */
9453 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9454 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186c700 }
9456 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24} */
9459 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
9460 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68700 }
9462 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24} */
9465 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9466 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868700 }
9468 /* exts.w $Dst32RnExtUnprefixedHI */
9471 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDHI
), 0 } },
9472 & ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI
, { 0xc99e }
9474 /* exts.w $Dst32AnUnprefixedSI */
9477 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
9478 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc19e }
9480 /* exts.w [$Dst32AnExtUnprefixed] */
9483 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9484 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI
, { 0xc11e }
9486 /* exts.w ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9489 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9490 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI
, { 0xc31e00 }
9492 /* exts.w ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9495 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9496 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI
, { 0xc51e0000 }
9498 /* exts.w ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9501 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9502 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI
, { 0xc71e0000 }
9504 /* exts.w ${Dsp-16-u8}[sb] */
9507 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9508 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI
, { 0xc39e00 }
9510 /* exts.w ${Dsp-16-u16}[sb] */
9513 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9514 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI
, { 0xc59e0000 }
9516 /* exts.w ${Dsp-16-s8}[fb] */
9519 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9520 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI
, { 0xc3de00 }
9522 /* exts.w ${Dsp-16-s16}[fb] */
9525 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9526 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI
, { 0xc5de0000 }
9528 /* exts.w ${Dsp-16-u16} */
9531 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9532 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI
, { 0xc7de0000 }
9534 /* exts.w ${Dsp-16-u24} */
9537 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9538 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI
, { 0xc79e0000 }
9540 /* exts.b $Dst32RnExtUnprefixedQI */
9543 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDQI
), 0 } },
9544 & ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI
, { 0xc89e }
9546 /* exts.b $Dst32AnUnprefixedHI */
9549 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
9550 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc09e }
9552 /* exts.b [$Dst32AnExtUnprefixed] */
9555 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9556 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI
, { 0xc01e }
9558 /* exts.b ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9561 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9562 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI
, { 0xc21e00 }
9564 /* exts.b ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9567 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9568 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI
, { 0xc41e0000 }
9570 /* exts.b ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9573 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9574 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI
, { 0xc61e0000 }
9576 /* exts.b ${Dsp-16-u8}[sb] */
9579 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9580 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI
, { 0xc29e00 }
9582 /* exts.b ${Dsp-16-u16}[sb] */
9585 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9586 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI
, { 0xc49e0000 }
9588 /* exts.b ${Dsp-16-s8}[fb] */
9591 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9592 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI
, { 0xc2de00 }
9594 /* exts.b ${Dsp-16-s16}[fb] */
9597 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9598 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI
, { 0xc4de0000 }
9600 /* exts.b ${Dsp-16-u16} */
9603 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9604 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI
, { 0xc6de0000 }
9606 /* exts.b ${Dsp-16-u24} */
9609 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9610 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI
, { 0xc69e0000 }
9612 /* exts.b $Dst16RnExtQI */
9615 { { MNEM
, ' ', OP (DST16RNEXTQI
), 0 } },
9616 & ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI
, { 0x7c60 }
9618 /* exts.b [$Dst16An] */
9621 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
9622 & ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI
, { 0x7c66 }
9624 /* exts.b ${Dsp-16-u8}[$Dst16An] */
9627 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
9628 & ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI
, { 0x7c6800 }
9630 /* exts.b ${Dsp-16-u16}[$Dst16An] */
9633 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
9634 & ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI
, { 0x7c6c0000 }
9636 /* exts.b ${Dsp-16-u8}[sb] */
9639 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9640 & ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI
, { 0x7c6a00 }
9642 /* exts.b ${Dsp-16-u16}[sb] */
9645 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9646 & ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI
, { 0x7c6e0000 }
9648 /* exts.b ${Dsp-16-s8}[fb] */
9651 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9652 & ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI
, { 0x7c6b00 }
9654 /* exts.b ${Dsp-16-u16} */
9657 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9658 & ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI
, { 0x7c6f0000 }
9660 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9664 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990900 }
9666 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
9669 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9670 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992900 }
9672 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
9675 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9676 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993900 }
9678 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9681 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9682 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918900 }
9684 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
9687 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9688 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a900 }
9690 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
9693 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9694 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b900 }
9696 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9699 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9700 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910900 }
9702 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
9705 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9706 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912900 }
9708 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
9711 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9712 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913900 }
9714 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9717 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9718 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93090000 }
9720 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9723 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9724 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93290000 }
9726 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9729 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9730 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93390000 }
9732 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9736 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95090000 }
9738 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9742 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95290000 }
9744 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9747 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9748 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95390000 }
9750 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9754 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97090000 }
9756 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9760 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97290000 }
9762 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9765 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9766 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97390000 }
9768 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
9771 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9772 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93890000 }
9774 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
9777 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9778 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a90000 }
9780 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
9783 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9784 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b90000 }
9786 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
9789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9790 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95890000 }
9792 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
9795 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9796 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a90000 }
9798 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
9801 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9802 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b90000 }
9804 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
9807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9808 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c90000 }
9810 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
9813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9814 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e90000 }
9816 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
9819 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9820 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f90000 }
9822 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
9825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9826 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c90000 }
9828 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
9831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9832 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e90000 }
9834 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
9837 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9838 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f90000 }
9840 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
9843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9844 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c90000 }
9846 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
9849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9850 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e90000 }
9852 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
9855 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9856 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f90000 }
9858 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
9861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9862 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97890000 }
9864 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
9867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9868 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a90000 }
9870 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
9873 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9874 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b90000 }
9876 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9880 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9090000 }
9882 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
9885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9886 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9290000 }
9888 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
9891 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9892 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9390000 }
9894 /* xor.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
9897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9898 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9390000 }
9900 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9903 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9904 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1890000 }
9906 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
9909 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9910 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a90000 }
9912 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
9915 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9916 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b90000 }
9918 /* xor.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
9921 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9922 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b90000 }
9924 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9927 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9928 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1090000 }
9930 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
9933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9934 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1290000 }
9936 /* xor.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
9939 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9940 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1390000 }
9942 /* xor.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
9945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9946 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1390000 }
9948 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9952 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3090000 }
9954 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9958 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3290000 }
9960 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9963 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9964 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3390000 }
9966 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
9969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9970 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3390000 }
9972 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9975 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9976 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5090000 }
9978 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9982 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5290000 }
9984 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9987 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9988 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5390000 }
9990 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
9993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9994 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5390000 }
9996 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
9999 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10000 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7090000 }
10002 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10006 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7290000 }
10008 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10011 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10012 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7390000 }
10014 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10018 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7390000 }
10020 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10024 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3890000 }
10026 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10030 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a90000 }
10032 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10035 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10036 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b90000 }
10038 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10042 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b90000 }
10044 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10047 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10048 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5890000 }
10050 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10054 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a90000 }
10056 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10059 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10060 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b90000 }
10062 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10065 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10066 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b90000 }
10068 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10072 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c90000 }
10074 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10078 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e90000 }
10080 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10083 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10084 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f90000 }
10086 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10089 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10090 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f90000 }
10092 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10096 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c90000 }
10098 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10102 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e90000 }
10104 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10107 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10108 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f90000 }
10110 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10113 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10114 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f90000 }
10116 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10119 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10120 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c90000 }
10122 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
10125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10126 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e90000 }
10128 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
10131 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10132 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f90000 }
10134 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
10137 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
10138 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f90000 }
10140 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
10143 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
10144 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7890000 }
10146 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
10149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10150 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a90000 }
10152 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
10155 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10156 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b90000 }
10158 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
10161 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
10162 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b90000 }
10164 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10167 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10168 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9090000 }
10170 /* xor.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
10173 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10174 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9290000 }
10176 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10179 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10180 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1890000 }
10182 /* xor.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
10185 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10186 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a90000 }
10188 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10191 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10192 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1090000 }
10194 /* xor.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
10197 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10198 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1290000 }
10200 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
10203 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10204 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3090000 }
10206 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
10209 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10210 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3290000 }
10212 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
10215 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10216 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5090000 }
10218 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
10221 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10222 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5290000 }
10224 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
10227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10228 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7090000 }
10230 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
10233 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10234 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7290000 }
10236 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
10239 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10240 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3890000 }
10242 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
10245 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10246 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a90000 }
10248 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
10251 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10252 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5890000 }
10254 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
10257 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10258 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a90000 }
10260 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
10263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10264 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c90000 }
10266 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
10269 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10270 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e90000 }
10272 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
10275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10276 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c90000 }
10278 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
10281 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10282 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e90000 }
10284 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
10287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
10288 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c90000 }
10290 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
10293 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
10294 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e90000 }
10296 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
10299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
10300 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7890000 }
10302 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
10305 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
10306 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a90000 }
10308 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
10311 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10312 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc909 }
10314 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
10317 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10318 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8929 }
10320 /* xor.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10323 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10324 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8909 }
10326 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
10329 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10330 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc189 }
10332 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
10335 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10336 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a9 }
10338 /* xor.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10341 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10342 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8189 }
10344 /* xor.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
10347 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10348 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc109 }
10350 /* xor.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
10353 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10354 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8129 }
10356 /* xor.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10359 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10360 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8109 }
10362 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10365 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10366 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30900 }
10368 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10371 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10372 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832900 }
10374 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
10377 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10378 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830900 }
10380 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10383 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10384 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5090000 }
10386 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10389 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10390 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85290000 }
10392 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
10395 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10396 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85090000 }
10398 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10401 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10402 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7090000 }
10404 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10407 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10408 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87290000 }
10410 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
10413 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10414 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87090000 }
10416 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
10419 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10420 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38900 }
10422 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
10425 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10426 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a900 }
10428 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
10431 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10432 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838900 }
10434 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
10437 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10438 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5890000 }
10440 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
10443 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10444 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a90000 }
10446 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
10449 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10450 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85890000 }
10452 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
10455 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10456 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c900 }
10458 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
10461 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10462 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e900 }
10464 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
10467 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10468 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c900 }
10470 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
10473 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10474 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c90000 }
10476 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
10479 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10480 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e90000 }
10482 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
10485 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10486 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c90000 }
10488 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
10491 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10492 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c90000 }
10494 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
10497 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10498 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e90000 }
10500 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
10503 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
10504 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c90000 }
10506 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
10509 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10510 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7890000 }
10512 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
10515 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10516 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a90000 }
10518 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
10521 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
10522 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87890000 }
10524 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10528 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980900 }
10530 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
10533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10534 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982900 }
10536 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
10539 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10540 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983900 }
10542 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10545 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10546 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908900 }
10548 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
10551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10552 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a900 }
10554 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
10557 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10558 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b900 }
10560 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10563 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10564 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900900 }
10566 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
10569 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10570 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902900 }
10572 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
10575 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10576 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903900 }
10578 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10582 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92090000 }
10584 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10587 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10588 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92290000 }
10590 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10593 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10594 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92390000 }
10596 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10600 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94090000 }
10602 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10605 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10606 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94290000 }
10608 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10611 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10612 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94390000 }
10614 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10618 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96090000 }
10620 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10623 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10624 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96290000 }
10626 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10629 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10630 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96390000 }
10632 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
10635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10636 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92890000 }
10638 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
10641 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10642 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a90000 }
10644 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
10647 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10648 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b90000 }
10650 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
10653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10654 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94890000 }
10656 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
10659 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10660 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a90000 }
10662 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
10665 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10666 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b90000 }
10668 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
10671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10672 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c90000 }
10674 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
10677 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10678 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e90000 }
10680 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
10683 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10684 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f90000 }
10686 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
10689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10690 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c90000 }
10692 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
10695 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10696 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e90000 }
10698 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
10701 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10702 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f90000 }
10704 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
10707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
10708 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c90000 }
10710 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
10713 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10714 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e90000 }
10716 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
10719 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10720 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f90000 }
10722 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
10725 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
10726 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96890000 }
10728 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
10731 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10732 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a90000 }
10734 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
10737 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10738 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b90000 }
10740 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10744 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8090000 }
10746 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
10749 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10750 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8290000 }
10752 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
10755 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10756 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8390000 }
10758 /* xor.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
10761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10762 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8390000 }
10764 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10767 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10768 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0890000 }
10770 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
10773 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10774 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a90000 }
10776 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
10779 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10780 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b90000 }
10782 /* xor.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
10785 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10786 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b90000 }
10788 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10791 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10792 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0090000 }
10794 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
10797 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10798 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0290000 }
10800 /* xor.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
10803 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10804 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0390000 }
10806 /* xor.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
10809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10810 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0390000 }
10812 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10816 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2090000 }
10818 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10821 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10822 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2290000 }
10824 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10827 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10828 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2390000 }
10830 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
10833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10834 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2390000 }
10836 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10839 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10840 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4090000 }
10842 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10845 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10846 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4290000 }
10848 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10851 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10852 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4390000 }
10854 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
10857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10858 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4390000 }
10860 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10864 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6090000 }
10866 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10870 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6290000 }
10872 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10875 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10876 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6390000 }
10878 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10882 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6390000 }
10884 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10888 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2890000 }
10890 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10894 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a90000 }
10896 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10899 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10900 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b90000 }
10902 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10905 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10906 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b90000 }
10908 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10912 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4890000 }
10914 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10918 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a90000 }
10920 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10923 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10924 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b90000 }
10926 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10929 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10930 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b90000 }
10932 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10936 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c90000 }
10938 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10942 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e90000 }
10944 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10947 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10948 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f90000 }
10950 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10954 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f90000 }
10956 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10960 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c90000 }
10962 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10966 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e90000 }
10968 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10971 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10972 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f90000 }
10974 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10977 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10978 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f90000 }
10980 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10984 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c90000 }
10986 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
10989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10990 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e90000 }
10992 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
10995 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10996 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f90000 }
10998 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
11001 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11002 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f90000 }
11004 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
11007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
11008 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6890000 }
11010 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
11013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11014 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a90000 }
11016 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
11019 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11020 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b90000 }
11022 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
11025 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
11026 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b90000 }
11028 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11032 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8090000 }
11034 /* xor.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
11037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11038 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8290000 }
11040 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11044 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0890000 }
11046 /* xor.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
11049 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11050 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a90000 }
11052 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11056 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0090000 }
11058 /* xor.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
11061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11062 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0290000 }
11064 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
11067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11068 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2090000 }
11070 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
11073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11074 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2290000 }
11076 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
11079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11080 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4090000 }
11082 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
11085 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11086 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4290000 }
11088 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
11091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11092 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6090000 }
11094 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
11097 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11098 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6290000 }
11100 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
11103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11104 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2890000 }
11106 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
11109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11110 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a90000 }
11112 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
11115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11116 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4890000 }
11118 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
11121 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11122 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a90000 }
11124 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
11127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11128 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c90000 }
11130 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
11133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11134 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e90000 }
11136 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
11139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11140 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c90000 }
11142 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
11145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11146 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e90000 }
11148 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
11151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
11152 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c90000 }
11154 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
11157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
11158 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e90000 }
11160 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
11163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
11164 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6890000 }
11166 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
11169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
11170 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a90000 }
11172 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
11175 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11176 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc809 }
11178 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
11181 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11182 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8829 }
11184 /* xor.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11187 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11188 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8809 }
11190 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
11193 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11194 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc089 }
11196 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
11199 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11200 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a9 }
11202 /* xor.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11205 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11206 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8089 }
11208 /* xor.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
11211 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11212 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc009 }
11214 /* xor.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
11217 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11218 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8029 }
11220 /* xor.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11223 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11224 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8009 }
11226 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11229 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11230 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20900 }
11232 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11235 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11236 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822900 }
11238 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
11241 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11242 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820900 }
11244 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11247 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11248 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4090000 }
11250 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11253 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11254 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84290000 }
11256 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
11259 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11260 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84090000 }
11262 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11265 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11266 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6090000 }
11268 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11271 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11272 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86290000 }
11274 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
11277 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11278 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86090000 }
11280 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
11283 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11284 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28900 }
11286 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
11289 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11290 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a900 }
11292 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
11295 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11296 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828900 }
11298 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
11301 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11302 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4890000 }
11304 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
11307 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11308 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a90000 }
11310 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
11313 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11314 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84890000 }
11316 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
11319 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11320 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c900 }
11322 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
11325 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11326 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e900 }
11328 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
11331 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11332 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c900 }
11334 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
11337 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11338 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c90000 }
11340 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
11343 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11344 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e90000 }
11346 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
11349 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11350 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c90000 }
11352 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
11355 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11356 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c90000 }
11358 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
11361 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11362 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e90000 }
11364 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
11367 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
11368 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c90000 }
11370 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
11373 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11374 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6890000 }
11376 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
11379 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11380 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a90000 }
11382 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
11385 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
11386 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86890000 }
11388 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
11391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11392 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x898000 }
11394 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
11397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11398 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89a000 }
11400 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
11403 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11404 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x89b000 }
11406 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
11409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11410 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x898400 }
11412 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
11415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11416 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x89a400 }
11418 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
11421 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11422 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x89b400 }
11424 /* xor.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11428 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x898600 }
11430 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11434 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x89a600 }
11436 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11439 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11440 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x89b600 }
11442 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11446 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x89880000 }
11448 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11452 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89a80000 }
11454 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11457 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11458 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89b80000 }
11460 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11464 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x898c0000 }
11466 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11469 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11470 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89ac0000 }
11472 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11475 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11476 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89bc0000 }
11478 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11482 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x898a0000 }
11484 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11488 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89aa0000 }
11490 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11493 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11494 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89ba0000 }
11496 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11500 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x898e0000 }
11502 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
11505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11506 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89ae0000 }
11508 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
11511 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11512 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89be0000 }
11514 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
11517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11518 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x898b0000 }
11520 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
11523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11524 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89ab0000 }
11526 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
11529 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11530 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89bb0000 }
11532 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
11535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
11536 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x898f0000 }
11538 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
11541 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11542 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x89af0000 }
11544 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
11547 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11548 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x89bf0000 }
11550 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
11553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11554 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x89c00000 }
11556 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
11559 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11560 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89e00000 }
11562 /* xor.w${G} ${Dsp-16-u16},$Dst16RnHI */
11565 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
11566 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x89f00000 }
11568 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
11571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11572 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x89c40000 }
11574 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
11577 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11578 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x89e40000 }
11580 /* xor.w${G} ${Dsp-16-u16},$Dst16AnHI */
11583 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
11584 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x89f40000 }
11586 /* xor.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
11589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11590 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x89c60000 }
11592 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
11595 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11596 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x89e60000 }
11598 /* xor.w${G} ${Dsp-16-u16},[$Dst16An] */
11601 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
11602 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x89f60000 }
11604 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
11607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11608 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x89c80000 }
11610 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
11613 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11614 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x89e80000 }
11616 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
11619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11620 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x89f80000 }
11622 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
11625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11626 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x89cc0000 }
11628 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
11631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11632 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x89ec0000 }
11634 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
11637 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11638 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x89fc0000 }
11640 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
11643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11644 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ca0000 }
11646 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
11649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11650 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ea0000 }
11652 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
11655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11656 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x89fa0000 }
11658 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
11661 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11662 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ce0000 }
11664 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
11667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11668 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ee0000 }
11670 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
11673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11674 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x89fe0000 }
11676 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
11679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11680 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89cb0000 }
11682 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
11685 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11686 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89eb0000 }
11688 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
11691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11692 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x89fb0000 }
11694 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
11697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
11698 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x89cf0000 }
11700 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
11703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
11704 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x89ef0000 }
11706 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
11709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11710 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x89ff0000 }
11712 /* xor.w${G} $Src16RnHI,$Dst16RnHI */
11715 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
11716 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8900 }
11718 /* xor.w${G} $Src16AnHI,$Dst16RnHI */
11721 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
11722 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8940 }
11724 /* xor.w${G} [$Src16An],$Dst16RnHI */
11727 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11728 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8960 }
11730 /* xor.w${G} $Src16RnHI,$Dst16AnHI */
11733 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
11734 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8904 }
11736 /* xor.w${G} $Src16AnHI,$Dst16AnHI */
11739 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
11740 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8944 }
11742 /* xor.w${G} [$Src16An],$Dst16AnHI */
11745 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11746 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8964 }
11748 /* xor.w${G} $Src16RnHI,[$Dst16An] */
11751 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11752 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8906 }
11754 /* xor.w${G} $Src16AnHI,[$Dst16An] */
11757 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11758 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8946 }
11760 /* xor.w${G} [$Src16An],[$Dst16An] */
11763 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11764 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8966 }
11766 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
11769 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11770 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x890800 }
11772 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
11775 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11776 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x894800 }
11778 /* xor.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
11781 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11782 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x896800 }
11784 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
11787 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11788 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x890c0000 }
11790 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
11793 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11794 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x894c0000 }
11796 /* xor.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
11799 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11800 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x896c0000 }
11802 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
11805 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11806 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x890a00 }
11808 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
11811 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11812 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x894a00 }
11814 /* xor.w${G} [$Src16An],${Dsp-16-u8}[sb] */
11817 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11818 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x896a00 }
11820 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
11823 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11824 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x890e0000 }
11826 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
11829 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11830 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x894e0000 }
11832 /* xor.w${G} [$Src16An],${Dsp-16-u16}[sb] */
11835 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11836 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x896e0000 }
11838 /* xor.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
11841 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11842 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x890b00 }
11844 /* xor.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
11847 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11848 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x894b00 }
11850 /* xor.w${G} [$Src16An],${Dsp-16-s8}[fb] */
11853 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11854 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x896b00 }
11856 /* xor.w${G} $Src16RnHI,${Dsp-16-u16} */
11859 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
11860 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x890f0000 }
11862 /* xor.w${G} $Src16AnHI,${Dsp-16-u16} */
11865 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
11866 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x894f0000 }
11868 /* xor.w${G} [$Src16An],${Dsp-16-u16} */
11871 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
11872 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x896f0000 }
11874 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
11877 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
11878 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x888000 }
11880 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
11883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11884 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88a000 }
11886 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
11889 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11890 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x88b000 }
11892 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
11895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
11896 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x888400 }
11898 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
11901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11902 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x88a400 }
11904 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
11907 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11908 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x88b400 }
11910 /* xor.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11913 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11914 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x888600 }
11916 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11920 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x88a600 }
11922 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11925 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11926 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x88b600 }
11928 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11932 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x88880000 }
11934 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11937 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11938 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88a80000 }
11940 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11943 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11944 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88b80000 }
11946 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11950 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x888c0000 }
11952 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11956 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88ac0000 }
11958 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11961 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11962 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88bc0000 }
11964 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11968 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x888a0000 }
11970 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11973 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11974 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88aa0000 }
11976 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11979 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11980 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88ba0000 }
11982 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11985 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11986 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x888e0000 }
11988 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
11991 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11992 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88ae0000 }
11994 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
11997 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11998 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88be0000 }
12000 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
12003 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12004 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x888b0000 }
12006 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
12009 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12010 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88ab0000 }
12012 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
12015 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12016 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88bb0000 }
12018 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
12021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
12022 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x888f0000 }
12024 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
12027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12028 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x88af0000 }
12030 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
12033 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12034 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x88bf0000 }
12036 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
12039 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12040 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x88c00000 }
12042 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
12045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
12046 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88e00000 }
12048 /* xor.b${G} ${Dsp-16-u16},$Dst16RnQI */
12051 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
12052 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x88f00000 }
12054 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
12057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12058 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x88c40000 }
12060 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
12063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
12064 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x88e40000 }
12066 /* xor.b${G} ${Dsp-16-u16},$Dst16AnQI */
12069 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
12070 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x88f40000 }
12072 /* xor.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
12075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12076 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x88c60000 }
12078 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
12081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
12082 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x88e60000 }
12084 /* xor.b${G} ${Dsp-16-u16},[$Dst16An] */
12087 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
12088 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x88f60000 }
12090 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
12093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12094 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x88c80000 }
12096 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
12099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12100 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x88e80000 }
12102 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
12105 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12106 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x88f80000 }
12108 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
12111 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12112 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x88cc0000 }
12114 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
12117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12118 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x88ec0000 }
12120 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
12123 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12124 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x88fc0000 }
12126 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
12129 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12130 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ca0000 }
12132 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
12135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12136 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ea0000 }
12138 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
12141 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12142 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x88fa0000 }
12144 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
12147 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12148 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ce0000 }
12150 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
12153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12154 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ee0000 }
12156 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
12159 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12160 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x88fe0000 }
12162 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
12165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12166 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88cb0000 }
12168 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
12171 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12172 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88eb0000 }
12174 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
12177 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12178 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x88fb0000 }
12180 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
12183 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
12184 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x88cf0000 }
12186 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
12189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
12190 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x88ef0000 }
12192 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
12195 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
12196 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x88ff0000 }
12198 /* xor.b${G} $Src16RnQI,$Dst16RnQI */
12201 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
12202 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8800 }
12204 /* xor.b${G} $Src16AnQI,$Dst16RnQI */
12207 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
12208 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8840 }
12210 /* xor.b${G} [$Src16An],$Dst16RnQI */
12213 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12214 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8860 }
12216 /* xor.b${G} $Src16RnQI,$Dst16AnQI */
12219 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
12220 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8804 }
12222 /* xor.b${G} $Src16AnQI,$Dst16AnQI */
12225 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
12226 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8844 }
12228 /* xor.b${G} [$Src16An],$Dst16AnQI */
12231 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12232 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8864 }
12234 /* xor.b${G} $Src16RnQI,[$Dst16An] */
12237 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12238 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8806 }
12240 /* xor.b${G} $Src16AnQI,[$Dst16An] */
12243 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12244 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8846 }
12246 /* xor.b${G} [$Src16An],[$Dst16An] */
12249 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12250 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8866 }
12252 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
12255 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12256 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x880800 }
12258 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
12261 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12262 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x884800 }
12264 /* xor.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
12267 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12268 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x886800 }
12270 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
12273 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12274 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x880c0000 }
12276 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
12279 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12280 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x884c0000 }
12282 /* xor.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
12285 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12286 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x886c0000 }
12288 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
12291 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12292 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x880a00 }
12294 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
12297 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12298 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x884a00 }
12300 /* xor.b${G} [$Src16An],${Dsp-16-u8}[sb] */
12303 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12304 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x886a00 }
12306 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
12309 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12310 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x880e0000 }
12312 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
12315 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12316 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x884e0000 }
12318 /* xor.b${G} [$Src16An],${Dsp-16-u16}[sb] */
12321 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12322 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x886e0000 }
12324 /* xor.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
12327 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12328 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x880b00 }
12330 /* xor.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
12333 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12334 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x884b00 }
12336 /* xor.b${G} [$Src16An],${Dsp-16-s8}[fb] */
12339 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12340 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x886b00 }
12342 /* xor.b${G} $Src16RnQI,${Dsp-16-u16} */
12345 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
12346 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x880f0000 }
12348 /* xor.b${G} $Src16AnQI,${Dsp-16-u16} */
12351 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
12352 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x884f0000 }
12354 /* xor.b${G} [$Src16An],${Dsp-16-u16} */
12357 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
12358 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x886f0000 }
12360 /* xor.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
12363 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12364 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990e0000 }
12366 /* xor.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
12369 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12370 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918e0000 }
12372 /* xor.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
12375 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12376 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910e0000 }
12378 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12381 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12382 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930e0000 }
12384 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12387 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12388 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938e0000 }
12390 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12393 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12394 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ce0000 }
12396 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12399 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12400 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950e0000 }
12402 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12405 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12406 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958e0000 }
12408 /* xor.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
12411 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12412 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ce0000 }
12414 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12417 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12418 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ce0000 }
12420 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12423 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12424 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970e0000 }
12426 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24} */
12429 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
12430 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978e0000 }
12432 /* xor.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
12435 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
12436 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980e00 }
12438 /* xor.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
12441 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
12442 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908e00 }
12444 /* xor.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
12447 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12448 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900e00 }
12450 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12453 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12454 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920e0000 }
12456 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12459 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12460 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928e0000 }
12462 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12465 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12466 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ce0000 }
12468 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12471 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12472 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940e0000 }
12474 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12477 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12478 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948e0000 }
12480 /* xor.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
12483 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12484 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ce0000 }
12486 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12489 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12490 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ce0000 }
12492 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12495 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12496 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960e0000 }
12498 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24} */
12501 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
12502 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968e0000 }
12504 /* xor.w${G} #${Imm-16-HI},$Dst16RnHI */
12507 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
12508 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77100000 }
12510 /* xor.w${G} #${Imm-16-HI},$Dst16AnHI */
12513 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
12514 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77140000 }
12516 /* xor.w${G} #${Imm-16-HI},[$Dst16An] */
12519 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
12520 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77160000 }
12522 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
12525 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12526 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77180000 }
12528 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12531 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12532 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x771a0000 }
12534 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12537 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12538 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x771b0000 }
12540 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
12543 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12544 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x771c0000 }
12546 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12549 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12550 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x771e0000 }
12552 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12555 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12556 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x771f0000 }
12558 /* xor.b${G} #${Imm-16-QI},$Dst16RnQI */
12561 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
12562 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x761000 }
12564 /* xor.b${G} #${Imm-16-QI},$Dst16AnQI */
12567 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
12568 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x761400 }
12570 /* xor.b${G} #${Imm-16-QI},[$Dst16An] */
12573 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
12574 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x761600 }
12576 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
12579 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12580 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76180000 }
12582 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12585 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12586 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x761a0000 }
12588 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12591 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12592 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x761b0000 }
12594 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
12597 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12598 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x761c0000 }
12600 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12603 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12604 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x761e0000 }
12606 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12609 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12610 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x761f0000 }
12612 /* xchg.w r3,$Dst32RnUnprefixedHI */
12615 { { MNEM
, ' ', 'r', '3', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12616 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90d }
12618 /* xchg.w r3,$Dst32AnUnprefixedHI */
12621 { { MNEM
, ' ', 'r', '3', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12622 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18d }
12624 /* xchg.w r3,[$Dst32AnUnprefixed] */
12627 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12628 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10d }
12630 /* xchg.w r3,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12633 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12634 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30d00 }
12636 /* xchg.w r3,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12639 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12640 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50d0000 }
12642 /* xchg.w r3,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12645 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12646 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70d0000 }
12648 /* xchg.w r3,${Dsp-16-u8}[sb] */
12651 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12652 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38d00 }
12654 /* xchg.w r3,${Dsp-16-u16}[sb] */
12657 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12658 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58d0000 }
12660 /* xchg.w r3,${Dsp-16-s8}[fb] */
12663 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12664 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cd00 }
12666 /* xchg.w r3,${Dsp-16-s16}[fb] */
12669 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12670 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cd0000 }
12672 /* xchg.w r3,${Dsp-16-u16} */
12675 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
12676 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cd0000 }
12678 /* xchg.w r3,${Dsp-16-u24} */
12681 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), 0 } },
12682 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78d0000 }
12684 /* xchg.w r2,$Dst32RnUnprefixedHI */
12687 { { MNEM
, ' ', 'r', '2', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12688 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90c }
12690 /* xchg.w r2,$Dst32AnUnprefixedHI */
12693 { { MNEM
, ' ', 'r', '2', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12694 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18c }
12696 /* xchg.w r2,[$Dst32AnUnprefixed] */
12699 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12700 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10c }
12702 /* xchg.w r2,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12705 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12706 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30c00 }
12708 /* xchg.w r2,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12711 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12712 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50c0000 }
12714 /* xchg.w r2,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12717 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12718 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70c0000 }
12720 /* xchg.w r2,${Dsp-16-u8}[sb] */
12723 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12724 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38c00 }
12726 /* xchg.w r2,${Dsp-16-u16}[sb] */
12729 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12730 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58c0000 }
12732 /* xchg.w r2,${Dsp-16-s8}[fb] */
12735 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12736 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cc00 }
12738 /* xchg.w r2,${Dsp-16-s16}[fb] */
12741 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12742 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cc0000 }
12744 /* xchg.w r2,${Dsp-16-u16} */
12747 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
12748 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cc0000 }
12750 /* xchg.w r2,${Dsp-16-u24} */
12753 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), 0 } },
12754 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78c0000 }
12756 /* xchg.w a1,$Dst32RnUnprefixedHI */
12759 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12760 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90b }
12762 /* xchg.w a1,$Dst32AnUnprefixedHI */
12765 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12766 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18b }
12768 /* xchg.w a1,[$Dst32AnUnprefixed] */
12771 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12772 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10b }
12774 /* xchg.w a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12777 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12778 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30b00 }
12780 /* xchg.w a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12783 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12784 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50b0000 }
12786 /* xchg.w a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12789 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12790 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70b0000 }
12792 /* xchg.w a1,${Dsp-16-u8}[sb] */
12795 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12796 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38b00 }
12798 /* xchg.w a1,${Dsp-16-u16}[sb] */
12801 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12802 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58b0000 }
12804 /* xchg.w a1,${Dsp-16-s8}[fb] */
12807 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12808 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cb00 }
12810 /* xchg.w a1,${Dsp-16-s16}[fb] */
12813 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12814 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cb0000 }
12816 /* xchg.w a1,${Dsp-16-u16} */
12819 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
12820 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cb0000 }
12822 /* xchg.w a1,${Dsp-16-u24} */
12825 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
12826 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78b0000 }
12828 /* xchg.w a0,$Dst32RnUnprefixedHI */
12831 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12832 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90a }
12834 /* xchg.w a0,$Dst32AnUnprefixedHI */
12837 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12838 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18a }
12840 /* xchg.w a0,[$Dst32AnUnprefixed] */
12843 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12844 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10a }
12846 /* xchg.w a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12849 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12850 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30a00 }
12852 /* xchg.w a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12855 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12856 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50a0000 }
12858 /* xchg.w a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12861 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12862 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70a0000 }
12864 /* xchg.w a0,${Dsp-16-u8}[sb] */
12867 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12868 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38a00 }
12870 /* xchg.w a0,${Dsp-16-u16}[sb] */
12873 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12874 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58a0000 }
12876 /* xchg.w a0,${Dsp-16-s8}[fb] */
12879 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12880 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3ca00 }
12882 /* xchg.w a0,${Dsp-16-s16}[fb] */
12885 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12886 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5ca0000 }
12888 /* xchg.w a0,${Dsp-16-u16} */
12891 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
12892 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7ca0000 }
12894 /* xchg.w a0,${Dsp-16-u24} */
12897 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
12898 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78a0000 }
12900 /* xchg.w r1,$Dst32RnUnprefixedHI */
12903 { { MNEM
, ' ', 'r', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12904 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd909 }
12906 /* xchg.w r1,$Dst32AnUnprefixedHI */
12909 { { MNEM
, ' ', 'r', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12910 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd189 }
12912 /* xchg.w r1,[$Dst32AnUnprefixed] */
12915 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12916 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd109 }
12918 /* xchg.w r1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12921 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12922 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30900 }
12924 /* xchg.w r1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12927 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12928 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5090000 }
12930 /* xchg.w r1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12933 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12934 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7090000 }
12936 /* xchg.w r1,${Dsp-16-u8}[sb] */
12939 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12940 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38900 }
12942 /* xchg.w r1,${Dsp-16-u16}[sb] */
12945 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12946 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5890000 }
12948 /* xchg.w r1,${Dsp-16-s8}[fb] */
12951 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12952 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c900 }
12954 /* xchg.w r1,${Dsp-16-s16}[fb] */
12957 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12958 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c90000 }
12960 /* xchg.w r1,${Dsp-16-u16} */
12963 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
12964 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c90000 }
12966 /* xchg.w r1,${Dsp-16-u24} */
12969 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), 0 } },
12970 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7890000 }
12972 /* xchg.w r0,$Dst32RnUnprefixedHI */
12975 { { MNEM
, ' ', 'r', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12976 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd908 }
12978 /* xchg.w r0,$Dst32AnUnprefixedHI */
12981 { { MNEM
, ' ', 'r', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12982 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd188 }
12984 /* xchg.w r0,[$Dst32AnUnprefixed] */
12987 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12988 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd108 }
12990 /* xchg.w r0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12993 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12994 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30800 }
12996 /* xchg.w r0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12999 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13000 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5080000 }
13002 /* xchg.w r0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13005 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13006 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7080000 }
13008 /* xchg.w r0,${Dsp-16-u8}[sb] */
13011 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13012 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38800 }
13014 /* xchg.w r0,${Dsp-16-u16}[sb] */
13017 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13018 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5880000 }
13020 /* xchg.w r0,${Dsp-16-s8}[fb] */
13023 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13024 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c800 }
13026 /* xchg.w r0,${Dsp-16-s16}[fb] */
13029 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13030 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c80000 }
13032 /* xchg.w r0,${Dsp-16-u16} */
13035 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13036 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c80000 }
13038 /* xchg.w r0,${Dsp-16-u24} */
13041 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), 0 } },
13042 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7880000 }
13044 /* xchg.b r1h,$Dst32RnUnprefixedQI */
13047 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13048 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80d }
13050 /* xchg.b r1h,$Dst32AnUnprefixedQI */
13053 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13054 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08d }
13056 /* xchg.b r1h,[$Dst32AnUnprefixed] */
13059 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13060 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00d }
13062 /* xchg.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13065 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13066 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20d00 }
13068 /* xchg.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13071 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13072 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40d0000 }
13074 /* xchg.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13077 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13078 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60d0000 }
13080 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13083 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13084 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28d00 }
13086 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13089 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13090 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48d0000 }
13092 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13095 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13096 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cd00 }
13098 /* xchg.b r1h,${Dsp-16-s16}[fb] */
13101 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13102 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cd0000 }
13104 /* xchg.b r1h,${Dsp-16-u16} */
13107 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13108 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cd0000 }
13110 /* xchg.b r1h,${Dsp-16-u24} */
13113 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
13114 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68d0000 }
13116 /* xchg.b r0h,$Dst32RnUnprefixedQI */
13119 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13120 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80c }
13122 /* xchg.b r0h,$Dst32AnUnprefixedQI */
13125 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13126 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08c }
13128 /* xchg.b r0h,[$Dst32AnUnprefixed] */
13131 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13132 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00c }
13134 /* xchg.b r0h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13137 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13138 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20c00 }
13140 /* xchg.b r0h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13143 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13144 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40c0000 }
13146 /* xchg.b r0h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13149 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13150 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60c0000 }
13152 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13155 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13156 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28c00 }
13158 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13161 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13162 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48c0000 }
13164 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13167 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13168 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cc00 }
13170 /* xchg.b r0h,${Dsp-16-s16}[fb] */
13173 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13174 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cc0000 }
13176 /* xchg.b r0h,${Dsp-16-u16} */
13179 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13180 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cc0000 }
13182 /* xchg.b r0h,${Dsp-16-u24} */
13185 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), 0 } },
13186 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68c0000 }
13188 /* xchg.b a1,$Dst32RnUnprefixedQI */
13191 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13192 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80b }
13194 /* xchg.b a1,$Dst32AnUnprefixedQI */
13197 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13198 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08b }
13200 /* xchg.b a1,[$Dst32AnUnprefixed] */
13203 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13204 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00b }
13206 /* xchg.b a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13209 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13210 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20b00 }
13212 /* xchg.b a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13215 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13216 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40b0000 }
13218 /* xchg.b a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13221 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13222 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60b0000 }
13224 /* xchg.b a1,${Dsp-16-u8}[sb] */
13227 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13228 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28b00 }
13230 /* xchg.b a1,${Dsp-16-u16}[sb] */
13233 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13234 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48b0000 }
13236 /* xchg.b a1,${Dsp-16-s8}[fb] */
13239 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13240 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cb00 }
13242 /* xchg.b a1,${Dsp-16-s16}[fb] */
13245 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13246 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cb0000 }
13248 /* xchg.b a1,${Dsp-16-u16} */
13251 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
13252 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cb0000 }
13254 /* xchg.b a1,${Dsp-16-u24} */
13257 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
13258 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68b0000 }
13260 /* xchg.b a0,$Dst32RnUnprefixedQI */
13263 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13264 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80a }
13266 /* xchg.b a0,$Dst32AnUnprefixedQI */
13269 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13270 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08a }
13272 /* xchg.b a0,[$Dst32AnUnprefixed] */
13275 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13276 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00a }
13278 /* xchg.b a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13281 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13282 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20a00 }
13284 /* xchg.b a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13287 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13288 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40a0000 }
13290 /* xchg.b a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13293 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13294 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60a0000 }
13296 /* xchg.b a0,${Dsp-16-u8}[sb] */
13299 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13300 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28a00 }
13302 /* xchg.b a0,${Dsp-16-u16}[sb] */
13305 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13306 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48a0000 }
13308 /* xchg.b a0,${Dsp-16-s8}[fb] */
13311 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13312 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2ca00 }
13314 /* xchg.b a0,${Dsp-16-s16}[fb] */
13317 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13318 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4ca0000 }
13320 /* xchg.b a0,${Dsp-16-u16} */
13323 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
13324 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6ca0000 }
13326 /* xchg.b a0,${Dsp-16-u24} */
13329 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
13330 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68a0000 }
13332 /* xchg.b r1l,$Dst32RnUnprefixedQI */
13335 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13336 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd809 }
13338 /* xchg.b r1l,$Dst32AnUnprefixedQI */
13341 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13342 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd089 }
13344 /* xchg.b r1l,[$Dst32AnUnprefixed] */
13347 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13348 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd009 }
13350 /* xchg.b r1l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13353 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13354 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20900 }
13356 /* xchg.b r1l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13359 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13360 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4090000 }
13362 /* xchg.b r1l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13365 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13366 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6090000 }
13368 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13371 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13372 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28900 }
13374 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13377 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13378 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4890000 }
13380 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13383 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13384 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c900 }
13386 /* xchg.b r1l,${Dsp-16-s16}[fb] */
13389 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13390 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c90000 }
13392 /* xchg.b r1l,${Dsp-16-u16} */
13395 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13396 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c90000 }
13398 /* xchg.b r1l,${Dsp-16-u24} */
13401 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), 0 } },
13402 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6890000 }
13404 /* xchg.b r0l,$Dst32RnUnprefixedQI */
13407 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13408 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd808 }
13410 /* xchg.b r0l,$Dst32AnUnprefixedQI */
13413 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13414 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd088 }
13416 /* xchg.b r0l,[$Dst32AnUnprefixed] */
13419 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13420 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd008 }
13422 /* xchg.b r0l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13425 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13426 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20800 }
13428 /* xchg.b r0l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13431 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13432 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4080000 }
13434 /* xchg.b r0l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13437 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13438 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6080000 }
13440 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13443 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13444 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28800 }
13446 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13449 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13450 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4880000 }
13452 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13455 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13456 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c800 }
13458 /* xchg.b r0l,${Dsp-16-s16}[fb] */
13461 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13462 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c80000 }
13464 /* xchg.b r0l,${Dsp-16-u16} */
13467 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13468 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c80000 }
13470 /* xchg.b r0l,${Dsp-16-u24} */
13473 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), 0 } },
13474 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6880000 }
13476 /* xchg.w r3,$Dst16RnHI */
13479 { { MNEM
, ' ', 'r', '3', ',', OP (DST16RNHI
), 0 } },
13480 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b30 }
13482 /* xchg.w r3,$Dst16AnHI */
13485 { { MNEM
, ' ', 'r', '3', ',', OP (DST16ANHI
), 0 } },
13486 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b34 }
13488 /* xchg.w r3,[$Dst16An] */
13491 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST16AN
), ']', 0 } },
13492 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b36 }
13494 /* xchg.w r3,${Dsp-16-u8}[$Dst16An] */
13497 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13498 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b3800 }
13500 /* xchg.w r3,${Dsp-16-u16}[$Dst16An] */
13503 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13504 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b3c0000 }
13506 /* xchg.w r3,${Dsp-16-u8}[sb] */
13509 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13510 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b3a00 }
13512 /* xchg.w r3,${Dsp-16-u16}[sb] */
13515 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13516 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b3e0000 }
13518 /* xchg.w r3,${Dsp-16-s8}[fb] */
13521 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13522 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b3b00 }
13524 /* xchg.w r3,${Dsp-16-u16} */
13527 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
13528 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b3f0000 }
13530 /* xchg.w r2,$Dst16RnHI */
13533 { { MNEM
, ' ', 'r', '2', ',', OP (DST16RNHI
), 0 } },
13534 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b20 }
13536 /* xchg.w r2,$Dst16AnHI */
13539 { { MNEM
, ' ', 'r', '2', ',', OP (DST16ANHI
), 0 } },
13540 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b24 }
13542 /* xchg.w r2,[$Dst16An] */
13545 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST16AN
), ']', 0 } },
13546 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b26 }
13548 /* xchg.w r2,${Dsp-16-u8}[$Dst16An] */
13551 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13552 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b2800 }
13554 /* xchg.w r2,${Dsp-16-u16}[$Dst16An] */
13557 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13558 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b2c0000 }
13560 /* xchg.w r2,${Dsp-16-u8}[sb] */
13563 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13564 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b2a00 }
13566 /* xchg.w r2,${Dsp-16-u16}[sb] */
13569 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13570 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b2e0000 }
13572 /* xchg.w r2,${Dsp-16-s8}[fb] */
13575 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13576 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b2b00 }
13578 /* xchg.w r2,${Dsp-16-u16} */
13581 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
13582 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b2f0000 }
13584 /* xchg.w r1,$Dst16RnHI */
13587 { { MNEM
, ' ', 'r', '1', ',', OP (DST16RNHI
), 0 } },
13588 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b10 }
13590 /* xchg.w r1,$Dst16AnHI */
13593 { { MNEM
, ' ', 'r', '1', ',', OP (DST16ANHI
), 0 } },
13594 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b14 }
13596 /* xchg.w r1,[$Dst16An] */
13599 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST16AN
), ']', 0 } },
13600 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b16 }
13602 /* xchg.w r1,${Dsp-16-u8}[$Dst16An] */
13605 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13606 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b1800 }
13608 /* xchg.w r1,${Dsp-16-u16}[$Dst16An] */
13611 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13612 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b1c0000 }
13614 /* xchg.w r1,${Dsp-16-u8}[sb] */
13617 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13618 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b1a00 }
13620 /* xchg.w r1,${Dsp-16-u16}[sb] */
13623 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13624 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b1e0000 }
13626 /* xchg.w r1,${Dsp-16-s8}[fb] */
13629 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13630 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b1b00 }
13632 /* xchg.w r1,${Dsp-16-u16} */
13635 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
13636 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b1f0000 }
13638 /* xchg.w r0,$Dst16RnHI */
13641 { { MNEM
, ' ', 'r', '0', ',', OP (DST16RNHI
), 0 } },
13642 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b00 }
13644 /* xchg.w r0,$Dst16AnHI */
13647 { { MNEM
, ' ', 'r', '0', ',', OP (DST16ANHI
), 0 } },
13648 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b04 }
13650 /* xchg.w r0,[$Dst16An] */
13653 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST16AN
), ']', 0 } },
13654 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b06 }
13656 /* xchg.w r0,${Dsp-16-u8}[$Dst16An] */
13659 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13660 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b0800 }
13662 /* xchg.w r0,${Dsp-16-u16}[$Dst16An] */
13665 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13666 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b0c0000 }
13668 /* xchg.w r0,${Dsp-16-u8}[sb] */
13671 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13672 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b0a00 }
13674 /* xchg.w r0,${Dsp-16-u16}[sb] */
13677 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13678 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b0e0000 }
13680 /* xchg.w r0,${Dsp-16-s8}[fb] */
13683 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13684 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b0b00 }
13686 /* xchg.w r0,${Dsp-16-u16} */
13689 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13690 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b0f0000 }
13692 /* xchg.b r1h,$Dst16RnQI */
13695 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
13696 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a30 }
13698 /* xchg.b r1h,$Dst16AnQI */
13701 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
13702 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a34 }
13704 /* xchg.b r1h,[$Dst16An] */
13707 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13708 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a36 }
13710 /* xchg.b r1h,${Dsp-16-u8}[$Dst16An] */
13713 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13714 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a3800 }
13716 /* xchg.b r1h,${Dsp-16-u16}[$Dst16An] */
13719 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13720 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a3c0000 }
13722 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13725 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13726 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a3a00 }
13728 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13731 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13732 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a3e0000 }
13734 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13737 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13738 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a3b00 }
13740 /* xchg.b r1h,${Dsp-16-u16} */
13743 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13744 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a3f0000 }
13746 /* xchg.b r1l,$Dst16RnQI */
13749 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16RNQI
), 0 } },
13750 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a20 }
13752 /* xchg.b r1l,$Dst16AnQI */
13755 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16ANQI
), 0 } },
13756 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a24 }
13758 /* xchg.b r1l,[$Dst16An] */
13761 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13762 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a26 }
13764 /* xchg.b r1l,${Dsp-16-u8}[$Dst16An] */
13767 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13768 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a2800 }
13770 /* xchg.b r1l,${Dsp-16-u16}[$Dst16An] */
13773 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13774 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a2c0000 }
13776 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13779 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13780 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a2a00 }
13782 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13785 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13786 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a2e0000 }
13788 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13791 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13792 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a2b00 }
13794 /* xchg.b r1l,${Dsp-16-u16} */
13797 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13798 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a2f0000 }
13800 /* xchg.b r0h,$Dst16RnQI */
13803 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16RNQI
), 0 } },
13804 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a10 }
13806 /* xchg.b r0h,$Dst16AnQI */
13809 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16ANQI
), 0 } },
13810 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a14 }
13812 /* xchg.b r0h,[$Dst16An] */
13815 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13816 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a16 }
13818 /* xchg.b r0h,${Dsp-16-u8}[$Dst16An] */
13821 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13822 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a1800 }
13824 /* xchg.b r0h,${Dsp-16-u16}[$Dst16An] */
13827 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13828 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a1c0000 }
13830 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13833 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13834 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a1a00 }
13836 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13839 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13840 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a1e0000 }
13842 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13845 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13846 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a1b00 }
13848 /* xchg.b r0h,${Dsp-16-u16} */
13851 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13852 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a1f0000 }
13854 /* xchg.b r0l,$Dst16RnQI */
13857 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
13858 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a00 }
13860 /* xchg.b r0l,$Dst16AnQI */
13863 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
13864 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a04 }
13866 /* xchg.b r0l,[$Dst16An] */
13869 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13870 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a06 }
13872 /* xchg.b r0l,${Dsp-16-u8}[$Dst16An] */
13875 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13876 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a0800 }
13878 /* xchg.b r0l,${Dsp-16-u16}[$Dst16An] */
13881 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13882 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a0c0000 }
13884 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13887 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13888 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a0a00 }
13890 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13893 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13894 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a0e0000 }
13896 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13899 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13900 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a0b00 }
13902 /* xchg.b r0l,${Dsp-16-u16} */
13905 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13906 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a0f0000 }
13908 /* tst.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
13911 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13912 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2d000000 }
13914 /* tst.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
13917 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13918 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3d000000 }
13920 /* tst.w${S} #${Imm-24-HI},${Dsp-8-u16} */
13923 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
13924 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1d000000 }
13926 /* tst.w${S} #${Imm-8-HI},r0 */
13929 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
13930 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xd0000 }
13932 /* tst.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
13935 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13936 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2c0000 }
13938 /* tst.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
13941 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13942 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3c0000 }
13944 /* tst.b${S} #${Imm-24-QI},${Dsp-8-u16} */
13947 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
13948 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1c000000 }
13950 /* tst.b${S} #${Imm-8-QI},r0l */
13953 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
13954 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xc00 }
13956 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
13959 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13960 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990900 }
13962 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
13965 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13966 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992900 }
13968 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
13971 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13972 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993900 }
13974 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
13977 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13978 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918900 }
13980 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
13983 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13984 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a900 }
13986 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
13989 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13990 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b900 }
13992 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
13995 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
13996 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910900 }
13998 /* tst.w${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14001 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14002 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912900 }
14004 /* tst.w${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14007 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14008 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913900 }
14010 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14013 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14014 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930900 }
14016 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14019 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14020 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932900 }
14022 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14025 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14026 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933900 }
14028 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14031 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14032 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950900 }
14034 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14037 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14038 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952900 }
14040 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14043 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14044 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953900 }
14046 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14049 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14050 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970900 }
14052 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14055 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14056 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972900 }
14058 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14061 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14062 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973900 }
14064 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14067 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14068 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938900 }
14070 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14073 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14074 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a900 }
14076 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14079 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14080 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b900 }
14082 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14085 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14086 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958900 }
14088 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14091 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14092 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a900 }
14094 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14097 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14098 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b900 }
14100 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14103 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14104 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c900 }
14106 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14109 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14110 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e900 }
14112 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14115 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14116 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f900 }
14118 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14121 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14122 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c900 }
14124 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
14127 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14128 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e900 }
14130 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
14133 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14134 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f900 }
14136 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
14139 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
14140 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c900 }
14142 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
14145 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14146 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e900 }
14148 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
14151 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14152 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f900 }
14154 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
14157 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
14158 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978900 }
14160 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
14163 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14164 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a900 }
14166 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
14169 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14170 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b900 }
14172 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14175 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14176 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90900 }
14178 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
14181 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14182 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92900 }
14184 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
14187 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14188 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93900 }
14190 /* tst.w${G} ${Dsp-24-u16},$Dst32RnPrefixedHI */
14193 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14194 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93900 }
14196 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14199 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14200 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18900 }
14202 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
14205 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14206 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a900 }
14208 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
14211 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14212 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b900 }
14214 /* tst.w${G} ${Dsp-24-u16},$Dst32AnPrefixedHI */
14217 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14218 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b900 }
14220 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14223 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14224 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10900 }
14226 /* tst.w${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
14229 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14230 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12900 }
14232 /* tst.w${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
14235 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14236 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13900 }
14238 /* tst.w${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
14241 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14242 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13900 }
14244 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
14247 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14248 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30900 }
14250 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14253 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14254 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32900 }
14256 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14259 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14260 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33900 }
14262 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
14265 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14266 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33900 }
14268 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
14271 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14272 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50900 }
14274 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14277 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14278 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52900 }
14280 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14283 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14284 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53900 }
14286 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
14289 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14290 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53900 }
14292 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
14295 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14296 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70900 }
14298 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14301 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14302 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72900 }
14304 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14307 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14308 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73900 }
14310 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
14313 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14314 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73900 }
14316 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
14319 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14320 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38900 }
14322 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
14325 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14326 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a900 }
14328 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
14331 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14332 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b900 }
14334 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
14337 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14338 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b900 }
14340 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
14343 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14344 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58900 }
14346 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
14349 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14350 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a900 }
14352 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
14355 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14356 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b900 }
14358 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
14361 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14362 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b900 }
14364 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
14367 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14368 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c900 }
14370 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
14373 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14374 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e900 }
14376 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
14379 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14380 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f900 }
14382 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
14385 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14386 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f900 }
14388 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
14391 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14392 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c900 }
14394 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
14397 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14398 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e900 }
14400 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
14403 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14404 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f900 }
14406 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
14409 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14410 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f900 }
14412 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
14415 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
14416 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c900 }
14418 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
14421 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14422 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e900 }
14424 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
14427 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14428 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f900 }
14430 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16} */
14433 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
14434 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f900 }
14436 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
14439 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
14440 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78900 }
14442 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
14445 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14446 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a900 }
14448 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
14451 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14452 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b900 }
14454 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24} */
14457 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
14458 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b900 }
14460 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14463 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14464 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90900 }
14466 /* tst.w${G} ${Dsp-24-u24},$Dst32RnPrefixedHI */
14469 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14470 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92900 }
14472 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14475 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14476 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18900 }
14478 /* tst.w${G} ${Dsp-24-u24},$Dst32AnPrefixedHI */
14481 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14482 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a900 }
14484 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14487 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14488 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10900 }
14490 /* tst.w${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
14493 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14494 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12900 }
14496 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
14499 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14500 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30900 }
14502 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
14505 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14506 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32900 }
14508 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
14511 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14512 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50900 }
14514 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
14517 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14518 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52900 }
14520 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
14523 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14524 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70900 }
14526 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
14529 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14530 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72900 }
14532 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
14535 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14536 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38900 }
14538 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
14541 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14542 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a900 }
14544 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
14547 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14548 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58900 }
14550 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
14553 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14554 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a900 }
14556 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
14559 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14560 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c900 }
14562 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
14565 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14566 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e900 }
14568 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
14571 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14572 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c900 }
14574 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
14577 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14578 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e900 }
14580 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
14583 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
14584 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c900 }
14586 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16} */
14589 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
14590 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e900 }
14592 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
14595 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
14596 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78900 }
14598 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24} */
14601 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
14602 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a900 }
14604 /* tst.w${G} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
14607 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14608 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c909 }
14610 /* tst.w${G} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
14613 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14614 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18929 }
14616 /* tst.w${G} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
14619 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14620 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18909 }
14622 /* tst.w${G} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
14625 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14626 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c189 }
14628 /* tst.w${G} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
14631 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14632 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a9 }
14634 /* tst.w${G} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
14637 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14638 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18189 }
14640 /* tst.w${G} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
14643 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14644 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c109 }
14646 /* tst.w${G} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
14649 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14650 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18129 }
14652 /* tst.w${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
14655 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14656 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18109 }
14658 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14661 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14662 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30900 }
14664 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14667 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14668 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832900 }
14670 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
14673 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14674 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830900 }
14676 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14679 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14680 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50900 }
14682 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14685 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14686 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852900 }
14688 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
14691 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14692 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850900 }
14694 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14697 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14698 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70900 }
14700 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14703 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14704 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872900 }
14706 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
14709 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14710 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870900 }
14712 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
14715 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14716 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38900 }
14718 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
14721 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14722 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a900 }
14724 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
14727 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14728 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838900 }
14730 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
14733 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14734 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58900 }
14736 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
14739 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14740 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a900 }
14742 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
14745 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14746 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858900 }
14748 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
14751 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14752 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c900 }
14754 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
14757 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14758 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e900 }
14760 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
14763 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14764 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c900 }
14766 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
14769 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14770 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c900 }
14772 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
14775 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14776 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e900 }
14778 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
14781 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14782 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c900 }
14784 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16} */
14787 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14788 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c900 }
14790 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16} */
14793 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14794 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e900 }
14796 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16} */
14799 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
14800 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c900 }
14802 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24} */
14805 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14806 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78900 }
14808 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24} */
14811 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14812 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a900 }
14814 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24} */
14817 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
14818 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878900 }
14820 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
14823 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14824 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980900 }
14826 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
14829 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14830 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982900 }
14832 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
14835 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14836 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983900 }
14838 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
14841 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14842 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908900 }
14844 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
14847 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14848 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a900 }
14850 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
14853 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14854 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b900 }
14856 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14859 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14860 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900900 }
14862 /* tst.b${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14865 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14866 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902900 }
14868 /* tst.b${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14871 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14872 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903900 }
14874 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14877 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14878 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920900 }
14880 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14883 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14884 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922900 }
14886 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14889 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14890 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923900 }
14892 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14895 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14896 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940900 }
14898 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14901 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14902 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942900 }
14904 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14907 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14908 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943900 }
14910 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14913 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14914 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960900 }
14916 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14919 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14920 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962900 }
14922 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14925 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14926 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963900 }
14928 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14931 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14932 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928900 }
14934 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14937 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14938 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a900 }
14940 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14943 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14944 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b900 }
14946 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14949 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14950 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948900 }
14952 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14955 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14956 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a900 }
14958 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14961 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14962 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b900 }
14964 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14967 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14968 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c900 }
14970 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14973 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14974 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e900 }
14976 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14979 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14980 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f900 }
14982 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14985 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14986 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c900 }
14988 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
14991 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14992 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e900 }
14994 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
14997 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14998 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f900 }
15000 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
15003 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
15004 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c900 }
15006 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
15009 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15010 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e900 }
15012 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
15015 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15016 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f900 }
15018 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
15021 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
15022 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968900 }
15024 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
15027 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15028 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a900 }
15030 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
15033 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15034 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b900 }
15036 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15039 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15040 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80900 }
15042 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
15045 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15046 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82900 }
15048 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
15051 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15052 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83900 }
15054 /* tst.b${G} ${Dsp-24-u16},$Dst32RnPrefixedQI */
15057 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15058 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83900 }
15060 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15063 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15064 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08900 }
15066 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
15069 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15070 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a900 }
15072 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
15075 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15076 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b900 }
15078 /* tst.b${G} ${Dsp-24-u16},$Dst32AnPrefixedQI */
15081 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15082 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b900 }
15084 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15087 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15088 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00900 }
15090 /* tst.b${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
15093 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15094 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02900 }
15096 /* tst.b${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
15099 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15100 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03900 }
15102 /* tst.b${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
15105 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15106 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03900 }
15108 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
15111 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15112 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20900 }
15114 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15117 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15118 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22900 }
15120 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15123 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15124 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23900 }
15126 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
15129 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15130 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23900 }
15132 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
15135 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15136 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40900 }
15138 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15141 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15142 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42900 }
15144 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15147 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15148 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43900 }
15150 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
15153 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15154 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43900 }
15156 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
15159 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15160 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60900 }
15162 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15165 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15166 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62900 }
15168 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15171 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15172 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63900 }
15174 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
15177 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15178 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63900 }
15180 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
15183 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15184 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28900 }
15186 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
15189 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15190 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a900 }
15192 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
15195 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15196 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b900 }
15198 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
15201 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15202 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b900 }
15204 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
15207 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15208 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48900 }
15210 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
15213 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15214 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a900 }
15216 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
15219 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15220 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b900 }
15222 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
15225 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15226 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b900 }
15228 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
15231 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15232 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c900 }
15234 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
15237 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15238 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e900 }
15240 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
15243 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15244 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f900 }
15246 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
15249 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15250 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f900 }
15252 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
15255 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15256 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c900 }
15258 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
15261 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15262 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e900 }
15264 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
15267 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15268 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f900 }
15270 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
15273 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15274 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f900 }
15276 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
15279 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
15280 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c900 }
15282 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
15285 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15286 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e900 }
15288 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
15291 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15292 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f900 }
15294 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16} */
15297 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
15298 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f900 }
15300 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
15303 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
15304 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68900 }
15306 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
15309 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15310 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a900 }
15312 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
15315 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15316 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b900 }
15318 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24} */
15321 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
15322 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b900 }
15324 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15327 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15328 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80900 }
15330 /* tst.b${G} ${Dsp-24-u24},$Dst32RnPrefixedQI */
15333 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15334 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82900 }
15336 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15339 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15340 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08900 }
15342 /* tst.b${G} ${Dsp-24-u24},$Dst32AnPrefixedQI */
15345 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15346 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a900 }
15348 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15351 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15352 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00900 }
15354 /* tst.b${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
15357 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15358 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02900 }
15360 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
15363 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15364 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20900 }
15366 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
15369 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15370 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22900 }
15372 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
15375 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15376 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40900 }
15378 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
15381 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15382 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42900 }
15384 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
15387 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15388 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60900 }
15390 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
15393 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15394 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62900 }
15396 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
15399 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15400 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28900 }
15402 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
15405 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15406 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a900 }
15408 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
15411 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15412 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48900 }
15414 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
15417 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15418 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a900 }
15420 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
15423 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15424 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c900 }
15426 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
15429 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15430 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e900 }
15432 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
15435 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15436 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c900 }
15438 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
15441 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15442 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e900 }
15444 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
15447 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
15448 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c900 }
15450 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16} */
15453 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
15454 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e900 }
15456 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
15459 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
15460 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68900 }
15462 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24} */
15465 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
15466 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a900 }
15468 /* tst.b${G} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
15471 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15472 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c809 }
15474 /* tst.b${G} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
15477 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15478 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18829 }
15480 /* tst.b${G} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
15483 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15484 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18809 }
15486 /* tst.b${G} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
15489 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15490 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c089 }
15492 /* tst.b${G} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
15495 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15496 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a9 }
15498 /* tst.b${G} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
15501 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15502 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18089 }
15504 /* tst.b${G} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
15507 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15508 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c009 }
15510 /* tst.b${G} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
15513 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15514 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18029 }
15516 /* tst.b${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
15519 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15520 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18009 }
15522 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15525 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15526 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20900 }
15528 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15531 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15532 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822900 }
15534 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
15537 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15538 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820900 }
15540 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15543 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15544 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40900 }
15546 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15549 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15550 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842900 }
15552 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
15555 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15556 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840900 }
15558 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15561 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15562 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60900 }
15564 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15567 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15568 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862900 }
15570 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
15573 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15574 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860900 }
15576 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
15579 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15580 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28900 }
15582 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
15585 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15586 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a900 }
15588 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
15591 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15592 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828900 }
15594 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
15597 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15598 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48900 }
15600 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
15603 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15604 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a900 }
15606 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
15609 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15610 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848900 }
15612 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
15615 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15616 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c900 }
15618 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
15621 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15622 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e900 }
15624 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
15627 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15628 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c900 }
15630 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
15633 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15634 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c900 }
15636 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
15639 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15640 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e900 }
15642 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
15645 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15646 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c900 }
15648 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16} */
15651 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15652 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c900 }
15654 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16} */
15657 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15658 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e900 }
15660 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16} */
15663 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
15664 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c900 }
15666 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24} */
15669 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15670 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68900 }
15672 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24} */
15675 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15676 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a900 }
15678 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24} */
15681 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
15682 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868900 }
15684 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
15687 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15688 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x818000 }
15690 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
15693 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15694 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81a000 }
15696 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
15699 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15700 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x81b000 }
15702 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
15705 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15706 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x818400 }
15708 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
15711 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15712 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x81a400 }
15714 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
15717 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15718 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x81b400 }
15720 /* tst.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
15723 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15724 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x818600 }
15726 /* tst.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
15729 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15730 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x81a600 }
15732 /* tst.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
15735 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15736 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x81b600 }
15738 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
15741 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15742 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x81880000 }
15744 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
15747 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15748 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81a80000 }
15750 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
15753 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15754 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81b80000 }
15756 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
15759 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15760 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x818c0000 }
15762 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
15765 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15766 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81ac0000 }
15768 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
15771 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15772 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81bc0000 }
15774 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
15777 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15778 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x818a0000 }
15780 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
15783 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15784 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81aa0000 }
15786 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
15789 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15790 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81ba0000 }
15792 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
15795 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15796 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x818e0000 }
15798 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
15801 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15802 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81ae0000 }
15804 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
15807 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15808 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81be0000 }
15810 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
15813 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15814 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x818b0000 }
15816 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
15819 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15820 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81ab0000 }
15822 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
15825 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15826 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81bb0000 }
15828 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
15831 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
15832 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x818f0000 }
15834 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
15837 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15838 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x81af0000 }
15840 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
15843 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15844 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x81bf0000 }
15846 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
15849 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15850 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x81c00000 }
15852 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
15855 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15856 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81e00000 }
15858 /* tst.w${X} ${Dsp-16-u16},$Dst16RnHI */
15861 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
15862 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x81f00000 }
15864 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
15867 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15868 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x81c40000 }
15870 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
15873 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15874 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x81e40000 }
15876 /* tst.w${X} ${Dsp-16-u16},$Dst16AnHI */
15879 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
15880 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x81f40000 }
15882 /* tst.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
15885 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15886 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x81c60000 }
15888 /* tst.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
15891 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15892 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x81e60000 }
15894 /* tst.w${X} ${Dsp-16-u16},[$Dst16An] */
15897 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
15898 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x81f60000 }
15900 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
15903 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15904 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x81c80000 }
15906 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
15909 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15910 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x81e80000 }
15912 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
15915 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15916 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x81f80000 }
15918 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
15921 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15922 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x81cc0000 }
15924 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
15927 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15928 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x81ec0000 }
15930 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
15933 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15934 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x81fc0000 }
15936 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
15939 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15940 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ca0000 }
15942 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
15945 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15946 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ea0000 }
15948 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
15951 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15952 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x81fa0000 }
15954 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
15957 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15958 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ce0000 }
15960 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
15963 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15964 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ee0000 }
15966 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
15969 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15970 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x81fe0000 }
15972 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
15975 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15976 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81cb0000 }
15978 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
15981 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15982 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81eb0000 }
15984 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
15987 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15988 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x81fb0000 }
15990 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
15993 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
15994 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x81cf0000 }
15996 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
15999 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16000 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x81ef0000 }
16002 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
16005 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16006 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x81ff0000 }
16008 /* tst.w${X} $Src16RnHI,$Dst16RnHI */
16011 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
16012 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8100 }
16014 /* tst.w${X} $Src16AnHI,$Dst16RnHI */
16017 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
16018 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8140 }
16020 /* tst.w${X} [$Src16An],$Dst16RnHI */
16023 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
16024 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8160 }
16026 /* tst.w${X} $Src16RnHI,$Dst16AnHI */
16029 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
16030 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8104 }
16032 /* tst.w${X} $Src16AnHI,$Dst16AnHI */
16035 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
16036 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8144 }
16038 /* tst.w${X} [$Src16An],$Dst16AnHI */
16041 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
16042 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8164 }
16044 /* tst.w${X} $Src16RnHI,[$Dst16An] */
16047 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16048 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8106 }
16050 /* tst.w${X} $Src16AnHI,[$Dst16An] */
16053 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16054 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8146 }
16056 /* tst.w${X} [$Src16An],[$Dst16An] */
16059 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16060 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8166 }
16062 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
16065 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16066 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x810800 }
16068 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
16071 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16072 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x814800 }
16074 /* tst.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16077 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16078 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x816800 }
16080 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
16083 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16084 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x810c0000 }
16086 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
16089 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16090 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x814c0000 }
16092 /* tst.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16095 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16096 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x816c0000 }
16098 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
16101 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16102 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x810a00 }
16104 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
16107 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16108 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x814a00 }
16110 /* tst.w${X} [$Src16An],${Dsp-16-u8}[sb] */
16113 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16114 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x816a00 }
16116 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
16119 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16120 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x810e0000 }
16122 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
16125 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16126 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x814e0000 }
16128 /* tst.w${X} [$Src16An],${Dsp-16-u16}[sb] */
16131 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16132 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x816e0000 }
16134 /* tst.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
16137 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16138 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x810b00 }
16140 /* tst.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
16143 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16144 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x814b00 }
16146 /* tst.w${X} [$Src16An],${Dsp-16-s8}[fb] */
16149 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16150 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x816b00 }
16152 /* tst.w${X} $Src16RnHI,${Dsp-16-u16} */
16155 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
16156 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x810f0000 }
16158 /* tst.w${X} $Src16AnHI,${Dsp-16-u16} */
16161 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
16162 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x814f0000 }
16164 /* tst.w${X} [$Src16An],${Dsp-16-u16} */
16167 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16168 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x816f0000 }
16170 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
16173 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16174 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x808000 }
16176 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
16179 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16180 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80a000 }
16182 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
16185 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16186 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x80b000 }
16188 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
16191 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16192 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x808400 }
16194 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
16197 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16198 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x80a400 }
16200 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
16203 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16204 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x80b400 }
16206 /* tst.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
16209 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16210 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x808600 }
16212 /* tst.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
16215 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16216 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x80a600 }
16218 /* tst.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
16221 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16222 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x80b600 }
16224 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
16227 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16228 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x80880000 }
16230 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
16233 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16234 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80a80000 }
16236 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
16239 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16240 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80b80000 }
16242 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
16245 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16246 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x808c0000 }
16248 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
16251 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16252 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80ac0000 }
16254 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
16257 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16258 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80bc0000 }
16260 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
16263 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16264 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x808a0000 }
16266 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
16269 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16270 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80aa0000 }
16272 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
16275 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16276 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80ba0000 }
16278 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
16281 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16282 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x808e0000 }
16284 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
16287 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16288 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80ae0000 }
16290 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
16293 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16294 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80be0000 }
16296 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
16299 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16300 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x808b0000 }
16302 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
16305 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16306 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80ab0000 }
16308 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
16311 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16312 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80bb0000 }
16314 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
16317 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
16318 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x808f0000 }
16320 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
16323 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16324 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x80af0000 }
16326 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
16329 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16330 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x80bf0000 }
16332 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
16335 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16336 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x80c00000 }
16338 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
16341 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16342 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80e00000 }
16344 /* tst.b${X} ${Dsp-16-u16},$Dst16RnQI */
16347 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
16348 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x80f00000 }
16350 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
16353 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16354 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x80c40000 }
16356 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
16359 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16360 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x80e40000 }
16362 /* tst.b${X} ${Dsp-16-u16},$Dst16AnQI */
16365 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
16366 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x80f40000 }
16368 /* tst.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
16371 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16372 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x80c60000 }
16374 /* tst.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
16377 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16378 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x80e60000 }
16380 /* tst.b${X} ${Dsp-16-u16},[$Dst16An] */
16383 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
16384 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x80f60000 }
16386 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
16389 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16390 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x80c80000 }
16392 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
16395 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16396 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x80e80000 }
16398 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
16401 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16402 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x80f80000 }
16404 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
16407 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16408 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x80cc0000 }
16410 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
16413 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16414 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x80ec0000 }
16416 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
16419 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16420 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x80fc0000 }
16422 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
16425 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16426 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ca0000 }
16428 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
16431 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16432 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ea0000 }
16434 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
16437 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16438 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x80fa0000 }
16440 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
16443 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16444 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ce0000 }
16446 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
16449 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16450 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ee0000 }
16452 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
16455 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16456 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x80fe0000 }
16458 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
16461 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16462 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80cb0000 }
16464 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
16467 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16468 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80eb0000 }
16470 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
16473 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16474 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x80fb0000 }
16476 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
16479 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
16480 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x80cf0000 }
16482 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
16485 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16486 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x80ef0000 }
16488 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
16491 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16492 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x80ff0000 }
16494 /* tst.b${X} $Src16RnQI,$Dst16RnQI */
16497 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
16498 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8000 }
16500 /* tst.b${X} $Src16AnQI,$Dst16RnQI */
16503 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
16504 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8040 }
16506 /* tst.b${X} [$Src16An],$Dst16RnQI */
16509 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16510 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8060 }
16512 /* tst.b${X} $Src16RnQI,$Dst16AnQI */
16515 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
16516 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8004 }
16518 /* tst.b${X} $Src16AnQI,$Dst16AnQI */
16521 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
16522 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8044 }
16524 /* tst.b${X} [$Src16An],$Dst16AnQI */
16527 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16528 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8064 }
16530 /* tst.b${X} $Src16RnQI,[$Dst16An] */
16533 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16534 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8006 }
16536 /* tst.b${X} $Src16AnQI,[$Dst16An] */
16539 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16540 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8046 }
16542 /* tst.b${X} [$Src16An],[$Dst16An] */
16545 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16546 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8066 }
16548 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
16551 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16552 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x800800 }
16554 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
16557 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16558 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x804800 }
16560 /* tst.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16563 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16564 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x806800 }
16566 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
16569 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16570 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x800c0000 }
16572 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
16575 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16576 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x804c0000 }
16578 /* tst.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16581 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16582 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x806c0000 }
16584 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
16587 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16588 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x800a00 }
16590 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
16593 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16594 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x804a00 }
16596 /* tst.b${X} [$Src16An],${Dsp-16-u8}[sb] */
16599 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16600 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x806a00 }
16602 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
16605 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16606 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x800e0000 }
16608 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
16611 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16612 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x804e0000 }
16614 /* tst.b${X} [$Src16An],${Dsp-16-u16}[sb] */
16617 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16618 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x806e0000 }
16620 /* tst.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
16623 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16624 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x800b00 }
16626 /* tst.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
16629 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16630 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x804b00 }
16632 /* tst.b${X} [$Src16An],${Dsp-16-s8}[fb] */
16635 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16636 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x806b00 }
16638 /* tst.b${X} $Src16RnQI,${Dsp-16-u16} */
16641 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
16642 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x800f0000 }
16644 /* tst.b${X} $Src16AnQI,${Dsp-16-u16} */
16647 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
16648 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x804f0000 }
16650 /* tst.b${X} [$Src16An],${Dsp-16-u16} */
16653 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16654 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x806f0000 }
16656 /* tst.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
16659 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
16660 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993e0000 }
16662 /* tst.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
16665 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
16666 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91be0000 }
16668 /* tst.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
16671 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16672 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913e0000 }
16674 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16677 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16678 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933e0000 }
16680 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16683 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16684 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93be0000 }
16686 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16689 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16690 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93fe0000 }
16692 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16695 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16696 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953e0000 }
16698 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16701 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16702 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95be0000 }
16704 /* tst.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
16707 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16708 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95fe0000 }
16710 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16713 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16714 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97fe0000 }
16716 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16719 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16720 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973e0000 }
16722 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24} */
16725 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
16726 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97be0000 }
16728 /* tst.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
16731 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
16732 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983e00 }
16734 /* tst.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
16737 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
16738 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90be00 }
16740 /* tst.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
16743 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16744 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903e00 }
16746 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16749 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16750 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923e0000 }
16752 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16755 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16756 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92be0000 }
16758 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16761 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16762 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92fe0000 }
16764 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16767 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16768 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943e0000 }
16770 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16773 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16774 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94be0000 }
16776 /* tst.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
16779 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16780 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94fe0000 }
16782 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16785 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16786 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96fe0000 }
16788 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16791 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16792 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963e0000 }
16794 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24} */
16797 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
16798 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96be0000 }
16800 /* tst.w${G} #${Imm-16-HI},$Dst16RnHI */
16803 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
16804 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77000000 }
16806 /* tst.w${G} #${Imm-16-HI},$Dst16AnHI */
16809 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
16810 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77040000 }
16812 /* tst.w${G} #${Imm-16-HI},[$Dst16An] */
16815 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
16816 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77060000 }
16818 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
16821 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16822 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77080000 }
16824 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16827 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16828 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x770a0000 }
16830 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16833 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16834 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x770b0000 }
16836 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
16839 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16840 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x770c0000 }
16842 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16845 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16846 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x770e0000 }
16848 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16851 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16852 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x770f0000 }
16854 /* tst.b${G} #${Imm-16-QI},$Dst16RnQI */
16857 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
16858 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x760000 }
16860 /* tst.b${G} #${Imm-16-QI},$Dst16AnQI */
16863 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
16864 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x760400 }
16866 /* tst.b${G} #${Imm-16-QI},[$Dst16An] */
16869 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
16870 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x760600 }
16872 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
16875 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16876 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76080000 }
16878 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16881 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16882 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x760a0000 }
16884 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16887 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16888 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x760b0000 }
16890 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
16893 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16894 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x760c0000 }
16896 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16899 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16900 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x760e0000 }
16902 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16905 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16906 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x760f0000 }
16908 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
16911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16912 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980000 }
16914 /* subx${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
16917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16918 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982000 }
16920 /* subx${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
16923 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16924 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983000 }
16926 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
16929 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16930 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908000 }
16932 /* subx${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
16935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16936 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a000 }
16938 /* subx${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
16941 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16942 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b000 }
16944 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
16947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16948 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900000 }
16950 /* subx${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
16953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16954 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902000 }
16956 /* subx${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
16959 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16960 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903000 }
16962 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16966 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92000000 }
16968 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16972 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92200000 }
16974 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16977 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16978 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92300000 }
16980 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16984 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94000000 }
16986 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16990 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94200000 }
16992 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16995 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16996 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94300000 }
16998 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17001 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17002 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96000000 }
17004 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17008 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96200000 }
17010 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17013 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17014 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96300000 }
17016 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
17019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17020 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92800000 }
17022 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
17025 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17026 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a00000 }
17028 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
17031 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17032 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b00000 }
17034 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
17037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17038 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94800000 }
17040 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
17043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17044 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a00000 }
17046 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
17049 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17050 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b00000 }
17052 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
17055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17056 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c00000 }
17058 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
17061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17062 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e00000 }
17064 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
17067 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17068 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f00000 }
17070 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
17073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17074 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c00000 }
17076 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
17079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17080 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e00000 }
17082 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
17085 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17086 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f00000 }
17088 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
17091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
17092 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c00000 }
17094 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
17097 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17098 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e00000 }
17100 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
17103 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17104 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f00000 }
17106 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
17109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
17110 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96800000 }
17112 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
17115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17116 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a00000 }
17118 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
17121 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17122 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b00000 }
17124 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17128 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8000000 }
17130 /* subx${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
17133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17134 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8200000 }
17136 /* subx${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
17139 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17140 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8300000 }
17142 /* subx${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
17145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17146 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8300000 }
17148 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17152 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0800000 }
17154 /* subx${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
17157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17158 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a00000 }
17160 /* subx${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
17163 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17164 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b00000 }
17166 /* subx${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
17169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17170 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b00000 }
17172 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17176 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0000000 }
17178 /* subx${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
17181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17182 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0200000 }
17184 /* subx${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
17187 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17188 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0300000 }
17190 /* subx${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
17193 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17194 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0300000 }
17196 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17200 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2000000 }
17202 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17206 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2200000 }
17208 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17211 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17212 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2300000 }
17214 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
17217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17218 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2300000 }
17220 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17224 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4000000 }
17226 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17229 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17230 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4200000 }
17232 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17235 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17236 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4300000 }
17238 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
17241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17242 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4300000 }
17244 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17248 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6000000 }
17250 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17254 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6200000 }
17256 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17259 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17260 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6300000 }
17262 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
17265 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17266 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6300000 }
17268 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
17271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17272 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2800000 }
17274 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
17277 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17278 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a00000 }
17280 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
17283 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17284 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b00000 }
17286 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
17289 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17290 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b00000 }
17292 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
17295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17296 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4800000 }
17298 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
17301 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17302 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a00000 }
17304 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
17307 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17308 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b00000 }
17310 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
17313 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17314 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b00000 }
17316 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
17319 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17320 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c00000 }
17322 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
17325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17326 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e00000 }
17328 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
17331 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17332 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f00000 }
17334 /* subx${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
17337 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17338 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f00000 }
17340 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
17343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17344 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c00000 }
17346 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
17349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17350 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e00000 }
17352 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
17355 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17356 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f00000 }
17358 /* subx${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
17361 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17362 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f00000 }
17364 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
17367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
17368 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c00000 }
17370 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
17373 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17374 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e00000 }
17376 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
17379 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17380 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f00000 }
17382 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16} */
17385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
17386 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f00000 }
17388 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
17391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
17392 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6800000 }
17394 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
17397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17398 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a00000 }
17400 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
17403 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17404 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b00000 }
17406 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24} */
17409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
17410 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b00000 }
17412 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17416 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8000000 }
17418 /* subx${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
17421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17422 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8200000 }
17424 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17428 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0800000 }
17430 /* subx${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
17433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17434 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a00000 }
17436 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17440 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0000000 }
17442 /* subx${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
17445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17446 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0200000 }
17448 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
17451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17452 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2000000 }
17454 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
17457 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17458 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2200000 }
17460 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
17463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17464 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4000000 }
17466 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
17469 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17470 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4200000 }
17472 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
17475 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17476 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6000000 }
17478 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
17481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17482 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6200000 }
17484 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
17487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17488 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2800000 }
17490 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
17493 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17494 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a00000 }
17496 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
17499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17500 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4800000 }
17502 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
17505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17506 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a00000 }
17508 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
17511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17512 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c00000 }
17514 /* subx${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
17517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17518 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e00000 }
17520 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
17523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17524 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c00000 }
17526 /* subx${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
17529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17530 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e00000 }
17532 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
17535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
17536 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c00000 }
17538 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16} */
17541 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
17542 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e00000 }
17544 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
17547 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
17548 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6800000 }
17550 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24} */
17553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
17554 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a00000 }
17556 /* subx${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
17559 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17560 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc800 }
17562 /* subx${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
17565 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17566 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8820 }
17568 /* subx${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17571 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17572 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8800 }
17574 /* subx${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
17577 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17578 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc080 }
17580 /* subx${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
17583 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17584 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a0 }
17586 /* subx${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17589 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17590 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8080 }
17592 /* subx${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
17595 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17596 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc000 }
17598 /* subx${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
17601 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17602 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8020 }
17604 /* subx${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17607 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17608 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8000 }
17610 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17613 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17614 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20000 }
17616 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17619 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17620 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822000 }
17622 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
17625 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17626 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820000 }
17628 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17631 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17632 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4000000 }
17634 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17637 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17638 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84200000 }
17640 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
17643 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17644 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84000000 }
17646 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17649 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17650 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6000000 }
17652 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17655 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17656 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86200000 }
17658 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
17661 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17662 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86000000 }
17664 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
17667 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17668 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28000 }
17670 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
17673 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17674 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a000 }
17676 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
17679 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17680 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828000 }
17682 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
17685 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17686 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4800000 }
17688 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
17691 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17692 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a00000 }
17694 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
17697 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17698 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84800000 }
17700 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
17703 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17704 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c000 }
17706 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
17709 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17710 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e000 }
17712 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
17715 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17716 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c000 }
17718 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
17721 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17722 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c00000 }
17724 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
17727 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17728 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e00000 }
17730 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
17733 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17734 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c00000 }
17736 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
17739 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17740 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c00000 }
17742 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
17745 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17746 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e00000 }
17748 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
17751 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
17752 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c00000 }
17754 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
17757 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17758 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6800000 }
17760 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
17763 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17764 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a00000 }
17766 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
17769 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
17770 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86800000 }
17772 /* subx${G} #${Imm-16-QI},$Dst32RnUnprefixedSI */
17775 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17776 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x981100 }
17778 /* subx${G} #${Imm-16-QI},$Dst32AnUnprefixedSI */
17781 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17782 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x909100 }
17784 /* subx${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
17787 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17788 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x901100 }
17790 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17793 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17794 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92110000 }
17796 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
17799 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17800 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92910000 }
17802 /* subx${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
17805 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17806 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92d10000 }
17808 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17811 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17812 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94110000 }
17814 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
17817 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17818 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94910000 }
17820 /* subx${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
17823 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17824 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94d10000 }
17826 /* subx${G} #${Imm-32-QI},${Dsp-16-u16} */
17829 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
17830 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96d10000 }
17832 /* subx${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17835 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17836 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96110000 }
17838 /* subx${G} #${Imm-40-QI},${Dsp-16-u24} */
17841 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
17842 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96910000 }
17844 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32RnUnprefixedHI */
17847 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
17848 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993f0000 }
17850 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32AnUnprefixedHI */
17853 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
17854 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91bf0000 }
17856 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},[$Dst32AnUnprefixed] */
17859 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17860 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913f0000 }
17862 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17865 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17866 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933f0000 }
17868 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[sb] */
17871 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17872 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93bf0000 }
17874 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-s8}[fb] */
17877 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17878 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ff0000 }
17880 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17883 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17884 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953f0000 }
17886 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[sb] */
17889 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17890 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95bf0000 }
17892 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-s16}[fb] */
17895 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17896 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ff0000 }
17898 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16} */
17901 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), 0 } },
17902 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ff0000 }
17904 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17907 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17908 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973f0000 }
17910 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24} */
17913 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), 0 } },
17914 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97bf0000 }
17916 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32RnUnprefixedQI */
17919 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
17920 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983f0000 }
17922 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32AnUnprefixedQI */
17925 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
17926 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90bf0000 }
17928 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},[$Dst32AnUnprefixed] */
17931 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17932 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903f0000 }
17934 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17937 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17938 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923f0000 }
17940 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[sb] */
17943 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17944 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92bf0000 }
17946 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-s8}[fb] */
17949 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17950 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ff0000 }
17952 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17955 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17956 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943f0000 }
17958 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[sb] */
17961 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17962 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94bf0000 }
17964 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-s16}[fb] */
17967 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17968 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ff0000 }
17970 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16} */
17973 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), 0 } },
17974 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ff0000 }
17976 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17979 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17980 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963f0000 }
17982 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24} */
17985 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), 0 } },
17986 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96bf0000 }
17988 /* stz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
17991 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
17992 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990f0000 }
17994 /* stz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
17997 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
17998 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918f0000 }
18000 /* stz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18003 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18004 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910f0000 }
18006 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18009 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18010 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930f0000 }
18012 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18015 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18016 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938f0000 }
18018 /* stz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18021 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18022 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93cf0000 }
18024 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18027 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18028 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950f0000 }
18030 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18033 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18034 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958f0000 }
18036 /* stz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18039 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18040 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95cf0000 }
18042 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18045 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18046 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97cf0000 }
18048 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18051 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18052 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970f0000 }
18054 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18057 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18058 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978f0000 }
18060 /* stz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18063 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18064 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980f00 }
18066 /* stz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18069 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18070 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908f00 }
18072 /* stz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18075 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18076 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900f00 }
18078 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18081 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18082 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920f0000 }
18084 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18087 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18088 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928f0000 }
18090 /* stz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18093 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18094 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92cf0000 }
18096 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18099 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18100 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940f0000 }
18102 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18105 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18106 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948f0000 }
18108 /* stz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18111 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18112 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94cf0000 }
18114 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18117 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18118 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96cf0000 }
18120 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18123 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18124 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960f0000 }
18126 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18129 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18130 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968f0000 }
18132 /* stz${S} #${Imm-8-QI},r0l */
18135 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18136 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xcc00 }
18138 /* stz${S} #${Imm-8-QI},r0h */
18141 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18142 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xcb00 }
18144 /* stz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18147 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18148 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xcd0000 }
18150 /* stz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18153 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18154 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xce0000 }
18156 /* stz${S} #${Imm-8-QI},${Dsp-16-u16} */
18159 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18160 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xcf000000 }
18162 /* stnz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
18165 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18166 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x991f0000 }
18168 /* stnz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
18171 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18172 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919f0000 }
18174 /* stnz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18177 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18178 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x911f0000 }
18180 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18183 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18184 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931f0000 }
18186 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18189 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18190 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939f0000 }
18192 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18195 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18196 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93df0000 }
18198 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18201 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18202 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951f0000 }
18204 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18207 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18208 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959f0000 }
18210 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18213 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18214 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95df0000 }
18216 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18219 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18220 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97df0000 }
18222 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18225 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18226 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971f0000 }
18228 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18231 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18232 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x979f0000 }
18234 /* stnz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18237 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18238 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x981f00 }
18240 /* stnz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18243 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18244 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x909f00 }
18246 /* stnz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18249 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18250 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x901f00 }
18252 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18255 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18256 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921f0000 }
18258 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18261 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18262 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929f0000 }
18264 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18267 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18268 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92df0000 }
18270 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18273 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18274 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941f0000 }
18276 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18279 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18280 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949f0000 }
18282 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18285 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18286 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94df0000 }
18288 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18291 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18292 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96df0000 }
18294 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18297 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18298 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961f0000 }
18300 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18303 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18304 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x969f0000 }
18306 /* stnz${S} #${Imm-8-QI},r0l */
18309 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18310 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xd400 }
18312 /* stnz${S} #${Imm-8-QI},r0h */
18315 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18316 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xd300 }
18318 /* stnz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18321 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18322 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xd50000 }
18324 /* stnz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18327 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18328 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xd60000 }
18330 /* stnz${S} #${Imm-8-QI},${Dsp-16-u16} */
18333 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18334 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xd7000000 }
18336 /* shlnc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18339 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18340 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x882100 }
18342 /* shlnc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18345 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18346 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80a100 }
18348 /* shlnc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18351 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18352 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x802100 }
18354 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18357 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18358 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82210000 }
18360 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18363 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18364 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a10000 }
18366 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18369 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18370 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e10000 }
18372 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18375 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18376 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84210000 }
18378 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18381 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18382 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a10000 }
18384 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18387 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18388 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e10000 }
18390 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18393 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18394 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e10000 }
18396 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18399 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18400 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86210000 }
18402 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18405 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18406 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a10000 }
18408 /* shl.l r1h,$Dst32RnUnprefixedSI */
18411 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18412 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc801 }
18414 /* shl.l r1h,$Dst32AnUnprefixedSI */
18417 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18418 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc081 }
18420 /* shl.l r1h,[$Dst32AnUnprefixed] */
18423 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18424 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc001 }
18426 /* shl.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18429 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18430 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20100 }
18432 /* shl.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18435 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18436 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4010000 }
18438 /* shl.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18441 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18442 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6010000 }
18444 /* shl.l r1h,${Dsp-16-u8}[sb] */
18447 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18448 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28100 }
18450 /* shl.l r1h,${Dsp-16-u16}[sb] */
18453 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18454 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4810000 }
18456 /* shl.l r1h,${Dsp-16-s8}[fb] */
18459 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18460 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c100 }
18462 /* shl.l r1h,${Dsp-16-s16}[fb] */
18465 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18466 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c10000 }
18468 /* shl.l r1h,${Dsp-16-u16} */
18471 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18472 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c10000 }
18474 /* shl.l r1h,${Dsp-16-u24} */
18477 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18478 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6810000 }
18480 /* shl.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18483 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18484 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x982100 }
18486 /* shl.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18489 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18490 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90a100 }
18492 /* shl.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18495 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18496 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x902100 }
18498 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18501 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18502 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92210000 }
18504 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18507 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18508 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92a10000 }
18510 /* shl.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18513 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18514 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92e10000 }
18516 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18519 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18520 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94210000 }
18522 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18525 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18526 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94a10000 }
18528 /* shl.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18531 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18532 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94e10000 }
18534 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18537 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18538 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96e10000 }
18540 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18543 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18544 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96210000 }
18546 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18549 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18550 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96a10000 }
18552 /* shl.w r1h,$Dst32RnUnprefixedHI */
18555 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18556 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93e }
18558 /* shl.w r1h,$Dst32AnUnprefixedHI */
18561 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18562 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1be }
18564 /* shl.w r1h,[$Dst32AnUnprefixed] */
18567 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18568 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13e }
18570 /* shl.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18573 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18574 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33e00 }
18576 /* shl.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18579 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18580 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53e0000 }
18582 /* shl.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18585 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18586 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73e0000 }
18588 /* shl.w r1h,${Dsp-16-u8}[sb] */
18591 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18592 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3be00 }
18594 /* shl.w r1h,${Dsp-16-u16}[sb] */
18597 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18598 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5be0000 }
18600 /* shl.w r1h,${Dsp-16-s8}[fb] */
18603 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18604 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3fe00 }
18606 /* shl.w r1h,${Dsp-16-s16}[fb] */
18609 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18610 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5fe0000 }
18612 /* shl.w r1h,${Dsp-16-u16} */
18615 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18616 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7fe0000 }
18618 /* shl.w r1h,${Dsp-16-u24} */
18621 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18622 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7be0000 }
18624 /* shl.b r1h,$Dst32RnUnprefixedQI */
18627 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18628 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83e }
18630 /* shl.b r1h,$Dst32AnUnprefixedQI */
18633 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18634 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0be }
18636 /* shl.b r1h,[$Dst32AnUnprefixed] */
18639 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18640 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03e }
18642 /* shl.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18645 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18646 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23e00 }
18648 /* shl.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18651 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18652 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43e0000 }
18654 /* shl.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18657 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18658 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63e0000 }
18660 /* shl.b r1h,${Dsp-16-u8}[sb] */
18663 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18664 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2be00 }
18666 /* shl.b r1h,${Dsp-16-u16}[sb] */
18669 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18670 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4be0000 }
18672 /* shl.b r1h,${Dsp-16-s8}[fb] */
18675 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18676 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2fe00 }
18678 /* shl.b r1h,${Dsp-16-s16}[fb] */
18681 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18682 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4fe0000 }
18684 /* shl.b r1h,${Dsp-16-u16} */
18687 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18688 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6fe0000 }
18690 /* shl.b r1h,${Dsp-16-u24} */
18693 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18694 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6be0000 }
18696 /* shl.w r1h,$Dst16RnHI */
18699 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
18700 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75e0 }
18702 /* shl.w r1h,$Dst16AnHI */
18705 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
18706 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75e4 }
18708 /* shl.w r1h,[$Dst16An] */
18711 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18712 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75e6 }
18714 /* shl.w r1h,${Dsp-16-u8}[$Dst16An] */
18717 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18718 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75e800 }
18720 /* shl.w r1h,${Dsp-16-u16}[$Dst16An] */
18723 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18724 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75ec0000 }
18726 /* shl.w r1h,${Dsp-16-u8}[sb] */
18729 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18730 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75ea00 }
18732 /* shl.w r1h,${Dsp-16-u16}[sb] */
18735 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18736 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75ee0000 }
18738 /* shl.w r1h,${Dsp-16-s8}[fb] */
18741 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18742 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75eb00 }
18744 /* shl.w r1h,${Dsp-16-u16} */
18747 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18748 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ef0000 }
18750 /* shl.b r1h,$Dst16RnQI */
18753 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
18754 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74e0 }
18756 /* shl.b r1h,$Dst16AnQI */
18759 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
18760 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74e4 }
18762 /* shl.b r1h,[$Dst16An] */
18765 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18766 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74e6 }
18768 /* shl.b r1h,${Dsp-16-u8}[$Dst16An] */
18771 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18772 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74e800 }
18774 /* shl.b r1h,${Dsp-16-u16}[$Dst16An] */
18777 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18778 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74ec0000 }
18780 /* shl.b r1h,${Dsp-16-u8}[sb] */
18783 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18784 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74ea00 }
18786 /* shl.b r1h,${Dsp-16-u16}[sb] */
18789 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18790 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74ee0000 }
18792 /* shl.b r1h,${Dsp-16-s8}[fb] */
18795 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18796 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74eb00 }
18798 /* shl.b r1h,${Dsp-16-u16} */
18801 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18802 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ef0000 }
18804 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
18807 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18808 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe900 }
18810 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
18813 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18814 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe180 }
18816 /* shl.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18819 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18820 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe100 }
18822 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18825 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18826 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe30000 }
18828 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18831 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18832 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5000000 }
18834 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18837 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18838 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7000000 }
18840 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18843 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18844 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe38000 }
18846 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18849 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18850 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5800000 }
18852 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18855 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18856 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3c000 }
18858 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18861 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18862 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5c00000 }
18864 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18867 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18868 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7c00000 }
18870 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18873 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18874 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7800000 }
18876 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
18879 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18880 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe800 }
18882 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
18885 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18886 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe080 }
18888 /* shl.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18891 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18892 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe000 }
18894 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18897 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18898 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe20000 }
18900 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18903 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18904 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4000000 }
18906 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18909 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18910 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6000000 }
18912 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18915 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18916 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe28000 }
18918 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18921 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18922 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4800000 }
18924 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18927 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18928 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2c000 }
18930 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18933 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18934 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4c00000 }
18936 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18939 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18940 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6c00000 }
18942 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18945 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18946 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6800000 }
18948 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
18951 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
18952 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe900 }
18954 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
18957 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
18958 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe904 }
18960 /* shl.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
18963 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
18964 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe906 }
18966 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
18969 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18970 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe90800 }
18972 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
18975 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18976 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe90c0000 }
18978 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
18981 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18982 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe90a00 }
18984 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
18987 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18988 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe90e0000 }
18990 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
18993 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18994 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe90b00 }
18996 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
18999 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19000 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe90f0000 }
19002 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19005 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19006 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe800 }
19008 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19011 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19012 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe804 }
19014 /* shl.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19017 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19018 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe806 }
19020 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19023 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19024 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe80800 }
19026 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19029 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19030 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe80c0000 }
19032 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19035 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19036 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe80a00 }
19038 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19041 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19042 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe80e0000 }
19044 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19047 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19048 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe80b00 }
19050 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19053 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19054 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe80f0000 }
19056 /* shanc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19059 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19060 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xc82100 }
19062 /* shanc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19065 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19066 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc0a100 }
19068 /* shanc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19071 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19072 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xc02100 }
19074 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19077 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19078 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc2210000 }
19080 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19083 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19084 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc2a10000 }
19086 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19089 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19090 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2e10000 }
19092 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19095 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19096 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4210000 }
19098 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19101 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19102 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4a10000 }
19104 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19107 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19108 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4e10000 }
19110 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19113 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19114 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6e10000 }
19116 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19119 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19120 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6210000 }
19122 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19125 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19126 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6a10000 }
19128 /* sha.l r1h,$Dst32RnUnprefixedSI */
19131 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19132 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc811 }
19134 /* sha.l r1h,$Dst32AnUnprefixedSI */
19137 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19138 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc091 }
19140 /* sha.l r1h,[$Dst32AnUnprefixed] */
19143 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19144 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc011 }
19146 /* sha.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19149 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19150 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc21100 }
19152 /* sha.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19155 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19156 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4110000 }
19158 /* sha.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19161 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19162 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6110000 }
19164 /* sha.l r1h,${Dsp-16-u8}[sb] */
19167 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19168 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc29100 }
19170 /* sha.l r1h,${Dsp-16-u16}[sb] */
19173 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19174 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4910000 }
19176 /* sha.l r1h,${Dsp-16-s8}[fb] */
19179 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19180 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2d100 }
19182 /* sha.l r1h,${Dsp-16-s16}[fb] */
19185 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19186 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4d10000 }
19188 /* sha.l r1h,${Dsp-16-u16} */
19191 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19192 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6d10000 }
19194 /* sha.l r1h,${Dsp-16-u24} */
19197 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19198 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6910000 }
19200 /* sha.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19203 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19204 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa82100 }
19206 /* sha.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19209 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19210 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0a100 }
19212 /* sha.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19215 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19216 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa02100 }
19218 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19221 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19222 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2210000 }
19224 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19227 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19228 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2a10000 }
19230 /* sha.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19233 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19234 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2e10000 }
19236 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19239 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19240 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4210000 }
19242 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19245 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19246 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4a10000 }
19248 /* sha.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19251 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19252 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4e10000 }
19254 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19257 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19258 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6e10000 }
19260 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19263 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19264 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6210000 }
19266 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19269 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19270 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6a10000 }
19272 /* sha.w r1h,$Dst32RnUnprefixedHI */
19275 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19276 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb93e }
19278 /* sha.w r1h,$Dst32AnUnprefixedHI */
19281 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19282 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1be }
19284 /* sha.w r1h,[$Dst32AnUnprefixed] */
19287 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19288 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb13e }
19290 /* sha.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19293 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19294 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb33e00 }
19296 /* sha.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19299 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19300 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb53e0000 }
19302 /* sha.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19305 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19306 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb73e0000 }
19308 /* sha.w r1h,${Dsp-16-u8}[sb] */
19311 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19312 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3be00 }
19314 /* sha.w r1h,${Dsp-16-u16}[sb] */
19317 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19318 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5be0000 }
19320 /* sha.w r1h,${Dsp-16-s8}[fb] */
19323 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19324 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3fe00 }
19326 /* sha.w r1h,${Dsp-16-s16}[fb] */
19329 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19330 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5fe0000 }
19332 /* sha.w r1h,${Dsp-16-u16} */
19335 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19336 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7fe0000 }
19338 /* sha.w r1h,${Dsp-16-u24} */
19341 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19342 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7be0000 }
19344 /* sha.b r1h,$Dst32RnUnprefixedQI */
19347 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19348 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb83e }
19350 /* sha.b r1h,$Dst32AnUnprefixedQI */
19353 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19354 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0be }
19356 /* sha.b r1h,[$Dst32AnUnprefixed] */
19359 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19360 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb03e }
19362 /* sha.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19365 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19366 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb23e00 }
19368 /* sha.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19371 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19372 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb43e0000 }
19374 /* sha.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19377 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19378 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb63e0000 }
19380 /* sha.b r1h,${Dsp-16-u8}[sb] */
19383 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19384 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2be00 }
19386 /* sha.b r1h,${Dsp-16-u16}[sb] */
19389 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19390 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4be0000 }
19392 /* sha.b r1h,${Dsp-16-s8}[fb] */
19395 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19396 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2fe00 }
19398 /* sha.b r1h,${Dsp-16-s16}[fb] */
19401 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19402 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4fe0000 }
19404 /* sha.b r1h,${Dsp-16-u16} */
19407 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19408 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6fe0000 }
19410 /* sha.b r1h,${Dsp-16-u24} */
19413 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19414 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6be0000 }
19416 /* sha.w r1h,$Dst16RnHI */
19419 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
19420 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75f0 }
19422 /* sha.w r1h,$Dst16AnHI */
19425 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
19426 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75f4 }
19428 /* sha.w r1h,[$Dst16An] */
19431 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19432 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75f6 }
19434 /* sha.w r1h,${Dsp-16-u8}[$Dst16An] */
19437 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19438 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75f800 }
19440 /* sha.w r1h,${Dsp-16-u16}[$Dst16An] */
19443 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19444 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75fc0000 }
19446 /* sha.w r1h,${Dsp-16-u8}[sb] */
19449 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19450 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75fa00 }
19452 /* sha.w r1h,${Dsp-16-u16}[sb] */
19455 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19456 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75fe0000 }
19458 /* sha.w r1h,${Dsp-16-s8}[fb] */
19461 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19462 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75fb00 }
19464 /* sha.w r1h,${Dsp-16-u16} */
19467 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19468 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ff0000 }
19470 /* sha.b r1h,$Dst16RnQI */
19473 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
19474 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74f0 }
19476 /* sha.b r1h,$Dst16AnQI */
19479 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
19480 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74f4 }
19482 /* sha.b r1h,[$Dst16An] */
19485 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19486 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74f6 }
19488 /* sha.b r1h,${Dsp-16-u8}[$Dst16An] */
19491 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19492 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74f800 }
19494 /* sha.b r1h,${Dsp-16-u16}[$Dst16An] */
19497 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19498 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74fc0000 }
19500 /* sha.b r1h,${Dsp-16-u8}[sb] */
19503 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19504 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74fa00 }
19506 /* sha.b r1h,${Dsp-16-u16}[sb] */
19509 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19510 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74fe0000 }
19512 /* sha.b r1h,${Dsp-16-s8}[fb] */
19515 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19516 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74fb00 }
19518 /* sha.b r1h,${Dsp-16-u16} */
19521 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19522 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ff0000 }
19524 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
19527 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19528 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf900 }
19530 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
19533 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19534 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf180 }
19536 /* sha.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19539 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19540 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf100 }
19542 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19545 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19546 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf30000 }
19548 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19551 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19552 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5000000 }
19554 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19557 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19558 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7000000 }
19560 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19563 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19564 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf38000 }
19566 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19569 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19570 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5800000 }
19572 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19575 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19576 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3c000 }
19578 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19581 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19582 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5c00000 }
19584 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19587 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19588 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7c00000 }
19590 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19593 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19594 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7800000 }
19596 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
19599 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19600 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf800 }
19602 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
19605 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19606 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf080 }
19608 /* sha.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19611 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19612 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf000 }
19614 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19617 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19618 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf20000 }
19620 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19623 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19624 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4000000 }
19626 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19629 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19630 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6000000 }
19632 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19635 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19636 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf28000 }
19638 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19641 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19642 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4800000 }
19644 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19647 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19648 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2c000 }
19650 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19653 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19654 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4c00000 }
19656 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19659 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19660 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6c00000 }
19662 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19665 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19666 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6800000 }
19668 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
19671 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
19672 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xf100 }
19674 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
19677 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
19678 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xf104 }
19680 /* sha.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
19683 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19684 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xf106 }
19686 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19689 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19690 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xf10800 }
19692 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19695 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19696 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xf10c0000 }
19698 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19701 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19702 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xf10a00 }
19704 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19707 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19708 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xf10e0000 }
19710 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19713 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19714 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xf10b00 }
19716 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19719 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19720 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xf10f0000 }
19722 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19725 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19726 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xf000 }
19728 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19731 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19732 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xf004 }
19734 /* sha.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19737 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19738 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xf006 }
19740 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19743 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19744 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xf00800 }
19746 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19749 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19750 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xf00c0000 }
19752 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19755 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19756 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xf00a00 }
19758 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19761 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19762 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xf00e0000 }
19764 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19767 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19768 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xf00b00 }
19770 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19773 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19774 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xf00f0000 }
19776 /* sc${sccond32} $Dst32RnUnprefixedHI */
19779 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
19780 & ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI
, { 0xd930 }
19782 /* sc${sccond32} $Dst32AnUnprefixedHI */
19785 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
19786 & ifmt_sccnd_dst32_An_direct_Unprefixed_HI
, { 0xd1b0 }
19788 /* sc${sccond32} [$Dst32AnUnprefixed] */
19791 { { MNEM
, OP (SCCOND32
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19792 & ifmt_sccnd_dst32_An_indirect_Unprefixed_HI
, { 0xd130 }
19794 /* sc${sccond32} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
19797 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19798 & ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd33000 }
19800 /* sc${sccond32} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
19803 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19804 & ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5300000 }
19806 /* sc${sccond32} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
19809 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19810 & ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7300000 }
19812 /* sc${sccond32} ${Dsp-16-u8}[sb] */
19815 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19816 & ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd3b000 }
19818 /* sc${sccond32} ${Dsp-16-u16}[sb] */
19821 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19822 & ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5b00000 }
19824 /* sc${sccond32} ${Dsp-16-s8}[fb] */
19827 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19828 & ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3f000 }
19830 /* sc${sccond32} ${Dsp-16-s16}[fb] */
19833 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19834 & ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5f00000 }
19836 /* sc${sccond32} ${Dsp-16-u16} */
19839 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), 0 } },
19840 & ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7f00000 }
19842 /* sc${sccond32} ${Dsp-16-u24} */
19845 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), 0 } },
19846 & ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7b00000 }
19848 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19851 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19852 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
19854 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19857 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19858 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
19860 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19863 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19864 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
19866 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19869 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19870 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
19872 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19875 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19876 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
19878 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19881 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19882 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
19884 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19887 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19888 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
19890 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19893 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19894 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
19896 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19899 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19900 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
19902 /* sbjnz.w #${Imm-12-s4n},$Dst32RnUnprefixedHI,${Lab-16-8} */
19905 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19906 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
19908 /* sbjnz.w #${Imm-12-s4n},$Dst32AnUnprefixedHI,${Lab-16-8} */
19911 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19912 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
19914 /* sbjnz.w #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
19917 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
19918 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
19920 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19923 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19924 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
19926 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19929 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19930 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
19932 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19935 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19936 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
19938 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19941 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19942 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
19944 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19947 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19948 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
19950 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19953 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19954 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
19956 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19959 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19960 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
19962 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19965 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19966 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
19968 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19971 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19972 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
19974 /* sbjnz.b #${Imm-12-s4n},$Dst32RnUnprefixedQI,${Lab-16-8} */
19977 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19978 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
19980 /* sbjnz.b #${Imm-12-s4n},$Dst32AnUnprefixedQI,${Lab-16-8} */
19983 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19984 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
19986 /* sbjnz.b #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
19989 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
19990 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
19992 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
19995 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
19996 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
19998 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20001 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20002 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
20004 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20007 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20008 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
20010 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20013 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20014 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
20016 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20019 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20020 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
20022 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20025 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20026 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
20028 /* sbjnz.w #${Imm-8-s4n},$Dst16RnHI,${Lab-16-8} */
20031 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
20032 & ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
20034 /* sbjnz.w #${Imm-8-s4n},$Dst16AnHI,${Lab-16-8} */
20037 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
20038 & ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
20040 /* sbjnz.w #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20043 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20044 & ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
20046 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
20049 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
20050 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
20052 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20055 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20056 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
20058 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20061 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20062 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
20064 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20067 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20068 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
20070 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20073 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20074 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
20076 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20079 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20080 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
20082 /* sbjnz.b #${Imm-8-s4n},$Dst16RnQI,${Lab-16-8} */
20085 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
20086 & ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
20088 /* sbjnz.b #${Imm-8-s4n},$Dst16AnQI,${Lab-16-8} */
20091 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
20092 & ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
20094 /* sbjnz.b #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20097 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20098 & ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
20100 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20103 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20104 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990600 }
20106 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
20109 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20110 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992600 }
20112 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
20115 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20116 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993600 }
20118 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20121 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20122 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918600 }
20124 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
20127 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20128 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a600 }
20130 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
20133 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20134 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b600 }
20136 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20139 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20140 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910600 }
20142 /* sbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
20145 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20146 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912600 }
20148 /* sbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
20151 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20152 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913600 }
20154 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
20157 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20158 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930600 }
20160 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20163 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20164 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932600 }
20166 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20169 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20170 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933600 }
20172 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
20175 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20176 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950600 }
20178 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20181 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20182 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952600 }
20184 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20187 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20188 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953600 }
20190 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
20193 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20194 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970600 }
20196 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20199 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20200 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972600 }
20202 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20205 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20206 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973600 }
20208 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
20211 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20212 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938600 }
20214 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
20217 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20218 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a600 }
20220 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
20223 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20224 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b600 }
20226 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
20229 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20230 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958600 }
20232 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
20235 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20236 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a600 }
20238 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
20241 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20242 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b600 }
20244 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
20247 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20248 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c600 }
20250 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
20253 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20254 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e600 }
20256 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
20259 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20260 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f600 }
20262 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
20265 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20266 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c600 }
20268 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
20271 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20272 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e600 }
20274 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
20277 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20278 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f600 }
20280 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
20283 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
20284 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c600 }
20286 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
20289 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20290 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e600 }
20292 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
20295 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20296 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f600 }
20298 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
20301 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
20302 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978600 }
20304 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
20307 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20308 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a600 }
20310 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
20313 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20314 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b600 }
20316 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20319 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20320 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90600 }
20322 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
20325 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20326 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92600 }
20328 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
20331 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20332 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93600 }
20334 /* sbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
20337 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20338 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93600 }
20340 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20343 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20344 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18600 }
20346 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
20349 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20350 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a600 }
20352 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
20355 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20356 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b600 }
20358 /* sbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
20361 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20362 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b600 }
20364 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20367 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20368 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10600 }
20370 /* sbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
20373 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20374 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12600 }
20376 /* sbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
20379 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20380 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13600 }
20382 /* sbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
20385 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20386 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13600 }
20388 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
20391 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20392 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30600 }
20394 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20397 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20398 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32600 }
20400 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20403 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20404 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33600 }
20406 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
20409 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20410 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33600 }
20412 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
20415 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20416 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50600 }
20418 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20421 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20422 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52600 }
20424 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20427 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20428 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53600 }
20430 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
20433 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20434 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53600 }
20436 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
20439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20440 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70600 }
20442 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20445 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20446 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72600 }
20448 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20451 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20452 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73600 }
20454 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
20457 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20458 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73600 }
20460 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
20463 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20464 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38600 }
20466 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
20469 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20470 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a600 }
20472 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
20475 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20476 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b600 }
20478 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
20481 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20482 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b600 }
20484 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
20487 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20488 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58600 }
20490 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
20493 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20494 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a600 }
20496 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
20499 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20500 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b600 }
20502 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
20505 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20506 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b600 }
20508 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
20511 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20512 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c600 }
20514 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
20517 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20518 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e600 }
20520 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
20523 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20524 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f600 }
20526 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
20529 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20530 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f600 }
20532 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
20535 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20536 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c600 }
20538 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
20541 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20542 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e600 }
20544 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
20547 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20548 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f600 }
20550 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
20553 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20554 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f600 }
20556 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
20559 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
20560 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c600 }
20562 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
20565 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20566 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e600 }
20568 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
20571 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20572 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f600 }
20574 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
20577 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
20578 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f600 }
20580 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
20583 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
20584 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78600 }
20586 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
20589 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20590 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a600 }
20592 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
20595 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20596 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b600 }
20598 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
20601 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
20602 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b600 }
20604 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20607 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20608 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90600 }
20610 /* sbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
20613 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20614 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92600 }
20616 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20619 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20620 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18600 }
20622 /* sbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
20625 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20626 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a600 }
20628 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20631 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20632 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10600 }
20634 /* sbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
20637 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20638 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12600 }
20640 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
20643 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20644 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30600 }
20646 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
20649 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20650 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32600 }
20652 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
20655 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20656 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50600 }
20658 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
20661 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20662 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52600 }
20664 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
20667 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20668 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70600 }
20670 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
20673 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20674 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72600 }
20676 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
20679 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20680 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38600 }
20682 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
20685 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20686 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a600 }
20688 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
20691 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20692 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58600 }
20694 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
20697 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20698 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a600 }
20700 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
20703 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20704 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c600 }
20706 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
20709 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20710 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e600 }
20712 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
20715 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20716 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c600 }
20718 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
20721 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20722 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e600 }
20724 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
20727 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
20728 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c600 }
20730 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
20733 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
20734 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e600 }
20736 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
20739 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
20740 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78600 }
20742 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
20745 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
20746 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a600 }
20748 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
20751 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20752 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c906 }
20754 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
20757 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20758 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18926 }
20760 /* sbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
20763 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20764 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18906 }
20766 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
20769 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20770 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c186 }
20772 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
20775 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20776 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a6 }
20778 /* sbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
20781 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20782 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18186 }
20784 /* sbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
20787 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20788 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c106 }
20790 /* sbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
20793 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20794 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18126 }
20796 /* sbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
20799 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20800 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18106 }
20802 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20805 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20806 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30600 }
20808 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20811 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20812 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832600 }
20814 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
20817 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20818 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830600 }
20820 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20823 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20824 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50600 }
20826 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20829 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20830 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852600 }
20832 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
20835 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20836 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850600 }
20838 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20841 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20842 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70600 }
20844 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20847 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20848 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872600 }
20850 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
20853 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20854 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870600 }
20856 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
20859 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20860 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38600 }
20862 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
20865 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20866 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a600 }
20868 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
20871 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20872 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838600 }
20874 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
20877 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20878 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58600 }
20880 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
20883 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20884 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a600 }
20886 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
20889 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20890 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858600 }
20892 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
20895 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20896 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c600 }
20898 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
20901 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20902 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e600 }
20904 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
20907 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20908 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c600 }
20910 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
20913 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20914 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c600 }
20916 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
20919 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20920 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e600 }
20922 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
20925 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20926 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c600 }
20928 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
20931 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20932 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c600 }
20934 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
20937 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20938 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e600 }
20940 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
20943 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
20944 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c600 }
20946 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
20949 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20950 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78600 }
20952 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
20955 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20956 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a600 }
20958 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
20961 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
20962 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878600 }
20964 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
20967 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20968 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980600 }
20970 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
20973 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20974 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982600 }
20976 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
20979 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20980 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983600 }
20982 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
20985 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20986 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908600 }
20988 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
20991 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20992 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a600 }
20994 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
20997 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20998 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b600 }
21000 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21003 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21004 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900600 }
21006 /* sbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
21009 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21010 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902600 }
21012 /* sbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
21015 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21016 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903600 }
21018 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
21021 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21022 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920600 }
21024 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21027 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21028 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922600 }
21030 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21033 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21034 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923600 }
21036 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
21039 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21040 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940600 }
21042 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21045 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21046 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942600 }
21048 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21051 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21052 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943600 }
21054 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
21057 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21058 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960600 }
21060 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21063 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21064 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962600 }
21066 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21069 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21070 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963600 }
21072 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
21075 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21076 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928600 }
21078 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
21081 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21082 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a600 }
21084 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
21087 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21088 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b600 }
21090 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
21093 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21094 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948600 }
21096 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
21099 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21100 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a600 }
21102 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
21105 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21106 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b600 }
21108 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
21111 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21112 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c600 }
21114 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
21117 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21118 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e600 }
21120 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
21123 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21124 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f600 }
21126 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
21129 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21130 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c600 }
21132 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
21135 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21136 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e600 }
21138 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
21141 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21142 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f600 }
21144 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
21147 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
21148 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c600 }
21150 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
21153 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21154 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e600 }
21156 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
21159 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21160 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f600 }
21162 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
21165 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
21166 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968600 }
21168 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
21171 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21172 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a600 }
21174 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
21177 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21178 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b600 }
21180 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21183 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21184 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80600 }
21186 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
21189 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21190 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82600 }
21192 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
21195 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21196 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83600 }
21198 /* sbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
21201 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21202 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83600 }
21204 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21207 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21208 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08600 }
21210 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
21213 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21214 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a600 }
21216 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
21219 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21220 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b600 }
21222 /* sbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
21225 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21226 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b600 }
21228 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21231 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21232 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00600 }
21234 /* sbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
21237 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21238 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02600 }
21240 /* sbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
21243 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21244 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03600 }
21246 /* sbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
21249 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21250 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03600 }
21252 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
21255 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21256 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20600 }
21258 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21261 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21262 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22600 }
21264 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21267 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21268 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23600 }
21270 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
21273 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21274 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23600 }
21276 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
21279 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21280 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40600 }
21282 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21285 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21286 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42600 }
21288 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21291 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21292 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43600 }
21294 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
21297 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21298 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43600 }
21300 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
21303 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21304 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60600 }
21306 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21309 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21310 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62600 }
21312 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21315 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21316 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63600 }
21318 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
21321 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21322 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63600 }
21324 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
21327 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21328 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28600 }
21330 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
21333 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21334 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a600 }
21336 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
21339 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21340 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b600 }
21342 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
21345 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21346 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b600 }
21348 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
21351 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21352 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48600 }
21354 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
21357 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21358 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a600 }
21360 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
21363 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21364 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b600 }
21366 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
21369 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21370 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b600 }
21372 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
21375 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21376 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c600 }
21378 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
21381 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21382 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e600 }
21384 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
21387 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21388 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f600 }
21390 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
21393 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21394 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f600 }
21396 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
21399 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21400 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c600 }
21402 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
21405 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21406 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e600 }
21408 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
21411 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21412 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f600 }
21414 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
21417 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21418 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f600 }
21420 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
21423 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
21424 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c600 }
21426 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
21429 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21430 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e600 }
21432 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
21435 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21436 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f600 }
21438 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
21441 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
21442 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f600 }
21444 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
21447 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
21448 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68600 }
21450 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
21453 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21454 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a600 }
21456 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
21459 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21460 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b600 }
21462 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
21465 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
21466 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b600 }
21468 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21471 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21472 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80600 }
21474 /* sbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
21477 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21478 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82600 }
21480 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21483 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21484 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08600 }
21486 /* sbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
21489 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21490 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a600 }
21492 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21495 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21496 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00600 }
21498 /* sbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
21501 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21502 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02600 }
21504 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
21507 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21508 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20600 }
21510 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
21513 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21514 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22600 }
21516 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
21519 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21520 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40600 }
21522 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
21525 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21526 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42600 }
21528 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
21531 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21532 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60600 }
21534 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
21537 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21538 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62600 }
21540 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
21543 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21544 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28600 }
21546 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
21549 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21550 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a600 }
21552 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
21555 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21556 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48600 }
21558 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
21561 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21562 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a600 }
21564 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
21567 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21568 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c600 }
21570 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
21573 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21574 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e600 }
21576 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
21579 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21580 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c600 }
21582 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
21585 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21586 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e600 }
21588 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
21591 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
21592 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c600 }
21594 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
21597 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
21598 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e600 }
21600 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
21603 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
21604 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68600 }
21606 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
21609 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
21610 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a600 }
21612 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
21615 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21616 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c806 }
21618 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
21621 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21622 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18826 }
21624 /* sbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
21627 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21628 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18806 }
21630 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
21633 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21634 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c086 }
21636 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
21639 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21640 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a6 }
21642 /* sbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
21645 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21646 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18086 }
21648 /* sbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
21651 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21652 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c006 }
21654 /* sbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
21657 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21658 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18026 }
21660 /* sbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
21663 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21664 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18006 }
21666 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21669 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21670 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20600 }
21672 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21675 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21676 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822600 }
21678 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
21681 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21682 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820600 }
21684 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21687 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21688 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40600 }
21690 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21693 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21694 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842600 }
21696 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
21699 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21700 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840600 }
21702 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21705 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21706 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60600 }
21708 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21711 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21712 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862600 }
21714 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
21717 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21718 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860600 }
21720 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
21723 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21724 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28600 }
21726 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
21729 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21730 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a600 }
21732 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
21735 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21736 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828600 }
21738 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
21741 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21742 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48600 }
21744 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
21747 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21748 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a600 }
21750 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
21753 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21754 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848600 }
21756 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
21759 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21760 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c600 }
21762 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
21765 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21766 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e600 }
21768 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
21771 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21772 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c600 }
21774 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
21777 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21778 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c600 }
21780 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
21783 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21784 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e600 }
21786 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
21789 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21790 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c600 }
21792 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
21795 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21796 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c600 }
21798 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
21801 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21802 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e600 }
21804 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
21807 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
21808 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c600 }
21810 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
21813 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21814 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68600 }
21816 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
21819 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21820 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a600 }
21822 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
21825 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
21826 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868600 }
21828 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
21831 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
21832 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb98000 }
21834 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
21837 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21838 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9a000 }
21840 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
21843 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21844 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb9b000 }
21846 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
21849 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
21850 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb98400 }
21852 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
21855 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21856 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb9a400 }
21858 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
21861 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21862 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb9b400 }
21864 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
21867 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
21868 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb98600 }
21870 /* sbb.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
21873 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21874 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9a600 }
21876 /* sbb.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
21879 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21880 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb9b600 }
21882 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
21885 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21886 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9880000 }
21888 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
21891 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21892 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9a80000 }
21894 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
21897 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21898 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9b80000 }
21900 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
21903 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21904 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb98c0000 }
21906 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
21909 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21910 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9ac0000 }
21912 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
21915 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21916 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9bc0000 }
21918 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
21921 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21922 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb98a0000 }
21924 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
21927 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21928 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9aa0000 }
21930 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
21933 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21934 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9ba0000 }
21936 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
21939 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21940 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb98e0000 }
21942 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
21945 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21946 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9ae0000 }
21948 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
21951 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21952 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9be0000 }
21954 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
21957 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21958 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb98b0000 }
21960 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
21963 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21964 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9ab0000 }
21966 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
21969 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21970 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9bb0000 }
21972 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
21975 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
21976 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb98f0000 }
21978 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
21981 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21982 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9af0000 }
21984 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
21987 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21988 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9bf0000 }
21990 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
21993 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
21994 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb9c00000 }
21996 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
21999 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
22000 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9e00000 }
22002 /* sbb.w${X} ${Dsp-16-u16},$Dst16RnHI */
22005 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
22006 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb9f00000 }
22008 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
22011 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22012 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb9c40000 }
22014 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
22017 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
22018 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb9e40000 }
22020 /* sbb.w${X} ${Dsp-16-u16},$Dst16AnHI */
22023 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
22024 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb9f40000 }
22026 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22029 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22030 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb9c60000 }
22032 /* sbb.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22035 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22036 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9e60000 }
22038 /* sbb.w${X} ${Dsp-16-u16},[$Dst16An] */
22041 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22042 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb9f60000 }
22044 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22047 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22048 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9c80000 }
22050 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22053 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22054 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9e80000 }
22056 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22059 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22060 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb9f80000 }
22062 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22065 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22066 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9cc0000 }
22068 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22071 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22072 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9ec0000 }
22074 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22077 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22078 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb9fc0000 }
22080 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22083 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22084 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ca0000 }
22086 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22089 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22090 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ea0000 }
22092 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22095 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22096 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb9fa0000 }
22098 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22101 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22102 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ce0000 }
22104 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22107 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22108 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ee0000 }
22110 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22113 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22114 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb9fe0000 }
22116 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22119 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22120 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9cb0000 }
22122 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22125 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22126 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9eb0000 }
22128 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22131 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22132 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb9fb0000 }
22134 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22137 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22138 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb9cf0000 }
22140 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22143 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22144 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb9ef0000 }
22146 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
22149 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22150 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb9ff0000 }
22152 /* sbb.w${X} $Src16RnHI,$Dst16RnHI */
22155 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
22156 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb900 }
22158 /* sbb.w${X} $Src16AnHI,$Dst16RnHI */
22161 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
22162 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb940 }
22164 /* sbb.w${X} [$Src16An],$Dst16RnHI */
22167 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
22168 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb960 }
22170 /* sbb.w${X} $Src16RnHI,$Dst16AnHI */
22173 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
22174 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb904 }
22176 /* sbb.w${X} $Src16AnHI,$Dst16AnHI */
22179 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
22180 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb944 }
22182 /* sbb.w${X} [$Src16An],$Dst16AnHI */
22185 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22186 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb964 }
22188 /* sbb.w${X} $Src16RnHI,[$Dst16An] */
22191 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22192 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb906 }
22194 /* sbb.w${X} $Src16AnHI,[$Dst16An] */
22197 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22198 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb946 }
22200 /* sbb.w${X} [$Src16An],[$Dst16An] */
22203 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22204 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb966 }
22206 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
22209 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22210 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb90800 }
22212 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
22215 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22216 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb94800 }
22218 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22221 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22222 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb96800 }
22224 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
22227 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22228 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb90c0000 }
22230 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
22233 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22234 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb94c0000 }
22236 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22239 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22240 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb96c0000 }
22242 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
22245 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22246 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb90a00 }
22248 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
22251 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22252 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb94a00 }
22254 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[sb] */
22257 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22258 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb96a00 }
22260 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
22263 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22264 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb90e0000 }
22266 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
22269 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22270 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb94e0000 }
22272 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[sb] */
22275 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22276 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb96e0000 }
22278 /* sbb.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
22281 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22282 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb90b00 }
22284 /* sbb.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
22287 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22288 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb94b00 }
22290 /* sbb.w${X} [$Src16An],${Dsp-16-s8}[fb] */
22293 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22294 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb96b00 }
22296 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16} */
22299 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
22300 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb90f0000 }
22302 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16} */
22305 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
22306 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb94f0000 }
22308 /* sbb.w${X} [$Src16An],${Dsp-16-u16} */
22311 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22312 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb96f0000 }
22314 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
22317 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22318 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb88000 }
22320 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
22323 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22324 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8a000 }
22326 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
22329 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22330 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb8b000 }
22332 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
22335 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22336 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb88400 }
22338 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
22341 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22342 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb8a400 }
22344 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
22347 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22348 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb8b400 }
22350 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
22353 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22354 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb88600 }
22356 /* sbb.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
22359 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22360 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8a600 }
22362 /* sbb.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
22365 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22366 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb8b600 }
22368 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
22371 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22372 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8880000 }
22374 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
22377 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22378 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8a80000 }
22380 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
22383 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22384 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8b80000 }
22386 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
22389 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22390 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb88c0000 }
22392 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
22395 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22396 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8ac0000 }
22398 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
22401 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22402 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8bc0000 }
22404 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
22407 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22408 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb88a0000 }
22410 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
22413 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22414 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8aa0000 }
22416 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
22419 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22420 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8ba0000 }
22422 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
22425 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22426 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb88e0000 }
22428 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
22431 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22432 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8ae0000 }
22434 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
22437 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22438 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8be0000 }
22440 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
22443 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22444 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb88b0000 }
22446 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
22449 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22450 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8ab0000 }
22452 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
22455 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22456 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8bb0000 }
22458 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
22461 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
22462 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb88f0000 }
22464 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
22467 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22468 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8af0000 }
22470 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
22473 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22474 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8bf0000 }
22476 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
22479 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22480 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb8c00000 }
22482 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
22485 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22486 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8e00000 }
22488 /* sbb.b${X} ${Dsp-16-u16},$Dst16RnQI */
22491 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
22492 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb8f00000 }
22494 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
22497 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22498 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb8c40000 }
22500 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
22503 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22504 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb8e40000 }
22506 /* sbb.b${X} ${Dsp-16-u16},$Dst16AnQI */
22509 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
22510 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb8f40000 }
22512 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22515 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22516 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb8c60000 }
22518 /* sbb.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22521 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22522 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8e60000 }
22524 /* sbb.b${X} ${Dsp-16-u16},[$Dst16An] */
22527 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22528 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb8f60000 }
22530 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22533 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22534 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8c80000 }
22536 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22539 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22540 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8e80000 }
22542 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22545 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22546 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb8f80000 }
22548 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22551 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22552 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8cc0000 }
22554 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22557 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22558 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8ec0000 }
22560 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22563 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22564 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb8fc0000 }
22566 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22569 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22570 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ca0000 }
22572 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22575 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22576 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ea0000 }
22578 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22581 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22582 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb8fa0000 }
22584 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22587 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22588 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ce0000 }
22590 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22593 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22594 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ee0000 }
22596 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22599 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22600 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb8fe0000 }
22602 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22605 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22606 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8cb0000 }
22608 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22611 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22612 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8eb0000 }
22614 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22617 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22618 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb8fb0000 }
22620 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22623 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22624 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb8cf0000 }
22626 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22629 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22630 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb8ef0000 }
22632 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
22635 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22636 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb8ff0000 }
22638 /* sbb.b${X} $Src16RnQI,$Dst16RnQI */
22641 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
22642 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb800 }
22644 /* sbb.b${X} $Src16AnQI,$Dst16RnQI */
22647 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
22648 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb840 }
22650 /* sbb.b${X} [$Src16An],$Dst16RnQI */
22653 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22654 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb860 }
22656 /* sbb.b${X} $Src16RnQI,$Dst16AnQI */
22659 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
22660 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb804 }
22662 /* sbb.b${X} $Src16AnQI,$Dst16AnQI */
22665 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
22666 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb844 }
22668 /* sbb.b${X} [$Src16An],$Dst16AnQI */
22671 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22672 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb864 }
22674 /* sbb.b${X} $Src16RnQI,[$Dst16An] */
22677 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22678 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb806 }
22680 /* sbb.b${X} $Src16AnQI,[$Dst16An] */
22683 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22684 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb846 }
22686 /* sbb.b${X} [$Src16An],[$Dst16An] */
22689 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22690 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb866 }
22692 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
22695 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22696 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb80800 }
22698 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
22701 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22702 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb84800 }
22704 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22707 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22708 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb86800 }
22710 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
22713 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22714 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb80c0000 }
22716 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
22719 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22720 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb84c0000 }
22722 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22725 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22726 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb86c0000 }
22728 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
22731 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22732 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb80a00 }
22734 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
22737 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22738 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb84a00 }
22740 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[sb] */
22743 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22744 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb86a00 }
22746 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
22749 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22750 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb80e0000 }
22752 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
22755 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22756 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb84e0000 }
22758 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[sb] */
22761 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22762 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb86e0000 }
22764 /* sbb.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
22767 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22768 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb80b00 }
22770 /* sbb.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
22773 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22774 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb84b00 }
22776 /* sbb.b${X} [$Src16An],${Dsp-16-s8}[fb] */
22779 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22780 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb86b00 }
22782 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16} */
22785 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
22786 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb80f0000 }
22788 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16} */
22791 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
22792 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb84f0000 }
22794 /* sbb.b${X} [$Src16An],${Dsp-16-u16} */
22797 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22798 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb86f0000 }
22800 /* sbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
22803 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
22804 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1992e00 }
22806 /* sbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
22809 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
22810 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x191ae00 }
22812 /* sbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
22815 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22816 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1912e00 }
22818 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22821 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22822 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1932e00 }
22824 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
22827 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22828 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x193ae00 }
22830 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
22833 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22834 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ee00 }
22836 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22839 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22840 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1952e00 }
22842 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
22845 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22846 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x195ae00 }
22848 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
22851 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22852 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ee00 }
22854 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
22857 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
22858 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ee00 }
22860 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22863 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22864 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1972e00 }
22866 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
22869 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
22870 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x197ae00 }
22872 /* sbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
22875 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
22876 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1982e00 }
22878 /* sbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
22881 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
22882 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x190ae00 }
22884 /* sbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
22887 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22888 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1902e00 }
22890 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22893 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22894 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1922e00 }
22896 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
22899 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22900 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x192ae00 }
22902 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
22905 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22906 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ee00 }
22908 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22911 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22912 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1942e00 }
22914 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
22917 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22918 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x194ae00 }
22920 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
22923 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22924 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ee00 }
22926 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
22929 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
22930 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ee00 }
22932 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22935 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22936 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1962e00 }
22938 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
22941 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
22942 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x196ae00 }
22944 /* sbb.w${X} #${Imm-16-HI},$Dst16RnHI */
22947 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
22948 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77700000 }
22950 /* sbb.w${X} #${Imm-16-HI},$Dst16AnHI */
22953 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
22954 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77740000 }
22956 /* sbb.w${X} #${Imm-16-HI},[$Dst16An] */
22959 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
22960 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77760000 }
22962 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
22965 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22966 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77780000 }
22968 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
22971 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22972 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x777a0000 }
22974 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
22977 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22978 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x777b0000 }
22980 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
22983 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22984 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x777c0000 }
22986 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
22989 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22990 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x777e0000 }
22992 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16} */
22995 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
22996 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x777f0000 }
22998 /* sbb.b${X} #${Imm-16-QI},$Dst16RnQI */
23001 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
23002 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x767000 }
23004 /* sbb.b${X} #${Imm-16-QI},$Dst16AnQI */
23007 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
23008 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x767400 }
23010 /* sbb.b${X} #${Imm-16-QI},[$Dst16An] */
23013 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
23014 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x767600 }
23016 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
23019 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23020 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76780000 }
23022 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
23025 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23026 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x767a0000 }
23028 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
23031 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23032 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x767b0000 }
23034 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
23037 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23038 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x767c0000 }
23040 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
23043 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23044 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x767e0000 }
23046 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16} */
23049 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
23050 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x767f0000 }
23052 /* rot.w r1h,$Dst32RnUnprefixedHI */
23055 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23056 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93f }
23058 /* rot.w r1h,$Dst32AnUnprefixedHI */
23061 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23062 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1bf }
23064 /* rot.w r1h,[$Dst32AnUnprefixed] */
23067 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23068 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13f }
23070 /* rot.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23073 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23074 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33f00 }
23076 /* rot.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23079 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23080 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53f0000 }
23082 /* rot.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23085 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23086 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73f0000 }
23088 /* rot.w r1h,${Dsp-16-u8}[sb] */
23091 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23092 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3bf00 }
23094 /* rot.w r1h,${Dsp-16-u16}[sb] */
23097 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23098 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5bf0000 }
23100 /* rot.w r1h,${Dsp-16-s8}[fb] */
23103 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23104 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ff00 }
23106 /* rot.w r1h,${Dsp-16-s16}[fb] */
23109 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23110 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ff0000 }
23112 /* rot.w r1h,${Dsp-16-u16} */
23115 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23116 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ff0000 }
23118 /* rot.w r1h,${Dsp-16-u24} */
23121 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23122 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7bf0000 }
23124 /* rot.b r1h,$Dst32RnUnprefixedQI */
23127 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23128 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83f }
23130 /* rot.b r1h,$Dst32AnUnprefixedQI */
23133 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23134 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0bf }
23136 /* rot.b r1h,[$Dst32AnUnprefixed] */
23139 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23140 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03f }
23142 /* rot.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23145 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23146 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23f00 }
23148 /* rot.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23151 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23152 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43f0000 }
23154 /* rot.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23157 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23158 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63f0000 }
23160 /* rot.b r1h,${Dsp-16-u8}[sb] */
23163 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23164 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2bf00 }
23166 /* rot.b r1h,${Dsp-16-u16}[sb] */
23169 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23170 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4bf0000 }
23172 /* rot.b r1h,${Dsp-16-s8}[fb] */
23175 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23176 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ff00 }
23178 /* rot.b r1h,${Dsp-16-s16}[fb] */
23181 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23182 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ff0000 }
23184 /* rot.b r1h,${Dsp-16-u16} */
23187 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23188 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ff0000 }
23190 /* rot.b r1h,${Dsp-16-u24} */
23193 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23194 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6bf0000 }
23196 /* rot.w r1h,$Dst16RnHI */
23199 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
23200 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7560 }
23202 /* rot.w r1h,$Dst16AnHI */
23205 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
23206 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7564 }
23208 /* rot.w r1h,[$Dst16An] */
23211 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23212 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7566 }
23214 /* rot.w r1h,${Dsp-16-u8}[$Dst16An] */
23217 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23218 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x756800 }
23220 /* rot.w r1h,${Dsp-16-u16}[$Dst16An] */
23223 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23224 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x756c0000 }
23226 /* rot.w r1h,${Dsp-16-u8}[sb] */
23229 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23230 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x756a00 }
23232 /* rot.w r1h,${Dsp-16-u16}[sb] */
23235 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23236 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x756e0000 }
23238 /* rot.w r1h,${Dsp-16-s8}[fb] */
23241 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23242 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x756b00 }
23244 /* rot.w r1h,${Dsp-16-u16} */
23247 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23248 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x756f0000 }
23250 /* rot.b r1h,$Dst16RnQI */
23253 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
23254 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7460 }
23256 /* rot.b r1h,$Dst16AnQI */
23259 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
23260 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7464 }
23262 /* rot.b r1h,[$Dst16An] */
23265 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23266 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7466 }
23268 /* rot.b r1h,${Dsp-16-u8}[$Dst16An] */
23271 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23272 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x746800 }
23274 /* rot.b r1h,${Dsp-16-u16}[$Dst16An] */
23277 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23278 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x746c0000 }
23280 /* rot.b r1h,${Dsp-16-u8}[sb] */
23283 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23284 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x746a00 }
23286 /* rot.b r1h,${Dsp-16-u16}[sb] */
23289 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23290 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x746e0000 }
23292 /* rot.b r1h,${Dsp-16-s8}[fb] */
23295 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23296 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x746b00 }
23298 /* rot.b r1h,${Dsp-16-u16} */
23301 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23302 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x746f0000 }
23304 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
23307 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23308 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe920 }
23310 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
23313 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23314 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1a0 }
23316 /* rot.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23319 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23320 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe120 }
23322 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23325 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23326 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe32000 }
23328 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23331 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23332 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5200000 }
23334 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23337 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23338 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7200000 }
23340 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23343 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23344 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3a000 }
23346 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23349 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23350 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5a00000 }
23352 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23355 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23356 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3e000 }
23358 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23361 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23362 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5e00000 }
23364 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23367 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23368 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7e00000 }
23370 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23373 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23374 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7a00000 }
23376 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
23379 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23380 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe820 }
23382 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
23385 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23386 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0a0 }
23388 /* rot.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23391 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23392 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe020 }
23394 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23397 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23398 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe22000 }
23400 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23403 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23404 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4200000 }
23406 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23409 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23410 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6200000 }
23412 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23415 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23416 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2a000 }
23418 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23421 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23422 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4a00000 }
23424 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23427 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23428 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2e000 }
23430 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23433 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23434 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4e00000 }
23436 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23439 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23440 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6e00000 }
23442 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23445 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23446 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6a00000 }
23448 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
23451 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
23452 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe100 }
23454 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
23457 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
23458 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe104 }
23460 /* rot.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
23463 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23464 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe106 }
23466 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23469 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23470 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe10800 }
23472 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23475 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23476 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe10c0000 }
23478 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23481 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23482 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe10a00 }
23484 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23487 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23488 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe10e0000 }
23490 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23493 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23494 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe10b00 }
23496 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23499 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23500 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe10f0000 }
23502 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
23505 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
23506 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe000 }
23508 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
23511 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
23512 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe004 }
23514 /* rot.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
23517 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23518 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe006 }
23520 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23523 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23524 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe00800 }
23526 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23529 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23530 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe00c0000 }
23532 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23535 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23536 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe00a00 }
23538 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23541 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23542 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe00e0000 }
23544 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23547 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23548 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe00b00 }
23550 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23553 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23554 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe00f0000 }
23556 /* rorc.w $Dst32RnUnprefixedHI */
23559 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23560 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92e }
23562 /* rorc.w $Dst32AnUnprefixedHI */
23565 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23566 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1ae }
23568 /* rorc.w [$Dst32AnUnprefixed] */
23571 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23572 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12e }
23574 /* rorc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23577 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23578 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32e00 }
23580 /* rorc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23583 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23584 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52e0000 }
23586 /* rorc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23589 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23590 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72e0000 }
23592 /* rorc.w ${Dsp-16-u8}[sb] */
23595 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23596 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3ae00 }
23598 /* rorc.w ${Dsp-16-u16}[sb] */
23601 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23602 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5ae0000 }
23604 /* rorc.w ${Dsp-16-s8}[fb] */
23607 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23608 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ee00 }
23610 /* rorc.w ${Dsp-16-s16}[fb] */
23613 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23614 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ee0000 }
23616 /* rorc.w ${Dsp-16-u16} */
23619 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23620 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ee0000 }
23622 /* rorc.w ${Dsp-16-u24} */
23625 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23626 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7ae0000 }
23628 /* rorc.b $Dst32RnUnprefixedQI */
23631 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23632 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82e }
23634 /* rorc.b $Dst32AnUnprefixedQI */
23637 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23638 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0ae }
23640 /* rorc.b [$Dst32AnUnprefixed] */
23643 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23644 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02e }
23646 /* rorc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23649 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23650 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22e00 }
23652 /* rorc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23655 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23656 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42e0000 }
23658 /* rorc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23661 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23662 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62e0000 }
23664 /* rorc.b ${Dsp-16-u8}[sb] */
23667 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23668 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2ae00 }
23670 /* rorc.b ${Dsp-16-u16}[sb] */
23673 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23674 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4ae0000 }
23676 /* rorc.b ${Dsp-16-s8}[fb] */
23679 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23680 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ee00 }
23682 /* rorc.b ${Dsp-16-s16}[fb] */
23685 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23686 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ee0000 }
23688 /* rorc.b ${Dsp-16-u16} */
23691 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23692 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ee0000 }
23694 /* rorc.b ${Dsp-16-u24} */
23697 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23698 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6ae0000 }
23700 /* rorc.w $Dst16RnHI */
23703 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23704 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77b0 }
23706 /* rorc.w $Dst16AnHI */
23709 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23710 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77b4 }
23712 /* rorc.w [$Dst16An] */
23715 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23716 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77b6 }
23718 /* rorc.w ${Dsp-16-u8}[$Dst16An] */
23721 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23722 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77b800 }
23724 /* rorc.w ${Dsp-16-u16}[$Dst16An] */
23727 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23728 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77bc0000 }
23730 /* rorc.w ${Dsp-16-u8}[sb] */
23733 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23734 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ba00 }
23736 /* rorc.w ${Dsp-16-u16}[sb] */
23739 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23740 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77be0000 }
23742 /* rorc.w ${Dsp-16-s8}[fb] */
23745 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23746 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77bb00 }
23748 /* rorc.w ${Dsp-16-u16} */
23751 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23752 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77bf0000 }
23754 /* rorc.b $Dst16RnQI */
23757 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
23758 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76b0 }
23760 /* rorc.b $Dst16AnQI */
23763 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
23764 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76b4 }
23766 /* rorc.b [$Dst16An] */
23769 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23770 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76b6 }
23772 /* rorc.b ${Dsp-16-u8}[$Dst16An] */
23775 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23776 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76b800 }
23778 /* rorc.b ${Dsp-16-u16}[$Dst16An] */
23781 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23782 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76bc0000 }
23784 /* rorc.b ${Dsp-16-u8}[sb] */
23787 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23788 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ba00 }
23790 /* rorc.b ${Dsp-16-u16}[sb] */
23793 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23794 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76be0000 }
23796 /* rorc.b ${Dsp-16-s8}[fb] */
23799 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23800 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76bb00 }
23802 /* rorc.b ${Dsp-16-u16} */
23805 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23806 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76bf0000 }
23808 /* rolc.w $Dst32RnUnprefixedHI */
23811 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23812 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92e }
23814 /* rolc.w $Dst32AnUnprefixedHI */
23817 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23818 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1ae }
23820 /* rolc.w [$Dst32AnUnprefixed] */
23823 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23824 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12e }
23826 /* rolc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23829 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23830 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32e00 }
23832 /* rolc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23835 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23836 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52e0000 }
23838 /* rolc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23841 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23842 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72e0000 }
23844 /* rolc.w ${Dsp-16-u8}[sb] */
23847 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23848 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3ae00 }
23850 /* rolc.w ${Dsp-16-u16}[sb] */
23853 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23854 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5ae0000 }
23856 /* rolc.w ${Dsp-16-s8}[fb] */
23859 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23860 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ee00 }
23862 /* rolc.w ${Dsp-16-s16}[fb] */
23865 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23866 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ee0000 }
23868 /* rolc.w ${Dsp-16-u16} */
23871 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23872 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ee0000 }
23874 /* rolc.w ${Dsp-16-u24} */
23877 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23878 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7ae0000 }
23880 /* rolc.b $Dst32RnUnprefixedQI */
23883 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23884 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82e }
23886 /* rolc.b $Dst32AnUnprefixedQI */
23889 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23890 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0ae }
23892 /* rolc.b [$Dst32AnUnprefixed] */
23895 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23896 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02e }
23898 /* rolc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23901 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23902 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22e00 }
23904 /* rolc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23907 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23908 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42e0000 }
23910 /* rolc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23913 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23914 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62e0000 }
23916 /* rolc.b ${Dsp-16-u8}[sb] */
23919 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23920 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2ae00 }
23922 /* rolc.b ${Dsp-16-u16}[sb] */
23925 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23926 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4ae0000 }
23928 /* rolc.b ${Dsp-16-s8}[fb] */
23931 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23932 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ee00 }
23934 /* rolc.b ${Dsp-16-s16}[fb] */
23937 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23938 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ee0000 }
23940 /* rolc.b ${Dsp-16-u16} */
23943 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23944 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ee0000 }
23946 /* rolc.b ${Dsp-16-u24} */
23949 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23950 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6ae0000 }
23952 /* rolc.w $Dst16RnHI */
23955 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23956 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77a0 }
23958 /* rolc.w $Dst16AnHI */
23961 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23962 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77a4 }
23964 /* rolc.w [$Dst16An] */
23967 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23968 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77a6 }
23970 /* rolc.w ${Dsp-16-u8}[$Dst16An] */
23973 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23974 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77a800 }
23976 /* rolc.w ${Dsp-16-u16}[$Dst16An] */
23979 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23980 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ac0000 }
23982 /* rolc.w ${Dsp-16-u8}[sb] */
23985 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23986 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77aa00 }
23988 /* rolc.w ${Dsp-16-u16}[sb] */
23991 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23992 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ae0000 }
23994 /* rolc.w ${Dsp-16-s8}[fb] */
23997 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23998 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77ab00 }
24000 /* rolc.w ${Dsp-16-u16} */
24003 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24004 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77af0000 }
24006 /* rolc.b $Dst16RnQI */
24009 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
24010 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76a0 }
24012 /* rolc.b $Dst16AnQI */
24015 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
24016 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76a4 }
24018 /* rolc.b [$Dst16An] */
24021 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24022 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76a6 }
24024 /* rolc.b ${Dsp-16-u8}[$Dst16An] */
24027 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24028 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76a800 }
24030 /* rolc.b ${Dsp-16-u16}[$Dst16An] */
24033 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24034 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ac0000 }
24036 /* rolc.b ${Dsp-16-u8}[sb] */
24039 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24040 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76aa00 }
24042 /* rolc.b ${Dsp-16-u16}[sb] */
24045 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24046 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ae0000 }
24048 /* rolc.b ${Dsp-16-s8}[fb] */
24051 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24052 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76ab00 }
24054 /* rolc.b ${Dsp-16-u16} */
24057 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24058 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76af0000 }
24060 /* pusha [$Dst32AnUnprefixed] */
24063 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24064 & ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xb001 }
24066 /* pusha ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24069 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24070 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xb20100 }
24072 /* pusha ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24075 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24076 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xb4010000 }
24078 /* pusha ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24081 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24082 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xb6010000 }
24084 /* pusha ${Dsp-16-u8}[sb] */
24087 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24088 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xb28100 }
24090 /* pusha ${Dsp-16-u16}[sb] */
24093 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24094 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xb4810000 }
24096 /* pusha ${Dsp-16-s8}[fb] */
24099 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24100 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xb2c100 }
24102 /* pusha ${Dsp-16-s16}[fb] */
24105 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24106 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xb4c10000 }
24108 /* pusha ${Dsp-16-u16} */
24111 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24112 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xb6c10000 }
24114 /* pusha ${Dsp-16-u24} */
24117 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24118 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xb6810000 }
24120 /* pusha [$Dst16An] */
24123 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24124 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0x7d96 }
24126 /* pusha ${Dsp-16-u8}[$Dst16An] */
24129 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24130 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0x7d9800 }
24132 /* pusha ${Dsp-16-u16}[$Dst16An] */
24135 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24136 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0x7d9c0000 }
24138 /* pusha ${Dsp-16-u8}[sb] */
24141 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24142 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0x7d9a00 }
24144 /* pusha ${Dsp-16-u16}[sb] */
24147 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24148 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0x7d9e0000 }
24150 /* pusha ${Dsp-16-s8}[fb] */
24153 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24154 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0x7d9b00 }
24156 /* pusha ${Dsp-16-u16} */
24159 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24160 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0x7d9f0000 }
24162 /* push.l $Dst32RnUnprefixedSI */
24165 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
24166 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xa801 }
24168 /* push.l $Dst32AnUnprefixedSI */
24171 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
24172 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa081 }
24174 /* push.l [$Dst32AnUnprefixed] */
24177 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24178 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xa001 }
24180 /* push.l ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24183 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24184 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa20100 }
24186 /* push.l ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24189 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24190 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4010000 }
24192 /* push.l ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24195 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24196 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6010000 }
24198 /* push.l ${Dsp-16-u8}[sb] */
24201 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24202 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa28100 }
24204 /* push.l ${Dsp-16-u16}[sb] */
24207 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24208 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4810000 }
24210 /* push.l ${Dsp-16-s8}[fb] */
24213 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24214 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2c100 }
24216 /* push.l ${Dsp-16-s16}[fb] */
24219 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24220 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4c10000 }
24222 /* push.l ${Dsp-16-u16} */
24225 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24226 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6c10000 }
24228 /* push.l ${Dsp-16-u24} */
24231 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24232 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6810000 }
24234 /* push.w${S} ${An16-push-S} */
24237 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24238 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xc2 }
24240 /* push.b${S} ${Rn16-push-S} */
24243 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24244 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x82 }
24246 /* push.w $Dst32RnUnprefixedHI */
24249 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24250 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90e }
24252 /* push.w $Dst32AnUnprefixedHI */
24255 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24256 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18e }
24258 /* push.w [$Dst32AnUnprefixed] */
24261 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24262 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10e }
24264 /* push.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24267 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24268 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30e00 }
24270 /* push.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24273 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24274 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50e0000 }
24276 /* push.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24279 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24280 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70e0000 }
24282 /* push.w ${Dsp-16-u8}[sb] */
24285 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24286 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38e00 }
24288 /* push.w ${Dsp-16-u16}[sb] */
24291 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24292 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58e0000 }
24294 /* push.w ${Dsp-16-s8}[fb] */
24297 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24298 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ce00 }
24300 /* push.w ${Dsp-16-s16}[fb] */
24303 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24304 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ce0000 }
24306 /* push.w ${Dsp-16-u16} */
24309 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24310 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ce0000 }
24312 /* push.w ${Dsp-16-u24} */
24315 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24316 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78e0000 }
24318 /* push.b $Dst32RnUnprefixedQI */
24321 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24322 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc80e }
24324 /* push.b $Dst32AnUnprefixedQI */
24327 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24328 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc08e }
24330 /* push.b [$Dst32AnUnprefixed] */
24333 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24334 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc00e }
24336 /* push.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24339 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24340 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20e00 }
24342 /* push.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24345 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24346 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40e0000 }
24348 /* push.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24351 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24352 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60e0000 }
24354 /* push.b ${Dsp-16-u8}[sb] */
24357 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24358 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28e00 }
24360 /* push.b ${Dsp-16-u16}[sb] */
24363 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24364 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48e0000 }
24366 /* push.b ${Dsp-16-s8}[fb] */
24369 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24370 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ce00 }
24372 /* push.b ${Dsp-16-s16}[fb] */
24375 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24376 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ce0000 }
24378 /* push.b ${Dsp-16-u16} */
24381 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24382 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ce0000 }
24384 /* push.b ${Dsp-16-u24} */
24387 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24388 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68e0000 }
24390 /* push.w${G} $Dst16RnHI */
24393 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24394 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7540 }
24396 /* push.w${G} $Dst16AnHI */
24399 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24400 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7544 }
24402 /* push.w${G} [$Dst16An] */
24405 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24406 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7546 }
24408 /* push.w${G} ${Dsp-16-u8}[$Dst16An] */
24411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24412 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x754800 }
24414 /* push.w${G} ${Dsp-16-u16}[$Dst16An] */
24417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24418 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x754c0000 }
24420 /* push.w${G} ${Dsp-16-u8}[sb] */
24423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24424 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x754a00 }
24426 /* push.w${G} ${Dsp-16-u16}[sb] */
24429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24430 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x754e0000 }
24432 /* push.w${G} ${Dsp-16-s8}[fb] */
24435 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24436 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x754b00 }
24438 /* push.w${G} ${Dsp-16-u16} */
24441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24442 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x754f0000 }
24444 /* push.b${G} $Dst16RnQI */
24447 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24448 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7440 }
24450 /* push.b${G} $Dst16AnQI */
24453 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24454 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7444 }
24456 /* push.b${G} [$Dst16An] */
24459 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24460 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7446 }
24462 /* push.b${G} ${Dsp-16-u8}[$Dst16An] */
24465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24466 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x744800 }
24468 /* push.b${G} ${Dsp-16-u16}[$Dst16An] */
24471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24472 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x744c0000 }
24474 /* push.b${G} ${Dsp-16-u8}[sb] */
24477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24478 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x744a00 }
24480 /* push.b${G} ${Dsp-16-u16}[sb] */
24483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24484 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x744e0000 }
24486 /* push.b${G} ${Dsp-16-s8}[fb] */
24489 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24490 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x744b00 }
24492 /* push.b${G} ${Dsp-16-u16} */
24495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24496 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x744f0000 }
24498 /* pop.w${S} ${An16-push-S} */
24501 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24502 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xd2 }
24504 /* pop.b${S} ${Rn16-push-S} */
24507 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24508 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x92 }
24510 /* pop.w $Dst32RnUnprefixedHI */
24513 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24514 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92f }
24516 /* pop.w $Dst32AnUnprefixedHI */
24519 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24520 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1af }
24522 /* pop.w [$Dst32AnUnprefixed] */
24525 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24526 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12f }
24528 /* pop.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24531 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24532 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32f00 }
24534 /* pop.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24537 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24538 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52f0000 }
24540 /* pop.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24543 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24544 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72f0000 }
24546 /* pop.w ${Dsp-16-u8}[sb] */
24549 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24550 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3af00 }
24552 /* pop.w ${Dsp-16-u16}[sb] */
24555 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24556 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5af0000 }
24558 /* pop.w ${Dsp-16-s8}[fb] */
24561 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24562 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ef00 }
24564 /* pop.w ${Dsp-16-s16}[fb] */
24567 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24568 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ef0000 }
24570 /* pop.w ${Dsp-16-u16} */
24573 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24574 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ef0000 }
24576 /* pop.w ${Dsp-16-u24} */
24579 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24580 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7af0000 }
24582 /* pop.b $Dst32RnUnprefixedQI */
24585 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24586 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82f }
24588 /* pop.b $Dst32AnUnprefixedQI */
24591 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24592 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0af }
24594 /* pop.b [$Dst32AnUnprefixed] */
24597 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24598 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02f }
24600 /* pop.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24603 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24604 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22f00 }
24606 /* pop.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24609 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24610 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42f0000 }
24612 /* pop.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24615 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24616 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62f0000 }
24618 /* pop.b ${Dsp-16-u8}[sb] */
24621 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24622 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2af00 }
24624 /* pop.b ${Dsp-16-u16}[sb] */
24627 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24628 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4af0000 }
24630 /* pop.b ${Dsp-16-s8}[fb] */
24633 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24634 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ef00 }
24636 /* pop.b ${Dsp-16-s16}[fb] */
24639 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24640 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ef0000 }
24642 /* pop.b ${Dsp-16-u16} */
24645 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24646 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ef0000 }
24648 /* pop.b ${Dsp-16-u24} */
24651 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24652 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6af0000 }
24654 /* pop.w${G} $Dst16RnHI */
24657 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24658 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75d0 }
24660 /* pop.w${G} $Dst16AnHI */
24663 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24664 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75d4 }
24666 /* pop.w${G} [$Dst16An] */
24669 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24670 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75d6 }
24672 /* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
24675 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24676 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75d800 }
24678 /* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
24681 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24682 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75dc0000 }
24684 /* pop.w${G} ${Dsp-16-u8}[sb] */
24687 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24688 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75da00 }
24690 /* pop.w${G} ${Dsp-16-u16}[sb] */
24693 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24694 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75de0000 }
24696 /* pop.w${G} ${Dsp-16-s8}[fb] */
24699 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24700 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75db00 }
24702 /* pop.w${G} ${Dsp-16-u16} */
24705 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24706 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75df0000 }
24708 /* pop.b${G} $Dst16RnQI */
24711 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24712 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74d0 }
24714 /* pop.b${G} $Dst16AnQI */
24717 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24718 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74d4 }
24720 /* pop.b${G} [$Dst16An] */
24723 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24724 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74d6 }
24726 /* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
24729 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24730 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74d800 }
24732 /* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
24735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24736 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74dc0000 }
24738 /* pop.b${G} ${Dsp-16-u8}[sb] */
24741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24742 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74da00 }
24744 /* pop.b${G} ${Dsp-16-u16}[sb] */
24747 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24748 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74de0000 }
24750 /* pop.b${G} ${Dsp-16-s8}[fb] */
24753 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24754 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74db00 }
24756 /* pop.b${G} ${Dsp-16-u16} */
24759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24760 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74df0000 }
24762 /* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
24765 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
24766 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x18 }
24768 /* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
24771 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24772 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1900 }
24774 /* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
24777 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24778 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1a00 }
24780 /* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
24783 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
24784 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x1b0000 }
24786 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
24789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24790 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990500 }
24792 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
24795 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24796 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992500 }
24798 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
24801 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24802 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993500 }
24804 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
24807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24808 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918500 }
24810 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
24813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24814 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a500 }
24816 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
24819 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24820 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b500 }
24822 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
24825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24826 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910500 }
24828 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
24831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24832 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912500 }
24834 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
24837 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24838 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913500 }
24840 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24844 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93050000 }
24846 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24850 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93250000 }
24852 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24855 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24856 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93350000 }
24858 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24862 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95050000 }
24864 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24868 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95250000 }
24870 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24873 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24874 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95350000 }
24876 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24880 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97050000 }
24882 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24886 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97250000 }
24888 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24891 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24892 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97350000 }
24894 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
24897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24898 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93850000 }
24900 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
24903 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24904 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a50000 }
24906 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
24909 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24910 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b50000 }
24912 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
24915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24916 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95850000 }
24918 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
24921 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24922 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a50000 }
24924 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
24927 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24928 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b50000 }
24930 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
24933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24934 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c50000 }
24936 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
24939 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24940 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e50000 }
24942 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
24945 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24946 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f50000 }
24948 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
24951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24952 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c50000 }
24954 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
24957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24958 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e50000 }
24960 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
24963 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24964 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f50000 }
24966 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
24969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
24970 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c50000 }
24972 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
24975 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24976 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e50000 }
24978 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
24981 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24982 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f50000 }
24984 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
24987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
24988 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97850000 }
24990 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
24993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
24994 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a50000 }
24996 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
24999 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25000 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b50000 }
25002 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25006 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9050000 }
25008 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
25011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25012 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9250000 }
25014 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
25017 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25018 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9350000 }
25020 /* or.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
25023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25024 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9350000 }
25026 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25030 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1850000 }
25032 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
25035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25036 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a50000 }
25038 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
25041 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25042 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b50000 }
25044 /* or.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
25047 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25048 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b50000 }
25050 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25054 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1050000 }
25056 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25059 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25060 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1250000 }
25062 /* or.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25065 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25066 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1350000 }
25068 /* or.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25072 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1350000 }
25074 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25078 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3050000 }
25080 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25084 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3250000 }
25086 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25089 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25090 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3350000 }
25092 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25096 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3350000 }
25098 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25102 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5050000 }
25104 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25107 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25108 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5250000 }
25110 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25113 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25114 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5350000 }
25116 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25119 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25120 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5350000 }
25122 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25126 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7050000 }
25128 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25131 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25132 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7250000 }
25134 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25137 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25138 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7350000 }
25140 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
25143 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25144 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7350000 }
25146 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
25149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25150 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3850000 }
25152 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
25155 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25156 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a50000 }
25158 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
25161 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25162 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b50000 }
25164 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
25167 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25168 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b50000 }
25170 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
25173 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25174 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5850000 }
25176 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
25179 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25180 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a50000 }
25182 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
25185 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25186 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b50000 }
25188 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
25191 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25192 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b50000 }
25194 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
25197 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25198 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c50000 }
25200 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
25203 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25204 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e50000 }
25206 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
25209 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25210 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f50000 }
25212 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
25215 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25216 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f50000 }
25218 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
25221 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25222 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c50000 }
25224 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
25227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25228 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e50000 }
25230 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
25233 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25234 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f50000 }
25236 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
25239 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25240 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f50000 }
25242 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
25245 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
25246 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c50000 }
25248 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
25251 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25252 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e50000 }
25254 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
25257 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25258 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f50000 }
25260 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
25263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
25264 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f50000 }
25266 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
25269 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
25270 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7850000 }
25272 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
25275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25276 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a50000 }
25278 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
25281 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25282 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b50000 }
25284 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
25287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
25288 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b50000 }
25290 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25293 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25294 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9050000 }
25296 /* or.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
25299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25300 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9250000 }
25302 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25305 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25306 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1850000 }
25308 /* or.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
25311 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25312 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a50000 }
25314 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25317 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25318 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1050000 }
25320 /* or.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
25323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25324 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1250000 }
25326 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
25329 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25330 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3050000 }
25332 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
25335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25336 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3250000 }
25338 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
25341 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25342 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5050000 }
25344 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
25347 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25348 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5250000 }
25350 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
25353 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25354 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7050000 }
25356 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
25359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25360 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7250000 }
25362 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
25365 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25366 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3850000 }
25368 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
25371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25372 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a50000 }
25374 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
25377 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25378 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5850000 }
25380 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
25383 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25384 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a50000 }
25386 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
25389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25390 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c50000 }
25392 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
25395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25396 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e50000 }
25398 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
25401 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25402 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c50000 }
25404 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
25407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25408 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e50000 }
25410 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
25413 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
25414 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c50000 }
25416 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
25419 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
25420 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e50000 }
25422 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
25425 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
25426 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7850000 }
25428 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
25431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
25432 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a50000 }
25434 /* or.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
25437 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25438 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc905 }
25440 /* or.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
25443 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25444 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8925 }
25446 /* or.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25449 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25450 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8905 }
25452 /* or.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
25455 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25456 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc185 }
25458 /* or.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
25461 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25462 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a5 }
25464 /* or.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25467 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25468 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8185 }
25470 /* or.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
25473 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25474 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc105 }
25476 /* or.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
25479 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25480 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8125 }
25482 /* or.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25485 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25486 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8105 }
25488 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25491 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25492 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30500 }
25494 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25497 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25498 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832500 }
25500 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
25503 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25504 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830500 }
25506 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25509 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25510 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5050000 }
25512 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25515 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25516 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85250000 }
25518 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
25521 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25522 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85050000 }
25524 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25527 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25528 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7050000 }
25530 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25533 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25534 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87250000 }
25536 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
25539 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25540 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87050000 }
25542 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
25545 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25546 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38500 }
25548 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
25551 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25552 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a500 }
25554 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
25557 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25558 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838500 }
25560 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
25563 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25564 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5850000 }
25566 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
25569 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25570 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a50000 }
25572 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
25575 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25576 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85850000 }
25578 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
25581 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25582 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c500 }
25584 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
25587 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25588 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e500 }
25590 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
25593 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25594 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c500 }
25596 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
25599 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25600 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c50000 }
25602 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
25605 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25606 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e50000 }
25608 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
25611 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25612 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c50000 }
25614 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
25617 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25618 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c50000 }
25620 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
25623 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25624 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e50000 }
25626 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
25629 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
25630 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c50000 }
25632 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
25635 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25636 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7850000 }
25638 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
25641 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25642 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a50000 }
25644 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
25647 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
25648 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87850000 }
25650 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25654 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980500 }
25656 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
25659 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25660 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982500 }
25662 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
25665 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25666 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983500 }
25668 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25672 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908500 }
25674 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
25677 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25678 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a500 }
25680 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
25683 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25684 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b500 }
25686 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25690 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900500 }
25692 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
25695 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25696 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902500 }
25698 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
25701 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25702 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903500 }
25704 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25708 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92050000 }
25710 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25713 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25714 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92250000 }
25716 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25719 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25720 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92350000 }
25722 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25725 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25726 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94050000 }
25728 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25731 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25732 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94250000 }
25734 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25737 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25738 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94350000 }
25740 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25744 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96050000 }
25746 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25749 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25750 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96250000 }
25752 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25755 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25756 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96350000 }
25758 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
25761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25762 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92850000 }
25764 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
25767 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25768 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a50000 }
25770 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
25773 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25774 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b50000 }
25776 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
25779 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25780 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94850000 }
25782 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
25785 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25786 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a50000 }
25788 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
25791 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25792 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b50000 }
25794 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
25797 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25798 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c50000 }
25800 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
25803 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25804 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e50000 }
25806 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
25809 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25810 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f50000 }
25812 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
25815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25816 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c50000 }
25818 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
25821 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25822 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e50000 }
25824 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
25827 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25828 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f50000 }
25830 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
25833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
25834 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c50000 }
25836 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
25839 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25840 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e50000 }
25842 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
25845 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25846 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f50000 }
25848 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
25851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
25852 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96850000 }
25854 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
25857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25858 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a50000 }
25860 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
25863 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25864 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b50000 }
25866 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25870 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8050000 }
25872 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
25875 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25876 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8250000 }
25878 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
25881 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25882 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8350000 }
25884 /* or.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
25887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25888 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8350000 }
25890 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25894 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0850000 }
25896 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
25899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25900 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a50000 }
25902 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
25905 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25906 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b50000 }
25908 /* or.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
25911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25912 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b50000 }
25914 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25918 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0050000 }
25920 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25923 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25924 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0250000 }
25926 /* or.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25929 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25930 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0350000 }
25932 /* or.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25936 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0350000 }
25938 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25942 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2050000 }
25944 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25948 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2250000 }
25950 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25953 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25954 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2350000 }
25956 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25960 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2350000 }
25962 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25966 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4050000 }
25968 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25972 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4250000 }
25974 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25977 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25978 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4350000 }
25980 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25984 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4350000 }
25986 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25990 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6050000 }
25992 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25996 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6250000 }
25998 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
26001 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26002 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6350000 }
26004 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
26007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26008 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6350000 }
26010 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
26013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26014 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2850000 }
26016 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26020 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a50000 }
26022 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
26025 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26026 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b50000 }
26028 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26032 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b50000 }
26034 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
26037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26038 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4850000 }
26040 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26044 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a50000 }
26046 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
26049 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26050 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b50000 }
26052 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26056 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b50000 }
26058 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
26061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26062 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c50000 }
26064 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26068 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e50000 }
26070 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
26073 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26074 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f50000 }
26076 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26080 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f50000 }
26082 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
26085 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26086 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c50000 }
26088 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
26091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26092 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e50000 }
26094 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
26097 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26098 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f50000 }
26100 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
26103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26104 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f50000 }
26106 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
26109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
26110 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c50000 }
26112 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26116 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e50000 }
26118 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
26121 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26122 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f50000 }
26124 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
26127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26128 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f50000 }
26130 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
26133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
26134 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6850000 }
26136 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
26139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26140 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a50000 }
26142 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
26145 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26146 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b50000 }
26148 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
26151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
26152 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b50000 }
26154 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26158 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8050000 }
26160 /* or.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
26163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26164 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8250000 }
26166 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26170 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0850000 }
26172 /* or.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
26175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26176 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a50000 }
26178 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26182 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0050000 }
26184 /* or.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
26187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26188 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0250000 }
26190 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
26193 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26194 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2050000 }
26196 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
26199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26200 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2250000 }
26202 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
26205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26206 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4050000 }
26208 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
26211 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26212 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4250000 }
26214 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
26217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26218 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6050000 }
26220 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
26223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26224 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6250000 }
26226 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
26229 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26230 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2850000 }
26232 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
26235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26236 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a50000 }
26238 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
26241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26242 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4850000 }
26244 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
26247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26248 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a50000 }
26250 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
26253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26254 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c50000 }
26256 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
26259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26260 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e50000 }
26262 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
26265 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26266 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c50000 }
26268 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
26271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26272 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e50000 }
26274 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
26277 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
26278 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c50000 }
26280 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
26283 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
26284 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e50000 }
26286 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
26289 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
26290 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6850000 }
26292 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
26295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
26296 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a50000 }
26298 /* or.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
26301 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26302 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc805 }
26304 /* or.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
26307 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26308 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8825 }
26310 /* or.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26313 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26314 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8805 }
26316 /* or.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
26319 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26320 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc085 }
26322 /* or.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
26325 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26326 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a5 }
26328 /* or.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26331 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26332 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8085 }
26334 /* or.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
26337 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26338 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc005 }
26340 /* or.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
26343 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26344 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8025 }
26346 /* or.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26349 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26350 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8005 }
26352 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26355 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26356 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20500 }
26358 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26361 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26362 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822500 }
26364 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
26367 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26368 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820500 }
26370 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26373 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26374 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4050000 }
26376 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26379 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26380 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84250000 }
26382 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
26385 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26386 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84050000 }
26388 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26391 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26392 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6050000 }
26394 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26397 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26398 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86250000 }
26400 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
26403 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26404 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86050000 }
26406 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
26409 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26410 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28500 }
26412 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
26415 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26416 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a500 }
26418 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
26421 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26422 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828500 }
26424 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
26427 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26428 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4850000 }
26430 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
26433 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26434 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a50000 }
26436 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
26439 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26440 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84850000 }
26442 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
26445 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26446 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c500 }
26448 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
26451 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26452 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e500 }
26454 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
26457 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26458 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c500 }
26460 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
26463 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26464 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c50000 }
26466 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
26469 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26470 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e50000 }
26472 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
26475 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26476 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c50000 }
26478 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
26481 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26482 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c50000 }
26484 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
26487 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26488 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e50000 }
26490 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
26493 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
26494 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c50000 }
26496 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
26499 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26500 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6850000 }
26502 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
26505 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26506 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a50000 }
26508 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
26511 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
26512 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86850000 }
26514 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
26517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26518 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x998000 }
26520 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
26523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26524 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99a000 }
26526 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
26529 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26530 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x99b000 }
26532 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
26535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26536 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x998400 }
26538 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
26541 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26542 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x99a400 }
26544 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
26547 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26548 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x99b400 }
26550 /* or.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
26553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26554 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x998600 }
26556 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
26559 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26560 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x99a600 }
26562 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
26565 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26566 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x99b600 }
26568 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
26571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26572 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x99880000 }
26574 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
26577 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26578 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99a80000 }
26580 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
26583 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26584 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99b80000 }
26586 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
26589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26590 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x998c0000 }
26592 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
26595 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26596 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99ac0000 }
26598 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
26601 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26602 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99bc0000 }
26604 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
26607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26608 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x998a0000 }
26610 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
26613 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26614 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99aa0000 }
26616 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
26619 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26620 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99ba0000 }
26622 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
26625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26626 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x998e0000 }
26628 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
26631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26632 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99ae0000 }
26634 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
26637 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26638 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99be0000 }
26640 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
26643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26644 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x998b0000 }
26646 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
26649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26650 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99ab0000 }
26652 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
26655 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26656 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99bb0000 }
26658 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
26661 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
26662 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x998f0000 }
26664 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
26667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26668 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x99af0000 }
26670 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
26673 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26674 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x99bf0000 }
26676 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
26679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26680 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x99c00000 }
26682 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
26685 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26686 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99e00000 }
26688 /* or.w${G} ${Dsp-16-u16},$Dst16RnHI */
26691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
26692 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x99f00000 }
26694 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
26697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26698 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x99c40000 }
26700 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
26703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26704 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x99e40000 }
26706 /* or.w${G} ${Dsp-16-u16},$Dst16AnHI */
26709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
26710 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x99f40000 }
26712 /* or.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
26715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26716 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x99c60000 }
26718 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
26721 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26722 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x99e60000 }
26724 /* or.w${G} ${Dsp-16-u16},[$Dst16An] */
26727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
26728 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x99f60000 }
26730 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
26733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26734 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x99c80000 }
26736 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
26739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26740 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x99e80000 }
26742 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
26745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26746 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x99f80000 }
26748 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
26751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26752 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x99cc0000 }
26754 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
26757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26758 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x99ec0000 }
26760 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
26763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26764 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x99fc0000 }
26766 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
26769 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26770 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ca0000 }
26772 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26776 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ea0000 }
26778 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26782 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x99fa0000 }
26784 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
26787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26788 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ce0000 }
26790 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26793 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26794 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ee0000 }
26796 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26800 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x99fe0000 }
26802 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
26805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26806 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99cb0000 }
26808 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26812 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99eb0000 }
26814 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26818 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x99fb0000 }
26820 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
26823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
26824 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x99cf0000 }
26826 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26830 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x99ef0000 }
26832 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
26835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26836 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x99ff0000 }
26838 /* or.w${G} $Src16RnHI,$Dst16RnHI */
26841 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
26842 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9900 }
26844 /* or.w${G} $Src16AnHI,$Dst16RnHI */
26847 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
26848 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9940 }
26850 /* or.w${G} [$Src16An],$Dst16RnHI */
26853 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26854 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9960 }
26856 /* or.w${G} $Src16RnHI,$Dst16AnHI */
26859 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
26860 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9904 }
26862 /* or.w${G} $Src16AnHI,$Dst16AnHI */
26865 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
26866 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9944 }
26868 /* or.w${G} [$Src16An],$Dst16AnHI */
26871 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26872 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9964 }
26874 /* or.w${G} $Src16RnHI,[$Dst16An] */
26877 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26878 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9906 }
26880 /* or.w${G} $Src16AnHI,[$Dst16An] */
26883 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26884 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9946 }
26886 /* or.w${G} [$Src16An],[$Dst16An] */
26889 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26890 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9966 }
26892 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
26895 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26896 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x990800 }
26898 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
26901 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26902 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x994800 }
26904 /* or.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
26907 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26908 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x996800 }
26910 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
26913 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26914 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x990c0000 }
26916 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
26919 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26920 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x994c0000 }
26922 /* or.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
26925 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26926 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x996c0000 }
26928 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
26931 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26932 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x990a00 }
26934 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
26937 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26938 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x994a00 }
26940 /* or.w${G} [$Src16An],${Dsp-16-u8}[sb] */
26943 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26944 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x996a00 }
26946 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
26949 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26950 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x990e0000 }
26952 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
26955 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26956 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x994e0000 }
26958 /* or.w${G} [$Src16An],${Dsp-16-u16}[sb] */
26961 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26962 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x996e0000 }
26964 /* or.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
26967 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26968 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x990b00 }
26970 /* or.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
26973 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26974 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x994b00 }
26976 /* or.w${G} [$Src16An],${Dsp-16-s8}[fb] */
26979 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26980 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x996b00 }
26982 /* or.w${G} $Src16RnHI,${Dsp-16-u16} */
26985 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
26986 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x990f0000 }
26988 /* or.w${G} $Src16AnHI,${Dsp-16-u16} */
26991 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
26992 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x994f0000 }
26994 /* or.w${G} [$Src16An],${Dsp-16-u16} */
26997 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
26998 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x996f0000 }
27000 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
27003 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27004 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x988000 }
27006 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
27009 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27010 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98a000 }
27012 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
27015 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27016 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x98b000 }
27018 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
27021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27022 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x988400 }
27024 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
27027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27028 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x98a400 }
27030 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
27033 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27034 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x98b400 }
27036 /* or.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
27039 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27040 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x988600 }
27042 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
27045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27046 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x98a600 }
27048 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
27051 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27052 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x98b600 }
27054 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
27057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27058 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x98880000 }
27060 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
27063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27064 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98a80000 }
27066 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
27069 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27070 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98b80000 }
27072 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
27075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27076 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x988c0000 }
27078 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
27081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27082 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98ac0000 }
27084 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
27087 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27088 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98bc0000 }
27090 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
27093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27094 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x988a0000 }
27096 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
27099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27100 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98aa0000 }
27102 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
27105 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27106 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98ba0000 }
27108 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
27111 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27112 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x988e0000 }
27114 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
27117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27118 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98ae0000 }
27120 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
27123 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27124 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98be0000 }
27126 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
27129 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27130 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x988b0000 }
27132 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
27135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27136 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98ab0000 }
27138 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
27141 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27142 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98bb0000 }
27144 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
27147 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
27148 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x988f0000 }
27150 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
27153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27154 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x98af0000 }
27156 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
27159 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27160 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x98bf0000 }
27162 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
27165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27166 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x98c00000 }
27168 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
27171 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27172 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98e00000 }
27174 /* or.b${G} ${Dsp-16-u16},$Dst16RnQI */
27177 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
27178 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x98f00000 }
27180 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
27183 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27184 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x98c40000 }
27186 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
27189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27190 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x98e40000 }
27192 /* or.b${G} ${Dsp-16-u16},$Dst16AnQI */
27195 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
27196 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x98f40000 }
27198 /* or.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
27201 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27202 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x98c60000 }
27204 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
27207 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27208 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x98e60000 }
27210 /* or.b${G} ${Dsp-16-u16},[$Dst16An] */
27213 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
27214 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x98f60000 }
27216 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
27219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27220 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x98c80000 }
27222 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
27225 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27226 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x98e80000 }
27228 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
27231 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27232 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x98f80000 }
27234 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
27237 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27238 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x98cc0000 }
27240 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
27243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27244 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x98ec0000 }
27246 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
27249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27250 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x98fc0000 }
27252 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
27255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27256 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ca0000 }
27258 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
27261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27262 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ea0000 }
27264 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
27267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27268 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x98fa0000 }
27270 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
27273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27274 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ce0000 }
27276 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
27279 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27280 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ee0000 }
27282 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
27285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27286 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x98fe0000 }
27288 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
27291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27292 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98cb0000 }
27294 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
27297 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27298 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98eb0000 }
27300 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
27303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27304 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x98fb0000 }
27306 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
27309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
27310 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x98cf0000 }
27312 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
27315 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
27316 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x98ef0000 }
27318 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
27321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
27322 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x98ff0000 }
27324 /* or.b${G} $Src16RnQI,$Dst16RnQI */
27327 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
27328 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9800 }
27330 /* or.b${G} $Src16AnQI,$Dst16RnQI */
27333 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
27334 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9840 }
27336 /* or.b${G} [$Src16An],$Dst16RnQI */
27339 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27340 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9860 }
27342 /* or.b${G} $Src16RnQI,$Dst16AnQI */
27345 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
27346 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9804 }
27348 /* or.b${G} $Src16AnQI,$Dst16AnQI */
27351 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
27352 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9844 }
27354 /* or.b${G} [$Src16An],$Dst16AnQI */
27357 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27358 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9864 }
27360 /* or.b${G} $Src16RnQI,[$Dst16An] */
27363 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27364 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9806 }
27366 /* or.b${G} $Src16AnQI,[$Dst16An] */
27369 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27370 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9846 }
27372 /* or.b${G} [$Src16An],[$Dst16An] */
27375 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27376 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9866 }
27378 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
27381 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27382 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x980800 }
27384 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
27387 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27388 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x984800 }
27390 /* or.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
27393 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27394 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x986800 }
27396 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
27399 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27400 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x980c0000 }
27402 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
27405 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27406 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x984c0000 }
27408 /* or.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
27411 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27412 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x986c0000 }
27414 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
27417 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27418 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x980a00 }
27420 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
27423 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27424 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x984a00 }
27426 /* or.b${G} [$Src16An],${Dsp-16-u8}[sb] */
27429 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27430 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x986a00 }
27432 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
27435 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27436 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x980e0000 }
27438 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
27441 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27442 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x984e0000 }
27444 /* or.b${G} [$Src16An],${Dsp-16-u16}[sb] */
27447 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27448 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x986e0000 }
27450 /* or.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
27453 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27454 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x980b00 }
27456 /* or.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
27459 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27460 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x984b00 }
27462 /* or.b${G} [$Src16An],${Dsp-16-s8}[fb] */
27465 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27466 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x986b00 }
27468 /* or.b${G} $Src16RnQI,${Dsp-16-u16} */
27471 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
27472 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x980f0000 }
27474 /* or.b${G} $Src16AnQI,${Dsp-16-u16} */
27477 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
27478 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x984f0000 }
27480 /* or.b${G} [$Src16An],${Dsp-16-u16} */
27483 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
27484 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x986f0000 }
27486 /* or.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
27489 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27490 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x65000000 }
27492 /* or.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
27495 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27496 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x75000000 }
27498 /* or.w${S} #${Imm-24-HI},${Dsp-8-u16} */
27501 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
27502 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x55000000 }
27504 /* or.w${S} #${Imm-8-HI},r0 */
27507 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
27508 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x450000 }
27510 /* or.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
27513 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27514 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x640000 }
27516 /* or.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
27519 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27520 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x740000 }
27522 /* or.b${S} #${Imm-24-QI},${Dsp-8-u16} */
27525 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
27526 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x54000000 }
27528 /* or.b${S} #${Imm-8-QI},r0l */
27531 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27532 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4400 }
27534 /* or.b${S} #${Imm-8-QI},r0l */
27537 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27538 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9c00 }
27540 /* or.b${S} #${Imm-8-QI},r0h */
27543 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
27544 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9b00 }
27546 /* or.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
27549 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27550 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x9d0000 }
27552 /* or.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
27555 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27556 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x9e0000 }
27558 /* or.b${S} #${Imm-8-QI},${Dsp-16-u16} */
27561 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
27562 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x9f000000 }
27564 /* or.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
27567 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
27568 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892f0000 }
27570 /* or.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
27573 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
27574 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81af0000 }
27576 /* or.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
27579 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27580 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812f0000 }
27582 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27585 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27586 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832f0000 }
27588 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27591 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27592 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83af0000 }
27594 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27597 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27598 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ef0000 }
27600 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27603 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27604 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852f0000 }
27606 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27609 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27610 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85af0000 }
27612 /* or.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
27615 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27616 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ef0000 }
27618 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27621 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27622 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ef0000 }
27624 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27627 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27628 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872f0000 }
27630 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24} */
27633 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
27634 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87af0000 }
27636 /* or.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
27639 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
27640 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882f00 }
27642 /* or.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
27645 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
27646 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80af00 }
27648 /* or.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
27651 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27652 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802f00 }
27654 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27657 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27658 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822f0000 }
27660 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27663 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27664 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82af0000 }
27666 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27669 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27670 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ef0000 }
27672 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27675 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27676 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842f0000 }
27678 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27681 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27682 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84af0000 }
27684 /* or.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
27687 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27688 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ef0000 }
27690 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27693 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27694 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ef0000 }
27696 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27699 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27700 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862f0000 }
27702 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24} */
27705 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
27706 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86af0000 }
27708 /* or.w${G} #${Imm-16-HI},$Dst16RnHI */
27711 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
27712 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77300000 }
27714 /* or.w${G} #${Imm-16-HI},$Dst16AnHI */
27717 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
27718 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77340000 }
27720 /* or.w${G} #${Imm-16-HI},[$Dst16An] */
27723 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
27724 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77360000 }
27726 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
27729 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27730 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77380000 }
27732 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27735 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27736 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x773a0000 }
27738 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27741 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27742 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x773b0000 }
27744 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
27747 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27748 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x773c0000 }
27750 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27753 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27754 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x773e0000 }
27756 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27759 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27760 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x773f0000 }
27762 /* or.b${G} #${Imm-16-QI},$Dst16RnQI */
27765 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
27766 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x763000 }
27768 /* or.b${G} #${Imm-16-QI},$Dst16AnQI */
27771 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
27772 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x763400 }
27774 /* or.b${G} #${Imm-16-QI},[$Dst16An] */
27777 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
27778 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x763600 }
27780 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
27783 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27784 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76380000 }
27786 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27789 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27790 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x763a0000 }
27792 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27795 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27796 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x763b0000 }
27798 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
27801 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27802 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x763c0000 }
27804 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27807 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27808 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x763e0000 }
27810 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27813 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27814 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x763f0000 }
27819 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
27820 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xbc }
27825 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
27826 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xbb }
27828 /* not.b:s ${Dsp-8-u8}[sb] */
27831 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27832 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xbd00 }
27834 /* not.b:s ${Dsp-8-s8}[fb] */
27837 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27838 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xbe00 }
27840 /* not.b:s ${Dsp-8-u16} */
27843 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
27844 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xbf0000 }
27846 /* not.w${G} $Dst32RnUnprefixedHI */
27849 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
27850 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91e }
27852 /* not.w${G} $Dst32AnUnprefixedHI */
27855 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
27856 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19e }
27858 /* not.w${G} [$Dst32AnUnprefixed] */
27861 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27862 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11e }
27864 /* not.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27868 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31e00 }
27870 /* not.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27873 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27874 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51e0000 }
27876 /* not.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27880 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71e0000 }
27882 /* not.w${G} ${Dsp-16-u8}[sb] */
27885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27886 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39e00 }
27888 /* not.w${G} ${Dsp-16-u16}[sb] */
27891 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27892 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59e0000 }
27894 /* not.w${G} ${Dsp-16-s8}[fb] */
27897 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27898 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3de00 }
27900 /* not.w${G} ${Dsp-16-s16}[fb] */
27903 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27904 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5de0000 }
27906 /* not.w${G} ${Dsp-16-u16} */
27909 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27910 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7de0000 }
27912 /* not.w${G} ${Dsp-16-u24} */
27915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27916 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79e0000 }
27918 /* not.b${G} $Dst32RnUnprefixedQI */
27921 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
27922 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81e }
27924 /* not.b${G} $Dst32AnUnprefixedQI */
27927 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
27928 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09e }
27930 /* not.b${G} [$Dst32AnUnprefixed] */
27933 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27934 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01e }
27936 /* not.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27939 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27940 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21e00 }
27942 /* not.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27946 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41e0000 }
27948 /* not.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27952 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61e0000 }
27954 /* not.b${G} ${Dsp-16-u8}[sb] */
27957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27958 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29e00 }
27960 /* not.b${G} ${Dsp-16-u16}[sb] */
27963 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27964 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49e0000 }
27966 /* not.b${G} ${Dsp-16-s8}[fb] */
27969 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27970 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2de00 }
27972 /* not.b${G} ${Dsp-16-s16}[fb] */
27975 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27976 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4de0000 }
27978 /* not.b${G} ${Dsp-16-u16} */
27981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27982 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6de0000 }
27984 /* not.b${G} ${Dsp-16-u24} */
27987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27988 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69e0000 }
27990 /* not.w${G} $Dst16RnHI */
27993 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
27994 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7570 }
27996 /* not.w${G} $Dst16AnHI */
27999 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
28000 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7574 }
28002 /* not.w${G} [$Dst16An] */
28005 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28006 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7576 }
28008 /* not.w${G} ${Dsp-16-u8}[$Dst16An] */
28011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28012 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x757800 }
28014 /* not.w${G} ${Dsp-16-u16}[$Dst16An] */
28017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28018 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x757c0000 }
28020 /* not.w${G} ${Dsp-16-u8}[sb] */
28023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28024 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x757a00 }
28026 /* not.w${G} ${Dsp-16-u16}[sb] */
28029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28030 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x757e0000 }
28032 /* not.w${G} ${Dsp-16-s8}[fb] */
28035 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28036 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x757b00 }
28038 /* not.w${G} ${Dsp-16-u16} */
28041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28042 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x757f0000 }
28044 /* not.b${G} $Dst16RnQI */
28047 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
28048 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7470 }
28050 /* not.b${G} $Dst16AnQI */
28053 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
28054 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7474 }
28056 /* not.b${G} [$Dst16An] */
28059 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28060 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7476 }
28062 /* not.b${G} ${Dsp-16-u8}[$Dst16An] */
28065 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28066 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x747800 }
28068 /* not.b${G} ${Dsp-16-u16}[$Dst16An] */
28071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28072 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x747c0000 }
28074 /* not.b${G} ${Dsp-16-u8}[sb] */
28077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28078 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x747a00 }
28080 /* not.b${G} ${Dsp-16-u16}[sb] */
28083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28084 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x747e0000 }
28086 /* not.b${G} ${Dsp-16-s8}[fb] */
28089 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28090 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x747b00 }
28092 /* not.b${G} ${Dsp-16-u16} */
28095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28096 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x747f0000 }
28098 /* neg.w $Dst32RnUnprefixedHI */
28101 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
28102 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92f }
28104 /* neg.w $Dst32AnUnprefixedHI */
28107 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
28108 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1af }
28110 /* neg.w [$Dst32AnUnprefixed] */
28113 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28114 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12f }
28116 /* neg.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28119 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28120 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32f00 }
28122 /* neg.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28125 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28126 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52f0000 }
28128 /* neg.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28131 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28132 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72f0000 }
28134 /* neg.w ${Dsp-16-u8}[sb] */
28137 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28138 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3af00 }
28140 /* neg.w ${Dsp-16-u16}[sb] */
28143 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28144 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5af0000 }
28146 /* neg.w ${Dsp-16-s8}[fb] */
28149 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28150 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ef00 }
28152 /* neg.w ${Dsp-16-s16}[fb] */
28155 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28156 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ef0000 }
28158 /* neg.w ${Dsp-16-u16} */
28161 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28162 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ef0000 }
28164 /* neg.w ${Dsp-16-u24} */
28167 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28168 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7af0000 }
28170 /* neg.b $Dst32RnUnprefixedQI */
28173 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
28174 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82f }
28176 /* neg.b $Dst32AnUnprefixedQI */
28179 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
28180 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0af }
28182 /* neg.b [$Dst32AnUnprefixed] */
28185 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28186 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02f }
28188 /* neg.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28191 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28192 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22f00 }
28194 /* neg.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28197 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28198 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42f0000 }
28200 /* neg.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28203 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28204 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62f0000 }
28206 /* neg.b ${Dsp-16-u8}[sb] */
28209 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28210 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2af00 }
28212 /* neg.b ${Dsp-16-u16}[sb] */
28215 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28216 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4af0000 }
28218 /* neg.b ${Dsp-16-s8}[fb] */
28221 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28222 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ef00 }
28224 /* neg.b ${Dsp-16-s16}[fb] */
28227 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28228 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ef0000 }
28230 /* neg.b ${Dsp-16-u16} */
28233 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28234 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ef0000 }
28236 /* neg.b ${Dsp-16-u24} */
28239 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28240 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6af0000 }
28242 /* neg.w $Dst16RnHI */
28245 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
28246 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7550 }
28248 /* neg.w $Dst16AnHI */
28251 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
28252 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7554 }
28254 /* neg.w [$Dst16An] */
28257 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28258 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7556 }
28260 /* neg.w ${Dsp-16-u8}[$Dst16An] */
28263 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28264 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x755800 }
28266 /* neg.w ${Dsp-16-u16}[$Dst16An] */
28269 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28270 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x755c0000 }
28272 /* neg.w ${Dsp-16-u8}[sb] */
28275 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28276 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x755a00 }
28278 /* neg.w ${Dsp-16-u16}[sb] */
28281 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28282 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x755e0000 }
28284 /* neg.w ${Dsp-16-s8}[fb] */
28287 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28288 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x755b00 }
28290 /* neg.w ${Dsp-16-u16} */
28293 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28294 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x755f0000 }
28296 /* neg.b $Dst16RnQI */
28299 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
28300 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7450 }
28302 /* neg.b $Dst16AnQI */
28305 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
28306 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7454 }
28308 /* neg.b [$Dst16An] */
28311 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28312 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7456 }
28314 /* neg.b ${Dsp-16-u8}[$Dst16An] */
28317 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28318 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x745800 }
28320 /* neg.b ${Dsp-16-u16}[$Dst16An] */
28323 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28324 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x745c0000 }
28326 /* neg.b ${Dsp-16-u8}[sb] */
28329 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28330 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x745a00 }
28332 /* neg.b ${Dsp-16-u16}[sb] */
28335 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28336 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x745e0000 }
28338 /* neg.b ${Dsp-16-s8}[fb] */
28341 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28342 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x745b00 }
28344 /* neg.b ${Dsp-16-u16} */
28347 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28348 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x745f0000 }
28350 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28353 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28354 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990400 }
28356 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
28359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28360 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992400 }
28362 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
28365 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28366 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993400 }
28368 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28372 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918400 }
28374 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
28377 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28378 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a400 }
28380 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
28383 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28384 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b400 }
28386 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28390 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910400 }
28392 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
28395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28396 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912400 }
28398 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
28401 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28402 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913400 }
28404 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28408 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93040000 }
28410 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28413 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28414 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93240000 }
28416 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28419 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28420 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93340000 }
28422 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28425 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28426 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95040000 }
28428 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28432 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95240000 }
28434 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28437 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28438 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95340000 }
28440 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28443 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28444 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97040000 }
28446 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28449 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28450 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97240000 }
28452 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28455 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28456 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97340000 }
28458 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
28461 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28462 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93840000 }
28464 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
28467 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28468 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a40000 }
28470 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
28473 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28474 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b40000 }
28476 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
28479 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28480 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95840000 }
28482 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
28485 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28486 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a40000 }
28488 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
28491 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28492 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b40000 }
28494 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
28497 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28498 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c40000 }
28500 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
28503 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28504 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e40000 }
28506 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
28509 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28510 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f40000 }
28512 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
28515 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28516 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c40000 }
28518 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
28521 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28522 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e40000 }
28524 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
28527 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28528 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f40000 }
28530 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
28533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
28534 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c40000 }
28536 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
28539 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28540 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e40000 }
28542 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
28545 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28546 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f40000 }
28548 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
28551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
28552 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97840000 }
28554 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
28557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28558 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a40000 }
28560 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
28563 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28564 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b40000 }
28566 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28569 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28570 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9040000 }
28572 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
28575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28576 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9240000 }
28578 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
28581 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28582 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9340000 }
28584 /* mulu.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
28587 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28588 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9340000 }
28590 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28593 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28594 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1840000 }
28596 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
28599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28600 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a40000 }
28602 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
28605 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28606 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b40000 }
28608 /* mulu.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
28611 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28612 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b40000 }
28614 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28618 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1040000 }
28620 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
28623 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28624 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1240000 }
28626 /* mulu.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
28629 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28630 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1340000 }
28632 /* mulu.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
28635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28636 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1340000 }
28638 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28641 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28642 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3040000 }
28644 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28648 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3240000 }
28650 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28653 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28654 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3340000 }
28656 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
28659 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28660 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3340000 }
28662 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28666 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5040000 }
28668 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28672 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5240000 }
28674 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28677 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28678 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5340000 }
28680 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
28683 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28684 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5340000 }
28686 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28690 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7040000 }
28692 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28695 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28696 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7240000 }
28698 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28701 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28702 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7340000 }
28704 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
28707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28708 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7340000 }
28710 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
28713 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28714 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3840000 }
28716 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
28719 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28720 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a40000 }
28722 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
28725 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28726 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b40000 }
28728 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
28731 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28732 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b40000 }
28734 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
28737 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28738 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5840000 }
28740 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
28743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28744 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a40000 }
28746 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
28749 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28750 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b40000 }
28752 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
28755 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28756 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b40000 }
28758 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
28761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28762 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c40000 }
28764 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
28767 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28768 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e40000 }
28770 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
28773 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28774 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f40000 }
28776 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
28779 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28780 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f40000 }
28782 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
28785 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28786 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c40000 }
28788 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
28791 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28792 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e40000 }
28794 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
28797 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28798 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f40000 }
28800 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
28803 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28804 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f40000 }
28806 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
28809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
28810 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c40000 }
28812 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
28815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28816 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e40000 }
28818 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
28821 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28822 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f40000 }
28824 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
28827 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
28828 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f40000 }
28830 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
28833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
28834 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7840000 }
28836 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
28839 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28840 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a40000 }
28842 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
28845 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28846 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b40000 }
28848 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
28851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
28852 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b40000 }
28854 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28858 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9040000 }
28860 /* mulu.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
28863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28864 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9240000 }
28866 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28870 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1840000 }
28872 /* mulu.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
28875 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28876 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a40000 }
28878 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28882 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1040000 }
28884 /* mulu.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
28887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28888 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1240000 }
28890 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
28893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28894 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3040000 }
28896 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
28899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28900 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3240000 }
28902 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
28905 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28906 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5040000 }
28908 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
28911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28912 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5240000 }
28914 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
28917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28918 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7040000 }
28920 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
28923 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28924 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7240000 }
28926 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
28929 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28930 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3840000 }
28932 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
28935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28936 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a40000 }
28938 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
28941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28942 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5840000 }
28944 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
28947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28948 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a40000 }
28950 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
28953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28954 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c40000 }
28956 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
28959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28960 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e40000 }
28962 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
28965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28966 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c40000 }
28968 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
28971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28972 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e40000 }
28974 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
28977 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
28978 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c40000 }
28980 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
28983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
28984 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e40000 }
28986 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
28989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
28990 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7840000 }
28992 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
28995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
28996 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a40000 }
28998 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
29001 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29002 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc904 }
29004 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
29007 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29008 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8924 }
29010 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
29013 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29014 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8904 }
29016 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
29019 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29020 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc184 }
29022 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
29025 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29026 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a4 }
29028 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
29031 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29032 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8184 }
29034 /* mulu.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
29037 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29038 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc104 }
29040 /* mulu.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
29043 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29044 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8124 }
29046 /* mulu.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29049 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29050 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8104 }
29052 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29055 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29056 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30400 }
29058 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29061 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29062 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832400 }
29064 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29067 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29068 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830400 }
29070 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29073 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29074 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5040000 }
29076 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29079 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29080 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85240000 }
29082 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29085 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29086 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85040000 }
29088 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29091 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29092 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7040000 }
29094 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29097 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29098 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87240000 }
29100 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29103 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29104 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87040000 }
29106 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
29109 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29110 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38400 }
29112 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
29115 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29116 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a400 }
29118 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29121 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29122 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838400 }
29124 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
29127 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29128 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5840000 }
29130 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
29133 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29134 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a40000 }
29136 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
29139 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29140 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85840000 }
29142 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
29145 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29146 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c400 }
29148 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
29151 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29152 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e400 }
29154 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
29157 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29158 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c400 }
29160 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
29163 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29164 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c40000 }
29166 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
29169 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29170 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e40000 }
29172 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
29175 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29176 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c40000 }
29178 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
29181 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29182 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c40000 }
29184 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
29187 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29188 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e40000 }
29190 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
29193 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
29194 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c40000 }
29196 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
29199 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29200 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7840000 }
29202 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
29205 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29206 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a40000 }
29208 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
29211 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
29212 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87840000 }
29214 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29218 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980400 }
29220 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
29223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29224 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982400 }
29226 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
29229 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29230 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983400 }
29232 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29236 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908400 }
29238 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
29241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29242 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a400 }
29244 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
29247 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29248 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b400 }
29250 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29254 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900400 }
29256 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
29259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29260 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902400 }
29262 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
29265 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29266 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903400 }
29268 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29272 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92040000 }
29274 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29277 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29278 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92240000 }
29280 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29283 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29284 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92340000 }
29286 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29289 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29290 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94040000 }
29292 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29296 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94240000 }
29298 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29301 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29302 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94340000 }
29304 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29307 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29308 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96040000 }
29310 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29313 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29314 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96240000 }
29316 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29319 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29320 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96340000 }
29322 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
29325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29326 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92840000 }
29328 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
29331 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29332 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a40000 }
29334 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
29337 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29338 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b40000 }
29340 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
29343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29344 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94840000 }
29346 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
29349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29350 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a40000 }
29352 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
29355 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29356 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b40000 }
29358 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
29361 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29362 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c40000 }
29364 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
29367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29368 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e40000 }
29370 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
29373 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29374 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f40000 }
29376 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
29379 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29380 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c40000 }
29382 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
29385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29386 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e40000 }
29388 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
29391 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29392 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f40000 }
29394 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
29397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
29398 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c40000 }
29400 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
29403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29404 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e40000 }
29406 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
29409 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29410 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f40000 }
29412 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
29415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
29416 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96840000 }
29418 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
29421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29422 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a40000 }
29424 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
29427 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29428 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b40000 }
29430 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29434 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8040000 }
29436 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
29439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29440 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8240000 }
29442 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
29445 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29446 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8340000 }
29448 /* mulu.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
29451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29452 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8340000 }
29454 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29457 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29458 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0840000 }
29460 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
29463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29464 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a40000 }
29466 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
29469 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29470 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b40000 }
29472 /* mulu.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
29475 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29476 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b40000 }
29478 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29482 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0040000 }
29484 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
29487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29488 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0240000 }
29490 /* mulu.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
29493 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29494 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0340000 }
29496 /* mulu.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
29499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29500 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0340000 }
29502 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29506 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2040000 }
29508 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29512 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2240000 }
29514 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29517 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29518 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2340000 }
29520 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
29523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29524 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2340000 }
29526 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29530 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4040000 }
29532 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29536 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4240000 }
29538 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29541 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29542 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4340000 }
29544 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
29547 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29548 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4340000 }
29550 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29554 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6040000 }
29556 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29559 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29560 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6240000 }
29562 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29565 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29566 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6340000 }
29568 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
29571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29572 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6340000 }
29574 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
29577 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29578 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2840000 }
29580 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
29583 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29584 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a40000 }
29586 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
29589 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29590 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b40000 }
29592 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
29595 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29596 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b40000 }
29598 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
29601 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29602 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4840000 }
29604 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
29607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29608 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a40000 }
29610 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
29613 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29614 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b40000 }
29616 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
29619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29620 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b40000 }
29622 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
29625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29626 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c40000 }
29628 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
29631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29632 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e40000 }
29634 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
29637 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29638 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f40000 }
29640 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
29643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29644 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f40000 }
29646 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
29649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29650 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c40000 }
29652 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
29655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29656 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e40000 }
29658 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
29661 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29662 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f40000 }
29664 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
29667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29668 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f40000 }
29670 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
29673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
29674 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c40000 }
29676 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
29679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29680 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e40000 }
29682 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
29685 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29686 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f40000 }
29688 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
29691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
29692 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f40000 }
29694 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
29697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
29698 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6840000 }
29700 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
29703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29704 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a40000 }
29706 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
29709 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29710 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b40000 }
29712 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
29715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
29716 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b40000 }
29718 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29721 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29722 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8040000 }
29724 /* mulu.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
29727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29728 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8240000 }
29730 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29734 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0840000 }
29736 /* mulu.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
29739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29740 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a40000 }
29742 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29746 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0040000 }
29748 /* mulu.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
29751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29752 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0240000 }
29754 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
29757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29758 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2040000 }
29760 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
29763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29764 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2240000 }
29766 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
29769 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29770 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4040000 }
29772 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
29775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29776 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4240000 }
29778 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
29781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29782 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6040000 }
29784 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
29787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29788 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6240000 }
29790 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
29793 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29794 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2840000 }
29796 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
29799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29800 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a40000 }
29802 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
29805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29806 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4840000 }
29808 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
29811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29812 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a40000 }
29814 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
29817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29818 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c40000 }
29820 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
29823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29824 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e40000 }
29826 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
29829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29830 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c40000 }
29832 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
29835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29836 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e40000 }
29838 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
29841 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
29842 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c40000 }
29844 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
29847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
29848 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e40000 }
29850 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
29853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
29854 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6840000 }
29856 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
29859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
29860 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a40000 }
29862 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
29865 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29866 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc804 }
29868 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
29871 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29872 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8824 }
29874 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29877 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29878 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8804 }
29880 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
29883 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29884 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc084 }
29886 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
29889 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29890 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a4 }
29892 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29895 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29896 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8084 }
29898 /* mulu.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
29901 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29902 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc004 }
29904 /* mulu.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
29907 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29908 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8024 }
29910 /* mulu.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29913 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29914 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8004 }
29916 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29919 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29920 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20400 }
29922 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29925 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29926 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822400 }
29928 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29931 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29932 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820400 }
29934 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29937 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29938 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4040000 }
29940 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29943 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29944 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84240000 }
29946 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29949 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29950 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84040000 }
29952 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29955 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29956 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6040000 }
29958 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29961 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29962 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86240000 }
29964 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29967 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29968 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86040000 }
29970 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
29973 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29974 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28400 }
29976 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
29979 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29980 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a400 }
29982 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29985 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29986 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828400 }
29988 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
29991 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29992 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4840000 }
29994 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
29997 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29998 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a40000 }
30000 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
30003 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30004 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84840000 }
30006 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
30009 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30010 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c400 }
30012 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
30015 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30016 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e400 }
30018 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
30021 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30022 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c400 }
30024 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
30027 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30028 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c40000 }
30030 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
30033 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30034 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e40000 }
30036 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
30039 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30040 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c40000 }
30042 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
30045 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30046 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c40000 }
30048 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
30051 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30052 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e40000 }
30054 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
30057 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
30058 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c40000 }
30060 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
30063 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30064 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6840000 }
30066 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
30069 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30070 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a40000 }
30072 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
30075 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
30076 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86840000 }
30078 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
30081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30082 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x718000 }
30084 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
30087 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30088 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71a000 }
30090 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
30093 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30094 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x71b000 }
30096 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
30099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30100 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x718400 }
30102 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
30105 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30106 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x71a400 }
30108 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
30111 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30112 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x71b400 }
30114 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30118 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x718600 }
30120 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30123 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30124 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x71a600 }
30126 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30129 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30130 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x71b600 }
30132 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30136 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x71880000 }
30138 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30141 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30142 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71a80000 }
30144 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30147 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30148 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71b80000 }
30150 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30154 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x718c0000 }
30156 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30159 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30160 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71ac0000 }
30162 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30165 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30166 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71bc0000 }
30168 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30171 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30172 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x718a0000 }
30174 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30177 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30178 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71aa0000 }
30180 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30183 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30184 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71ba0000 }
30186 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30190 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x718e0000 }
30192 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30195 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30196 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71ae0000 }
30198 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30201 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30202 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71be0000 }
30204 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30207 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30208 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x718b0000 }
30210 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30213 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30214 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71ab0000 }
30216 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30219 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30220 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71bb0000 }
30222 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30225 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30226 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x718f0000 }
30228 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30231 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30232 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x71af0000 }
30234 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30237 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30238 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x71bf0000 }
30240 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
30243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30244 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x71c00000 }
30246 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
30249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30250 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71e00000 }
30252 /* mulu.w${G} ${Dsp-16-u16},$Dst16RnHI */
30255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
30256 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x71f00000 }
30258 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
30261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30262 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x71c40000 }
30264 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
30267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30268 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x71e40000 }
30270 /* mulu.w${G} ${Dsp-16-u16},$Dst16AnHI */
30273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
30274 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x71f40000 }
30276 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30279 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30280 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x71c60000 }
30282 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30286 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x71e60000 }
30288 /* mulu.w${G} ${Dsp-16-u16},[$Dst16An] */
30291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30292 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x71f60000 }
30294 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30297 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30298 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x71c80000 }
30300 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30304 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x71e80000 }
30306 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30310 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x71f80000 }
30312 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30315 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30316 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x71cc0000 }
30318 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30322 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x71ec0000 }
30324 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30328 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x71fc0000 }
30330 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30333 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30334 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ca0000 }
30336 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30340 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ea0000 }
30342 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30345 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30346 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x71fa0000 }
30348 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30351 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30352 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ce0000 }
30354 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30358 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ee0000 }
30360 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30364 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x71fe0000 }
30366 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30369 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30370 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71cb0000 }
30372 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30376 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71eb0000 }
30378 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30382 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x71fb0000 }
30384 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30387 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30388 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x71cf0000 }
30390 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30394 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x71ef0000 }
30396 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
30399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30400 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x71ff0000 }
30402 /* mulu.w${G} $Src16RnHI,$Dst16RnHI */
30405 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
30406 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7100 }
30408 /* mulu.w${G} $Src16AnHI,$Dst16RnHI */
30411 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
30412 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7140 }
30414 /* mulu.w${G} [$Src16An],$Dst16RnHI */
30417 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30418 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7160 }
30420 /* mulu.w${G} $Src16RnHI,$Dst16AnHI */
30423 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
30424 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7104 }
30426 /* mulu.w${G} $Src16AnHI,$Dst16AnHI */
30429 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
30430 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7144 }
30432 /* mulu.w${G} [$Src16An],$Dst16AnHI */
30435 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30436 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7164 }
30438 /* mulu.w${G} $Src16RnHI,[$Dst16An] */
30441 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30442 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7106 }
30444 /* mulu.w${G} $Src16AnHI,[$Dst16An] */
30447 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30448 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7146 }
30450 /* mulu.w${G} [$Src16An],[$Dst16An] */
30453 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30454 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7166 }
30456 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
30459 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30460 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x710800 }
30462 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
30465 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30466 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x714800 }
30468 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30471 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30472 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x716800 }
30474 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
30477 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30478 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x710c0000 }
30480 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
30483 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30484 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x714c0000 }
30486 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30489 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30490 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x716c0000 }
30492 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
30495 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30496 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x710a00 }
30498 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
30501 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30502 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x714a00 }
30504 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[sb] */
30507 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30508 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x716a00 }
30510 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
30513 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30514 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x710e0000 }
30516 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
30519 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30520 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x714e0000 }
30522 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[sb] */
30525 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30526 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x716e0000 }
30528 /* mulu.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
30531 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30532 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x710b00 }
30534 /* mulu.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
30537 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30538 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x714b00 }
30540 /* mulu.w${G} [$Src16An],${Dsp-16-s8}[fb] */
30543 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30544 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x716b00 }
30546 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16} */
30549 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
30550 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x710f0000 }
30552 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16} */
30555 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
30556 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x714f0000 }
30558 /* mulu.w${G} [$Src16An],${Dsp-16-u16} */
30561 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
30562 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x716f0000 }
30564 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
30567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30568 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x708000 }
30570 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
30573 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30574 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70a000 }
30576 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
30579 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30580 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x70b000 }
30582 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
30585 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30586 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x708400 }
30588 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
30591 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30592 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x70a400 }
30594 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
30597 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30598 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x70b400 }
30600 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30604 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x708600 }
30606 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30609 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30610 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x70a600 }
30612 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30615 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30616 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x70b600 }
30618 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30622 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x70880000 }
30624 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30627 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30628 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70a80000 }
30630 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30633 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30634 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70b80000 }
30636 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30640 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x708c0000 }
30642 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30646 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70ac0000 }
30648 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30651 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30652 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70bc0000 }
30654 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30657 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30658 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x708a0000 }
30660 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30664 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70aa0000 }
30666 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30669 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30670 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70ba0000 }
30672 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30675 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30676 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x708e0000 }
30678 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30681 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30682 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70ae0000 }
30684 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30687 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30688 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70be0000 }
30690 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30693 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30694 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x708b0000 }
30696 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30699 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30700 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70ab0000 }
30702 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30705 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30706 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70bb0000 }
30708 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30711 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30712 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x708f0000 }
30714 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30717 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30718 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x70af0000 }
30720 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30723 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30724 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x70bf0000 }
30726 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
30729 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30730 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x70c00000 }
30732 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
30735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30736 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70e00000 }
30738 /* mulu.b${G} ${Dsp-16-u16},$Dst16RnQI */
30741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
30742 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x70f00000 }
30744 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
30747 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30748 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x70c40000 }
30750 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
30753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30754 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x70e40000 }
30756 /* mulu.b${G} ${Dsp-16-u16},$Dst16AnQI */
30759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
30760 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x70f40000 }
30762 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30765 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30766 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x70c60000 }
30768 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30771 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30772 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x70e60000 }
30774 /* mulu.b${G} ${Dsp-16-u16},[$Dst16An] */
30777 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30778 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x70f60000 }
30780 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30783 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30784 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x70c80000 }
30786 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30790 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x70e80000 }
30792 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30795 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30796 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x70f80000 }
30798 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30801 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30802 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x70cc0000 }
30804 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30808 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x70ec0000 }
30810 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30814 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x70fc0000 }
30816 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30819 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30820 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ca0000 }
30822 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30826 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ea0000 }
30828 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30832 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x70fa0000 }
30834 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30837 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30838 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ce0000 }
30840 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30844 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ee0000 }
30846 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30850 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x70fe0000 }
30852 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30855 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30856 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70cb0000 }
30858 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30862 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70eb0000 }
30864 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30868 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x70fb0000 }
30870 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30873 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30874 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x70cf0000 }
30876 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30880 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x70ef0000 }
30882 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
30885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30886 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x70ff0000 }
30888 /* mulu.b${G} $Src16RnQI,$Dst16RnQI */
30891 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
30892 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7000 }
30894 /* mulu.b${G} $Src16AnQI,$Dst16RnQI */
30897 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
30898 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7040 }
30900 /* mulu.b${G} [$Src16An],$Dst16RnQI */
30903 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30904 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7060 }
30906 /* mulu.b${G} $Src16RnQI,$Dst16AnQI */
30909 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
30910 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7004 }
30912 /* mulu.b${G} $Src16AnQI,$Dst16AnQI */
30915 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
30916 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7044 }
30918 /* mulu.b${G} [$Src16An],$Dst16AnQI */
30921 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30922 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7064 }
30924 /* mulu.b${G} $Src16RnQI,[$Dst16An] */
30927 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30928 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7006 }
30930 /* mulu.b${G} $Src16AnQI,[$Dst16An] */
30933 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30934 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7046 }
30936 /* mulu.b${G} [$Src16An],[$Dst16An] */
30939 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30940 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7066 }
30942 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
30945 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30946 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x700800 }
30948 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
30951 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30952 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x704800 }
30954 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30957 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30958 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x706800 }
30960 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
30963 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30964 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x700c0000 }
30966 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
30969 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30970 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x704c0000 }
30972 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30975 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30976 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x706c0000 }
30978 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
30981 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30982 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x700a00 }
30984 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
30987 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30988 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x704a00 }
30990 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[sb] */
30993 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30994 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x706a00 }
30996 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
30999 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31000 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x700e0000 }
31002 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
31005 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31006 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x704e0000 }
31008 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[sb] */
31011 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31012 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x706e0000 }
31014 /* mulu.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
31017 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31018 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x700b00 }
31020 /* mulu.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
31023 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31024 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x704b00 }
31026 /* mulu.b${G} [$Src16An],${Dsp-16-s8}[fb] */
31029 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31030 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x706b00 }
31032 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16} */
31035 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
31036 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x700f0000 }
31038 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16} */
31041 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
31042 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x704f0000 }
31044 /* mulu.b${G} [$Src16An],${Dsp-16-u16} */
31047 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
31048 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x706f0000 }
31050 /* mulu.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
31053 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31054 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x890f0000 }
31056 /* mulu.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
31059 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31060 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818f0000 }
31062 /* mulu.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
31065 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31066 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x810f0000 }
31068 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31071 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31072 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830f0000 }
31074 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31077 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31078 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838f0000 }
31080 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31083 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31084 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cf0000 }
31086 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31089 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31090 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850f0000 }
31092 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31095 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31096 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858f0000 }
31098 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
31101 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31102 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cf0000 }
31104 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31107 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31108 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cf0000 }
31110 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31113 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31114 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870f0000 }
31116 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24} */
31119 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
31120 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x878f0000 }
31122 /* mulu.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
31125 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
31126 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x880f00 }
31128 /* mulu.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
31131 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
31132 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x808f00 }
31134 /* mulu.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
31137 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31138 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x800f00 }
31140 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31143 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31144 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820f0000 }
31146 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31149 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31150 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828f0000 }
31152 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31155 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31156 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cf0000 }
31158 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31161 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31162 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840f0000 }
31164 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31167 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31168 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848f0000 }
31170 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
31173 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31174 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cf0000 }
31176 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31179 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31180 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cf0000 }
31182 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31185 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31186 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860f0000 }
31188 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24} */
31191 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
31192 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x868f0000 }
31194 /* mulu.w${G} #${Imm-16-HI},$Dst16RnHI */
31197 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
31198 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d400000 }
31200 /* mulu.w${G} #${Imm-16-HI},$Dst16AnHI */
31203 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
31204 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d440000 }
31206 /* mulu.w${G} #${Imm-16-HI},[$Dst16An] */
31209 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
31210 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d460000 }
31212 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
31215 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31216 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d480000 }
31218 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31221 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31222 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d4a0000 }
31224 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31227 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31228 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d4b0000 }
31230 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
31233 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31234 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d4c0000 }
31236 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31239 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31240 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d4e0000 }
31242 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31245 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31246 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d4f0000 }
31248 /* mulu.b${G} #${Imm-16-QI},$Dst16RnQI */
31251 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
31252 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c4000 }
31254 /* mulu.b${G} #${Imm-16-QI},$Dst16AnQI */
31257 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
31258 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c4400 }
31260 /* mulu.b${G} #${Imm-16-QI},[$Dst16An] */
31263 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
31264 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c4600 }
31266 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
31269 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31270 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c480000 }
31272 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31275 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31276 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c4a0000 }
31278 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31281 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31282 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c4b0000 }
31284 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
31287 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31288 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c4c0000 }
31290 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31293 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31294 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c4e0000 }
31296 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31299 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31300 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c4f0000 }
31305 { { MNEM
, ' ', OP (R3
), 0 } },
31306 & ifmt_mulex_dst32_R3_direct_Unprefixed_HI
, { 0xc97e }
31308 /* mulex $Dst32AnUnprefixedHI */
31311 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
31312 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1be }
31314 /* mulex [$Dst32AnUnprefixed] */
31317 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31318 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc13e }
31320 /* mulex ${Dsp-16-u8}[$Dst32AnUnprefixed] */
31323 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31324 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc33e00 }
31326 /* mulex ${Dsp-16-u16}[$Dst32AnUnprefixed] */
31329 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31330 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc53e0000 }
31332 /* mulex ${Dsp-16-u24}[$Dst32AnUnprefixed] */
31335 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31336 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc73e0000 }
31338 /* mulex ${Dsp-16-u8}[sb] */
31341 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31342 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3be00 }
31344 /* mulex ${Dsp-16-u16}[sb] */
31347 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31348 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5be0000 }
31350 /* mulex ${Dsp-16-s8}[fb] */
31353 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31354 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3fe00 }
31356 /* mulex ${Dsp-16-s16}[fb] */
31359 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31360 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5fe0000 }
31362 /* mulex ${Dsp-16-u16} */
31365 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
31366 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7fe0000 }
31368 /* mulex ${Dsp-16-u24} */
31371 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
31372 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7be0000 }
31374 /* mulu.l $Dst32RnPrefixedSI,r2r0 */
31377 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31378 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1890f }
31380 /* mulu.l $Dst32AnPrefixedSI,r2r0 */
31383 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31384 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1818f }
31386 /* mulu.l [$Dst32AnPrefixed],r2r0 */
31389 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31390 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1810f }
31392 /* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31395 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31396 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1830f00 }
31398 /* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31401 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31402 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1850f00 }
31404 /* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31407 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31408 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1870f00 }
31410 /* mulu.l ${Dsp-24-u8}[sb],r2r0 */
31413 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31414 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1838f00 }
31416 /* mulu.l ${Dsp-24-u16}[sb],r2r0 */
31419 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31420 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1858f00 }
31422 /* mulu.l ${Dsp-24-s8}[fb],r2r0 */
31425 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31426 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183cf00 }
31428 /* mulu.l ${Dsp-24-s16}[fb],r2r0 */
31431 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31432 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185cf00 }
31434 /* mulu.l ${Dsp-24-u16},r2r0 */
31437 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31438 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187cf00 }
31440 /* mulu.l ${Dsp-24-u24},r2r0 */
31443 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31444 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1878f00 }
31446 /* mul.l $Dst32RnPrefixedSI,r2r0 */
31449 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31450 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1891f }
31452 /* mul.l $Dst32AnPrefixedSI,r2r0 */
31455 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31456 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1819f }
31458 /* mul.l [$Dst32AnPrefixed],r2r0 */
31461 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31462 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1811f }
31464 /* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31467 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31468 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1831f00 }
31470 /* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31473 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31474 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1851f00 }
31476 /* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31479 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31480 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1871f00 }
31482 /* mul.l ${Dsp-24-u8}[sb],r2r0 */
31485 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31486 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1839f00 }
31488 /* mul.l ${Dsp-24-u16}[sb],r2r0 */
31491 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31492 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1859f00 }
31494 /* mul.l ${Dsp-24-s8}[fb],r2r0 */
31497 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31498 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183df00 }
31500 /* mul.l ${Dsp-24-s16}[fb],r2r0 */
31503 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31504 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185df00 }
31506 /* mul.l ${Dsp-24-u16},r2r0 */
31509 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31510 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187df00 }
31512 /* mul.l ${Dsp-24-u24},r2r0 */
31515 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31516 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1879f00 }
31518 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31521 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31522 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990c00 }
31524 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
31527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31528 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992c00 }
31530 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
31533 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31534 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993c00 }
31536 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31539 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31540 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918c00 }
31542 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
31545 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31546 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ac00 }
31548 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
31551 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31552 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bc00 }
31554 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31558 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910c00 }
31560 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
31563 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31564 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912c00 }
31566 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
31569 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31570 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913c00 }
31572 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31576 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930c0000 }
31578 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31582 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932c0000 }
31584 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31587 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31588 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933c0000 }
31590 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31593 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31594 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950c0000 }
31596 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31600 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952c0000 }
31602 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31605 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31606 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953c0000 }
31608 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31611 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31612 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970c0000 }
31614 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31618 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972c0000 }
31620 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31623 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31624 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973c0000 }
31626 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
31629 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31630 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938c0000 }
31632 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
31635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31636 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ac0000 }
31638 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
31641 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31642 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bc0000 }
31644 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
31647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31648 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958c0000 }
31650 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
31653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31654 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ac0000 }
31656 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
31659 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31660 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bc0000 }
31662 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
31665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31666 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cc0000 }
31668 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
31671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31672 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ec0000 }
31674 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
31677 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31678 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fc0000 }
31680 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
31683 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31684 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cc0000 }
31686 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
31689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31690 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ec0000 }
31692 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
31695 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31696 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fc0000 }
31698 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
31701 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
31702 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cc0000 }
31704 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
31707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31708 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ec0000 }
31710 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
31713 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31714 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fc0000 }
31716 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
31719 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
31720 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978c0000 }
31722 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
31725 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31726 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ac0000 }
31728 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
31731 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31732 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bc0000 }
31734 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31737 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31738 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90c0000 }
31740 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
31743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31744 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92c0000 }
31746 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
31749 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31750 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93c0000 }
31752 /* mul.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
31755 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31756 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93c0000 }
31758 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31762 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18c0000 }
31764 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
31767 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31768 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ac0000 }
31770 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
31773 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31774 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bc0000 }
31776 /* mul.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
31779 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31780 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bc0000 }
31782 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31785 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31786 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10c0000 }
31788 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
31791 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31792 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12c0000 }
31794 /* mul.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
31797 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31798 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13c0000 }
31800 /* mul.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
31803 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31804 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13c0000 }
31806 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31810 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30c0000 }
31812 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31816 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32c0000 }
31818 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31821 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31822 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33c0000 }
31824 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
31827 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31828 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33c0000 }
31830 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31834 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50c0000 }
31836 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31839 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31840 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52c0000 }
31842 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31845 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31846 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53c0000 }
31848 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
31851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31852 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53c0000 }
31854 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31858 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70c0000 }
31860 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31864 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72c0000 }
31866 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31869 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31870 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73c0000 }
31872 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
31875 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31876 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73c0000 }
31878 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
31881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31882 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38c0000 }
31884 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
31887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31888 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ac0000 }
31890 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
31893 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31894 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bc0000 }
31896 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
31899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31900 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bc0000 }
31902 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
31905 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31906 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58c0000 }
31908 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
31911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31912 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ac0000 }
31914 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
31917 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31918 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bc0000 }
31920 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
31923 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31924 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bc0000 }
31926 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
31929 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31930 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cc0000 }
31932 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
31935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31936 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ec0000 }
31938 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
31941 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31942 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fc0000 }
31944 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
31947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31948 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fc0000 }
31950 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
31953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31954 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cc0000 }
31956 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
31959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31960 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ec0000 }
31962 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
31965 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31966 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fc0000 }
31968 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
31971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31972 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fc0000 }
31974 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
31977 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
31978 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cc0000 }
31980 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
31983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
31984 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ec0000 }
31986 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
31989 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
31990 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fc0000 }
31992 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
31995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
31996 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fc0000 }
31998 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32001 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32002 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78c0000 }
32004 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32008 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ac0000 }
32010 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32013 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32014 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bc0000 }
32016 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
32019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32020 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bc0000 }
32022 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32025 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32026 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90c0000 }
32028 /* mul.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
32031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32032 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92c0000 }
32034 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32038 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18c0000 }
32040 /* mul.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
32043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32044 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ac0000 }
32046 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32049 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32050 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10c0000 }
32052 /* mul.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32056 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12c0000 }
32058 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32062 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30c0000 }
32064 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32068 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32c0000 }
32070 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32074 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50c0000 }
32076 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32080 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52c0000 }
32082 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32085 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32086 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70c0000 }
32088 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32092 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72c0000 }
32094 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32097 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32098 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38c0000 }
32100 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32104 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ac0000 }
32106 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32110 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58c0000 }
32112 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32116 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ac0000 }
32118 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32121 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32122 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cc0000 }
32124 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
32127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32128 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ec0000 }
32130 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
32133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32134 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cc0000 }
32136 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
32139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32140 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ec0000 }
32142 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
32145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
32146 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cc0000 }
32148 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
32151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
32152 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ec0000 }
32154 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
32157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
32158 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78c0000 }
32160 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
32163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
32164 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ac0000 }
32166 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
32169 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32170 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90c }
32172 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
32175 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32176 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892c }
32178 /* mul.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32181 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32182 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890c }
32184 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
32187 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32188 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18c }
32190 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
32193 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32194 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ac }
32196 /* mul.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32199 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32200 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818c }
32202 /* mul.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
32205 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32206 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10c }
32208 /* mul.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
32211 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32212 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812c }
32214 /* mul.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32217 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32218 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810c }
32220 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32223 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32224 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30c00 }
32226 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32229 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32230 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832c00 }
32232 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
32235 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32236 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830c00 }
32238 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32241 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32242 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50c0000 }
32244 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32247 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32248 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852c0000 }
32250 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
32253 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32254 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850c0000 }
32256 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32259 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32260 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70c0000 }
32262 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32265 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32266 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872c0000 }
32268 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
32271 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32272 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870c0000 }
32274 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
32277 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32278 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38c00 }
32280 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
32283 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32284 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ac00 }
32286 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
32289 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32290 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838c00 }
32292 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
32295 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32296 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58c0000 }
32298 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
32301 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32302 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ac0000 }
32304 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
32307 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32308 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858c0000 }
32310 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
32313 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32314 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cc00 }
32316 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
32319 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32320 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ec00 }
32322 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
32325 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32326 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cc00 }
32328 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
32331 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32332 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cc0000 }
32334 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
32337 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32338 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ec0000 }
32340 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
32343 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32344 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cc0000 }
32346 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
32349 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32350 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cc0000 }
32352 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
32355 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32356 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ec0000 }
32358 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
32361 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
32362 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cc0000 }
32364 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
32367 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32368 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78c0000 }
32370 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
32373 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32374 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ac0000 }
32376 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
32379 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
32380 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878c0000 }
32382 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32386 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980c00 }
32388 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
32391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32392 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982c00 }
32394 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
32397 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32398 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983c00 }
32400 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32404 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908c00 }
32406 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
32409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32410 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ac00 }
32412 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
32415 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32416 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bc00 }
32418 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32422 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900c00 }
32424 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
32427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32428 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902c00 }
32430 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
32433 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32434 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903c00 }
32436 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32440 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920c0000 }
32442 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32446 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922c0000 }
32448 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32451 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32452 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923c0000 }
32454 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32457 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32458 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940c0000 }
32460 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32464 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942c0000 }
32466 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32469 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32470 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943c0000 }
32472 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32475 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32476 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960c0000 }
32478 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32482 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962c0000 }
32484 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32487 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32488 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963c0000 }
32490 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
32493 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32494 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928c0000 }
32496 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
32499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32500 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ac0000 }
32502 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
32505 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32506 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bc0000 }
32508 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
32511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32512 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948c0000 }
32514 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
32517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32518 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ac0000 }
32520 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
32523 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32524 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bc0000 }
32526 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
32529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32530 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cc0000 }
32532 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
32535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32536 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ec0000 }
32538 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
32541 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32542 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fc0000 }
32544 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
32547 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32548 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cc0000 }
32550 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
32553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32554 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ec0000 }
32556 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
32559 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32560 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fc0000 }
32562 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
32565 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
32566 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cc0000 }
32568 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
32571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32572 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ec0000 }
32574 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
32577 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32578 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fc0000 }
32580 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
32583 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
32584 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968c0000 }
32586 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
32589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32590 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ac0000 }
32592 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
32595 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32596 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bc0000 }
32598 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32601 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32602 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80c0000 }
32604 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
32607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32608 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82c0000 }
32610 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
32613 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32614 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83c0000 }
32616 /* mul.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
32619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32620 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83c0000 }
32622 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32626 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08c0000 }
32628 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
32631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32632 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ac0000 }
32634 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
32637 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32638 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bc0000 }
32640 /* mul.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
32643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32644 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bc0000 }
32646 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32650 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00c0000 }
32652 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
32655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32656 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02c0000 }
32658 /* mul.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
32661 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32662 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03c0000 }
32664 /* mul.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
32667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32668 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03c0000 }
32670 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32674 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20c0000 }
32676 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32680 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22c0000 }
32682 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32685 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32686 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23c0000 }
32688 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
32691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32692 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23c0000 }
32694 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32698 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40c0000 }
32700 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32704 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42c0000 }
32706 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32709 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32710 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43c0000 }
32712 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
32715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32716 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43c0000 }
32718 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32721 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32722 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60c0000 }
32724 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32728 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62c0000 }
32730 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32733 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32734 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63c0000 }
32736 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
32739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32740 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63c0000 }
32742 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
32745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32746 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28c0000 }
32748 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
32751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32752 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ac0000 }
32754 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
32757 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32758 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bc0000 }
32760 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
32763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32764 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bc0000 }
32766 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
32769 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32770 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48c0000 }
32772 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
32775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32776 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ac0000 }
32778 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
32781 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32782 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bc0000 }
32784 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
32787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32788 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bc0000 }
32790 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
32793 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32794 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cc0000 }
32796 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
32799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32800 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ec0000 }
32802 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
32805 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32806 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fc0000 }
32808 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
32811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32812 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fc0000 }
32814 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
32817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32818 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cc0000 }
32820 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
32823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32824 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ec0000 }
32826 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
32829 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32830 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fc0000 }
32832 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
32835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32836 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fc0000 }
32838 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
32841 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
32842 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cc0000 }
32844 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
32847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32848 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ec0000 }
32850 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
32853 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32854 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fc0000 }
32856 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
32859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
32860 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fc0000 }
32862 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32865 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32866 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68c0000 }
32868 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32872 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ac0000 }
32874 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32877 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32878 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bc0000 }
32880 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
32883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32884 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bc0000 }
32886 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32889 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32890 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80c0000 }
32892 /* mul.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
32895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32896 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82c0000 }
32898 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32902 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08c0000 }
32904 /* mul.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
32907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32908 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ac0000 }
32910 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32913 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32914 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00c0000 }
32916 /* mul.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32920 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02c0000 }
32922 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32926 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20c0000 }
32928 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32932 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22c0000 }
32934 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32937 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32938 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40c0000 }
32940 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32943 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32944 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42c0000 }
32946 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32950 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60c0000 }
32952 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32956 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62c0000 }
32958 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32961 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32962 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28c0000 }
32964 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32968 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ac0000 }
32970 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32973 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32974 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48c0000 }
32976 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32979 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32980 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ac0000 }
32982 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32985 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32986 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cc0000 }
32988 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
32991 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32992 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ec0000 }
32994 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
32997 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32998 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cc0000 }
33000 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
33003 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
33004 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ec0000 }
33006 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
33009 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
33010 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cc0000 }
33012 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
33015 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
33016 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ec0000 }
33018 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
33021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
33022 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68c0000 }
33024 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
33027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
33028 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ac0000 }
33030 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
33033 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33034 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80c }
33036 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
33039 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33040 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882c }
33042 /* mul.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
33045 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33046 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880c }
33048 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
33051 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33052 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08c }
33054 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
33057 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33058 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ac }
33060 /* mul.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
33063 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33064 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808c }
33066 /* mul.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
33069 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33070 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00c }
33072 /* mul.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
33075 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33076 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802c }
33078 /* mul.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
33081 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33082 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800c }
33084 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33087 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33088 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20c00 }
33090 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33093 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33094 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822c00 }
33096 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
33099 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33100 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820c00 }
33102 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33105 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33106 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40c0000 }
33108 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33111 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33112 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842c0000 }
33114 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
33117 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33118 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840c0000 }
33120 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33123 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33124 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60c0000 }
33126 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33129 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33130 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862c0000 }
33132 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
33135 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33136 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860c0000 }
33138 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
33141 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33142 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28c00 }
33144 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
33147 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33148 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ac00 }
33150 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
33153 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33154 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828c00 }
33156 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
33159 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33160 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48c0000 }
33162 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
33165 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33166 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ac0000 }
33168 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
33171 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33172 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848c0000 }
33174 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
33177 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33178 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cc00 }
33180 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
33183 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33184 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ec00 }
33186 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
33189 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33190 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cc00 }
33192 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
33195 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33196 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cc0000 }
33198 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
33201 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33202 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ec0000 }
33204 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
33207 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33208 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cc0000 }
33210 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
33213 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33214 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cc0000 }
33216 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
33219 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33220 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ec0000 }
33222 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
33225 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
33226 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cc0000 }
33228 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
33231 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33232 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68c0000 }
33234 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
33237 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33238 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ac0000 }
33240 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
33243 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
33244 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868c0000 }
33246 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
33249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33250 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x798000 }
33252 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
33255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33256 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79a000 }
33258 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
33261 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33262 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x79b000 }
33264 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
33267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33268 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x798400 }
33270 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
33273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33274 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x79a400 }
33276 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
33279 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33280 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x79b400 }
33282 /* mul.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33286 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x798600 }
33288 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33292 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x79a600 }
33294 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33297 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33298 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x79b600 }
33300 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33304 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x79880000 }
33306 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33310 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79a80000 }
33312 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33315 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33316 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79b80000 }
33318 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33322 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x798c0000 }
33324 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33328 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79ac0000 }
33330 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33333 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33334 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79bc0000 }
33336 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33340 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x798a0000 }
33342 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33345 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33346 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79aa0000 }
33348 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33351 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33352 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79ba0000 }
33354 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33358 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x798e0000 }
33360 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33364 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79ae0000 }
33366 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33369 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33370 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79be0000 }
33372 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33376 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x798b0000 }
33378 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33382 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79ab0000 }
33384 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33387 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33388 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79bb0000 }
33390 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33394 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x798f0000 }
33396 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33400 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x79af0000 }
33402 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33405 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33406 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x79bf0000 }
33408 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
33411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33412 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x79c00000 }
33414 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
33417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33418 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79e00000 }
33420 /* mul.w${G} ${Dsp-16-u16},$Dst16RnHI */
33423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
33424 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x79f00000 }
33426 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
33429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33430 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x79c40000 }
33432 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
33435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33436 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x79e40000 }
33438 /* mul.w${G} ${Dsp-16-u16},$Dst16AnHI */
33441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
33442 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x79f40000 }
33444 /* mul.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33448 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x79c60000 }
33450 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33454 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x79e60000 }
33456 /* mul.w${G} ${Dsp-16-u16},[$Dst16An] */
33459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33460 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x79f60000 }
33462 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33466 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x79c80000 }
33468 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33472 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x79e80000 }
33474 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33478 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x79f80000 }
33480 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33484 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x79cc0000 }
33486 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33489 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33490 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x79ec0000 }
33492 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33496 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x79fc0000 }
33498 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33501 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33502 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ca0000 }
33504 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
33507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33508 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ea0000 }
33510 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
33513 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33514 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x79fa0000 }
33516 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
33519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33520 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ce0000 }
33522 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
33525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33526 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ee0000 }
33528 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
33531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33532 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x79fe0000 }
33534 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
33537 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33538 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79cb0000 }
33540 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
33543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33544 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79eb0000 }
33546 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
33549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33550 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x79fb0000 }
33552 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
33555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
33556 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x79cf0000 }
33558 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
33561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
33562 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x79ef0000 }
33564 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
33567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
33568 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x79ff0000 }
33570 /* mul.w${G} $Src16RnHI,$Dst16RnHI */
33573 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
33574 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7900 }
33576 /* mul.w${G} $Src16AnHI,$Dst16RnHI */
33579 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
33580 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7940 }
33582 /* mul.w${G} [$Src16An],$Dst16RnHI */
33585 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33586 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7960 }
33588 /* mul.w${G} $Src16RnHI,$Dst16AnHI */
33591 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
33592 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7904 }
33594 /* mul.w${G} $Src16AnHI,$Dst16AnHI */
33597 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
33598 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7944 }
33600 /* mul.w${G} [$Src16An],$Dst16AnHI */
33603 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33604 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7964 }
33606 /* mul.w${G} $Src16RnHI,[$Dst16An] */
33609 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33610 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7906 }
33612 /* mul.w${G} $Src16AnHI,[$Dst16An] */
33615 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33616 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7946 }
33618 /* mul.w${G} [$Src16An],[$Dst16An] */
33621 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33622 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7966 }
33624 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
33627 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33628 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x790800 }
33630 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
33633 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33634 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x794800 }
33636 /* mul.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
33639 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33640 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x796800 }
33642 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
33645 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33646 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x790c0000 }
33648 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
33651 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33652 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x794c0000 }
33654 /* mul.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
33657 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33658 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x796c0000 }
33660 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
33663 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33664 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x790a00 }
33666 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
33669 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33670 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x794a00 }
33672 /* mul.w${G} [$Src16An],${Dsp-16-u8}[sb] */
33675 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33676 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x796a00 }
33678 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
33681 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33682 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x790e0000 }
33684 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
33687 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33688 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x794e0000 }
33690 /* mul.w${G} [$Src16An],${Dsp-16-u16}[sb] */
33693 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33694 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x796e0000 }
33696 /* mul.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
33699 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33700 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x790b00 }
33702 /* mul.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
33705 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33706 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x794b00 }
33708 /* mul.w${G} [$Src16An],${Dsp-16-s8}[fb] */
33711 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33712 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x796b00 }
33714 /* mul.w${G} $Src16RnHI,${Dsp-16-u16} */
33717 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
33718 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x790f0000 }
33720 /* mul.w${G} $Src16AnHI,${Dsp-16-u16} */
33723 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
33724 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x794f0000 }
33726 /* mul.w${G} [$Src16An],${Dsp-16-u16} */
33729 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
33730 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x796f0000 }
33732 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
33735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33736 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x788000 }
33738 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
33741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33742 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78a000 }
33744 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
33747 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33748 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x78b000 }
33750 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
33753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33754 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x788400 }
33756 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
33759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33760 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x78a400 }
33762 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
33765 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33766 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x78b400 }
33768 /* mul.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33771 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33772 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x788600 }
33774 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33777 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33778 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x78a600 }
33780 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33783 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33784 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x78b600 }
33786 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33790 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x78880000 }
33792 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33795 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33796 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78a80000 }
33798 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33801 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33802 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78b80000 }
33804 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33808 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x788c0000 }
33810 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33814 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78ac0000 }
33816 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33819 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33820 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78bc0000 }
33822 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33826 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x788a0000 }
33828 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33832 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78aa0000 }
33834 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33837 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33838 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78ba0000 }
33840 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33844 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x788e0000 }
33846 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33850 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78ae0000 }
33852 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33855 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33856 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78be0000 }
33858 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33862 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x788b0000 }
33864 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33868 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78ab0000 }
33870 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33873 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33874 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78bb0000 }
33876 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33880 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x788f0000 }
33882 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33886 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x78af0000 }
33888 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33891 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33892 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x78bf0000 }
33894 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
33897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33898 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x78c00000 }
33900 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
33903 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33904 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78e00000 }
33906 /* mul.b${G} ${Dsp-16-u16},$Dst16RnQI */
33909 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
33910 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x78f00000 }
33912 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
33915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33916 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x78c40000 }
33918 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
33921 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33922 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x78e40000 }
33924 /* mul.b${G} ${Dsp-16-u16},$Dst16AnQI */
33927 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
33928 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x78f40000 }
33930 /* mul.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33934 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x78c60000 }
33936 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33939 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33940 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x78e60000 }
33942 /* mul.b${G} ${Dsp-16-u16},[$Dst16An] */
33945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33946 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x78f60000 }
33948 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33952 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x78c80000 }
33954 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33958 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x78e80000 }
33960 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33963 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33964 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x78f80000 }
33966 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33970 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x78cc0000 }
33972 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33975 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33976 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x78ec0000 }
33978 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33982 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x78fc0000 }
33984 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33988 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ca0000 }
33990 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
33993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33994 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ea0000 }
33996 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
33999 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
34000 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x78fa0000 }
34002 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
34005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34006 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ce0000 }
34008 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
34011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34012 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ee0000 }
34014 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
34017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34018 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x78fe0000 }
34020 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
34023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34024 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78cb0000 }
34026 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
34029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34030 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78eb0000 }
34032 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
34035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34036 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x78fb0000 }
34038 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
34041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
34042 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x78cf0000 }
34044 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
34047 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
34048 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x78ef0000 }
34050 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
34053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
34054 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x78ff0000 }
34056 /* mul.b${G} $Src16RnQI,$Dst16RnQI */
34059 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
34060 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7800 }
34062 /* mul.b${G} $Src16AnQI,$Dst16RnQI */
34065 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
34066 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7840 }
34068 /* mul.b${G} [$Src16An],$Dst16RnQI */
34071 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
34072 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7860 }
34074 /* mul.b${G} $Src16RnQI,$Dst16AnQI */
34077 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
34078 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7804 }
34080 /* mul.b${G} $Src16AnQI,$Dst16AnQI */
34083 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
34084 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7844 }
34086 /* mul.b${G} [$Src16An],$Dst16AnQI */
34089 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
34090 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7864 }
34092 /* mul.b${G} $Src16RnQI,[$Dst16An] */
34095 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34096 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7806 }
34098 /* mul.b${G} $Src16AnQI,[$Dst16An] */
34101 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34102 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7846 }
34104 /* mul.b${G} [$Src16An],[$Dst16An] */
34107 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
34108 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7866 }
34110 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
34113 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34114 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x780800 }
34116 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
34119 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34120 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x784800 }
34122 /* mul.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
34125 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34126 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x786800 }
34128 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
34131 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34132 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x780c0000 }
34134 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
34137 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34138 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x784c0000 }
34140 /* mul.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
34143 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34144 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x786c0000 }
34146 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
34149 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34150 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x780a00 }
34152 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
34155 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34156 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x784a00 }
34158 /* mul.b${G} [$Src16An],${Dsp-16-u8}[sb] */
34161 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34162 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x786a00 }
34164 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
34167 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34168 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x780e0000 }
34170 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
34173 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34174 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x784e0000 }
34176 /* mul.b${G} [$Src16An],${Dsp-16-u16}[sb] */
34179 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34180 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x786e0000 }
34182 /* mul.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
34185 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34186 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x780b00 }
34188 /* mul.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
34191 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34192 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x784b00 }
34194 /* mul.b${G} [$Src16An],${Dsp-16-s8}[fb] */
34197 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34198 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x786b00 }
34200 /* mul.b${G} $Src16RnQI,${Dsp-16-u16} */
34203 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
34204 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x780f0000 }
34206 /* mul.b${G} $Src16AnQI,${Dsp-16-u16} */
34209 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
34210 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x784f0000 }
34212 /* mul.b${G} [$Src16An],${Dsp-16-u16} */
34215 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
34216 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x786f0000 }
34218 /* mul.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
34221 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
34222 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x891f0000 }
34224 /* mul.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
34227 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
34228 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819f0000 }
34230 /* mul.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
34233 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34234 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x811f0000 }
34236 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34239 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34240 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831f0000 }
34242 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34245 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34246 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839f0000 }
34248 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34251 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34252 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83df0000 }
34254 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34257 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34258 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851f0000 }
34260 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34263 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34264 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859f0000 }
34266 /* mul.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
34269 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34270 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85df0000 }
34272 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34275 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34276 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87df0000 }
34278 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34281 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34282 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871f0000 }
34284 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24} */
34287 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
34288 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x879f0000 }
34290 /* mul.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
34293 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
34294 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x881f00 }
34296 /* mul.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
34299 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
34300 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x809f00 }
34302 /* mul.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34305 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34306 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x801f00 }
34308 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34311 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34312 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821f0000 }
34314 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34317 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34318 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829f0000 }
34320 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34323 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34324 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82df0000 }
34326 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34329 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34330 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841f0000 }
34332 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34335 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34336 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849f0000 }
34338 /* mul.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34341 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34342 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84df0000 }
34344 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34347 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34348 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86df0000 }
34350 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34353 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34354 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861f0000 }
34356 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24} */
34359 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34360 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x869f0000 }
34362 /* mul.w${G} #${Imm-16-HI},$Dst16RnHI */
34365 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
34366 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d500000 }
34368 /* mul.w${G} #${Imm-16-HI},$Dst16AnHI */
34371 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
34372 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d540000 }
34374 /* mul.w${G} #${Imm-16-HI},[$Dst16An] */
34377 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
34378 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d560000 }
34380 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
34383 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34384 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d580000 }
34386 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34389 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34390 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d5a0000 }
34392 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34395 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34396 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d5b0000 }
34398 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
34401 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34402 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d5c0000 }
34404 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34407 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34408 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d5e0000 }
34410 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34413 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34414 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d5f0000 }
34416 /* mul.b${G} #${Imm-16-QI},$Dst16RnQI */
34419 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
34420 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c5000 }
34422 /* mul.b${G} #${Imm-16-QI},$Dst16AnQI */
34425 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
34426 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c5400 }
34428 /* mul.b${G} #${Imm-16-QI},[$Dst16An] */
34431 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
34432 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c5600 }
34434 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
34437 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34438 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c580000 }
34440 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34443 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34444 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c5a0000 }
34446 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34449 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34450 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c5b0000 }
34452 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
34455 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34456 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c5c0000 }
34458 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34461 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34462 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c5e0000 }
34464 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34467 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34468 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c5f0000 }
34470 /* movx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
34473 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
34474 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb81100 }
34476 /* movx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
34479 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
34480 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb09100 }
34482 /* movx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34485 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34486 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb01100 }
34488 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34491 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34492 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2110000 }
34494 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34497 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34498 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2910000 }
34500 /* movx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34503 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34504 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2d10000 }
34506 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34509 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34510 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4110000 }
34512 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34515 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34516 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4910000 }
34518 /* movx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34521 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34522 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4d10000 }
34524 /* movx${X} #${Imm-32-QI},${Dsp-16-u16} */
34527 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34528 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6d10000 }
34530 /* movx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34533 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34534 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6110000 }
34536 /* movx${X} #${Imm-40-QI},${Dsp-16-u24} */
34539 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34540 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6910000 }
34542 /* movhh $Dst32RnPrefixedQI,r0l */
34545 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34546 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a83e }
34548 /* movhh $Dst32AnPrefixedQI,r0l */
34551 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34552 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0be }
34554 /* movhh [$Dst32AnPrefixed],r0l */
34557 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34558 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a03e }
34560 /* movhh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34563 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34564 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a23e00 }
34566 /* movhh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34569 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34570 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a43e00 }
34572 /* movhh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34575 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34576 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a63e00 }
34578 /* movhh ${Dsp-24-u8}[sb],r0l */
34581 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34582 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2be00 }
34584 /* movhh ${Dsp-24-u16}[sb],r0l */
34587 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34588 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4be00 }
34590 /* movhh ${Dsp-24-s8}[fb],r0l */
34593 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34594 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2fe00 }
34596 /* movhh ${Dsp-24-s16}[fb],r0l */
34599 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34600 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4fe00 }
34602 /* movhh ${Dsp-24-u16},r0l */
34605 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34606 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6fe00 }
34608 /* movhh ${Dsp-24-u24},r0l */
34611 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34612 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6be00 }
34614 /* movhl $Dst32RnPrefixedQI,r0l */
34617 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34618 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a82e }
34620 /* movhl $Dst32AnPrefixedQI,r0l */
34623 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34624 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0ae }
34626 /* movhl [$Dst32AnPrefixed],r0l */
34629 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34630 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a02e }
34632 /* movhl ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34635 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34636 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a22e00 }
34638 /* movhl ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34641 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34642 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a42e00 }
34644 /* movhl ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34647 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34648 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a62e00 }
34650 /* movhl ${Dsp-24-u8}[sb],r0l */
34653 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34654 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2ae00 }
34656 /* movhl ${Dsp-24-u16}[sb],r0l */
34659 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34660 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4ae00 }
34662 /* movhl ${Dsp-24-s8}[fb],r0l */
34665 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34666 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ee00 }
34668 /* movhl ${Dsp-24-s16}[fb],r0l */
34671 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34672 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ee00 }
34674 /* movhl ${Dsp-24-u16},r0l */
34677 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34678 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ee00 }
34680 /* movhl ${Dsp-24-u24},r0l */
34683 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34684 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6ae00 }
34686 /* movlh $Dst32RnPrefixedQI,r0l */
34689 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34690 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a81e }
34692 /* movlh $Dst32AnPrefixedQI,r0l */
34695 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34696 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a09e }
34698 /* movlh [$Dst32AnPrefixed],r0l */
34701 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34702 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a01e }
34704 /* movlh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34707 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34708 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a21e00 }
34710 /* movlh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34713 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34714 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a41e00 }
34716 /* movlh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34719 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34720 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a61e00 }
34722 /* movlh ${Dsp-24-u8}[sb],r0l */
34725 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34726 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a29e00 }
34728 /* movlh ${Dsp-24-u16}[sb],r0l */
34731 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34732 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a49e00 }
34734 /* movlh ${Dsp-24-s8}[fb],r0l */
34737 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34738 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2de00 }
34740 /* movlh ${Dsp-24-s16}[fb],r0l */
34743 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34744 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4de00 }
34746 /* movlh ${Dsp-24-u16},r0l */
34749 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34750 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6de00 }
34752 /* movlh ${Dsp-24-u24},r0l */
34755 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34756 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a69e00 }
34758 /* movll $Dst32RnPrefixedQI,r0l */
34761 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34762 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a80e }
34764 /* movll $Dst32AnPrefixedQI,r0l */
34767 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34768 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a08e }
34770 /* movll [$Dst32AnPrefixed],r0l */
34773 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34774 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a00e }
34776 /* movll ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34779 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34780 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a20e00 }
34782 /* movll ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34785 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34786 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a40e00 }
34788 /* movll ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34791 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34792 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a60e00 }
34794 /* movll ${Dsp-24-u8}[sb],r0l */
34797 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34798 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a28e00 }
34800 /* movll ${Dsp-24-u16}[sb],r0l */
34803 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34804 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a48e00 }
34806 /* movll ${Dsp-24-s8}[fb],r0l */
34809 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34810 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ce00 }
34812 /* movll ${Dsp-24-s16}[fb],r0l */
34815 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34816 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ce00 }
34818 /* movll ${Dsp-24-u16},r0l */
34821 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34822 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ce00 }
34824 /* movll ${Dsp-24-u24},r0l */
34827 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34828 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a68e00 }
34830 /* movhh r0l,$Dst32RnPrefixedQI */
34833 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34834 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b83e }
34836 /* movhh r0l,$Dst32AnPrefixedQI */
34839 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34840 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0be }
34842 /* movhh r0l,[$Dst32AnPrefixed] */
34845 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34846 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b03e }
34848 /* movhh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34851 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34852 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b23e00 }
34854 /* movhh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34857 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34858 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b43e00 }
34860 /* movhh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34863 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34864 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b63e00 }
34866 /* movhh r0l,${Dsp-24-u8}[sb] */
34869 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34870 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2be00 }
34872 /* movhh r0l,${Dsp-24-u16}[sb] */
34875 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34876 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4be00 }
34878 /* movhh r0l,${Dsp-24-s8}[fb] */
34881 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34882 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2fe00 }
34884 /* movhh r0l,${Dsp-24-s16}[fb] */
34887 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34888 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4fe00 }
34890 /* movhh r0l,${Dsp-24-u16} */
34893 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34894 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6fe00 }
34896 /* movhh r0l,${Dsp-24-u24} */
34899 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34900 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6be00 }
34902 /* movhl r0l,$Dst32RnPrefixedQI */
34905 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34906 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b82e }
34908 /* movhl r0l,$Dst32AnPrefixedQI */
34911 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34912 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0ae }
34914 /* movhl r0l,[$Dst32AnPrefixed] */
34917 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34918 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b02e }
34920 /* movhl r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34923 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34924 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b22e00 }
34926 /* movhl r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34929 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34930 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b42e00 }
34932 /* movhl r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34935 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34936 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b62e00 }
34938 /* movhl r0l,${Dsp-24-u8}[sb] */
34941 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34942 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2ae00 }
34944 /* movhl r0l,${Dsp-24-u16}[sb] */
34947 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34948 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4ae00 }
34950 /* movhl r0l,${Dsp-24-s8}[fb] */
34953 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34954 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ee00 }
34956 /* movhl r0l,${Dsp-24-s16}[fb] */
34959 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34960 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ee00 }
34962 /* movhl r0l,${Dsp-24-u16} */
34965 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34966 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ee00 }
34968 /* movhl r0l,${Dsp-24-u24} */
34971 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34972 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6ae00 }
34974 /* movlh r0l,$Dst32RnPrefixedQI */
34977 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34978 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b81e }
34980 /* movlh r0l,$Dst32AnPrefixedQI */
34983 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34984 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b09e }
34986 /* movlh r0l,[$Dst32AnPrefixed] */
34989 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34990 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b01e }
34992 /* movlh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34995 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34996 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b21e00 }
34998 /* movlh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35001 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35002 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b41e00 }
35004 /* movlh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35007 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35008 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b61e00 }
35010 /* movlh r0l,${Dsp-24-u8}[sb] */
35013 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35014 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b29e00 }
35016 /* movlh r0l,${Dsp-24-u16}[sb] */
35019 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35020 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b49e00 }
35022 /* movlh r0l,${Dsp-24-s8}[fb] */
35025 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35026 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2de00 }
35028 /* movlh r0l,${Dsp-24-s16}[fb] */
35031 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35032 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4de00 }
35034 /* movlh r0l,${Dsp-24-u16} */
35037 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35038 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6de00 }
35040 /* movlh r0l,${Dsp-24-u24} */
35043 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35044 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b69e00 }
35046 /* movll r0l,$Dst32RnPrefixedQI */
35049 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
35050 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b80e }
35052 /* movll r0l,$Dst32AnPrefixedQI */
35055 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
35056 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b08e }
35058 /* movll r0l,[$Dst32AnPrefixed] */
35061 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
35062 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b00e }
35064 /* movll r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
35067 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35068 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b20e00 }
35070 /* movll r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35073 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35074 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b40e00 }
35076 /* movll r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35079 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35080 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b60e00 }
35082 /* movll r0l,${Dsp-24-u8}[sb] */
35085 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35086 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b28e00 }
35088 /* movll r0l,${Dsp-24-u16}[sb] */
35091 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35092 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b48e00 }
35094 /* movll r0l,${Dsp-24-s8}[fb] */
35097 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35098 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ce00 }
35100 /* movll r0l,${Dsp-24-s16}[fb] */
35103 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35104 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ce00 }
35106 /* movll r0l,${Dsp-24-u16} */
35109 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35110 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ce00 }
35112 /* movll r0l,${Dsp-24-u24} */
35115 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35116 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b68e00 }
35118 /* movhh $Dst16RnQI,r0l */
35121 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35122 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c30 }
35124 /* movhh $Dst16AnQI,r0l */
35127 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35128 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c34 }
35130 /* movhh [$Dst16An],r0l */
35133 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35134 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c36 }
35136 /* movhh ${Dsp-16-u8}[$Dst16An],r0l */
35139 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35140 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c3800 }
35142 /* movhh ${Dsp-16-u16}[$Dst16An],r0l */
35145 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35146 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c3c0000 }
35148 /* movhh ${Dsp-16-u8}[sb],r0l */
35151 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35152 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c3a00 }
35154 /* movhh ${Dsp-16-u16}[sb],r0l */
35157 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35158 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c3e0000 }
35160 /* movhh ${Dsp-16-s8}[fb],r0l */
35163 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35164 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c3b00 }
35166 /* movhh ${Dsp-16-u16},r0l */
35169 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35170 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c3f0000 }
35172 /* movhl $Dst16RnQI,r0l */
35175 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35176 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c10 }
35178 /* movhl $Dst16AnQI,r0l */
35181 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35182 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c14 }
35184 /* movhl [$Dst16An],r0l */
35187 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35188 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c16 }
35190 /* movhl ${Dsp-16-u8}[$Dst16An],r0l */
35193 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35194 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c1800 }
35196 /* movhl ${Dsp-16-u16}[$Dst16An],r0l */
35199 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35200 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c1c0000 }
35202 /* movhl ${Dsp-16-u8}[sb],r0l */
35205 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35206 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c1a00 }
35208 /* movhl ${Dsp-16-u16}[sb],r0l */
35211 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35212 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c1e0000 }
35214 /* movhl ${Dsp-16-s8}[fb],r0l */
35217 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35218 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c1b00 }
35220 /* movhl ${Dsp-16-u16},r0l */
35223 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35224 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c1f0000 }
35226 /* movlh $Dst16RnQI,r0l */
35229 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35230 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c20 }
35232 /* movlh $Dst16AnQI,r0l */
35235 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35236 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c24 }
35238 /* movlh [$Dst16An],r0l */
35241 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35242 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c26 }
35244 /* movlh ${Dsp-16-u8}[$Dst16An],r0l */
35247 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35248 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c2800 }
35250 /* movlh ${Dsp-16-u16}[$Dst16An],r0l */
35253 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35254 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c2c0000 }
35256 /* movlh ${Dsp-16-u8}[sb],r0l */
35259 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35260 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c2a00 }
35262 /* movlh ${Dsp-16-u16}[sb],r0l */
35265 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35266 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c2e0000 }
35268 /* movlh ${Dsp-16-s8}[fb],r0l */
35271 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35272 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c2b00 }
35274 /* movlh ${Dsp-16-u16},r0l */
35277 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35278 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c2f0000 }
35280 /* movll $Dst16RnQI,r0l */
35283 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35284 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c00 }
35286 /* movll $Dst16AnQI,r0l */
35289 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35290 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c04 }
35292 /* movll [$Dst16An],r0l */
35295 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35296 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c06 }
35298 /* movll ${Dsp-16-u8}[$Dst16An],r0l */
35301 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35302 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c0800 }
35304 /* movll ${Dsp-16-u16}[$Dst16An],r0l */
35307 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35308 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c0c0000 }
35310 /* movll ${Dsp-16-u8}[sb],r0l */
35313 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35314 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c0a00 }
35316 /* movll ${Dsp-16-u16}[sb],r0l */
35319 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35320 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c0e0000 }
35322 /* movll ${Dsp-16-s8}[fb],r0l */
35325 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35326 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c0b00 }
35328 /* movll ${Dsp-16-u16},r0l */
35331 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35332 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c0f0000 }
35334 /* movhh r0l,$Dst16RnQI */
35337 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35338 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7cb0 }
35340 /* movhh r0l,$Dst16AnQI */
35343 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35344 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7cb4 }
35346 /* movhh r0l,[$Dst16An] */
35349 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35350 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7cb6 }
35352 /* movhh r0l,${Dsp-16-u8}[$Dst16An] */
35355 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35356 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7cb800 }
35358 /* movhh r0l,${Dsp-16-u16}[$Dst16An] */
35361 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35362 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cbc0000 }
35364 /* movhh r0l,${Dsp-16-u8}[sb] */
35367 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35368 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7cba00 }
35370 /* movhh r0l,${Dsp-16-u16}[sb] */
35373 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35374 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cbe0000 }
35376 /* movhh r0l,${Dsp-16-s8}[fb] */
35379 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35380 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cbb00 }
35382 /* movhh r0l,${Dsp-16-u16} */
35385 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35386 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7cbf0000 }
35388 /* movhl r0l,$Dst16RnQI */
35391 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35392 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c90 }
35394 /* movhl r0l,$Dst16AnQI */
35397 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35398 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c94 }
35400 /* movhl r0l,[$Dst16An] */
35403 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35404 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c96 }
35406 /* movhl r0l,${Dsp-16-u8}[$Dst16An] */
35409 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35410 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c9800 }
35412 /* movhl r0l,${Dsp-16-u16}[$Dst16An] */
35415 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35416 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c9c0000 }
35418 /* movhl r0l,${Dsp-16-u8}[sb] */
35421 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35422 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c9a00 }
35424 /* movhl r0l,${Dsp-16-u16}[sb] */
35427 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35428 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c9e0000 }
35430 /* movhl r0l,${Dsp-16-s8}[fb] */
35433 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35434 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c9b00 }
35436 /* movhl r0l,${Dsp-16-u16} */
35439 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35440 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c9f0000 }
35442 /* movlh r0l,$Dst16RnQI */
35445 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35446 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7ca0 }
35448 /* movlh r0l,$Dst16AnQI */
35451 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35452 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7ca4 }
35454 /* movlh r0l,[$Dst16An] */
35457 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35458 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7ca6 }
35460 /* movlh r0l,${Dsp-16-u8}[$Dst16An] */
35463 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35464 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7ca800 }
35466 /* movlh r0l,${Dsp-16-u16}[$Dst16An] */
35469 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35470 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cac0000 }
35472 /* movlh r0l,${Dsp-16-u8}[sb] */
35475 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35476 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7caa00 }
35478 /* movlh r0l,${Dsp-16-u16}[sb] */
35481 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35482 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cae0000 }
35484 /* movlh r0l,${Dsp-16-s8}[fb] */
35487 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35488 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cab00 }
35490 /* movlh r0l,${Dsp-16-u16} */
35493 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35494 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7caf0000 }
35496 /* movll r0l,$Dst16RnQI */
35499 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35500 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c80 }
35502 /* movll r0l,$Dst16AnQI */
35505 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35506 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c84 }
35508 /* movll r0l,[$Dst16An] */
35511 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35512 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c86 }
35514 /* movll r0l,${Dsp-16-u8}[$Dst16An] */
35517 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35518 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c8800 }
35520 /* movll r0l,${Dsp-16-u16}[$Dst16An] */
35523 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35524 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c8c0000 }
35526 /* movll r0l,${Dsp-16-u8}[sb] */
35529 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35530 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c8a00 }
35532 /* movll r0l,${Dsp-16-u16}[sb] */
35535 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35536 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c8e0000 }
35538 /* movll r0l,${Dsp-16-s8}[fb] */
35541 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35542 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c8b00 }
35544 /* movll r0l,${Dsp-16-u16} */
35547 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35548 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c8f0000 }
35550 /* mova [$Dst32AnUnprefixed],a1 */
35553 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35554 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11b }
35556 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a1 */
35559 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35560 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31b00 }
35562 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a1 */
35565 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35566 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51b0000 }
35568 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a1 */
35571 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35572 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71b0000 }
35574 /* mova ${Dsp-16-u8}[sb],a1 */
35577 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35578 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39b00 }
35580 /* mova ${Dsp-16-u16}[sb],a1 */
35583 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35584 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59b0000 }
35586 /* mova ${Dsp-16-s8}[fb],a1 */
35589 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35590 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3db00 }
35592 /* mova ${Dsp-16-s16}[fb],a1 */
35595 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35596 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5db0000 }
35598 /* mova ${Dsp-16-u16},a1 */
35601 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35602 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7db0000 }
35604 /* mova ${Dsp-16-u24},a1 */
35607 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '1', 0 } },
35608 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79b0000 }
35610 /* mova [$Dst32AnUnprefixed],a0 */
35613 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35614 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11a }
35616 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a0 */
35619 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35620 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31a00 }
35622 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a0 */
35625 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35626 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51a0000 }
35628 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a0 */
35631 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35632 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71a0000 }
35634 /* mova ${Dsp-16-u8}[sb],a0 */
35637 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35638 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39a00 }
35640 /* mova ${Dsp-16-u16}[sb],a0 */
35643 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35644 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59a0000 }
35646 /* mova ${Dsp-16-s8}[fb],a0 */
35649 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35650 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3da00 }
35652 /* mova ${Dsp-16-s16}[fb],a0 */
35655 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35656 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5da0000 }
35658 /* mova ${Dsp-16-u16},a0 */
35661 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35662 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7da0000 }
35664 /* mova ${Dsp-16-u24},a0 */
35667 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '0', 0 } },
35668 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79a0000 }
35670 /* mova [$Dst32AnUnprefixed],r3r1 */
35673 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35674 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd119 }
35676 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r3r1 */
35679 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35680 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31900 }
35682 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r3r1 */
35685 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35686 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5190000 }
35688 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r3r1 */
35691 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35692 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7190000 }
35694 /* mova ${Dsp-16-u8}[sb],r3r1 */
35697 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35698 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39900 }
35700 /* mova ${Dsp-16-u16}[sb],r3r1 */
35703 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35704 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5990000 }
35706 /* mova ${Dsp-16-s8}[fb],r3r1 */
35709 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35710 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d900 }
35712 /* mova ${Dsp-16-s16}[fb],r3r1 */
35715 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35716 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d90000 }
35718 /* mova ${Dsp-16-u16},r3r1 */
35721 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 'r', '1', 0 } },
35722 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d90000 }
35724 /* mova ${Dsp-16-u24},r3r1 */
35727 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '3', 'r', '1', 0 } },
35728 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7990000 }
35730 /* mova [$Dst32AnUnprefixed],r2r0 */
35733 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35734 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd118 }
35736 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r2r0 */
35739 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35740 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31800 }
35742 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r2r0 */
35745 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35746 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5180000 }
35748 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r2r0 */
35751 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35752 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7180000 }
35754 /* mova ${Dsp-16-u8}[sb],r2r0 */
35757 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35758 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39800 }
35760 /* mova ${Dsp-16-u16}[sb],r2r0 */
35763 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35764 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5980000 }
35766 /* mova ${Dsp-16-s8}[fb],r2r0 */
35769 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35770 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d800 }
35772 /* mova ${Dsp-16-s16}[fb],r2r0 */
35775 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35776 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d80000 }
35778 /* mova ${Dsp-16-u16},r2r0 */
35781 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 'r', '0', 0 } },
35782 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d80000 }
35784 /* mova ${Dsp-16-u24},r2r0 */
35787 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '2', 'r', '0', 0 } },
35788 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7980000 }
35790 /* mova [$Dst16An],a1 */
35793 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35794 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb56 }
35796 /* mova ${Dsp-16-u8}[$Dst16An],a1 */
35799 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35800 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb5800 }
35802 /* mova ${Dsp-16-u16}[$Dst16An],a1 */
35805 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35806 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb5c0000 }
35808 /* mova ${Dsp-16-u8}[sb],a1 */
35811 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35812 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb5a00 }
35814 /* mova ${Dsp-16-u16}[sb],a1 */
35817 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35818 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb5e0000 }
35820 /* mova ${Dsp-16-s8}[fb],a1 */
35823 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35824 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb5b00 }
35826 /* mova ${Dsp-16-u16},a1 */
35829 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35830 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb5f0000 }
35832 /* mova [$Dst16An],a0 */
35835 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35836 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb46 }
35838 /* mova ${Dsp-16-u8}[$Dst16An],a0 */
35841 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35842 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb4800 }
35844 /* mova ${Dsp-16-u16}[$Dst16An],a0 */
35847 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35848 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb4c0000 }
35850 /* mova ${Dsp-16-u8}[sb],a0 */
35853 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35854 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb4a00 }
35856 /* mova ${Dsp-16-u16}[sb],a0 */
35859 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35860 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb4e0000 }
35862 /* mova ${Dsp-16-s8}[fb],a0 */
35865 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35866 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb4b00 }
35868 /* mova ${Dsp-16-u16},a0 */
35871 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35872 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb4f0000 }
35874 /* mova [$Dst16An],r3 */
35877 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35878 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb36 }
35880 /* mova ${Dsp-16-u8}[$Dst16An],r3 */
35883 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35884 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb3800 }
35886 /* mova ${Dsp-16-u16}[$Dst16An],r3 */
35889 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35890 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb3c0000 }
35892 /* mova ${Dsp-16-u8}[sb],r3 */
35895 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35896 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb3a00 }
35898 /* mova ${Dsp-16-u16}[sb],r3 */
35901 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35902 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb3e0000 }
35904 /* mova ${Dsp-16-s8}[fb],r3 */
35907 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 0 } },
35908 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb3b00 }
35910 /* mova ${Dsp-16-u16},r3 */
35913 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 0 } },
35914 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb3f0000 }
35916 /* mova [$Dst16An],r2 */
35919 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35920 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb26 }
35922 /* mova ${Dsp-16-u8}[$Dst16An],r2 */
35925 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35926 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb2800 }
35928 /* mova ${Dsp-16-u16}[$Dst16An],r2 */
35931 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35932 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb2c0000 }
35934 /* mova ${Dsp-16-u8}[sb],r2 */
35937 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35938 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb2a00 }
35940 /* mova ${Dsp-16-u16}[sb],r2 */
35943 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35944 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb2e0000 }
35946 /* mova ${Dsp-16-s8}[fb],r2 */
35949 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 0 } },
35950 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb2b00 }
35952 /* mova ${Dsp-16-u16},r2 */
35955 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 0 } },
35956 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb2f0000 }
35958 /* mova [$Dst16An],r1 */
35961 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35962 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb16 }
35964 /* mova ${Dsp-16-u8}[$Dst16An],r1 */
35967 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35968 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb1800 }
35970 /* mova ${Dsp-16-u16}[$Dst16An],r1 */
35973 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35974 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb1c0000 }
35976 /* mova ${Dsp-16-u8}[sb],r1 */
35979 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35980 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb1a00 }
35982 /* mova ${Dsp-16-u16}[sb],r1 */
35985 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35986 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb1e0000 }
35988 /* mova ${Dsp-16-s8}[fb],r1 */
35991 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
35992 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb1b00 }
35994 /* mova ${Dsp-16-u16},r1 */
35997 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '1', 0 } },
35998 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb1f0000 }
36000 /* mova [$Dst16An],r0 */
36003 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36004 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb06 }
36006 /* mova ${Dsp-16-u8}[$Dst16An],r0 */
36009 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36010 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb0800 }
36012 /* mova ${Dsp-16-u16}[$Dst16An],r0 */
36015 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36016 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb0c0000 }
36018 /* mova ${Dsp-16-u8}[sb],r0 */
36021 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36022 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb0a00 }
36024 /* mova ${Dsp-16-u16}[sb],r0 */
36027 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36028 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb0e0000 }
36030 /* mova ${Dsp-16-s8}[fb],r0 */
36033 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36034 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb0b00 }
36036 /* mova ${Dsp-16-u16},r0 */
36039 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 0 } },
36040 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb0f0000 }
36042 /* mov.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36046 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30f0000 }
36048 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36051 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36052 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38f0000 }
36054 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36057 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36058 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3cf0000 }
36060 /* mov.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36064 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50f0000 }
36066 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36069 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36070 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58f0000 }
36072 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36075 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36076 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5cf0000 }
36078 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36082 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7cf0000 }
36084 /* mov.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36087 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36088 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70f0000 }
36090 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36094 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78f0000 }
36096 /* mov.w${G} $Dst32RnUnprefixedHI,${Dsp-16-s8}[sp] */
36099 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36100 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xa90f00 }
36102 /* mov.w${G} $Dst32AnUnprefixedHI,${Dsp-16-s8}[sp] */
36105 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36106 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18f00 }
36108 /* mov.w${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36111 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36112 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xa10f00 }
36114 /* mov.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36118 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20f0000 }
36120 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36123 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36124 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28f0000 }
36126 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36129 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36130 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2cf0000 }
36132 /* mov.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36136 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40f0000 }
36138 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36141 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36142 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48f0000 }
36144 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36147 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36148 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4cf0000 }
36150 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36154 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6cf0000 }
36156 /* mov.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36159 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36160 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60f0000 }
36162 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36166 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68f0000 }
36168 /* mov.b${G} $Dst32RnUnprefixedQI,${Dsp-16-s8}[sp] */
36171 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36172 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xa80f00 }
36174 /* mov.b${G} $Dst32AnUnprefixedQI,${Dsp-16-s8}[sp] */
36177 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36178 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xa08f00 }
36180 /* mov.b${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36183 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36184 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xa00f00 }
36186 /* mov.w${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36190 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75380000 }
36192 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36195 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36196 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x753a0000 }
36198 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36201 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36202 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x753b0000 }
36204 /* mov.w${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36207 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36208 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x753c0000 }
36210 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36213 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36214 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x753e0000 }
36216 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36220 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x753f0000 }
36222 /* mov.w${G} $Dst16RnHI,${Dsp-16-s8}[sp] */
36225 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36226 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x753000 }
36228 /* mov.w${G} $Dst16AnHI,${Dsp-16-s8}[sp] */
36231 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36232 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x753400 }
36234 /* mov.w${G} [$Dst16An],${Dsp-16-s8}[sp] */
36237 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36238 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x753600 }
36240 /* mov.b${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36244 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74380000 }
36246 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36250 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x743a0000 }
36252 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36255 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36256 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x743b0000 }
36258 /* mov.b${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36262 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x743c0000 }
36264 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36268 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x743e0000 }
36270 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36274 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x743f0000 }
36276 /* mov.b${G} $Dst16RnQI,${Dsp-16-s8}[sp] */
36279 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36280 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x743000 }
36282 /* mov.b${G} $Dst16AnQI,${Dsp-16-s8}[sp] */
36285 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36286 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x743400 }
36288 /* mov.b${G} [$Dst16An],${Dsp-16-s8}[sp] */
36291 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36292 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x743600 }
36294 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36297 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36298 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30f0000 }
36300 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36303 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36304 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38f0000 }
36306 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36309 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36310 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3cf0000 }
36312 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36315 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36316 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50f0000 }
36318 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36321 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36322 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58f0000 }
36324 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36327 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36328 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5cf0000 }
36330 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36333 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36334 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7cf0000 }
36336 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36339 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36340 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70f0000 }
36342 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36345 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36346 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78f0000 }
36348 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedHI */
36351 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
36352 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xb90f00 }
36354 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedHI */
36357 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
36358 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18f00 }
36360 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36363 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36364 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xb10f00 }
36366 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36369 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36370 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20f0000 }
36372 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36375 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36376 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28f0000 }
36378 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36381 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36382 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2cf0000 }
36384 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36387 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36388 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40f0000 }
36390 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36393 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36394 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48f0000 }
36396 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36399 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36400 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4cf0000 }
36402 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36405 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36406 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6cf0000 }
36408 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36411 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36412 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60f0000 }
36414 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36417 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36418 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68f0000 }
36420 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedQI */
36423 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
36424 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xb80f00 }
36426 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedQI */
36429 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
36430 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xb08f00 }
36432 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36435 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36436 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xb00f00 }
36438 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36441 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36442 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75b80000 }
36444 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36447 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36448 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x75ba0000 }
36450 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36453 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36454 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x75bb0000 }
36456 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36459 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36460 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x75bc0000 }
36462 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36465 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36466 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x75be0000 }
36468 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36471 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36472 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x75bf0000 }
36474 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16RnHI */
36477 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNHI
), 0 } },
36478 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x75b000 }
36480 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16AnHI */
36483 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANHI
), 0 } },
36484 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x75b400 }
36486 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36489 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36490 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x75b600 }
36492 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36495 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36496 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74b80000 }
36498 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36501 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36502 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x74ba0000 }
36504 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36507 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36508 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x74bb0000 }
36510 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36513 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36514 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x74bc0000 }
36516 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36519 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36520 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x74be0000 }
36522 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36525 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36526 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x74bf0000 }
36528 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16RnQI */
36531 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNQI
), 0 } },
36532 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x74b000 }
36534 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16AnQI */
36537 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANQI
), 0 } },
36538 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x74b400 }
36540 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36543 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36544 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x74b600 }
36546 /* mov.l${S} ${Dsp-8-u8}[sb],a1 */
36549 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
36550 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6900 }
36552 /* mov.l${S} ${Dsp-8-s8}[fb],a1 */
36555 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
36556 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7900 }
36558 /* mov.l${S} ${Dsp-8-u8}[sb],a0 */
36561 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
36562 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6800 }
36564 /* mov.l${S} ${Dsp-8-s8}[fb],a0 */
36567 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
36568 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7800 }
36570 /* mov.l${S} ${Dsp-8-u16},a1 */
36573 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '1', 0 } },
36574 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x590000 }
36576 /* mov.l${S} ${Dsp-8-u16},a0 */
36579 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '0', 0 } },
36580 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x580000 }
36582 /* mov.w${S} r0,${Dsp-8-u8}[sb] */
36585 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36586 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2100 }
36588 /* mov.w${S} r0,${Dsp-8-s8}[fb] */
36591 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36592 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3100 }
36594 /* mov.b${S} r0l,${Dsp-8-u8}[sb] */
36597 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36598 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2000 }
36600 /* mov.b${S} r0l,${Dsp-8-s8}[fb] */
36603 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36604 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3000 }
36606 /* mov.w${S} r0,${Dsp-8-u16} */
36609 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U16
), 0 } },
36610 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x110000 }
36612 /* mov.b${S} r0l,${Dsp-8-u16} */
36615 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U16
), 0 } },
36616 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x100000 }
36618 /* mov.w${S} ${Dsp-8-u8}[sb],r1 */
36621 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
36622 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6f00 }
36624 /* mov.w${S} ${Dsp-8-s8}[fb],r1 */
36627 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
36628 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7f00 }
36630 /* mov.b${S} ${Dsp-8-u8}[sb],r1l */
36633 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 'l', 0 } },
36634 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6e00 }
36636 /* mov.b${S} ${Dsp-8-s8}[fb],r1l */
36639 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 'l', 0 } },
36640 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7e00 }
36642 /* mov.w${S} ${Dsp-8-u16},r1 */
36645 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 0 } },
36646 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5f0000 }
36648 /* mov.b${S} ${Dsp-8-u16},r1l */
36651 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 'l', 0 } },
36652 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5e0000 }
36654 /* mov.w${S} r0,r1 */
36657 { { MNEM
, OP (S
), ' ', 'r', '0', ',', 'r', '1', 0 } },
36658 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x4f }
36660 /* mov.b${S} r0l,r1l */
36663 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'r', '1', 'l', 0 } },
36664 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x4e }
36666 /* mov.w${S} ${Dsp-8-u8}[sb],r0 */
36669 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36670 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2900 }
36672 /* mov.w${S} ${Dsp-8-s8}[fb],r0 */
36675 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36676 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3900 }
36678 /* mov.b${S} ${Dsp-8-u8}[sb],r0l */
36681 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
36682 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2800 }
36684 /* mov.b${S} ${Dsp-8-s8}[fb],r0l */
36687 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
36688 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3800 }
36690 /* mov.w${S} ${Dsp-8-u16},r0 */
36693 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 0 } },
36694 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x190000 }
36696 /* mov.b${S} ${Dsp-8-u16},r0l */
36699 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 'l', 0 } },
36700 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x180000 }
36702 /* mov.b${S} ${SrcDst16-r0l-r0h-S-normal} */
36705 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
36706 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x8 }
36708 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
36711 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36712 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x900 }
36714 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
36717 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36718 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0xa00 }
36720 /* mov.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
36723 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
36724 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0xb0000 }
36726 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u8}[sb] */
36729 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36730 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x100 }
36732 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-s8}[fb] */
36735 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36736 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x200 }
36738 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u16} */
36741 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U16
), 0 } },
36742 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x30000 }
36744 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36747 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36748 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990300 }
36750 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
36753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36754 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992300 }
36756 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
36759 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36760 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993300 }
36762 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36765 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36766 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918300 }
36768 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
36771 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36772 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a300 }
36774 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
36777 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36778 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b300 }
36780 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
36783 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36784 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910300 }
36786 /* mov.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
36789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36790 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912300 }
36792 /* mov.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
36795 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36796 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913300 }
36798 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36801 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36802 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93030000 }
36804 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36808 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93230000 }
36810 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36813 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36814 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93330000 }
36816 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36819 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36820 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95030000 }
36822 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36826 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95230000 }
36828 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36831 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36832 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95330000 }
36834 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36837 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36838 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97030000 }
36840 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36844 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97230000 }
36846 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36849 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36850 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97330000 }
36852 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
36855 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36856 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93830000 }
36858 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
36861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36862 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a30000 }
36864 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
36867 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36868 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b30000 }
36870 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
36873 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36874 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95830000 }
36876 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
36879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36880 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a30000 }
36882 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
36885 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36886 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b30000 }
36888 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
36891 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36892 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c30000 }
36894 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
36897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36898 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e30000 }
36900 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
36903 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36904 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f30000 }
36906 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
36909 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36910 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c30000 }
36912 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
36915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36916 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e30000 }
36918 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
36921 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36922 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f30000 }
36924 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
36927 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
36928 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c30000 }
36930 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
36933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36934 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e30000 }
36936 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
36939 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36940 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f30000 }
36942 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
36945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
36946 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97830000 }
36948 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
36951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36952 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a30000 }
36954 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
36957 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36958 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b30000 }
36960 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36963 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36964 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9030000 }
36966 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
36969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36970 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9230000 }
36972 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
36975 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36976 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9330000 }
36978 /* mov.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
36981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36982 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9330000 }
36984 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36988 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1830000 }
36990 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
36993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36994 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a30000 }
36996 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
36999 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37000 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b30000 }
37002 /* mov.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
37005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37006 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b30000 }
37008 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37012 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1030000 }
37014 /* mov.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37018 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1230000 }
37020 /* mov.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37023 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37024 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1330000 }
37026 /* mov.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37030 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1330000 }
37032 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37036 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3030000 }
37038 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37042 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3230000 }
37044 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37047 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37048 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3330000 }
37050 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37054 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3330000 }
37056 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37059 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37060 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5030000 }
37062 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37065 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37066 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5230000 }
37068 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37071 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37072 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5330000 }
37074 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37078 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5330000 }
37080 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37084 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7030000 }
37086 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37089 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37090 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7230000 }
37092 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37095 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37096 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7330000 }
37098 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37102 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7330000 }
37104 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
37107 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37108 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3830000 }
37110 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
37113 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37114 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a30000 }
37116 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
37119 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37120 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b30000 }
37122 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
37125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37126 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b30000 }
37128 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
37131 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37132 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5830000 }
37134 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
37137 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37138 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a30000 }
37140 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
37143 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37144 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b30000 }
37146 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
37149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37150 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b30000 }
37152 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
37155 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37156 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c30000 }
37158 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
37161 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37162 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e30000 }
37164 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
37167 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37168 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f30000 }
37170 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
37173 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37174 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f30000 }
37176 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
37179 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37180 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c30000 }
37182 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
37185 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37186 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e30000 }
37188 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
37191 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37192 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f30000 }
37194 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
37197 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37198 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f30000 }
37200 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
37203 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
37204 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c30000 }
37206 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
37209 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37210 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e30000 }
37212 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
37215 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37216 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f30000 }
37218 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
37221 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
37222 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f30000 }
37224 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
37227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
37228 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7830000 }
37230 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
37233 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37234 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a30000 }
37236 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
37239 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37240 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b30000 }
37242 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
37245 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
37246 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b30000 }
37248 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37251 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37252 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9030000 }
37254 /* mov.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
37257 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37258 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9230000 }
37260 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37264 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1830000 }
37266 /* mov.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
37269 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37270 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a30000 }
37272 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37276 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1030000 }
37278 /* mov.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
37281 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37282 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1230000 }
37284 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
37287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37288 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3030000 }
37290 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
37293 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37294 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3230000 }
37296 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
37299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37300 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5030000 }
37302 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
37305 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37306 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5230000 }
37308 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
37311 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37312 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7030000 }
37314 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
37317 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37318 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7230000 }
37320 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
37323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37324 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3830000 }
37326 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
37329 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37330 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a30000 }
37332 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
37335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37336 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5830000 }
37338 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
37341 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37342 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a30000 }
37344 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
37347 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37348 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c30000 }
37350 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
37353 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37354 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e30000 }
37356 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
37359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37360 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c30000 }
37362 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
37365 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37366 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e30000 }
37368 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
37371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
37372 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c30000 }
37374 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
37377 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
37378 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e30000 }
37380 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
37383 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
37384 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7830000 }
37386 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
37389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
37390 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a30000 }
37392 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
37395 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37396 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc903 }
37398 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
37401 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37402 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8923 }
37404 /* mov.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37407 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37408 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8903 }
37410 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
37413 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37414 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc183 }
37416 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
37419 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37420 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a3 }
37422 /* mov.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37425 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37426 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8183 }
37428 /* mov.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
37431 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37432 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc103 }
37434 /* mov.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
37437 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37438 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8123 }
37440 /* mov.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37443 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37444 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8103 }
37446 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37449 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37450 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30300 }
37452 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37455 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37456 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832300 }
37458 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
37461 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37462 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830300 }
37464 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37467 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37468 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5030000 }
37470 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37473 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37474 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85230000 }
37476 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
37479 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37480 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85030000 }
37482 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37485 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37486 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7030000 }
37488 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37491 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37492 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87230000 }
37494 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
37497 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37498 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87030000 }
37500 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
37503 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37504 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38300 }
37506 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
37509 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37510 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a300 }
37512 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
37515 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37516 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838300 }
37518 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
37521 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37522 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5830000 }
37524 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
37527 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37528 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a30000 }
37530 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
37533 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37534 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85830000 }
37536 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
37539 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37540 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c300 }
37542 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
37545 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37546 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e300 }
37548 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
37551 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37552 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c300 }
37554 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
37557 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37558 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c30000 }
37560 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
37563 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37564 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e30000 }
37566 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
37569 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37570 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c30000 }
37572 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
37575 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37576 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c30000 }
37578 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
37581 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37582 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e30000 }
37584 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
37587 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
37588 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c30000 }
37590 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
37593 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37594 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7830000 }
37596 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
37599 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37600 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a30000 }
37602 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
37605 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
37606 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87830000 }
37608 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16AnQI-S} */
37611 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37612 & ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI
, { 0x3100 }
37614 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16AnQI-S} */
37617 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37618 & ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI
, { 0x3200 }
37620 /* mov.b${S} ${Dsp-8-u16},${Dst16AnQI-S} */
37623 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16ANQI_S
), 0 } },
37624 & ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI
, { 0x330000 }
37626 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37629 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37630 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990b00 }
37632 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
37635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37636 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992b00 }
37638 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
37641 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37642 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993b00 }
37644 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37648 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918b00 }
37650 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
37653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37654 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ab00 }
37656 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
37659 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37660 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bb00 }
37662 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37666 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910b00 }
37668 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
37671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37672 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912b00 }
37674 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
37677 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37678 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913b00 }
37680 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37683 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37684 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930b0000 }
37686 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37690 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932b0000 }
37692 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37695 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37696 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933b0000 }
37698 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37701 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37702 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950b0000 }
37704 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37708 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952b0000 }
37710 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37713 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37714 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953b0000 }
37716 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37719 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37720 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970b0000 }
37722 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37725 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37726 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972b0000 }
37728 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37731 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37732 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973b0000 }
37734 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
37737 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37738 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938b0000 }
37740 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
37743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37744 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ab0000 }
37746 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
37749 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37750 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bb0000 }
37752 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
37755 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37756 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958b0000 }
37758 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
37761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37762 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ab0000 }
37764 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
37767 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37768 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bb0000 }
37770 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
37773 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37774 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cb0000 }
37776 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
37779 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37780 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93eb0000 }
37782 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
37785 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37786 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fb0000 }
37788 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
37791 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37792 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cb0000 }
37794 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
37797 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37798 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95eb0000 }
37800 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
37803 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37804 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fb0000 }
37806 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
37809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
37810 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cb0000 }
37812 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
37815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37816 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97eb0000 }
37818 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
37821 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37822 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fb0000 }
37824 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
37827 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
37828 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978b0000 }
37830 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
37833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37834 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ab0000 }
37836 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
37839 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37840 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bb0000 }
37842 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37845 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37846 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90b0000 }
37848 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
37851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37852 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92b0000 }
37854 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
37857 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37858 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93b0000 }
37860 /* mov.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
37863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37864 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93b0000 }
37866 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37870 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18b0000 }
37872 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
37875 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37876 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ab0000 }
37878 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
37881 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37882 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bb0000 }
37884 /* mov.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
37887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37888 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bb0000 }
37890 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37894 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10b0000 }
37896 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37900 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12b0000 }
37902 /* mov.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37905 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37906 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13b0000 }
37908 /* mov.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37912 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13b0000 }
37914 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37918 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30b0000 }
37920 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37923 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37924 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32b0000 }
37926 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37929 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37930 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33b0000 }
37932 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37936 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33b0000 }
37938 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37942 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50b0000 }
37944 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37948 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52b0000 }
37950 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37953 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37954 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53b0000 }
37956 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37960 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53b0000 }
37962 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37966 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70b0000 }
37968 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37972 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72b0000 }
37974 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37977 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37978 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73b0000 }
37980 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37984 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73b0000 }
37986 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
37989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37990 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38b0000 }
37992 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
37995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37996 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ab0000 }
37998 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38001 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38002 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bb0000 }
38004 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38008 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bb0000 }
38010 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38014 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58b0000 }
38016 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38020 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ab0000 }
38022 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38025 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38026 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bb0000 }
38028 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38032 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bb0000 }
38034 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38038 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cb0000 }
38040 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38044 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3eb0000 }
38046 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38049 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38050 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fb0000 }
38052 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38056 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fb0000 }
38058 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38062 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cb0000 }
38064 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38068 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5eb0000 }
38070 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38073 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38074 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fb0000 }
38076 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38080 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fb0000 }
38082 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38085 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38086 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cb0000 }
38088 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38092 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7eb0000 }
38094 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38097 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38098 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fb0000 }
38100 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
38103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38104 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fb0000 }
38106 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38110 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78b0000 }
38112 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38116 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ab0000 }
38118 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38121 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38122 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bb0000 }
38124 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
38127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
38128 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bb0000 }
38130 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38134 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90b0000 }
38136 /* mov.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
38139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38140 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92b0000 }
38142 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38146 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18b0000 }
38148 /* mov.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
38151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38152 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ab0000 }
38154 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38158 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10b0000 }
38160 /* mov.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
38163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38164 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12b0000 }
38166 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
38169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38170 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30b0000 }
38172 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
38175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38176 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32b0000 }
38178 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
38181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38182 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50b0000 }
38184 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
38187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38188 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52b0000 }
38190 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
38193 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38194 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70b0000 }
38196 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
38199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38200 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72b0000 }
38202 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
38205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38206 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38b0000 }
38208 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
38211 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38212 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ab0000 }
38214 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
38217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38218 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58b0000 }
38220 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
38223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38224 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ab0000 }
38226 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
38229 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38230 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cb0000 }
38232 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
38235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38236 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3eb0000 }
38238 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
38241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38242 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cb0000 }
38244 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
38247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38248 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5eb0000 }
38250 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
38253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
38254 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cb0000 }
38256 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
38259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
38260 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7eb0000 }
38262 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
38265 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
38266 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78b0000 }
38268 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
38271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
38272 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ab0000 }
38274 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
38277 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38278 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90b }
38280 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
38283 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38284 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892b }
38286 /* mov.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38289 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38290 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890b }
38292 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
38295 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38296 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18b }
38298 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
38301 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38302 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ab }
38304 /* mov.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38307 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38308 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818b }
38310 /* mov.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
38313 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38314 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10b }
38316 /* mov.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
38319 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38320 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812b }
38322 /* mov.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38325 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38326 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810b }
38328 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38331 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38332 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30b00 }
38334 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38337 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38338 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832b00 }
38340 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
38343 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38344 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830b00 }
38346 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38349 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38350 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50b0000 }
38352 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38355 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38356 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852b0000 }
38358 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
38361 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38362 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850b0000 }
38364 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38367 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38368 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70b0000 }
38370 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38373 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38374 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872b0000 }
38376 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
38379 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38380 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870b0000 }
38382 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
38385 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38386 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38b00 }
38388 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
38391 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38392 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ab00 }
38394 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
38397 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38398 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838b00 }
38400 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
38403 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38404 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58b0000 }
38406 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
38409 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38410 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ab0000 }
38412 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
38415 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38416 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858b0000 }
38418 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
38421 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38422 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cb00 }
38424 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
38427 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38428 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83eb00 }
38430 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
38433 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38434 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cb00 }
38436 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
38439 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38440 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cb0000 }
38442 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
38445 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38446 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85eb0000 }
38448 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
38451 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38452 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cb0000 }
38454 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
38457 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38458 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cb0000 }
38460 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
38463 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38464 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87eb0000 }
38466 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
38469 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
38470 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cb0000 }
38472 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
38475 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38476 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78b0000 }
38478 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
38481 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38482 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ab0000 }
38484 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
38487 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
38488 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878b0000 }
38490 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38493 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38494 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980b00 }
38496 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
38499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38500 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982b00 }
38502 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
38505 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38506 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983b00 }
38508 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38512 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908b00 }
38514 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
38517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38518 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ab00 }
38520 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
38523 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38524 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bb00 }
38526 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38530 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900b00 }
38532 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
38535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38536 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902b00 }
38538 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
38541 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38542 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903b00 }
38544 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38547 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38548 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920b0000 }
38550 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38554 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922b0000 }
38556 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38559 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38560 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923b0000 }
38562 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38565 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38566 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940b0000 }
38568 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38572 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942b0000 }
38574 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38577 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38578 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943b0000 }
38580 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38583 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38584 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960b0000 }
38586 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38590 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962b0000 }
38592 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38595 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38596 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963b0000 }
38598 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
38601 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38602 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928b0000 }
38604 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
38607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38608 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ab0000 }
38610 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
38613 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38614 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bb0000 }
38616 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
38619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38620 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948b0000 }
38622 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
38625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38626 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ab0000 }
38628 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
38631 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38632 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bb0000 }
38634 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
38637 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38638 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cb0000 }
38640 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
38643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38644 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92eb0000 }
38646 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
38649 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38650 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fb0000 }
38652 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
38655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38656 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cb0000 }
38658 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
38661 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38662 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94eb0000 }
38664 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
38667 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38668 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fb0000 }
38670 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
38673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
38674 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cb0000 }
38676 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
38679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38680 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96eb0000 }
38682 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
38685 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38686 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fb0000 }
38688 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
38691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
38692 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968b0000 }
38694 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
38697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38698 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ab0000 }
38700 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
38703 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38704 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bb0000 }
38706 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38710 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80b0000 }
38712 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
38715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38716 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82b0000 }
38718 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
38721 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38722 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83b0000 }
38724 /* mov.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
38727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38728 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83b0000 }
38730 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38734 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08b0000 }
38736 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
38739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38740 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ab0000 }
38742 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
38745 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38746 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bb0000 }
38748 /* mov.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
38751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38752 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bb0000 }
38754 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38758 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00b0000 }
38760 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
38763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38764 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02b0000 }
38766 /* mov.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
38769 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38770 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03b0000 }
38772 /* mov.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
38775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38776 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03b0000 }
38778 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38782 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20b0000 }
38784 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38788 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22b0000 }
38790 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38793 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38794 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23b0000 }
38796 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
38799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38800 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23b0000 }
38802 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38806 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40b0000 }
38808 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38812 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42b0000 }
38814 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38817 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38818 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43b0000 }
38820 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
38823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38824 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43b0000 }
38826 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38830 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60b0000 }
38832 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38836 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62b0000 }
38838 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38841 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38842 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63b0000 }
38844 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
38847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38848 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63b0000 }
38850 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
38853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38854 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28b0000 }
38856 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
38859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38860 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ab0000 }
38862 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38865 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38866 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bb0000 }
38868 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38872 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bb0000 }
38874 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38877 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38878 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48b0000 }
38880 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38884 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ab0000 }
38886 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38889 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38890 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bb0000 }
38892 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38896 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bb0000 }
38898 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38902 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cb0000 }
38904 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38908 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2eb0000 }
38910 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38913 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38914 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fb0000 }
38916 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38920 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fb0000 }
38922 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38926 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cb0000 }
38928 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38932 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4eb0000 }
38934 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38937 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38938 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fb0000 }
38940 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38943 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38944 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fb0000 }
38946 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38950 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cb0000 }
38952 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38956 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6eb0000 }
38958 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38961 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38962 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fb0000 }
38964 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
38967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38968 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fb0000 }
38970 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38973 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38974 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68b0000 }
38976 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38979 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38980 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ab0000 }
38982 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38985 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38986 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bb0000 }
38988 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
38991 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
38992 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bb0000 }
38994 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38997 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38998 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80b0000 }
39000 /* mov.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
39003 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39004 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82b0000 }
39006 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39009 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39010 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08b0000 }
39012 /* mov.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
39015 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39016 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ab0000 }
39018 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39022 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00b0000 }
39024 /* mov.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
39027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39028 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02b0000 }
39030 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
39033 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39034 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20b0000 }
39036 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
39039 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39040 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22b0000 }
39042 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
39045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39046 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40b0000 }
39048 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
39051 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39052 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42b0000 }
39054 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
39057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39058 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60b0000 }
39060 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
39063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39064 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62b0000 }
39066 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
39069 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39070 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28b0000 }
39072 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
39075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39076 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ab0000 }
39078 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
39081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39082 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48b0000 }
39084 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
39087 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39088 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ab0000 }
39090 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
39093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39094 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cb0000 }
39096 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
39099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39100 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2eb0000 }
39102 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
39105 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39106 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cb0000 }
39108 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
39111 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39112 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4eb0000 }
39114 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
39117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
39118 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cb0000 }
39120 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
39123 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
39124 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6eb0000 }
39126 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
39129 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
39130 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68b0000 }
39132 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
39135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
39136 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ab0000 }
39138 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
39141 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39142 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80b }
39144 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
39147 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39148 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882b }
39150 /* mov.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
39153 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39154 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880b }
39156 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
39159 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39160 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08b }
39162 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
39165 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39166 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ab }
39168 /* mov.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39171 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39172 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808b }
39174 /* mov.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
39177 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39178 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00b }
39180 /* mov.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
39183 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39184 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802b }
39186 /* mov.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39189 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39190 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800b }
39192 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39195 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39196 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20b00 }
39198 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39201 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39202 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822b00 }
39204 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
39207 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39208 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820b00 }
39210 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39213 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39214 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40b0000 }
39216 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39219 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39220 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842b0000 }
39222 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
39225 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39226 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840b0000 }
39228 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39231 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39232 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60b0000 }
39234 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39237 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39238 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862b0000 }
39240 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
39243 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39244 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860b0000 }
39246 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
39249 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39250 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28b00 }
39252 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
39255 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39256 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ab00 }
39258 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
39261 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39262 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828b00 }
39264 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
39267 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39268 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48b0000 }
39270 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
39273 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39274 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ab0000 }
39276 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
39279 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39280 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848b0000 }
39282 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
39285 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39286 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cb00 }
39288 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
39291 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39292 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82eb00 }
39294 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
39297 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39298 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cb00 }
39300 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
39303 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39304 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cb0000 }
39306 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
39309 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39310 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84eb0000 }
39312 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
39315 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39316 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cb0000 }
39318 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
39321 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39322 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cb0000 }
39324 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
39327 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39328 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86eb0000 }
39330 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
39333 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
39334 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cb0000 }
39336 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
39339 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39340 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68b0000 }
39342 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
39345 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39346 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ab0000 }
39348 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
39351 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
39352 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868b0000 }
39354 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
39357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39358 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x738000 }
39360 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
39363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39364 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73a000 }
39366 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
39369 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39370 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x73b000 }
39372 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
39375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39376 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x738400 }
39378 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
39381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39382 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x73a400 }
39384 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
39387 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39388 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x73b400 }
39390 /* mov.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39394 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x738600 }
39396 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39400 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x73a600 }
39402 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39405 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39406 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x73b600 }
39408 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39412 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x73880000 }
39414 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39418 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73a80000 }
39420 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39423 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39424 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73b80000 }
39426 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39430 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x738c0000 }
39432 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39436 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73ac0000 }
39438 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39441 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39442 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73bc0000 }
39444 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39448 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x738a0000 }
39450 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39454 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73aa0000 }
39456 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39459 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39460 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73ba0000 }
39462 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39466 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x738e0000 }
39468 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39472 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73ae0000 }
39474 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39477 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39478 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73be0000 }
39480 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39484 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x738b0000 }
39486 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39489 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39490 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73ab0000 }
39492 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39495 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39496 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73bb0000 }
39498 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39501 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39502 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x738f0000 }
39504 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
39507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39508 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x73af0000 }
39510 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
39513 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39514 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x73bf0000 }
39516 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
39519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39520 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x73c00000 }
39522 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
39525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39526 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73e00000 }
39528 /* mov.w${G} ${Dsp-16-u16},$Dst16RnHI */
39531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
39532 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x73f00000 }
39534 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
39537 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39538 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x73c40000 }
39540 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
39543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39544 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x73e40000 }
39546 /* mov.w${G} ${Dsp-16-u16},$Dst16AnHI */
39549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
39550 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x73f40000 }
39552 /* mov.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
39555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39556 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x73c60000 }
39558 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
39561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39562 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x73e60000 }
39564 /* mov.w${G} ${Dsp-16-u16},[$Dst16An] */
39567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
39568 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x73f60000 }
39570 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
39573 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39574 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x73c80000 }
39576 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
39579 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39580 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x73e80000 }
39582 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
39585 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39586 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x73f80000 }
39588 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
39591 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39592 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x73cc0000 }
39594 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
39597 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39598 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x73ec0000 }
39600 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
39603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39604 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x73fc0000 }
39606 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
39609 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39610 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ca0000 }
39612 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
39615 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39616 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ea0000 }
39618 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
39621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39622 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x73fa0000 }
39624 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
39627 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39628 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ce0000 }
39630 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
39633 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39634 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ee0000 }
39636 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
39639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39640 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x73fe0000 }
39642 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
39645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39646 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73cb0000 }
39648 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
39651 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39652 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73eb0000 }
39654 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
39657 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39658 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x73fb0000 }
39660 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
39663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
39664 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x73cf0000 }
39666 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
39669 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
39670 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x73ef0000 }
39672 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
39675 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
39676 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x73ff0000 }
39678 /* mov.w${G} $Src16RnHI,$Dst16RnHI */
39681 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
39682 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7300 }
39684 /* mov.w${G} $Src16AnHI,$Dst16RnHI */
39687 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
39688 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7340 }
39690 /* mov.w${G} [$Src16An],$Dst16RnHI */
39693 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39694 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7360 }
39696 /* mov.w${G} $Src16RnHI,$Dst16AnHI */
39699 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
39700 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7304 }
39702 /* mov.w${G} $Src16AnHI,$Dst16AnHI */
39705 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
39706 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7344 }
39708 /* mov.w${G} [$Src16An],$Dst16AnHI */
39711 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39712 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7364 }
39714 /* mov.w${G} $Src16RnHI,[$Dst16An] */
39717 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39718 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7306 }
39720 /* mov.w${G} $Src16AnHI,[$Dst16An] */
39723 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39724 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7346 }
39726 /* mov.w${G} [$Src16An],[$Dst16An] */
39729 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39730 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7366 }
39732 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
39735 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39736 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x730800 }
39738 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
39741 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39742 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x734800 }
39744 /* mov.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
39747 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39748 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x736800 }
39750 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
39753 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39754 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x730c0000 }
39756 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
39759 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39760 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x734c0000 }
39762 /* mov.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
39765 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39766 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x736c0000 }
39768 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
39771 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39772 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x730a00 }
39774 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
39777 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39778 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x734a00 }
39780 /* mov.w${G} [$Src16An],${Dsp-16-u8}[sb] */
39783 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39784 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x736a00 }
39786 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
39789 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39790 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x730e0000 }
39792 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
39795 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39796 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x734e0000 }
39798 /* mov.w${G} [$Src16An],${Dsp-16-u16}[sb] */
39801 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39802 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x736e0000 }
39804 /* mov.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
39807 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39808 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x730b00 }
39810 /* mov.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
39813 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39814 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x734b00 }
39816 /* mov.w${G} [$Src16An],${Dsp-16-s8}[fb] */
39819 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39820 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x736b00 }
39822 /* mov.w${G} $Src16RnHI,${Dsp-16-u16} */
39825 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
39826 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x730f0000 }
39828 /* mov.w${G} $Src16AnHI,${Dsp-16-u16} */
39831 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
39832 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x734f0000 }
39834 /* mov.w${G} [$Src16An],${Dsp-16-u16} */
39837 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
39838 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x736f0000 }
39840 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
39843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
39844 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x728000 }
39846 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
39849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39850 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72a000 }
39852 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
39855 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39856 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x72b000 }
39858 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
39861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
39862 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x728400 }
39864 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
39867 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39868 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x72a400 }
39870 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
39873 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39874 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x72b400 }
39876 /* mov.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39880 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x728600 }
39882 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39886 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x72a600 }
39888 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39891 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39892 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x72b600 }
39894 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39898 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x72880000 }
39900 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39903 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39904 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72a80000 }
39906 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39909 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39910 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72b80000 }
39912 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39916 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x728c0000 }
39918 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39921 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39922 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72ac0000 }
39924 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39927 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39928 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72bc0000 }
39930 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39934 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x728a0000 }
39936 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39939 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39940 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72aa0000 }
39942 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39945 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39946 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72ba0000 }
39948 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39952 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x728e0000 }
39954 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39958 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72ae0000 }
39960 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39963 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39964 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72be0000 }
39966 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39970 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x728b0000 }
39972 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39975 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39976 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72ab0000 }
39978 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39981 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39982 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72bb0000 }
39984 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39988 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x728f0000 }
39990 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
39993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39994 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x72af0000 }
39996 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
39999 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
40000 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x72bf0000 }
40002 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
40005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40006 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x72c00000 }
40008 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
40011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
40012 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72e00000 }
40014 /* mov.b${G} ${Dsp-16-u16},$Dst16RnQI */
40017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
40018 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x72f00000 }
40020 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
40023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40024 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x72c40000 }
40026 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
40029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
40030 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x72e40000 }
40032 /* mov.b${G} ${Dsp-16-u16},$Dst16AnQI */
40035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
40036 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x72f40000 }
40038 /* mov.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
40041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40042 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x72c60000 }
40044 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
40047 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
40048 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x72e60000 }
40050 /* mov.b${G} ${Dsp-16-u16},[$Dst16An] */
40053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
40054 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x72f60000 }
40056 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
40059 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40060 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x72c80000 }
40062 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
40065 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40066 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x72e80000 }
40068 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
40071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40072 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x72f80000 }
40074 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
40077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40078 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x72cc0000 }
40080 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
40083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40084 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x72ec0000 }
40086 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
40089 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40090 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x72fc0000 }
40092 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
40095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40096 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ca0000 }
40098 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
40101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40102 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ea0000 }
40104 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
40107 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40108 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x72fa0000 }
40110 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
40113 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40114 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ce0000 }
40116 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
40119 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40120 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ee0000 }
40122 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
40125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40126 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x72fe0000 }
40128 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
40131 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40132 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72cb0000 }
40134 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
40137 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40138 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72eb0000 }
40140 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
40143 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40144 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x72fb0000 }
40146 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
40149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
40150 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x72cf0000 }
40152 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
40155 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
40156 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x72ef0000 }
40158 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
40161 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
40162 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x72ff0000 }
40164 /* mov.b${G} $Src16RnQI,$Dst16RnQI */
40167 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
40168 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7200 }
40170 /* mov.b${G} $Src16AnQI,$Dst16RnQI */
40173 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
40174 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7240 }
40176 /* mov.b${G} [$Src16An],$Dst16RnQI */
40179 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40180 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7260 }
40182 /* mov.b${G} $Src16RnQI,$Dst16AnQI */
40185 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
40186 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7204 }
40188 /* mov.b${G} $Src16AnQI,$Dst16AnQI */
40191 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
40192 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7244 }
40194 /* mov.b${G} [$Src16An],$Dst16AnQI */
40197 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40198 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7264 }
40200 /* mov.b${G} $Src16RnQI,[$Dst16An] */
40203 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40204 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7206 }
40206 /* mov.b${G} $Src16AnQI,[$Dst16An] */
40209 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40210 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7246 }
40212 /* mov.b${G} [$Src16An],[$Dst16An] */
40215 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40216 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7266 }
40218 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
40221 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40222 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x720800 }
40224 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
40227 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40228 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x724800 }
40230 /* mov.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
40233 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40234 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x726800 }
40236 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
40239 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40240 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x720c0000 }
40242 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
40245 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40246 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x724c0000 }
40248 /* mov.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
40251 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40252 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x726c0000 }
40254 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
40257 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40258 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x720a00 }
40260 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
40263 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40264 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x724a00 }
40266 /* mov.b${G} [$Src16An],${Dsp-16-u8}[sb] */
40269 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40270 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x726a00 }
40272 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
40275 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40276 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x720e0000 }
40278 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
40281 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40282 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x724e0000 }
40284 /* mov.b${G} [$Src16An],${Dsp-16-u16}[sb] */
40287 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40288 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x726e0000 }
40290 /* mov.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
40293 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40294 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x720b00 }
40296 /* mov.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
40299 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40300 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x724b00 }
40302 /* mov.b${G} [$Src16An],${Dsp-16-s8}[fb] */
40305 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40306 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x726b00 }
40308 /* mov.b${G} $Src16RnQI,${Dsp-16-u16} */
40311 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
40312 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x720f0000 }
40314 /* mov.b${G} $Src16AnQI,${Dsp-16-u16} */
40317 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
40318 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x724f0000 }
40320 /* mov.b${G} [$Src16An],${Dsp-16-u16} */
40323 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
40324 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x726f0000 }
40326 /* mov.w${Z} #0,${Dsp-8-u8}[sb] */
40329 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40330 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2300 }
40332 /* mov.w${Z} #0,${Dsp-8-s8}[fb] */
40335 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40336 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3300 }
40338 /* mov.w${Z} #0,${Dsp-8-u16} */
40341 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40342 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x130000 }
40344 /* mov.w${Z} #0,r0 */
40347 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 0 } },
40348 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x3 }
40350 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40353 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40354 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2200 }
40356 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40359 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40360 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3200 }
40362 /* mov.b${Z} #0,${Dsp-8-u16} */
40365 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40366 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x120000 }
40368 /* mov.b${Z} #0,r0l */
40371 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40372 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x2 }
40374 /* mov.b${Z} #0,r0l */
40377 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40378 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xb4 }
40380 /* mov.b${Z} #0,r0h */
40383 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'h', 0 } },
40384 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xb3 }
40386 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40389 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40390 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xb500 }
40392 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40395 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40396 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xb600 }
40398 /* mov.b${Z} #0,${Dsp-8-u16} */
40401 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40402 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xb70000 }
40404 /* mov.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
40407 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40408 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf920 }
40410 /* mov.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
40413 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40414 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf1a0 }
40416 /* mov.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40419 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40420 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf120 }
40422 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40425 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40426 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf32000 }
40428 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40431 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40432 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5200000 }
40434 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40437 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40438 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7200000 }
40440 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40443 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40444 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3a000 }
40446 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40449 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40450 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5a00000 }
40452 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40455 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40456 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3e000 }
40458 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40461 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40462 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5e00000 }
40464 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
40467 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40468 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7e00000 }
40470 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
40473 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40474 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7a00000 }
40476 /* mov.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
40479 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40480 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf820 }
40482 /* mov.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
40485 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40486 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf0a0 }
40488 /* mov.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40491 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40492 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf020 }
40494 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40497 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40498 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf22000 }
40500 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40503 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40504 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4200000 }
40506 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40509 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40510 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6200000 }
40512 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40515 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40516 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2a000 }
40518 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40521 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40522 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4a00000 }
40524 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40527 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40528 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2e000 }
40530 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40533 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40534 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4e00000 }
40536 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
40539 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40540 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6e00000 }
40542 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
40545 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40546 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6a00000 }
40548 /* mov.w${Q} #${Imm-8-s4},$Dst16RnHI */
40551 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
40552 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd900 }
40554 /* mov.w${Q} #${Imm-8-s4},$Dst16AnHI */
40557 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
40558 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd904 }
40560 /* mov.w${Q} #${Imm-8-s4},[$Dst16An] */
40563 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40564 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd906 }
40566 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40569 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40570 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd90800 }
40572 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40575 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40576 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd90c0000 }
40578 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40581 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40582 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd90a00 }
40584 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40587 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40588 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd90e0000 }
40590 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40593 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40594 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd90b00 }
40596 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
40599 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40600 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd90f0000 }
40602 /* mov.b${Q} #${Imm-8-s4},$Dst16RnQI */
40605 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
40606 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd800 }
40608 /* mov.b${Q} #${Imm-8-s4},$Dst16AnQI */
40611 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
40612 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd804 }
40614 /* mov.b${Q} #${Imm-8-s4},[$Dst16An] */
40617 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40618 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd806 }
40620 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40623 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40624 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd80800 }
40626 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40629 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40630 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd80c0000 }
40632 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40635 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40636 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd80a00 }
40638 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40641 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40642 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd80e0000 }
40644 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40647 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40648 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd80b00 }
40650 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
40653 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40654 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd80f0000 }
40656 /* mov.b${S} #${Imm-8-QI},r0l */
40659 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40660 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xc400 }
40662 /* mov.b${S} #${Imm-8-QI},r0h */
40665 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
40666 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xc300 }
40668 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
40671 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40672 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xc50000 }
40674 /* mov.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
40677 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40678 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xc60000 }
40680 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u16} */
40683 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
40684 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xc7000000 }
40686 /* mov.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
40689 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40690 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x25000000 }
40692 /* mov.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
40695 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40696 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x35000000 }
40698 /* mov.w${S} #${Imm-24-HI},${Dsp-8-u16} */
40701 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
40702 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x15000000 }
40704 /* mov.w${S} #${Imm-8-HI},r0 */
40707 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
40708 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x50000 }
40710 /* mov.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
40713 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40714 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x240000 }
40716 /* mov.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
40719 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40720 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x340000 }
40722 /* mov.b${S} #${Imm-24-QI},${Dsp-8-u16} */
40725 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
40726 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x14000000 }
40728 /* mov.b${S} #${Imm-8-QI},r0l */
40731 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40732 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x400 }
40734 /* mov.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
40737 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
40738 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb8310000 }
40740 /* mov.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
40743 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
40744 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb0b10000 }
40746 /* mov.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
40749 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40750 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb0310000 }
40752 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40755 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40756 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2310000 }
40758 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
40761 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40762 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2b10000 }
40764 /* mov.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
40767 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40768 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2f10000 }
40770 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40773 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40774 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4310000 }
40776 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
40779 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40780 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4b10000 }
40782 /* mov.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
40785 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40786 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4f10000 }
40788 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16} */
40791 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
40792 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6f10000 }
40794 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40797 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40798 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6310000 }
40800 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24} */
40803 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
40804 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6b10000 }
40806 /* mov.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
40809 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40810 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992f0000 }
40812 /* mov.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
40815 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40816 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91af0000 }
40818 /* mov.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
40821 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40822 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912f0000 }
40824 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40827 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40828 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932f0000 }
40830 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40833 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40834 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93af0000 }
40836 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40839 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40840 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ef0000 }
40842 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40845 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40846 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952f0000 }
40848 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
40851 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40852 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95af0000 }
40854 /* mov.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
40857 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40858 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ef0000 }
40860 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
40863 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
40864 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ef0000 }
40866 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40869 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40870 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972f0000 }
40872 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24} */
40875 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
40876 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97af0000 }
40878 /* mov.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
40881 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40882 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982f00 }
40884 /* mov.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
40887 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40888 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90af00 }
40890 /* mov.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
40893 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40894 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902f00 }
40896 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40899 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40900 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922f0000 }
40902 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
40905 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40906 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92af0000 }
40908 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
40911 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40912 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ef0000 }
40914 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40917 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40918 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942f0000 }
40920 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
40923 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40924 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94af0000 }
40926 /* mov.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
40929 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40930 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ef0000 }
40932 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
40935 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
40936 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ef0000 }
40938 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40941 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40942 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962f0000 }
40944 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24} */
40947 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
40948 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96af0000 }
40950 /* mov.w${G} #${Imm-16-HI},$Dst16RnHI */
40953 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
40954 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x75c00000 }
40956 /* mov.w${G} #${Imm-16-HI},$Dst16AnHI */
40959 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
40960 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x75c40000 }
40962 /* mov.w${G} #${Imm-16-HI},[$Dst16An] */
40965 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
40966 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x75c60000 }
40968 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
40971 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40972 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x75c80000 }
40974 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40977 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40978 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x75ca0000 }
40980 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40983 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40984 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x75cb0000 }
40986 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
40989 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40990 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x75cc0000 }
40992 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
40995 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40996 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x75ce0000 }
40998 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
41001 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
41002 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x75cf0000 }
41004 /* mov.b${G} #${Imm-16-QI},$Dst16RnQI */
41007 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
41008 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x74c000 }
41010 /* mov.b${G} #${Imm-16-QI},$Dst16AnQI */
41013 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
41014 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x74c400 }
41016 /* mov.b${G} #${Imm-16-QI},[$Dst16An] */
41019 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
41020 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x74c600 }
41022 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
41025 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
41026 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x74c80000 }
41028 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
41031 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
41032 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x74ca0000 }
41034 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
41037 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
41038 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x74cb0000 }
41040 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
41043 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
41044 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x74cc0000 }
41046 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
41049 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
41050 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x74ce0000 }
41052 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
41055 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
41056 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x74cf0000 }
41058 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41061 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41062 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990c00 }
41064 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
41067 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41068 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992c00 }
41070 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
41073 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41074 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993c00 }
41076 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41079 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41080 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918c00 }
41082 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
41085 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41086 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ac00 }
41088 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
41091 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41092 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bc00 }
41094 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41097 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41098 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910c00 }
41100 /* min.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41103 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41104 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912c00 }
41106 /* min.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41109 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41110 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913c00 }
41112 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41115 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41116 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930c00 }
41118 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41121 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41122 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932c00 }
41124 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41127 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41128 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933c00 }
41130 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
41133 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41134 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950c00 }
41136 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41139 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41140 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952c00 }
41142 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41145 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41146 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953c00 }
41148 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
41151 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41152 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970c00 }
41154 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41157 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41158 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972c00 }
41160 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41163 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41164 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973c00 }
41166 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
41169 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41170 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938c00 }
41172 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
41175 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41176 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ac00 }
41178 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
41181 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41182 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bc00 }
41184 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
41187 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41188 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958c00 }
41190 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
41193 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41194 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ac00 }
41196 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
41199 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41200 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bc00 }
41202 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
41205 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41206 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cc00 }
41208 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
41211 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41212 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ec00 }
41214 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
41217 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41218 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fc00 }
41220 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
41223 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41224 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cc00 }
41226 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
41229 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41230 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ec00 }
41232 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
41235 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41236 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fc00 }
41238 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
41241 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
41242 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cc00 }
41244 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
41247 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41248 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ec00 }
41250 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
41253 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41254 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fc00 }
41256 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
41259 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
41260 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978c00 }
41262 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
41265 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41266 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ac00 }
41268 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
41271 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41272 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bc00 }
41274 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41277 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41278 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90c00 }
41280 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
41283 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41284 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92c00 }
41286 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
41289 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41290 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93c00 }
41292 /* min.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
41295 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41296 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93c00 }
41298 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41301 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41302 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18c00 }
41304 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
41307 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41308 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ac00 }
41310 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
41313 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41314 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bc00 }
41316 /* min.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
41319 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41320 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bc00 }
41322 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41325 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41326 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10c00 }
41328 /* min.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
41331 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41332 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12c00 }
41334 /* min.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
41337 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41338 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13c00 }
41340 /* min.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
41343 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41344 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13c00 }
41346 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
41349 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41350 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30c00 }
41352 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41355 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41356 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32c00 }
41358 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41361 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41362 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33c00 }
41364 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
41367 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41368 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33c00 }
41370 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
41373 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41374 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50c00 }
41376 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41379 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41380 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52c00 }
41382 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41385 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41386 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53c00 }
41388 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
41391 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41392 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53c00 }
41394 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
41397 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41398 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70c00 }
41400 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41403 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41404 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72c00 }
41406 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41409 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41410 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73c00 }
41412 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
41415 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41416 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73c00 }
41418 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
41421 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41422 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38c00 }
41424 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
41427 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41428 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ac00 }
41430 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
41433 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41434 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bc00 }
41436 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
41439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41440 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bc00 }
41442 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
41445 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41446 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58c00 }
41448 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
41451 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41452 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ac00 }
41454 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
41457 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41458 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bc00 }
41460 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
41463 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41464 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bc00 }
41466 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
41469 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41470 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cc00 }
41472 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
41475 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41476 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ec00 }
41478 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
41481 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41482 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fc00 }
41484 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
41487 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41488 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fc00 }
41490 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
41493 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41494 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cc00 }
41496 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
41499 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41500 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ec00 }
41502 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
41505 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41506 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fc00 }
41508 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
41511 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41512 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fc00 }
41514 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
41517 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
41518 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cc00 }
41520 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
41523 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41524 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ec00 }
41526 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
41529 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41530 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fc00 }
41532 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
41535 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
41536 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fc00 }
41538 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
41541 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
41542 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78c00 }
41544 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
41547 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41548 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ac00 }
41550 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
41553 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41554 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bc00 }
41556 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
41559 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
41560 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bc00 }
41562 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41565 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41566 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90c00 }
41568 /* min.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
41571 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41572 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92c00 }
41574 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41577 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41578 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18c00 }
41580 /* min.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
41583 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41584 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ac00 }
41586 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41589 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41590 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10c00 }
41592 /* min.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
41595 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41596 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12c00 }
41598 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
41601 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41602 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30c00 }
41604 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
41607 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41608 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32c00 }
41610 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
41613 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41614 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50c00 }
41616 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
41619 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41620 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52c00 }
41622 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
41625 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41626 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70c00 }
41628 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
41631 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41632 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72c00 }
41634 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
41637 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41638 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38c00 }
41640 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
41643 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41644 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ac00 }
41646 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
41649 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41650 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58c00 }
41652 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
41655 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41656 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ac00 }
41658 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
41661 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41662 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cc00 }
41664 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
41667 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41668 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ec00 }
41670 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
41673 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41674 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cc00 }
41676 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
41679 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41680 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ec00 }
41682 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
41685 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
41686 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cc00 }
41688 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
41691 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
41692 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ec00 }
41694 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
41697 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
41698 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78c00 }
41700 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
41703 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
41704 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ac00 }
41706 /* min.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
41709 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41710 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90c }
41712 /* min.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
41715 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41716 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892c }
41718 /* min.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
41721 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41722 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890c }
41724 /* min.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
41727 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41728 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18c }
41730 /* min.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
41733 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41734 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ac }
41736 /* min.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
41739 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41740 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818c }
41742 /* min.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
41745 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41746 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10c }
41748 /* min.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
41751 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41752 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812c }
41754 /* min.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
41757 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41758 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810c }
41760 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41763 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41764 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30c00 }
41766 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41769 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41770 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832c00 }
41772 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
41775 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41776 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830c00 }
41778 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41781 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41782 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50c00 }
41784 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41787 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41788 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852c00 }
41790 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
41793 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41794 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850c00 }
41796 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41799 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41800 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70c00 }
41802 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41805 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41806 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872c00 }
41808 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
41811 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41812 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870c00 }
41814 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
41817 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41818 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38c00 }
41820 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
41823 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41824 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ac00 }
41826 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
41829 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41830 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838c00 }
41832 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
41835 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41836 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58c00 }
41838 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
41841 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41842 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ac00 }
41844 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
41847 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41848 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858c00 }
41850 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
41853 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41854 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cc00 }
41856 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
41859 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41860 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ec00 }
41862 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
41865 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41866 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cc00 }
41868 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
41871 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41872 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cc00 }
41874 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
41877 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41878 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ec00 }
41880 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
41883 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41884 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cc00 }
41886 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
41889 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41890 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cc00 }
41892 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
41895 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41896 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ec00 }
41898 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
41901 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
41902 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cc00 }
41904 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
41907 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41908 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78c00 }
41910 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
41913 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41914 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ac00 }
41916 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
41919 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
41920 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878c00 }
41922 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
41925 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41926 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980c00 }
41928 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
41931 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41932 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982c00 }
41934 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
41937 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41938 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983c00 }
41940 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
41943 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41944 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908c00 }
41946 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
41949 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41950 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ac00 }
41952 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
41955 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41956 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bc00 }
41958 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41961 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41962 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900c00 }
41964 /* min.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41967 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41968 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902c00 }
41970 /* min.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41973 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41974 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903c00 }
41976 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41979 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41980 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920c00 }
41982 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41985 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41986 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922c00 }
41988 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41991 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41992 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923c00 }
41994 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
41997 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41998 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940c00 }
42000 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42003 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42004 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942c00 }
42006 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42009 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42010 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943c00 }
42012 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
42015 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42016 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960c00 }
42018 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42021 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42022 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962c00 }
42024 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42027 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42028 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963c00 }
42030 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
42033 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42034 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928c00 }
42036 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
42039 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42040 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ac00 }
42042 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
42045 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42046 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bc00 }
42048 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
42051 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42052 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948c00 }
42054 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
42057 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42058 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ac00 }
42060 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
42063 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42064 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bc00 }
42066 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
42069 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42070 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cc00 }
42072 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
42075 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42076 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ec00 }
42078 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
42081 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42082 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fc00 }
42084 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
42087 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42088 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cc00 }
42090 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
42093 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42094 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ec00 }
42096 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
42099 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42100 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fc00 }
42102 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
42105 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
42106 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cc00 }
42108 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
42111 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42112 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ec00 }
42114 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
42117 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42118 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fc00 }
42120 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
42123 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
42124 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968c00 }
42126 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
42129 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42130 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ac00 }
42132 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
42135 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42136 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bc00 }
42138 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42141 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42142 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80c00 }
42144 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
42147 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42148 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82c00 }
42150 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
42153 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42154 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83c00 }
42156 /* min.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
42159 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42160 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83c00 }
42162 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42165 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42166 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08c00 }
42168 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
42171 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42172 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ac00 }
42174 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
42177 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42178 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bc00 }
42180 /* min.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
42183 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42184 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bc00 }
42186 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42189 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42190 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00c00 }
42192 /* min.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
42195 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42196 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02c00 }
42198 /* min.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
42201 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42202 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03c00 }
42204 /* min.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
42207 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42208 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03c00 }
42210 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
42213 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42214 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20c00 }
42216 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42219 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42220 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22c00 }
42222 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42225 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42226 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23c00 }
42228 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
42231 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42232 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23c00 }
42234 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
42237 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42238 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40c00 }
42240 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42243 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42244 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42c00 }
42246 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42249 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42250 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43c00 }
42252 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
42255 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42256 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43c00 }
42258 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
42261 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42262 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60c00 }
42264 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42267 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42268 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62c00 }
42270 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42273 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42274 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63c00 }
42276 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
42279 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42280 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63c00 }
42282 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
42285 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42286 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28c00 }
42288 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
42291 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42292 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ac00 }
42294 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
42297 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42298 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bc00 }
42300 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
42303 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42304 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bc00 }
42306 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
42309 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42310 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48c00 }
42312 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
42315 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42316 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ac00 }
42318 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
42321 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42322 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bc00 }
42324 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
42327 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42328 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bc00 }
42330 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
42333 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42334 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cc00 }
42336 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
42339 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42340 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ec00 }
42342 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
42345 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42346 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fc00 }
42348 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
42351 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42352 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fc00 }
42354 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
42357 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42358 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cc00 }
42360 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
42363 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42364 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ec00 }
42366 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
42369 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42370 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fc00 }
42372 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
42375 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42376 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fc00 }
42378 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
42381 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
42382 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cc00 }
42384 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
42387 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42388 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ec00 }
42390 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
42393 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42394 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fc00 }
42396 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
42399 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
42400 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fc00 }
42402 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
42405 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
42406 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68c00 }
42408 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
42411 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42412 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ac00 }
42414 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
42417 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42418 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bc00 }
42420 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
42423 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
42424 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bc00 }
42426 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42429 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42430 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80c00 }
42432 /* min.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
42435 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42436 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82c00 }
42438 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42441 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42442 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08c00 }
42444 /* min.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
42447 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42448 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ac00 }
42450 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42453 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42454 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00c00 }
42456 /* min.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
42459 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42460 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02c00 }
42462 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
42465 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42466 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20c00 }
42468 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
42471 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42472 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22c00 }
42474 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
42477 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42478 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40c00 }
42480 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
42483 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42484 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42c00 }
42486 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
42489 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42490 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60c00 }
42492 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
42495 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42496 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62c00 }
42498 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
42501 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42502 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28c00 }
42504 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
42507 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42508 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ac00 }
42510 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
42513 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42514 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48c00 }
42516 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
42519 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42520 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ac00 }
42522 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
42525 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42526 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cc00 }
42528 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
42531 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42532 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ec00 }
42534 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
42537 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42538 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cc00 }
42540 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
42543 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42544 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ec00 }
42546 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
42549 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
42550 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cc00 }
42552 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
42555 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
42556 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ec00 }
42558 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
42561 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
42562 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68c00 }
42564 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
42567 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
42568 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ac00 }
42570 /* min.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
42573 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42574 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80c }
42576 /* min.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
42579 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42580 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882c }
42582 /* min.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
42585 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42586 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880c }
42588 /* min.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
42591 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42592 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08c }
42594 /* min.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
42597 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42598 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ac }
42600 /* min.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
42603 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42604 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808c }
42606 /* min.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
42609 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42610 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00c }
42612 /* min.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
42615 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42616 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802c }
42618 /* min.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
42621 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42622 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800c }
42624 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42627 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42628 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20c00 }
42630 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42633 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42634 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822c00 }
42636 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
42639 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42640 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820c00 }
42642 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42645 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42646 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40c00 }
42648 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42651 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42652 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842c00 }
42654 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
42657 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42658 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840c00 }
42660 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42663 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42664 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60c00 }
42666 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42669 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42670 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862c00 }
42672 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
42675 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42676 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860c00 }
42678 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
42681 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42682 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28c00 }
42684 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
42687 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42688 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ac00 }
42690 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
42693 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42694 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828c00 }
42696 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
42699 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42700 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48c00 }
42702 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
42705 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42706 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ac00 }
42708 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
42711 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42712 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848c00 }
42714 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
42717 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42718 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cc00 }
42720 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
42723 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42724 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ec00 }
42726 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
42729 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42730 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cc00 }
42732 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
42735 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42736 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cc00 }
42738 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
42741 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42742 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ec00 }
42744 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
42747 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42748 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cc00 }
42750 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
42753 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42754 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cc00 }
42756 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
42759 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42760 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ec00 }
42762 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
42765 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
42766 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cc00 }
42768 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
42771 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42772 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68c00 }
42774 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
42777 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42778 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ac00 }
42780 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
42783 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
42784 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868c00 }
42786 /* min.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
42789 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
42790 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892f00 }
42792 /* min.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
42795 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
42796 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181af00 }
42798 /* min.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
42801 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42802 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812f00 }
42804 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42807 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42808 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832f00 }
42810 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
42813 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42814 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183af00 }
42816 /* min.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
42819 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42820 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ef00 }
42822 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42825 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42826 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852f00 }
42828 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
42831 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42832 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185af00 }
42834 /* min.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
42837 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42838 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ef00 }
42840 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16} */
42843 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
42844 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ef00 }
42846 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42849 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42850 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872f00 }
42852 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24} */
42855 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
42856 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187af00 }
42858 /* min.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
42861 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42862 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882f00 }
42864 /* min.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
42867 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42868 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180af00 }
42870 /* min.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
42873 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42874 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802f00 }
42876 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42879 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42880 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822f00 }
42882 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
42885 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42886 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182af00 }
42888 /* min.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
42891 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42892 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ef00 }
42894 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42897 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42898 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842f00 }
42900 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
42903 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42904 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184af00 }
42906 /* min.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
42909 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42910 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ef00 }
42912 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16} */
42915 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
42916 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ef00 }
42918 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42921 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42922 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862f00 }
42924 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24} */
42927 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
42928 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186af00 }
42930 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
42933 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42934 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990d00 }
42936 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
42939 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42940 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992d00 }
42942 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
42945 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42946 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993d00 }
42948 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
42951 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42952 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918d00 }
42954 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
42957 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42958 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ad00 }
42960 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
42963 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42964 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bd00 }
42966 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42969 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42970 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910d00 }
42972 /* max.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
42975 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42976 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912d00 }
42978 /* max.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
42981 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42982 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913d00 }
42984 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
42987 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42988 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930d00 }
42990 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
42993 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42994 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932d00 }
42996 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
42999 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43000 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933d00 }
43002 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43005 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43006 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950d00 }
43008 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43011 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43012 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952d00 }
43014 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43017 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43018 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953d00 }
43020 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43023 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43024 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970d00 }
43026 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43029 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43030 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972d00 }
43032 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43035 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43036 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973d00 }
43038 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43041 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43042 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938d00 }
43044 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43047 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43048 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ad00 }
43050 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43053 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43054 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bd00 }
43056 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43059 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43060 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958d00 }
43062 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43065 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43066 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ad00 }
43068 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43071 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43072 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bd00 }
43074 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43077 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43078 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cd00 }
43080 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43083 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43084 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ed00 }
43086 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43089 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43090 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fd00 }
43092 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43095 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43096 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cd00 }
43098 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43101 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43102 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ed00 }
43104 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43107 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43108 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fd00 }
43110 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43113 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43114 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cd00 }
43116 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43119 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43120 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ed00 }
43122 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
43125 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43126 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fd00 }
43128 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
43131 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
43132 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978d00 }
43134 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
43137 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43138 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ad00 }
43140 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
43143 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43144 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bd00 }
43146 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43149 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43150 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90d00 }
43152 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
43155 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43156 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92d00 }
43158 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
43161 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43162 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93d00 }
43164 /* max.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
43167 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43168 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93d00 }
43170 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43173 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43174 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18d00 }
43176 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
43179 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43180 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ad00 }
43182 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
43185 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43186 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bd00 }
43188 /* max.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
43191 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43192 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bd00 }
43194 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43197 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43198 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10d00 }
43200 /* max.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
43203 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43204 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12d00 }
43206 /* max.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
43209 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43210 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13d00 }
43212 /* max.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
43215 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43216 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13d00 }
43218 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
43221 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43222 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30d00 }
43224 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43227 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43228 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32d00 }
43230 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43233 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43234 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33d00 }
43236 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
43239 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43240 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33d00 }
43242 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
43245 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43246 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50d00 }
43248 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43251 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43252 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52d00 }
43254 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43257 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43258 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53d00 }
43260 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
43263 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43264 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53d00 }
43266 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
43269 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43270 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70d00 }
43272 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43275 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43276 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72d00 }
43278 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43281 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43282 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73d00 }
43284 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
43287 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43288 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73d00 }
43290 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
43293 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43294 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38d00 }
43296 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
43299 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43300 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ad00 }
43302 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
43305 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43306 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bd00 }
43308 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
43311 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43312 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bd00 }
43314 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
43317 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43318 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58d00 }
43320 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
43323 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43324 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ad00 }
43326 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
43329 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43330 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bd00 }
43332 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
43335 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43336 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bd00 }
43338 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
43341 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43342 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cd00 }
43344 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
43347 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43348 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ed00 }
43350 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
43353 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43354 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fd00 }
43356 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
43359 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43360 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fd00 }
43362 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
43365 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43366 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cd00 }
43368 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
43371 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43372 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ed00 }
43374 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
43377 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43378 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fd00 }
43380 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
43383 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43384 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fd00 }
43386 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
43389 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
43390 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cd00 }
43392 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
43395 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43396 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ed00 }
43398 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
43401 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43402 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fd00 }
43404 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
43407 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
43408 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fd00 }
43410 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
43413 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
43414 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78d00 }
43416 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
43419 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43420 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ad00 }
43422 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
43425 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43426 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bd00 }
43428 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
43431 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
43432 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bd00 }
43434 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43437 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43438 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90d00 }
43440 /* max.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
43443 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43444 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92d00 }
43446 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43449 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43450 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18d00 }
43452 /* max.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
43455 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43456 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ad00 }
43458 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43461 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43462 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10d00 }
43464 /* max.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
43467 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43468 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12d00 }
43470 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
43473 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43474 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30d00 }
43476 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
43479 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43480 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32d00 }
43482 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
43485 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43486 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50d00 }
43488 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
43491 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43492 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52d00 }
43494 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
43497 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43498 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70d00 }
43500 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
43503 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43504 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72d00 }
43506 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
43509 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43510 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38d00 }
43512 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
43515 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43516 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ad00 }
43518 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
43521 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43522 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58d00 }
43524 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
43527 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43528 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ad00 }
43530 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
43533 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43534 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cd00 }
43536 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
43539 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43540 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ed00 }
43542 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
43545 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43546 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cd00 }
43548 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
43551 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43552 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ed00 }
43554 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
43557 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
43558 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cd00 }
43560 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
43563 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
43564 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ed00 }
43566 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
43569 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
43570 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78d00 }
43572 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
43575 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
43576 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ad00 }
43578 /* max.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
43581 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43582 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90d }
43584 /* max.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
43587 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43588 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892d }
43590 /* max.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
43593 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43594 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890d }
43596 /* max.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
43599 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43600 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18d }
43602 /* max.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
43605 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43606 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ad }
43608 /* max.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
43611 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43612 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818d }
43614 /* max.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
43617 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43618 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10d }
43620 /* max.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
43623 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43624 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812d }
43626 /* max.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
43629 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43630 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810d }
43632 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43635 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43636 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30d00 }
43638 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43641 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43642 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832d00 }
43644 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
43647 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43648 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830d00 }
43650 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43653 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43654 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50d00 }
43656 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43659 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43660 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852d00 }
43662 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
43665 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43666 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850d00 }
43668 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43671 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43672 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70d00 }
43674 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43677 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43678 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872d00 }
43680 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
43683 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43684 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870d00 }
43686 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
43689 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43690 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38d00 }
43692 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
43695 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43696 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ad00 }
43698 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
43701 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43702 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838d00 }
43704 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
43707 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43708 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58d00 }
43710 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
43713 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43714 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ad00 }
43716 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
43719 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43720 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858d00 }
43722 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
43725 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43726 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cd00 }
43728 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
43731 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43732 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ed00 }
43734 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
43737 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43738 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cd00 }
43740 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
43743 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43744 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cd00 }
43746 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
43749 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43750 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ed00 }
43752 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
43755 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43756 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cd00 }
43758 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
43761 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43762 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cd00 }
43764 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
43767 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43768 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ed00 }
43770 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
43773 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
43774 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cd00 }
43776 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
43779 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43780 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78d00 }
43782 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
43785 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43786 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ad00 }
43788 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
43791 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
43792 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878d00 }
43794 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
43797 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43798 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980d00 }
43800 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
43803 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43804 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982d00 }
43806 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
43809 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43810 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983d00 }
43812 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
43815 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43816 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908d00 }
43818 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
43821 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43822 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ad00 }
43824 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
43827 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43828 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bd00 }
43830 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43833 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43834 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900d00 }
43836 /* max.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
43839 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43840 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902d00 }
43842 /* max.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
43845 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43846 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903d00 }
43848 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
43851 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43852 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920d00 }
43854 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43857 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43858 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922d00 }
43860 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43863 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43864 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923d00 }
43866 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43869 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43870 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940d00 }
43872 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43875 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43876 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942d00 }
43878 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43881 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43882 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943d00 }
43884 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43887 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43888 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960d00 }
43890 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43893 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43894 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962d00 }
43896 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43899 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43900 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963d00 }
43902 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43905 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43906 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928d00 }
43908 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43911 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43912 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ad00 }
43914 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43917 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43918 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bd00 }
43920 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43923 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43924 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948d00 }
43926 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43929 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43930 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ad00 }
43932 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43935 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43936 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bd00 }
43938 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43941 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43942 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cd00 }
43944 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43947 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43948 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ed00 }
43950 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43953 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43954 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fd00 }
43956 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43959 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43960 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cd00 }
43962 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43965 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43966 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ed00 }
43968 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43971 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43972 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fd00 }
43974 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43977 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43978 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cd00 }
43980 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43983 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43984 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ed00 }
43986 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
43989 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43990 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fd00 }
43992 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
43995 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
43996 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968d00 }
43998 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
44001 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44002 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ad00 }
44004 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
44007 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44008 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bd00 }
44010 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44013 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44014 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80d00 }
44016 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
44019 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44020 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82d00 }
44022 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
44025 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44026 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83d00 }
44028 /* max.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
44031 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44032 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83d00 }
44034 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44037 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44038 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08d00 }
44040 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
44043 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44044 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ad00 }
44046 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
44049 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44050 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bd00 }
44052 /* max.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
44055 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44056 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bd00 }
44058 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44061 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44062 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00d00 }
44064 /* max.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
44067 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44068 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02d00 }
44070 /* max.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
44073 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44074 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03d00 }
44076 /* max.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
44079 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44080 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03d00 }
44082 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
44085 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44086 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20d00 }
44088 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44091 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44092 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22d00 }
44094 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44097 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44098 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23d00 }
44100 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
44103 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44104 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23d00 }
44106 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
44109 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44110 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40d00 }
44112 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44115 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44116 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42d00 }
44118 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44121 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44122 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43d00 }
44124 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
44127 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44128 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43d00 }
44130 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
44133 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44134 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60d00 }
44136 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44139 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44140 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62d00 }
44142 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44145 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44146 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63d00 }
44148 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
44151 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44152 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63d00 }
44154 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
44157 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44158 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28d00 }
44160 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
44163 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44164 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ad00 }
44166 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
44169 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44170 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bd00 }
44172 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
44175 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44176 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bd00 }
44178 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
44181 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44182 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48d00 }
44184 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
44187 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44188 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ad00 }
44190 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
44193 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44194 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bd00 }
44196 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
44199 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44200 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bd00 }
44202 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
44205 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44206 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cd00 }
44208 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
44211 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44212 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ed00 }
44214 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
44217 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44218 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fd00 }
44220 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
44223 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44224 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fd00 }
44226 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
44229 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44230 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cd00 }
44232 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
44235 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44236 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ed00 }
44238 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
44241 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44242 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fd00 }
44244 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
44247 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44248 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fd00 }
44250 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
44253 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
44254 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cd00 }
44256 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
44259 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44260 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ed00 }
44262 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
44265 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44266 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fd00 }
44268 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
44271 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
44272 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fd00 }
44274 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
44277 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
44278 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68d00 }
44280 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
44283 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44284 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ad00 }
44286 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
44289 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44290 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bd00 }
44292 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
44295 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
44296 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bd00 }
44298 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44301 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44302 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80d00 }
44304 /* max.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
44307 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44308 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82d00 }
44310 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44313 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44314 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08d00 }
44316 /* max.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
44319 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44320 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ad00 }
44322 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44325 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44326 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00d00 }
44328 /* max.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
44331 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44332 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02d00 }
44334 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
44337 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44338 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20d00 }
44340 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
44343 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44344 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22d00 }
44346 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
44349 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44350 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40d00 }
44352 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
44355 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44356 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42d00 }
44358 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
44361 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44362 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60d00 }
44364 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
44367 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44368 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62d00 }
44370 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
44373 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44374 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28d00 }
44376 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
44379 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44380 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ad00 }
44382 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
44385 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44386 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48d00 }
44388 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
44391 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44392 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ad00 }
44394 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
44397 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44398 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cd00 }
44400 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
44403 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44404 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ed00 }
44406 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
44409 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44410 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cd00 }
44412 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
44415 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44416 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ed00 }
44418 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
44421 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
44422 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cd00 }
44424 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
44427 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
44428 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ed00 }
44430 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
44433 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
44434 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68d00 }
44436 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
44439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
44440 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ad00 }
44442 /* max.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
44445 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44446 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80d }
44448 /* max.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
44451 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44452 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882d }
44454 /* max.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
44457 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44458 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880d }
44460 /* max.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
44463 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44464 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08d }
44466 /* max.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
44469 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44470 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ad }
44472 /* max.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
44475 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44476 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808d }
44478 /* max.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
44481 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44482 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00d }
44484 /* max.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
44487 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44488 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802d }
44490 /* max.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
44493 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44494 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800d }
44496 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44499 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44500 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20d00 }
44502 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44505 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44506 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822d00 }
44508 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
44511 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44512 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820d00 }
44514 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44517 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44518 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40d00 }
44520 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44523 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44524 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842d00 }
44526 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
44529 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44530 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840d00 }
44532 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44535 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44536 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60d00 }
44538 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44541 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44542 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862d00 }
44544 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
44547 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44548 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860d00 }
44550 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
44553 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44554 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28d00 }
44556 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
44559 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44560 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ad00 }
44562 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
44565 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44566 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828d00 }
44568 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
44571 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44572 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48d00 }
44574 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
44577 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44578 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ad00 }
44580 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
44583 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44584 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848d00 }
44586 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
44589 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44590 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cd00 }
44592 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
44595 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44596 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ed00 }
44598 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
44601 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44602 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cd00 }
44604 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
44607 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44608 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cd00 }
44610 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
44613 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44614 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ed00 }
44616 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
44619 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44620 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cd00 }
44622 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
44625 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44626 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cd00 }
44628 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
44631 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44632 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ed00 }
44634 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
44637 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
44638 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cd00 }
44640 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
44643 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44644 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68d00 }
44646 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
44649 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44650 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ad00 }
44652 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
44655 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
44656 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868d00 }
44658 /* max.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
44661 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
44662 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893f00 }
44664 /* max.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
44667 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
44668 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181bf00 }
44670 /* max.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
44673 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44674 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813f00 }
44676 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44679 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44680 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833f00 }
44682 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
44685 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44686 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183bf00 }
44688 /* max.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
44691 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44692 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ff00 }
44694 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44697 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44698 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853f00 }
44700 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
44703 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44704 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185bf00 }
44706 /* max.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
44709 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44710 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ff00 }
44712 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16} */
44715 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
44716 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ff00 }
44718 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44721 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44722 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873f00 }
44724 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24} */
44727 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
44728 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187bf00 }
44730 /* max.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
44733 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44734 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883f00 }
44736 /* max.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
44739 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44740 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180bf00 }
44742 /* max.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
44745 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44746 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803f00 }
44748 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44751 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44752 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823f00 }
44754 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
44757 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44758 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182bf00 }
44760 /* max.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
44763 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44764 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ff00 }
44766 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44769 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44770 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843f00 }
44772 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
44775 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44776 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184bf00 }
44778 /* max.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
44781 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44782 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ff00 }
44784 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16} */
44787 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
44788 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ff00 }
44790 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44793 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44794 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863f00 }
44796 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24} */
44799 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
44800 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186bf00 }
44802 /* ste.w ${Dsp-16-u16}[$Dst16An],[a1a0] */
44805 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44806 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x752c0000 }
44808 /* ste.w ${Dsp-16-u16}[sb],[a1a0] */
44811 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44812 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x752e0000 }
44814 /* ste.w ${Dsp-16-u16},[a1a0] */
44817 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44818 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x752f0000 }
44820 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44823 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44824 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x751c0000 }
44826 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
44829 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44830 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x751e0000 }
44832 /* ste.w ${Dsp-16-u16},${Dsp-32-u20}[a0] */
44835 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44836 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x751f0000 }
44838 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
44841 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
44842 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x750c0000 }
44844 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20} */
44847 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
44848 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x750e0000 }
44850 /* ste.w ${Dsp-16-u16},${Dsp-32-u20} */
44853 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
44854 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x750f0000 }
44856 /* ste.w ${Dsp-16-u8}[$Dst16An],[a1a0] */
44859 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44860 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x752800 }
44862 /* ste.w ${Dsp-16-u8}[sb],[a1a0] */
44865 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44866 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x752a00 }
44868 /* ste.w ${Dsp-16-s8}[fb],[a1a0] */
44871 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44872 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x752b00 }
44874 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
44877 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44878 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75180000 }
44880 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
44883 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44884 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x751a0000 }
44886 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
44889 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44890 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x751b0000 }
44892 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
44895 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
44896 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75080000 }
44898 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */
44901 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44902 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x750a0000 }
44904 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */
44907 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44908 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x750b0000 }
44910 /* ste.w $Dst16RnHI,[a1a0] */
44913 { { MNEM
, ' ', OP (DST16RNHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44914 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7520 }
44916 /* ste.w $Dst16AnHI,[a1a0] */
44919 { { MNEM
, ' ', OP (DST16ANHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44920 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7524 }
44922 /* ste.w [$Dst16An],[a1a0] */
44925 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44926 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7526 }
44928 /* ste.w $Dst16RnHI,${Dsp-16-u20}[a0] */
44931 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44932 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75100000 }
44934 /* ste.w $Dst16AnHI,${Dsp-16-u20}[a0] */
44937 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44938 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75140000 }
44940 /* ste.w [$Dst16An],${Dsp-16-u20}[a0] */
44943 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44944 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75160000 }
44946 /* ste.w $Dst16RnHI,${Dsp-16-u20} */
44949 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), 0 } },
44950 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75000000 }
44952 /* ste.w $Dst16AnHI,${Dsp-16-u20} */
44955 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), 0 } },
44956 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75040000 }
44958 /* ste.w [$Dst16An],${Dsp-16-u20} */
44961 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
44962 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75060000 }
44964 /* ste.b ${Dsp-16-u16}[$Dst16An],[a1a0] */
44967 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44968 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x742c0000 }
44970 /* ste.b ${Dsp-16-u16}[sb],[a1a0] */
44973 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44974 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x742e0000 }
44976 /* ste.b ${Dsp-16-u16},[a1a0] */
44979 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44980 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x742f0000 }
44982 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44985 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44986 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x741c0000 }
44988 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
44991 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44992 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x741e0000 }
44994 /* ste.b ${Dsp-16-u16},${Dsp-32-u20}[a0] */
44997 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44998 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x741f0000 }
45000 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
45003 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
45004 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x740c0000 }
45006 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20} */
45009 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
45010 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x740e0000 }
45012 /* ste.b ${Dsp-16-u16},${Dsp-32-u20} */
45015 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
45016 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x740f0000 }
45018 /* ste.b ${Dsp-16-u8}[$Dst16An],[a1a0] */
45021 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45022 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x742800 }
45024 /* ste.b ${Dsp-16-u8}[sb],[a1a0] */
45027 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45028 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x742a00 }
45030 /* ste.b ${Dsp-16-s8}[fb],[a1a0] */
45033 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45034 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x742b00 }
45036 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
45039 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45040 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74180000 }
45042 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
45045 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45046 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x741a0000 }
45048 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
45051 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45052 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x741b0000 }
45054 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
45057 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
45058 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74080000 }
45060 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */
45063 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45064 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x740a0000 }
45066 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */
45069 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45070 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x740b0000 }
45072 /* ste.b $Dst16RnQI,[a1a0] */
45075 { { MNEM
, ' ', OP (DST16RNQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45076 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7420 }
45078 /* ste.b $Dst16AnQI,[a1a0] */
45081 { { MNEM
, ' ', OP (DST16ANQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45082 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7424 }
45084 /* ste.b [$Dst16An],[a1a0] */
45087 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45088 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7426 }
45090 /* ste.b $Dst16RnQI,${Dsp-16-u20}[a0] */
45093 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45094 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74100000 }
45096 /* ste.b $Dst16AnQI,${Dsp-16-u20}[a0] */
45099 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45100 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74140000 }
45102 /* ste.b [$Dst16An],${Dsp-16-u20}[a0] */
45105 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45106 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74160000 }
45108 /* ste.b $Dst16RnQI,${Dsp-16-u20} */
45111 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), 0 } },
45112 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74000000 }
45114 /* ste.b $Dst16AnQI,${Dsp-16-u20} */
45117 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), 0 } },
45118 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74040000 }
45120 /* ste.b [$Dst16An],${Dsp-16-u20} */
45123 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
45124 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74060000 }
45126 /* lde.w [a1a0],${Dsp-16-u16}[$Dst16An] */
45129 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45130 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75ac0000 }
45132 /* lde.w [a1a0],${Dsp-16-u16}[sb] */
45135 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45136 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75ae0000 }
45138 /* lde.w [a1a0],${Dsp-16-u16} */
45141 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45142 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75af0000 }
45144 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45147 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45148 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x759c0000 }
45150 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45153 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45154 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x759e0000 }
45156 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45159 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45160 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x759f0000 }
45162 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45165 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45166 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x758c0000 }
45168 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45171 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45172 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x758e0000 }
45174 /* lde.w ${Dsp-32-u20},${Dsp-16-u16} */
45177 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45178 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x758f0000 }
45180 /* lde.w [a1a0],${Dsp-16-u8}[$Dst16An] */
45183 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45184 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75a800 }
45186 /* lde.w [a1a0],${Dsp-16-u8}[sb] */
45189 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45190 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75aa00 }
45192 /* lde.w [a1a0],${Dsp-16-s8}[fb] */
45195 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45196 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75ab00 }
45198 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45201 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45202 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75980000 }
45204 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45207 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45208 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x759a0000 }
45210 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45213 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45214 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x759b0000 }
45216 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45219 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45220 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75880000 }
45222 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45225 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45226 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x758a0000 }
45228 /* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45231 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45232 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x758b0000 }
45234 /* lde.w [a1a0],$Dst16RnHI */
45237 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45238 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75a0 }
45240 /* lde.w [a1a0],$Dst16AnHI */
45243 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45244 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75a4 }
45246 /* lde.w [a1a0],[$Dst16An] */
45249 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45250 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75a6 }
45252 /* lde.w ${Dsp-16-u20}[a0],$Dst16RnHI */
45255 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45256 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75900000 }
45258 /* lde.w ${Dsp-16-u20}[a0],$Dst16AnHI */
45261 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45262 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75940000 }
45264 /* lde.w ${Dsp-16-u20}[a0],[$Dst16An] */
45267 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45268 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75960000 }
45270 /* lde.w ${Dsp-16-u20},$Dst16RnHI */
45273 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNHI
), 0 } },
45274 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75800000 }
45276 /* lde.w ${Dsp-16-u20},$Dst16AnHI */
45279 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANHI
), 0 } },
45280 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75840000 }
45282 /* lde.w ${Dsp-16-u20},[$Dst16An] */
45285 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45286 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75860000 }
45288 /* lde.b [a1a0],${Dsp-16-u16}[$Dst16An] */
45291 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45292 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74ac0000 }
45294 /* lde.b [a1a0],${Dsp-16-u16}[sb] */
45297 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45298 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74ae0000 }
45300 /* lde.b [a1a0],${Dsp-16-u16} */
45303 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45304 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74af0000 }
45306 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45309 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45310 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x749c0000 }
45312 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45315 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45316 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x749e0000 }
45318 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45321 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45322 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x749f0000 }
45324 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45327 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45328 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x748c0000 }
45330 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45333 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45334 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x748e0000 }
45336 /* lde.b ${Dsp-32-u20},${Dsp-16-u16} */
45339 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45340 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x748f0000 }
45342 /* lde.b [a1a0],${Dsp-16-u8}[$Dst16An] */
45345 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45346 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74a800 }
45348 /* lde.b [a1a0],${Dsp-16-u8}[sb] */
45351 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45352 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74aa00 }
45354 /* lde.b [a1a0],${Dsp-16-s8}[fb] */
45357 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45358 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74ab00 }
45360 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45363 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45364 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74980000 }
45366 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45369 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45370 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x749a0000 }
45372 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45375 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45376 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x749b0000 }
45378 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45381 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45382 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74880000 }
45384 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45387 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45388 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x748a0000 }
45390 /* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45393 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45394 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x748b0000 }
45396 /* lde.b [a1a0],$Dst16RnQI */
45399 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45400 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74a0 }
45402 /* lde.b [a1a0],$Dst16AnQI */
45405 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45406 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74a4 }
45408 /* lde.b [a1a0],[$Dst16An] */
45411 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45412 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74a6 }
45414 /* lde.b ${Dsp-16-u20}[a0],$Dst16RnQI */
45417 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45418 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74900000 }
45420 /* lde.b ${Dsp-16-u20}[a0],$Dst16AnQI */
45423 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45424 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74940000 }
45426 /* lde.b ${Dsp-16-u20}[a0],[$Dst16An] */
45429 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45430 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74960000 }
45432 /* lde.b ${Dsp-16-u20},$Dst16RnQI */
45435 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNQI
), 0 } },
45436 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74800000 }
45438 /* lde.b ${Dsp-16-u20},$Dst16AnQI */
45441 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANQI
), 0 } },
45442 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74840000 }
45444 /* lde.b ${Dsp-16-u20},[$Dst16An] */
45447 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45448 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74860000 }
45450 /* stc ${cr3-Prefixed-32},$Dst32RnPrefixedSI */
45453 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32RNPREFIXEDSI
), 0 } },
45454 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d910 }
45456 /* stc ${cr3-Prefixed-32},$Dst32AnPrefixedSI */
45459 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32ANPREFIXEDSI
), 0 } },
45460 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d190 }
45462 /* stc ${cr3-Prefixed-32},[$Dst32AnPrefixed] */
45465 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45466 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d110 }
45468 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45471 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45472 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d31000 }
45474 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45477 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45478 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d51000 }
45480 /* stc ${cr3-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45483 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45484 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d71000 }
45486 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[sb] */
45489 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45490 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d39000 }
45492 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[sb] */
45495 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45496 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d59000 }
45498 /* stc ${cr3-Prefixed-32},${Dsp-24-s8}[fb] */
45501 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45502 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3d000 }
45504 /* stc ${cr3-Prefixed-32},${Dsp-24-s16}[fb] */
45507 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45508 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5d000 }
45510 /* stc ${cr3-Prefixed-32},${Dsp-24-u16} */
45513 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45514 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7d000 }
45516 /* stc ${cr3-Prefixed-32},${Dsp-24-u24} */
45519 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45520 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d79000 }
45522 /* stc ${cr2-32},$Dst32RnUnprefixedSI */
45525 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
45526 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd910 }
45528 /* stc ${cr2-32},$Dst32AnUnprefixedSI */
45531 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
45532 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd190 }
45534 /* stc ${cr2-32},[$Dst32AnUnprefixed] */
45537 { { MNEM
, ' ', OP (CR2_32
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45538 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd110 }
45540 /* stc ${cr2-32},${Dsp-16-u8}[$Dst32AnUnprefixed] */
45543 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45544 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd31000 }
45546 /* stc ${cr2-32},${Dsp-16-u16}[$Dst32AnUnprefixed] */
45549 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45550 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5100000 }
45552 /* stc ${cr2-32},${Dsp-16-u24}[$Dst32AnUnprefixed] */
45555 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45556 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7100000 }
45558 /* stc ${cr2-32},${Dsp-16-u8}[sb] */
45561 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45562 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd39000 }
45564 /* stc ${cr2-32},${Dsp-16-u16}[sb] */
45567 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45568 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5900000 }
45570 /* stc ${cr2-32},${Dsp-16-s8}[fb] */
45573 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45574 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3d000 }
45576 /* stc ${cr2-32},${Dsp-16-s16}[fb] */
45579 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
45580 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5d00000 }
45582 /* stc ${cr2-32},${Dsp-16-u16} */
45585 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), 0 } },
45586 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7d00000 }
45588 /* stc ${cr2-32},${Dsp-16-u24} */
45591 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), 0 } },
45592 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7900000 }
45594 /* stc ${cr1-Prefixed-32},$Dst32RnPrefixedHI */
45597 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
45598 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d918 }
45600 /* stc ${cr1-Prefixed-32},$Dst32AnPrefixedHI */
45603 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
45604 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d198 }
45606 /* stc ${cr1-Prefixed-32},[$Dst32AnPrefixed] */
45609 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45610 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d118 }
45612 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45615 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45616 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d31800 }
45618 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45621 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45622 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d51800 }
45624 /* stc ${cr1-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45627 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45628 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d71800 }
45630 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[sb] */
45633 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45634 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d39800 }
45636 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[sb] */
45639 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45640 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d59800 }
45642 /* stc ${cr1-Prefixed-32},${Dsp-24-s8}[fb] */
45645 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45646 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3d800 }
45648 /* stc ${cr1-Prefixed-32},${Dsp-24-s16}[fb] */
45651 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45652 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5d800 }
45654 /* stc ${cr1-Prefixed-32},${Dsp-24-u16} */
45657 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45658 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7d800 }
45660 /* stc ${cr1-Prefixed-32},${Dsp-24-u24} */
45663 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45664 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d79800 }
45666 /* stc pc,$Dst16RnHI */
45669 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16RNHI
), 0 } },
45670 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7cc0 }
45672 /* stc pc,$Dst16AnHI */
45675 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16ANHI
), 0 } },
45676 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7cc4 }
45678 /* stc pc,[$Dst16An] */
45681 { { MNEM
, ' ', 'p', 'c', ',', '[', OP (DST16AN
), ']', 0 } },
45682 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7cc6 }
45684 /* stc pc,${Dsp-16-u8}[$Dst16An] */
45687 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45688 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7cc800 }
45690 /* stc pc,${Dsp-16-u16}[$Dst16An] */
45693 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45694 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7ccc0000 }
45696 /* stc pc,${Dsp-16-u8}[sb] */
45699 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45700 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7cca00 }
45702 /* stc pc,${Dsp-16-u16}[sb] */
45705 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45706 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7cce0000 }
45708 /* stc pc,${Dsp-16-s8}[fb] */
45711 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45712 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7ccb00 }
45714 /* stc pc,${Dsp-16-u16} */
45717 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), 0 } },
45718 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7ccf0000 }
45720 /* stc ${cr16},$Dst16RnHI */
45723 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16RNHI
), 0 } },
45724 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7b80 }
45726 /* stc ${cr16},$Dst16AnHI */
45729 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16ANHI
), 0 } },
45730 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7b84 }
45732 /* stc ${cr16},[$Dst16An] */
45735 { { MNEM
, ' ', OP (CR16
), ',', '[', OP (DST16AN
), ']', 0 } },
45736 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7b86 }
45738 /* stc ${cr16},${Dsp-16-u8}[$Dst16An] */
45741 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45742 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7b8800 }
45744 /* stc ${cr16},${Dsp-16-u16}[$Dst16An] */
45747 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45748 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7b8c0000 }
45750 /* stc ${cr16},${Dsp-16-u8}[sb] */
45753 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45754 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7b8a00 }
45756 /* stc ${cr16},${Dsp-16-u16}[sb] */
45759 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45760 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7b8e0000 }
45762 /* stc ${cr16},${Dsp-16-s8}[fb] */
45765 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45766 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7b8b00 }
45768 /* stc ${cr16},${Dsp-16-u16} */
45771 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), 0 } },
45772 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7b8f0000 }
45774 /* ldc $Dst32RnPrefixedSI,${cr3-Prefixed-32} */
45777 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45778 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d900 }
45780 /* ldc $Dst32AnPrefixedSI,${cr3-Prefixed-32} */
45783 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45784 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d180 }
45786 /* ldc [$Dst32AnPrefixed],${cr3-Prefixed-32} */
45789 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45790 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d100 }
45792 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45795 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45796 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d30000 }
45798 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45801 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45802 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d50000 }
45804 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45807 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45808 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d70000 }
45810 /* ldc ${Dsp-24-u8}[sb],${cr3-Prefixed-32} */
45813 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45814 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d38000 }
45816 /* ldc ${Dsp-24-u16}[sb],${cr3-Prefixed-32} */
45819 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45820 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d58000 }
45822 /* ldc ${Dsp-24-s8}[fb],${cr3-Prefixed-32} */
45825 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45826 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3c000 }
45828 /* ldc ${Dsp-24-s16}[fb],${cr3-Prefixed-32} */
45831 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45832 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5c000 }
45834 /* ldc ${Dsp-24-u16},${cr3-Prefixed-32} */
45837 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR3_PREFIXED_32
), 0 } },
45838 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7c000 }
45840 /* ldc ${Dsp-24-u24},${cr3-Prefixed-32} */
45843 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR3_PREFIXED_32
), 0 } },
45844 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d78000 }
45846 /* ldc $Dst32RnUnprefixedSI,${cr2-32} */
45849 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45850 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd900 }
45852 /* ldc $Dst32AnUnprefixedSI,${cr2-32} */
45855 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45856 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd180 }
45858 /* ldc [$Dst32AnUnprefixed],${cr2-32} */
45861 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45862 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd100 }
45864 /* ldc ${Dsp-16-u8}[$Dst32AnUnprefixed],${cr2-32} */
45867 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45868 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd30000 }
45870 /* ldc ${Dsp-16-u16}[$Dst32AnUnprefixed],${cr2-32} */
45873 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45874 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5000000 }
45876 /* ldc ${Dsp-16-u24}[$Dst32AnUnprefixed],${cr2-32} */
45879 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45880 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7000000 }
45882 /* ldc ${Dsp-16-u8}[sb],${cr2-32} */
45885 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45886 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd38000 }
45888 /* ldc ${Dsp-16-u16}[sb],${cr2-32} */
45891 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45892 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5800000 }
45894 /* ldc ${Dsp-16-s8}[fb],${cr2-32} */
45897 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45898 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3c000 }
45900 /* ldc ${Dsp-16-s16}[fb],${cr2-32} */
45903 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45904 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5c00000 }
45906 /* ldc ${Dsp-16-u16},${cr2-32} */
45909 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR2_32
), 0 } },
45910 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7c00000 }
45912 /* ldc ${Dsp-16-u24},${cr2-32} */
45915 { { MNEM
, ' ', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
45916 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7800000 }
45918 /* ldc $Dst32RnPrefixedHI,${cr1-Prefixed-32} */
45921 { { MNEM
, ' ', OP (DST32RNPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45922 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d908 }
45924 /* ldc $Dst32AnPrefixedHI,${cr1-Prefixed-32} */
45927 { { MNEM
, ' ', OP (DST32ANPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45928 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d188 }
45930 /* ldc [$Dst32AnPrefixed],${cr1-Prefixed-32} */
45933 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45934 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d108 }
45936 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45939 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45940 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d30800 }
45942 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45945 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45946 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d50800 }
45948 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45951 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45952 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d70800 }
45954 /* ldc ${Dsp-24-u8}[sb],${cr1-Prefixed-32} */
45957 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45958 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d38800 }
45960 /* ldc ${Dsp-24-u16}[sb],${cr1-Prefixed-32} */
45963 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45964 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d58800 }
45966 /* ldc ${Dsp-24-s8}[fb],${cr1-Prefixed-32} */
45969 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45970 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3c800 }
45972 /* ldc ${Dsp-24-s16}[fb],${cr1-Prefixed-32} */
45975 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45976 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5c800 }
45978 /* ldc ${Dsp-24-u16},${cr1-Prefixed-32} */
45981 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR1_PREFIXED_32
), 0 } },
45982 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7c800 }
45984 /* ldc ${Dsp-24-u24},${cr1-Prefixed-32} */
45987 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR1_PREFIXED_32
), 0 } },
45988 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d78800 }
45990 /* ldc $Dst16RnHI,${cr16} */
45993 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (CR16
), 0 } },
45994 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7a80 }
45996 /* ldc $Dst16AnHI,${cr16} */
45999 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (CR16
), 0 } },
46000 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7a84 }
46002 /* ldc [$Dst16An],${cr16} */
46005 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46006 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7a86 }
46008 /* ldc ${Dsp-16-u8}[$Dst16An],${cr16} */
46011 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46012 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7a8800 }
46014 /* ldc ${Dsp-16-u16}[$Dst16An],${cr16} */
46017 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46018 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7a8c0000 }
46020 /* ldc ${Dsp-16-u8}[sb],${cr16} */
46023 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46024 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7a8a00 }
46026 /* ldc ${Dsp-16-u16}[sb],${cr16} */
46029 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46030 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7a8e0000 }
46032 /* ldc ${Dsp-16-s8}[fb],${cr16} */
46035 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR16
), 0 } },
46036 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7a8b00 }
46038 /* ldc ${Dsp-16-u16},${cr16} */
46041 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR16
), 0 } },
46042 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7a8f0000 }
46044 /* jsri.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46047 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46048 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96010000 }
46050 /* jsri.a ${Dsp-16-u24} */
46053 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46054 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x96810000 }
46056 /* jsri.a $Dst32RnUnprefixedSI */
46059 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46060 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x9801 }
46062 /* jsri.a $Dst32AnUnprefixedSI */
46065 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46066 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x9081 }
46068 /* jsri.a [$Dst32AnUnprefixed] */
46071 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46072 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x9001 }
46074 /* jsri.a $Dst16RnSI */
46077 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46078 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d10 }
46080 /* jsri.a $Dst16AnSI */
46083 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46084 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d14 }
46086 /* jsri.a [$Dst16An] */
46089 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46090 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d16 }
46092 /* jsri.a ${Dsp-16-u16}[sb] */
46095 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46096 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94810000 }
46098 /* jsri.a ${Dsp-16-s16}[fb] */
46101 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46102 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94c10000 }
46104 /* jsri.a ${Dsp-16-u16} */
46107 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46108 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x96c10000 }
46110 /* jsri.a ${Dsp-16-u16}[sb] */
46113 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46114 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI
, { 0x7d1e0000 }
46116 /* jsri.a ${Dsp-16-u16} */
46119 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46120 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI
, { 0x7d1f0000 }
46122 /* jsri.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46125 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46126 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x920100 }
46128 /* jsri.a ${Dsp-16-u8}[sb] */
46131 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46132 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x928100 }
46134 /* jsri.a ${Dsp-16-s8}[fb] */
46137 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46138 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92c100 }
46140 /* jsri.a ${Dsp-16-u8}[$Dst16An] */
46143 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46144 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d1800 }
46146 /* jsri.a ${Dsp-16-u8}[sb] */
46149 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46150 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d1a00 }
46152 /* jsri.a ${Dsp-16-s8}[fb] */
46155 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46156 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d1b00 }
46158 /* jsri.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46161 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46162 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96010000 }
46164 /* jsri.a ${Dsp-16-u24} */
46167 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46168 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x96810000 }
46170 /* jsri.a ${Dsp-16-u20}[$Dst16An] */
46173 { { MNEM
, ' ', OP (DSP_16_U20
), '[', OP (DST16AN
), ']', 0 } },
46174 & ifmt_jsri16a_dst16_16_20ar_SI_dst16_16_20_An_relative_SI
, { 0x7d1c0000 }
46176 /* jsri.w $Dst32RnUnprefixedHI */
46179 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46180 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc91f }
46182 /* jsri.w $Dst32AnUnprefixedHI */
46185 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46186 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc19f }
46188 /* jsri.w [$Dst32AnUnprefixed] */
46191 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46192 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc11f }
46194 /* jsri.w $Dst16RnHI */
46197 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46198 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d30 }
46200 /* jsri.w $Dst16AnHI */
46203 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46204 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d34 }
46206 /* jsri.w [$Dst16An] */
46209 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46210 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d36 }
46212 /* jsri.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46215 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46216 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc31f00 }
46218 /* jsri.w ${Dsp-16-u8}[sb] */
46221 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46222 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc39f00 }
46224 /* jsri.w ${Dsp-16-s8}[fb] */
46227 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46228 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3df00 }
46230 /* jsri.w ${Dsp-16-u8}[$Dst16An] */
46233 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46234 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d3800 }
46236 /* jsri.w ${Dsp-16-u8}[sb] */
46239 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46240 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d3a00 }
46242 /* jsri.w ${Dsp-16-s8}[fb] */
46245 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46246 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d3b00 }
46248 /* jsri.w ${Dsp-16-u16}[sb] */
46251 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46252 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc59f0000 }
46254 /* jsri.w ${Dsp-16-s16}[fb] */
46257 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46258 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5df0000 }
46260 /* jsri.w ${Dsp-16-u16} */
46263 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46264 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7df0000 }
46266 /* jsri.w ${Dsp-16-u16}[sb] */
46269 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46270 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d3e0000 }
46272 /* jsri.w ${Dsp-16-u16} */
46275 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46276 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d3f0000 }
46278 /* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46281 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46282 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc71f0000 }
46284 /* jsri.w ${Dsp-16-u24} */
46287 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46288 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc79f0000 }
46290 /* jsri.w ${Dsp-16-u20}[$Dst16An] */
46293 { { MNEM
, ' ', OP (DSP_16_U20
), '[', OP (DST16AN
), ']', 0 } },
46294 & ifmt_jsri16w_dst16_16_20ar_HI_dst16_16_20_An_relative_HI
, { 0x7d3c0000 }
46296 /* jmpi.a $Dst32RnUnprefixedSI */
46299 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46300 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x8801 }
46302 /* jmpi.a $Dst32AnUnprefixedSI */
46305 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46306 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x8081 }
46308 /* jmpi.a [$Dst32AnUnprefixed] */
46311 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46312 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x8001 }
46314 /* jmpi.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46317 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46318 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820100 }
46320 /* jmpi.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46323 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46324 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84010000 }
46326 /* jmpi.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46329 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46330 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86010000 }
46332 /* jmpi.a ${Dsp-16-u8}[sb] */
46335 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46336 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828100 }
46338 /* jmpi.a ${Dsp-16-u16}[sb] */
46341 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46342 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84810000 }
46344 /* jmpi.a ${Dsp-16-s8}[fb] */
46347 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46348 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c100 }
46350 /* jmpi.a ${Dsp-16-s16}[fb] */
46353 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46354 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c10000 }
46356 /* jmpi.a ${Dsp-16-u16} */
46359 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46360 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c10000 }
46362 /* jmpi.a ${Dsp-16-u24} */
46365 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46366 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x86810000 }
46368 /* jmpi.a $Dst16RnSI */
46371 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46372 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d00 }
46374 /* jmpi.a $Dst16AnSI */
46377 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46378 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d04 }
46380 /* jmpi.a [$Dst16An] */
46383 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46384 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d06 }
46386 /* jmpi.a ${Dsp-16-u8}[$Dst16An] */
46389 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46390 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d0800 }
46392 /* jmpi.a ${Dsp-16-u16}[$Dst16An] */
46395 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46396 & ifmt_jmpi16_a_16_dst16_16_16_An_relative_SI
, { 0x7d0c0000 }
46398 /* jmpi.a ${Dsp-16-u8}[sb] */
46401 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46402 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d0a00 }
46404 /* jmpi.a ${Dsp-16-u16}[sb] */
46407 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46408 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI
, { 0x7d0e0000 }
46410 /* jmpi.a ${Dsp-16-s8}[fb] */
46413 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46414 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d0b00 }
46416 /* jmpi.a ${Dsp-16-u16} */
46419 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46420 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI
, { 0x7d0f0000 }
46422 /* jmpi.w $Dst32RnUnprefixedHI */
46425 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46426 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90f }
46428 /* jmpi.w $Dst32AnUnprefixedHI */
46431 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46432 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18f }
46434 /* jmpi.w [$Dst32AnUnprefixed] */
46437 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46438 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10f }
46440 /* jmpi.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46443 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46444 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30f00 }
46446 /* jmpi.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46449 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46450 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50f0000 }
46452 /* jmpi.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46455 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46456 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70f0000 }
46458 /* jmpi.w ${Dsp-16-u8}[sb] */
46461 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46462 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38f00 }
46464 /* jmpi.w ${Dsp-16-u16}[sb] */
46467 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46468 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58f0000 }
46470 /* jmpi.w ${Dsp-16-s8}[fb] */
46473 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46474 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cf00 }
46476 /* jmpi.w ${Dsp-16-s16}[fb] */
46479 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46480 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cf0000 }
46482 /* jmpi.w ${Dsp-16-u16} */
46485 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46486 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cf0000 }
46488 /* jmpi.w ${Dsp-16-u24} */
46491 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46492 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78f0000 }
46494 /* jmpi.w $Dst16RnHI */
46497 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46498 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d20 }
46500 /* jmpi.w $Dst16AnHI */
46503 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46504 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d24 }
46506 /* jmpi.w [$Dst16An] */
46509 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46510 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d26 }
46512 /* jmpi.w ${Dsp-16-u8}[$Dst16An] */
46515 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46516 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d2800 }
46518 /* jmpi.w ${Dsp-16-u16}[$Dst16An] */
46521 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46522 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7d2c0000 }
46524 /* jmpi.w ${Dsp-16-u8}[sb] */
46527 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46528 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d2a00 }
46530 /* jmpi.w ${Dsp-16-u16}[sb] */
46533 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46534 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d2e0000 }
46536 /* jmpi.w ${Dsp-16-s8}[fb] */
46539 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46540 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d2b00 }
46542 /* jmpi.w ${Dsp-16-u16} */
46545 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46546 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d2f0000 }
46548 /* indexws.w $Dst32RnUnprefixedHI */
46551 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46552 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc833 }
46554 /* indexws.w $Dst32AnUnprefixedHI */
46557 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46558 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc0b3 }
46560 /* indexws.w [$Dst32AnUnprefixed] */
46563 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46564 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc033 }
46566 /* indexws.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46569 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46570 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc23300 }
46572 /* indexws.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46575 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46576 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4330000 }
46578 /* indexws.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46581 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46582 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6330000 }
46584 /* indexws.w ${Dsp-16-u8}[sb] */
46587 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46588 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc2b300 }
46590 /* indexws.w ${Dsp-16-u16}[sb] */
46593 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46594 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4b30000 }
46596 /* indexws.w ${Dsp-16-s8}[fb] */
46599 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46600 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2f300 }
46602 /* indexws.w ${Dsp-16-s16}[fb] */
46605 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46606 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4f30000 }
46608 /* indexws.w ${Dsp-16-u16} */
46611 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46612 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6f30000 }
46614 /* indexws.w ${Dsp-16-u24} */
46617 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46618 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6b30000 }
46620 /* indexws.b $Dst32RnUnprefixedQI */
46623 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46624 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc823 }
46626 /* indexws.b $Dst32AnUnprefixedQI */
46629 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46630 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0a3 }
46632 /* indexws.b [$Dst32AnUnprefixed] */
46635 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46636 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc023 }
46638 /* indexws.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46641 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46642 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22300 }
46644 /* indexws.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46647 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46648 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4230000 }
46650 /* indexws.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46653 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46654 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6230000 }
46656 /* indexws.b ${Dsp-16-u8}[sb] */
46659 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46660 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2a300 }
46662 /* indexws.b ${Dsp-16-u16}[sb] */
46665 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46666 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4a30000 }
46668 /* indexws.b ${Dsp-16-s8}[fb] */
46671 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46672 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2e300 }
46674 /* indexws.b ${Dsp-16-s16}[fb] */
46677 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46678 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4e30000 }
46680 /* indexws.b ${Dsp-16-u16} */
46683 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46684 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6e30000 }
46686 /* indexws.b ${Dsp-16-u24} */
46689 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46690 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6a30000 }
46692 /* indexwd.w $Dst32RnUnprefixedHI */
46695 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46696 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa833 }
46698 /* indexwd.w $Dst32AnUnprefixedHI */
46701 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46702 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa0b3 }
46704 /* indexwd.w [$Dst32AnUnprefixed] */
46707 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46708 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa033 }
46710 /* indexwd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46713 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46714 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa23300 }
46716 /* indexwd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46719 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46720 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4330000 }
46722 /* indexwd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46725 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46726 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6330000 }
46728 /* indexwd.w ${Dsp-16-u8}[sb] */
46731 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46732 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa2b300 }
46734 /* indexwd.w ${Dsp-16-u16}[sb] */
46737 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46738 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4b30000 }
46740 /* indexwd.w ${Dsp-16-s8}[fb] */
46743 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46744 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2f300 }
46746 /* indexwd.w ${Dsp-16-s16}[fb] */
46749 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46750 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4f30000 }
46752 /* indexwd.w ${Dsp-16-u16} */
46755 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46756 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6f30000 }
46758 /* indexwd.w ${Dsp-16-u24} */
46761 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46762 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6b30000 }
46764 /* indexwd.b $Dst32RnUnprefixedQI */
46767 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46768 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa823 }
46770 /* indexwd.b $Dst32AnUnprefixedQI */
46773 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46774 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0a3 }
46776 /* indexwd.b [$Dst32AnUnprefixed] */
46779 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46780 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa023 }
46782 /* indexwd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46785 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46786 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22300 }
46788 /* indexwd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46791 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46792 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4230000 }
46794 /* indexwd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46797 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46798 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6230000 }
46800 /* indexwd.b ${Dsp-16-u8}[sb] */
46803 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46804 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2a300 }
46806 /* indexwd.b ${Dsp-16-u16}[sb] */
46809 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46810 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4a30000 }
46812 /* indexwd.b ${Dsp-16-s8}[fb] */
46815 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46816 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2e300 }
46818 /* indexwd.b ${Dsp-16-s16}[fb] */
46821 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46822 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4e30000 }
46824 /* indexwd.b ${Dsp-16-u16} */
46827 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46828 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6e30000 }
46830 /* indexwd.b ${Dsp-16-u24} */
46833 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46834 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6a30000 }
46836 /* indexw.w $Dst32RnUnprefixedHI */
46839 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46840 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8833 }
46842 /* indexw.w $Dst32AnUnprefixedHI */
46845 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46846 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x80b3 }
46848 /* indexw.w [$Dst32AnUnprefixed] */
46851 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46852 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8033 }
46854 /* indexw.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46857 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46858 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x823300 }
46860 /* indexw.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46863 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46864 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84330000 }
46866 /* indexw.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46869 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46870 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86330000 }
46872 /* indexw.w ${Dsp-16-u8}[sb] */
46875 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46876 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x82b300 }
46878 /* indexw.w ${Dsp-16-u16}[sb] */
46881 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46882 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84b30000 }
46884 /* indexw.w ${Dsp-16-s8}[fb] */
46887 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46888 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82f300 }
46890 /* indexw.w ${Dsp-16-s16}[fb] */
46893 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46894 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84f30000 }
46896 /* indexw.w ${Dsp-16-u16} */
46899 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46900 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86f30000 }
46902 /* indexw.w ${Dsp-16-u24} */
46905 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46906 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86b30000 }
46908 /* indexw.b $Dst32RnUnprefixedQI */
46911 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46912 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8823 }
46914 /* indexw.b $Dst32AnUnprefixedQI */
46917 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46918 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x80a3 }
46920 /* indexw.b [$Dst32AnUnprefixed] */
46923 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46924 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8023 }
46926 /* indexw.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46929 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46930 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822300 }
46932 /* indexw.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46935 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46936 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84230000 }
46938 /* indexw.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46941 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46942 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86230000 }
46944 /* indexw.b ${Dsp-16-u8}[sb] */
46947 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46948 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a300 }
46950 /* indexw.b ${Dsp-16-u16}[sb] */
46953 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46954 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a30000 }
46956 /* indexw.b ${Dsp-16-s8}[fb] */
46959 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46960 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e300 }
46962 /* indexw.b ${Dsp-16-s16}[fb] */
46965 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46966 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e30000 }
46968 /* indexw.b ${Dsp-16-u16} */
46971 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46972 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e30000 }
46974 /* indexw.b ${Dsp-16-u24} */
46977 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46978 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a30000 }
46980 /* indexls.w $Dst32RnUnprefixedHI */
46983 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46984 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9813 }
46986 /* indexls.w $Dst32AnUnprefixedHI */
46989 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46990 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x9093 }
46992 /* indexls.w [$Dst32AnUnprefixed] */
46995 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46996 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9013 }
46998 /* indexls.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47001 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47002 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x921300 }
47004 /* indexls.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47007 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47008 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94130000 }
47010 /* indexls.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47013 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47014 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96130000 }
47016 /* indexls.w ${Dsp-16-u8}[sb] */
47019 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47020 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x929300 }
47022 /* indexls.w ${Dsp-16-u16}[sb] */
47025 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47026 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94930000 }
47028 /* indexls.w ${Dsp-16-s8}[fb] */
47031 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47032 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92d300 }
47034 /* indexls.w ${Dsp-16-s16}[fb] */
47037 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47038 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94d30000 }
47040 /* indexls.w ${Dsp-16-u16} */
47043 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47044 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96d30000 }
47046 /* indexls.w ${Dsp-16-u24} */
47049 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47050 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96930000 }
47052 /* indexls.b $Dst32RnUnprefixedQI */
47055 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47056 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9803 }
47058 /* indexls.b $Dst32AnUnprefixedQI */
47061 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47062 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x9083 }
47064 /* indexls.b [$Dst32AnUnprefixed] */
47067 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47068 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9003 }
47070 /* indexls.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47073 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47074 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920300 }
47076 /* indexls.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47079 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47080 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94030000 }
47082 /* indexls.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47085 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47086 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96030000 }
47088 /* indexls.b ${Dsp-16-u8}[sb] */
47091 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47092 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928300 }
47094 /* indexls.b ${Dsp-16-u16}[sb] */
47097 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47098 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94830000 }
47100 /* indexls.b ${Dsp-16-s8}[fb] */
47103 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47104 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92c300 }
47106 /* indexls.b ${Dsp-16-s16}[fb] */
47109 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47110 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94c30000 }
47112 /* indexls.b ${Dsp-16-u16} */
47115 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47116 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96c30000 }
47118 /* indexls.b ${Dsp-16-u24} */
47121 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47122 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96830000 }
47124 /* indexld.w $Dst32RnUnprefixedHI */
47127 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47128 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb833 }
47130 /* indexld.w $Dst32AnUnprefixedHI */
47133 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47134 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb0b3 }
47136 /* indexld.w [$Dst32AnUnprefixed] */
47139 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47140 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb033 }
47142 /* indexld.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47145 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47146 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb23300 }
47148 /* indexld.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47151 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47152 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb4330000 }
47154 /* indexld.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47157 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47158 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb6330000 }
47160 /* indexld.w ${Dsp-16-u8}[sb] */
47163 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47164 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb2b300 }
47166 /* indexld.w ${Dsp-16-u16}[sb] */
47169 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47170 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb4b30000 }
47172 /* indexld.w ${Dsp-16-s8}[fb] */
47175 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47176 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb2f300 }
47178 /* indexld.w ${Dsp-16-s16}[fb] */
47181 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47182 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb4f30000 }
47184 /* indexld.w ${Dsp-16-u16} */
47187 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47188 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb6f30000 }
47190 /* indexld.w ${Dsp-16-u24} */
47193 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47194 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb6b30000 }
47196 /* indexld.b $Dst32RnUnprefixedQI */
47199 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47200 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb823 }
47202 /* indexld.b $Dst32AnUnprefixedQI */
47205 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47206 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0a3 }
47208 /* indexld.b [$Dst32AnUnprefixed] */
47211 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47212 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb023 }
47214 /* indexld.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47217 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47218 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22300 }
47220 /* indexld.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47223 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47224 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb4230000 }
47226 /* indexld.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47229 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47230 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb6230000 }
47232 /* indexld.b ${Dsp-16-u8}[sb] */
47235 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47236 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2a300 }
47238 /* indexld.b ${Dsp-16-u16}[sb] */
47241 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47242 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4a30000 }
47244 /* indexld.b ${Dsp-16-s8}[fb] */
47247 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47248 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2e300 }
47250 /* indexld.b ${Dsp-16-s16}[fb] */
47253 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47254 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4e30000 }
47256 /* indexld.b ${Dsp-16-u16} */
47259 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47260 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6e30000 }
47262 /* indexld.b ${Dsp-16-u24} */
47265 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47266 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6a30000 }
47268 /* indexl.w $Dst32RnUnprefixedHI */
47271 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47272 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9833 }
47274 /* indexl.w $Dst32AnUnprefixedHI */
47277 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47278 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x90b3 }
47280 /* indexl.w [$Dst32AnUnprefixed] */
47283 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47284 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9033 }
47286 /* indexl.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47289 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47290 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x923300 }
47292 /* indexl.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47295 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47296 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94330000 }
47298 /* indexl.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47301 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47302 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96330000 }
47304 /* indexl.w ${Dsp-16-u8}[sb] */
47307 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47308 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x92b300 }
47310 /* indexl.w ${Dsp-16-u16}[sb] */
47313 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47314 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94b30000 }
47316 /* indexl.w ${Dsp-16-s8}[fb] */
47319 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47320 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92f300 }
47322 /* indexl.w ${Dsp-16-s16}[fb] */
47325 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47326 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94f30000 }
47328 /* indexl.w ${Dsp-16-u16} */
47331 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47332 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96f30000 }
47334 /* indexl.w ${Dsp-16-u24} */
47337 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47338 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96b30000 }
47340 /* indexl.b $Dst32RnUnprefixedQI */
47343 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47344 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9823 }
47346 /* indexl.b $Dst32AnUnprefixedQI */
47349 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47350 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x90a3 }
47352 /* indexl.b [$Dst32AnUnprefixed] */
47355 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47356 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9023 }
47358 /* indexl.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47361 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47362 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922300 }
47364 /* indexl.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47367 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47368 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94230000 }
47370 /* indexl.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47373 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47374 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96230000 }
47376 /* indexl.b ${Dsp-16-u8}[sb] */
47379 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47380 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92a300 }
47382 /* indexl.b ${Dsp-16-u16}[sb] */
47385 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47386 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94a30000 }
47388 /* indexl.b ${Dsp-16-s8}[fb] */
47391 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47392 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92e300 }
47394 /* indexl.b ${Dsp-16-s16}[fb] */
47397 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47398 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94e30000 }
47400 /* indexl.b ${Dsp-16-u16} */
47403 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47404 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96e30000 }
47406 /* indexl.b ${Dsp-16-u24} */
47409 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47410 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96a30000 }
47412 /* indexbs.w $Dst32RnUnprefixedHI */
47415 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47416 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc813 }
47418 /* indexbs.w $Dst32AnUnprefixedHI */
47421 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47422 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc093 }
47424 /* indexbs.w [$Dst32AnUnprefixed] */
47427 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47428 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc013 }
47430 /* indexbs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47433 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47434 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc21300 }
47436 /* indexbs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47439 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47440 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4130000 }
47442 /* indexbs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47445 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47446 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6130000 }
47448 /* indexbs.w ${Dsp-16-u8}[sb] */
47451 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47452 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc29300 }
47454 /* indexbs.w ${Dsp-16-u16}[sb] */
47457 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47458 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4930000 }
47460 /* indexbs.w ${Dsp-16-s8}[fb] */
47463 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47464 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2d300 }
47466 /* indexbs.w ${Dsp-16-s16}[fb] */
47469 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47470 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4d30000 }
47472 /* indexbs.w ${Dsp-16-u16} */
47475 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47476 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6d30000 }
47478 /* indexbs.w ${Dsp-16-u24} */
47481 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47482 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6930000 }
47484 /* indexbs.b $Dst32RnUnprefixedQI */
47487 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47488 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc803 }
47490 /* indexbs.b $Dst32AnUnprefixedQI */
47493 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47494 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc083 }
47496 /* indexbs.b [$Dst32AnUnprefixed] */
47499 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47500 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc003 }
47502 /* indexbs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47505 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47506 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20300 }
47508 /* indexbs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47511 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47512 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4030000 }
47514 /* indexbs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47517 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47518 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6030000 }
47520 /* indexbs.b ${Dsp-16-u8}[sb] */
47523 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47524 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28300 }
47526 /* indexbs.b ${Dsp-16-u16}[sb] */
47529 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47530 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4830000 }
47532 /* indexbs.b ${Dsp-16-s8}[fb] */
47535 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47536 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c300 }
47538 /* indexbs.b ${Dsp-16-s16}[fb] */
47541 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47542 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c30000 }
47544 /* indexbs.b ${Dsp-16-u16} */
47547 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47548 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c30000 }
47550 /* indexbs.b ${Dsp-16-u24} */
47553 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47554 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6830000 }
47556 /* indexbd.w $Dst32RnUnprefixedHI */
47559 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47560 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa813 }
47562 /* indexbd.w $Dst32AnUnprefixedHI */
47565 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47566 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa093 }
47568 /* indexbd.w [$Dst32AnUnprefixed] */
47571 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47572 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa013 }
47574 /* indexbd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47577 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47578 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa21300 }
47580 /* indexbd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47583 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47584 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4130000 }
47586 /* indexbd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47589 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47590 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6130000 }
47592 /* indexbd.w ${Dsp-16-u8}[sb] */
47595 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47596 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa29300 }
47598 /* indexbd.w ${Dsp-16-u16}[sb] */
47601 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47602 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4930000 }
47604 /* indexbd.w ${Dsp-16-s8}[fb] */
47607 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47608 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2d300 }
47610 /* indexbd.w ${Dsp-16-s16}[fb] */
47613 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47614 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4d30000 }
47616 /* indexbd.w ${Dsp-16-u16} */
47619 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47620 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6d30000 }
47622 /* indexbd.w ${Dsp-16-u24} */
47625 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47626 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6930000 }
47628 /* indexbd.b $Dst32RnUnprefixedQI */
47631 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47632 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa803 }
47634 /* indexbd.b $Dst32AnUnprefixedQI */
47637 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47638 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa083 }
47640 /* indexbd.b [$Dst32AnUnprefixed] */
47643 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47644 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa003 }
47646 /* indexbd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47649 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47650 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20300 }
47652 /* indexbd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47655 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47656 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4030000 }
47658 /* indexbd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47661 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47662 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6030000 }
47664 /* indexbd.b ${Dsp-16-u8}[sb] */
47667 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47668 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28300 }
47670 /* indexbd.b ${Dsp-16-u16}[sb] */
47673 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47674 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4830000 }
47676 /* indexbd.b ${Dsp-16-s8}[fb] */
47679 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47680 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2c300 }
47682 /* indexbd.b ${Dsp-16-s16}[fb] */
47685 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47686 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4c30000 }
47688 /* indexbd.b ${Dsp-16-u16} */
47691 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47692 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6c30000 }
47694 /* indexbd.b ${Dsp-16-u24} */
47697 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47698 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6830000 }
47700 /* indexb.w $Dst32RnUnprefixedHI */
47703 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47704 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8813 }
47706 /* indexb.w $Dst32AnUnprefixedHI */
47709 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47710 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x8093 }
47712 /* indexb.w [$Dst32AnUnprefixed] */
47715 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47716 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8013 }
47718 /* indexb.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47721 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47722 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x821300 }
47724 /* indexb.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47727 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47728 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84130000 }
47730 /* indexb.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47733 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47734 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86130000 }
47736 /* indexb.w ${Dsp-16-u8}[sb] */
47739 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47740 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x829300 }
47742 /* indexb.w ${Dsp-16-u16}[sb] */
47745 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47746 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84930000 }
47748 /* indexb.w ${Dsp-16-s8}[fb] */
47751 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47752 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82d300 }
47754 /* indexb.w ${Dsp-16-s16}[fb] */
47757 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47758 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84d30000 }
47760 /* indexb.w ${Dsp-16-u16} */
47763 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47764 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86d30000 }
47766 /* indexb.w ${Dsp-16-u24} */
47769 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47770 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86930000 }
47772 /* indexb.b $Dst32RnUnprefixedQI */
47775 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47776 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8803 }
47778 /* indexb.b $Dst32AnUnprefixedQI */
47781 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47782 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x8083 }
47784 /* indexb.b [$Dst32AnUnprefixed] */
47787 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47788 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8003 }
47790 /* indexb.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47793 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47794 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820300 }
47796 /* indexb.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47799 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47800 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84030000 }
47802 /* indexb.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47805 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47806 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86030000 }
47808 /* indexb.b ${Dsp-16-u8}[sb] */
47811 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47812 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828300 }
47814 /* indexb.b ${Dsp-16-u16}[sb] */
47817 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47818 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84830000 }
47820 /* indexb.b ${Dsp-16-s8}[fb] */
47823 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47824 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c300 }
47826 /* indexb.b ${Dsp-16-s16}[fb] */
47829 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47830 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c30000 }
47832 /* indexb.b ${Dsp-16-u16} */
47835 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47836 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c30000 }
47838 /* indexb.b ${Dsp-16-u24} */
47841 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47842 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86830000 }
47844 /* inc.w $Dst32RnUnprefixedHI */
47847 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47848 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa90e }
47850 /* inc.w $Dst32AnUnprefixedHI */
47853 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47854 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18e }
47856 /* inc.w [$Dst32AnUnprefixed] */
47859 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47860 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa10e }
47862 /* inc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47865 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47866 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30e00 }
47868 /* inc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47871 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47872 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50e0000 }
47874 /* inc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47877 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47878 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70e0000 }
47880 /* inc.w ${Dsp-16-u8}[sb] */
47883 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47884 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38e00 }
47886 /* inc.w ${Dsp-16-u16}[sb] */
47889 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47890 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58e0000 }
47892 /* inc.w ${Dsp-16-s8}[fb] */
47895 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47896 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ce00 }
47898 /* inc.w ${Dsp-16-s16}[fb] */
47901 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47902 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ce0000 }
47904 /* inc.w ${Dsp-16-u16} */
47907 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47908 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ce0000 }
47910 /* inc.w ${Dsp-16-u24} */
47913 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47914 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78e0000 }
47916 /* inc.b $Dst32RnUnprefixedQI */
47919 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47920 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa80e }
47922 /* inc.b $Dst32AnUnprefixedQI */
47925 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47926 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa08e }
47928 /* inc.b [$Dst32AnUnprefixed] */
47931 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47932 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa00e }
47934 /* inc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47937 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47938 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20e00 }
47940 /* inc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47943 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47944 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40e0000 }
47946 /* inc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47949 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47950 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60e0000 }
47952 /* inc.b ${Dsp-16-u8}[sb] */
47955 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47956 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28e00 }
47958 /* inc.b ${Dsp-16-u16}[sb] */
47961 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47962 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48e0000 }
47964 /* inc.b ${Dsp-16-s8}[fb] */
47967 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47968 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ce00 }
47970 /* inc.b ${Dsp-16-s16}[fb] */
47973 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47974 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ce0000 }
47976 /* inc.b ${Dsp-16-u16} */
47979 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47980 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ce0000 }
47982 /* inc.b ${Dsp-16-u24} */
47985 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47986 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68e0000 }
47991 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
47992 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xa4 }
47997 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
47998 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xa3 }
48000 /* inc.b ${Dsp-8-u8}[sb] */
48003 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48004 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xa500 }
48006 /* inc.b ${Dsp-8-s8}[fb] */
48009 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48010 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xa600 }
48012 /* inc.b ${Dsp-8-u16} */
48015 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
48016 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xa70000 }
48018 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48022 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990000 }
48024 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
48027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48028 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992000 }
48030 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
48033 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48034 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993000 }
48036 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48039 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48040 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918000 }
48042 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
48045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48046 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a000 }
48048 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
48051 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48052 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b000 }
48054 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48058 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910000 }
48060 /* sub.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
48063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48064 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912000 }
48066 /* sub.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
48069 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48070 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913000 }
48072 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48076 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93000000 }
48078 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48082 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93200000 }
48084 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48087 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48088 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93300000 }
48090 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48094 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95000000 }
48096 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48100 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95200000 }
48102 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48105 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48106 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95300000 }
48108 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48111 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48112 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97000000 }
48114 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48118 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97200000 }
48120 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48123 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48124 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97300000 }
48126 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
48129 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48130 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93800000 }
48132 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
48135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48136 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a00000 }
48138 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
48141 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48142 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b00000 }
48144 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
48147 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48148 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95800000 }
48150 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
48153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48154 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a00000 }
48156 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
48159 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48160 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b00000 }
48162 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
48165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48166 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c00000 }
48168 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
48171 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48172 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e00000 }
48174 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
48177 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48178 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f00000 }
48180 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
48183 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48184 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c00000 }
48186 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
48189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48190 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e00000 }
48192 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
48195 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48196 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f00000 }
48198 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
48201 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
48202 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c00000 }
48204 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
48207 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48208 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e00000 }
48210 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
48213 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48214 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f00000 }
48216 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
48219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
48220 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97800000 }
48222 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
48225 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48226 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a00000 }
48228 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
48231 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48232 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b00000 }
48234 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48237 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48238 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9000000 }
48240 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
48243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48244 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9200000 }
48246 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
48249 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48250 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9300000 }
48252 /* sub.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
48255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48256 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9300000 }
48258 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48262 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1800000 }
48264 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
48267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48268 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a00000 }
48270 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
48273 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48274 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b00000 }
48276 /* sub.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
48279 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48280 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b00000 }
48282 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48286 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1000000 }
48288 /* sub.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
48291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48292 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1200000 }
48294 /* sub.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
48297 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48298 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1300000 }
48300 /* sub.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
48303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48304 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1300000 }
48306 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48310 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3000000 }
48312 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48315 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48316 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3200000 }
48318 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48321 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48322 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3300000 }
48324 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
48327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48328 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3300000 }
48330 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48333 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48334 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5000000 }
48336 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48340 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5200000 }
48342 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48345 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48346 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5300000 }
48348 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
48351 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48352 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5300000 }
48354 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48358 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7000000 }
48360 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48364 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7200000 }
48366 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48369 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48370 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7300000 }
48372 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
48375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48376 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7300000 }
48378 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
48381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48382 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3800000 }
48384 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
48387 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48388 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a00000 }
48390 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
48393 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48394 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b00000 }
48396 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
48399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48400 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b00000 }
48402 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
48405 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48406 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5800000 }
48408 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
48411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48412 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a00000 }
48414 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
48417 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48418 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b00000 }
48420 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
48423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48424 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b00000 }
48426 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
48429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48430 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c00000 }
48432 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
48435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48436 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e00000 }
48438 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
48441 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48442 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f00000 }
48444 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
48447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48448 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f00000 }
48450 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
48453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48454 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c00000 }
48456 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
48459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48460 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e00000 }
48462 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
48465 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48466 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f00000 }
48468 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
48471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48472 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f00000 }
48474 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
48477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
48478 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c00000 }
48480 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
48483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48484 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e00000 }
48486 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
48489 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48490 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f00000 }
48492 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
48495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
48496 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f00000 }
48498 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
48501 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
48502 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7800000 }
48504 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
48507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48508 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a00000 }
48510 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
48513 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48514 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b00000 }
48516 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
48519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
48520 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b00000 }
48522 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48526 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9000000 }
48528 /* sub.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
48531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48532 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9200000 }
48534 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48537 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48538 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1800000 }
48540 /* sub.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
48543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48544 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a00000 }
48546 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48550 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1000000 }
48552 /* sub.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
48555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48556 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1200000 }
48558 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
48561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48562 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3000000 }
48564 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
48567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48568 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3200000 }
48570 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
48573 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48574 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5000000 }
48576 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
48579 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48580 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5200000 }
48582 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
48585 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48586 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7000000 }
48588 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
48591 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48592 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7200000 }
48594 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
48597 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48598 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3800000 }
48600 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
48603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48604 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a00000 }
48606 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
48609 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48610 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5800000 }
48612 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
48615 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48616 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a00000 }
48618 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
48621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48622 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c00000 }
48624 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
48627 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48628 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e00000 }
48630 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
48633 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48634 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c00000 }
48636 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
48639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48640 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e00000 }
48642 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
48645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
48646 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c00000 }
48648 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
48651 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
48652 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e00000 }
48654 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
48657 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
48658 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7800000 }
48660 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
48663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
48664 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a00000 }
48666 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
48669 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48670 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc900 }
48672 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
48675 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48676 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8920 }
48678 /* sub.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48681 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48682 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8900 }
48684 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
48687 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48688 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc180 }
48690 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
48693 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48694 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a0 }
48696 /* sub.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48699 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48700 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8180 }
48702 /* sub.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
48705 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48706 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc100 }
48708 /* sub.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
48711 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48712 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8120 }
48714 /* sub.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48717 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48718 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8100 }
48720 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48723 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48724 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30000 }
48726 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48729 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48730 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832000 }
48732 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
48735 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48736 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830000 }
48738 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48741 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48742 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5000000 }
48744 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48747 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48748 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85200000 }
48750 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
48753 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48754 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85000000 }
48756 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48759 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48760 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7000000 }
48762 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48765 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48766 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87200000 }
48768 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
48771 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48772 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87000000 }
48774 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
48777 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48778 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38000 }
48780 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
48783 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48784 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a000 }
48786 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
48789 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48790 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838000 }
48792 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
48795 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48796 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5800000 }
48798 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
48801 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48802 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a00000 }
48804 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
48807 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48808 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85800000 }
48810 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
48813 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48814 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c000 }
48816 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
48819 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48820 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e000 }
48822 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
48825 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48826 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c000 }
48828 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
48831 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48832 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c00000 }
48834 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
48837 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48838 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e00000 }
48840 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
48843 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48844 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c00000 }
48846 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
48849 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48850 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c00000 }
48852 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
48855 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48856 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e00000 }
48858 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
48861 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
48862 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c00000 }
48864 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
48867 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48868 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7800000 }
48870 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
48873 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48874 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a00000 }
48876 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
48879 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
48880 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87800000 }
48882 /* sub.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
48885 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48886 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2f000000 }
48888 /* sub.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
48891 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48892 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3f000000 }
48894 /* sub.w${S} #${Imm-24-HI},${Dsp-8-u16} */
48897 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
48898 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1f000000 }
48900 /* sub.w${S} #${Imm-8-HI},r0 */
48903 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
48904 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xf0000 }
48906 /* sub.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
48909 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48910 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2e0000 }
48912 /* sub.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
48915 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48916 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3e0000 }
48918 /* sub.b${S} #${Imm-24-QI},${Dsp-8-u16} */
48921 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
48922 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1e000000 }
48924 /* sub.b${S} #${Imm-8-QI},r0l */
48927 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
48928 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xe00 }
48930 /* sub.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
48933 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48934 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x98310000 }
48936 /* sub.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
48939 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48940 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90b10000 }
48942 /* sub.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
48945 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48946 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x90310000 }
48948 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
48951 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48952 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92310000 }
48954 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
48957 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48958 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92b10000 }
48960 /* sub.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
48963 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48964 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92f10000 }
48966 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
48969 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48970 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94310000 }
48972 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
48975 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48976 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94b10000 }
48978 /* sub.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
48981 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48982 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94f10000 }
48984 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16} */
48987 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
48988 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96f10000 }
48990 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
48993 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48994 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96310000 }
48996 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24} */
48999 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
49000 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96b10000 }
49002 /* sub.b${S} ${SrcDst16-r0l-r0h-S-normal} */
49005 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
49006 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x28 }
49008 /* sub.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
49011 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49012 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2900 }
49014 /* sub.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
49017 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49018 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2a00 }
49020 /* sub.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
49023 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
49024 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x2b0000 }
49026 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49030 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990a00 }
49032 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
49035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49036 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992a00 }
49038 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
49041 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49042 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993a00 }
49044 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49047 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49048 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918a00 }
49050 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
49053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49054 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91aa00 }
49056 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
49059 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49060 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ba00 }
49062 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49065 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49066 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910a00 }
49068 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49072 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912a00 }
49074 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49077 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49078 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913a00 }
49080 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49084 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930a0000 }
49086 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49089 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49090 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932a0000 }
49092 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49095 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49096 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933a0000 }
49098 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49102 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950a0000 }
49104 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49107 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49108 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952a0000 }
49110 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49113 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49114 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953a0000 }
49116 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49119 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49120 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970a0000 }
49122 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49126 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972a0000 }
49128 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49131 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49132 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973a0000 }
49134 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
49137 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49138 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938a0000 }
49140 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
49143 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49144 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93aa0000 }
49146 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
49149 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49150 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ba0000 }
49152 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
49155 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49156 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958a0000 }
49158 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
49161 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49162 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95aa0000 }
49164 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
49167 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49168 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ba0000 }
49170 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
49173 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49174 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ca0000 }
49176 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
49179 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49180 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ea0000 }
49182 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
49185 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49186 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fa0000 }
49188 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
49191 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49192 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ca0000 }
49194 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
49197 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49198 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ea0000 }
49200 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
49203 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49204 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fa0000 }
49206 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
49209 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
49210 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ca0000 }
49212 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
49215 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49216 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ea0000 }
49218 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
49221 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49222 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fa0000 }
49224 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
49227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
49228 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978a0000 }
49230 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
49233 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49234 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97aa0000 }
49236 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
49239 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49240 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ba0000 }
49242 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49245 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49246 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90a0000 }
49248 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
49251 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49252 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92a0000 }
49254 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
49257 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49258 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93a0000 }
49260 /* sub.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
49263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49264 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93a0000 }
49266 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49269 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49270 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18a0000 }
49272 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
49275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49276 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1aa0000 }
49278 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
49281 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49282 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ba0000 }
49284 /* sub.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
49287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49288 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ba0000 }
49290 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49293 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49294 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10a0000 }
49296 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
49299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49300 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12a0000 }
49302 /* sub.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
49305 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49306 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13a0000 }
49308 /* sub.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
49311 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49312 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13a0000 }
49314 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49317 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49318 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30a0000 }
49320 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49324 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32a0000 }
49326 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49329 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49330 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33a0000 }
49332 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
49335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49336 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33a0000 }
49338 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49341 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49342 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50a0000 }
49344 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49347 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49348 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52a0000 }
49350 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49353 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49354 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53a0000 }
49356 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
49359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49360 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53a0000 }
49362 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49365 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49366 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70a0000 }
49368 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49372 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72a0000 }
49374 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49377 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49378 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73a0000 }
49380 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
49383 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49384 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73a0000 }
49386 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
49389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49390 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38a0000 }
49392 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
49395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49396 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3aa0000 }
49398 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
49401 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49402 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ba0000 }
49404 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
49407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49408 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3ba0000 }
49410 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
49413 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49414 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58a0000 }
49416 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
49419 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49420 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5aa0000 }
49422 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
49425 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49426 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ba0000 }
49428 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
49431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49432 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5ba0000 }
49434 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
49437 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49438 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ca0000 }
49440 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
49443 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49444 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ea0000 }
49446 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
49449 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49450 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fa0000 }
49452 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
49455 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49456 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fa0000 }
49458 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
49461 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49462 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ca0000 }
49464 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
49467 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49468 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ea0000 }
49470 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
49473 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49474 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fa0000 }
49476 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
49479 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49480 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fa0000 }
49482 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
49485 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
49486 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ca0000 }
49488 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
49491 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49492 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ea0000 }
49494 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
49497 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49498 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fa0000 }
49500 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
49503 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
49504 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fa0000 }
49506 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
49509 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
49510 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78a0000 }
49512 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
49515 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49516 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7aa0000 }
49518 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
49521 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49522 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ba0000 }
49524 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
49527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
49528 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7ba0000 }
49530 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49534 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90a0000 }
49536 /* sub.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
49539 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49540 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92a0000 }
49542 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49545 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49546 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18a0000 }
49548 /* sub.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
49551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49552 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1aa0000 }
49554 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49558 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10a0000 }
49560 /* sub.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
49563 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49564 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12a0000 }
49566 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
49569 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49570 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30a0000 }
49572 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
49575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49576 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32a0000 }
49578 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
49581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49582 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50a0000 }
49584 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
49587 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49588 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52a0000 }
49590 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
49593 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49594 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70a0000 }
49596 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
49599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49600 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72a0000 }
49602 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
49605 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49606 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38a0000 }
49608 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
49611 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49612 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3aa0000 }
49614 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
49617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49618 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58a0000 }
49620 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
49623 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49624 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5aa0000 }
49626 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
49629 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49630 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ca0000 }
49632 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
49635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49636 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ea0000 }
49638 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
49641 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49642 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ca0000 }
49644 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
49647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49648 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ea0000 }
49650 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
49653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
49654 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ca0000 }
49656 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
49659 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
49660 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ea0000 }
49662 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
49665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
49666 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78a0000 }
49668 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
49671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
49672 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7aa0000 }
49674 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
49677 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49678 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90a }
49680 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
49683 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49684 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892a }
49686 /* sub.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49689 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49690 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890a }
49692 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
49695 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49696 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18a }
49698 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
49701 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49702 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81aa }
49704 /* sub.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49707 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49708 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818a }
49710 /* sub.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
49713 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49714 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10a }
49716 /* sub.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
49719 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49720 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812a }
49722 /* sub.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49725 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49726 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810a }
49728 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49731 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49732 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30a00 }
49734 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49737 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49738 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832a00 }
49740 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
49743 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49744 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830a00 }
49746 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49749 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49750 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50a0000 }
49752 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49755 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49756 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852a0000 }
49758 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
49761 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49762 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850a0000 }
49764 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49767 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49768 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70a0000 }
49770 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49773 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49774 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872a0000 }
49776 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
49779 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49780 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870a0000 }
49782 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
49785 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49786 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38a00 }
49788 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
49791 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49792 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83aa00 }
49794 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
49797 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49798 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838a00 }
49800 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
49803 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49804 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58a0000 }
49806 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
49809 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49810 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85aa0000 }
49812 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
49815 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49816 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858a0000 }
49818 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
49821 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49822 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ca00 }
49824 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
49827 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49828 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ea00 }
49830 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
49833 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49834 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ca00 }
49836 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
49839 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49840 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ca0000 }
49842 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
49845 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49846 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ea0000 }
49848 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
49851 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49852 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ca0000 }
49854 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
49857 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49858 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ca0000 }
49860 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
49863 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49864 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ea0000 }
49866 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
49869 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
49870 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ca0000 }
49872 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
49875 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49876 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78a0000 }
49878 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
49881 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49882 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87aa0000 }
49884 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
49887 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
49888 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878a0000 }
49890 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
49893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49894 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980a00 }
49896 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
49899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49900 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982a00 }
49902 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
49905 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49906 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983a00 }
49908 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
49911 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49912 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908a00 }
49914 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
49917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49918 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90aa00 }
49920 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
49923 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49924 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ba00 }
49926 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49929 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49930 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900a00 }
49932 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49936 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902a00 }
49938 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49941 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49942 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903a00 }
49944 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49948 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920a0000 }
49950 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49954 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922a0000 }
49956 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49959 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49960 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923a0000 }
49962 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49966 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940a0000 }
49968 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49972 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942a0000 }
49974 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49977 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49978 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943a0000 }
49980 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49984 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960a0000 }
49986 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49990 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962a0000 }
49992 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49995 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49996 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963a0000 }
49998 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
50001 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50002 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928a0000 }
50004 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50008 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92aa0000 }
50010 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50013 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50014 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ba0000 }
50016 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
50019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50020 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948a0000 }
50022 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50025 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50026 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94aa0000 }
50028 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50031 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50032 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ba0000 }
50034 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
50037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50038 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ca0000 }
50040 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50044 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ea0000 }
50046 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50049 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50050 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fa0000 }
50052 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
50055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50056 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ca0000 }
50058 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
50061 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50062 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ea0000 }
50064 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
50067 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50068 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fa0000 }
50070 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
50073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
50074 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ca0000 }
50076 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50080 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ea0000 }
50082 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50085 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50086 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fa0000 }
50088 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
50091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
50092 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968a0000 }
50094 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
50097 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50098 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96aa0000 }
50100 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
50103 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50104 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ba0000 }
50106 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50110 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80a0000 }
50112 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
50115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50116 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82a0000 }
50118 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
50121 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50122 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83a0000 }
50124 /* sub.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
50127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50128 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83a0000 }
50130 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50134 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08a0000 }
50136 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
50139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50140 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0aa0000 }
50142 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
50145 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50146 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ba0000 }
50148 /* sub.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
50151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50152 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ba0000 }
50154 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50158 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00a0000 }
50160 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
50163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50164 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02a0000 }
50166 /* sub.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
50169 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50170 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03a0000 }
50172 /* sub.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
50175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50176 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03a0000 }
50178 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50182 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20a0000 }
50184 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50188 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22a0000 }
50190 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50193 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50194 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23a0000 }
50196 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
50199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50200 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23a0000 }
50202 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50206 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40a0000 }
50208 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50211 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50212 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42a0000 }
50214 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50217 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50218 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43a0000 }
50220 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
50223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50224 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43a0000 }
50226 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50229 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50230 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60a0000 }
50232 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50236 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62a0000 }
50238 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50241 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50242 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63a0000 }
50244 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
50247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50248 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63a0000 }
50250 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
50253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50254 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28a0000 }
50256 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
50259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50260 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2aa0000 }
50262 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
50265 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50266 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ba0000 }
50268 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
50271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50272 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2ba0000 }
50274 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
50277 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50278 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48a0000 }
50280 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
50283 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50284 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4aa0000 }
50286 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
50289 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50290 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ba0000 }
50292 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
50295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50296 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4ba0000 }
50298 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
50301 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50302 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ca0000 }
50304 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
50307 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50308 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ea0000 }
50310 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
50313 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50314 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fa0000 }
50316 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
50319 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50320 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fa0000 }
50322 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
50325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50326 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ca0000 }
50328 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
50331 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50332 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ea0000 }
50334 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
50337 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50338 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fa0000 }
50340 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
50343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50344 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fa0000 }
50346 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
50349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
50350 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ca0000 }
50352 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
50355 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50356 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ea0000 }
50358 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
50361 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50362 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fa0000 }
50364 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
50367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
50368 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fa0000 }
50370 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
50373 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
50374 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68a0000 }
50376 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
50379 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50380 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6aa0000 }
50382 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
50385 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50386 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ba0000 }
50388 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
50391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
50392 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6ba0000 }
50394 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50398 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80a0000 }
50400 /* sub.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
50403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50404 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82a0000 }
50406 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50410 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08a0000 }
50412 /* sub.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
50415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50416 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0aa0000 }
50418 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50422 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00a0000 }
50424 /* sub.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
50427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50428 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02a0000 }
50430 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
50433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50434 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20a0000 }
50436 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
50439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50440 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22a0000 }
50442 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
50445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50446 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40a0000 }
50448 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
50451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50452 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42a0000 }
50454 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
50457 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50458 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60a0000 }
50460 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
50463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50464 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62a0000 }
50466 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
50469 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50470 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28a0000 }
50472 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
50475 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50476 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2aa0000 }
50478 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
50481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50482 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48a0000 }
50484 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
50487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50488 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4aa0000 }
50490 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
50493 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50494 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ca0000 }
50496 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
50499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50500 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ea0000 }
50502 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
50505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50506 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ca0000 }
50508 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
50511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50512 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ea0000 }
50514 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
50517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
50518 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ca0000 }
50520 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
50523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
50524 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ea0000 }
50526 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
50529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
50530 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68a0000 }
50532 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
50535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
50536 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6aa0000 }
50538 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
50541 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50542 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80a }
50544 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
50547 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50548 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882a }
50550 /* sub.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50553 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50554 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880a }
50556 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
50559 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50560 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08a }
50562 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
50565 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50566 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80aa }
50568 /* sub.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50571 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50572 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808a }
50574 /* sub.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
50577 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50578 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00a }
50580 /* sub.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
50583 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50584 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802a }
50586 /* sub.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50589 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50590 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800a }
50592 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50595 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50596 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20a00 }
50598 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50601 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50602 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822a00 }
50604 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
50607 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50608 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820a00 }
50610 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50613 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50614 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40a0000 }
50616 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50619 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50620 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842a0000 }
50622 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
50625 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50626 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840a0000 }
50628 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50631 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50632 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60a0000 }
50634 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50637 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50638 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862a0000 }
50640 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
50643 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50644 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860a0000 }
50646 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
50649 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50650 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28a00 }
50652 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
50655 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50656 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82aa00 }
50658 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
50661 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50662 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828a00 }
50664 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
50667 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50668 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48a0000 }
50670 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
50673 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50674 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84aa0000 }
50676 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
50679 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50680 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848a0000 }
50682 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
50685 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50686 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ca00 }
50688 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
50691 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50692 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ea00 }
50694 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
50697 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50698 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ca00 }
50700 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
50703 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50704 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ca0000 }
50706 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
50709 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50710 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ea0000 }
50712 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
50715 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50716 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ca0000 }
50718 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
50721 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50722 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ca0000 }
50724 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
50727 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50728 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ea0000 }
50730 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
50733 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
50734 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ca0000 }
50736 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
50739 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50740 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68a0000 }
50742 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
50745 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50746 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86aa0000 }
50748 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
50751 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
50752 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868a0000 }
50754 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
50757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50758 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa98000 }
50760 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
50763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50764 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9a000 }
50766 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
50769 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50770 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa9b000 }
50772 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
50775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50776 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa98400 }
50778 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
50781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50782 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa9a400 }
50784 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
50787 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50788 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa9b400 }
50790 /* sub.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
50793 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50794 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa98600 }
50796 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
50799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50800 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9a600 }
50802 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
50805 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50806 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa9b600 }
50808 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
50811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50812 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9880000 }
50814 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
50817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50818 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9a80000 }
50820 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
50823 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50824 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9b80000 }
50826 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
50829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50830 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa98c0000 }
50832 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
50835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50836 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9ac0000 }
50838 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
50841 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50842 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9bc0000 }
50844 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
50847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50848 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa98a0000 }
50850 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50854 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9aa0000 }
50856 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50859 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50860 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9ba0000 }
50862 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
50865 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50866 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa98e0000 }
50868 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50872 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9ae0000 }
50874 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50877 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50878 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9be0000 }
50880 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
50883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50884 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa98b0000 }
50886 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50889 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50890 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9ab0000 }
50892 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50895 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50896 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9bb0000 }
50898 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
50901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
50902 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa98f0000 }
50904 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50908 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9af0000 }
50910 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50913 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50914 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9bf0000 }
50916 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
50919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50920 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa9c00000 }
50922 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
50925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50926 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9e00000 }
50928 /* sub.w${G} ${Dsp-16-u16},$Dst16RnHI */
50931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
50932 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa9f00000 }
50934 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
50937 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50938 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa9c40000 }
50940 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
50943 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50944 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa9e40000 }
50946 /* sub.w${G} ${Dsp-16-u16},$Dst16AnHI */
50949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
50950 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa9f40000 }
50952 /* sub.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
50955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50956 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa9c60000 }
50958 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
50961 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50962 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9e60000 }
50964 /* sub.w${G} ${Dsp-16-u16},[$Dst16An] */
50967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
50968 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa9f60000 }
50970 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
50973 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50974 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9c80000 }
50976 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
50979 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50980 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9e80000 }
50982 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
50985 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50986 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa9f80000 }
50988 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
50991 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
50992 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9cc0000 }
50994 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
50997 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
50998 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9ec0000 }
51000 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51003 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51004 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa9fc0000 }
51006 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51009 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51010 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ca0000 }
51012 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51015 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51016 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ea0000 }
51018 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51021 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51022 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa9fa0000 }
51024 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51027 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51028 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ce0000 }
51030 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51033 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51034 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ee0000 }
51036 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51039 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51040 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa9fe0000 }
51042 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51045 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51046 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9cb0000 }
51048 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51051 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51052 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9eb0000 }
51054 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51058 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa9fb0000 }
51060 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51064 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa9cf0000 }
51066 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51069 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51070 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa9ef0000 }
51072 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
51075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51076 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa9ff0000 }
51078 /* sub.w${G} $Src16RnHI,$Dst16RnHI */
51081 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
51082 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa900 }
51084 /* sub.w${G} $Src16AnHI,$Dst16RnHI */
51087 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
51088 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa940 }
51090 /* sub.w${G} [$Src16An],$Dst16RnHI */
51093 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
51094 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa960 }
51096 /* sub.w${G} $Src16RnHI,$Dst16AnHI */
51099 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
51100 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa904 }
51102 /* sub.w${G} $Src16AnHI,$Dst16AnHI */
51105 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
51106 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa944 }
51108 /* sub.w${G} [$Src16An],$Dst16AnHI */
51111 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
51112 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa964 }
51114 /* sub.w${G} $Src16RnHI,[$Dst16An] */
51117 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51118 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa906 }
51120 /* sub.w${G} $Src16AnHI,[$Dst16An] */
51123 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51124 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa946 }
51126 /* sub.w${G} [$Src16An],[$Dst16An] */
51129 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51130 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa966 }
51132 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
51135 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51136 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa90800 }
51138 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
51141 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51142 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa94800 }
51144 /* sub.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51147 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51148 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa96800 }
51150 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
51153 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51154 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa90c0000 }
51156 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
51159 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51160 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa94c0000 }
51162 /* sub.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51165 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51166 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa96c0000 }
51168 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
51171 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51172 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa90a00 }
51174 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
51177 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51178 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa94a00 }
51180 /* sub.w${G} [$Src16An],${Dsp-16-u8}[sb] */
51183 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51184 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa96a00 }
51186 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
51189 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51190 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa90e0000 }
51192 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
51195 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51196 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa94e0000 }
51198 /* sub.w${G} [$Src16An],${Dsp-16-u16}[sb] */
51201 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51202 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa96e0000 }
51204 /* sub.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
51207 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51208 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa90b00 }
51210 /* sub.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
51213 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51214 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa94b00 }
51216 /* sub.w${G} [$Src16An],${Dsp-16-s8}[fb] */
51219 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51220 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa96b00 }
51222 /* sub.w${G} $Src16RnHI,${Dsp-16-u16} */
51225 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
51226 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa90f0000 }
51228 /* sub.w${G} $Src16AnHI,${Dsp-16-u16} */
51231 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
51232 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa94f0000 }
51234 /* sub.w${G} [$Src16An],${Dsp-16-u16} */
51237 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51238 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa96f0000 }
51240 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
51243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51244 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa88000 }
51246 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
51249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51250 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8a000 }
51252 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
51255 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51256 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa8b000 }
51258 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
51261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51262 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa88400 }
51264 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
51267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51268 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa8a400 }
51270 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
51273 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51274 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa8b400 }
51276 /* sub.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
51279 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51280 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa88600 }
51282 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
51285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51286 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8a600 }
51288 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
51291 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51292 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa8b600 }
51294 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
51297 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51298 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8880000 }
51300 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
51303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51304 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8a80000 }
51306 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
51309 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51310 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8b80000 }
51312 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
51315 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51316 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa88c0000 }
51318 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
51321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51322 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8ac0000 }
51324 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
51327 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51328 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8bc0000 }
51330 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
51333 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51334 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa88a0000 }
51336 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
51339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51340 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8aa0000 }
51342 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
51345 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51346 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8ba0000 }
51348 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
51351 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51352 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa88e0000 }
51354 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
51357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51358 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8ae0000 }
51360 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
51363 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51364 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8be0000 }
51366 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
51369 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51370 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa88b0000 }
51372 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
51375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51376 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8ab0000 }
51378 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
51381 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51382 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8bb0000 }
51384 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
51387 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
51388 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa88f0000 }
51390 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
51393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51394 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8af0000 }
51396 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
51399 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51400 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8bf0000 }
51402 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
51405 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51406 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa8c00000 }
51408 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
51411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51412 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8e00000 }
51414 /* sub.b${G} ${Dsp-16-u16},$Dst16RnQI */
51417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
51418 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa8f00000 }
51420 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
51423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51424 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa8c40000 }
51426 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
51429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51430 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa8e40000 }
51432 /* sub.b${G} ${Dsp-16-u16},$Dst16AnQI */
51435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
51436 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa8f40000 }
51438 /* sub.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
51441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51442 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa8c60000 }
51444 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
51447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51448 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8e60000 }
51450 /* sub.b${G} ${Dsp-16-u16},[$Dst16An] */
51453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
51454 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa8f60000 }
51456 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
51459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51460 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8c80000 }
51462 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
51465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51466 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8e80000 }
51468 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
51471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51472 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa8f80000 }
51474 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
51477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51478 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8cc0000 }
51480 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
51483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51484 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8ec0000 }
51486 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51489 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51490 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa8fc0000 }
51492 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51496 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ca0000 }
51498 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51501 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51502 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ea0000 }
51504 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51508 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa8fa0000 }
51510 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51513 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51514 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ce0000 }
51516 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51520 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ee0000 }
51522 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51526 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa8fe0000 }
51528 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51532 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8cb0000 }
51534 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51537 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51538 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8eb0000 }
51540 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51544 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa8fb0000 }
51546 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51550 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa8cf0000 }
51552 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51556 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa8ef0000 }
51558 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
51561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51562 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa8ff0000 }
51564 /* sub.b${G} $Src16RnQI,$Dst16RnQI */
51567 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
51568 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa800 }
51570 /* sub.b${G} $Src16AnQI,$Dst16RnQI */
51573 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
51574 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa840 }
51576 /* sub.b${G} [$Src16An],$Dst16RnQI */
51579 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51580 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa860 }
51582 /* sub.b${G} $Src16RnQI,$Dst16AnQI */
51585 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
51586 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa804 }
51588 /* sub.b${G} $Src16AnQI,$Dst16AnQI */
51591 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
51592 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa844 }
51594 /* sub.b${G} [$Src16An],$Dst16AnQI */
51597 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51598 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa864 }
51600 /* sub.b${G} $Src16RnQI,[$Dst16An] */
51603 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51604 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa806 }
51606 /* sub.b${G} $Src16AnQI,[$Dst16An] */
51609 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51610 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa846 }
51612 /* sub.b${G} [$Src16An],[$Dst16An] */
51615 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51616 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa866 }
51618 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
51621 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51622 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa80800 }
51624 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
51627 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51628 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa84800 }
51630 /* sub.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51633 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51634 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa86800 }
51636 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
51639 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51640 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa80c0000 }
51642 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
51645 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51646 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa84c0000 }
51648 /* sub.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51651 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51652 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa86c0000 }
51654 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
51657 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51658 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa80a00 }
51660 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
51663 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51664 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa84a00 }
51666 /* sub.b${G} [$Src16An],${Dsp-16-u8}[sb] */
51669 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51670 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa86a00 }
51672 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
51675 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51676 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa80e0000 }
51678 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
51681 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51682 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa84e0000 }
51684 /* sub.b${G} [$Src16An],${Dsp-16-u16}[sb] */
51687 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51688 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa86e0000 }
51690 /* sub.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
51693 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51694 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa80b00 }
51696 /* sub.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
51699 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51700 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa84b00 }
51702 /* sub.b${G} [$Src16An],${Dsp-16-s8}[fb] */
51705 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51706 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa86b00 }
51708 /* sub.b${G} $Src16RnQI,${Dsp-16-u16} */
51711 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
51712 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa80f0000 }
51714 /* sub.b${G} $Src16AnQI,${Dsp-16-u16} */
51717 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
51718 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa84f0000 }
51720 /* sub.b${G} [$Src16An],${Dsp-16-u16} */
51723 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51724 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa86f0000 }
51726 /* sub.b${S} #${Imm-8-QI},r0l */
51729 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
51730 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8c00 }
51732 /* sub.b${S} #${Imm-8-QI},r0h */
51735 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
51736 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8b00 }
51738 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
51741 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51742 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x8d0000 }
51744 /* sub.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
51747 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51748 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x8e0000 }
51750 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u16} */
51753 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
51754 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x8f000000 }
51756 /* sub.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
51759 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
51760 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893e0000 }
51762 /* sub.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
51765 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
51766 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81be0000 }
51768 /* sub.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
51771 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51772 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813e0000 }
51774 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51777 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51778 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833e0000 }
51780 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51783 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51784 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83be0000 }
51786 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51789 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51790 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83fe0000 }
51792 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51795 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51796 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853e0000 }
51798 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51801 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51802 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85be0000 }
51804 /* sub.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
51807 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51808 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85fe0000 }
51810 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51813 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51814 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87fe0000 }
51816 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51819 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51820 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873e0000 }
51822 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24} */
51825 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
51826 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87be0000 }
51828 /* sub.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
51831 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
51832 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883e00 }
51834 /* sub.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
51837 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
51838 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80be00 }
51840 /* sub.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
51843 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51844 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803e00 }
51846 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51849 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51850 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823e0000 }
51852 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51855 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51856 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82be0000 }
51858 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51861 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51862 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82fe0000 }
51864 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51867 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51868 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843e0000 }
51870 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
51873 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51874 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84be0000 }
51876 /* sub.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
51879 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51880 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84fe0000 }
51882 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
51885 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
51886 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86fe0000 }
51888 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51891 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51892 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863e0000 }
51894 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24} */
51897 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
51898 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86be0000 }
51900 /* sub.w${G} #${Imm-16-HI},$Dst16RnHI */
51903 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
51904 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77500000 }
51906 /* sub.w${G} #${Imm-16-HI},$Dst16AnHI */
51909 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
51910 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77540000 }
51912 /* sub.w${G} #${Imm-16-HI},[$Dst16An] */
51915 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
51916 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77560000 }
51918 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
51921 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51922 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77580000 }
51924 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51927 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51928 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x775a0000 }
51930 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51933 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51934 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x775b0000 }
51936 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
51939 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51940 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x775c0000 }
51942 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51945 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51946 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x775e0000 }
51948 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51951 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51952 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x775f0000 }
51954 /* sub.b${G} #${Imm-16-QI},$Dst16RnQI */
51957 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
51958 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x765000 }
51960 /* sub.b${G} #${Imm-16-QI},$Dst16AnQI */
51963 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
51964 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x765400 }
51966 /* sub.b${G} #${Imm-16-QI},[$Dst16An] */
51969 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
51970 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x765600 }
51972 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
51975 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51976 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76580000 }
51978 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51981 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51982 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x765a0000 }
51984 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51987 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51988 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x765b0000 }
51990 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
51993 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51994 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x765c0000 }
51996 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
51999 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
52000 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x765e0000 }
52002 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
52005 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
52006 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x765f0000 }
52008 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52011 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52012 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990200 }
52014 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
52017 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52018 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992200 }
52020 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
52023 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52024 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993200 }
52026 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52029 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52030 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918200 }
52032 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
52035 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52036 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a200 }
52038 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
52041 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52042 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b200 }
52044 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52047 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52048 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910200 }
52050 /* dsub.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52053 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52054 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912200 }
52056 /* dsub.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52059 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52060 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913200 }
52062 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52065 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52066 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930200 }
52068 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52071 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52072 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932200 }
52074 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52077 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52078 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933200 }
52080 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52083 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52084 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950200 }
52086 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52089 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52090 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952200 }
52092 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52095 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52096 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953200 }
52098 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52101 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52102 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970200 }
52104 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52107 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52108 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972200 }
52110 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52113 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52114 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973200 }
52116 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52119 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52120 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938200 }
52122 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
52125 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52126 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a200 }
52128 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
52131 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52132 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b200 }
52134 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
52137 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52138 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958200 }
52140 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
52143 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52144 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a200 }
52146 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
52149 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52150 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b200 }
52152 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
52155 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52156 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c200 }
52158 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
52161 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52162 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e200 }
52164 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
52167 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52168 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f200 }
52170 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
52173 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52174 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c200 }
52176 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
52179 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52180 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e200 }
52182 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
52185 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52186 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f200 }
52188 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
52191 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
52192 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c200 }
52194 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
52197 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52198 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e200 }
52200 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
52203 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52204 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f200 }
52206 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
52209 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
52210 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978200 }
52212 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
52215 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52216 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a200 }
52218 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
52221 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52222 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b200 }
52224 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52227 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52228 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90200 }
52230 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
52233 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52234 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92200 }
52236 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
52239 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52240 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93200 }
52242 /* dsub.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
52245 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52246 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93200 }
52248 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52251 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52252 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18200 }
52254 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
52257 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52258 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a200 }
52260 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
52263 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52264 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b200 }
52266 /* dsub.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
52269 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52270 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b200 }
52272 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52275 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52276 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10200 }
52278 /* dsub.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
52281 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52282 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12200 }
52284 /* dsub.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
52287 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52288 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13200 }
52290 /* dsub.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
52293 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52294 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13200 }
52296 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
52299 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52300 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30200 }
52302 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52305 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52306 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32200 }
52308 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52311 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52312 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33200 }
52314 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
52317 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52318 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33200 }
52320 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
52323 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52324 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50200 }
52326 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52329 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52330 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52200 }
52332 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52335 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52336 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53200 }
52338 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
52341 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52342 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53200 }
52344 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
52347 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52348 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70200 }
52350 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52353 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52354 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72200 }
52356 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52359 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52360 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73200 }
52362 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
52365 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52366 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73200 }
52368 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
52371 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52372 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38200 }
52374 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
52377 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52378 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a200 }
52380 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
52383 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52384 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b200 }
52386 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
52389 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52390 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b200 }
52392 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
52395 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52396 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58200 }
52398 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
52401 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52402 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a200 }
52404 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
52407 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52408 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b200 }
52410 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
52413 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52414 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b200 }
52416 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
52419 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52420 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c200 }
52422 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
52425 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52426 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e200 }
52428 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
52431 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52432 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f200 }
52434 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
52437 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52438 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f200 }
52440 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
52443 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52444 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c200 }
52446 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
52449 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52450 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e200 }
52452 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
52455 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52456 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f200 }
52458 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
52461 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52462 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f200 }
52464 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
52467 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
52468 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c200 }
52470 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
52473 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52474 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e200 }
52476 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
52479 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52480 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f200 }
52482 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
52485 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
52486 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f200 }
52488 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
52491 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
52492 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78200 }
52494 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
52497 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52498 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a200 }
52500 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
52503 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52504 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b200 }
52506 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
52509 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
52510 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b200 }
52512 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52515 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52516 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90200 }
52518 /* dsub.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
52521 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52522 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92200 }
52524 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52527 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52528 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18200 }
52530 /* dsub.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
52533 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52534 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a200 }
52536 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52539 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52540 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10200 }
52542 /* dsub.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
52545 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52546 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12200 }
52548 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
52551 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52552 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30200 }
52554 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
52557 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52558 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32200 }
52560 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
52563 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52564 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50200 }
52566 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
52569 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52570 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52200 }
52572 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
52575 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52576 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70200 }
52578 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
52581 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52582 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72200 }
52584 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
52587 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52588 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38200 }
52590 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
52593 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52594 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a200 }
52596 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
52599 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52600 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58200 }
52602 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
52605 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52606 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a200 }
52608 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
52611 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52612 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c200 }
52614 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
52617 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52618 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e200 }
52620 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
52623 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52624 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c200 }
52626 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
52629 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52630 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e200 }
52632 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
52635 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
52636 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c200 }
52638 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
52641 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
52642 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e200 }
52644 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
52647 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
52648 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78200 }
52650 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
52653 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
52654 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a200 }
52656 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
52659 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52660 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c902 }
52662 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
52665 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52666 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18922 }
52668 /* dsub.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
52671 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52672 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18902 }
52674 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
52677 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52678 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c182 }
52680 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
52683 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52684 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a2 }
52686 /* dsub.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
52689 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52690 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18182 }
52692 /* dsub.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
52695 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52696 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c102 }
52698 /* dsub.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
52701 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52702 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18122 }
52704 /* dsub.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
52707 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52708 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18102 }
52710 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52713 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52714 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30200 }
52716 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52719 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52720 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832200 }
52722 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
52725 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52726 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830200 }
52728 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52731 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52732 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50200 }
52734 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52737 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52738 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852200 }
52740 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
52743 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52744 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850200 }
52746 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52749 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52750 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70200 }
52752 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52755 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52756 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872200 }
52758 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
52761 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52762 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870200 }
52764 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
52767 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52768 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38200 }
52770 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
52773 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52774 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a200 }
52776 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
52779 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52780 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838200 }
52782 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
52785 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52786 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58200 }
52788 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
52791 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52792 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a200 }
52794 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
52797 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52798 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858200 }
52800 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
52803 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52804 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c200 }
52806 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
52809 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52810 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e200 }
52812 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
52815 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52816 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c200 }
52818 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
52821 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52822 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c200 }
52824 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
52827 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52828 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e200 }
52830 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
52833 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52834 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c200 }
52836 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
52839 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52840 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c200 }
52842 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
52845 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52846 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e200 }
52848 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
52851 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
52852 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c200 }
52854 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
52857 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52858 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78200 }
52860 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
52863 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52864 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a200 }
52866 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
52869 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
52870 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878200 }
52872 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
52875 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52876 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980200 }
52878 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
52881 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52882 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982200 }
52884 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
52887 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52888 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983200 }
52890 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
52893 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52894 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908200 }
52896 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
52899 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52900 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a200 }
52902 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
52905 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52906 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b200 }
52908 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52911 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52912 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900200 }
52914 /* dsub.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52917 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52918 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902200 }
52920 /* dsub.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52923 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52924 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903200 }
52926 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52929 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52930 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920200 }
52932 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52935 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52936 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922200 }
52938 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52941 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52942 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923200 }
52944 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52947 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52948 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940200 }
52950 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52953 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52954 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942200 }
52956 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52959 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52960 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943200 }
52962 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52965 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52966 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960200 }
52968 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52971 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52972 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962200 }
52974 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52977 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52978 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963200 }
52980 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52983 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52984 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928200 }
52986 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
52989 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52990 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a200 }
52992 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
52995 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52996 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b200 }
52998 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
53001 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53002 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948200 }
53004 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
53007 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53008 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a200 }
53010 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
53013 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53014 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b200 }
53016 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
53019 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53020 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c200 }
53022 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
53025 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53026 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e200 }
53028 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
53031 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53032 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f200 }
53034 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
53037 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53038 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c200 }
53040 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
53043 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53044 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e200 }
53046 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
53049 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53050 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f200 }
53052 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
53055 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
53056 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c200 }
53058 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
53061 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53062 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e200 }
53064 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
53067 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53068 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f200 }
53070 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
53073 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
53074 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968200 }
53076 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
53079 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53080 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a200 }
53082 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
53085 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53086 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b200 }
53088 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53091 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53092 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80200 }
53094 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
53097 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53098 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82200 }
53100 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
53103 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53104 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83200 }
53106 /* dsub.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
53109 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53110 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83200 }
53112 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53115 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53116 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08200 }
53118 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
53121 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53122 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a200 }
53124 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
53127 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53128 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b200 }
53130 /* dsub.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
53133 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53134 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b200 }
53136 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53139 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53140 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00200 }
53142 /* dsub.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
53145 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53146 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02200 }
53148 /* dsub.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
53151 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53152 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03200 }
53154 /* dsub.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
53157 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53158 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03200 }
53160 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
53163 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53164 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20200 }
53166 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53169 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53170 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22200 }
53172 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53175 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53176 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23200 }
53178 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
53181 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53182 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23200 }
53184 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
53187 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53188 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40200 }
53190 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53193 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53194 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42200 }
53196 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53199 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53200 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43200 }
53202 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
53205 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53206 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43200 }
53208 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
53211 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53212 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60200 }
53214 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53217 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53218 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62200 }
53220 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53223 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53224 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63200 }
53226 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
53229 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53230 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63200 }
53232 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
53235 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53236 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28200 }
53238 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
53241 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53242 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a200 }
53244 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
53247 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53248 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b200 }
53250 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
53253 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53254 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b200 }
53256 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
53259 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53260 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48200 }
53262 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
53265 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53266 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a200 }
53268 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
53271 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53272 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b200 }
53274 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
53277 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53278 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b200 }
53280 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
53283 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53284 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c200 }
53286 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
53289 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53290 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e200 }
53292 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
53295 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53296 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f200 }
53298 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
53301 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53302 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f200 }
53304 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
53307 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53308 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c200 }
53310 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
53313 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53314 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e200 }
53316 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
53319 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53320 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f200 }
53322 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
53325 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53326 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f200 }
53328 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
53331 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
53332 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c200 }
53334 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
53337 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53338 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e200 }
53340 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
53343 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53344 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f200 }
53346 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
53349 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
53350 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f200 }
53352 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
53355 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
53356 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68200 }
53358 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
53361 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53362 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a200 }
53364 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
53367 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53368 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b200 }
53370 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
53373 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
53374 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b200 }
53376 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53379 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53380 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80200 }
53382 /* dsub.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
53385 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53386 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82200 }
53388 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53391 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53392 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08200 }
53394 /* dsub.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
53397 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53398 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a200 }
53400 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53403 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53404 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00200 }
53406 /* dsub.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
53409 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53410 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02200 }
53412 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
53415 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53416 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20200 }
53418 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
53421 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53422 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22200 }
53424 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
53427 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53428 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40200 }
53430 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
53433 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53434 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42200 }
53436 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
53439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53440 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60200 }
53442 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
53445 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53446 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62200 }
53448 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
53451 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53452 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28200 }
53454 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
53457 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53458 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a200 }
53460 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
53463 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53464 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48200 }
53466 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
53469 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53470 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a200 }
53472 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
53475 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53476 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c200 }
53478 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
53481 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53482 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e200 }
53484 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
53487 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53488 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c200 }
53490 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
53493 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53494 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e200 }
53496 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
53499 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
53500 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c200 }
53502 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
53505 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
53506 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e200 }
53508 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
53511 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
53512 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68200 }
53514 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
53517 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
53518 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a200 }
53520 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
53523 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53524 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c802 }
53526 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
53529 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53530 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18822 }
53532 /* dsub.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
53535 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53536 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18802 }
53538 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
53541 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53542 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c082 }
53544 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
53547 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53548 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a2 }
53550 /* dsub.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
53553 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53554 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18082 }
53556 /* dsub.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
53559 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53560 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c002 }
53562 /* dsub.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
53565 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53566 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18022 }
53568 /* dsub.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
53571 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53572 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18002 }
53574 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53577 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53578 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20200 }
53580 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53583 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53584 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822200 }
53586 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
53589 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53590 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820200 }
53592 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53595 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53596 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40200 }
53598 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53601 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53602 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842200 }
53604 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
53607 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53608 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840200 }
53610 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53613 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53614 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60200 }
53616 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53619 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53620 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862200 }
53622 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
53625 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53626 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860200 }
53628 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
53631 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53632 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28200 }
53634 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
53637 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53638 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a200 }
53640 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
53643 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53644 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828200 }
53646 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
53649 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53650 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48200 }
53652 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
53655 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53656 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a200 }
53658 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
53661 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53662 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848200 }
53664 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
53667 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53668 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c200 }
53670 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
53673 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53674 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e200 }
53676 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
53679 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53680 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c200 }
53682 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
53685 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53686 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c200 }
53688 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
53691 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53692 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e200 }
53694 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
53697 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53698 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c200 }
53700 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
53703 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53704 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c200 }
53706 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
53709 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53710 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e200 }
53712 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
53715 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
53716 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c200 }
53718 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
53721 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53722 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68200 }
53724 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
53727 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53728 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a200 }
53730 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
53733 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
53734 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868200 }
53736 /* dsub.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
53739 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
53740 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1991e00 }
53742 /* dsub.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
53745 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
53746 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1919e00 }
53748 /* dsub.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
53751 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53752 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1911e00 }
53754 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53757 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53758 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1931e00 }
53760 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
53763 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53764 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1939e00 }
53766 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
53769 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53770 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193de00 }
53772 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53775 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53776 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1951e00 }
53778 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
53781 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53782 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1959e00 }
53784 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
53787 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53788 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195de00 }
53790 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16} */
53793 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
53794 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197de00 }
53796 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53799 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53800 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1971e00 }
53802 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24} */
53805 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
53806 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1979e00 }
53808 /* dsub.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
53811 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53812 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1981e00 }
53814 /* dsub.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
53817 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53818 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1909e00 }
53820 /* dsub.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
53823 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53824 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1901e00 }
53826 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53829 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53830 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1921e00 }
53832 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
53835 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53836 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1929e00 }
53838 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
53841 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53842 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192de00 }
53844 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53847 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53848 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1941e00 }
53850 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
53853 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53854 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1949e00 }
53856 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
53859 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53860 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194de00 }
53862 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16} */
53865 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
53866 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196de00 }
53868 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53871 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53872 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1961e00 }
53874 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24} */
53877 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
53878 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1969e00 }
53880 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
53883 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53884 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990a00 }
53886 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
53889 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53890 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992a00 }
53892 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
53895 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53896 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993a00 }
53898 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
53901 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53902 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918a00 }
53904 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
53907 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53908 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191aa00 }
53910 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
53913 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53914 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ba00 }
53916 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53919 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53920 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910a00 }
53922 /* dsbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
53925 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53926 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912a00 }
53928 /* dsbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
53931 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53932 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913a00 }
53934 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
53937 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53938 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930a00 }
53940 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53943 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53944 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932a00 }
53946 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53949 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53950 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933a00 }
53952 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
53955 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53956 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950a00 }
53958 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53961 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53962 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952a00 }
53964 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53967 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53968 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953a00 }
53970 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
53973 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53974 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970a00 }
53976 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53979 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53980 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972a00 }
53982 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53985 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53986 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973a00 }
53988 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
53991 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
53992 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938a00 }
53994 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
53997 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
53998 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193aa00 }
54000 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54003 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54004 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ba00 }
54006 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54009 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54010 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958a00 }
54012 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54015 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54016 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195aa00 }
54018 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54021 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54022 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ba00 }
54024 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54027 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54028 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ca00 }
54030 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54033 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54034 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ea00 }
54036 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54039 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54040 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fa00 }
54042 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54045 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54046 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ca00 }
54048 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54051 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54052 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ea00 }
54054 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54057 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54058 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fa00 }
54060 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54063 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54064 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ca00 }
54066 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54069 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54070 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ea00 }
54072 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54075 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54076 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fa00 }
54078 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54081 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54082 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978a00 }
54084 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54087 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54088 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197aa00 }
54090 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54093 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54094 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ba00 }
54096 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54099 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54100 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90a00 }
54102 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
54105 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54106 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92a00 }
54108 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
54111 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54112 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93a00 }
54114 /* dsbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
54117 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54118 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93a00 }
54120 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54123 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54124 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18a00 }
54126 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
54129 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54130 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1aa00 }
54132 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
54135 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54136 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ba00 }
54138 /* dsbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
54141 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54142 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ba00 }
54144 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54147 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54148 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10a00 }
54150 /* dsbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
54153 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54154 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12a00 }
54156 /* dsbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
54159 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54160 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13a00 }
54162 /* dsbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
54165 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54166 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13a00 }
54168 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
54171 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54172 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30a00 }
54174 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54177 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54178 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32a00 }
54180 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54183 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54184 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33a00 }
54186 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
54189 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54190 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33a00 }
54192 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
54195 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54196 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50a00 }
54198 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54201 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54202 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52a00 }
54204 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54207 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54208 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53a00 }
54210 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
54213 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54214 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53a00 }
54216 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
54219 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54220 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70a00 }
54222 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54225 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54226 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72a00 }
54228 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54231 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54232 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73a00 }
54234 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
54237 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54238 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73a00 }
54240 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
54243 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54244 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38a00 }
54246 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
54249 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54250 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3aa00 }
54252 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
54255 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54256 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ba00 }
54258 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
54261 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54262 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3ba00 }
54264 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
54267 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54268 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58a00 }
54270 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
54273 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54274 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5aa00 }
54276 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
54279 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54280 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ba00 }
54282 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
54285 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54286 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5ba00 }
54288 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
54291 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54292 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ca00 }
54294 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
54297 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54298 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ea00 }
54300 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
54303 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54304 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fa00 }
54306 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
54309 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54310 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fa00 }
54312 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
54315 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54316 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ca00 }
54318 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
54321 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54322 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ea00 }
54324 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
54327 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54328 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fa00 }
54330 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
54333 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54334 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fa00 }
54336 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
54339 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
54340 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ca00 }
54342 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
54345 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54346 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ea00 }
54348 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
54351 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54352 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fa00 }
54354 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
54357 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
54358 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fa00 }
54360 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
54363 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
54364 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78a00 }
54366 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
54369 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54370 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7aa00 }
54372 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
54375 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54376 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ba00 }
54378 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
54381 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
54382 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7ba00 }
54384 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54387 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54388 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90a00 }
54390 /* dsbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
54393 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54394 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92a00 }
54396 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54399 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54400 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18a00 }
54402 /* dsbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
54405 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54406 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1aa00 }
54408 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54411 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54412 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10a00 }
54414 /* dsbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
54417 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54418 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12a00 }
54420 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
54423 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54424 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30a00 }
54426 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
54429 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54430 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32a00 }
54432 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
54435 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54436 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50a00 }
54438 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
54441 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54442 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52a00 }
54444 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
54447 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54448 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70a00 }
54450 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
54453 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54454 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72a00 }
54456 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
54459 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54460 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38a00 }
54462 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
54465 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54466 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3aa00 }
54468 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
54471 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54472 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58a00 }
54474 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
54477 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54478 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5aa00 }
54480 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
54483 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54484 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ca00 }
54486 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
54489 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54490 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ea00 }
54492 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
54495 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54496 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ca00 }
54498 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
54501 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54502 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ea00 }
54504 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
54507 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
54508 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ca00 }
54510 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
54513 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
54514 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ea00 }
54516 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
54519 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
54520 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78a00 }
54522 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
54525 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
54526 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7aa00 }
54528 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
54531 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54532 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90a }
54534 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
54537 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54538 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892a }
54540 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
54543 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54544 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890a }
54546 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
54549 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54550 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18a }
54552 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
54555 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54556 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181aa }
54558 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
54561 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54562 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818a }
54564 /* dsbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
54567 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54568 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10a }
54570 /* dsbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
54573 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54574 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812a }
54576 /* dsbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
54579 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54580 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810a }
54582 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54585 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54586 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30a00 }
54588 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54591 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54592 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832a00 }
54594 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
54597 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54598 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830a00 }
54600 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54603 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54604 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50a00 }
54606 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54609 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54610 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852a00 }
54612 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
54615 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54616 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850a00 }
54618 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54621 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54622 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70a00 }
54624 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54627 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54628 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872a00 }
54630 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
54633 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54634 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870a00 }
54636 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
54639 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54640 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38a00 }
54642 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
54645 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54646 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183aa00 }
54648 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
54651 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54652 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838a00 }
54654 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
54657 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54658 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58a00 }
54660 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
54663 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54664 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185aa00 }
54666 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
54669 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54670 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858a00 }
54672 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
54675 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54676 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3ca00 }
54678 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
54681 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54682 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ea00 }
54684 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
54687 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54688 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ca00 }
54690 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
54693 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54694 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5ca00 }
54696 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
54699 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54700 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ea00 }
54702 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
54705 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54706 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ca00 }
54708 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
54711 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54712 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7ca00 }
54714 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
54717 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54718 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ea00 }
54720 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
54723 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
54724 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ca00 }
54726 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
54729 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54730 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78a00 }
54732 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
54735 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54736 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187aa00 }
54738 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
54741 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
54742 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878a00 }
54744 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54747 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54748 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980a00 }
54750 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
54753 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54754 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982a00 }
54756 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
54759 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54760 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983a00 }
54762 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54765 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54766 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908a00 }
54768 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
54771 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54772 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190aa00 }
54774 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
54777 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54778 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ba00 }
54780 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54783 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54784 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900a00 }
54786 /* dsbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
54789 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54790 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902a00 }
54792 /* dsbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
54795 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54796 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903a00 }
54798 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
54801 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54802 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920a00 }
54804 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54807 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54808 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922a00 }
54810 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54813 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54814 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923a00 }
54816 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
54819 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54820 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940a00 }
54822 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54825 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54826 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942a00 }
54828 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54831 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54832 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943a00 }
54834 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
54837 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54838 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960a00 }
54840 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54843 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54844 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962a00 }
54846 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54849 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54850 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963a00 }
54852 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
54855 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54856 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928a00 }
54858 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
54861 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54862 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192aa00 }
54864 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54867 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54868 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ba00 }
54870 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54873 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54874 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948a00 }
54876 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54879 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54880 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194aa00 }
54882 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54885 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54886 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ba00 }
54888 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54891 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54892 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ca00 }
54894 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54897 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54898 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ea00 }
54900 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54903 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54904 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fa00 }
54906 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54909 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54910 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ca00 }
54912 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54915 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54916 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ea00 }
54918 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54921 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54922 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fa00 }
54924 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54927 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54928 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ca00 }
54930 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54933 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54934 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ea00 }
54936 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54939 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54940 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fa00 }
54942 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54945 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54946 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968a00 }
54948 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54951 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54952 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196aa00 }
54954 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54957 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54958 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ba00 }
54960 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54963 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54964 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80a00 }
54966 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
54969 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54970 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82a00 }
54972 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
54975 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54976 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83a00 }
54978 /* dsbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
54981 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
54982 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83a00 }
54984 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54987 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54988 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08a00 }
54990 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
54993 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54994 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0aa00 }
54996 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
54999 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55000 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ba00 }
55002 /* dsbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
55005 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55006 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ba00 }
55008 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55011 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55012 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00a00 }
55014 /* dsbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
55017 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55018 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02a00 }
55020 /* dsbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
55023 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55024 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03a00 }
55026 /* dsbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
55029 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55030 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03a00 }
55032 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
55035 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55036 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20a00 }
55038 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55041 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55042 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22a00 }
55044 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55047 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55048 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23a00 }
55050 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
55053 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55054 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23a00 }
55056 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
55059 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55060 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40a00 }
55062 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55065 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55066 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42a00 }
55068 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55071 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55072 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43a00 }
55074 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
55077 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55078 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43a00 }
55080 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
55083 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55084 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60a00 }
55086 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55089 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55090 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62a00 }
55092 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55095 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55096 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63a00 }
55098 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
55101 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55102 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63a00 }
55104 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
55107 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55108 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28a00 }
55110 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
55113 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55114 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2aa00 }
55116 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
55119 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55120 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ba00 }
55122 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
55125 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55126 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2ba00 }
55128 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
55131 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55132 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48a00 }
55134 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
55137 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55138 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4aa00 }
55140 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
55143 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55144 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ba00 }
55146 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
55149 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55150 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4ba00 }
55152 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
55155 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55156 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ca00 }
55158 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
55161 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55162 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ea00 }
55164 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
55167 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55168 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fa00 }
55170 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
55173 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55174 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fa00 }
55176 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
55179 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55180 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ca00 }
55182 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
55185 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55186 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ea00 }
55188 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
55191 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55192 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fa00 }
55194 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
55197 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55198 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fa00 }
55200 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
55203 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
55204 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ca00 }
55206 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
55209 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55210 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ea00 }
55212 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
55215 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55216 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fa00 }
55218 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
55221 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
55222 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fa00 }
55224 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
55227 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
55228 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68a00 }
55230 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
55233 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55234 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6aa00 }
55236 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
55239 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55240 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ba00 }
55242 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
55245 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
55246 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6ba00 }
55248 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
55251 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55252 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80a00 }
55254 /* dsbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
55257 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55258 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82a00 }
55260 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
55263 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55264 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08a00 }
55266 /* dsbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
55269 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55270 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0aa00 }
55272 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55275 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55276 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00a00 }
55278 /* dsbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
55281 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55282 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02a00 }
55284 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
55287 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55288 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20a00 }
55290 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
55293 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55294 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22a00 }
55296 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
55299 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55300 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40a00 }
55302 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
55305 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55306 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42a00 }
55308 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
55311 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55312 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60a00 }
55314 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
55317 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55318 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62a00 }
55320 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
55323 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55324 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28a00 }
55326 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
55329 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55330 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2aa00 }
55332 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
55335 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55336 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48a00 }
55338 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
55341 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55342 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4aa00 }
55344 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
55347 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55348 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ca00 }
55350 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
55353 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55354 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ea00 }
55356 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
55359 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55360 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ca00 }
55362 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
55365 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55366 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ea00 }
55368 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
55371 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
55372 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ca00 }
55374 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
55377 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
55378 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ea00 }
55380 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
55383 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
55384 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68a00 }
55386 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
55389 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
55390 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6aa00 }
55392 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
55395 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55396 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80a }
55398 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
55401 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55402 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882a }
55404 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
55407 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55408 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880a }
55410 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
55413 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55414 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08a }
55416 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
55419 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55420 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180aa }
55422 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
55425 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55426 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808a }
55428 /* dsbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
55431 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55432 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00a }
55434 /* dsbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
55437 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55438 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802a }
55440 /* dsbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
55443 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55444 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800a }
55446 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55449 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55450 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20a00 }
55452 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55455 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55456 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822a00 }
55458 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
55461 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55462 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820a00 }
55464 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55467 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55468 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40a00 }
55470 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55473 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55474 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842a00 }
55476 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
55479 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55480 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840a00 }
55482 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55485 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55486 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60a00 }
55488 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55491 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55492 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862a00 }
55494 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
55497 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55498 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860a00 }
55500 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
55503 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55504 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28a00 }
55506 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
55509 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55510 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182aa00 }
55512 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
55515 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55516 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828a00 }
55518 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
55521 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55522 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48a00 }
55524 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
55527 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55528 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184aa00 }
55530 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
55533 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55534 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848a00 }
55536 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
55539 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55540 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2ca00 }
55542 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
55545 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55546 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ea00 }
55548 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
55551 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55552 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ca00 }
55554 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
55557 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55558 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4ca00 }
55560 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
55563 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55564 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ea00 }
55566 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
55569 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55570 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ca00 }
55572 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
55575 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55576 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6ca00 }
55578 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
55581 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55582 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ea00 }
55584 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
55587 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
55588 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ca00 }
55590 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
55593 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55594 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68a00 }
55596 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
55599 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55600 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186aa00 }
55602 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
55605 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
55606 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868a00 }
55608 /* dsbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
55611 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
55612 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1990e00 }
55614 /* dsbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
55617 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
55618 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1918e00 }
55620 /* dsbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
55623 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55624 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1910e00 }
55626 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55629 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55630 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1930e00 }
55632 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
55635 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55636 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1938e00 }
55638 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
55641 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55642 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ce00 }
55644 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55647 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55648 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1950e00 }
55650 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
55653 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55654 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1958e00 }
55656 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
55659 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55660 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ce00 }
55662 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
55665 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
55666 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ce00 }
55668 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55671 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55672 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1970e00 }
55674 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
55677 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
55678 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1978e00 }
55680 /* dsbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
55683 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55684 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1980e00 }
55686 /* dsbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
55689 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55690 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1908e00 }
55692 /* dsbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
55695 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55696 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1900e00 }
55698 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55701 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55702 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1920e00 }
55704 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
55707 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55708 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1928e00 }
55710 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
55713 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55714 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ce00 }
55716 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55719 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55720 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1940e00 }
55722 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
55725 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55726 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1948e00 }
55728 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
55731 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55732 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ce00 }
55734 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
55737 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
55738 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ce00 }
55740 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55743 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55744 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1960e00 }
55746 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
55749 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
55750 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1968e00 }
55752 /* divx.l $Dst32RnPrefixedSI */
55755 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55756 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a92f }
55758 /* divx.l $Dst32AnPrefixedSI */
55761 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55762 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a1af }
55764 /* divx.l [$Dst32AnPrefixed] */
55767 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55768 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a12f }
55770 /* divx.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55773 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55774 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a32f00 }
55776 /* divx.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55779 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55780 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a52f00 }
55782 /* divx.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55785 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55786 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a72f00 }
55788 /* divx.l ${Dsp-24-u8}[sb] */
55791 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55792 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a3af00 }
55794 /* divx.l ${Dsp-24-u16}[sb] */
55797 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55798 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a5af00 }
55800 /* divx.l ${Dsp-24-s8}[fb] */
55803 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55804 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3ef00 }
55806 /* divx.l ${Dsp-24-s16}[fb] */
55809 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55810 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5ef00 }
55812 /* divx.l ${Dsp-24-u16} */
55815 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55816 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7ef00 }
55818 /* divx.l ${Dsp-24-u24} */
55821 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55822 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a7af00 }
55824 /* divu.l $Dst32RnPrefixedSI */
55827 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55828 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a90f }
55830 /* divu.l $Dst32AnPrefixedSI */
55833 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55834 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a18f }
55836 /* divu.l [$Dst32AnPrefixed] */
55839 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55840 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a10f }
55842 /* divu.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55845 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55846 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a30f00 }
55848 /* divu.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55851 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55852 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a50f00 }
55854 /* divu.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55857 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55858 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a70f00 }
55860 /* divu.l ${Dsp-24-u8}[sb] */
55863 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55864 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a38f00 }
55866 /* divu.l ${Dsp-24-u16}[sb] */
55869 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55870 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a58f00 }
55872 /* divu.l ${Dsp-24-s8}[fb] */
55875 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55876 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3cf00 }
55878 /* divu.l ${Dsp-24-s16}[fb] */
55881 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55882 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5cf00 }
55884 /* divu.l ${Dsp-24-u16} */
55887 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55888 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7cf00 }
55890 /* divu.l ${Dsp-24-u24} */
55893 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55894 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a78f00 }
55896 /* div.l $Dst32RnPrefixedSI */
55899 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55900 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a91f }
55902 /* div.l $Dst32AnPrefixedSI */
55905 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55906 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a19f }
55908 /* div.l [$Dst32AnPrefixed] */
55911 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55912 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a11f }
55914 /* div.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55917 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55918 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a31f00 }
55920 /* div.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55923 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55924 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a51f00 }
55926 /* div.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55929 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55930 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a71f00 }
55932 /* div.l ${Dsp-24-u8}[sb] */
55935 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55936 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a39f00 }
55938 /* div.l ${Dsp-24-u16}[sb] */
55941 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55942 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a59f00 }
55944 /* div.l ${Dsp-24-s8}[fb] */
55947 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55948 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3df00 }
55950 /* div.l ${Dsp-24-s16}[fb] */
55953 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55954 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5df00 }
55956 /* div.l ${Dsp-24-u16} */
55959 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55960 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7df00 }
55962 /* div.l ${Dsp-24-u24} */
55965 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55966 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a79f00 }
55968 /* divx.w $Dst32RnUnprefixedHI */
55971 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
55972 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x991e }
55974 /* divx.w $Dst32AnUnprefixedHI */
55977 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
55978 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919e }
55980 /* divx.w [$Dst32AnUnprefixed] */
55983 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55984 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x911e }
55986 /* divx.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
55989 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55990 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931e00 }
55992 /* divx.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
55995 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55996 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951e0000 }
55998 /* divx.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56001 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56002 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971e0000 }
56004 /* divx.w ${Dsp-16-u8}[sb] */
56007 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56008 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939e00 }
56010 /* divx.w ${Dsp-16-u16}[sb] */
56013 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56014 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959e0000 }
56016 /* divx.w ${Dsp-16-s8}[fb] */
56019 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56020 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93de00 }
56022 /* divx.w ${Dsp-16-s16}[fb] */
56025 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56026 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95de0000 }
56028 /* divx.w ${Dsp-16-u16} */
56031 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56032 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x97de0000 }
56034 /* divx.w ${Dsp-16-u24} */
56037 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56038 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x979e0000 }
56040 /* divx.b $Dst32RnUnprefixedQI */
56043 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56044 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x981e }
56046 /* divx.b $Dst32AnUnprefixedQI */
56049 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56050 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x909e }
56052 /* divx.b [$Dst32AnUnprefixed] */
56055 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56056 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x901e }
56058 /* divx.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56061 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56062 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921e00 }
56064 /* divx.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56067 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56068 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941e0000 }
56070 /* divx.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56073 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56074 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961e0000 }
56076 /* divx.b ${Dsp-16-u8}[sb] */
56079 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56080 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929e00 }
56082 /* divx.b ${Dsp-16-u16}[sb] */
56085 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56086 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949e0000 }
56088 /* divx.b ${Dsp-16-s8}[fb] */
56091 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56092 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92de00 }
56094 /* divx.b ${Dsp-16-s16}[fb] */
56097 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56098 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94de0000 }
56100 /* divx.b ${Dsp-16-u16} */
56103 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56104 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96de0000 }
56106 /* divx.b ${Dsp-16-u24} */
56109 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56110 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x969e0000 }
56112 /* divx.w $Dst16RnHI */
56115 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56116 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7790 }
56118 /* divx.w $Dst16AnHI */
56121 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56122 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7794 }
56124 /* divx.w [$Dst16An] */
56127 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56128 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7796 }
56130 /* divx.w ${Dsp-16-u8}[$Dst16An] */
56133 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56134 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x779800 }
56136 /* divx.w ${Dsp-16-u16}[$Dst16An] */
56139 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56140 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x779c0000 }
56142 /* divx.w ${Dsp-16-u8}[sb] */
56145 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56146 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x779a00 }
56148 /* divx.w ${Dsp-16-u16}[sb] */
56151 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56152 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x779e0000 }
56154 /* divx.w ${Dsp-16-s8}[fb] */
56157 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56158 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x779b00 }
56160 /* divx.w ${Dsp-16-u16} */
56163 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56164 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x779f0000 }
56166 /* divx.b $Dst16RnQI */
56169 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56170 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7690 }
56172 /* divx.b $Dst16AnQI */
56175 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56176 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7694 }
56178 /* divx.b [$Dst16An] */
56181 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56182 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7696 }
56184 /* divx.b ${Dsp-16-u8}[$Dst16An] */
56187 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56188 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x769800 }
56190 /* divx.b ${Dsp-16-u16}[$Dst16An] */
56193 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56194 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x769c0000 }
56196 /* divx.b ${Dsp-16-u8}[sb] */
56199 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56200 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x769a00 }
56202 /* divx.b ${Dsp-16-u16}[sb] */
56205 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56206 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x769e0000 }
56208 /* divx.b ${Dsp-16-s8}[fb] */
56211 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56212 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x769b00 }
56214 /* divx.b ${Dsp-16-u16} */
56217 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56218 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x769f0000 }
56220 /* divu.w $Dst32RnUnprefixedHI */
56223 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56224 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x890e }
56226 /* divu.w $Dst32AnUnprefixedHI */
56229 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56230 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818e }
56232 /* divu.w [$Dst32AnUnprefixed] */
56235 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56236 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x810e }
56238 /* divu.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56241 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56242 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830e00 }
56244 /* divu.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56247 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56248 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850e0000 }
56250 /* divu.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56253 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56254 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870e0000 }
56256 /* divu.w ${Dsp-16-u8}[sb] */
56259 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56260 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838e00 }
56262 /* divu.w ${Dsp-16-u16}[sb] */
56265 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56266 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858e0000 }
56268 /* divu.w ${Dsp-16-s8}[fb] */
56271 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56272 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ce00 }
56274 /* divu.w ${Dsp-16-s16}[fb] */
56277 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56278 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ce0000 }
56280 /* divu.w ${Dsp-16-u16} */
56283 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56284 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ce0000 }
56286 /* divu.w ${Dsp-16-u24} */
56289 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56290 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x878e0000 }
56292 /* divu.b $Dst32RnUnprefixedQI */
56295 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56296 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x880e }
56298 /* divu.b $Dst32AnUnprefixedQI */
56301 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56302 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x808e }
56304 /* divu.b [$Dst32AnUnprefixed] */
56307 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56308 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x800e }
56310 /* divu.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56313 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56314 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820e00 }
56316 /* divu.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56319 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56320 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840e0000 }
56322 /* divu.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56325 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56326 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860e0000 }
56328 /* divu.b ${Dsp-16-u8}[sb] */
56331 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56332 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828e00 }
56334 /* divu.b ${Dsp-16-u16}[sb] */
56337 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56338 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848e0000 }
56340 /* divu.b ${Dsp-16-s8}[fb] */
56343 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56344 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ce00 }
56346 /* divu.b ${Dsp-16-s16}[fb] */
56349 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56350 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ce0000 }
56352 /* divu.b ${Dsp-16-u16} */
56355 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56356 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ce0000 }
56358 /* divu.b ${Dsp-16-u24} */
56361 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56362 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x868e0000 }
56364 /* divu.w $Dst16RnHI */
56367 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56368 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77c0 }
56370 /* divu.w $Dst16AnHI */
56373 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56374 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77c4 }
56376 /* divu.w [$Dst16An] */
56379 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56380 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77c6 }
56382 /* divu.w ${Dsp-16-u8}[$Dst16An] */
56385 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56386 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77c800 }
56388 /* divu.w ${Dsp-16-u16}[$Dst16An] */
56391 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56392 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77cc0000 }
56394 /* divu.w ${Dsp-16-u8}[sb] */
56397 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56398 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ca00 }
56400 /* divu.w ${Dsp-16-u16}[sb] */
56403 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56404 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ce0000 }
56406 /* divu.w ${Dsp-16-s8}[fb] */
56409 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56410 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77cb00 }
56412 /* divu.w ${Dsp-16-u16} */
56415 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56416 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77cf0000 }
56418 /* divu.b $Dst16RnQI */
56421 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56422 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76c0 }
56424 /* divu.b $Dst16AnQI */
56427 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56428 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76c4 }
56430 /* divu.b [$Dst16An] */
56433 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56434 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76c6 }
56436 /* divu.b ${Dsp-16-u8}[$Dst16An] */
56439 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56440 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76c800 }
56442 /* divu.b ${Dsp-16-u16}[$Dst16An] */
56445 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56446 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76cc0000 }
56448 /* divu.b ${Dsp-16-u8}[sb] */
56451 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56452 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ca00 }
56454 /* divu.b ${Dsp-16-u16}[sb] */
56457 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56458 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ce0000 }
56460 /* divu.b ${Dsp-16-s8}[fb] */
56463 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56464 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76cb00 }
56466 /* divu.b ${Dsp-16-u16} */
56469 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56470 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76cf0000 }
56472 /* div.w $Dst32RnUnprefixedHI */
56475 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56476 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x891e }
56478 /* div.w $Dst32AnUnprefixedHI */
56481 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56482 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819e }
56484 /* div.w [$Dst32AnUnprefixed] */
56487 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56488 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x811e }
56490 /* div.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56493 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56494 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831e00 }
56496 /* div.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56499 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56500 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851e0000 }
56502 /* div.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56505 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56506 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871e0000 }
56508 /* div.w ${Dsp-16-u8}[sb] */
56511 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56512 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839e00 }
56514 /* div.w ${Dsp-16-u16}[sb] */
56517 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56518 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859e0000 }
56520 /* div.w ${Dsp-16-s8}[fb] */
56523 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56524 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83de00 }
56526 /* div.w ${Dsp-16-s16}[fb] */
56529 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56530 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85de0000 }
56532 /* div.w ${Dsp-16-u16} */
56535 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56536 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87de0000 }
56538 /* div.w ${Dsp-16-u24} */
56541 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56542 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x879e0000 }
56544 /* div.b $Dst32RnUnprefixedQI */
56547 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56548 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x881e }
56550 /* div.b $Dst32AnUnprefixedQI */
56553 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56554 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x809e }
56556 /* div.b [$Dst32AnUnprefixed] */
56559 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56560 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x801e }
56562 /* div.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56565 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56566 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821e00 }
56568 /* div.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56571 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56572 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841e0000 }
56574 /* div.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56577 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56578 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861e0000 }
56580 /* div.b ${Dsp-16-u8}[sb] */
56583 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56584 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829e00 }
56586 /* div.b ${Dsp-16-u16}[sb] */
56589 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56590 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849e0000 }
56592 /* div.b ${Dsp-16-s8}[fb] */
56595 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56596 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82de00 }
56598 /* div.b ${Dsp-16-s16}[fb] */
56601 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56602 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84de0000 }
56604 /* div.b ${Dsp-16-u16} */
56607 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56608 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86de0000 }
56610 /* div.b ${Dsp-16-u24} */
56613 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56614 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x869e0000 }
56616 /* div.w $Dst16RnHI */
56619 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56620 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77d0 }
56622 /* div.w $Dst16AnHI */
56625 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56626 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77d4 }
56628 /* div.w [$Dst16An] */
56631 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56632 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77d6 }
56634 /* div.w ${Dsp-16-u8}[$Dst16An] */
56637 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56638 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77d800 }
56640 /* div.w ${Dsp-16-u16}[$Dst16An] */
56643 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56644 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77dc0000 }
56646 /* div.w ${Dsp-16-u8}[sb] */
56649 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56650 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77da00 }
56652 /* div.w ${Dsp-16-u16}[sb] */
56655 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56656 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77de0000 }
56658 /* div.w ${Dsp-16-s8}[fb] */
56661 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56662 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77db00 }
56664 /* div.w ${Dsp-16-u16} */
56667 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56668 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77df0000 }
56670 /* div.b $Dst16RnQI */
56673 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56674 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76d0 }
56676 /* div.b $Dst16AnQI */
56679 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56680 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76d4 }
56682 /* div.b [$Dst16An] */
56685 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56686 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76d6 }
56688 /* div.b ${Dsp-16-u8}[$Dst16An] */
56691 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56692 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76d800 }
56694 /* div.b ${Dsp-16-u16}[$Dst16An] */
56697 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56698 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76dc0000 }
56700 /* div.b ${Dsp-16-u8}[sb] */
56703 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56704 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76da00 }
56706 /* div.b ${Dsp-16-u16}[sb] */
56709 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56710 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76de0000 }
56712 /* div.b ${Dsp-16-s8}[fb] */
56715 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56716 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76db00 }
56718 /* div.b ${Dsp-16-u16} */
56721 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56722 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76df0000 }
56724 /* dec.w $Dst32RnUnprefixedHI */
56727 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56728 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb90e }
56730 /* dec.w $Dst32AnUnprefixedHI */
56733 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56734 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18e }
56736 /* dec.w [$Dst32AnUnprefixed] */
56739 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56740 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb10e }
56742 /* dec.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56745 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56746 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30e00 }
56748 /* dec.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56751 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56752 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50e0000 }
56754 /* dec.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56757 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56758 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70e0000 }
56760 /* dec.w ${Dsp-16-u8}[sb] */
56763 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56764 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38e00 }
56766 /* dec.w ${Dsp-16-u16}[sb] */
56769 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56770 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58e0000 }
56772 /* dec.w ${Dsp-16-s8}[fb] */
56775 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56776 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ce00 }
56778 /* dec.w ${Dsp-16-s16}[fb] */
56781 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56782 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ce0000 }
56784 /* dec.w ${Dsp-16-u16} */
56787 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56788 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ce0000 }
56790 /* dec.w ${Dsp-16-u24} */
56793 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56794 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78e0000 }
56796 /* dec.b $Dst32RnUnprefixedQI */
56799 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56800 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb80e }
56802 /* dec.b $Dst32AnUnprefixedQI */
56805 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56806 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb08e }
56808 /* dec.b [$Dst32AnUnprefixed] */
56811 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56812 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb00e }
56814 /* dec.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56817 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56818 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20e00 }
56820 /* dec.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56823 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56824 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40e0000 }
56826 /* dec.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56829 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56830 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60e0000 }
56832 /* dec.b ${Dsp-16-u8}[sb] */
56835 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56836 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28e00 }
56838 /* dec.b ${Dsp-16-u16}[sb] */
56841 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56842 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48e0000 }
56844 /* dec.b ${Dsp-16-s8}[fb] */
56847 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56848 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ce00 }
56850 /* dec.b ${Dsp-16-s16}[fb] */
56853 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56854 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ce0000 }
56856 /* dec.b ${Dsp-16-u16} */
56859 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56860 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ce0000 }
56862 /* dec.b ${Dsp-16-u24} */
56865 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56866 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68e0000 }
56871 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
56872 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xac }
56877 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
56878 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xab }
56880 /* dec.b ${Dsp-8-u8}[sb] */
56883 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
56884 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xad00 }
56886 /* dec.b ${Dsp-8-s8}[fb] */
56889 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
56890 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xae00 }
56892 /* dec.b ${Dsp-8-u16} */
56895 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
56896 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xaf0000 }
56898 /* cmpx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
56901 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
56902 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa81100 }
56904 /* cmpx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
56907 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
56908 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa09100 }
56910 /* cmpx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
56913 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56914 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa01100 }
56916 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
56919 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56920 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2110000 }
56922 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
56925 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56926 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2910000 }
56928 /* cmpx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
56931 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56932 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2d10000 }
56934 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
56937 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56938 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4110000 }
56940 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
56943 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56944 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4910000 }
56946 /* cmpx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
56949 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56950 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4d10000 }
56952 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16} */
56955 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
56956 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6d10000 }
56958 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
56961 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56962 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6110000 }
56964 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24} */
56967 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
56968 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6910000 }
56970 /* cmp.w${S} ${Dsp-8-u8}[sb],${Dst32R0HI-S} */
56973 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56974 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI
, { 0x6100 }
56976 /* cmp.w${S} ${Dsp-8-s8}[fb],${Dst32R0HI-S} */
56979 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56980 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI
, { 0x7100 }
56982 /* cmp.w${S} ${Dsp-8-u16},${Dst32R0HI-S} */
56985 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0HI_S
), 0 } },
56986 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI
, { 0x510000 }
56988 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst32R0QI-S} */
56991 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
56992 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI
, { 0x6000 }
56994 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst32R0QI-S} */
56997 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
56998 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI
, { 0x7000 }
57000 /* cmp.b${S} ${Dsp-8-u16},${Dst32R0QI-S} */
57003 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0QI_S
), 0 } },
57004 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI
, { 0x500000 }
57006 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
57009 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57010 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x67000000 }
57012 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
57015 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57016 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x77000000 }
57018 /* cmp.w${S} #${Imm-24-HI},${Dsp-8-u16} */
57021 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
57022 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x57000000 }
57024 /* cmp.w${S} #${Imm-8-HI},r0 */
57027 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
57028 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x470000 }
57030 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
57033 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57034 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x660000 }
57036 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
57039 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57040 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x760000 }
57042 /* cmp.b${S} #${Imm-24-QI},${Dsp-8-u16} */
57045 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
57046 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x56000000 }
57048 /* cmp.b${S} #${Imm-8-QI},r0l */
57051 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
57052 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4600 }
57054 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57057 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57058 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990100 }
57060 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
57063 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57064 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992100 }
57066 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
57069 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57070 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993100 }
57072 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57075 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57076 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918100 }
57078 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
57081 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57082 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a100 }
57084 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
57087 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57088 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b100 }
57090 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57093 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57094 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910100 }
57096 /* cmp.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57099 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57100 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912100 }
57102 /* cmp.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
57105 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57106 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913100 }
57108 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57111 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57112 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93010000 }
57114 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57117 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57118 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93210000 }
57120 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57123 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57124 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93310000 }
57126 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57129 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57130 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95010000 }
57132 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57135 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57136 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95210000 }
57138 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57141 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57142 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95310000 }
57144 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57147 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57148 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97010000 }
57150 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57154 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97210000 }
57156 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57159 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57160 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97310000 }
57162 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
57165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57166 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93810000 }
57168 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
57171 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57172 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a10000 }
57174 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
57177 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57178 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b10000 }
57180 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
57183 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57184 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95810000 }
57186 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
57189 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57190 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a10000 }
57192 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
57195 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57196 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b10000 }
57198 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
57201 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57202 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c10000 }
57204 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
57207 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57208 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e10000 }
57210 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
57213 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57214 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f10000 }
57216 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
57219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57220 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c10000 }
57222 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
57225 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57226 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e10000 }
57228 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
57231 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57232 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f10000 }
57234 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
57237 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
57238 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c10000 }
57240 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
57243 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57244 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e10000 }
57246 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
57249 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57250 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f10000 }
57252 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
57255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
57256 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97810000 }
57258 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
57261 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57262 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a10000 }
57264 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
57267 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57268 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b10000 }
57270 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57274 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9010000 }
57276 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
57279 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57280 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9210000 }
57282 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
57285 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57286 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9310000 }
57288 /* cmp.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
57291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57292 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9310000 }
57294 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57297 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57298 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1810000 }
57300 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
57303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57304 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a10000 }
57306 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
57309 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57310 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b10000 }
57312 /* cmp.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
57315 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57316 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b10000 }
57318 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57322 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1010000 }
57324 /* cmp.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
57327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57328 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1210000 }
57330 /* cmp.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
57333 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57334 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1310000 }
57336 /* cmp.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
57339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57340 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1310000 }
57342 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57345 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57346 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3010000 }
57348 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57351 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57352 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3210000 }
57354 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57357 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57358 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3310000 }
57360 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
57363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57364 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3310000 }
57366 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57369 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57370 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5010000 }
57372 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57376 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5210000 }
57378 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57381 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57382 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5310000 }
57384 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
57387 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57388 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5310000 }
57390 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57394 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7010000 }
57396 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57400 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7210000 }
57402 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57405 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57406 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7310000 }
57408 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
57411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57412 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7310000 }
57414 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
57417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57418 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3810000 }
57420 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
57423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57424 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a10000 }
57426 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
57429 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57430 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b10000 }
57432 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
57435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57436 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b10000 }
57438 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
57441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57442 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5810000 }
57444 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
57447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57448 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a10000 }
57450 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
57453 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57454 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b10000 }
57456 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
57459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57460 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b10000 }
57462 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
57465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57466 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c10000 }
57468 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
57471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57472 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e10000 }
57474 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
57477 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57478 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f10000 }
57480 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
57483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57484 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f10000 }
57486 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
57489 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57490 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c10000 }
57492 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
57495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57496 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e10000 }
57498 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
57501 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57502 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f10000 }
57504 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
57507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57508 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f10000 }
57510 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
57513 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
57514 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c10000 }
57516 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
57519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57520 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e10000 }
57522 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
57525 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57526 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f10000 }
57528 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
57531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
57532 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f10000 }
57534 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
57537 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
57538 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7810000 }
57540 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
57543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57544 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a10000 }
57546 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
57549 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57550 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b10000 }
57552 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
57555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
57556 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b10000 }
57558 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57562 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9010000 }
57564 /* cmp.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
57567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57568 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9210000 }
57570 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57573 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57574 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1810000 }
57576 /* cmp.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
57579 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57580 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a10000 }
57582 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57585 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57586 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1010000 }
57588 /* cmp.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
57591 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57592 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1210000 }
57594 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
57597 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57598 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3010000 }
57600 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
57603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57604 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3210000 }
57606 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
57609 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57610 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5010000 }
57612 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
57615 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57616 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5210000 }
57618 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
57621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57622 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7010000 }
57624 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
57627 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57628 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7210000 }
57630 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
57633 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57634 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3810000 }
57636 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
57639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57640 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a10000 }
57642 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
57645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57646 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5810000 }
57648 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
57651 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57652 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a10000 }
57654 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
57657 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57658 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c10000 }
57660 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
57663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57664 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e10000 }
57666 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
57669 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57670 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c10000 }
57672 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
57675 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57676 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e10000 }
57678 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
57681 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
57682 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c10000 }
57684 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
57687 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
57688 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e10000 }
57690 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
57693 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
57694 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7810000 }
57696 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
57699 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
57700 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a10000 }
57702 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
57705 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57706 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc901 }
57708 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
57711 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57712 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8921 }
57714 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57717 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57718 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8901 }
57720 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
57723 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57724 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc181 }
57726 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
57729 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57730 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a1 }
57732 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57735 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57736 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8181 }
57738 /* cmp.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
57741 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57742 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc101 }
57744 /* cmp.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
57747 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57748 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8121 }
57750 /* cmp.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57753 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57754 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8101 }
57756 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57759 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57760 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30100 }
57762 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57765 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57766 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832100 }
57768 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
57771 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57772 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830100 }
57774 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57777 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57778 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5010000 }
57780 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57783 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57784 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85210000 }
57786 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
57789 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57790 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85010000 }
57792 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57795 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57796 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7010000 }
57798 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57801 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57802 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87210000 }
57804 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
57807 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57808 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87010000 }
57810 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
57813 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57814 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38100 }
57816 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
57819 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57820 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a100 }
57822 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
57825 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57826 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838100 }
57828 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
57831 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57832 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5810000 }
57834 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
57837 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57838 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a10000 }
57840 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
57843 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57844 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85810000 }
57846 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
57849 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57850 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c100 }
57852 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
57855 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57856 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e100 }
57858 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
57861 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57862 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c100 }
57864 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
57867 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57868 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c10000 }
57870 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
57873 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57874 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e10000 }
57876 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
57879 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57880 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c10000 }
57882 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
57885 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57886 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c10000 }
57888 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
57891 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57892 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e10000 }
57894 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
57897 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
57898 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c10000 }
57900 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
57903 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57904 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7810000 }
57906 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
57909 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57910 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a10000 }
57912 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
57915 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
57916 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87810000 }
57918 /* cmp.b${S} ${SrcDst16-r0l-r0h-S-normal} */
57921 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
57922 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x38 }
57924 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
57927 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57928 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x3900 }
57930 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
57933 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57934 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x3a00 }
57936 /* cmp.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
57939 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
57940 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x3b0000 }
57942 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
57945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57946 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990600 }
57948 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
57951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57952 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992600 }
57954 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
57957 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57958 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993600 }
57960 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
57963 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57964 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918600 }
57966 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
57969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57970 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a600 }
57972 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
57975 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57976 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b600 }
57978 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57982 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910600 }
57984 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57988 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912600 }
57990 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
57993 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57994 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913600 }
57996 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57999 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58000 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93060000 }
58002 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58006 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93260000 }
58008 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58011 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58012 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93360000 }
58014 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58018 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95060000 }
58020 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58024 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95260000 }
58026 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58029 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58030 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95360000 }
58032 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58036 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97060000 }
58038 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58042 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97260000 }
58044 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58047 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58048 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97360000 }
58050 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58053 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58054 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93860000 }
58056 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58059 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58060 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a60000 }
58062 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58065 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58066 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b60000 }
58068 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58071 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58072 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95860000 }
58074 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58078 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a60000 }
58080 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58083 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58084 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b60000 }
58086 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58089 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58090 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c60000 }
58092 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58096 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e60000 }
58098 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58101 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58102 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f60000 }
58104 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58107 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58108 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c60000 }
58110 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58113 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58114 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e60000 }
58116 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58119 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58120 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f60000 }
58122 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
58125 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
58126 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c60000 }
58128 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
58131 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58132 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e60000 }
58134 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
58137 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58138 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f60000 }
58140 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
58143 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
58144 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97860000 }
58146 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
58149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58150 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a60000 }
58152 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
58155 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58156 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b60000 }
58158 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58161 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58162 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9060000 }
58164 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
58167 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58168 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9260000 }
58170 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
58173 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58174 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9360000 }
58176 /* cmp.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
58179 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58180 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9360000 }
58182 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58185 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58186 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1860000 }
58188 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
58191 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58192 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a60000 }
58194 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
58197 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58198 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b60000 }
58200 /* cmp.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
58203 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58204 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b60000 }
58206 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58209 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58210 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1060000 }
58212 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
58215 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58216 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1260000 }
58218 /* cmp.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
58221 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58222 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1360000 }
58224 /* cmp.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
58227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58228 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1360000 }
58230 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58233 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58234 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3060000 }
58236 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58239 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58240 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3260000 }
58242 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58245 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58246 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3360000 }
58248 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
58251 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58252 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3360000 }
58254 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58257 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58258 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5060000 }
58260 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58264 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5260000 }
58266 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58269 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58270 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5360000 }
58272 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
58275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58276 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5360000 }
58278 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58281 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58282 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7060000 }
58284 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58288 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7260000 }
58290 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58293 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58294 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7360000 }
58296 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
58299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58300 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7360000 }
58302 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
58305 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58306 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3860000 }
58308 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
58311 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58312 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a60000 }
58314 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
58317 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58318 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b60000 }
58320 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
58323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58324 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b60000 }
58326 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
58329 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58330 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5860000 }
58332 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
58335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58336 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a60000 }
58338 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
58341 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58342 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b60000 }
58344 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
58347 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58348 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b60000 }
58350 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
58353 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58354 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c60000 }
58356 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
58359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58360 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e60000 }
58362 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
58365 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58366 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f60000 }
58368 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
58371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58372 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f60000 }
58374 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
58377 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58378 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c60000 }
58380 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
58383 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58384 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e60000 }
58386 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
58389 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58390 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f60000 }
58392 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
58395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58396 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f60000 }
58398 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
58401 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
58402 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c60000 }
58404 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
58407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58408 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e60000 }
58410 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
58413 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58414 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f60000 }
58416 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
58419 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
58420 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f60000 }
58422 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
58425 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
58426 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7860000 }
58428 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
58431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58432 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a60000 }
58434 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
58437 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58438 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b60000 }
58440 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
58443 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
58444 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b60000 }
58446 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58449 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58450 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9060000 }
58452 /* cmp.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
58455 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58456 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9260000 }
58458 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58461 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58462 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1860000 }
58464 /* cmp.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
58467 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58468 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a60000 }
58470 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58473 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58474 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1060000 }
58476 /* cmp.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
58479 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58480 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1260000 }
58482 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
58485 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58486 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3060000 }
58488 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
58491 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58492 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3260000 }
58494 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
58497 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58498 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5060000 }
58500 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
58503 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58504 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5260000 }
58506 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
58509 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58510 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7060000 }
58512 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
58515 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58516 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7260000 }
58518 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
58521 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58522 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3860000 }
58524 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
58527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58528 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a60000 }
58530 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
58533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58534 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5860000 }
58536 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
58539 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58540 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a60000 }
58542 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
58545 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58546 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c60000 }
58548 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
58551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58552 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e60000 }
58554 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
58557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58558 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c60000 }
58560 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
58563 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58564 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e60000 }
58566 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
58569 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
58570 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c60000 }
58572 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
58575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
58576 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e60000 }
58578 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
58581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
58582 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7860000 }
58584 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
58587 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
58588 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a60000 }
58590 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
58593 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58594 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc906 }
58596 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
58599 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58600 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8926 }
58602 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58605 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58606 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8906 }
58608 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
58611 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58612 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc186 }
58614 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
58617 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58618 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a6 }
58620 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58623 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58624 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8186 }
58626 /* cmp.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
58629 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58630 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc106 }
58632 /* cmp.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
58635 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58636 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8126 }
58638 /* cmp.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58641 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58642 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8106 }
58644 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58647 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58648 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30600 }
58650 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58653 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58654 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832600 }
58656 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
58659 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58660 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830600 }
58662 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58665 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58666 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5060000 }
58668 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58671 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58672 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85260000 }
58674 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
58677 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58678 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85060000 }
58680 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58683 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58684 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7060000 }
58686 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58689 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58690 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87260000 }
58692 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
58695 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58696 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87060000 }
58698 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
58701 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58702 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38600 }
58704 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
58707 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58708 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a600 }
58710 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
58713 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58714 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838600 }
58716 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
58719 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58720 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5860000 }
58722 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
58725 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58726 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a60000 }
58728 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
58731 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58732 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85860000 }
58734 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
58737 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58738 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c600 }
58740 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
58743 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58744 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e600 }
58746 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
58749 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58750 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c600 }
58752 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
58755 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58756 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c60000 }
58758 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
58761 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58762 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e60000 }
58764 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
58767 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58768 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c60000 }
58770 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
58773 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58774 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c60000 }
58776 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
58779 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58780 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e60000 }
58782 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
58785 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
58786 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c60000 }
58788 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
58791 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58792 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7860000 }
58794 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
58797 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58798 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a60000 }
58800 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
58803 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
58804 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87860000 }
58806 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
58809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58810 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980600 }
58812 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
58815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58816 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982600 }
58818 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
58821 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58822 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983600 }
58824 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
58827 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58828 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908600 }
58830 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
58833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58834 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a600 }
58836 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
58839 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58840 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b600 }
58842 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58845 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58846 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900600 }
58848 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
58851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58852 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902600 }
58854 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
58857 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58858 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903600 }
58860 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58864 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92060000 }
58866 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58870 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92260000 }
58872 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58875 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58876 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92360000 }
58878 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58882 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94060000 }
58884 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58888 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94260000 }
58890 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58893 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58894 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94360000 }
58896 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58900 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96060000 }
58902 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58905 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58906 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96260000 }
58908 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58911 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58912 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96360000 }
58914 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58917 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58918 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92860000 }
58920 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58923 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58924 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a60000 }
58926 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58929 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58930 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b60000 }
58932 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58935 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58936 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94860000 }
58938 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58942 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a60000 }
58944 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58947 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58948 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b60000 }
58950 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58953 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58954 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c60000 }
58956 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58960 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e60000 }
58962 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58965 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58966 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f60000 }
58968 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58971 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58972 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c60000 }
58974 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58977 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58978 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e60000 }
58980 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58983 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58984 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f60000 }
58986 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
58989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
58990 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c60000 }
58992 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
58995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58996 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e60000 }
58998 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59001 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59002 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f60000 }
59004 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
59007 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
59008 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96860000 }
59010 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
59013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59014 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a60000 }
59016 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
59019 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59020 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b60000 }
59022 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59025 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59026 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8060000 }
59028 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
59031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59032 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8260000 }
59034 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
59037 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59038 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8360000 }
59040 /* cmp.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
59043 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59044 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8360000 }
59046 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59049 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59050 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0860000 }
59052 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
59055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59056 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a60000 }
59058 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
59061 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59062 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b60000 }
59064 /* cmp.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
59067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59068 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b60000 }
59070 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59074 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0060000 }
59076 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
59079 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59080 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0260000 }
59082 /* cmp.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
59085 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59086 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0360000 }
59088 /* cmp.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
59091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59092 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0360000 }
59094 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59097 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59098 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2060000 }
59100 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59104 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2260000 }
59106 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59109 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59110 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2360000 }
59112 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
59115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59116 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2360000 }
59118 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59121 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59122 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4060000 }
59124 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59128 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4260000 }
59130 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59133 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59134 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4360000 }
59136 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
59139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59140 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4360000 }
59142 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59146 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6060000 }
59148 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59152 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6260000 }
59154 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59157 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59158 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6360000 }
59160 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
59163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59164 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6360000 }
59166 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
59169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59170 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2860000 }
59172 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59176 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a60000 }
59178 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
59181 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59182 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b60000 }
59184 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59188 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b60000 }
59190 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
59193 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59194 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4860000 }
59196 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59200 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a60000 }
59202 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
59205 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59206 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b60000 }
59208 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59211 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59212 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b60000 }
59214 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
59217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59218 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c60000 }
59220 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59224 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e60000 }
59226 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
59229 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59230 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f60000 }
59232 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59236 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f60000 }
59238 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
59241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59242 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c60000 }
59244 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
59247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59248 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e60000 }
59250 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
59253 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59254 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f60000 }
59256 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
59259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59260 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f60000 }
59262 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
59265 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
59266 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c60000 }
59268 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59272 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e60000 }
59274 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
59277 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59278 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f60000 }
59280 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
59283 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
59284 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f60000 }
59286 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
59289 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
59290 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6860000 }
59292 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
59295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59296 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a60000 }
59298 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
59301 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59302 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b60000 }
59304 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
59307 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
59308 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b60000 }
59310 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59313 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59314 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8060000 }
59316 /* cmp.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
59319 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59320 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8260000 }
59322 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59326 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0860000 }
59328 /* cmp.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
59331 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59332 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a60000 }
59334 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59337 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59338 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0060000 }
59340 /* cmp.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
59343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59344 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0260000 }
59346 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
59349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59350 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2060000 }
59352 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
59355 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59356 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2260000 }
59358 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
59361 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59362 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4060000 }
59364 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
59367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59368 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4260000 }
59370 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
59373 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59374 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6060000 }
59376 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
59379 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59380 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6260000 }
59382 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
59385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59386 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2860000 }
59388 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
59391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59392 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a60000 }
59394 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
59397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59398 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4860000 }
59400 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
59403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59404 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a60000 }
59406 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
59409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59410 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c60000 }
59412 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
59415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59416 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e60000 }
59418 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
59421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59422 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c60000 }
59424 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
59427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59428 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e60000 }
59430 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
59433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
59434 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c60000 }
59436 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
59439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
59440 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e60000 }
59442 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
59445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
59446 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6860000 }
59448 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
59451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
59452 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a60000 }
59454 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
59457 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59458 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc806 }
59460 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
59463 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59464 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8826 }
59466 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59469 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59470 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8806 }
59472 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
59475 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59476 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc086 }
59478 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
59481 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59482 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a6 }
59484 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59487 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59488 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8086 }
59490 /* cmp.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
59493 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59494 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc006 }
59496 /* cmp.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
59499 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59500 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8026 }
59502 /* cmp.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59505 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59506 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8006 }
59508 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59511 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59512 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20600 }
59514 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59517 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59518 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822600 }
59520 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
59523 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59524 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820600 }
59526 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59529 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59530 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4060000 }
59532 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59535 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59536 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84260000 }
59538 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
59541 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59542 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84060000 }
59544 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59547 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59548 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6060000 }
59550 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59553 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59554 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86260000 }
59556 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
59559 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59560 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86060000 }
59562 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
59565 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59566 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28600 }
59568 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
59571 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59572 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a600 }
59574 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
59577 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59578 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828600 }
59580 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
59583 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59584 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4860000 }
59586 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
59589 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59590 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a60000 }
59592 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
59595 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59596 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84860000 }
59598 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
59601 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59602 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c600 }
59604 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
59607 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59608 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e600 }
59610 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
59613 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59614 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c600 }
59616 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
59619 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59620 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c60000 }
59622 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
59625 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59626 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e60000 }
59628 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
59631 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59632 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c60000 }
59634 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
59637 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59638 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c60000 }
59640 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
59643 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59644 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e60000 }
59646 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
59649 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
59650 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c60000 }
59652 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
59655 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59656 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6860000 }
59658 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
59661 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59662 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a60000 }
59664 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
59667 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
59668 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86860000 }
59670 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
59673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59674 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xc18000 }
59676 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
59679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59680 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1a000 }
59682 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
59685 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59686 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xc1b000 }
59688 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
59691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59692 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xc18400 }
59694 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
59697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59698 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xc1a400 }
59700 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
59703 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59704 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xc1b400 }
59706 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
59709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59710 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xc18600 }
59712 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
59715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59716 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1a600 }
59718 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
59721 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59722 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xc1b600 }
59724 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
59727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59728 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1880000 }
59730 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
59733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59734 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1a80000 }
59736 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
59739 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59740 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1b80000 }
59742 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
59745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59746 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xc18c0000 }
59748 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
59751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59752 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1ac0000 }
59754 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
59757 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59758 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1bc0000 }
59760 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
59763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59764 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc18a0000 }
59766 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
59769 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59770 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1aa0000 }
59772 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
59775 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59776 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1ba0000 }
59778 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
59781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59782 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc18e0000 }
59784 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
59787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59788 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1ae0000 }
59790 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
59793 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59794 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1be0000 }
59796 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
59799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59800 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc18b0000 }
59802 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
59805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59806 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1ab0000 }
59808 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
59811 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59812 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1bb0000 }
59814 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
59817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
59818 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xc18f0000 }
59820 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
59823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59824 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1af0000 }
59826 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59829 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59830 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1bf0000 }
59832 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
59835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59836 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xc1c00000 }
59838 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
59841 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59842 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1e00000 }
59844 /* cmp.w${G} ${Dsp-16-u16},$Dst16RnHI */
59847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
59848 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xc1f00000 }
59850 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
59853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59854 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xc1c40000 }
59856 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
59859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59860 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xc1e40000 }
59862 /* cmp.w${G} ${Dsp-16-u16},$Dst16AnHI */
59865 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
59866 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xc1f40000 }
59868 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
59871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59872 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xc1c60000 }
59874 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
59877 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59878 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1e60000 }
59880 /* cmp.w${G} ${Dsp-16-u16},[$Dst16An] */
59883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
59884 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xc1f60000 }
59886 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
59889 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59890 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1c80000 }
59892 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
59895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59896 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1e80000 }
59898 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
59901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59902 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xc1f80000 }
59904 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
59907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59908 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1cc0000 }
59910 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
59913 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59914 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1ec0000 }
59916 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
59919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59920 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xc1fc0000 }
59922 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
59925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59926 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ca0000 }
59928 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59932 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ea0000 }
59934 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59937 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59938 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xc1fa0000 }
59940 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
59943 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59944 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ce0000 }
59946 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59950 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ee0000 }
59952 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59956 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xc1fe0000 }
59958 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
59961 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59962 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1cb0000 }
59964 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59968 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1eb0000 }
59970 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59973 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59974 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xc1fb0000 }
59976 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
59979 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
59980 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xc1cf0000 }
59982 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59985 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59986 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xc1ef0000 }
59988 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
59991 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
59992 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xc1ff0000 }
59994 /* cmp.w${G} $Src16RnHI,$Dst16RnHI */
59997 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
59998 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xc100 }
60000 /* cmp.w${G} $Src16AnHI,$Dst16RnHI */
60003 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
60004 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xc140 }
60006 /* cmp.w${G} [$Src16An],$Dst16RnHI */
60009 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
60010 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xc160 }
60012 /* cmp.w${G} $Src16RnHI,$Dst16AnHI */
60015 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
60016 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xc104 }
60018 /* cmp.w${G} $Src16AnHI,$Dst16AnHI */
60021 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
60022 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xc144 }
60024 /* cmp.w${G} [$Src16An],$Dst16AnHI */
60027 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
60028 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xc164 }
60030 /* cmp.w${G} $Src16RnHI,[$Dst16An] */
60033 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60034 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xc106 }
60036 /* cmp.w${G} $Src16AnHI,[$Dst16An] */
60039 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60040 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xc146 }
60042 /* cmp.w${G} [$Src16An],[$Dst16An] */
60045 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60046 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xc166 }
60048 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
60051 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60052 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xc10800 }
60054 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
60057 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60058 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xc14800 }
60060 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60063 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60064 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xc16800 }
60066 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
60069 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60070 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xc10c0000 }
60072 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
60075 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60076 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xc14c0000 }
60078 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60081 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60082 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xc16c0000 }
60084 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
60087 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60088 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc10a00 }
60090 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
60093 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60094 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc14a00 }
60096 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[sb] */
60099 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60100 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xc16a00 }
60102 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
60105 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60106 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc10e0000 }
60108 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
60111 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60112 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc14e0000 }
60114 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[sb] */
60117 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60118 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xc16e0000 }
60120 /* cmp.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
60123 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60124 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc10b00 }
60126 /* cmp.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
60129 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60130 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc14b00 }
60132 /* cmp.w${G} [$Src16An],${Dsp-16-s8}[fb] */
60135 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60136 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xc16b00 }
60138 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16} */
60141 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
60142 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xc10f0000 }
60144 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16} */
60147 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
60148 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xc14f0000 }
60150 /* cmp.w${G} [$Src16An],${Dsp-16-u16} */
60153 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60154 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xc16f0000 }
60156 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
60159 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60160 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xc08000 }
60162 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
60165 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60166 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0a000 }
60168 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
60171 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60172 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xc0b000 }
60174 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
60177 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60178 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xc08400 }
60180 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
60183 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60184 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xc0a400 }
60186 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
60189 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60190 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xc0b400 }
60192 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
60195 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60196 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xc08600 }
60198 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
60201 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60202 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0a600 }
60204 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
60207 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60208 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xc0b600 }
60210 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
60213 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60214 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0880000 }
60216 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
60219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60220 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0a80000 }
60222 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
60225 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60226 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0b80000 }
60228 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
60231 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60232 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xc08c0000 }
60234 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
60237 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60238 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0ac0000 }
60240 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
60243 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60244 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0bc0000 }
60246 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
60249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60250 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc08a0000 }
60252 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
60255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60256 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0aa0000 }
60258 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
60261 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60262 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0ba0000 }
60264 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
60267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60268 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc08e0000 }
60270 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
60273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60274 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0ae0000 }
60276 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
60279 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60280 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0be0000 }
60282 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
60285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60286 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc08b0000 }
60288 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
60291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60292 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0ab0000 }
60294 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
60297 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60298 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0bb0000 }
60300 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
60303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
60304 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xc08f0000 }
60306 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
60309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60310 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0af0000 }
60312 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
60315 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60316 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0bf0000 }
60318 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
60321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60322 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xc0c00000 }
60324 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
60327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60328 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0e00000 }
60330 /* cmp.b${G} ${Dsp-16-u16},$Dst16RnQI */
60333 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
60334 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xc0f00000 }
60336 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
60339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60340 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xc0c40000 }
60342 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
60345 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60346 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xc0e40000 }
60348 /* cmp.b${G} ${Dsp-16-u16},$Dst16AnQI */
60351 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
60352 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xc0f40000 }
60354 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
60357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60358 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xc0c60000 }
60360 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
60363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60364 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0e60000 }
60366 /* cmp.b${G} ${Dsp-16-u16},[$Dst16An] */
60369 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
60370 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xc0f60000 }
60372 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
60375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60376 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0c80000 }
60378 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
60381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60382 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0e80000 }
60384 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
60387 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60388 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xc0f80000 }
60390 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
60393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60394 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0cc0000 }
60396 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
60399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60400 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0ec0000 }
60402 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
60405 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60406 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xc0fc0000 }
60408 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
60411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60412 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ca0000 }
60414 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
60417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60418 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ea0000 }
60420 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
60423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60424 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xc0fa0000 }
60426 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
60429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60430 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ce0000 }
60432 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
60435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60436 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ee0000 }
60438 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
60441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60442 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xc0fe0000 }
60444 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
60447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60448 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0cb0000 }
60450 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
60453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60454 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0eb0000 }
60456 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
60459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60460 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xc0fb0000 }
60462 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
60465 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
60466 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xc0cf0000 }
60468 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
60471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
60472 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xc0ef0000 }
60474 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
60477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
60478 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xc0ff0000 }
60480 /* cmp.b${G} $Src16RnQI,$Dst16RnQI */
60483 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
60484 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xc000 }
60486 /* cmp.b${G} $Src16AnQI,$Dst16RnQI */
60489 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
60490 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xc040 }
60492 /* cmp.b${G} [$Src16An],$Dst16RnQI */
60495 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60496 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xc060 }
60498 /* cmp.b${G} $Src16RnQI,$Dst16AnQI */
60501 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
60502 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xc004 }
60504 /* cmp.b${G} $Src16AnQI,$Dst16AnQI */
60507 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
60508 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xc044 }
60510 /* cmp.b${G} [$Src16An],$Dst16AnQI */
60513 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60514 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xc064 }
60516 /* cmp.b${G} $Src16RnQI,[$Dst16An] */
60519 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60520 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xc006 }
60522 /* cmp.b${G} $Src16AnQI,[$Dst16An] */
60525 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60526 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xc046 }
60528 /* cmp.b${G} [$Src16An],[$Dst16An] */
60531 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60532 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xc066 }
60534 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
60537 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60538 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xc00800 }
60540 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
60543 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60544 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xc04800 }
60546 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60549 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60550 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xc06800 }
60552 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
60555 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60556 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xc00c0000 }
60558 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
60561 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60562 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xc04c0000 }
60564 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60567 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60568 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xc06c0000 }
60570 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
60573 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60574 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc00a00 }
60576 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
60579 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60580 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc04a00 }
60582 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[sb] */
60585 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60586 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xc06a00 }
60588 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
60591 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60592 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc00e0000 }
60594 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
60597 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60598 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc04e0000 }
60600 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[sb] */
60603 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60604 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xc06e0000 }
60606 /* cmp.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
60609 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60610 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc00b00 }
60612 /* cmp.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
60615 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60616 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc04b00 }
60618 /* cmp.b${G} [$Src16An],${Dsp-16-s8}[fb] */
60621 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60622 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xc06b00 }
60624 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16} */
60627 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
60628 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xc00f0000 }
60630 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16} */
60633 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
60634 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xc04f0000 }
60636 /* cmp.b${G} [$Src16An],${Dsp-16-u16} */
60639 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60640 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xc06f0000 }
60642 /* cmp.b${S} #${Imm-8-QI},r0l */
60645 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
60646 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xe400 }
60648 /* cmp.b${S} #${Imm-8-QI},r0h */
60651 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
60652 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xe300 }
60654 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
60657 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60658 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xe50000 }
60660 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
60663 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60664 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xe60000 }
60666 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u16} */
60669 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
60670 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xe7000000 }
60672 /* cmp.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
60675 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60676 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe910 }
60678 /* cmp.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
60681 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60682 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe190 }
60684 /* cmp.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60687 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60688 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe110 }
60690 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60693 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60694 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe31000 }
60696 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60699 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60700 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5100000 }
60702 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60705 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60706 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7100000 }
60708 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60711 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60712 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe39000 }
60714 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60717 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60718 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5900000 }
60720 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60723 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60724 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3d000 }
60726 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60729 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60730 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5d00000 }
60732 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
60735 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60736 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7d00000 }
60738 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
60741 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60742 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7900000 }
60744 /* cmp.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
60747 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
60748 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe810 }
60750 /* cmp.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
60753 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
60754 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe090 }
60756 /* cmp.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60759 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60760 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe010 }
60762 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60765 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60766 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe21000 }
60768 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60771 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60772 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4100000 }
60774 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60777 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60778 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6100000 }
60780 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60783 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60784 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe29000 }
60786 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60789 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60790 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4900000 }
60792 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60795 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60796 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2d000 }
60798 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60801 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60802 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4d00000 }
60804 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
60807 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60808 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6d00000 }
60810 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
60813 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60814 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6900000 }
60816 /* cmp.w${Q} #${Imm-8-s4},$Dst16RnHI */
60819 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
60820 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd100 }
60822 /* cmp.w${Q} #${Imm-8-s4},$Dst16AnHI */
60825 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
60826 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd104 }
60828 /* cmp.w${Q} #${Imm-8-s4},[$Dst16An] */
60831 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60832 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd106 }
60834 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60837 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60838 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd10800 }
60840 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60843 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60844 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd10c0000 }
60846 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60849 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60850 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd10a00 }
60852 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60855 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60856 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd10e0000 }
60858 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60861 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60862 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd10b00 }
60864 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
60867 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60868 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd10f0000 }
60870 /* cmp.b${Q} #${Imm-8-s4},$Dst16RnQI */
60873 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
60874 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd000 }
60876 /* cmp.b${Q} #${Imm-8-s4},$Dst16AnQI */
60879 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
60880 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd004 }
60882 /* cmp.b${Q} #${Imm-8-s4},[$Dst16An] */
60885 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60886 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd006 }
60888 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60891 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60892 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd00800 }
60894 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60897 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60898 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd00c0000 }
60900 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60903 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60904 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd00a00 }
60906 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60909 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60910 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd00e0000 }
60912 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60915 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60916 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd00b00 }
60918 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
60921 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60922 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd00f0000 }
60924 /* cmp.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
60927 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60928 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992e0000 }
60930 /* cmp.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
60933 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60934 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91ae0000 }
60936 /* cmp.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
60939 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60940 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912e0000 }
60942 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60945 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60946 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932e0000 }
60948 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
60951 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60952 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93ae0000 }
60954 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
60957 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60958 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ee0000 }
60960 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60963 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60964 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952e0000 }
60966 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
60969 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60970 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95ae0000 }
60972 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
60975 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60976 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ee0000 }
60978 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
60981 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
60982 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ee0000 }
60984 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60987 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60988 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972e0000 }
60990 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24} */
60993 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
60994 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97ae0000 }
60996 /* cmp.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
60999 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
61000 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982e00 }
61002 /* cmp.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
61005 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
61006 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90ae00 }
61008 /* cmp.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
61011 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61012 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902e00 }
61014 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61017 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61018 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922e0000 }
61020 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61023 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61024 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92ae0000 }
61026 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61029 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61030 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ee0000 }
61032 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61035 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61036 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942e0000 }
61038 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61041 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61042 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94ae0000 }
61044 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
61047 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61048 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ee0000 }
61050 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61053 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61054 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ee0000 }
61056 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61059 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61060 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962e0000 }
61062 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24} */
61065 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
61066 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96ae0000 }
61068 /* cmp.w${G} #${Imm-16-HI},$Dst16RnHI */
61071 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
61072 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77800000 }
61074 /* cmp.w${G} #${Imm-16-HI},$Dst16AnHI */
61077 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
61078 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77840000 }
61080 /* cmp.w${G} #${Imm-16-HI},[$Dst16An] */
61083 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
61084 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77860000 }
61086 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
61089 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61090 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77880000 }
61092 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
61095 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61096 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x778a0000 }
61098 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
61101 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61102 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x778b0000 }
61104 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
61107 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61108 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x778c0000 }
61110 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
61113 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61114 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x778e0000 }
61116 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
61119 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
61120 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x778f0000 }
61122 /* cmp.b${G} #${Imm-16-QI},$Dst16RnQI */
61125 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
61126 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x768000 }
61128 /* cmp.b${G} #${Imm-16-QI},$Dst16AnQI */
61131 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
61132 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x768400 }
61134 /* cmp.b${G} #${Imm-16-QI},[$Dst16An] */
61137 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
61138 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x768600 }
61140 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
61143 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61144 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76880000 }
61146 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61149 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61150 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x768a0000 }
61152 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61155 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61156 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x768b0000 }
61158 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
61161 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61162 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x768c0000 }
61164 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61167 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61168 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x768e0000 }
61170 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61173 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61174 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x768f0000 }
61176 /* cmp.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
61179 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
61180 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa8310000 }
61182 /* cmp.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
61185 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
61186 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0b10000 }
61188 /* cmp.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
61191 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61192 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa0310000 }
61194 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61197 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61198 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2310000 }
61200 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
61203 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61204 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2b10000 }
61206 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
61209 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61210 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2f10000 }
61212 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61215 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61216 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4310000 }
61218 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
61221 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61222 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4b10000 }
61224 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
61227 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61228 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4f10000 }
61230 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16} */
61233 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
61234 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6f10000 }
61236 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61239 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61240 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6310000 }
61242 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24} */
61245 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
61246 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6b10000 }
61248 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32RnPrefixedHI */
61251 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
61252 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893e00 }
61254 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32AnPrefixedHI */
61257 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
61258 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181be00 }
61260 /* clip.w #${Imm-24-HI},#${Imm-40-HI},[$Dst32AnPrefixed] */
61263 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61264 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813e00 }
61266 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61269 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61270 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833e00 }
61272 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[sb] */
61275 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61276 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183be00 }
61278 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-s8}[fb] */
61281 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61282 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183fe00 }
61284 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61287 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61288 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853e00 }
61290 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[sb] */
61293 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61294 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185be00 }
61296 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-s16}[fb] */
61299 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61300 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185fe00 }
61302 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16} */
61305 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), 0 } },
61306 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187fe00 }
61308 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61311 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61312 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873e00 }
61314 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24} */
61317 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), 0 } },
61318 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187be00 }
61320 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32RnPrefixedQI */
61323 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
61324 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883e00 }
61326 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32AnPrefixedQI */
61329 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
61330 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180be00 }
61332 /* clip.b #${Imm-24-QI},#${Imm-32-QI},[$Dst32AnPrefixed] */
61335 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61336 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803e00 }
61338 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61341 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61342 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823e00 }
61344 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[sb] */
61347 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61348 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182be00 }
61350 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-s8}[fb] */
61353 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61354 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182fe00 }
61356 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61359 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61360 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843e00 }
61362 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[sb] */
61365 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61366 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184be00 }
61368 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-s16}[fb] */
61371 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61372 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184fe00 }
61374 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16} */
61377 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), 0 } },
61378 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186fe00 }
61380 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61383 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61384 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863e00 }
61386 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24} */
61389 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), 0 } },
61390 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186be00 }
61392 /* bxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
61395 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
61396 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d828 }
61398 /* bxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
61401 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
61402 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a8 }
61404 /* bxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
61407 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61408 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d028 }
61410 /* bxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
61413 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61414 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22800 }
61416 /* bxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
61419 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61420 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42800 }
61422 /* bxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
61425 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61426 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62800 }
61428 /* bxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
61431 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
61432 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a800 }
61434 /* bxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
61437 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
61438 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a800 }
61440 /* bxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
61443 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61444 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e800 }
61446 /* bxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
61449 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61450 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e800 }
61452 /* bxor${X} ${BitBase32-24-u19-Prefixed} */
61455 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
61456 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e800 }
61458 /* bxor${X} ${BitBase32-24-u27-Prefixed} */
61461 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
61462 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a800 }
61464 /* bxor${X} $Bitno16R,$Bit16Rn */
61467 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61468 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ec000 }
61470 /* bxor${X} $Bitno16R,$Bit16An */
61473 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61474 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ec400 }
61476 /* bxor${X} [$Bit16An] */
61479 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61480 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ec6 }
61482 /* bxor${X} ${Dsp-16-u8}[$Bit16An] */
61485 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61486 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ec800 }
61488 /* bxor${X} ${Dsp-16-u16}[$Bit16An] */
61491 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61492 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ecc0000 }
61494 /* bxor${X} ${BitBase16-16-u8}[sb] */
61497 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61498 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eca00 }
61500 /* bxor${X} ${BitBase16-16-u16}[sb] */
61503 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61504 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ece0000 }
61506 /* bxor${X} ${BitBase16-16-s8}[fb] */
61509 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61510 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ecb00 }
61512 /* bxor${X} ${BitBase16-16-u16} */
61515 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61516 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ecf0000 }
61518 /* btsts${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61521 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61522 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd828 }
61524 /* btsts${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61527 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61528 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a8 }
61530 /* btsts${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61533 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61534 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd028 }
61536 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61539 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61540 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22800 }
61542 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61545 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61546 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4280000 }
61548 /* btsts${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61551 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61552 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6280000 }
61554 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61557 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61558 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a800 }
61560 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61563 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61564 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a80000 }
61566 /* btsts${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61569 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61570 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e800 }
61572 /* btsts${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61575 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61576 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e80000 }
61578 /* btsts${X} ${BitBase32-16-u19-Unprefixed} */
61581 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61582 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e80000 }
61584 /* btsts${X} ${BitBase32-16-u27-Unprefixed} */
61587 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61588 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a80000 }
61590 /* btsts${X} $Bitno16R,$Bit16Rn */
61593 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61594 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e1000 }
61596 /* btsts${X} $Bitno16R,$Bit16An */
61599 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61600 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e1400 }
61602 /* btsts${X} [$Bit16An] */
61605 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61606 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e16 }
61608 /* btsts${X} ${Dsp-16-u8}[$Bit16An] */
61611 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61612 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e1800 }
61614 /* btsts${X} ${Dsp-16-u16}[$Bit16An] */
61617 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61618 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e1c0000 }
61620 /* btsts${X} ${BitBase16-16-u8}[sb] */
61623 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61624 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e1a00 }
61626 /* btsts${X} ${BitBase16-16-u16}[sb] */
61629 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61630 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e1e0000 }
61632 /* btsts${X} ${BitBase16-16-s8}[fb] */
61635 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61636 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e1b00 }
61638 /* btsts${X} ${BitBase16-16-u16} */
61641 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61642 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e1f0000 }
61644 /* btstc${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61647 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61648 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd820 }
61650 /* btstc${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61653 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61654 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a0 }
61656 /* btstc${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61659 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61660 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd020 }
61662 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61665 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61666 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22000 }
61668 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61671 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61672 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4200000 }
61674 /* btstc${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61677 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61678 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6200000 }
61680 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61683 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61684 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a000 }
61686 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61689 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61690 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a00000 }
61692 /* btstc${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61695 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61696 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e000 }
61698 /* btstc${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61701 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61702 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e00000 }
61704 /* btstc${X} ${BitBase32-16-u19-Unprefixed} */
61707 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61708 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e00000 }
61710 /* btstc${X} ${BitBase32-16-u27-Unprefixed} */
61713 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61714 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a00000 }
61716 /* btstc${X} $Bitno16R,$Bit16Rn */
61719 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61720 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e0000 }
61722 /* btstc${X} $Bitno16R,$Bit16An */
61725 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61726 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e0400 }
61728 /* btstc${X} [$Bit16An] */
61731 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61732 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e06 }
61734 /* btstc${X} ${Dsp-16-u8}[$Bit16An] */
61737 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61738 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e0800 }
61740 /* btstc${X} ${Dsp-16-u16}[$Bit16An] */
61743 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61744 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e0c0000 }
61746 /* btstc${X} ${BitBase16-16-u8}[sb] */
61749 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61750 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e0a00 }
61752 /* btstc${X} ${BitBase16-16-u16}[sb] */
61755 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61756 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e0e0000 }
61758 /* btstc${X} ${BitBase16-16-s8}[fb] */
61761 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61762 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e0b00 }
61764 /* btstc${X} ${BitBase16-16-u16} */
61767 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61768 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e0f0000 }
61770 /* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61773 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61774 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd800 }
61776 /* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61779 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61780 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd080 }
61782 /* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61785 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61786 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd000 }
61788 /* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61791 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61792 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd20000 }
61794 /* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61797 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61798 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4000000 }
61800 /* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61803 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61804 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6000000 }
61806 /* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
61809 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61810 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd28000 }
61812 /* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
61815 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61816 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4800000 }
61818 /* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
61821 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61822 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2c000 }
61824 /* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
61827 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61828 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4c00000 }
61830 /* btst${G} ${BitBase32-16-u19-Unprefixed} */
61833 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61834 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6c00000 }
61836 /* btst${G} ${BitBase32-16-u27-Unprefixed} */
61839 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61840 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6800000 }
61842 /* btst${G} $Bitno16R,$Bit16Rn */
61845 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61846 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7eb000 }
61848 /* btst${G} $Bitno16R,$Bit16An */
61851 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61852 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7eb400 }
61854 /* btst${G} ${Dsp-16-u8}[$Bit16An] */
61857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61858 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7eb800 }
61860 /* btst${G} ${BitBase16-16-u8}[sb] */
61863 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61864 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eba00 }
61866 /* btst${G} ${BitBase16-16-s8}[fb] */
61869 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61870 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ebb00 }
61872 /* btst${S} ${BitBase16-8-u11-S}[sb] */
61875 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
61876 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5800 }
61878 /* btst${G} ${Dsp-16-u16}[$Bit16An] */
61881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61882 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ebc0000 }
61884 /* btst${G} ${BitBase16-16-u16}[sb] */
61887 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61888 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ebe0000 }
61890 /* btst${G} ${BitBase16-16-u16} */
61893 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
61894 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ebf0000 }
61896 /* btst${G} [$Bit16An] */
61899 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61900 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7eb6 }
61902 /* bset${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61905 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61906 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd838 }
61908 /* bset${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61911 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61912 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b8 }
61914 /* bset${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61917 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61918 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd038 }
61920 /* bset${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61923 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61924 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23800 }
61926 /* bset${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61929 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61930 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4380000 }
61932 /* bset${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61935 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61936 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6380000 }
61938 /* bset${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61941 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61942 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b800 }
61944 /* bset${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61947 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61948 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b80000 }
61950 /* bset${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61953 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61954 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f800 }
61956 /* bset${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61959 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61960 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f80000 }
61962 /* bset${X} ${BitBase32-16-u19-Unprefixed} */
61965 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61966 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f80000 }
61968 /* bset${X} ${BitBase32-16-u27-Unprefixed} */
61971 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61972 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b80000 }
61974 /* bset${G} $Bitno16R,$Bit16Rn */
61977 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61978 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e9000 }
61980 /* bset${G} $Bitno16R,$Bit16An */
61983 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61984 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e9400 }
61986 /* bset${G} ${Dsp-16-u8}[$Bit16An] */
61989 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61990 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e9800 }
61992 /* bset${G} ${BitBase16-16-u8}[sb] */
61995 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61996 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e9a00 }
61998 /* bset${G} ${BitBase16-16-s8}[fb] */
62001 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62002 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e9b00 }
62004 /* bset${S} ${BitBase16-8-u11-S}[sb] */
62007 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62008 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4800 }
62010 /* bset${G} ${Dsp-16-u16}[$Bit16An] */
62013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62014 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e9c0000 }
62016 /* bset${G} ${BitBase16-16-u16}[sb] */
62019 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62020 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e9e0000 }
62022 /* bset${G} ${BitBase16-16-u16} */
62025 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62026 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e9f0000 }
62028 /* bset${G} [$Bit16An] */
62031 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62032 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e96 }
62034 /* bor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62037 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62038 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d820 }
62040 /* bor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62043 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62044 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a0 }
62046 /* bor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62049 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62050 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d020 }
62052 /* bor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62055 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62056 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22000 }
62058 /* bor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62061 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62062 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42000 }
62064 /* bor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62067 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62068 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62000 }
62070 /* bor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62073 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62074 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a000 }
62076 /* bor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62079 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62080 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a000 }
62082 /* bor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62085 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62086 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e000 }
62088 /* bor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62091 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62092 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e000 }
62094 /* bor${X} ${BitBase32-24-u19-Prefixed} */
62097 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62098 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e000 }
62100 /* bor${X} ${BitBase32-24-u27-Prefixed} */
62103 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62104 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a000 }
62106 /* bor${X} $Bitno16R,$Bit16Rn */
62109 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62110 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e6000 }
62112 /* bor${X} $Bitno16R,$Bit16An */
62115 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62116 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e6400 }
62118 /* bor${X} [$Bit16An] */
62121 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62122 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e66 }
62124 /* bor${X} ${Dsp-16-u8}[$Bit16An] */
62127 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62128 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e6800 }
62130 /* bor${X} ${Dsp-16-u16}[$Bit16An] */
62133 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62134 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e6c0000 }
62136 /* bor${X} ${BitBase16-16-u8}[sb] */
62139 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62140 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e6a00 }
62142 /* bor${X} ${BitBase16-16-u16}[sb] */
62145 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62146 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e6e0000 }
62148 /* bor${X} ${BitBase16-16-s8}[fb] */
62151 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62152 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e6b00 }
62154 /* bor${X} ${BitBase16-16-u16} */
62157 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62158 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e6f0000 }
62160 /* bnxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62163 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62164 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d838 }
62166 /* bnxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62169 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62170 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b8 }
62172 /* bnxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62175 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62176 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d038 }
62178 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62181 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62182 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23800 }
62184 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62187 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62188 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43800 }
62190 /* bnxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62193 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62194 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63800 }
62196 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62199 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62200 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b800 }
62202 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62205 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62206 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b800 }
62208 /* bnxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62211 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62212 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f800 }
62214 /* bnxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62217 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62218 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f800 }
62220 /* bnxor${X} ${BitBase32-24-u19-Prefixed} */
62223 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62224 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f800 }
62226 /* bnxor${X} ${BitBase32-24-u27-Prefixed} */
62229 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62230 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b800 }
62232 /* bnxor${X} $Bitno16R,$Bit16Rn */
62235 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62236 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ed000 }
62238 /* bnxor${X} $Bitno16R,$Bit16An */
62241 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62242 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ed400 }
62244 /* bnxor${X} [$Bit16An] */
62247 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62248 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ed6 }
62250 /* bnxor${X} ${Dsp-16-u8}[$Bit16An] */
62253 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62254 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ed800 }
62256 /* bnxor${X} ${Dsp-16-u16}[$Bit16An] */
62259 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62260 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7edc0000 }
62262 /* bnxor${X} ${BitBase16-16-u8}[sb] */
62265 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62266 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eda00 }
62268 /* bnxor${X} ${BitBase16-16-u16}[sb] */
62271 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62272 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ede0000 }
62274 /* bnxor${X} ${BitBase16-16-s8}[fb] */
62277 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62278 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7edb00 }
62280 /* bnxor${X} ${BitBase16-16-u16} */
62283 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62284 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7edf0000 }
62286 /* bntst${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62289 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62290 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d800 }
62292 /* bntst${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62295 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62296 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d080 }
62298 /* bntst${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62301 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62302 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d000 }
62304 /* bntst${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62307 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62308 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20000 }
62310 /* bntst${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62313 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62314 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40000 }
62316 /* bntst${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62319 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62320 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60000 }
62322 /* bntst${X} ${BitBase32-24-u11-Prefixed}[sb] */
62325 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62326 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28000 }
62328 /* bntst${X} ${BitBase32-24-u19-Prefixed}[sb] */
62331 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62332 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48000 }
62334 /* bntst${X} ${BitBase32-24-s11-Prefixed}[fb] */
62337 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62338 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c000 }
62340 /* bntst${X} ${BitBase32-24-s19-Prefixed}[fb] */
62343 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62344 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c000 }
62346 /* bntst${X} ${BitBase32-24-u19-Prefixed} */
62349 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62350 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c000 }
62352 /* bntst${X} ${BitBase32-24-u27-Prefixed} */
62355 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62356 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68000 }
62358 /* bntst${X} $Bitno16R,$Bit16Rn */
62361 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62362 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e3000 }
62364 /* bntst${X} $Bitno16R,$Bit16An */
62367 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62368 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e3400 }
62370 /* bntst${X} [$Bit16An] */
62373 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62374 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e36 }
62376 /* bntst${X} ${Dsp-16-u8}[$Bit16An] */
62379 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62380 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e3800 }
62382 /* bntst${X} ${Dsp-16-u16}[$Bit16An] */
62385 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62386 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e3c0000 }
62388 /* bntst${X} ${BitBase16-16-u8}[sb] */
62391 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62392 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e3a00 }
62394 /* bntst${X} ${BitBase16-16-u16}[sb] */
62397 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62398 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e3e0000 }
62400 /* bntst${X} ${BitBase16-16-s8}[fb] */
62403 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62404 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e3b00 }
62406 /* bntst${X} ${BitBase16-16-u16} */
62409 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62410 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e3f0000 }
62412 /* bnot${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62415 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62416 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd818 }
62418 /* bnot${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62421 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62422 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd098 }
62424 /* bnot${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62427 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62428 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd018 }
62430 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62433 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62434 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd21800 }
62436 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62439 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62440 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4180000 }
62442 /* bnot${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62445 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62446 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6180000 }
62448 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[sb] */
62451 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62452 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd29800 }
62454 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[sb] */
62457 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62458 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4980000 }
62460 /* bnot${X} ${BitBase32-16-s11-Unprefixed}[fb] */
62463 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62464 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d800 }
62466 /* bnot${X} ${BitBase32-16-s19-Unprefixed}[fb] */
62469 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62470 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d80000 }
62472 /* bnot${X} ${BitBase32-16-u19-Unprefixed} */
62475 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62476 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6d80000 }
62478 /* bnot${X} ${BitBase32-16-u27-Unprefixed} */
62481 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62482 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6980000 }
62484 /* bnot${G} $Bitno16R,$Bit16Rn */
62487 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62488 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ea000 }
62490 /* bnot${G} $Bitno16R,$Bit16An */
62493 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62494 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ea400 }
62496 /* bnot${G} ${Dsp-16-u8}[$Bit16An] */
62499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62500 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ea800 }
62502 /* bnot${G} ${BitBase16-16-u8}[sb] */
62505 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62506 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eaa00 }
62508 /* bnot${G} ${BitBase16-16-s8}[fb] */
62511 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62512 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7eab00 }
62514 /* bnot${S} ${BitBase16-8-u11-S}[sb] */
62517 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62518 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5000 }
62520 /* bnot${G} ${Dsp-16-u16}[$Bit16An] */
62523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62524 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7eac0000 }
62526 /* bnot${G} ${BitBase16-16-u16}[sb] */
62529 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62530 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7eae0000 }
62532 /* bnot${G} ${BitBase16-16-u16} */
62535 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62536 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7eaf0000 }
62538 /* bnot${G} [$Bit16An] */
62541 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62542 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ea6 }
62544 /* bnor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62547 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62548 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d830 }
62550 /* bnor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62553 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62554 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b0 }
62556 /* bnor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62559 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62560 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d030 }
62562 /* bnor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62565 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62566 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23000 }
62568 /* bnor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62571 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62572 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43000 }
62574 /* bnor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62577 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62578 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63000 }
62580 /* bnor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62583 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62584 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b000 }
62586 /* bnor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62589 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62590 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b000 }
62592 /* bnor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62595 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62596 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f000 }
62598 /* bnor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62601 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62602 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f000 }
62604 /* bnor${X} ${BitBase32-24-u19-Prefixed} */
62607 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62608 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f000 }
62610 /* bnor${X} ${BitBase32-24-u27-Prefixed} */
62613 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62614 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b000 }
62616 /* bnor${X} $Bitno16R,$Bit16Rn */
62619 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62620 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e7000 }
62622 /* bnor${X} $Bitno16R,$Bit16An */
62625 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62626 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e7400 }
62628 /* bnor${X} [$Bit16An] */
62631 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62632 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e76 }
62634 /* bnor${X} ${Dsp-16-u8}[$Bit16An] */
62637 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62638 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e7800 }
62640 /* bnor${X} ${Dsp-16-u16}[$Bit16An] */
62643 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62644 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e7c0000 }
62646 /* bnor${X} ${BitBase16-16-u8}[sb] */
62649 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62650 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e7a00 }
62652 /* bnor${X} ${BitBase16-16-u16}[sb] */
62655 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62656 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e7e0000 }
62658 /* bnor${X} ${BitBase16-16-s8}[fb] */
62661 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62662 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e7b00 }
62664 /* bnor${X} ${BitBase16-16-u16} */
62667 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62668 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e7f0000 }
62670 /* bnand${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62673 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62674 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d818 }
62676 /* bnand${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62679 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62680 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d098 }
62682 /* bnand${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62685 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62686 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d018 }
62688 /* bnand${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62691 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62692 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d21800 }
62694 /* bnand${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62697 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62698 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d41800 }
62700 /* bnand${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62703 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62704 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d61800 }
62706 /* bnand${X} ${BitBase32-24-u11-Prefixed}[sb] */
62709 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62710 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d29800 }
62712 /* bnand${X} ${BitBase32-24-u19-Prefixed}[sb] */
62715 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62716 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d49800 }
62718 /* bnand${X} ${BitBase32-24-s11-Prefixed}[fb] */
62721 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62722 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2d800 }
62724 /* bnand${X} ${BitBase32-24-s19-Prefixed}[fb] */
62727 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62728 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4d800 }
62730 /* bnand${X} ${BitBase32-24-u19-Prefixed} */
62733 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62734 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6d800 }
62736 /* bnand${X} ${BitBase32-24-u27-Prefixed} */
62739 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62740 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d69800 }
62742 /* bnand${X} $Bitno16R,$Bit16Rn */
62745 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62746 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e5000 }
62748 /* bnand${X} $Bitno16R,$Bit16An */
62751 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62752 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e5400 }
62754 /* bnand${X} [$Bit16An] */
62757 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62758 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e56 }
62760 /* bnand${X} ${Dsp-16-u8}[$Bit16An] */
62763 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62764 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e5800 }
62766 /* bnand${X} ${Dsp-16-u16}[$Bit16An] */
62769 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62770 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e5c0000 }
62772 /* bnand${X} ${BitBase16-16-u8}[sb] */
62775 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62776 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e5a00 }
62778 /* bnand${X} ${BitBase16-16-u16}[sb] */
62781 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62782 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e5e0000 }
62784 /* bnand${X} ${BitBase16-16-s8}[fb] */
62787 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62788 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e5b00 }
62790 /* bnand${X} ${BitBase16-16-u16} */
62793 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62794 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e5f0000 }
62796 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62799 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62800 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed
, { 0xd81000 }
62802 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62805 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62806 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed
, { 0xd09000 }
62808 /* bm${cond32-16} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62811 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62812 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed
, { 0xd01000 }
62814 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62817 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62818 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed
, { 0xd2100000 }
62820 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[sb] */
62823 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62824 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed
, { 0xd2900000 }
62826 /* bm${cond32-24} ${BitBase32-16-s11-Unprefixed}[fb] */
62829 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62830 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d00000 }
62832 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62835 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62836 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed
, { 0xd4100000 }
62838 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[sb] */
62841 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62842 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed
, { 0xd4900000 }
62844 /* bm${cond32-32} ${BitBase32-16-s19-Unprefixed}[fb] */
62847 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62848 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d00000 }
62850 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed} */
62853 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62854 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed
, { 0xd6d00000 }
62856 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62859 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62860 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed
, { 0xd6100000 }
62862 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed} */
62865 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62866 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed
, { 0xd6900000 }
62868 /* bm${cond16-24} $Bitno16R,$Bit16Rn */
62871 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62872 & ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct
, { 0x7e200000 }
62874 /* bm${cond16-24} $Bitno16R,$Bit16An */
62877 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62878 & ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct
, { 0x7e240000 }
62880 /* bm${cond16-24} ${Dsp-16-u8}[$Bit16An] */
62883 { { MNEM
, OP (COND16_24
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62884 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative
, { 0x7e280000 }
62886 /* bm${cond16-24} ${BitBase16-16-u8}[sb] */
62889 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62890 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative
, { 0x7e2a0000 }
62892 /* bm${cond16-24} ${BitBase16-16-s8}[fb] */
62895 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62896 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative
, { 0x7e2b0000 }
62898 /* bm${cond16-32} ${Dsp-16-u16}[$Bit16An] */
62901 { { MNEM
, OP (COND16_32
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62902 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative
, { 0x7e2c0000 }
62904 /* bm${cond16-32} ${BitBase16-16-u16}[sb] */
62907 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62908 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative
, { 0x7e2e0000 }
62910 /* bm${cond16-32} ${BitBase16-16-u16} */
62913 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), 0 } },
62914 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute
, { 0x7e2f0000 }
62916 /* bm${cond16-16} [$Bit16An] */
62919 { { MNEM
, OP (COND16_16
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62920 & ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect
, { 0x7e2600 }
62922 /* bitindex.w $Dst32RnUnprefixedHI */
62925 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
62926 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc92e }
62928 /* bitindex.w $Dst32AnUnprefixedHI */
62931 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
62932 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1ae }
62934 /* bitindex.w [$Dst32AnUnprefixed] */
62937 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62938 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc12e }
62940 /* bitindex.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
62943 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62944 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc32e00 }
62946 /* bitindex.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
62949 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62950 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc52e0000 }
62952 /* bitindex.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
62955 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62956 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc72e0000 }
62958 /* bitindex.w ${Dsp-16-u8}[sb] */
62961 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
62962 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3ae00 }
62964 /* bitindex.w ${Dsp-16-u16}[sb] */
62967 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
62968 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5ae0000 }
62970 /* bitindex.w ${Dsp-16-s8}[fb] */
62973 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
62974 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ee00 }
62976 /* bitindex.w ${Dsp-16-s16}[fb] */
62979 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
62980 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ee0000 }
62982 /* bitindex.w ${Dsp-16-u16} */
62985 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
62986 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ee0000 }
62988 /* bitindex.w ${Dsp-16-u24} */
62991 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
62992 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7ae0000 }
62994 /* bitindex.b $Dst32RnUnprefixedQI */
62997 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
62998 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc82e }
63000 /* bitindex.b $Dst32AnUnprefixedQI */
63003 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
63004 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0ae }
63006 /* bitindex.b [$Dst32AnUnprefixed] */
63009 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63010 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc02e }
63012 /* bitindex.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
63015 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63016 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22e00 }
63018 /* bitindex.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
63021 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63022 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc42e0000 }
63024 /* bitindex.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
63027 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63028 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc62e0000 }
63030 /* bitindex.b ${Dsp-16-u8}[sb] */
63033 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
63034 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2ae00 }
63036 /* bitindex.b ${Dsp-16-u16}[sb] */
63039 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
63040 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4ae0000 }
63042 /* bitindex.b ${Dsp-16-s8}[fb] */
63045 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
63046 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ee00 }
63048 /* bitindex.b ${Dsp-16-s16}[fb] */
63051 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
63052 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ee0000 }
63054 /* bitindex.b ${Dsp-16-u16} */
63057 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
63058 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ee0000 }
63060 /* bitindex.b ${Dsp-16-u24} */
63063 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
63064 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6ae0000 }
63066 /* bclr${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
63069 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
63070 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd830 }
63072 /* bclr${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
63075 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
63076 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b0 }
63078 /* bclr${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
63081 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63082 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd030 }
63084 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
63087 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63088 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23000 }
63090 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
63093 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63094 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4300000 }
63096 /* bclr${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
63099 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63100 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6300000 }
63102 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[sb] */
63105 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63106 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b000 }
63108 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[sb] */
63111 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63112 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b00000 }
63114 /* bclr${X} ${BitBase32-16-s11-Unprefixed}[fb] */
63117 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63118 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f000 }
63120 /* bclr${X} ${BitBase32-16-s19-Unprefixed}[fb] */
63123 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63124 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f00000 }
63126 /* bclr${X} ${BitBase32-16-u19-Unprefixed} */
63129 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
63130 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f00000 }
63132 /* bclr${X} ${BitBase32-16-u27-Unprefixed} */
63135 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
63136 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b00000 }
63138 /* bclr${G} $Bitno16R,$Bit16Rn */
63141 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63142 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e8000 }
63144 /* bclr${G} $Bitno16R,$Bit16An */
63147 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63148 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e8400 }
63150 /* bclr${G} ${Dsp-16-u8}[$Bit16An] */
63153 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63154 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e8800 }
63156 /* bclr${G} ${BitBase16-16-u8}[sb] */
63159 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63160 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e8a00 }
63162 /* bclr${G} ${BitBase16-16-s8}[fb] */
63165 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63166 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e8b00 }
63168 /* bclr${S} ${BitBase16-8-u11-S}[sb] */
63171 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
63172 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4000 }
63174 /* bclr${G} ${Dsp-16-u16}[$Bit16An] */
63177 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63178 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e8c0000 }
63180 /* bclr${G} ${BitBase16-16-u16}[sb] */
63183 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63184 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e8e0000 }
63186 /* bclr${G} ${BitBase16-16-u16} */
63189 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
63190 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e8f0000 }
63192 /* bclr${G} [$Bit16An] */
63195 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63196 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e86 }
63198 /* band${X} $Bitno32Prefixed,$Bit32RnPrefixed */
63201 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
63202 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d808 }
63204 /* band${X} $Bitno32Prefixed,$Bit32AnPrefixed */
63207 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
63208 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d088 }
63210 /* band${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
63213 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63214 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d008 }
63216 /* band${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
63219 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63220 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20800 }
63222 /* band${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
63225 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63226 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40800 }
63228 /* band${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
63231 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63232 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60800 }
63234 /* band${X} ${BitBase32-24-u11-Prefixed}[sb] */
63237 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
63238 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28800 }
63240 /* band${X} ${BitBase32-24-u19-Prefixed}[sb] */
63243 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
63244 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48800 }
63246 /* band${X} ${BitBase32-24-s11-Prefixed}[fb] */
63249 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63250 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c800 }
63252 /* band${X} ${BitBase32-24-s19-Prefixed}[fb] */
63255 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63256 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c800 }
63258 /* band${X} ${BitBase32-24-u19-Prefixed} */
63261 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
63262 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c800 }
63264 /* band${X} ${BitBase32-24-u27-Prefixed} */
63267 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
63268 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68800 }
63270 /* band${X} $Bitno16R,$Bit16Rn */
63273 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63274 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e4000 }
63276 /* band${X} $Bitno16R,$Bit16An */
63279 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63280 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e4400 }
63282 /* band${X} [$Bit16An] */
63285 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63286 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e46 }
63288 /* band${X} ${Dsp-16-u8}[$Bit16An] */
63291 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63292 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e4800 }
63294 /* band${X} ${Dsp-16-u16}[$Bit16An] */
63297 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63298 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e4c0000 }
63300 /* band${X} ${BitBase16-16-u8}[sb] */
63303 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63304 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e4a00 }
63306 /* band${X} ${BitBase16-16-u16}[sb] */
63309 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63310 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e4e0000 }
63312 /* band${X} ${BitBase16-16-s8}[fb] */
63315 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63316 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e4b00 }
63318 /* band${X} ${BitBase16-16-u16} */
63321 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
63322 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e4f0000 }
63324 /* and.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
63327 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63328 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6d000000 }
63330 /* and.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
63333 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63334 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7d000000 }
63336 /* and.w${S} #${Imm-24-HI},${Dsp-8-u16} */
63339 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
63340 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5d000000 }
63342 /* and.w${S} #${Imm-8-HI},r0 */
63345 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
63346 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x4d0000 }
63348 /* and.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
63351 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63352 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6c0000 }
63354 /* and.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
63357 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63358 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7c0000 }
63360 /* and.b${S} #${Imm-24-QI},${Dsp-8-u16} */
63363 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
63364 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5c000000 }
63366 /* and.b${S} #${Imm-8-QI},r0l */
63369 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
63370 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4c00 }
63372 /* and.b${S} ${SrcDst16-r0l-r0h-S-normal} */
63375 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
63376 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x10 }
63378 /* and.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
63381 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63382 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1100 }
63384 /* and.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
63387 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63388 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1200 }
63390 /* and.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
63393 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
63394 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x130000 }
63396 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63400 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990d00 }
63402 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
63405 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63406 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992d00 }
63408 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
63411 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63412 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993d00 }
63414 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63418 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918d00 }
63420 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
63423 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63424 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ad00 }
63426 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
63429 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63430 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bd00 }
63432 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63436 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910d00 }
63438 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
63441 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63442 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912d00 }
63444 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
63447 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63448 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913d00 }
63450 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63454 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930d0000 }
63456 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63460 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932d0000 }
63462 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63465 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63466 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933d0000 }
63468 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63472 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950d0000 }
63474 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63478 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952d0000 }
63480 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63483 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63484 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953d0000 }
63486 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63489 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63490 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970d0000 }
63492 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63496 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972d0000 }
63498 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63501 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63502 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973d0000 }
63504 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
63507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63508 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938d0000 }
63510 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
63513 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63514 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ad0000 }
63516 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
63519 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63520 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bd0000 }
63522 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
63525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63526 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958d0000 }
63528 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
63531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63532 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ad0000 }
63534 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
63537 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63538 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bd0000 }
63540 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
63543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63544 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cd0000 }
63546 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
63549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63550 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ed0000 }
63552 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
63555 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63556 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fd0000 }
63558 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
63561 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63562 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cd0000 }
63564 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
63567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63568 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ed0000 }
63570 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
63573 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63574 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fd0000 }
63576 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
63579 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
63580 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cd0000 }
63582 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
63585 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63586 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ed0000 }
63588 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
63591 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63592 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fd0000 }
63594 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
63597 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
63598 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978d0000 }
63600 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
63603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63604 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ad0000 }
63606 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
63609 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63610 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bd0000 }
63612 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63615 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63616 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90d0000 }
63618 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
63621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63622 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92d0000 }
63624 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
63627 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63628 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93d0000 }
63630 /* and.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
63633 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63634 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93d0000 }
63636 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63640 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18d0000 }
63642 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
63645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63646 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ad0000 }
63648 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
63651 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63652 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bd0000 }
63654 /* and.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
63657 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63658 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bd0000 }
63660 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63664 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10d0000 }
63666 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
63669 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63670 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12d0000 }
63672 /* and.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
63675 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63676 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13d0000 }
63678 /* and.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
63681 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63682 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13d0000 }
63684 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63687 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63688 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30d0000 }
63690 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63693 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63694 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32d0000 }
63696 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63699 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63700 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33d0000 }
63702 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
63705 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63706 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33d0000 }
63708 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63711 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63712 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50d0000 }
63714 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63717 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63718 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52d0000 }
63720 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63723 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63724 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53d0000 }
63726 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
63729 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63730 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53d0000 }
63732 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63736 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70d0000 }
63738 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63742 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72d0000 }
63744 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63747 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63748 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73d0000 }
63750 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
63753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63754 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73d0000 }
63756 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
63759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63760 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38d0000 }
63762 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
63765 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63766 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ad0000 }
63768 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
63771 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63772 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bd0000 }
63774 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
63777 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63778 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bd0000 }
63780 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
63783 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63784 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58d0000 }
63786 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
63789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63790 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ad0000 }
63792 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
63795 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63796 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bd0000 }
63798 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
63801 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63802 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bd0000 }
63804 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
63807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63808 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cd0000 }
63810 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
63813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63814 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ed0000 }
63816 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
63819 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63820 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fd0000 }
63822 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
63825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63826 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fd0000 }
63828 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
63831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63832 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cd0000 }
63834 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
63837 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63838 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ed0000 }
63840 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
63843 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63844 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fd0000 }
63846 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
63849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63850 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fd0000 }
63852 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
63855 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
63856 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cd0000 }
63858 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
63861 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63862 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ed0000 }
63864 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
63867 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63868 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fd0000 }
63870 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
63873 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
63874 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fd0000 }
63876 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
63879 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
63880 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78d0000 }
63882 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
63885 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63886 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ad0000 }
63888 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
63891 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63892 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bd0000 }
63894 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
63897 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
63898 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bd0000 }
63900 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63903 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63904 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90d0000 }
63906 /* and.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
63909 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63910 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92d0000 }
63912 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63915 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63916 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18d0000 }
63918 /* and.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
63921 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63922 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ad0000 }
63924 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63927 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63928 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10d0000 }
63930 /* and.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
63933 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63934 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12d0000 }
63936 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
63939 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63940 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30d0000 }
63942 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
63945 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63946 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32d0000 }
63948 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
63951 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63952 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50d0000 }
63954 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
63957 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63958 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52d0000 }
63960 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
63963 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63964 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70d0000 }
63966 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
63969 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63970 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72d0000 }
63972 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
63975 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63976 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38d0000 }
63978 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
63981 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63982 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ad0000 }
63984 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
63987 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
63988 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58d0000 }
63990 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
63993 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
63994 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ad0000 }
63996 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
63999 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64000 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cd0000 }
64002 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64005 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64006 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ed0000 }
64008 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64011 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64012 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cd0000 }
64014 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64017 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64018 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ed0000 }
64020 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64023 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64024 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cd0000 }
64026 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
64029 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64030 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ed0000 }
64032 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64035 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64036 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78d0000 }
64038 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
64041 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64042 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ad0000 }
64044 /* and.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
64047 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64048 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90d }
64050 /* and.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
64053 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64054 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892d }
64056 /* and.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
64059 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64060 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890d }
64062 /* and.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
64065 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64066 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18d }
64068 /* and.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
64071 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64072 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ad }
64074 /* and.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
64077 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64078 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818d }
64080 /* and.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
64083 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64084 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10d }
64086 /* and.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
64089 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64090 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812d }
64092 /* and.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64095 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64096 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810d }
64098 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64101 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64102 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30d00 }
64104 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64107 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64108 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832d00 }
64110 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64113 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64114 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830d00 }
64116 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64119 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64120 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50d0000 }
64122 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64125 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64126 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852d0000 }
64128 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
64131 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64132 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850d0000 }
64134 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64137 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64138 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70d0000 }
64140 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64143 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64144 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872d0000 }
64146 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
64149 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64150 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870d0000 }
64152 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
64155 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64156 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38d00 }
64158 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
64161 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64162 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ad00 }
64164 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
64167 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64168 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838d00 }
64170 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
64173 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64174 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58d0000 }
64176 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
64179 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64180 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ad0000 }
64182 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
64185 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64186 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858d0000 }
64188 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
64191 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64192 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cd00 }
64194 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
64197 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64198 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ed00 }
64200 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
64203 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64204 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cd00 }
64206 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
64209 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64210 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cd0000 }
64212 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
64215 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64216 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ed0000 }
64218 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
64221 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64222 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cd0000 }
64224 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
64227 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64228 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cd0000 }
64230 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
64233 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64234 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ed0000 }
64236 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
64239 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
64240 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cd0000 }
64242 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
64245 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64246 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78d0000 }
64248 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
64251 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64252 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ad0000 }
64254 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
64257 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
64258 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878d0000 }
64260 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64264 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980d00 }
64266 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
64269 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64270 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982d00 }
64272 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
64275 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64276 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983d00 }
64278 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64281 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64282 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908d00 }
64284 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
64287 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64288 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ad00 }
64290 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
64293 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64294 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bd00 }
64296 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64300 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900d00 }
64302 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
64305 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64306 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902d00 }
64308 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
64311 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64312 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903d00 }
64314 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64317 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64318 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920d0000 }
64320 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64324 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922d0000 }
64326 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64329 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64330 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923d0000 }
64332 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64336 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940d0000 }
64338 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64341 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64342 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942d0000 }
64344 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64347 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64348 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943d0000 }
64350 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64353 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64354 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960d0000 }
64356 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64360 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962d0000 }
64362 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64365 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64366 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963d0000 }
64368 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
64371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64372 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928d0000 }
64374 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
64377 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64378 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ad0000 }
64380 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
64383 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64384 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bd0000 }
64386 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
64389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64390 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948d0000 }
64392 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
64395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64396 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ad0000 }
64398 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
64401 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64402 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bd0000 }
64404 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
64407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64408 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cd0000 }
64410 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
64413 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64414 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ed0000 }
64416 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
64419 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64420 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fd0000 }
64422 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
64425 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64426 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cd0000 }
64428 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
64431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64432 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ed0000 }
64434 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
64437 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64438 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fd0000 }
64440 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
64443 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
64444 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cd0000 }
64446 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
64449 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64450 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ed0000 }
64452 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
64455 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64456 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fd0000 }
64458 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
64461 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
64462 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968d0000 }
64464 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
64467 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64468 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ad0000 }
64470 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
64473 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64474 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bd0000 }
64476 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64479 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64480 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80d0000 }
64482 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
64485 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64486 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82d0000 }
64488 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
64491 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64492 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83d0000 }
64494 /* and.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
64497 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64498 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83d0000 }
64500 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64503 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64504 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08d0000 }
64506 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
64509 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64510 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ad0000 }
64512 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
64515 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64516 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bd0000 }
64518 /* and.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
64521 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64522 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bd0000 }
64524 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64528 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00d0000 }
64530 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
64533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64534 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02d0000 }
64536 /* and.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
64539 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64540 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03d0000 }
64542 /* and.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
64545 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64546 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03d0000 }
64548 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64552 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20d0000 }
64554 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64558 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22d0000 }
64560 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64563 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64564 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23d0000 }
64566 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
64569 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64570 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23d0000 }
64572 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64576 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40d0000 }
64578 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64582 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42d0000 }
64584 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64587 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64588 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43d0000 }
64590 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
64593 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64594 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43d0000 }
64596 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64600 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60d0000 }
64602 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64605 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64606 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62d0000 }
64608 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64611 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64612 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63d0000 }
64614 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
64617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64618 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63d0000 }
64620 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
64623 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64624 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28d0000 }
64626 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
64629 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64630 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ad0000 }
64632 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
64635 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64636 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bd0000 }
64638 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
64641 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64642 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bd0000 }
64644 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
64647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64648 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48d0000 }
64650 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
64653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64654 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ad0000 }
64656 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
64659 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64660 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bd0000 }
64662 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
64665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64666 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bd0000 }
64668 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
64671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64672 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cd0000 }
64674 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
64677 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64678 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ed0000 }
64680 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
64683 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64684 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fd0000 }
64686 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
64689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64690 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fd0000 }
64692 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
64695 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64696 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cd0000 }
64698 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
64701 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64702 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ed0000 }
64704 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
64707 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64708 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fd0000 }
64710 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
64713 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64714 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fd0000 }
64716 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
64719 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
64720 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cd0000 }
64722 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
64725 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64726 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ed0000 }
64728 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
64731 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64732 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fd0000 }
64734 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
64737 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
64738 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fd0000 }
64740 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
64743 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
64744 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68d0000 }
64746 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
64749 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64750 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ad0000 }
64752 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
64755 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64756 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bd0000 }
64758 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
64761 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
64762 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bd0000 }
64764 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64767 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64768 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80d0000 }
64770 /* and.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
64773 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64774 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82d0000 }
64776 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64779 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64780 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08d0000 }
64782 /* and.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
64785 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64786 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ad0000 }
64788 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64791 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64792 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00d0000 }
64794 /* and.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
64797 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64798 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02d0000 }
64800 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
64803 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64804 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20d0000 }
64806 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
64809 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64810 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22d0000 }
64812 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
64815 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64816 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40d0000 }
64818 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
64821 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64822 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42d0000 }
64824 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
64827 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64828 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60d0000 }
64830 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
64833 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64834 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62d0000 }
64836 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
64839 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64840 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28d0000 }
64842 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
64845 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64846 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ad0000 }
64848 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
64851 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64852 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48d0000 }
64854 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
64857 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64858 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ad0000 }
64860 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
64863 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64864 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cd0000 }
64866 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64869 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64870 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ed0000 }
64872 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64875 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64876 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cd0000 }
64878 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64881 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64882 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ed0000 }
64884 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64887 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64888 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cd0000 }
64890 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
64893 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64894 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ed0000 }
64896 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64899 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64900 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68d0000 }
64902 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
64905 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64906 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ad0000 }
64908 /* and.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
64911 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64912 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80d }
64914 /* and.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
64917 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64918 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882d }
64920 /* and.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64923 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64924 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880d }
64926 /* and.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
64929 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64930 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08d }
64932 /* and.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
64935 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64936 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ad }
64938 /* and.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64941 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64942 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808d }
64944 /* and.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
64947 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64948 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00d }
64950 /* and.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
64953 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64954 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802d }
64956 /* and.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64959 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64960 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800d }
64962 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64965 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64966 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20d00 }
64968 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64971 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64972 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822d00 }
64974 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64977 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64978 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820d00 }
64980 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64983 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64984 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40d0000 }
64986 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64989 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64990 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842d0000 }
64992 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
64995 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64996 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840d0000 }
64998 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65001 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65002 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60d0000 }
65004 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65007 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65008 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862d0000 }
65010 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
65013 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65014 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860d0000 }
65016 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
65019 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65020 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28d00 }
65022 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
65025 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65026 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ad00 }
65028 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
65031 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65032 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828d00 }
65034 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
65037 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65038 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48d0000 }
65040 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
65043 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65044 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ad0000 }
65046 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
65049 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65050 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848d0000 }
65052 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
65055 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65056 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cd00 }
65058 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
65061 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65062 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ed00 }
65064 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
65067 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65068 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cd00 }
65070 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
65073 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65074 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cd0000 }
65076 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
65079 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65080 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ed0000 }
65082 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
65085 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65086 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cd0000 }
65088 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
65091 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65092 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cd0000 }
65094 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
65097 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65098 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ed0000 }
65100 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
65103 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
65104 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cd0000 }
65106 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
65109 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65110 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68d0000 }
65112 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
65115 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65116 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ad0000 }
65118 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
65121 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
65122 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868d0000 }
65124 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
65127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65128 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x918000 }
65130 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
65133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65134 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91a000 }
65136 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
65139 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65140 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x91b000 }
65142 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
65145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65146 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x918400 }
65148 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
65151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65152 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x91a400 }
65154 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
65157 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65158 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x91b400 }
65160 /* and.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65164 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x918600 }
65166 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65170 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x91a600 }
65172 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65175 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65176 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x91b600 }
65178 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65182 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x91880000 }
65184 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65188 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91a80000 }
65190 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65193 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65194 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91b80000 }
65196 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65200 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x918c0000 }
65202 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65206 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91ac0000 }
65208 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65211 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65212 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91bc0000 }
65214 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65218 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x918a0000 }
65220 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65224 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91aa0000 }
65226 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65229 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65230 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91ba0000 }
65232 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65236 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x918e0000 }
65238 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65242 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91ae0000 }
65244 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65247 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65248 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91be0000 }
65250 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65254 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x918b0000 }
65256 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65260 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91ab0000 }
65262 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65265 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65266 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91bb0000 }
65268 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65271 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65272 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x918f0000 }
65274 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65277 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65278 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x91af0000 }
65280 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65283 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65284 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x91bf0000 }
65286 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
65289 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65290 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x91c00000 }
65292 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
65295 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65296 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91e00000 }
65298 /* and.w${G} ${Dsp-16-u16},$Dst16RnHI */
65301 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
65302 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x91f00000 }
65304 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
65307 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65308 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x91c40000 }
65310 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
65313 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65314 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x91e40000 }
65316 /* and.w${G} ${Dsp-16-u16},$Dst16AnHI */
65319 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
65320 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x91f40000 }
65322 /* and.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65326 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x91c60000 }
65328 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65331 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65332 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x91e60000 }
65334 /* and.w${G} ${Dsp-16-u16},[$Dst16An] */
65337 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65338 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x91f60000 }
65340 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65344 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x91c80000 }
65346 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65350 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x91e80000 }
65352 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65355 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65356 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x91f80000 }
65358 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65361 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65362 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x91cc0000 }
65364 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65368 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x91ec0000 }
65370 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65373 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65374 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x91fc0000 }
65376 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65379 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65380 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ca0000 }
65382 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65386 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ea0000 }
65388 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65391 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65392 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x91fa0000 }
65394 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65398 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ce0000 }
65400 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65404 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ee0000 }
65406 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65409 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65410 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x91fe0000 }
65412 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65416 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91cb0000 }
65418 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65422 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91eb0000 }
65424 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65428 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x91fb0000 }
65430 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65434 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x91cf0000 }
65436 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65440 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x91ef0000 }
65442 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
65445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65446 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x91ff0000 }
65448 /* and.w${G} $Src16RnHI,$Dst16RnHI */
65451 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
65452 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9100 }
65454 /* and.w${G} $Src16AnHI,$Dst16RnHI */
65457 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
65458 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9140 }
65460 /* and.w${G} [$Src16An],$Dst16RnHI */
65463 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65464 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9160 }
65466 /* and.w${G} $Src16RnHI,$Dst16AnHI */
65469 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
65470 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9104 }
65472 /* and.w${G} $Src16AnHI,$Dst16AnHI */
65475 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
65476 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9144 }
65478 /* and.w${G} [$Src16An],$Dst16AnHI */
65481 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65482 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9164 }
65484 /* and.w${G} $Src16RnHI,[$Dst16An] */
65487 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65488 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9106 }
65490 /* and.w${G} $Src16AnHI,[$Dst16An] */
65493 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65494 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9146 }
65496 /* and.w${G} [$Src16An],[$Dst16An] */
65499 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65500 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9166 }
65502 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
65505 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65506 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x910800 }
65508 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
65511 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65512 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x914800 }
65514 /* and.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
65517 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65518 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x916800 }
65520 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
65523 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65524 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x910c0000 }
65526 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
65529 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65530 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x914c0000 }
65532 /* and.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
65535 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65536 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x916c0000 }
65538 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
65541 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65542 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x910a00 }
65544 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
65547 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65548 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x914a00 }
65550 /* and.w${G} [$Src16An],${Dsp-16-u8}[sb] */
65553 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65554 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x916a00 }
65556 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
65559 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65560 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x910e0000 }
65562 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
65565 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65566 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x914e0000 }
65568 /* and.w${G} [$Src16An],${Dsp-16-u16}[sb] */
65571 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65572 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x916e0000 }
65574 /* and.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
65577 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65578 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x910b00 }
65580 /* and.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
65583 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65584 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x914b00 }
65586 /* and.w${G} [$Src16An],${Dsp-16-s8}[fb] */
65589 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65590 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x916b00 }
65592 /* and.w${G} $Src16RnHI,${Dsp-16-u16} */
65595 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
65596 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x910f0000 }
65598 /* and.w${G} $Src16AnHI,${Dsp-16-u16} */
65601 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
65602 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x914f0000 }
65604 /* and.w${G} [$Src16An],${Dsp-16-u16} */
65607 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
65608 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x916f0000 }
65610 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
65613 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65614 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x908000 }
65616 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
65619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65620 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90a000 }
65622 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
65625 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65626 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x90b000 }
65628 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
65631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65632 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x908400 }
65634 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
65637 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65638 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x90a400 }
65640 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
65643 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65644 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x90b400 }
65646 /* and.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65650 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x908600 }
65652 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65656 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x90a600 }
65658 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65661 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65662 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x90b600 }
65664 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65668 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x90880000 }
65670 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65674 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90a80000 }
65676 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65679 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65680 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90b80000 }
65682 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65685 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65686 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x908c0000 }
65688 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65692 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90ac0000 }
65694 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65697 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65698 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90bc0000 }
65700 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65704 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x908a0000 }
65706 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65710 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90aa0000 }
65712 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65715 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65716 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90ba0000 }
65718 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65721 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65722 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x908e0000 }
65724 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65728 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90ae0000 }
65730 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65733 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65734 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90be0000 }
65736 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65740 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x908b0000 }
65742 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65746 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90ab0000 }
65748 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65751 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65752 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90bb0000 }
65754 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65758 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x908f0000 }
65760 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65764 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x90af0000 }
65766 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65769 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65770 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x90bf0000 }
65772 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
65775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65776 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x90c00000 }
65778 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
65781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65782 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90e00000 }
65784 /* and.b${G} ${Dsp-16-u16},$Dst16RnQI */
65787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
65788 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x90f00000 }
65790 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
65793 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65794 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x90c40000 }
65796 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
65799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65800 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x90e40000 }
65802 /* and.b${G} ${Dsp-16-u16},$Dst16AnQI */
65805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
65806 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x90f40000 }
65808 /* and.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65812 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x90c60000 }
65814 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65817 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65818 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x90e60000 }
65820 /* and.b${G} ${Dsp-16-u16},[$Dst16An] */
65823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65824 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x90f60000 }
65826 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65830 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x90c80000 }
65832 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65836 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x90e80000 }
65838 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65841 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65842 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x90f80000 }
65844 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65848 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x90cc0000 }
65850 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65854 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x90ec0000 }
65856 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65860 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x90fc0000 }
65862 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65865 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65866 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ca0000 }
65868 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65872 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ea0000 }
65874 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65877 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65878 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x90fa0000 }
65880 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65884 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ce0000 }
65886 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65889 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65890 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ee0000 }
65892 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65896 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x90fe0000 }
65898 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65902 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90cb0000 }
65904 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65908 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90eb0000 }
65910 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65913 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65914 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x90fb0000 }
65916 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65920 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x90cf0000 }
65922 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65926 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x90ef0000 }
65928 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
65931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65932 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x90ff0000 }
65934 /* and.b${G} $Src16RnQI,$Dst16RnQI */
65937 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
65938 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9000 }
65940 /* and.b${G} $Src16AnQI,$Dst16RnQI */
65943 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
65944 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9040 }
65946 /* and.b${G} [$Src16An],$Dst16RnQI */
65949 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65950 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9060 }
65952 /* and.b${G} $Src16RnQI,$Dst16AnQI */
65955 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
65956 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9004 }
65958 /* and.b${G} $Src16AnQI,$Dst16AnQI */
65961 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
65962 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9044 }
65964 /* and.b${G} [$Src16An],$Dst16AnQI */
65967 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65968 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9064 }
65970 /* and.b${G} $Src16RnQI,[$Dst16An] */
65973 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65974 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9006 }
65976 /* and.b${G} $Src16AnQI,[$Dst16An] */
65979 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65980 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9046 }
65982 /* and.b${G} [$Src16An],[$Dst16An] */
65985 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65986 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9066 }
65988 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
65991 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65992 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x900800 }
65994 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
65997 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65998 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x904800 }
66000 /* and.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
66003 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66004 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x906800 }
66006 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
66009 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66010 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x900c0000 }
66012 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
66015 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66016 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x904c0000 }
66018 /* and.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
66021 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66022 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x906c0000 }
66024 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
66027 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66028 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x900a00 }
66030 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
66033 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66034 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x904a00 }
66036 /* and.b${G} [$Src16An],${Dsp-16-u8}[sb] */
66039 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66040 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x906a00 }
66042 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
66045 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66046 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x900e0000 }
66048 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
66051 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66052 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x904e0000 }
66054 /* and.b${G} [$Src16An],${Dsp-16-u16}[sb] */
66057 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66058 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x906e0000 }
66060 /* and.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
66063 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66064 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x900b00 }
66066 /* and.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
66069 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66070 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x904b00 }
66072 /* and.b${G} [$Src16An],${Dsp-16-s8}[fb] */
66075 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66076 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x906b00 }
66078 /* and.b${G} $Src16RnQI,${Dsp-16-u16} */
66081 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
66082 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x900f0000 }
66084 /* and.b${G} $Src16AnQI,${Dsp-16-u16} */
66087 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
66088 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x904f0000 }
66090 /* and.b${G} [$Src16An],${Dsp-16-u16} */
66093 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
66094 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x906f0000 }
66096 /* and.b${S} #${Imm-8-QI},r0l */
66099 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
66100 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9400 }
66102 /* and.b${S} #${Imm-8-QI},r0h */
66105 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
66106 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9300 }
66108 /* and.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
66111 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66112 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x950000 }
66114 /* and.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
66117 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66118 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x960000 }
66120 /* and.b${S} #${Imm-8-QI},${Dsp-16-u16} */
66123 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
66124 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x97000000 }
66126 /* and.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
66129 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
66130 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893f0000 }
66132 /* and.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
66135 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
66136 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81bf0000 }
66138 /* and.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
66141 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66142 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813f0000 }
66144 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66147 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66148 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833f0000 }
66150 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66153 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66154 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83bf0000 }
66156 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66159 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66160 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ff0000 }
66162 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66165 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66166 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853f0000 }
66168 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66171 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66172 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85bf0000 }
66174 /* and.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
66177 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66178 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ff0000 }
66180 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66183 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66184 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ff0000 }
66186 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66189 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66190 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873f0000 }
66192 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24} */
66195 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
66196 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87bf0000 }
66198 /* and.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
66201 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
66202 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883f00 }
66204 /* and.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
66207 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
66208 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80bf00 }
66210 /* and.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
66213 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66214 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803f00 }
66216 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66219 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66220 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823f0000 }
66222 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66225 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66226 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82bf0000 }
66228 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66231 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66232 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ff0000 }
66234 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66237 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66238 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843f0000 }
66240 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66243 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66244 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84bf0000 }
66246 /* and.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
66249 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66250 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ff0000 }
66252 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66255 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66256 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ff0000 }
66258 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66261 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66262 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863f0000 }
66264 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24} */
66267 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
66268 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86bf0000 }
66270 /* and.w${G} #${Imm-16-HI},$Dst16RnHI */
66273 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
66274 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77200000 }
66276 /* and.w${G} #${Imm-16-HI},$Dst16AnHI */
66279 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
66280 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77240000 }
66282 /* and.w${G} #${Imm-16-HI},[$Dst16An] */
66285 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
66286 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77260000 }
66288 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
66291 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66292 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77280000 }
66294 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66297 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66298 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x772a0000 }
66300 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66303 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66304 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x772b0000 }
66306 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
66309 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66310 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x772c0000 }
66312 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66315 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66316 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x772e0000 }
66318 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66321 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66322 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x772f0000 }
66324 /* and.b${G} #${Imm-16-QI},$Dst16RnQI */
66327 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
66328 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x762000 }
66330 /* and.b${G} #${Imm-16-QI},$Dst16AnQI */
66333 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
66334 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x762400 }
66336 /* and.b${G} #${Imm-16-QI},[$Dst16An] */
66339 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
66340 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x762600 }
66342 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
66345 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66346 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76280000 }
66348 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66351 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66352 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x762a0000 }
66354 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66357 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66358 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x762b0000 }
66360 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
66363 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66364 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x762c0000 }
66366 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66369 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66370 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x762e0000 }
66372 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66375 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66376 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x762f0000 }
66378 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66381 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66382 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
66384 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66387 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66388 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
66390 /* adjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66393 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66394 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
66396 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66399 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66400 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
66402 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66405 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66406 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
66408 /* adjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66411 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66412 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
66414 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66417 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66418 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
66420 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66423 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66424 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
66426 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66429 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66430 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
66432 /* adjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */
66435 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66436 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
66438 /* adjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */
66441 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66442 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
66444 /* adjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66447 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66448 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
66450 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66453 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66454 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
66456 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66459 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66460 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
66462 /* adjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66465 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66466 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
66468 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66471 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66472 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
66474 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66477 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66478 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
66480 /* adjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66483 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66484 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
66486 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66489 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66490 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
66492 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66495 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66496 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
66498 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66501 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66502 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
66504 /* adjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */
66507 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66508 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
66510 /* adjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */
66513 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66514 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
66516 /* adjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66519 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66520 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
66522 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66525 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66526 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
66528 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66531 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66532 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
66534 /* adjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66537 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66538 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
66540 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66543 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66544 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
66546 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66549 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66550 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
66552 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66555 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66556 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
66558 /* adjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */
66561 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
66562 & ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
66564 /* adjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */
66567 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
66568 & ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
66570 /* adjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66573 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66574 & ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
66576 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66579 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66580 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
66582 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66585 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66586 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
66588 /* adjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66591 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66592 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
66594 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66597 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66598 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
66600 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66603 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66604 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
66606 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66609 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66610 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
66612 /* adjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */
66615 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
66616 & ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
66618 /* adjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */
66621 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
66622 & ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
66624 /* adjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66627 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66628 & ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
66630 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66633 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66634 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980200 }
66636 /* addx${X} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
66639 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66640 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982200 }
66642 /* addx${X} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
66645 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66646 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983200 }
66648 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66651 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66652 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908200 }
66654 /* addx${X} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
66657 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66658 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a200 }
66660 /* addx${X} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
66663 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66664 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b200 }
66666 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66669 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66670 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900200 }
66672 /* addx${X} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
66675 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66676 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902200 }
66678 /* addx${X} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
66681 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66682 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903200 }
66684 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66687 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66688 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92020000 }
66690 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66693 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66694 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92220000 }
66696 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66699 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66700 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92320000 }
66702 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66705 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66706 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94020000 }
66708 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66711 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66712 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94220000 }
66714 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66717 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66718 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94320000 }
66720 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66723 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66724 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96020000 }
66726 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66729 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66730 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96220000 }
66732 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66735 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66736 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96320000 }
66738 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
66741 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66742 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92820000 }
66744 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
66747 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66748 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a20000 }
66750 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
66753 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66754 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b20000 }
66756 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
66759 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66760 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94820000 }
66762 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
66765 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66766 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a20000 }
66768 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
66771 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66772 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b20000 }
66774 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
66777 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66778 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c20000 }
66780 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
66783 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66784 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e20000 }
66786 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
66789 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66790 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f20000 }
66792 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
66795 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66796 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c20000 }
66798 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
66801 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66802 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e20000 }
66804 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
66807 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66808 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f20000 }
66810 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
66813 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
66814 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c20000 }
66816 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
66819 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66820 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e20000 }
66822 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
66825 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66826 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f20000 }
66828 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
66831 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
66832 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96820000 }
66834 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
66837 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66838 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a20000 }
66840 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
66843 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66844 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b20000 }
66846 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66849 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66850 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8020000 }
66852 /* addx${X} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
66855 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66856 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8220000 }
66858 /* addx${X} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
66861 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66862 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8320000 }
66864 /* addx${X} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
66867 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66868 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8320000 }
66870 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66873 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66874 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0820000 }
66876 /* addx${X} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
66879 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66880 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a20000 }
66882 /* addx${X} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
66885 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66886 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b20000 }
66888 /* addx${X} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
66891 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66892 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b20000 }
66894 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66897 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66898 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0020000 }
66900 /* addx${X} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
66903 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66904 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0220000 }
66906 /* addx${X} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
66909 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66910 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0320000 }
66912 /* addx${X} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
66915 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66916 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0320000 }
66918 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66921 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66922 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2020000 }
66924 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66927 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66928 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2220000 }
66930 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66933 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66934 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2320000 }
66936 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
66939 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66940 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2320000 }
66942 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66945 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66946 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4020000 }
66948 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66951 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66952 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4220000 }
66954 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66957 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66958 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4320000 }
66960 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
66963 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66964 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4320000 }
66966 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66969 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66970 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6020000 }
66972 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66975 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66976 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6220000 }
66978 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66981 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66982 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6320000 }
66984 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
66987 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66988 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6320000 }
66990 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
66993 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
66994 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2820000 }
66996 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
66999 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67000 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a20000 }
67002 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
67005 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67006 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b20000 }
67008 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
67011 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67012 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b20000 }
67014 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
67017 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67018 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4820000 }
67020 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
67023 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67024 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a20000 }
67026 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
67029 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67030 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b20000 }
67032 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
67035 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67036 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b20000 }
67038 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
67041 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67042 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c20000 }
67044 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
67047 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67048 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e20000 }
67050 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
67053 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67054 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f20000 }
67056 /* addx${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
67059 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67060 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f20000 }
67062 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
67065 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67066 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c20000 }
67068 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
67071 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67072 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e20000 }
67074 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
67077 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67078 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f20000 }
67080 /* addx${X} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
67083 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67084 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f20000 }
67086 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
67089 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67090 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c20000 }
67092 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
67095 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67096 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e20000 }
67098 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
67101 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67102 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f20000 }
67104 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16} */
67107 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
67108 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f20000 }
67110 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
67113 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67114 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6820000 }
67116 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
67119 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67120 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a20000 }
67122 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
67125 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67126 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b20000 }
67128 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24} */
67131 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
67132 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b20000 }
67134 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67137 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67138 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8020000 }
67140 /* addx${X} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
67143 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67144 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8220000 }
67146 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67149 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67150 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0820000 }
67152 /* addx${X} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
67155 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67156 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a20000 }
67158 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67161 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67162 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0020000 }
67164 /* addx${X} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
67167 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67168 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0220000 }
67170 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
67173 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67174 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2020000 }
67176 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
67179 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67180 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2220000 }
67182 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
67185 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67186 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4020000 }
67188 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
67191 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67192 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4220000 }
67194 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
67197 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67198 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6020000 }
67200 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
67203 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67204 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6220000 }
67206 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
67209 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67210 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2820000 }
67212 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
67215 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67216 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a20000 }
67218 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
67221 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67222 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4820000 }
67224 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
67227 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67228 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a20000 }
67230 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
67233 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67234 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c20000 }
67236 /* addx${X} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
67239 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67240 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e20000 }
67242 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
67245 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67246 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c20000 }
67248 /* addx${X} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
67251 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67252 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e20000 }
67254 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
67257 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
67258 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c20000 }
67260 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16} */
67263 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
67264 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e20000 }
67266 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
67269 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
67270 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6820000 }
67272 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24} */
67275 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
67276 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a20000 }
67278 /* addx${X} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
67281 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67282 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc802 }
67284 /* addx${X} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
67287 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67288 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8822 }
67290 /* addx${X} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67293 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67294 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8802 }
67296 /* addx${X} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
67299 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67300 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc082 }
67302 /* addx${X} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
67305 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67306 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a2 }
67308 /* addx${X} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67311 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67312 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8082 }
67314 /* addx${X} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
67317 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67318 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc002 }
67320 /* addx${X} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
67323 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67324 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8022 }
67326 /* addx${X} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67329 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67330 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8002 }
67332 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67335 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67336 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20200 }
67338 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67341 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67342 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822200 }
67344 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
67347 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67348 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820200 }
67350 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67353 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67354 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4020000 }
67356 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67359 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67360 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84220000 }
67362 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
67365 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67366 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84020000 }
67368 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67371 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67372 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6020000 }
67374 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67377 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67378 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86220000 }
67380 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
67383 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67384 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86020000 }
67386 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
67389 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67390 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28200 }
67392 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
67395 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67396 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a200 }
67398 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
67401 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67402 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828200 }
67404 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
67407 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67408 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4820000 }
67410 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
67413 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67414 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a20000 }
67416 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
67419 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67420 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84820000 }
67422 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
67425 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67426 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c200 }
67428 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
67431 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67432 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e200 }
67434 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
67437 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67438 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c200 }
67440 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
67443 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67444 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c20000 }
67446 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
67449 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67450 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e20000 }
67452 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
67455 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67456 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c20000 }
67458 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16} */
67461 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67462 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c20000 }
67464 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16} */
67467 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67468 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e20000 }
67470 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16} */
67473 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
67474 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c20000 }
67476 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24} */
67479 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67480 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6820000 }
67482 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24} */
67485 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67486 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a20000 }
67488 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24} */
67491 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
67492 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86820000 }
67494 /* addx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
67497 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67498 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x881100 }
67500 /* addx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
67503 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67504 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x809100 }
67506 /* addx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
67509 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67510 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x801100 }
67512 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
67515 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67516 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82110000 }
67518 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
67521 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67522 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82910000 }
67524 /* addx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
67527 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67528 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82d10000 }
67530 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
67533 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67534 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84110000 }
67536 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
67539 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67540 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84910000 }
67542 /* addx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
67545 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67546 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84d10000 }
67548 /* addx${X} #${Imm-32-QI},${Dsp-16-u16} */
67551 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
67552 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86d10000 }
67554 /* addx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
67557 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67558 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86110000 }
67560 /* addx${X} #${Imm-40-QI},${Dsp-16-u24} */
67563 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
67564 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86910000 }
67566 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67569 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67570 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990000 }
67572 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
67575 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67576 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992000 }
67578 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
67581 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67582 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993000 }
67584 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67587 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67588 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918000 }
67590 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
67593 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67594 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a000 }
67596 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
67599 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67600 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b000 }
67602 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67605 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67606 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910000 }
67608 /* dadd.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
67611 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67612 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912000 }
67614 /* dadd.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
67617 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67618 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913000 }
67620 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
67623 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67624 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930000 }
67626 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67629 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67630 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932000 }
67632 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67635 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67636 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933000 }
67638 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
67641 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67642 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950000 }
67644 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67647 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67648 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952000 }
67650 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67653 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67654 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953000 }
67656 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
67659 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67660 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970000 }
67662 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67665 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67666 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972000 }
67668 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67671 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67672 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973000 }
67674 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
67677 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67678 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938000 }
67680 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
67683 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67684 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a000 }
67686 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
67689 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67690 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b000 }
67692 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
67695 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67696 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958000 }
67698 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
67701 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67702 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a000 }
67704 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
67707 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67708 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b000 }
67710 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
67713 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67714 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c000 }
67716 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
67719 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67720 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e000 }
67722 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
67725 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67726 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f000 }
67728 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
67731 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67732 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c000 }
67734 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
67737 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67738 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e000 }
67740 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
67743 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67744 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f000 }
67746 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
67749 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67750 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c000 }
67752 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
67755 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67756 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e000 }
67758 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
67761 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67762 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f000 }
67764 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
67767 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67768 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978000 }
67770 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
67773 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67774 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a000 }
67776 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
67779 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67780 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b000 }
67782 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67785 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67786 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90000 }
67788 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
67791 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67792 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92000 }
67794 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
67797 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67798 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93000 }
67800 /* dadd.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
67803 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
67804 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93000 }
67806 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67809 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67810 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18000 }
67812 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
67815 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67816 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a000 }
67818 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
67821 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67822 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b000 }
67824 /* dadd.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
67827 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
67828 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b000 }
67830 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67833 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67834 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10000 }
67836 /* dadd.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
67839 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67840 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12000 }
67842 /* dadd.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
67845 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67846 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13000 }
67848 /* dadd.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
67851 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67852 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13000 }
67854 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
67857 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67858 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30000 }
67860 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67863 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67864 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32000 }
67866 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67869 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67870 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33000 }
67872 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
67875 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67876 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33000 }
67878 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
67881 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67882 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50000 }
67884 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67887 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67888 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52000 }
67890 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67893 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67894 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53000 }
67896 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
67899 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67900 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53000 }
67902 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
67905 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67906 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70000 }
67908 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67911 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67912 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72000 }
67914 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67917 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67918 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73000 }
67920 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
67923 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67924 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73000 }
67926 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
67929 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67930 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38000 }
67932 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
67935 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67936 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a000 }
67938 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
67941 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67942 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b000 }
67944 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
67947 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67948 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b000 }
67950 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
67953 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67954 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58000 }
67956 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
67959 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67960 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a000 }
67962 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
67965 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67966 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b000 }
67968 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
67971 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67972 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b000 }
67974 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
67977 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67978 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c000 }
67980 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
67983 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67984 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e000 }
67986 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
67989 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67990 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f000 }
67992 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
67995 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67996 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f000 }
67998 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68001 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68002 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c000 }
68004 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68007 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68008 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e000 }
68010 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68013 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68014 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f000 }
68016 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68019 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68020 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f000 }
68022 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68025 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68026 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c000 }
68028 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68031 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68032 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e000 }
68034 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68037 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68038 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f000 }
68040 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
68043 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68044 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f000 }
68046 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68049 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68050 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78000 }
68052 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68055 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68056 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a000 }
68058 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68061 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68062 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b000 }
68064 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
68067 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68068 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b000 }
68070 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
68073 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68074 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90000 }
68076 /* dadd.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
68079 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68080 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92000 }
68082 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
68085 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68086 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18000 }
68088 /* dadd.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
68091 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68092 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a000 }
68094 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68097 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68098 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10000 }
68100 /* dadd.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68103 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68104 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12000 }
68106 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68109 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68110 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30000 }
68112 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68115 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68116 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32000 }
68118 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68121 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68122 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50000 }
68124 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
68127 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68128 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52000 }
68130 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
68133 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68134 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70000 }
68136 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
68139 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68140 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72000 }
68142 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
68145 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68146 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38000 }
68148 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
68151 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68152 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a000 }
68154 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
68157 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68158 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58000 }
68160 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
68163 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68164 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a000 }
68166 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
68169 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68170 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c000 }
68172 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
68175 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68176 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e000 }
68178 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
68181 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68182 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c000 }
68184 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
68187 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68188 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e000 }
68190 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
68193 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
68194 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c000 }
68196 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
68199 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
68200 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e000 }
68202 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
68205 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
68206 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78000 }
68208 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
68211 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
68212 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a000 }
68214 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
68217 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68218 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c900 }
68220 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
68223 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68224 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18920 }
68226 /* dadd.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
68229 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68230 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18900 }
68232 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
68235 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68236 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c180 }
68238 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
68241 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68242 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a0 }
68244 /* dadd.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
68247 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68248 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18180 }
68250 /* dadd.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
68253 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68254 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c100 }
68256 /* dadd.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
68259 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68260 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18120 }
68262 /* dadd.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
68265 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68266 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18100 }
68268 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68271 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68272 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30000 }
68274 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68277 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68278 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832000 }
68280 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
68283 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68284 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830000 }
68286 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68289 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68290 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50000 }
68292 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68295 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68296 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852000 }
68298 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
68301 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68302 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850000 }
68304 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68307 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68308 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70000 }
68310 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68313 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68314 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872000 }
68316 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
68319 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68320 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870000 }
68322 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
68325 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68326 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38000 }
68328 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
68331 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68332 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a000 }
68334 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
68337 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68338 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838000 }
68340 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
68343 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68344 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58000 }
68346 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
68349 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68350 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a000 }
68352 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
68355 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68356 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858000 }
68358 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
68361 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68362 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c000 }
68364 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
68367 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68368 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e000 }
68370 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
68373 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68374 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c000 }
68376 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
68379 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68380 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c000 }
68382 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
68385 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68386 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e000 }
68388 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
68391 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68392 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c000 }
68394 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
68397 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68398 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c000 }
68400 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
68403 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68404 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e000 }
68406 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
68409 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
68410 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c000 }
68412 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
68415 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68416 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78000 }
68418 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
68421 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68422 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a000 }
68424 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
68427 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
68428 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878000 }
68430 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68433 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68434 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980000 }
68436 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
68439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68440 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982000 }
68442 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
68445 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68446 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983000 }
68448 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68451 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68452 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908000 }
68454 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
68457 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68458 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a000 }
68460 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
68463 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68464 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b000 }
68466 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68469 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68470 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900000 }
68472 /* dadd.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
68475 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68476 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902000 }
68478 /* dadd.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
68481 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68482 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903000 }
68484 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
68487 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68488 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920000 }
68490 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68493 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68494 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922000 }
68496 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68499 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68500 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923000 }
68502 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
68505 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68506 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940000 }
68508 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68511 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68512 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942000 }
68514 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68517 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68518 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943000 }
68520 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
68523 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68524 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960000 }
68526 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68529 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68530 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962000 }
68532 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68535 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68536 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963000 }
68538 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
68541 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68542 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928000 }
68544 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
68547 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68548 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a000 }
68550 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
68553 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68554 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b000 }
68556 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
68559 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68560 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948000 }
68562 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
68565 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68566 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a000 }
68568 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
68571 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68572 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b000 }
68574 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
68577 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68578 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c000 }
68580 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
68583 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68584 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e000 }
68586 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
68589 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68590 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f000 }
68592 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
68595 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68596 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c000 }
68598 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
68601 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68602 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e000 }
68604 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
68607 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68608 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f000 }
68610 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
68613 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
68614 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c000 }
68616 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
68619 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68620 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e000 }
68622 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
68625 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68626 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f000 }
68628 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
68631 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
68632 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968000 }
68634 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
68637 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68638 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a000 }
68640 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
68643 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68644 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b000 }
68646 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68649 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68650 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80000 }
68652 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
68655 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68656 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82000 }
68658 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
68661 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68662 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83000 }
68664 /* dadd.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
68667 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68668 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83000 }
68670 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68673 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68674 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08000 }
68676 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
68679 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68680 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a000 }
68682 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
68685 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68686 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b000 }
68688 /* dadd.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
68691 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68692 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b000 }
68694 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68697 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68698 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00000 }
68700 /* dadd.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
68703 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68704 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02000 }
68706 /* dadd.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
68709 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68710 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03000 }
68712 /* dadd.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
68715 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68716 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03000 }
68718 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
68721 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68722 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20000 }
68724 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68727 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68728 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22000 }
68730 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68733 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68734 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23000 }
68736 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
68739 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68740 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23000 }
68742 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
68745 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68746 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40000 }
68748 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68751 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68752 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42000 }
68754 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68757 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68758 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43000 }
68760 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
68763 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68764 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43000 }
68766 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
68769 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68770 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60000 }
68772 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68775 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68776 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62000 }
68778 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68781 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68782 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63000 }
68784 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
68787 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68788 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63000 }
68790 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
68793 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68794 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28000 }
68796 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
68799 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68800 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a000 }
68802 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
68805 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68806 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b000 }
68808 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
68811 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68812 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b000 }
68814 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
68817 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68818 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48000 }
68820 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
68823 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68824 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a000 }
68826 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
68829 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68830 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b000 }
68832 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
68835 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68836 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b000 }
68838 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
68841 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68842 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c000 }
68844 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
68847 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68848 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e000 }
68850 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
68853 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68854 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f000 }
68856 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
68859 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68860 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f000 }
68862 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68865 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68866 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c000 }
68868 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68871 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68872 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e000 }
68874 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68877 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68878 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f000 }
68880 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68883 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68884 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f000 }
68886 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68889 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68890 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c000 }
68892 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68895 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68896 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e000 }
68898 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68901 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68902 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f000 }
68904 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
68907 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68908 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f000 }
68910 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68913 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68914 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68000 }
68916 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68919 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68920 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a000 }
68922 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68925 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68926 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b000 }
68928 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
68931 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68932 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b000 }
68934 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68937 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68938 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80000 }
68940 /* dadd.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
68943 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68944 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82000 }
68946 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68949 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68950 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08000 }
68952 /* dadd.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
68955 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68956 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a000 }
68958 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68961 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68962 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00000 }
68964 /* dadd.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68967 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68968 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02000 }
68970 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68973 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68974 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20000 }
68976 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68979 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68980 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22000 }
68982 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68985 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68986 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40000 }
68988 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
68991 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68992 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42000 }
68994 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
68997 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68998 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60000 }
69000 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
69003 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69004 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62000 }
69006 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
69009 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69010 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28000 }
69012 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
69015 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69016 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a000 }
69018 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
69021 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69022 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48000 }
69024 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
69027 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69028 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a000 }
69030 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
69033 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69034 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c000 }
69036 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
69039 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69040 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e000 }
69042 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
69045 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69046 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c000 }
69048 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
69051 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69052 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e000 }
69054 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
69057 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
69058 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c000 }
69060 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
69063 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
69064 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e000 }
69066 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
69069 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
69070 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68000 }
69072 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
69075 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
69076 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a000 }
69078 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
69081 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69082 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c800 }
69084 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
69087 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69088 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18820 }
69090 /* dadd.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
69093 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
69094 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18800 }
69096 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
69099 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69100 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c080 }
69102 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
69105 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69106 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a0 }
69108 /* dadd.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
69111 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
69112 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18080 }
69114 /* dadd.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
69117 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69118 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c000 }
69120 /* dadd.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
69123 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69124 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18020 }
69126 /* dadd.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
69129 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69130 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18000 }
69132 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69135 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69136 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20000 }
69138 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69141 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69142 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822000 }
69144 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
69147 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69148 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820000 }
69150 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69153 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69154 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40000 }
69156 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69159 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69160 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842000 }
69162 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
69165 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69166 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840000 }
69168 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69171 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69172 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60000 }
69174 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69177 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69178 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862000 }
69180 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
69183 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69184 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860000 }
69186 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
69189 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69190 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28000 }
69192 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
69195 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69196 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a000 }
69198 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
69201 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69202 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828000 }
69204 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
69207 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69208 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48000 }
69210 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
69213 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69214 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a000 }
69216 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
69219 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69220 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848000 }
69222 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
69225 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69226 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c000 }
69228 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
69231 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69232 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e000 }
69234 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
69237 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69238 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c000 }
69240 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
69243 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69244 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c000 }
69246 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
69249 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69250 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e000 }
69252 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
69255 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69256 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c000 }
69258 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
69261 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69262 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c000 }
69264 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
69267 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69268 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e000 }
69270 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
69273 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
69274 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c000 }
69276 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
69279 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69280 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68000 }
69282 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
69285 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69286 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a000 }
69288 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
69291 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
69292 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868000 }
69294 /* dadd.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
69297 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69298 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1891e00 }
69300 /* dadd.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
69303 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69304 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1819e00 }
69306 /* dadd.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
69309 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69310 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1811e00 }
69312 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69315 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69316 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1831e00 }
69318 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
69321 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69322 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1839e00 }
69324 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
69327 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69328 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183de00 }
69330 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69333 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69334 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1851e00 }
69336 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
69339 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69340 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1859e00 }
69342 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
69345 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69346 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185de00 }
69348 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16} */
69351 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
69352 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187de00 }
69354 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69357 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69358 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1871e00 }
69360 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24} */
69363 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
69364 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1879e00 }
69366 /* dadd.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
69369 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69370 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1881e00 }
69372 /* dadd.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
69375 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69376 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1809e00 }
69378 /* dadd.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
69381 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69382 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1801e00 }
69384 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69387 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69388 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1821e00 }
69390 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
69393 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69394 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1829e00 }
69396 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
69399 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69400 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182de00 }
69402 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69405 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69406 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1841e00 }
69408 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
69411 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69412 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1849e00 }
69414 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
69417 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69418 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184de00 }
69420 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16} */
69423 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
69424 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186de00 }
69426 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69429 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69430 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1861e00 }
69432 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24} */
69435 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
69436 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1869e00 }
69438 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69441 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69442 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990800 }
69444 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
69447 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69448 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992800 }
69450 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
69453 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69454 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993800 }
69456 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69459 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69460 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918800 }
69462 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
69465 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69466 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a800 }
69468 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
69471 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69472 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b800 }
69474 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69477 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69478 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910800 }
69480 /* dadc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
69483 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69484 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912800 }
69486 /* dadc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
69489 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69490 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913800 }
69492 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
69495 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69496 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930800 }
69498 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69501 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69502 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932800 }
69504 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69507 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69508 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933800 }
69510 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
69513 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69514 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950800 }
69516 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69519 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69520 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952800 }
69522 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69525 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69526 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953800 }
69528 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
69531 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69532 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970800 }
69534 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69537 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69538 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972800 }
69540 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69543 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69544 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973800 }
69546 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
69549 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69550 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938800 }
69552 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
69555 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69556 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a800 }
69558 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
69561 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69562 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b800 }
69564 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
69567 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69568 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958800 }
69570 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
69573 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69574 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a800 }
69576 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
69579 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69580 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b800 }
69582 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
69585 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69586 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c800 }
69588 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
69591 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69592 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e800 }
69594 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
69597 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69598 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f800 }
69600 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
69603 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69604 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c800 }
69606 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
69609 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69610 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e800 }
69612 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
69615 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69616 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f800 }
69618 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
69621 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
69622 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c800 }
69624 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
69627 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69628 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e800 }
69630 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
69633 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69634 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f800 }
69636 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
69639 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
69640 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978800 }
69642 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
69645 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69646 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a800 }
69648 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
69651 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69652 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b800 }
69654 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69657 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69658 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90800 }
69660 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
69663 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69664 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92800 }
69666 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
69669 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69670 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93800 }
69672 /* dadc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
69675 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69676 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93800 }
69678 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69681 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69682 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18800 }
69684 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
69687 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69688 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a800 }
69690 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
69693 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69694 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b800 }
69696 /* dadc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
69699 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69700 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b800 }
69702 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69705 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69706 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10800 }
69708 /* dadc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
69711 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69712 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12800 }
69714 /* dadc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
69717 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69718 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13800 }
69720 /* dadc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
69723 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69724 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13800 }
69726 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
69729 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69730 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30800 }
69732 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69735 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69736 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32800 }
69738 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69741 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69742 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33800 }
69744 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
69747 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69748 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33800 }
69750 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
69753 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69754 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50800 }
69756 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69759 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69760 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52800 }
69762 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69765 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69766 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53800 }
69768 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
69771 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69772 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53800 }
69774 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
69777 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69778 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70800 }
69780 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69783 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69784 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72800 }
69786 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69789 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69790 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73800 }
69792 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
69795 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69796 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73800 }
69798 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
69801 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69802 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38800 }
69804 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
69807 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69808 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a800 }
69810 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
69813 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69814 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b800 }
69816 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
69819 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69820 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b800 }
69822 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
69825 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69826 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58800 }
69828 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
69831 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69832 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a800 }
69834 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
69837 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69838 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b800 }
69840 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
69843 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69844 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b800 }
69846 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
69849 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69850 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c800 }
69852 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
69855 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69856 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e800 }
69858 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
69861 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69862 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f800 }
69864 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
69867 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69868 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f800 }
69870 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
69873 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69874 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c800 }
69876 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
69879 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69880 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e800 }
69882 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
69885 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69886 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f800 }
69888 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
69891 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69892 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f800 }
69894 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
69897 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
69898 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c800 }
69900 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
69903 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69904 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e800 }
69906 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
69909 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69910 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f800 }
69912 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
69915 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
69916 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f800 }
69918 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
69921 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
69922 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78800 }
69924 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
69927 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69928 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a800 }
69930 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
69933 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69934 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b800 }
69936 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
69939 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
69940 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b800 }
69942 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69945 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69946 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90800 }
69948 /* dadc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
69951 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69952 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92800 }
69954 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69957 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69958 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18800 }
69960 /* dadc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
69963 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69964 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a800 }
69966 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69969 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69970 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10800 }
69972 /* dadc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
69975 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69976 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12800 }
69978 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
69981 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69982 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30800 }
69984 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
69987 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69988 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32800 }
69990 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
69993 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69994 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50800 }
69996 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
69999 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70000 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52800 }
70002 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70005 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70006 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70800 }
70008 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70011 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70012 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72800 }
70014 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70017 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70018 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38800 }
70020 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70023 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70024 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a800 }
70026 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70029 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70030 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58800 }
70032 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70035 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70036 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a800 }
70038 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70041 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70042 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c800 }
70044 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70047 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70048 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e800 }
70050 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70053 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70054 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c800 }
70056 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70059 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70060 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e800 }
70062 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70065 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70066 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c800 }
70068 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
70071 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70072 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e800 }
70074 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70077 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70078 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78800 }
70080 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
70083 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70084 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a800 }
70086 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
70089 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70090 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c908 }
70092 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
70095 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70096 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18928 }
70098 /* dadc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
70101 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
70102 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18908 }
70104 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
70107 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70108 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c188 }
70110 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
70113 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70114 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a8 }
70116 /* dadc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
70119 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
70120 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18188 }
70122 /* dadc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
70125 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70126 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c108 }
70128 /* dadc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
70131 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70132 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18128 }
70134 /* dadc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
70137 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70138 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18108 }
70140 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70143 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70144 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30800 }
70146 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70149 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70150 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832800 }
70152 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
70155 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70156 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830800 }
70158 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70161 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70162 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50800 }
70164 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70167 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70168 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852800 }
70170 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
70173 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70174 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850800 }
70176 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70179 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70180 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70800 }
70182 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70185 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70186 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872800 }
70188 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
70191 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70192 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870800 }
70194 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
70197 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70198 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38800 }
70200 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
70203 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70204 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a800 }
70206 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
70209 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70210 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838800 }
70212 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
70215 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70216 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58800 }
70218 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
70221 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70222 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a800 }
70224 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
70227 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70228 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858800 }
70230 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
70233 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70234 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c800 }
70236 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
70239 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70240 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e800 }
70242 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
70245 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70246 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c800 }
70248 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
70251 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70252 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c800 }
70254 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
70257 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70258 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e800 }
70260 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
70263 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70264 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c800 }
70266 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
70269 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70270 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c800 }
70272 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
70275 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70276 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e800 }
70278 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
70281 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
70282 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c800 }
70284 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
70287 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70288 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78800 }
70290 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
70293 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70294 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a800 }
70296 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
70299 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
70300 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878800 }
70302 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70305 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70306 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980800 }
70308 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
70311 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70312 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982800 }
70314 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
70317 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70318 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983800 }
70320 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70323 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70324 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908800 }
70326 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
70329 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70330 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a800 }
70332 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
70335 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70336 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b800 }
70338 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70341 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70342 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900800 }
70344 /* dadc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
70347 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70348 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902800 }
70350 /* dadc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
70353 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70354 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903800 }
70356 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
70359 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70360 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920800 }
70362 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70365 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70366 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922800 }
70368 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70371 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70372 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923800 }
70374 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
70377 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70378 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940800 }
70380 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70383 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70384 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942800 }
70386 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70389 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70390 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943800 }
70392 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
70395 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70396 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960800 }
70398 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70401 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70402 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962800 }
70404 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70407 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70408 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963800 }
70410 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
70413 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70414 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928800 }
70416 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
70419 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70420 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a800 }
70422 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
70425 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70426 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b800 }
70428 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
70431 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70432 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948800 }
70434 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
70437 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70438 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a800 }
70440 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
70443 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70444 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b800 }
70446 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
70449 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70450 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c800 }
70452 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
70455 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70456 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e800 }
70458 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
70461 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70462 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f800 }
70464 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
70467 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70468 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c800 }
70470 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
70473 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70474 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e800 }
70476 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
70479 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70480 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f800 }
70482 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
70485 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
70486 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c800 }
70488 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
70491 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70492 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e800 }
70494 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
70497 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70498 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f800 }
70500 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
70503 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
70504 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968800 }
70506 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
70509 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70510 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a800 }
70512 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
70515 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70516 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b800 }
70518 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70521 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70522 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80800 }
70524 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
70527 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70528 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82800 }
70530 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
70533 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70534 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83800 }
70536 /* dadc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
70539 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70540 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83800 }
70542 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70545 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70546 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08800 }
70548 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
70551 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70552 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a800 }
70554 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
70557 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70558 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b800 }
70560 /* dadc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
70563 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70564 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b800 }
70566 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70569 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70570 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00800 }
70572 /* dadc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
70575 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70576 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02800 }
70578 /* dadc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
70581 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70582 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03800 }
70584 /* dadc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
70587 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70588 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03800 }
70590 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
70593 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70594 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20800 }
70596 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70599 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70600 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22800 }
70602 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70605 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70606 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23800 }
70608 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
70611 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70612 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23800 }
70614 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
70617 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70618 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40800 }
70620 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70623 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70624 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42800 }
70626 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70629 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70630 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43800 }
70632 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
70635 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70636 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43800 }
70638 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
70641 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70642 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60800 }
70644 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70647 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70648 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62800 }
70650 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70653 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70654 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63800 }
70656 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
70659 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70660 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63800 }
70662 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
70665 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70666 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28800 }
70668 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
70671 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70672 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a800 }
70674 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
70677 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70678 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b800 }
70680 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
70683 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70684 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b800 }
70686 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
70689 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70690 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48800 }
70692 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
70695 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70696 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a800 }
70698 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
70701 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70702 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b800 }
70704 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
70707 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70708 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b800 }
70710 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
70713 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70714 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c800 }
70716 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
70719 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70720 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e800 }
70722 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
70725 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70726 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f800 }
70728 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
70731 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70732 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f800 }
70734 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
70737 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70738 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c800 }
70740 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
70743 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70744 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e800 }
70746 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
70749 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70750 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f800 }
70752 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
70755 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70756 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f800 }
70758 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
70761 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
70762 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c800 }
70764 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
70767 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70768 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e800 }
70770 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
70773 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70774 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f800 }
70776 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
70779 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
70780 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f800 }
70782 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
70785 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
70786 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68800 }
70788 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
70791 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70792 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a800 }
70794 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
70797 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70798 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b800 }
70800 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
70803 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
70804 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b800 }
70806 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70809 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70810 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80800 }
70812 /* dadc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
70815 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70816 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82800 }
70818 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70821 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70822 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08800 }
70824 /* dadc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
70827 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70828 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a800 }
70830 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70833 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70834 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00800 }
70836 /* dadc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
70839 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70840 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02800 }
70842 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
70845 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70846 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20800 }
70848 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
70851 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70852 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22800 }
70854 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
70857 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70858 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40800 }
70860 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
70863 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70864 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42800 }
70866 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70869 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70870 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60800 }
70872 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70875 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70876 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62800 }
70878 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70881 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70882 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28800 }
70884 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70887 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70888 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a800 }
70890 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70893 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70894 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48800 }
70896 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70899 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70900 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a800 }
70902 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70905 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70906 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c800 }
70908 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70911 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70912 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e800 }
70914 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70917 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70918 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c800 }
70920 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70923 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70924 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e800 }
70926 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70929 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70930 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c800 }
70932 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
70935 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70936 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e800 }
70938 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70941 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70942 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68800 }
70944 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
70947 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70948 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a800 }
70950 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
70953 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70954 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c808 }
70956 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
70959 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70960 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18828 }
70962 /* dadc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
70965 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70966 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18808 }
70968 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
70971 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70972 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c088 }
70974 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
70977 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70978 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a8 }
70980 /* dadc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
70983 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70984 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18088 }
70986 /* dadc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
70989 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70990 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c008 }
70992 /* dadc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
70995 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70996 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18028 }
70998 /* dadc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
71001 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71002 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18008 }
71004 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71007 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71008 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20800 }
71010 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71013 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71014 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822800 }
71016 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
71019 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71020 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820800 }
71022 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71025 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71026 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40800 }
71028 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71031 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71032 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842800 }
71034 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
71037 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71038 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840800 }
71040 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71043 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71044 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60800 }
71046 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71049 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71050 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862800 }
71052 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
71055 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71056 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860800 }
71058 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
71061 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71062 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28800 }
71064 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
71067 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71068 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a800 }
71070 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
71073 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71074 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828800 }
71076 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
71079 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71080 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48800 }
71082 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
71085 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71086 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a800 }
71088 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
71091 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71092 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848800 }
71094 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
71097 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71098 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c800 }
71100 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
71103 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71104 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e800 }
71106 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
71109 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71110 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c800 }
71112 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
71115 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71116 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c800 }
71118 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
71121 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71122 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e800 }
71124 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
71127 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71128 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c800 }
71130 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
71133 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71134 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c800 }
71136 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
71139 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71140 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e800 }
71142 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
71145 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
71146 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c800 }
71148 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
71151 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71152 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68800 }
71154 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
71157 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71158 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a800 }
71160 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
71163 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
71164 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868800 }
71166 /* dadc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
71169 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71170 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1890e00 }
71172 /* dadc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
71175 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71176 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1818e00 }
71178 /* dadc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
71181 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71182 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1810e00 }
71184 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71187 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71188 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830e00 }
71190 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
71193 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71194 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838e00 }
71196 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
71199 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71200 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ce00 }
71202 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71205 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71206 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850e00 }
71208 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
71211 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71212 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858e00 }
71214 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
71217 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71218 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ce00 }
71220 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
71223 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
71224 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ce00 }
71226 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71229 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71230 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870e00 }
71232 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
71235 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
71236 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1878e00 }
71238 /* dadc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
71241 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
71242 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1880e00 }
71244 /* dadc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
71247 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
71248 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1808e00 }
71250 /* dadc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
71253 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71254 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1800e00 }
71256 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71259 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71260 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820e00 }
71262 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
71265 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71266 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828e00 }
71268 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
71271 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71272 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ce00 }
71274 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71277 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71278 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840e00 }
71280 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
71283 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71284 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848e00 }
71286 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
71289 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71290 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ce00 }
71292 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
71295 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
71296 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ce00 }
71298 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71301 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71302 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860e00 }
71304 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
71307 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
71308 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1868e00 }
71310 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71313 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71314 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990400 }
71316 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
71319 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71320 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992400 }
71322 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
71325 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71326 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993400 }
71328 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71331 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71332 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918400 }
71334 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
71337 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71338 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a400 }
71340 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
71343 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71344 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b400 }
71346 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71349 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71350 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910400 }
71352 /* adc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
71355 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71356 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912400 }
71358 /* adc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
71361 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71362 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913400 }
71364 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
71367 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71368 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930400 }
71370 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71373 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71374 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932400 }
71376 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71379 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71380 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933400 }
71382 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
71385 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71386 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950400 }
71388 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71391 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71392 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952400 }
71394 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71397 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71398 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953400 }
71400 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
71403 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71404 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970400 }
71406 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71409 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71410 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972400 }
71412 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71415 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71416 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973400 }
71418 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
71421 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71422 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938400 }
71424 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
71427 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71428 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a400 }
71430 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
71433 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71434 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b400 }
71436 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
71439 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71440 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958400 }
71442 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
71445 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71446 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a400 }
71448 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
71451 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71452 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b400 }
71454 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
71457 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71458 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c400 }
71460 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
71463 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71464 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e400 }
71466 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
71469 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71470 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f400 }
71472 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
71475 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71476 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c400 }
71478 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
71481 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71482 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e400 }
71484 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
71487 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71488 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f400 }
71490 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
71493 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
71494 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c400 }
71496 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
71499 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71500 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e400 }
71502 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
71505 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71506 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f400 }
71508 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
71511 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
71512 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978400 }
71514 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
71517 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71518 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a400 }
71520 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
71523 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71524 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b400 }
71526 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71529 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71530 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90400 }
71532 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
71535 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71536 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92400 }
71538 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
71541 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71542 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93400 }
71544 /* adc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
71547 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71548 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93400 }
71550 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71553 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71554 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18400 }
71556 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
71559 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71560 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a400 }
71562 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
71565 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71566 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b400 }
71568 /* adc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
71571 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71572 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b400 }
71574 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71577 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71578 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10400 }
71580 /* adc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
71583 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71584 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12400 }
71586 /* adc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
71589 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71590 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13400 }
71592 /* adc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
71595 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71596 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13400 }
71598 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
71601 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71602 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30400 }
71604 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71607 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71608 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32400 }
71610 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71613 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71614 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33400 }
71616 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
71619 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71620 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33400 }
71622 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
71625 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71626 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50400 }
71628 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71631 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71632 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52400 }
71634 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71637 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71638 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53400 }
71640 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
71643 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71644 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53400 }
71646 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
71649 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71650 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70400 }
71652 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71655 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71656 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72400 }
71658 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71661 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71662 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73400 }
71664 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
71667 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71668 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73400 }
71670 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
71673 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71674 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38400 }
71676 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
71679 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71680 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a400 }
71682 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
71685 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71686 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b400 }
71688 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
71691 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71692 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b400 }
71694 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
71697 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71698 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58400 }
71700 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
71703 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71704 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a400 }
71706 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
71709 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71710 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b400 }
71712 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
71715 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71716 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b400 }
71718 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
71721 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71722 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c400 }
71724 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
71727 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71728 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e400 }
71730 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
71733 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71734 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f400 }
71736 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
71739 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71740 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f400 }
71742 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
71745 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71746 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c400 }
71748 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
71751 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71752 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e400 }
71754 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
71757 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71758 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f400 }
71760 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
71763 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71764 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f400 }
71766 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
71769 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
71770 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c400 }
71772 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
71775 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71776 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e400 }
71778 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
71781 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71782 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f400 }
71784 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
71787 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
71788 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f400 }
71790 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
71793 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
71794 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78400 }
71796 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
71799 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71800 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a400 }
71802 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
71805 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71806 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b400 }
71808 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
71811 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
71812 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b400 }
71814 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71817 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71818 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90400 }
71820 /* adc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
71823 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71824 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92400 }
71826 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71829 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71830 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18400 }
71832 /* adc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
71835 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71836 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a400 }
71838 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71841 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71842 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10400 }
71844 /* adc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
71847 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71848 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12400 }
71850 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
71853 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71854 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30400 }
71856 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
71859 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71860 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32400 }
71862 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
71865 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71866 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50400 }
71868 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
71871 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71872 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52400 }
71874 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
71877 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71878 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70400 }
71880 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
71883 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71884 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72400 }
71886 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
71889 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71890 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38400 }
71892 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
71895 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71896 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a400 }
71898 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
71901 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71902 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58400 }
71904 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
71907 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71908 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a400 }
71910 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
71913 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71914 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c400 }
71916 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
71919 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71920 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e400 }
71922 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
71925 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71926 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c400 }
71928 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
71931 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71932 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e400 }
71934 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
71937 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
71938 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c400 }
71940 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
71943 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
71944 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e400 }
71946 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
71949 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
71950 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78400 }
71952 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
71955 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
71956 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a400 }
71958 /* adc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
71961 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71962 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c904 }
71964 /* adc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
71967 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71968 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18924 }
71970 /* adc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
71973 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71974 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18904 }
71976 /* adc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
71979 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71980 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c184 }
71982 /* adc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
71985 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71986 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a4 }
71988 /* adc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
71991 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71992 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18184 }
71994 /* adc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
71997 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71998 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c104 }
72000 /* adc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
72003 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72004 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18124 }
72006 /* adc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72009 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72010 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18104 }
72012 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72015 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72016 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30400 }
72018 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72021 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72022 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832400 }
72024 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72027 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72028 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830400 }
72030 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72033 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72034 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50400 }
72036 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72039 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72040 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852400 }
72042 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72045 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72046 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850400 }
72048 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72051 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72052 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70400 }
72054 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72057 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72058 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872400 }
72060 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72063 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72064 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870400 }
72066 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
72069 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72070 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38400 }
72072 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
72075 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72076 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a400 }
72078 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72081 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72082 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838400 }
72084 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
72087 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72088 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58400 }
72090 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
72093 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72094 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a400 }
72096 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72099 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72100 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858400 }
72102 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
72105 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72106 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c400 }
72108 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
72111 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72112 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e400 }
72114 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72117 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72118 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c400 }
72120 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
72123 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72124 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c400 }
72126 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
72129 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72130 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e400 }
72132 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
72135 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72136 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c400 }
72138 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
72141 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72142 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c400 }
72144 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
72147 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72148 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e400 }
72150 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
72153 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
72154 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c400 }
72156 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
72159 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72160 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78400 }
72162 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
72165 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72166 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a400 }
72168 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
72171 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
72172 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878400 }
72174 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72177 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72178 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980400 }
72180 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
72183 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72184 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982400 }
72186 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
72189 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72190 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983400 }
72192 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72195 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72196 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908400 }
72198 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
72201 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72202 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a400 }
72204 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
72207 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72208 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b400 }
72210 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72213 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72214 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900400 }
72216 /* adc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
72219 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72220 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902400 }
72222 /* adc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
72225 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72226 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903400 }
72228 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
72231 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72232 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920400 }
72234 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72237 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72238 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922400 }
72240 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72243 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72244 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923400 }
72246 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
72249 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72250 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940400 }
72252 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72255 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72256 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942400 }
72258 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72261 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72262 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943400 }
72264 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
72267 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72268 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960400 }
72270 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72273 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72274 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962400 }
72276 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72279 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72280 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963400 }
72282 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
72285 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72286 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928400 }
72288 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
72291 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72292 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a400 }
72294 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
72297 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72298 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b400 }
72300 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
72303 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72304 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948400 }
72306 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
72309 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72310 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a400 }
72312 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
72315 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72316 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b400 }
72318 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
72321 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72322 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c400 }
72324 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
72327 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72328 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e400 }
72330 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
72333 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72334 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f400 }
72336 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
72339 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72340 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c400 }
72342 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
72345 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72346 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e400 }
72348 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
72351 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72352 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f400 }
72354 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
72357 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
72358 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c400 }
72360 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
72363 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72364 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e400 }
72366 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
72369 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72370 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f400 }
72372 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
72375 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
72376 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968400 }
72378 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
72381 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72382 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a400 }
72384 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
72387 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72388 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b400 }
72390 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72393 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72394 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80400 }
72396 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
72399 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72400 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82400 }
72402 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
72405 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72406 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83400 }
72408 /* adc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
72411 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72412 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83400 }
72414 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72417 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72418 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08400 }
72420 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
72423 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72424 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a400 }
72426 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
72429 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72430 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b400 }
72432 /* adc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
72435 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72436 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b400 }
72438 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72441 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72442 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00400 }
72444 /* adc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
72447 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72448 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02400 }
72450 /* adc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
72453 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72454 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03400 }
72456 /* adc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
72459 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72460 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03400 }
72462 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
72465 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72466 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20400 }
72468 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72471 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72472 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22400 }
72474 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72477 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72478 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23400 }
72480 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
72483 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72484 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23400 }
72486 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
72489 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72490 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40400 }
72492 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72495 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72496 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42400 }
72498 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72501 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72502 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43400 }
72504 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
72507 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72508 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43400 }
72510 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
72513 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72514 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60400 }
72516 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72519 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72520 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62400 }
72522 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72525 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72526 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63400 }
72528 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
72531 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72532 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63400 }
72534 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
72537 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72538 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28400 }
72540 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
72543 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72544 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a400 }
72546 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
72549 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72550 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b400 }
72552 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
72555 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72556 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b400 }
72558 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
72561 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72562 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48400 }
72564 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
72567 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72568 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a400 }
72570 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
72573 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72574 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b400 }
72576 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
72579 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72580 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b400 }
72582 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
72585 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72586 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c400 }
72588 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
72591 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72592 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e400 }
72594 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
72597 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72598 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f400 }
72600 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
72603 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72604 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f400 }
72606 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
72609 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72610 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c400 }
72612 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
72615 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72616 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e400 }
72618 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
72621 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72622 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f400 }
72624 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
72627 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72628 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f400 }
72630 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
72633 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
72634 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c400 }
72636 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
72639 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72640 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e400 }
72642 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
72645 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72646 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f400 }
72648 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
72651 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
72652 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f400 }
72654 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
72657 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
72658 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68400 }
72660 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
72663 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72664 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a400 }
72666 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
72669 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72670 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b400 }
72672 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
72675 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
72676 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b400 }
72678 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72681 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72682 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80400 }
72684 /* adc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
72687 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72688 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82400 }
72690 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72693 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72694 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08400 }
72696 /* adc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
72699 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72700 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a400 }
72702 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72705 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72706 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00400 }
72708 /* adc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
72711 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72712 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02400 }
72714 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
72717 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72718 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20400 }
72720 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
72723 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72724 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22400 }
72726 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
72729 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72730 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40400 }
72732 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
72735 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72736 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42400 }
72738 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
72741 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72742 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60400 }
72744 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
72747 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72748 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62400 }
72750 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
72753 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72754 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28400 }
72756 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
72759 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72760 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a400 }
72762 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
72765 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72766 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48400 }
72768 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
72771 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72772 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a400 }
72774 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
72777 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72778 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c400 }
72780 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
72783 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72784 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e400 }
72786 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
72789 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72790 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c400 }
72792 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
72795 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72796 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e400 }
72798 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
72801 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
72802 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c400 }
72804 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
72807 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
72808 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e400 }
72810 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
72813 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
72814 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68400 }
72816 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
72819 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
72820 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a400 }
72822 /* adc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
72825 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72826 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c804 }
72828 /* adc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
72831 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72832 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18824 }
72834 /* adc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
72837 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72838 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18804 }
72840 /* adc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
72843 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72844 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c084 }
72846 /* adc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
72849 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72850 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a4 }
72852 /* adc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
72855 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72856 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18084 }
72858 /* adc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
72861 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72862 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c004 }
72864 /* adc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
72867 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72868 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18024 }
72870 /* adc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72873 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72874 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18004 }
72876 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72879 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72880 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20400 }
72882 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72885 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72886 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822400 }
72888 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72891 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72892 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820400 }
72894 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72897 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72898 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40400 }
72900 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72903 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72904 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842400 }
72906 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72909 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72910 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840400 }
72912 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72915 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72916 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60400 }
72918 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72921 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72922 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862400 }
72924 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72927 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72928 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860400 }
72930 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
72933 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72934 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28400 }
72936 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
72939 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72940 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a400 }
72942 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72945 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72946 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828400 }
72948 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
72951 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72952 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48400 }
72954 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
72957 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72958 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a400 }
72960 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72963 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72964 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848400 }
72966 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
72969 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72970 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c400 }
72972 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
72975 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72976 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e400 }
72978 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72981 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72982 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c400 }
72984 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
72987 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72988 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c400 }
72990 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
72993 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72994 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e400 }
72996 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
72999 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
73000 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c400 }
73002 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
73005 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73006 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c400 }
73008 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
73011 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73012 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e400 }
73014 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
73017 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
73018 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c400 }
73020 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
73023 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73024 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68400 }
73026 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
73029 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73030 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a400 }
73032 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
73035 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
73036 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868400 }
73038 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
73041 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73042 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb18000 }
73044 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
73047 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73048 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1a000 }
73050 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
73053 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73054 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb1b000 }
73056 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
73059 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73060 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb18400 }
73062 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
73065 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73066 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb1a400 }
73068 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
73071 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73072 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb1b400 }
73074 /* adc.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73077 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73078 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb18600 }
73080 /* adc.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73083 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73084 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1a600 }
73086 /* adc.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73089 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73090 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb1b600 }
73092 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73095 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73096 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1880000 }
73098 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73101 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73102 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1a80000 }
73104 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73107 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73108 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1b80000 }
73110 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73113 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73114 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb18c0000 }
73116 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73119 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73120 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1ac0000 }
73122 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73125 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73126 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1bc0000 }
73128 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73131 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73132 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb18a0000 }
73134 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73137 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73138 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1aa0000 }
73140 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73143 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73144 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1ba0000 }
73146 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73149 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73150 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb18e0000 }
73152 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73155 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73156 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1ae0000 }
73158 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73161 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73162 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1be0000 }
73164 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73167 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73168 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb18b0000 }
73170 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73173 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73174 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1ab0000 }
73176 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73179 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73180 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1bb0000 }
73182 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73185 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73186 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb18f0000 }
73188 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73191 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73192 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1af0000 }
73194 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73197 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73198 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1bf0000 }
73200 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
73203 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73204 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb1c00000 }
73206 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
73209 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73210 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1e00000 }
73212 /* adc.w${X} ${Dsp-16-u16},$Dst16RnHI */
73215 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
73216 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb1f00000 }
73218 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
73221 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73222 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb1c40000 }
73224 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
73227 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73228 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb1e40000 }
73230 /* adc.w${X} ${Dsp-16-u16},$Dst16AnHI */
73233 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
73234 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb1f40000 }
73236 /* adc.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73239 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73240 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb1c60000 }
73242 /* adc.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73245 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73246 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1e60000 }
73248 /* adc.w${X} ${Dsp-16-u16},[$Dst16An] */
73251 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73252 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb1f60000 }
73254 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73257 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73258 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1c80000 }
73260 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73263 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73264 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1e80000 }
73266 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73269 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73270 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb1f80000 }
73272 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73275 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73276 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1cc0000 }
73278 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73281 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73282 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1ec0000 }
73284 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73287 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73288 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb1fc0000 }
73290 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73293 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73294 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ca0000 }
73296 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73299 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73300 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ea0000 }
73302 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73305 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73306 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb1fa0000 }
73308 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73311 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73312 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ce0000 }
73314 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73317 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73318 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ee0000 }
73320 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73323 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73324 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb1fe0000 }
73326 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73329 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73330 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1cb0000 }
73332 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73335 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73336 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1eb0000 }
73338 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73341 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73342 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb1fb0000 }
73344 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73347 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73348 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb1cf0000 }
73350 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73353 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73354 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb1ef0000 }
73356 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
73359 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73360 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb1ff0000 }
73362 /* adc.w${X} $Src16RnHI,$Dst16RnHI */
73365 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
73366 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb100 }
73368 /* adc.w${X} $Src16AnHI,$Dst16RnHI */
73371 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
73372 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb140 }
73374 /* adc.w${X} [$Src16An],$Dst16RnHI */
73377 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73378 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb160 }
73380 /* adc.w${X} $Src16RnHI,$Dst16AnHI */
73383 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
73384 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb104 }
73386 /* adc.w${X} $Src16AnHI,$Dst16AnHI */
73389 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
73390 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb144 }
73392 /* adc.w${X} [$Src16An],$Dst16AnHI */
73395 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73396 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb164 }
73398 /* adc.w${X} $Src16RnHI,[$Dst16An] */
73401 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73402 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb106 }
73404 /* adc.w${X} $Src16AnHI,[$Dst16An] */
73407 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73408 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb146 }
73410 /* adc.w${X} [$Src16An],[$Dst16An] */
73413 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73414 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb166 }
73416 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
73419 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73420 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb10800 }
73422 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
73425 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73426 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb14800 }
73428 /* adc.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73431 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73432 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb16800 }
73434 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
73437 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73438 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb10c0000 }
73440 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
73443 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73444 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb14c0000 }
73446 /* adc.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73449 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73450 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb16c0000 }
73452 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
73455 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73456 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb10a00 }
73458 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
73461 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73462 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb14a00 }
73464 /* adc.w${X} [$Src16An],${Dsp-16-u8}[sb] */
73467 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73468 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb16a00 }
73470 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
73473 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73474 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb10e0000 }
73476 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
73479 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73480 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb14e0000 }
73482 /* adc.w${X} [$Src16An],${Dsp-16-u16}[sb] */
73485 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73486 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb16e0000 }
73488 /* adc.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
73491 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73492 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb10b00 }
73494 /* adc.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
73497 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73498 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb14b00 }
73500 /* adc.w${X} [$Src16An],${Dsp-16-s8}[fb] */
73503 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73504 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb16b00 }
73506 /* adc.w${X} $Src16RnHI,${Dsp-16-u16} */
73509 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
73510 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb10f0000 }
73512 /* adc.w${X} $Src16AnHI,${Dsp-16-u16} */
73515 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
73516 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb14f0000 }
73518 /* adc.w${X} [$Src16An],${Dsp-16-u16} */
73521 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
73522 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb16f0000 }
73524 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
73527 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73528 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb08000 }
73530 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
73533 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73534 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0a000 }
73536 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
73539 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73540 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb0b000 }
73542 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
73545 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73546 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb08400 }
73548 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
73551 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73552 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb0a400 }
73554 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
73557 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73558 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb0b400 }
73560 /* adc.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73563 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73564 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb08600 }
73566 /* adc.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73569 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73570 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0a600 }
73572 /* adc.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73575 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73576 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb0b600 }
73578 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73581 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73582 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0880000 }
73584 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73587 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73588 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0a80000 }
73590 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73593 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73594 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0b80000 }
73596 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73599 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73600 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb08c0000 }
73602 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73605 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73606 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0ac0000 }
73608 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73611 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73612 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0bc0000 }
73614 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73617 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73618 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb08a0000 }
73620 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73623 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73624 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0aa0000 }
73626 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73629 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73630 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0ba0000 }
73632 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73635 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73636 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb08e0000 }
73638 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73641 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73642 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0ae0000 }
73644 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73647 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73648 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0be0000 }
73650 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73653 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73654 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb08b0000 }
73656 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73659 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73660 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0ab0000 }
73662 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73665 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73666 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0bb0000 }
73668 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73671 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73672 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb08f0000 }
73674 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73677 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73678 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0af0000 }
73680 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73683 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73684 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0bf0000 }
73686 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
73689 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73690 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb0c00000 }
73692 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
73695 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73696 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0e00000 }
73698 /* adc.b${X} ${Dsp-16-u16},$Dst16RnQI */
73701 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
73702 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb0f00000 }
73704 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
73707 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73708 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb0c40000 }
73710 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
73713 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73714 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb0e40000 }
73716 /* adc.b${X} ${Dsp-16-u16},$Dst16AnQI */
73719 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
73720 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb0f40000 }
73722 /* adc.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73725 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73726 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb0c60000 }
73728 /* adc.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73731 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73732 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0e60000 }
73734 /* adc.b${X} ${Dsp-16-u16},[$Dst16An] */
73737 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73738 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb0f60000 }
73740 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73743 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73744 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0c80000 }
73746 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73749 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73750 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0e80000 }
73752 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73755 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73756 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb0f80000 }
73758 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73761 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73762 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0cc0000 }
73764 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73767 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73768 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0ec0000 }
73770 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73773 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73774 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb0fc0000 }
73776 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73779 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73780 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ca0000 }
73782 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73785 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73786 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ea0000 }
73788 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73791 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73792 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb0fa0000 }
73794 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73797 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73798 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ce0000 }
73800 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73803 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73804 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ee0000 }
73806 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73809 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73810 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb0fe0000 }
73812 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73815 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73816 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0cb0000 }
73818 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73821 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73822 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0eb0000 }
73824 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73827 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73828 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb0fb0000 }
73830 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73833 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73834 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb0cf0000 }
73836 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73839 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73840 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb0ef0000 }
73842 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
73845 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73846 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb0ff0000 }
73848 /* adc.b${X} $Src16RnQI,$Dst16RnQI */
73851 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
73852 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb000 }
73854 /* adc.b${X} $Src16AnQI,$Dst16RnQI */
73857 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
73858 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb040 }
73860 /* adc.b${X} [$Src16An],$Dst16RnQI */
73863 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73864 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb060 }
73866 /* adc.b${X} $Src16RnQI,$Dst16AnQI */
73869 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
73870 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb004 }
73872 /* adc.b${X} $Src16AnQI,$Dst16AnQI */
73875 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
73876 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb044 }
73878 /* adc.b${X} [$Src16An],$Dst16AnQI */
73881 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73882 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb064 }
73884 /* adc.b${X} $Src16RnQI,[$Dst16An] */
73887 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73888 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb006 }
73890 /* adc.b${X} $Src16AnQI,[$Dst16An] */
73893 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73894 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb046 }
73896 /* adc.b${X} [$Src16An],[$Dst16An] */
73899 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73900 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb066 }
73902 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
73905 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73906 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb00800 }
73908 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
73911 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73912 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb04800 }
73914 /* adc.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73917 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73918 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb06800 }
73920 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
73923 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73924 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb00c0000 }
73926 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
73929 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73930 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb04c0000 }
73932 /* adc.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73935 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73936 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb06c0000 }
73938 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
73941 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73942 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb00a00 }
73944 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
73947 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73948 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb04a00 }
73950 /* adc.b${X} [$Src16An],${Dsp-16-u8}[sb] */
73953 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73954 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb06a00 }
73956 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
73959 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73960 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb00e0000 }
73962 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
73965 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73966 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb04e0000 }
73968 /* adc.b${X} [$Src16An],${Dsp-16-u16}[sb] */
73971 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73972 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb06e0000 }
73974 /* adc.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
73977 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73978 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb00b00 }
73980 /* adc.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
73983 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73984 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb04b00 }
73986 /* adc.b${X} [$Src16An],${Dsp-16-s8}[fb] */
73989 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73990 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb06b00 }
73992 /* adc.b${X} $Src16RnQI,${Dsp-16-u16} */
73995 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
73996 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb00f0000 }
73998 /* adc.b${X} $Src16AnQI,${Dsp-16-u16} */
74001 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
74002 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb04f0000 }
74004 /* adc.b${X} [$Src16An],${Dsp-16-u16} */
74007 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
74008 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb06f0000 }
74010 /* adc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
74013 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
74014 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892e00 }
74016 /* adc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
74019 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
74020 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181ae00 }
74022 /* adc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
74025 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74026 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812e00 }
74028 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74031 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74032 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832e00 }
74034 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
74037 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74038 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ae00 }
74040 /* adc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
74043 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74044 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ee00 }
74046 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74049 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74050 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852e00 }
74052 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
74055 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74056 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ae00 }
74058 /* adc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
74061 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74062 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ee00 }
74064 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
74067 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
74068 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ee00 }
74070 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74073 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74074 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872e00 }
74076 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
74079 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
74080 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187ae00 }
74082 /* adc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
74085 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
74086 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882e00 }
74088 /* adc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
74091 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
74092 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180ae00 }
74094 /* adc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
74097 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74098 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802e00 }
74100 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74103 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74104 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822e00 }
74106 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
74109 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74110 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ae00 }
74112 /* adc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
74115 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74116 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ee00 }
74118 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74121 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74122 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842e00 }
74124 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
74127 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74128 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ae00 }
74130 /* adc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
74133 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74134 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ee00 }
74136 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
74139 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
74140 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ee00 }
74142 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74145 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74146 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862e00 }
74148 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
74151 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
74152 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186ae00 }
74154 /* adc.w${X} #${Imm-16-HI},$Dst16RnHI */
74157 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
74158 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77600000 }
74160 /* adc.w${X} #${Imm-16-HI},$Dst16AnHI */
74163 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
74164 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77640000 }
74166 /* adc.w${X} #${Imm-16-HI},[$Dst16An] */
74169 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
74170 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77660000 }
74172 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
74175 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74176 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77680000 }
74178 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
74181 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74182 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x776a0000 }
74184 /* adc.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
74187 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74188 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x776b0000 }
74190 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
74193 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74194 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x776c0000 }
74196 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
74199 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74200 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x776e0000 }
74202 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16} */
74205 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
74206 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x776f0000 }
74208 /* adc.b${X} #${Imm-16-QI},$Dst16RnQI */
74211 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
74212 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x766000 }
74214 /* adc.b${X} #${Imm-16-QI},$Dst16AnQI */
74217 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
74218 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x766400 }
74220 /* adc.b${X} #${Imm-16-QI},[$Dst16An] */
74223 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
74224 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x766600 }
74226 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
74229 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74230 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76680000 }
74232 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
74235 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74236 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x766a0000 }
74238 /* adc.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
74241 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74242 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x766b0000 }
74244 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
74247 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74248 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x766c0000 }
74250 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
74253 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74254 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x766e0000 }
74256 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16} */
74259 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
74260 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x766f0000 }
74262 /* add.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
74265 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74266 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x27000000 }
74268 /* add.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
74271 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74272 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x37000000 }
74274 /* add.w${S} #${Imm-24-HI},${Dsp-8-u16} */
74277 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
74278 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x17000000 }
74280 /* add.w${S} #${Imm-8-HI},r0 */
74283 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
74284 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x70000 }
74286 /* add.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
74289 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74290 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x260000 }
74292 /* add.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
74295 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74296 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x360000 }
74298 /* add.b${S} #${Imm-24-QI},${Dsp-8-u16} */
74301 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
74302 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x16000000 }
74304 /* add.b${S} #${Imm-8-QI},r0l */
74307 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
74308 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x600 }
74310 /* add.l${S} #${Imm1-S},a0 */
74313 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '0', 0 } },
74314 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI
, { 0x8c }
74316 /* add.l${S} #${Imm1-S},a1 */
74319 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '1', 0 } },
74320 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI
, { 0x8d }
74322 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74325 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74326 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990200 }
74328 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
74331 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74332 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992200 }
74334 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
74337 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74338 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993200 }
74340 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74343 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74344 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918200 }
74346 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
74349 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74350 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a200 }
74352 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
74355 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74356 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b200 }
74358 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74361 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74362 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910200 }
74364 /* add.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
74367 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74368 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912200 }
74370 /* add.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
74373 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74374 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913200 }
74376 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74379 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74380 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93020000 }
74382 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74385 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74386 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93220000 }
74388 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74391 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74392 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93320000 }
74394 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74397 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74398 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95020000 }
74400 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74403 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74404 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95220000 }
74406 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74409 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74410 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95320000 }
74412 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74415 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74416 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97020000 }
74418 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74421 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74422 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97220000 }
74424 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74427 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74428 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97320000 }
74430 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
74433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74434 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93820000 }
74436 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
74439 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74440 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a20000 }
74442 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
74445 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74446 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b20000 }
74448 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
74451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74452 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95820000 }
74454 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
74457 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74458 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a20000 }
74460 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
74463 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74464 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b20000 }
74466 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
74469 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74470 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c20000 }
74472 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
74475 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74476 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e20000 }
74478 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
74481 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74482 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f20000 }
74484 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
74487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74488 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c20000 }
74490 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
74493 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74494 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e20000 }
74496 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
74499 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74500 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f20000 }
74502 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
74505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
74506 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c20000 }
74508 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
74511 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74512 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e20000 }
74514 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
74517 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74518 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f20000 }
74520 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
74523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
74524 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97820000 }
74526 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
74529 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74530 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a20000 }
74532 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
74535 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74536 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b20000 }
74538 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74541 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74542 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9020000 }
74544 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
74547 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74548 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9220000 }
74550 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
74553 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74554 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9320000 }
74556 /* add.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
74559 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74560 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9320000 }
74562 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74565 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74566 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1820000 }
74568 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
74571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74572 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a20000 }
74574 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
74577 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74578 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b20000 }
74580 /* add.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
74583 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74584 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b20000 }
74586 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74590 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1020000 }
74592 /* add.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
74595 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74596 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1220000 }
74598 /* add.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
74601 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74602 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1320000 }
74604 /* add.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
74607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74608 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1320000 }
74610 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74613 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74614 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3020000 }
74616 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74620 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3220000 }
74622 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74625 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74626 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3320000 }
74628 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
74631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74632 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3320000 }
74634 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74637 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74638 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5020000 }
74640 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74644 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5220000 }
74646 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74649 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74650 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5320000 }
74652 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
74655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74656 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5320000 }
74658 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74661 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74662 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7020000 }
74664 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74668 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7220000 }
74670 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74673 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74674 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7320000 }
74676 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
74679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74680 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7320000 }
74682 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
74685 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74686 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3820000 }
74688 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
74691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74692 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a20000 }
74694 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
74697 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74698 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b20000 }
74700 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
74703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74704 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b20000 }
74706 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
74709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74710 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5820000 }
74712 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
74715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74716 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a20000 }
74718 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
74721 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74722 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b20000 }
74724 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
74727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74728 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b20000 }
74730 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
74733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74734 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c20000 }
74736 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
74739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74740 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e20000 }
74742 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
74745 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74746 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f20000 }
74748 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
74751 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74752 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f20000 }
74754 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
74757 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74758 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c20000 }
74760 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
74763 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74764 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e20000 }
74766 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
74769 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74770 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f20000 }
74772 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
74775 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74776 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f20000 }
74778 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
74781 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
74782 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c20000 }
74784 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
74787 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74788 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e20000 }
74790 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
74793 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74794 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f20000 }
74796 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
74799 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
74800 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f20000 }
74802 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
74805 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
74806 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7820000 }
74808 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
74811 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74812 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a20000 }
74814 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
74817 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74818 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b20000 }
74820 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
74823 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
74824 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b20000 }
74826 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74829 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74830 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9020000 }
74832 /* add.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
74835 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74836 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9220000 }
74838 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74841 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74842 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1820000 }
74844 /* add.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
74847 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74848 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a20000 }
74850 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74853 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74854 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1020000 }
74856 /* add.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
74859 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74860 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1220000 }
74862 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
74865 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74866 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3020000 }
74868 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
74871 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74872 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3220000 }
74874 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
74877 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74878 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5020000 }
74880 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
74883 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74884 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5220000 }
74886 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
74889 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74890 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7020000 }
74892 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
74895 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74896 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7220000 }
74898 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
74901 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74902 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3820000 }
74904 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
74907 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74908 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a20000 }
74910 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
74913 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74914 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5820000 }
74916 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
74919 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74920 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a20000 }
74922 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
74925 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74926 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c20000 }
74928 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
74931 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74932 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e20000 }
74934 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
74937 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74938 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c20000 }
74940 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
74943 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74944 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e20000 }
74946 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
74949 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
74950 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c20000 }
74952 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
74955 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
74956 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e20000 }
74958 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
74961 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
74962 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7820000 }
74964 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
74967 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
74968 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a20000 }
74970 /* add.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
74973 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74974 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc902 }
74976 /* add.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
74979 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74980 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8922 }
74982 /* add.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74985 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74986 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8902 }
74988 /* add.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
74991 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74992 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc182 }
74994 /* add.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
74997 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74998 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a2 }
75000 /* add.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
75003 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75004 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8182 }
75006 /* add.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
75009 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75010 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc102 }
75012 /* add.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
75015 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75016 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8122 }
75018 /* add.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75021 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75022 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8102 }
75024 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75027 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75028 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30200 }
75030 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75033 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75034 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832200 }
75036 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75039 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75040 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830200 }
75042 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75045 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75046 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5020000 }
75048 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75051 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75052 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85220000 }
75054 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75057 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75058 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85020000 }
75060 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75063 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75064 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7020000 }
75066 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75069 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75070 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87220000 }
75072 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75075 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75076 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87020000 }
75078 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
75081 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75082 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38200 }
75084 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
75087 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75088 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a200 }
75090 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75093 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75094 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838200 }
75096 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
75099 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75100 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5820000 }
75102 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
75105 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75106 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a20000 }
75108 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
75111 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75112 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85820000 }
75114 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
75117 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75118 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c200 }
75120 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
75123 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75124 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e200 }
75126 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
75129 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75130 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c200 }
75132 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
75135 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75136 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c20000 }
75138 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
75141 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75142 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e20000 }
75144 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
75147 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75148 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c20000 }
75150 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
75153 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75154 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c20000 }
75156 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
75159 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75160 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e20000 }
75162 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
75165 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
75166 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c20000 }
75168 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
75171 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75172 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7820000 }
75174 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
75177 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75178 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a20000 }
75180 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
75183 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
75184 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87820000 }
75186 /* add.b${S} ${SrcDst16-r0l-r0h-S-normal} */
75189 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
75190 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x20 }
75192 /* add.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
75195 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75196 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2100 }
75198 /* add.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
75201 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75202 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2200 }
75204 /* add.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
75207 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
75208 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x230000 }
75210 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75213 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75214 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990800 }
75216 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
75219 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75220 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992800 }
75222 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
75225 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75226 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993800 }
75228 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75231 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75232 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918800 }
75234 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
75237 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75238 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a800 }
75240 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
75243 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75244 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b800 }
75246 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75249 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75250 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910800 }
75252 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
75255 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75256 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912800 }
75258 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
75261 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75262 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913800 }
75264 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75267 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75268 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93080000 }
75270 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75273 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75274 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93280000 }
75276 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75279 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75280 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93380000 }
75282 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75285 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75286 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95080000 }
75288 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75291 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75292 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95280000 }
75294 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75297 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75298 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95380000 }
75300 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75303 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75304 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97080000 }
75306 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75309 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75310 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97280000 }
75312 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75315 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75316 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97380000 }
75318 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
75321 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75322 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93880000 }
75324 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
75327 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75328 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a80000 }
75330 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
75333 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75334 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b80000 }
75336 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
75339 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75340 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95880000 }
75342 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
75345 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75346 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a80000 }
75348 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
75351 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75352 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b80000 }
75354 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
75357 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75358 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c80000 }
75360 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
75363 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75364 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e80000 }
75366 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
75369 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75370 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f80000 }
75372 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
75375 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75376 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c80000 }
75378 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
75381 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75382 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e80000 }
75384 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
75387 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75388 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f80000 }
75390 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
75393 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
75394 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c80000 }
75396 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
75399 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75400 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e80000 }
75402 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
75405 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75406 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f80000 }
75408 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
75411 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
75412 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97880000 }
75414 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
75417 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75418 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a80000 }
75420 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
75423 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75424 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b80000 }
75426 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75429 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75430 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9080000 }
75432 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
75435 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75436 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9280000 }
75438 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
75441 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75442 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9380000 }
75444 /* add.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
75447 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75448 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9380000 }
75450 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75453 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75454 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1880000 }
75456 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
75459 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75460 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a80000 }
75462 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
75465 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75466 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b80000 }
75468 /* add.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
75471 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75472 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b80000 }
75474 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75477 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75478 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1080000 }
75480 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
75483 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75484 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1280000 }
75486 /* add.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
75489 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75490 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1380000 }
75492 /* add.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
75495 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75496 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1380000 }
75498 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75501 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75502 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3080000 }
75504 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75507 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75508 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3280000 }
75510 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75513 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75514 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3380000 }
75516 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
75519 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75520 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3380000 }
75522 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75525 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75526 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5080000 }
75528 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75531 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75532 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5280000 }
75534 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75537 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75538 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5380000 }
75540 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
75543 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75544 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5380000 }
75546 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75549 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75550 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7080000 }
75552 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75555 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75556 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7280000 }
75558 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75561 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75562 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7380000 }
75564 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
75567 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75568 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7380000 }
75570 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
75573 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75574 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3880000 }
75576 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
75579 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75580 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a80000 }
75582 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
75585 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75586 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b80000 }
75588 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
75591 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75592 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b80000 }
75594 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
75597 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75598 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5880000 }
75600 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
75603 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75604 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a80000 }
75606 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
75609 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75610 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b80000 }
75612 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
75615 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75616 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b80000 }
75618 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
75621 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75622 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c80000 }
75624 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
75627 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75628 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e80000 }
75630 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
75633 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75634 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f80000 }
75636 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
75639 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75640 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f80000 }
75642 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
75645 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75646 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c80000 }
75648 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
75651 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75652 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e80000 }
75654 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
75657 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75658 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f80000 }
75660 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
75663 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75664 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f80000 }
75666 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
75669 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
75670 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c80000 }
75672 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
75675 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75676 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e80000 }
75678 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
75681 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75682 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f80000 }
75684 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
75687 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
75688 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f80000 }
75690 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
75693 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
75694 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7880000 }
75696 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
75699 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75700 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a80000 }
75702 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
75705 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75706 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b80000 }
75708 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
75711 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
75712 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b80000 }
75714 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75717 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75718 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9080000 }
75720 /* add.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
75723 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75724 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9280000 }
75726 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75729 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75730 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1880000 }
75732 /* add.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
75735 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75736 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a80000 }
75738 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75741 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75742 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1080000 }
75744 /* add.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
75747 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75748 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1280000 }
75750 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
75753 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75754 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3080000 }
75756 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
75759 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75760 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3280000 }
75762 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
75765 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75766 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5080000 }
75768 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
75771 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75772 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5280000 }
75774 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
75777 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75778 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7080000 }
75780 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
75783 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75784 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7280000 }
75786 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
75789 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75790 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3880000 }
75792 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
75795 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75796 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a80000 }
75798 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
75801 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75802 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5880000 }
75804 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
75807 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75808 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a80000 }
75810 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
75813 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75814 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c80000 }
75816 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
75819 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75820 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e80000 }
75822 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
75825 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75826 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c80000 }
75828 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
75831 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75832 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e80000 }
75834 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
75837 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
75838 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c80000 }
75840 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
75843 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
75844 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e80000 }
75846 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
75849 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
75850 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7880000 }
75852 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
75855 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
75856 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a80000 }
75858 /* add.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
75861 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75862 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc908 }
75864 /* add.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
75867 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75868 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8928 }
75870 /* add.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75873 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75874 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8908 }
75876 /* add.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
75879 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75880 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc188 }
75882 /* add.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
75885 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75886 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a8 }
75888 /* add.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75891 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75892 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8188 }
75894 /* add.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
75897 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75898 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc108 }
75900 /* add.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
75903 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75904 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8128 }
75906 /* add.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75909 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75910 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8108 }
75912 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75915 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75916 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30800 }
75918 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75921 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75922 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832800 }
75924 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75927 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75928 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830800 }
75930 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75933 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75934 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5080000 }
75936 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75939 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75940 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85280000 }
75942 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75945 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75946 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85080000 }
75948 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75951 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75952 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7080000 }
75954 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75957 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75958 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87280000 }
75960 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75963 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75964 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87080000 }
75966 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
75969 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75970 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38800 }
75972 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
75975 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75976 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a800 }
75978 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75981 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75982 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838800 }
75984 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
75987 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75988 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5880000 }
75990 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
75993 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75994 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a80000 }
75996 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
75999 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76000 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85880000 }
76002 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
76005 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76006 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c800 }
76008 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
76011 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76012 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e800 }
76014 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76017 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76018 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c800 }
76020 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
76023 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76024 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c80000 }
76026 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
76029 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76030 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e80000 }
76032 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76035 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76036 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c80000 }
76038 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
76041 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76042 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c80000 }
76044 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
76047 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76048 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e80000 }
76050 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76053 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76054 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c80000 }
76056 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
76059 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76060 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7880000 }
76062 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
76065 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76066 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a80000 }
76068 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76071 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76072 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87880000 }
76074 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76077 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76078 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980800 }
76080 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
76083 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76084 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982800 }
76086 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
76089 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76090 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983800 }
76092 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76095 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76096 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908800 }
76098 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
76101 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76102 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a800 }
76104 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
76107 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76108 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b800 }
76110 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76113 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76114 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900800 }
76116 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
76119 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76120 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902800 }
76122 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
76125 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76126 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903800 }
76128 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76131 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76132 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92080000 }
76134 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76137 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76138 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92280000 }
76140 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76143 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76144 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92380000 }
76146 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76149 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76150 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94080000 }
76152 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76155 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76156 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94280000 }
76158 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76161 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76162 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94380000 }
76164 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76167 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76168 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96080000 }
76170 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76173 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76174 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96280000 }
76176 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76179 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76180 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96380000 }
76182 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
76185 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76186 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92880000 }
76188 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
76191 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76192 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a80000 }
76194 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
76197 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76198 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b80000 }
76200 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
76203 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76204 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94880000 }
76206 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
76209 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76210 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a80000 }
76212 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
76215 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76216 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b80000 }
76218 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
76221 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76222 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c80000 }
76224 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
76227 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76228 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e80000 }
76230 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
76233 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76234 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f80000 }
76236 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
76239 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76240 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c80000 }
76242 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
76245 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76246 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e80000 }
76248 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
76251 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76252 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f80000 }
76254 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
76257 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
76258 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c80000 }
76260 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
76263 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76264 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e80000 }
76266 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
76269 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76270 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f80000 }
76272 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
76275 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
76276 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96880000 }
76278 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
76281 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76282 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a80000 }
76284 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
76287 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76288 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b80000 }
76290 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76293 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76294 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8080000 }
76296 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
76299 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76300 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8280000 }
76302 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
76305 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76306 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8380000 }
76308 /* add.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
76311 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76312 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8380000 }
76314 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76317 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76318 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0880000 }
76320 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
76323 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76324 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a80000 }
76326 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
76329 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76330 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b80000 }
76332 /* add.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
76335 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76336 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b80000 }
76338 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76341 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76342 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0080000 }
76344 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
76347 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76348 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0280000 }
76350 /* add.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
76353 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76354 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0380000 }
76356 /* add.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
76359 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76360 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0380000 }
76362 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76365 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76366 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2080000 }
76368 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76371 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76372 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2280000 }
76374 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76377 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76378 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2380000 }
76380 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
76383 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76384 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2380000 }
76386 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76389 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76390 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4080000 }
76392 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76395 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76396 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4280000 }
76398 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76401 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76402 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4380000 }
76404 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
76407 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76408 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4380000 }
76410 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76413 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76414 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6080000 }
76416 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76419 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76420 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6280000 }
76422 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76425 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76426 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6380000 }
76428 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
76431 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76432 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6380000 }
76434 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
76437 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76438 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2880000 }
76440 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
76443 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76444 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a80000 }
76446 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
76449 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76450 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b80000 }
76452 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
76455 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76456 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b80000 }
76458 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
76461 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76462 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4880000 }
76464 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
76467 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76468 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a80000 }
76470 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
76473 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76474 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b80000 }
76476 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
76479 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76480 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b80000 }
76482 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
76485 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76486 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c80000 }
76488 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
76491 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76492 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e80000 }
76494 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
76497 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76498 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f80000 }
76500 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
76503 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76504 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f80000 }
76506 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
76509 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76510 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c80000 }
76512 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
76515 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76516 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e80000 }
76518 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
76521 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76522 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f80000 }
76524 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
76527 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76528 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f80000 }
76530 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
76533 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
76534 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c80000 }
76536 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
76539 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76540 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e80000 }
76542 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
76545 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76546 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f80000 }
76548 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
76551 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
76552 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f80000 }
76554 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
76557 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
76558 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6880000 }
76560 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
76563 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76564 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a80000 }
76566 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
76569 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76570 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b80000 }
76572 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
76575 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
76576 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b80000 }
76578 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76581 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76582 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8080000 }
76584 /* add.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
76587 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76588 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8280000 }
76590 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76593 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76594 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0880000 }
76596 /* add.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
76599 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76600 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a80000 }
76602 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76605 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76606 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0080000 }
76608 /* add.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
76611 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76612 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0280000 }
76614 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
76617 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76618 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2080000 }
76620 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
76623 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76624 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2280000 }
76626 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
76629 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76630 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4080000 }
76632 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
76635 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76636 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4280000 }
76638 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
76641 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76642 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6080000 }
76644 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
76647 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76648 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6280000 }
76650 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
76653 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76654 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2880000 }
76656 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
76659 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76660 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a80000 }
76662 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
76665 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76666 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4880000 }
76668 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
76671 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76672 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a80000 }
76674 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
76677 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76678 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c80000 }
76680 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
76683 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76684 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e80000 }
76686 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
76689 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76690 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c80000 }
76692 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
76695 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76696 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e80000 }
76698 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
76701 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
76702 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c80000 }
76704 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
76707 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
76708 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e80000 }
76710 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
76713 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
76714 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6880000 }
76716 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
76719 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
76720 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a80000 }
76722 /* add.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
76725 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76726 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc808 }
76728 /* add.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
76731 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76732 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8828 }
76734 /* add.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76737 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76738 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8808 }
76740 /* add.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
76743 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76744 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc088 }
76746 /* add.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
76749 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76750 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a8 }
76752 /* add.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76755 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76756 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8088 }
76758 /* add.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
76761 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76762 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc008 }
76764 /* add.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
76767 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76768 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8028 }
76770 /* add.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76773 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76774 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8008 }
76776 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76779 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76780 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20800 }
76782 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76785 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76786 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822800 }
76788 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
76791 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76792 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820800 }
76794 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76797 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76798 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4080000 }
76800 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76803 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76804 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84280000 }
76806 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
76809 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76810 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84080000 }
76812 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76815 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76816 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6080000 }
76818 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76821 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76822 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86280000 }
76824 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
76827 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76828 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86080000 }
76830 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
76833 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76834 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28800 }
76836 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
76839 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76840 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a800 }
76842 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
76845 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76846 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828800 }
76848 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
76851 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76852 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4880000 }
76854 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
76857 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76858 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a80000 }
76860 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
76863 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76864 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84880000 }
76866 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
76869 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76870 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c800 }
76872 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
76875 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76876 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e800 }
76878 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76881 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76882 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c800 }
76884 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
76887 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76888 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c80000 }
76890 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
76893 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76894 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e80000 }
76896 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76899 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76900 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c80000 }
76902 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
76905 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76906 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c80000 }
76908 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
76911 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76912 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e80000 }
76914 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76917 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76918 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c80000 }
76920 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
76923 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76924 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6880000 }
76926 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
76929 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76930 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a80000 }
76932 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76935 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76936 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86880000 }
76938 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
76941 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
76942 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa18000 }
76944 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
76947 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76948 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1a000 }
76950 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
76953 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76954 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa1b000 }
76956 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
76959 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
76960 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa18400 }
76962 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
76965 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76966 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa1a400 }
76968 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
76971 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76972 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa1b400 }
76974 /* add.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
76977 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
76978 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa18600 }
76980 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
76983 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
76984 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1a600 }
76986 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
76989 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
76990 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa1b600 }
76992 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
76995 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
76996 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1880000 }
76998 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77001 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77002 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1a80000 }
77004 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77007 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77008 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1b80000 }
77010 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77013 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77014 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa18c0000 }
77016 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77019 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77020 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1ac0000 }
77022 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77025 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77026 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1bc0000 }
77028 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77031 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77032 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa18a0000 }
77034 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77037 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77038 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1aa0000 }
77040 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77043 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77044 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1ba0000 }
77046 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77049 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77050 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa18e0000 }
77052 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77055 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77056 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1ae0000 }
77058 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77061 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77062 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1be0000 }
77064 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77067 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77068 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa18b0000 }
77070 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77073 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77074 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1ab0000 }
77076 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77079 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77080 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1bb0000 }
77082 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77085 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77086 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa18f0000 }
77088 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77091 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77092 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1af0000 }
77094 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77097 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77098 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1bf0000 }
77100 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
77103 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77104 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa1c00000 }
77106 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
77109 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
77110 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1e00000 }
77112 /* add.w${G} ${Dsp-16-u16},$Dst16RnHI */
77115 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
77116 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa1f00000 }
77118 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
77121 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77122 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa1c40000 }
77124 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
77127 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
77128 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa1e40000 }
77130 /* add.w${G} ${Dsp-16-u16},$Dst16AnHI */
77133 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
77134 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa1f40000 }
77136 /* add.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77139 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77140 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa1c60000 }
77142 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77145 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77146 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1e60000 }
77148 /* add.w${G} ${Dsp-16-u16},[$Dst16An] */
77151 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77152 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa1f60000 }
77154 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77157 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77158 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1c80000 }
77160 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77163 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77164 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1e80000 }
77166 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77169 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77170 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa1f80000 }
77172 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77175 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77176 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1cc0000 }
77178 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77181 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77182 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1ec0000 }
77184 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77187 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77188 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa1fc0000 }
77190 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77193 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77194 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ca0000 }
77196 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77199 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77200 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ea0000 }
77202 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77205 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77206 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa1fa0000 }
77208 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77211 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77212 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ce0000 }
77214 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77217 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77218 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ee0000 }
77220 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77223 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77224 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa1fe0000 }
77226 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77229 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77230 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1cb0000 }
77232 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77235 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77236 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1eb0000 }
77238 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77241 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77242 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa1fb0000 }
77244 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77247 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77248 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa1cf0000 }
77250 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77253 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77254 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa1ef0000 }
77256 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
77259 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77260 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa1ff0000 }
77262 /* add.w${G} $Src16RnHI,$Dst16RnHI */
77265 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
77266 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa100 }
77268 /* add.w${G} $Src16AnHI,$Dst16RnHI */
77271 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
77272 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa140 }
77274 /* add.w${G} [$Src16An],$Dst16RnHI */
77277 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77278 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa160 }
77280 /* add.w${G} $Src16RnHI,$Dst16AnHI */
77283 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
77284 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa104 }
77286 /* add.w${G} $Src16AnHI,$Dst16AnHI */
77289 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
77290 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa144 }
77292 /* add.w${G} [$Src16An],$Dst16AnHI */
77295 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77296 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa164 }
77298 /* add.w${G} $Src16RnHI,[$Dst16An] */
77301 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77302 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa106 }
77304 /* add.w${G} $Src16AnHI,[$Dst16An] */
77307 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77308 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa146 }
77310 /* add.w${G} [$Src16An],[$Dst16An] */
77313 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77314 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa166 }
77316 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
77319 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77320 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa10800 }
77322 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
77325 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77326 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa14800 }
77328 /* add.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77331 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77332 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa16800 }
77334 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
77337 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77338 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa10c0000 }
77340 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
77343 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77344 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa14c0000 }
77346 /* add.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77349 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77350 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa16c0000 }
77352 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
77355 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77356 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa10a00 }
77358 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
77361 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77362 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa14a00 }
77364 /* add.w${G} [$Src16An],${Dsp-16-u8}[sb] */
77367 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77368 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa16a00 }
77370 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
77373 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77374 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa10e0000 }
77376 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
77379 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77380 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa14e0000 }
77382 /* add.w${G} [$Src16An],${Dsp-16-u16}[sb] */
77385 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77386 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa16e0000 }
77388 /* add.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
77391 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77392 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa10b00 }
77394 /* add.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
77397 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77398 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa14b00 }
77400 /* add.w${G} [$Src16An],${Dsp-16-s8}[fb] */
77403 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77404 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa16b00 }
77406 /* add.w${G} $Src16RnHI,${Dsp-16-u16} */
77409 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
77410 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa10f0000 }
77412 /* add.w${G} $Src16AnHI,${Dsp-16-u16} */
77415 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
77416 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa14f0000 }
77418 /* add.w${G} [$Src16An],${Dsp-16-u16} */
77421 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77422 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa16f0000 }
77424 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
77427 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77428 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa08000 }
77430 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
77433 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77434 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0a000 }
77436 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
77439 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77440 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa0b000 }
77442 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
77445 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77446 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa08400 }
77448 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
77451 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77452 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa0a400 }
77454 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
77457 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77458 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa0b400 }
77460 /* add.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
77463 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77464 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa08600 }
77466 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
77469 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77470 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0a600 }
77472 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
77475 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77476 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa0b600 }
77478 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
77481 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77482 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0880000 }
77484 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77487 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77488 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0a80000 }
77490 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77493 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77494 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0b80000 }
77496 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77499 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77500 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa08c0000 }
77502 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77505 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77506 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0ac0000 }
77508 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77511 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77512 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0bc0000 }
77514 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77517 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77518 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa08a0000 }
77520 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77523 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77524 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0aa0000 }
77526 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77529 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77530 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0ba0000 }
77532 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77535 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77536 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa08e0000 }
77538 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77541 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77542 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0ae0000 }
77544 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77547 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77548 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0be0000 }
77550 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77553 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77554 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa08b0000 }
77556 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77559 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77560 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0ab0000 }
77562 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77565 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77566 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0bb0000 }
77568 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77571 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77572 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa08f0000 }
77574 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77577 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77578 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0af0000 }
77580 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77583 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77584 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0bf0000 }
77586 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
77589 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77590 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa0c00000 }
77592 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
77595 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77596 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0e00000 }
77598 /* add.b${G} ${Dsp-16-u16},$Dst16RnQI */
77601 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
77602 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa0f00000 }
77604 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
77607 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77608 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa0c40000 }
77610 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
77613 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77614 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa0e40000 }
77616 /* add.b${G} ${Dsp-16-u16},$Dst16AnQI */
77619 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
77620 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa0f40000 }
77622 /* add.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77625 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77626 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa0c60000 }
77628 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77631 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77632 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0e60000 }
77634 /* add.b${G} ${Dsp-16-u16},[$Dst16An] */
77637 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77638 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa0f60000 }
77640 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77643 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77644 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0c80000 }
77646 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77649 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77650 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0e80000 }
77652 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77655 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77656 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa0f80000 }
77658 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77661 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77662 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0cc0000 }
77664 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77667 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77668 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0ec0000 }
77670 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77673 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77674 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa0fc0000 }
77676 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77679 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77680 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ca0000 }
77682 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77685 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77686 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ea0000 }
77688 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77691 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77692 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa0fa0000 }
77694 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77697 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77698 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ce0000 }
77700 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77703 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77704 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ee0000 }
77706 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77709 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77710 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa0fe0000 }
77712 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77715 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77716 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0cb0000 }
77718 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77721 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77722 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0eb0000 }
77724 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77727 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77728 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa0fb0000 }
77730 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77733 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77734 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa0cf0000 }
77736 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77739 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77740 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa0ef0000 }
77742 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
77745 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77746 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa0ff0000 }
77748 /* add.b${G} $Src16RnQI,$Dst16RnQI */
77751 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
77752 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa000 }
77754 /* add.b${G} $Src16AnQI,$Dst16RnQI */
77757 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
77758 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa040 }
77760 /* add.b${G} [$Src16An],$Dst16RnQI */
77763 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77764 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa060 }
77766 /* add.b${G} $Src16RnQI,$Dst16AnQI */
77769 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
77770 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa004 }
77772 /* add.b${G} $Src16AnQI,$Dst16AnQI */
77775 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
77776 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa044 }
77778 /* add.b${G} [$Src16An],$Dst16AnQI */
77781 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77782 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa064 }
77784 /* add.b${G} $Src16RnQI,[$Dst16An] */
77787 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77788 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa006 }
77790 /* add.b${G} $Src16AnQI,[$Dst16An] */
77793 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77794 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa046 }
77796 /* add.b${G} [$Src16An],[$Dst16An] */
77799 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77800 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa066 }
77802 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
77805 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77806 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa00800 }
77808 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
77811 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77812 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa04800 }
77814 /* add.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77817 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77818 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa06800 }
77820 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
77823 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77824 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa00c0000 }
77826 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
77829 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77830 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa04c0000 }
77832 /* add.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77835 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77836 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa06c0000 }
77838 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
77841 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77842 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa00a00 }
77844 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
77847 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77848 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa04a00 }
77850 /* add.b${G} [$Src16An],${Dsp-16-u8}[sb] */
77853 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77854 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa06a00 }
77856 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
77859 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77860 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa00e0000 }
77862 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
77865 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77866 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa04e0000 }
77868 /* add.b${G} [$Src16An],${Dsp-16-u16}[sb] */
77871 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77872 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa06e0000 }
77874 /* add.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
77877 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77878 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa00b00 }
77880 /* add.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
77883 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77884 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa04b00 }
77886 /* add.b${G} [$Src16An],${Dsp-16-s8}[fb] */
77889 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77890 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa06b00 }
77892 /* add.b${G} $Src16RnQI,${Dsp-16-u16} */
77895 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
77896 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa00f0000 }
77898 /* add.b${G} $Src16AnQI,${Dsp-16-u16} */
77901 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
77902 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa04f0000 }
77904 /* add.b${G} [$Src16An],${Dsp-16-u16} */
77907 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77908 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa06f0000 }
77910 /* add.b${S} #${Imm-8-QI},r0l */
77913 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
77914 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8400 }
77916 /* add.b${S} #${Imm-8-QI},r0h */
77919 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
77920 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8300 }
77922 /* add.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
77925 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77926 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x850000 }
77928 /* add.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
77931 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77932 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x860000 }
77934 /* add.b${S} #${Imm-8-QI},${Dsp-16-u16} */
77937 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
77938 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x87000000 }
77940 /* add.l${Q} #${Imm-12-s4},$Dst32RnUnprefixedSI */
77943 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
77944 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xf830 }
77946 /* add.l${Q} #${Imm-12-s4},$Dst32AnUnprefixedSI */
77949 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
77950 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xf0b0 }
77952 /* add.l${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
77955 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77956 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xf030 }
77958 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
77961 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77962 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xf23000 }
77964 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
77967 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77968 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xf4300000 }
77970 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
77973 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77974 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xf6300000 }
77976 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
77979 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77980 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xf2b000 }
77982 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
77985 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77986 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xf4b00000 }
77988 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
77991 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77992 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xf2f000 }
77994 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
77997 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
77998 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xf4f00000 }
78000 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16} */
78003 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78004 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xf6f00000 }
78006 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24} */
78009 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78010 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xf6b00000 }
78012 /* add.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
78015 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78016 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe930 }
78018 /* add.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
78021 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78022 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1b0 }
78024 /* add.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78027 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78028 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe130 }
78030 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78033 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78034 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe33000 }
78036 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78039 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78040 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5300000 }
78042 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78045 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78046 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7300000 }
78048 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78051 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78052 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3b000 }
78054 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78057 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78058 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5b00000 }
78060 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78063 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78064 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3f000 }
78066 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78069 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78070 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5f00000 }
78072 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
78075 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78076 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7f00000 }
78078 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
78081 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78082 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7b00000 }
78084 /* add.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
78087 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78088 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe830 }
78090 /* add.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
78093 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78094 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0b0 }
78096 /* add.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78099 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78100 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe030 }
78102 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78105 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78106 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe23000 }
78108 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78111 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78112 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4300000 }
78114 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78117 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78118 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6300000 }
78120 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78123 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78124 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2b000 }
78126 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78129 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78130 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4b00000 }
78132 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78135 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78136 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2f000 }
78138 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78141 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78142 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4f00000 }
78144 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
78147 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78148 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6f00000 }
78150 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
78153 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78154 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6b00000 }
78156 /* add.w${Q} #${Imm-8-s4},$Dst16RnHI */
78159 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
78160 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xc900 }
78162 /* add.w${Q} #${Imm-8-s4},$Dst16AnHI */
78165 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
78166 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xc904 }
78168 /* add.w${Q} #${Imm-8-s4},[$Dst16An] */
78171 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78172 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xc906 }
78174 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78177 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78178 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xc90800 }
78180 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78183 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78184 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xc90c0000 }
78186 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78189 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78190 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xc90a00 }
78192 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78195 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78196 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xc90e0000 }
78198 /* add.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78201 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78202 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xc90b00 }
78204 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
78207 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78208 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xc90f0000 }
78210 /* add.b${Q} #${Imm-8-s4},$Dst16RnQI */
78213 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
78214 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xc800 }
78216 /* add.b${Q} #${Imm-8-s4},$Dst16AnQI */
78219 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
78220 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xc804 }
78222 /* add.b${Q} #${Imm-8-s4},[$Dst16An] */
78225 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78226 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xc806 }
78228 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78231 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78232 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xc80800 }
78234 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78237 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78238 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xc80c0000 }
78240 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78243 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78244 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xc80a00 }
78246 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78249 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78250 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xc80e0000 }
78252 /* add.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78255 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78256 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xc80b00 }
78258 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
78261 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78262 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xc80f0000 }
78264 /* add.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
78267 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78268 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892e0000 }
78270 /* add.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
78273 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78274 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81ae0000 }
78276 /* add.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
78279 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78280 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812e0000 }
78282 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78285 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78286 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832e0000 }
78288 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78291 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78292 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ae0000 }
78294 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78297 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78298 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ee0000 }
78300 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78303 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78304 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852e0000 }
78306 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78309 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78310 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ae0000 }
78312 /* add.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
78315 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78316 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ee0000 }
78318 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78321 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78322 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ee0000 }
78324 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78327 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78328 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872e0000 }
78330 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24} */
78333 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
78334 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ae0000 }
78336 /* add.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
78339 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78340 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882e00 }
78342 /* add.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
78345 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78346 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80ae00 }
78348 /* add.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
78351 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78352 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802e00 }
78354 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78357 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78358 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822e0000 }
78360 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78363 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78364 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ae0000 }
78366 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78369 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78370 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ee0000 }
78372 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78375 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78376 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842e0000 }
78378 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78381 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78382 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ae0000 }
78384 /* add.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
78387 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78388 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ee0000 }
78390 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78393 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78394 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ee0000 }
78396 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78399 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78400 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862e0000 }
78402 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24} */
78405 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
78406 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ae0000 }
78408 /* add.w${G} #${Imm-16-HI},$Dst16RnHI */
78411 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
78412 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77400000 }
78414 /* add.w${G} #${Imm-16-HI},$Dst16AnHI */
78417 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
78418 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77440000 }
78420 /* add.w${G} #${Imm-16-HI},[$Dst16An] */
78423 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
78424 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77460000 }
78426 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
78429 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78430 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77480000 }
78432 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78435 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78436 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x774a0000 }
78438 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78441 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78442 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x774b0000 }
78444 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
78447 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78448 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x774c0000 }
78450 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78453 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78454 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x774e0000 }
78456 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78459 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78460 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x774f0000 }
78462 /* add.b${G} #${Imm-16-QI},$Dst16RnQI */
78465 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
78466 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x764000 }
78468 /* add.b${G} #${Imm-16-QI},$Dst16AnQI */
78471 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
78472 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x764400 }
78474 /* add.b${G} #${Imm-16-QI},[$Dst16An] */
78477 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
78478 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x764600 }
78480 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
78483 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78484 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76480000 }
78486 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78489 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78490 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x764a0000 }
78492 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78495 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78496 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x764b0000 }
78498 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
78501 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78502 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x764c0000 }
78504 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78507 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78508 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x764e0000 }
78510 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78513 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78514 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x764f0000 }
78516 /* add.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
78519 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
78520 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x88310000 }
78522 /* add.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
78525 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
78526 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80b10000 }
78528 /* add.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
78531 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78532 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x80310000 }
78534 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78537 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78538 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82310000 }
78540 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
78543 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78544 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82b10000 }
78546 /* add.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
78549 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78550 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82f10000 }
78552 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78555 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78556 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84310000 }
78558 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
78561 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78562 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84b10000 }
78564 /* add.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
78567 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78568 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84f10000 }
78570 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16} */
78573 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
78574 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86f10000 }
78576 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78579 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78580 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86310000 }
78582 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24} */
78585 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
78586 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86b10000 }
78588 /* adcf.w $Dst32RnUnprefixedHI */
78591 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78592 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb91e }
78594 /* adcf.w $Dst32AnUnprefixedHI */
78597 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78598 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb19e }
78600 /* adcf.w [$Dst32AnUnprefixed] */
78603 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78604 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb11e }
78606 /* adcf.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78609 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78610 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb31e00 }
78612 /* adcf.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78615 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78616 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb51e0000 }
78618 /* adcf.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78621 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78622 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb71e0000 }
78624 /* adcf.w ${Dsp-16-u8}[sb] */
78627 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78628 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb39e00 }
78630 /* adcf.w ${Dsp-16-u16}[sb] */
78633 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78634 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb59e0000 }
78636 /* adcf.w ${Dsp-16-s8}[fb] */
78639 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78640 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3de00 }
78642 /* adcf.w ${Dsp-16-s16}[fb] */
78645 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78646 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5de0000 }
78648 /* adcf.w ${Dsp-16-u16} */
78651 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78652 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7de0000 }
78654 /* adcf.w ${Dsp-16-u24} */
78657 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78658 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb79e0000 }
78660 /* adcf.b $Dst32RnUnprefixedQI */
78663 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78664 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb81e }
78666 /* adcf.b $Dst32AnUnprefixedQI */
78669 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78670 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb09e }
78672 /* adcf.b [$Dst32AnUnprefixed] */
78675 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78676 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb01e }
78678 /* adcf.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78681 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78682 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb21e00 }
78684 /* adcf.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78687 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78688 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb41e0000 }
78690 /* adcf.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78693 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78694 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb61e0000 }
78696 /* adcf.b ${Dsp-16-u8}[sb] */
78699 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78700 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb29e00 }
78702 /* adcf.b ${Dsp-16-u16}[sb] */
78705 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78706 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb49e0000 }
78708 /* adcf.b ${Dsp-16-s8}[fb] */
78711 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78712 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2de00 }
78714 /* adcf.b ${Dsp-16-s16}[fb] */
78717 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78718 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4de0000 }
78720 /* adcf.b ${Dsp-16-u16} */
78723 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78724 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6de0000 }
78726 /* adcf.b ${Dsp-16-u24} */
78729 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78730 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb69e0000 }
78732 /* adcf.w $Dst16RnHI */
78735 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78736 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77e0 }
78738 /* adcf.w $Dst16AnHI */
78741 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
78742 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77e4 }
78744 /* adcf.w [$Dst16An] */
78747 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78748 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77e6 }
78750 /* adcf.w ${Dsp-16-u8}[$Dst16An] */
78753 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78754 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77e800 }
78756 /* adcf.w ${Dsp-16-u16}[$Dst16An] */
78759 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78760 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ec0000 }
78762 /* adcf.w ${Dsp-16-u8}[sb] */
78765 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78766 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ea00 }
78768 /* adcf.w ${Dsp-16-u16}[sb] */
78771 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78772 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ee0000 }
78774 /* adcf.w ${Dsp-16-s8}[fb] */
78777 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78778 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77eb00 }
78780 /* adcf.w ${Dsp-16-u16} */
78783 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78784 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ef0000 }
78786 /* adcf.b $Dst16RnQI */
78789 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
78790 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76e0 }
78792 /* adcf.b $Dst16AnQI */
78795 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
78796 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76e4 }
78798 /* adcf.b [$Dst16An] */
78801 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78802 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76e6 }
78804 /* adcf.b ${Dsp-16-u8}[$Dst16An] */
78807 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78808 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76e800 }
78810 /* adcf.b ${Dsp-16-u16}[$Dst16An] */
78813 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78814 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ec0000 }
78816 /* adcf.b ${Dsp-16-u8}[sb] */
78819 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78820 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ea00 }
78822 /* adcf.b ${Dsp-16-u16}[sb] */
78825 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78826 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ee0000 }
78828 /* adcf.b ${Dsp-16-s8}[fb] */
78831 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78832 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76eb00 }
78834 /* adcf.b ${Dsp-16-u16} */
78837 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78838 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ef0000 }
78840 /* abs.w $Dst32RnUnprefixedHI */
78843 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78844 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91f }
78846 /* abs.w $Dst32AnUnprefixedHI */
78849 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78850 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19f }
78852 /* abs.w [$Dst32AnUnprefixed] */
78855 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78856 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11f }
78858 /* abs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78861 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78862 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31f00 }
78864 /* abs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78867 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78868 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51f0000 }
78870 /* abs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78873 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78874 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71f0000 }
78876 /* abs.w ${Dsp-16-u8}[sb] */
78879 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78880 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39f00 }
78882 /* abs.w ${Dsp-16-u16}[sb] */
78885 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78886 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59f0000 }
78888 /* abs.w ${Dsp-16-s8}[fb] */
78891 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78892 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3df00 }
78894 /* abs.w ${Dsp-16-s16}[fb] */
78897 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78898 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5df0000 }
78900 /* abs.w ${Dsp-16-u16} */
78903 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78904 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7df0000 }
78906 /* abs.w ${Dsp-16-u24} */
78909 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78910 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79f0000 }
78912 /* abs.b $Dst32RnUnprefixedQI */
78915 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78916 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81f }
78918 /* abs.b $Dst32AnUnprefixedQI */
78921 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78922 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09f }
78924 /* abs.b [$Dst32AnUnprefixed] */
78927 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78928 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01f }
78930 /* abs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78933 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78934 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21f00 }
78936 /* abs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78939 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78940 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41f0000 }
78942 /* abs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78945 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78946 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61f0000 }
78948 /* abs.b ${Dsp-16-u8}[sb] */
78951 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78952 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29f00 }
78954 /* abs.b ${Dsp-16-u16}[sb] */
78957 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78958 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49f0000 }
78960 /* abs.b ${Dsp-16-s8}[fb] */
78963 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78964 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2df00 }
78966 /* abs.b ${Dsp-16-s16}[fb] */
78969 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78970 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4df0000 }
78972 /* abs.b ${Dsp-16-u16} */
78975 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78976 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6df0000 }
78978 /* abs.b ${Dsp-16-u24} */
78981 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78982 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69f0000 }
78984 /* abs.w $Dst16RnHI */
78987 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78988 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77f0 }
78990 /* abs.w $Dst16AnHI */
78993 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
78994 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77f4 }
78996 /* abs.w [$Dst16An] */
78999 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79000 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77f6 }
79002 /* abs.w ${Dsp-16-u8}[$Dst16An] */
79005 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79006 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77f800 }
79008 /* abs.w ${Dsp-16-u16}[$Dst16An] */
79011 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79012 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77fc0000 }
79014 /* abs.w ${Dsp-16-u8}[sb] */
79017 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79018 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77fa00 }
79020 /* abs.w ${Dsp-16-u16}[sb] */
79023 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79024 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77fe0000 }
79026 /* abs.w ${Dsp-16-s8}[fb] */
79029 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79030 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77fb00 }
79032 /* abs.w ${Dsp-16-u16} */
79035 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79036 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ff0000 }
79038 /* abs.b $Dst16RnQI */
79041 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
79042 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76f0 }
79044 /* abs.b $Dst16AnQI */
79047 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
79048 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76f4 }
79050 /* abs.b [$Dst16An] */
79053 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79054 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76f6 }
79056 /* abs.b ${Dsp-16-u8}[$Dst16An] */
79059 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79060 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76f800 }
79062 /* abs.b ${Dsp-16-u16}[$Dst16An] */
79065 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79066 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76fc0000 }
79068 /* abs.b ${Dsp-16-u8}[sb] */
79071 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79072 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76fa00 }
79074 /* abs.b ${Dsp-16-u16}[sb] */
79077 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79078 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76fe0000 }
79080 /* abs.b ${Dsp-16-s8}[fb] */
79083 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79084 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76fb00 }
79086 /* abs.b ${Dsp-16-u16} */
79089 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79090 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ff0000 }
79092 /* add.w$Q #${Imm-12-s4},sp */
79095 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
79096 & ifmt_add16_wQ_sp
, { 0x7db0 }
79098 /* add.b$G #${Imm-16-QI},sp */
79101 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79102 & ifmt_add16_b_G_sp
, { 0x7ceb00 }
79104 /* add.w$G #${Imm-16-HI},sp */
79107 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79108 & ifmt_add16_w_G_sp
, { 0x7deb0000 }
79110 /* add.l$Q #${Imm3-S},sp */
79113 { { MNEM
, OP (Q
), ' ', '#', OP (IMM3_S
), ',', 's', 'p', 0 } },
79114 & ifmt_add32_l_imm3_Q
, { 0x42 }
79116 /* add.l$S #${Imm-16-QI},sp */
79119 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79120 & ifmt_add32_l_imm8_S
, { 0xb60300 }
79122 /* add.l$G #${Imm-16-HI},sp */
79125 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79126 & ifmt_add32_l_imm16_G
, { 0xb6130000 }
79128 /* dadc.b #${Imm-16-QI},r0l */
79131 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79132 & ifmt_add32_l_imm8_S
, { 0x7cee00 }
79134 /* dadc.w #${Imm-16-HI},r0 */
79137 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79138 & ifmt_add32_l_imm16_G
, { 0x7dee0000 }
79140 /* dadc.b r0h,r0l */
79143 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79144 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce6 }
79149 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79150 & ifmt_dadc16_b_r0h_r0l
, { 0x7de6 }
79152 /* dadd.b #${Imm-16-QI},r0l */
79155 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79156 & ifmt_add32_l_imm8_S
, { 0x7cec00 }
79158 /* dadd.w #${Imm-16-HI},r0 */
79161 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79162 & ifmt_add32_l_imm16_G
, { 0x7dec0000 }
79164 /* dadd.b r0h,r0l */
79167 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79168 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce4 }
79173 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79174 & ifmt_dadc16_b_r0h_r0l
, { 0x7de4 }
79179 { { MNEM
, OP (COND16C
), ' ', 'c', 0 } },
79180 & ifmt_bm16_c
, { 0x7dd0 }
79185 { { MNEM
, OP (COND32
), ' ', 'c', 0 } },
79186 & ifmt_bm32_c
, { 0xd928 }
79192 & ifmt_brk16
, { 0x0 }
79198 & ifmt_brk16
, { 0x0 }
79204 & ifmt_brk16
, { 0x8 }
79206 /* btst:s ${Bit3-S},${Dsp-8-u16} */
79209 { { MNEM
, ' ', OP (BIT3_S
), ',', OP (DSP_8_U16
), 0 } },
79210 & ifmt_btst_s
, { 0xa0000 }
79212 /* dec.w ${Dst16An-S} */
79215 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79216 & ifmt_dec16_w
, { 0xf2 }
79218 /* div.b #${Imm-16-QI} */
79221 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79222 & ifmt_add16_b_G_sp
, { 0x7ce100 }
79224 /* div.w #${Imm-16-HI} */
79227 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79228 & ifmt_add16_w_G_sp
, { 0x7de10000 }
79230 /* div.b #${Imm-16-QI} */
79233 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79234 & ifmt_div32_b_Imm_16_QI
, { 0xb04300 }
79236 /* div.w #${Imm-16-HI} */
79239 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79240 & ifmt_div32_w_Imm_16_HI
, { 0xb0530000 }
79242 /* divu.b #${Imm-16-QI} */
79245 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79246 & ifmt_add16_b_G_sp
, { 0x7ce000 }
79248 /* divu.w #${Imm-16-HI} */
79251 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79252 & ifmt_add16_w_G_sp
, { 0x7de00000 }
79254 /* divu.b #${Imm-16-QI} */
79257 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79258 & ifmt_div32_b_Imm_16_QI
, { 0xb00300 }
79260 /* divu.w #${Imm-16-HI} */
79263 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79264 & ifmt_div32_w_Imm_16_HI
, { 0xb0130000 }
79266 /* divx.b #${Imm-16-QI} */
79269 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79270 & ifmt_add16_b_G_sp
, { 0x7ce300 }
79272 /* divx.w #${Imm-16-HI} */
79275 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79276 & ifmt_add16_w_G_sp
, { 0x7de30000 }
79278 /* divx.b #${Imm-16-QI} */
79281 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79282 & ifmt_div32_b_Imm_16_QI
, { 0xb24300 }
79284 /* divx.w #${Imm-16-HI} */
79287 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79288 & ifmt_div32_w_Imm_16_HI
, { 0xb2530000 }
79290 /* dsbb.b #${Imm-16-QI},r0l */
79293 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79294 & ifmt_add32_l_imm8_S
, { 0x7cef00 }
79296 /* dsbb.w #${Imm-16-HI},r0 */
79299 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79300 & ifmt_add32_l_imm16_G
, { 0x7def0000 }
79302 /* dsbb.b r0h,r0l */
79305 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79306 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce7 }
79311 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79312 & ifmt_dadc16_b_r0h_r0l
, { 0x7de7 }
79314 /* dsub.b #${Imm-16-QI},r0l */
79317 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79318 & ifmt_add32_l_imm8_S
, { 0x7ced00 }
79320 /* dsub.w #${Imm-16-HI},r0 */
79323 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79324 & ifmt_add32_l_imm16_G
, { 0x7ded0000 }
79326 /* dsub.b r0h,r0l */
79329 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79330 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce5 }
79335 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79336 & ifmt_dadc16_b_r0h_r0l
, { 0x7de5 }
79338 /* enter #${Dsp-16-u8} */
79341 { { MNEM
, ' ', '#', OP (DSP_16_U8
), 0 } },
79342 & ifmt_enter16
, { 0x7cf200 }
79348 & ifmt_dadc16_b_r0h_r0l
, { 0x7df2 }
79350 /* enter #${Dsp-8-u8} */
79353 { { MNEM
, ' ', '#', OP (DSP_8_U8
), 0 } },
79354 & ifmt_enter32
, { 0xec00 }
79360 & ifmt_brk16
, { 0xfc }
79362 /* fclr ${flags16} */
79365 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79366 & ifmt_fclr16
, { 0xeb05 }
79368 /* fset ${flags16} */
79371 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79372 & ifmt_fclr16
, { 0xeb04 }
79374 /* fclr ${flags32} */
79377 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79378 & ifmt_fclr
, { 0xd3e8 }
79380 /* fset ${flags32} */
79383 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79384 & ifmt_fclr
, { 0xd1e8 }
79386 /* inc.w ${Dst16An-S} */
79389 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79390 & ifmt_dec16_w
, { 0xb2 }
79396 & ifmt_brk16
, { 0x9f }
79398 /* int #${Dsp-10-u6} */
79401 { { MNEM
, ' ', '#', OP (DSP_10_U6
), 0 } },
79402 & ifmt_int16
, { 0xebc0 }
79408 & ifmt_brk16
, { 0xf6 }
79410 /* int #${Dsp-8-u6} */
79413 { { MNEM
, ' ', '#', OP (DSP_8_U6
), 0 } },
79414 & ifmt_int32
, { 0xbe00 }
79420 & ifmt_brk16
, { 0xbf }
79422 /* j$cond16j5 ${Lab-8-8} */
79425 { { MNEM
, OP (COND16J5
), ' ', OP (LAB_8_8
), 0 } },
79426 & ifmt_jcnd16_5
, { 0x6800 }
79428 /* j$cond16j ${Lab-16-8} */
79431 { { MNEM
, OP (COND16J
), ' ', OP (LAB_16_8
), 0 } },
79432 & ifmt_jcnd16
, { 0x7dc000 }
79434 /* j$cond32j ${Lab-8-8} */
79437 { { MNEM
, OP (COND32J
), ' ', OP (LAB_8_8
), 0 } },
79438 & ifmt_jcnd32
, { 0x8a00 }
79440 /* jmp.s ${Lab-5-3} */
79443 { { MNEM
, ' ', OP (LAB_5_3
), 0 } },
79444 & ifmt_jmp16_s
, { 0x60 }
79446 /* jmp.b ${Lab-8-8} */
79449 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79450 & ifmt_jmp16_b
, { 0xfe00 }
79452 /* jmp.w ${Lab-8-16} */
79455 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79456 & ifmt_jmp16_w
, { 0xf40000 }
79458 /* jmp.a ${Lab-8-24} */
79461 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79462 & ifmt_jmp16_a
, { 0xfc000000 }
79464 /* jmps #${Imm-8-QI} */
79467 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79468 & ifmt_jmps16
, { 0xee00 }
79470 /* jmp.s ${Lab32-jmp-s} */
79473 { { MNEM
, ' ', OP (LAB32_JMP_S
), 0 } },
79474 & ifmt_jmp32_s
, { 0x4a }
79476 /* jmp.b ${Lab-8-8} */
79479 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79480 & ifmt_jmp16_b
, { 0xbb00 }
79482 /* jmp.w ${Lab-8-16} */
79485 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79486 & ifmt_jmp16_w
, { 0xce0000 }
79488 /* jmp.a ${Lab-8-24} */
79491 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79492 & ifmt_jmp16_a
, { 0xcc000000 }
79494 /* jmps #${Imm-8-QI} */
79497 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79498 & ifmt_jmps16
, { 0xdc00 }
79500 /* jsr.w ${Lab-8-16} */
79503 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79504 & ifmt_jmp16_w
, { 0xf50000 }
79506 /* jsr.a ${Lab-8-24} */
79509 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79510 & ifmt_jmp16_a
, { 0xfd000000 }
79512 /* jsr.w ${Lab-8-16} */
79515 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79516 & ifmt_jmp16_w
, { 0xcf0000 }
79518 /* jsr.a ${Lab-8-24} */
79521 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79522 & ifmt_jmp16_a
, { 0xcd000000 }
79524 /* jsrs #${Imm-8-QI} */
79527 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79528 & ifmt_jmps16
, { 0xef00 }
79530 /* jsrs #${Imm-8-QI} */
79533 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79534 & ifmt_jmps16
, { 0xdd00 }
79536 /* ldc #${Imm-16-HI},${cr16} */
79539 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR16
), 0 } },
79540 & ifmt_ldc16_imm16
, { 0xeb000000 }
79542 /* ldc #${Imm-16-HI},${cr1-Unprefixed-32} */
79545 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR1_UNPREFIXED_32
), 0 } },
79546 & ifmt_ldc32_imm16_cr1
, { 0xd5a80000 }
79548 /* ldc #${Dsp-16-u24},${cr2-32} */
79551 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
79552 & ifmt_ldc32_imm16_cr2
, { 0xd5280000 }
79554 /* ldc #${Dsp-16-u24},${cr3-Unprefixed-32} */
79557 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR3_UNPREFIXED_32
), 0 } },
79558 & ifmt_ldc32_imm16_cr3
, { 0xd5680000 }
79560 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79563 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79564 & ifmt_ldctx16
, { 0x7cf00000 }
79566 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79569 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79570 & ifmt_ldctx16
, { 0xb6c30000 }
79572 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79575 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79576 & ifmt_ldctx16
, { 0x7df00000 }
79578 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79581 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79582 & ifmt_ldctx16
, { 0xb6d30000 }
79584 /* ldipl #${Imm-13-u3} */
79587 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79588 & ifmt_ldipl16_imm
, { 0x7da0 }
79590 /* ldipl #${Imm-13-u3} */
79593 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79594 & ifmt_ldipl16_imm
, { 0xd5e8 }
79596 /* mov.b$S #${Imm-8-QI},a0 */
79599 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '0', 0 } },
79600 & ifmt_jmps16
, { 0xe200 }
79602 /* mov.b$S #${Imm-8-QI},a1 */
79605 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '1', 0 } },
79606 & ifmt_jmps16
, { 0xea00 }
79608 /* mov.w$S #${Imm-8-HI},a0 */
79611 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79612 & ifmt_mov16_w_S_imm_a0
, { 0xa20000 }
79614 /* mov.w$S #${Imm-8-HI},a1 */
79617 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79618 & ifmt_mov16_w_S_imm_a0
, { 0xaa0000 }
79620 /* mov.w$S #${Imm-8-HI},a0 */
79623 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79624 & ifmt_mov16_w_S_imm_a0
, { 0x9c0000 }
79626 /* mov.w$S #${Imm-8-HI},a1 */
79629 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79630 & ifmt_mov16_w_S_imm_a0
, { 0x9d0000 }
79632 /* mov.l$S #${Dsp-8-s24},a0 */
79635 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '0', 0 } },
79636 & ifmt_mov32_l_a0
, { 0xbc000000 }
79638 /* mov.l$S #${Dsp-8-s24},a1 */
79641 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '1', 0 } },
79642 & ifmt_mov32_l_a0
, { 0xbd000000 }
79644 /* mov.b$S r0l,a1 */
79647 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'a', '1', 0 } },
79648 & ifmt_brk16
, { 0x34 }
79650 /* mov.b$S r0h,a0 */
79653 { { MNEM
, OP (S
), ' ', 'r', '0', 'h', ',', 'a', '0', 0 } },
79654 & ifmt_brk16
, { 0x30 }
79660 & ifmt_brk16
, { 0x4 }
79666 & ifmt_brk16
, { 0xde }
79671 { { MNEM
, ' ', OP (CR16
), 0 } },
79672 & ifmt_popc16_imm16
, { 0xeb03 }
79674 /* popc ${cr1-Unprefixed-32} */
79677 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79678 & ifmt_popc32_imm16_cr1
, { 0xd3a8 }
79680 /* popc ${cr2-32} */
79683 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79684 & ifmt_popc32_imm16_cr2
, { 0xd328 }
79686 /* pushc ${cr16} */
79689 { { MNEM
, ' ', OP (CR16
), 0 } },
79690 & ifmt_popc16_imm16
, { 0xeb02 }
79692 /* pushc ${cr1-Unprefixed-32} */
79695 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79696 & ifmt_popc32_imm16_cr1
, { 0xd1a8 }
79698 /* pushc ${cr2-32} */
79701 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79702 & ifmt_popc32_imm16_cr2
, { 0xd128 }
79704 /* popm ${Regsetpop} */
79707 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79708 & ifmt_popm16
, { 0xed00 }
79710 /* pushm ${Regsetpush} */
79713 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79714 & ifmt_pushm16
, { 0xec00 }
79716 /* popm ${Regsetpop} */
79719 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79720 & ifmt_popm16
, { 0x8e00 }
79722 /* pushm ${Regsetpush} */
79725 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79726 & ifmt_pushm16
, { 0x8f00 }
79728 /* push.b$G #${Imm-16-QI} */
79731 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), 0 } },
79732 & ifmt_add32_l_imm8_S
, { 0x7ce200 }
79734 /* push.w$G #${Imm-16-HI} */
79737 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), 0 } },
79738 & ifmt_add32_l_imm16_G
, { 0x7de20000 }
79740 /* push.b #${Imm-8-QI} */
79743 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79744 & ifmt_jmps16
, { 0xae00 }
79746 /* push.w #${Imm-8-HI} */
79749 { { MNEM
, ' ', '#', OP (IMM_8_HI
), 0 } },
79750 & ifmt_mov16_w_S_imm_a0
, { 0xaf0000 }
79752 /* push.l #${Imm-16-SI} */
79755 { { MNEM
, ' ', '#', OP (IMM_16_SI
), 0 } },
79756 & ifmt_push32_l_imm
, { 0xb6530000 }
79762 & ifmt_brk16
, { 0xfb }
79768 & ifmt_brk16
, { 0x9e }
79774 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf1 }
79780 & ifmt_dadc16_b_r0h_r0l
, { 0x7df1 }
79786 & ifmt_dadc16_b_r0h_r0l
, { 0xb843 }
79792 & ifmt_dadc16_b_r0h_r0l
, { 0xb853 }
79798 & ifmt_brk16
, { 0xf3 }
79804 & ifmt_brk16
, { 0xdf }
79810 & ifmt_dadc16_b_r0h_r0l
, { 0xb8c3 }
79816 & ifmt_dadc16_b_r0h_r0l
, { 0xb8d3 }
79818 /* sha.l #${Imm-sh-12-s4},r2r0 */
79821 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79822 & ifmt_sha16_L_imm_r2r0
, { 0xeba0 }
79824 /* sha.l #${Imm-sh-12-s4},r3r1 */
79827 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79828 & ifmt_sha16_L_imm_r2r0
, { 0xebb0 }
79830 /* sha.l r1h,r2r0 */
79833 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79834 & ifmt_dadc16_b_r0h_r0l
, { 0xeb21 }
79836 /* sha.l r1h,r3r1 */
79839 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79840 & ifmt_dadc16_b_r0h_r0l
, { 0xeb31 }
79842 /* shl.l #${Imm-sh-12-s4},r2r0 */
79845 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79846 & ifmt_sha16_L_imm_r2r0
, { 0xeb80 }
79848 /* shl.l #${Imm-sh-12-s4},r3r1 */
79851 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79852 & ifmt_sha16_L_imm_r2r0
, { 0xeb90 }
79854 /* shl.l r1h,r2r0 */
79857 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79858 & ifmt_dadc16_b_r0h_r0l
, { 0xeb01 }
79860 /* shl.l r1h,r3r1 */
79863 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79864 & ifmt_dadc16_b_r0h_r0l
, { 0xeb11 }
79870 & ifmt_dadc16_b_r0h_r0l
, { 0xb283 }
79876 & ifmt_dadc16_b_r0h_r0l
, { 0xb293 }
79882 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce9 }
79888 & ifmt_dadc16_b_r0h_r0l
, { 0x7de9 }
79894 & ifmt_dadc16_b_r0h_r0l
, { 0xb683 }
79900 & ifmt_dadc16_b_r0h_r0l
, { 0xb693 }
79906 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce8 }
79912 & ifmt_dadc16_b_r0h_r0l
, { 0x7de8 }
79918 & ifmt_dadc16_b_r0h_r0l
, { 0xb083 }
79924 & ifmt_dadc16_b_r0h_r0l
, { 0xb093 }
79930 & ifmt_dadc16_b_r0h_r0l
, { 0xb883 }
79936 & ifmt_dadc16_b_r0h_r0l
, { 0xb893 }
79942 & ifmt_dadc16_b_r0h_r0l
, { 0xb483 }
79948 & ifmt_dadc16_b_r0h_r0l
, { 0xb493 }
79954 & ifmt_dadc16_b_r0h_r0l
, { 0x7cea }
79960 & ifmt_dadc16_b_r0h_r0l
, { 0x7dea }
79966 & ifmt_dadc16_b_r0h_r0l
, { 0xb803 }
79972 & ifmt_dadc16_b_r0h_r0l
, { 0xb813 }
79974 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0h */
79977 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'h', 0 } },
79978 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdb0000 }
79980 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0l */
79983 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79984 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdc0000 }
79986 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb] */
79989 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79990 & ifmt_stzx16_imm8_imm8_dsp8sb
, { 0xdd000000 }
79992 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb] */
79995 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79996 & ifmt_stzx16_imm8_imm8_dsp8fb
, { 0xde000000 }
79998 /* stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16} */
80001 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
80002 & ifmt_stzx16_imm8_imm8_abs16
, { 0xdf000000 }
80008 & ifmt_brk16
, { 0xff }
80014 & ifmt_brk16
, { 0xff }
80020 & ifmt_dadc16_b_r0h_r0l
, { 0x7df3 }
80026 & ifmt_dadc16_b_r0h_r0l
, { 0xb203 }
80031 { { MNEM
, ' ', 'r', '0', 0 } },
80032 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf3 }
80038 & ifmt_brk16
, { 0x41 }
80040 /* dest-indirect */
80044 & ifmt_brk16
, { 0x9 }
80046 /* src-dest-indirect */
80050 & ifmt_brk16
, { 0x49 }
80059 /* Formats for ALIAS macro-insns. */
80061 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
80062 static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED
= {
80063 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
80068 /* Each non-simple macro entry points to an array of expansion possibilities. */
80070 #define A(a) (1 << CGEN_INSN_##a)
80071 #define OPERAND(op) M32C_OPERAND_##op
80072 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
80073 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
80075 /* The macro instruction table. */
80077 static const CGEN_IBASE m32c_cgen_macro_insn_table
[] =
80079 /* add.b:q #${Imm-12-s4},sp */
80081 -1, "add16-bQ-sp", "add.b:q", 16,
80082 { 0|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE
, 0 } } } }
80086 /* The macro instruction opcode table. */
80088 static const CGEN_OPCODE m32c_cgen_macro_insn_opcode_table
[] =
80090 /* add.b:q #${Imm-12-s4},sp */
80093 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
80094 & ifmt_add16_bQ_sp
, { 0x7db0 }
80103 #ifndef CGEN_ASM_HASH_P
80104 #define CGEN_ASM_HASH_P(insn) 1
80107 #ifndef CGEN_DIS_HASH_P
80108 #define CGEN_DIS_HASH_P(insn) 1
80111 /* Return non-zero if INSN is to be added to the hash table.
80112 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
80115 asm_hash_insn_p (const CGEN_INSN
*insn ATTRIBUTE_UNUSED
)
80117 return CGEN_ASM_HASH_P (insn
);
80121 dis_hash_insn_p (const CGEN_INSN
*insn
)
80123 /* If building the hash table and the NO-DIS attribute is present,
80125 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
80127 return CGEN_DIS_HASH_P (insn
);
80130 #ifndef CGEN_ASM_HASH
80131 #define CGEN_ASM_HASH_SIZE 127
80132 #ifdef CGEN_MNEMONIC_OPERANDS
80133 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
80135 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
80139 /* It doesn't make much sense to provide a default here,
80140 but while this is under development we do.
80141 BUFFER is a pointer to the bytes of the insn, target order.
80142 VALUE is the first base_insn_bitsize bits as an int in host order. */
80144 #ifndef CGEN_DIS_HASH
80145 #define CGEN_DIS_HASH_SIZE 256
80146 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
80149 /* The result is the hash value of the insn.
80150 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
80152 static unsigned int
80153 asm_hash_insn (const char *mnem
)
80155 return CGEN_ASM_HASH (mnem
);
80158 /* BUF is a pointer to the bytes of the insn, target order.
80159 VALUE is the first base_insn_bitsize bits as an int in host order. */
80161 static unsigned int
80162 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED
,
80163 CGEN_INSN_INT value ATTRIBUTE_UNUSED
)
80165 return CGEN_DIS_HASH (buf
, value
);
80168 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
80171 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
80173 CGEN_FIELDS_BITSIZE (fields
) = size
;
80176 /* Function to call before using the operand instance table.
80177 This plugs the opcode entries and macro instructions into the cpu table. */
80180 m32c_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
80183 int num_macros
= (sizeof (m32c_cgen_macro_insn_table
) /
80184 sizeof (m32c_cgen_macro_insn_table
[0]));
80185 const CGEN_IBASE
*ib
= & m32c_cgen_macro_insn_table
[0];
80186 const CGEN_OPCODE
*oc
= & m32c_cgen_macro_insn_opcode_table
[0];
80187 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
80189 /* This test has been added to avoid a warning generated
80190 if memset is called with a third argument of value zero. */
80191 if (num_macros
>= 1)
80192 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
80193 for (i
= 0; i
< num_macros
; ++i
)
80195 insns
[i
].base
= &ib
[i
];
80196 insns
[i
].opcode
= &oc
[i
];
80197 m32c_cgen_build_insn_regex (& insns
[i
]);
80199 cd
->macro_insn_table
.init_entries
= insns
;
80200 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
80201 cd
->macro_insn_table
.num_init_entries
= num_macros
;
80203 oc
= & m32c_cgen_insn_opcode_table
[0];
80204 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
80205 for (i
= 0; i
< MAX_INSNS
; ++i
)
80207 insns
[i
].opcode
= &oc
[i
];
80208 m32c_cgen_build_insn_regex (& insns
[i
]);
80211 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
80212 cd
->set_fields_bitsize
= set_fields_bitsize
;
80214 cd
->asm_hash_p
= asm_hash_insn_p
;
80215 cd
->asm_hash
= asm_hash_insn
;
80216 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
80218 cd
->dis_hash_p
= dis_hash_insn_p
;
80219 cd
->dis_hash
= dis_hash_insn
;
80220 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;
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